fbglyphbits.h revision 428d7b3d
1428d7b3dSmrg/*
2428d7b3dSmrg * Copyright © 1998 Keith Packard
3428d7b3dSmrg * Copyright © 2012 Intel Corporation
4428d7b3dSmrg *
5428d7b3dSmrg * Permission to use, copy, modify, distribute, and sell this software and its
6428d7b3dSmrg * documentation for any purpose is hereby granted without fee, provided that
7428d7b3dSmrg * the above copyright notice appear in all copies and that both that
8428d7b3dSmrg * copyright notice and this permission notice appear in supporting
9428d7b3dSmrg * documentation, and that the name of Keith Packard not be used in
10428d7b3dSmrg * advertising or publicity pertaining to distribution of the software without
11428d7b3dSmrg * specific, written prior permission.  Keith Packard makes no
12428d7b3dSmrg * representations about the suitability of this software for any purpose.  It
13428d7b3dSmrg * is provided "as is" without express or implied warranty.
14428d7b3dSmrg *
15428d7b3dSmrg * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
16428d7b3dSmrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
17428d7b3dSmrg * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR
18428d7b3dSmrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
19428d7b3dSmrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
20428d7b3dSmrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
21428d7b3dSmrg * PERFORMANCE OF THIS SOFTWARE.
22428d7b3dSmrg */
23428d7b3dSmrg
24428d7b3dSmrg#define isClipped(c,ul,lr)  (((c) | ((c) - (ul)) | ((lr) - (c))) & 0x80008000)
25428d7b3dSmrg#define RROP(b,a,x)	WRITE((b), FbDoRRop (READ(b), (a), (x)))
26428d7b3dSmrg
27428d7b3dSmrg#define WRITE_ADDR1(n)	    (n)
28428d7b3dSmrg#define WRITE_ADDR2(n)	    (n)
29428d7b3dSmrg#define WRITE_ADDR4(n)	    (n)
30428d7b3dSmrg
31428d7b3dSmrg#define WRITE1(d,n,fg)	    WRITE(d + WRITE_ADDR1(n), (BITS) (fg))
32428d7b3dSmrg
33428d7b3dSmrg#ifdef BITS2
34428d7b3dSmrg#define WRITE2(d,n,fg)	    WRITE((BITS2 *) &((d)[WRITE_ADDR2(n)]), (BITS2) (fg))
35428d7b3dSmrg#else
36428d7b3dSmrg#define WRITE2(d,n,fg)	    (WRITE1(d,n,fg), WRITE1(d,(n)+1,fg))
37428d7b3dSmrg#endif
38428d7b3dSmrg
39428d7b3dSmrg#ifdef BITS4
40428d7b3dSmrg#define WRITE4(d,n,fg)	    WRITE((BITS4 *) &((d)[WRITE_ADDR4(n)]), (BITS4) (fg))
41428d7b3dSmrg#else
42428d7b3dSmrg#define WRITE4(d,n,fg)	    (WRITE2(d,n,fg), WRITE2(d,(n)+2,fg))
43428d7b3dSmrg#endif
44428d7b3dSmrg
45428d7b3dSmrgstatic void
46428d7b3dSmrgGLYPH(FbBits * dstBits,
47428d7b3dSmrg      FbStride dstStride,
48428d7b3dSmrg      int dstBpp, FbStip * stipple, FbBits fg, int x, int height)
49428d7b3dSmrg{
50428d7b3dSmrg	int lshift;
51428d7b3dSmrg	FbStip bits;
52428d7b3dSmrg	BITS *dstLine;
53428d7b3dSmrg	BITS *dst;
54428d7b3dSmrg	int n;
55428d7b3dSmrg	int shift;
56428d7b3dSmrg
57428d7b3dSmrg	dstLine = (BITS *) dstBits;
58428d7b3dSmrg	dstLine += x & ~3;
59428d7b3dSmrg	dstStride *= (sizeof(FbBits) / sizeof(BITS));
60428d7b3dSmrg	shift = x & 3;
61428d7b3dSmrg	lshift = 4 - shift;
62428d7b3dSmrg	while (height--) {
63428d7b3dSmrg		bits = *stipple++;
64428d7b3dSmrg		dst = (BITS *) dstLine;
65428d7b3dSmrg		n = lshift;
66428d7b3dSmrg		while (bits) {
67428d7b3dSmrg			switch (FbStipMoveLsb(FbLeftStipBits(bits, n), 4, n)) {
68428d7b3dSmrg			case 0:
69428d7b3dSmrg				break;
70428d7b3dSmrg			case 1:
71428d7b3dSmrg				WRITE1(dst, 0, fg);
72428d7b3dSmrg				break;
73428d7b3dSmrg			case 2:
74428d7b3dSmrg				WRITE1(dst, 1, fg);
75428d7b3dSmrg				break;
76428d7b3dSmrg			case 3:
77428d7b3dSmrg				WRITE2(dst, 0, fg);
78428d7b3dSmrg				break;
79428d7b3dSmrg			case 4:
80428d7b3dSmrg				WRITE1(dst, 2, fg);
81428d7b3dSmrg				break;
82428d7b3dSmrg			case 5:
83428d7b3dSmrg				WRITE1(dst, 0, fg);
84428d7b3dSmrg				WRITE1(dst, 2, fg);
85428d7b3dSmrg				break;
86428d7b3dSmrg			case 6:
87428d7b3dSmrg				WRITE1(dst, 1, fg);
88428d7b3dSmrg				WRITE1(dst, 2, fg);
89428d7b3dSmrg				break;
90428d7b3dSmrg			case 7:
91428d7b3dSmrg				WRITE2(dst, 0, fg);
92428d7b3dSmrg				WRITE1(dst, 2, fg);
93428d7b3dSmrg				break;
94428d7b3dSmrg			case 8:
95428d7b3dSmrg				WRITE1(dst, 3, fg);
96428d7b3dSmrg				break;
97428d7b3dSmrg			case 9:
98428d7b3dSmrg				WRITE1(dst, 0, fg);
99428d7b3dSmrg				WRITE1(dst, 3, fg);
100428d7b3dSmrg				break;
101428d7b3dSmrg			case 10:
102428d7b3dSmrg				WRITE1(dst, 1, fg);
103428d7b3dSmrg				WRITE1(dst, 3, fg);
104428d7b3dSmrg				break;
105428d7b3dSmrg			case 11:
106428d7b3dSmrg				WRITE2(dst, 0, fg);
107428d7b3dSmrg				WRITE1(dst, 3, fg);
108428d7b3dSmrg				break;
109428d7b3dSmrg			case 12:
110428d7b3dSmrg				WRITE2(dst, 2, fg);
111428d7b3dSmrg				break;
112428d7b3dSmrg			case 13:
113428d7b3dSmrg				WRITE1(dst, 0, fg);
114428d7b3dSmrg				WRITE2(dst, 2, fg);
115428d7b3dSmrg				break;
116428d7b3dSmrg			case 14:
117428d7b3dSmrg				WRITE1(dst, 1, fg);
118428d7b3dSmrg				WRITE2(dst, 2, fg);
119428d7b3dSmrg				break;
120428d7b3dSmrg			case 15:
121428d7b3dSmrg				WRITE4(dst, 0, fg);
122428d7b3dSmrg				break;
123428d7b3dSmrg			}
124428d7b3dSmrg			bits = FbStipLeft(bits, n);
125428d7b3dSmrg			n = 4;
126428d7b3dSmrg			dst += 4;
127428d7b3dSmrg		}
128428d7b3dSmrg		dstLine += dstStride;
129428d7b3dSmrg	}
130428d7b3dSmrg}
131428d7b3dSmrg
132428d7b3dSmrg#undef WRITE_ADDR1
133428d7b3dSmrg#undef WRITE_ADDR2
134428d7b3dSmrg#undef WRITE_ADDR4
135428d7b3dSmrg#undef WRITE1
136428d7b3dSmrg#undef WRITE2
137428d7b3dSmrg#undef WRITE4
138428d7b3dSmrg
139428d7b3dSmrg#undef RROP
140428d7b3dSmrg#undef isClipped
141