1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 *    Xiang Haihao <haihao.xiang@intel.com>
25 *
26 */
27
28#ifndef _I915XVMC_H
29#define _I915XVMC_H
30
31#include "intel_xvmc_private.h"
32
33#define I915_SUBPIC_PALETTE_SIZE        16
34#define MAX_SUBCONTEXT_LEN              1024
35
36#define PCI_CHIP_I915_G                 0x2582
37#define PCI_CHIP_I915_GM                0x2592
38#define PCI_CHIP_I945_G                 0x2772
39#define PCI_CHIP_I945_GM                0x27A2
40#define PCI_CHIP_I945_GME               0x27AE
41#define PCI_CHIP_G33_G                  0x29C2
42#define PCI_CHIP_Q35_G                  0x29B2
43#define PCI_CHIP_Q33_G                  0x29D2
44
45#define CORRDATA_SIZE			128*GTT_PAGE_SIZE
46/*
47 * i915XvMCContext:
48 *	Private Context data referenced via the privData
49 *      pointer in the XvMCContext structure.
50 */
51typedef struct _i915XvMCContext {
52	struct intel_xvmc_context comm;
53	unsigned int yStride;
54	unsigned int uvStride;
55	unsigned int use_phys_addr;
56
57	drm_intel_bo *sis_bo;
58	drm_intel_bo *msb_bo;
59	drm_intel_bo *ssb_bo;
60	drm_intel_bo *psp_bo;
61	drm_intel_bo *psc_bo;
62	drm_intel_bo *corrdata_bo;
63} i915XvMCContext;
64
65/*
66 * i915XvMCSubpicture:
67 *  Private data structure for each XvMCSubpicture. This
68 *  structure is referenced by the privData pointer in the XvMCSubpicture
69 *  structure.
70 */
71typedef struct _i915XvMCSubpicture {
72	unsigned int srfNo;
73	unsigned int pitch;
74	unsigned char palette[3][16];
75	intel_xvmc_drm_map_t srf;
76	i915XvMCContext *privContext;
77} i915XvMCSubpicture;
78
79/* Number of YUV buffers per surface */
80#define I830_MAX_BUFS 2
81
82#endif /* _I915XVMC_H */
83