1428d7b3dSmrg/*
2428d7b3dSmrg * New regs for broadwater -- we need to split this file up sensibly somehow.
3428d7b3dSmrg */
4428d7b3dSmrg#define BRW_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \
5428d7b3dSmrg					   ((Pipeline) << 27) | \
6428d7b3dSmrg					   ((Opcode) << 24) | \
7428d7b3dSmrg					   ((Subopcode) << 16))
8428d7b3dSmrg
9428d7b3dSmrg#define BRW_URB_FENCE				BRW_3D(0, 0, 0)
10428d7b3dSmrg#define BRW_CS_URB_STATE			BRW_3D(0, 0, 1)
11428d7b3dSmrg#define BRW_CONSTANT_BUFFER			BRW_3D(0, 0, 2)
12428d7b3dSmrg#define BRW_STATE_PREFETCH			BRW_3D(0, 0, 3)
13428d7b3dSmrg
14428d7b3dSmrg#define BRW_STATE_BASE_ADDRESS			BRW_3D(0, 1, 1)
15428d7b3dSmrg#define BRW_STATE_SIP				BRW_3D(0, 1, 2)
16428d7b3dSmrg#define BRW_PIPELINE_SELECT			BRW_3D(0, 1, 4)
17428d7b3dSmrg
18428d7b3dSmrg#define NEW_PIPELINE_SELECT			BRW_3D(1, 1, 4)
19428d7b3dSmrg
20428d7b3dSmrg#define BRW_MEDIA_STATE_POINTERS		BRW_3D(2, 0, 0)
21428d7b3dSmrg#define BRW_MEDIA_OBJECT			BRW_3D(2, 1, 0)
22428d7b3dSmrg
23428d7b3dSmrg#define BRW_3DSTATE_PIPELINED_POINTERS		BRW_3D(3, 0, 0)
24428d7b3dSmrg#define BRW_3DSTATE_BINDING_TABLE_POINTERS	BRW_3D(3, 0, 1)
25428d7b3dSmrg# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS  (1 << 12)/* for GEN6 */
26428d7b3dSmrg# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS  (1 << 9) /* for GEN6 */
27428d7b3dSmrg# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS  (1 << 8) /* for GEN6 */
28428d7b3dSmrg
29428d7b3dSmrg#define BRW_3DSTATE_VERTEX_BUFFERS		BRW_3D(3, 0, 8)
30428d7b3dSmrg#define BRW_3DSTATE_VERTEX_ELEMENTS		BRW_3D(3, 0, 9)
31428d7b3dSmrg#define BRW_3DSTATE_INDEX_BUFFER		BRW_3D(3, 0, 0xa)
32428d7b3dSmrg#define BRW_3DSTATE_VF_STATISTICS		BRW_3D(3, 0, 0xb)
33428d7b3dSmrg
34428d7b3dSmrg#define BRW_3DSTATE_DRAWING_RECTANGLE		BRW_3D(3, 1, 0)
35428d7b3dSmrg#define BRW_3DSTATE_CONSTANT_COLOR		BRW_3D(3, 1, 1)
36428d7b3dSmrg#define BRW_3DSTATE_SAMPLER_PALETTE_LOAD	BRW_3D(3, 1, 2)
37428d7b3dSmrg#define BRW_3DSTATE_CHROMA_KEY			BRW_3D(3, 1, 4)
38428d7b3dSmrg#define BRW_3DSTATE_DEPTH_BUFFER		BRW_3D(3, 1, 5)
39428d7b3dSmrg# define BRW_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT	29
40428d7b3dSmrg# define BRW_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT	18
41428d7b3dSmrg
42428d7b3dSmrg#define BRW_3DSTATE_POLY_STIPPLE_OFFSET		BRW_3D(3, 1, 6)
43428d7b3dSmrg#define BRW_3DSTATE_POLY_STIPPLE_PATTERN	BRW_3D(3, 1, 7)
44428d7b3dSmrg#define BRW_3DSTATE_LINE_STIPPLE		BRW_3D(3, 1, 8)
45428d7b3dSmrg#define BRW_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP	BRW_3D(3, 1, 9)
46428d7b3dSmrg/* These two are BLC and CTG only, not BW or CL */
47428d7b3dSmrg#define BRW_3DSTATE_AA_LINE_PARAMS		BRW_3D(3, 1, 0xa)
48428d7b3dSmrg#define BRW_3DSTATE_GS_SVB_INDEX		BRW_3D(3, 1, 0xb)
49428d7b3dSmrg
50428d7b3dSmrg#define BRW_PIPE_CONTROL			BRW_3D(3, 2, 0)
51428d7b3dSmrg
52428d7b3dSmrg#define BRW_3DPRIMITIVE				BRW_3D(3, 3, 0)
53428d7b3dSmrg
54428d7b3dSmrg#define BRW_3DSTATE_CLEAR_PARAMS		BRW_3D(3, 1, 0x10)
55428d7b3dSmrg/* DW1 */
56428d7b3dSmrg# define BRW_3DSTATE_DEPTH_CLEAR_VALID		(1 << 15)
57428d7b3dSmrg
58428d7b3dSmrg/* for GEN6+ */
59428d7b3dSmrg#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS	BRW_3D(3, 0, 0x02)
60428d7b3dSmrg# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS	(1 << 12)
61428d7b3dSmrg# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS	(1 << 9)
62428d7b3dSmrg# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS	(1 << 8)
63428d7b3dSmrg
64428d7b3dSmrg#define GEN6_3DSTATE_URB			BRW_3D(3, 0, 0x05)
65428d7b3dSmrg/* DW1 */
66428d7b3dSmrg# define GEN6_3DSTATE_URB_VS_SIZE_SHIFT		16
67428d7b3dSmrg# define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT	0
68428d7b3dSmrg/* DW2 */
69428d7b3dSmrg# define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT	8
70428d7b3dSmrg# define GEN6_3DSTATE_URB_GS_SIZE_SHIFT		0
71428d7b3dSmrg
72428d7b3dSmrg#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS	BRW_3D(3, 0, 0x0d)
73428d7b3dSmrg# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC		(1 << 12)
74428d7b3dSmrg# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF		(1 << 11)
75428d7b3dSmrg# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP	(1 << 10)
76428d7b3dSmrg
77428d7b3dSmrg#define GEN6_3DSTATE_CC_STATE_POINTERS		BRW_3D(3, 0, 0x0e)
78428d7b3dSmrg
79428d7b3dSmrg#define GEN6_3DSTATE_VS				BRW_3D(3, 0, 0x10)
80428d7b3dSmrg
81428d7b3dSmrg#define GEN6_3DSTATE_GS				BRW_3D(3, 0, 0x11)
82428d7b3dSmrg/* DW4 */
83428d7b3dSmrg# define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT	0
84428d7b3dSmrg
85428d7b3dSmrg#define GEN6_3DSTATE_CLIP			BRW_3D(3, 0, 0x12)
86428d7b3dSmrg
87428d7b3dSmrg#define GEN6_3DSTATE_SF				BRW_3D(3, 0, 0x13)
88428d7b3dSmrg/* DW1 */
89428d7b3dSmrg# define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT		22
90428d7b3dSmrg# define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT	11
91428d7b3dSmrg# define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT	4
92428d7b3dSmrg/* DW2 */
93428d7b3dSmrg/* DW3 */
94428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_BOTH			(0 << 29)
95428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_NONE			(1 << 29)
96428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_FRONT			(2 << 29)
97428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_BACK			(3 << 29)
98428d7b3dSmrg/* DW4 */
99428d7b3dSmrg# define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT		29
100428d7b3dSmrg# define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT		27
101428d7b3dSmrg# define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT		25
102428d7b3dSmrg
103428d7b3dSmrg
104428d7b3dSmrg#define GEN6_3DSTATE_WM				BRW_3D(3, 0, 0x14)
105428d7b3dSmrg/* DW2 */
106428d7b3dSmrg# define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF			27
107428d7b3dSmrg# define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT	18
108428d7b3dSmrg/* DW4 */
109428d7b3dSmrg# define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT		16
110428d7b3dSmrg/* DW5 */
111428d7b3dSmrg# define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT			25
112428d7b3dSmrg# define GEN6_3DSTATE_WM_DISPATCH_ENABLE			(1 << 19)
113428d7b3dSmrg# define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE			(1 << 1)
114428d7b3dSmrg# define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE			(1 << 0)
115428d7b3dSmrg/* DW6 */
116428d7b3dSmrg# define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT			20
117428d7b3dSmrg# define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC	(1 << 15)
118428d7b3dSmrg# define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC	(1 << 14)
119428d7b3dSmrg# define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC	(1 << 13)
120428d7b3dSmrg# define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC		(1 << 12)
121428d7b3dSmrg# define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC	(1 << 11)
122428d7b3dSmrg# define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC		(1 << 10)
123428d7b3dSmrg
124428d7b3dSmrg
125428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_VS		BRW_3D(3, 0, 0x15)
126428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_GS          	BRW_3D(3, 0, 0x16)
127428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_PS          	BRW_3D(3, 0, 0x17)
128428d7b3dSmrg
129428d7b3dSmrg#define GEN6_3DSTATE_SAMPLE_MASK		BRW_3D(3, 0, 0x18)
130428d7b3dSmrg
131428d7b3dSmrg#define GEN6_3DSTATE_MULTISAMPLE		BRW_3D(3, 1, 0x0d)
132428d7b3dSmrg/* DW1 */
133428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER		(0 << 4)
134428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT	(1 << 4)
135428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1			(0 << 1)
136428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4			(2 << 1)
137428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8			(3 << 1)
138428d7b3dSmrg
139428d7b3dSmrg/* on GEN7+ */
140428d7b3dSmrg/* _3DSTATE_VERTEX_BUFFERS on GEN7*/
141428d7b3dSmrg/* DW1 */
142428d7b3dSmrg#define GEN7_VB0_ADDRESS_MODIFYENABLE   (1 << 14)
143428d7b3dSmrg
144428d7b3dSmrg/* _3DPRIMITIVE on GEN7 */
145428d7b3dSmrg/* DW1 */
146428d7b3dSmrg# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL     (0 << 8)
147428d7b3dSmrg# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM         (1 << 8)
148428d7b3dSmrg
149428d7b3dSmrg/* 3DSTATE_WM on GEN7 */
150428d7b3dSmrg/* DW1 */
151428d7b3dSmrg# define GEN7_WM_STATISTICS_ENABLE                              (1 << 31)
152428d7b3dSmrg# define GEN7_WM_DEPTH_CLEAR                                    (1 << 30)
153428d7b3dSmrg# define GEN7_WM_DISPATCH_ENABLE                                (1 << 29)
154428d7b3dSmrg# define GEN6_WM_DEPTH_RESOLVE                                  (1 << 28)
155428d7b3dSmrg# define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE                     (1 << 27)
156428d7b3dSmrg# define GEN7_WM_KILL_ENABLE                                    (1 << 25)
157428d7b3dSmrg# define GEN7_WM_PSCDEPTH_OFF                                   (0 << 23)
158428d7b3dSmrg# define GEN7_WM_PSCDEPTH_ON                                    (1 << 23)
159428d7b3dSmrg# define GEN7_WM_PSCDEPTH_ON_GE                                 (2 << 23)
160428d7b3dSmrg# define GEN7_WM_PSCDEPTH_ON_LE                                 (3 << 23)
161428d7b3dSmrg# define GEN7_WM_USES_SOURCE_DEPTH                              (1 << 20)
162428d7b3dSmrg# define GEN7_WM_USES_SOURCE_W                                  (1 << 19)
163428d7b3dSmrg# define GEN7_WM_POSITION_ZW_PIXEL                              (0 << 17)
164428d7b3dSmrg# define GEN7_WM_POSITION_ZW_CENTROID                           (2 << 17)
165428d7b3dSmrg# define GEN7_WM_POSITION_ZW_SAMPLE                             (3 << 17)
166428d7b3dSmrg# define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC              (1 << 16)
167428d7b3dSmrg# define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC            (1 << 15)
168428d7b3dSmrg# define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC               (1 << 14)
169428d7b3dSmrg# define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC                 (1 << 13)
170428d7b3dSmrg# define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC               (1 << 12)
171428d7b3dSmrg# define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC                  (1 << 11)
172428d7b3dSmrg# define GEN7_WM_USES_INPUT_COVERAGE_MASK                       (1 << 10)
173428d7b3dSmrg# define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5                      (0 << 8)
174428d7b3dSmrg# define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0                      (1 << 8)
175428d7b3dSmrg# define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0                      (2 << 8)
176428d7b3dSmrg# define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0                      (3 << 8)
177428d7b3dSmrg# define GEN7_WM_LINE_AA_WIDTH_0_5                              (0 << 6)
178428d7b3dSmrg# define GEN7_WM_LINE_AA_WIDTH_1_0                              (1 << 6)
179428d7b3dSmrg# define GEN7_WM_LINE_AA_WIDTH_2_0                              (2 << 6)
180428d7b3dSmrg# define GEN7_WM_LINE_AA_WIDTH_4_0                              (3 << 6)
181428d7b3dSmrg# define GEN7_WM_POLYGON_STIPPLE_ENABLE                         (1 << 4)
182428d7b3dSmrg# define GEN7_WM_LINE_STIPPLE_ENABLE                            (1 << 3)
183428d7b3dSmrg# define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT                     (1 << 2)
184428d7b3dSmrg# define GEN7_WM_MSRAST_OFF_PIXEL                               (0 << 0)
185428d7b3dSmrg# define GEN7_WM_MSRAST_OFF_PATTERN                             (1 << 0)
186428d7b3dSmrg# define GEN7_WM_MSRAST_ON_PIXEL                                (2 << 0)
187428d7b3dSmrg# define GEN7_WM_MSRAST_ON_PATTERN                              (3 << 0)
188428d7b3dSmrg/* DW2 */
189428d7b3dSmrg# define GEN7_WM_MSDISPMODE_PERPIXEL                            (1 << 31)
190428d7b3dSmrg
191428d7b3dSmrg#define GEN7_3DSTATE_CLEAR_PARAMS               BRW_3D(3, 0, 0x04)
192428d7b3dSmrg#define GEN7_3DSTATE_DEPTH_BUFFER               BRW_3D(3, 0, 0x05)
193428d7b3dSmrg
194428d7b3dSmrg#define GEN7_3DSTATE_CONSTANT_HS                BRW_3D(3, 0, 0x19)
195428d7b3dSmrg#define GEN7_3DSTATE_CONSTANT_DS                BRW_3D(3, 0, 0x1a)
196428d7b3dSmrg
197428d7b3dSmrg#define GEN7_3DSTATE_HS                         BRW_3D(3, 0, 0x1b)
198428d7b3dSmrg#define GEN7_3DSTATE_TE                         BRW_3D(3, 0, 0x1c)
199428d7b3dSmrg#define GEN7_3DSTATE_DS                         BRW_3D(3, 0, 0x1d)
200428d7b3dSmrg#define GEN7_3DSTATE_STREAMOUT                  BRW_3D(3, 0, 0x1e)
201428d7b3dSmrg#define GEN7_3DSTATE_SBE                        BRW_3D(3, 0, 0x1f)
202428d7b3dSmrg
203428d7b3dSmrg/* DW1 */
204428d7b3dSmrg# define GEN7_SBE_SWIZZLE_CONTROL_MODE          (1 << 28)
205428d7b3dSmrg# define GEN7_SBE_NUM_OUTPUTS_SHIFT             22
206428d7b3dSmrg# define GEN7_SBE_SWIZZLE_ENABLE                (1 << 21)
207428d7b3dSmrg# define GEN7_SBE_POINT_SPRITE_LOWERLEFT        (1 << 20)
208428d7b3dSmrg# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT   11
209428d7b3dSmrg# define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT   4
210428d7b3dSmrg
211428d7b3dSmrg#define GEN7_3DSTATE_PS                                 BRW_3D(3, 0, 0x20)
212428d7b3dSmrg/* DW1: kernel pointer */
213428d7b3dSmrg/* DW2 */
214428d7b3dSmrg# define GEN7_PS_SPF_MODE                               (1 << 31)
215428d7b3dSmrg# define GEN7_PS_VECTOR_MASK_ENABLE                     (1 << 30)
216428d7b3dSmrg# define GEN7_PS_SAMPLER_COUNT_SHIFT                    27
217428d7b3dSmrg# define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT        18
218428d7b3dSmrg# define GEN7_PS_FLOATING_POINT_MODE_IEEE_754           (0 << 16)
219428d7b3dSmrg# define GEN7_PS_FLOATING_POINT_MODE_ALT                (1 << 16)
220428d7b3dSmrg/* DW3: scratch space */
221428d7b3dSmrg/* DW4 */
222428d7b3dSmrg# define GEN7_PS_MAX_THREADS_SHIFT_IVB                  24
223428d7b3dSmrg# define GEN7_PS_MAX_THREADS_SHIFT_HSW                  23
224428d7b3dSmrg# define GEN7_PS_SAMPLE_MASK_SHIFT_HSW			12
225428d7b3dSmrg# define GEN7_PS_PUSH_CONSTANT_ENABLE                   (1 << 11)
226428d7b3dSmrg# define GEN7_PS_ATTRIBUTE_ENABLE                       (1 << 10)
227428d7b3dSmrg# define GEN7_PS_OMASK_TO_RENDER_TARGET                 (1 << 9)
228428d7b3dSmrg# define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE               (1 << 7)
229428d7b3dSmrg# define GEN7_PS_POSOFFSET_NONE                         (0 << 3)
230428d7b3dSmrg# define GEN7_PS_POSOFFSET_CENTROID                     (2 << 3)
231428d7b3dSmrg# define GEN7_PS_POSOFFSET_SAMPLE                       (3 << 3)
232428d7b3dSmrg# define GEN7_PS_32_DISPATCH_ENABLE                     (1 << 2)
233428d7b3dSmrg# define GEN7_PS_16_DISPATCH_ENABLE                     (1 << 1)
234428d7b3dSmrg# define GEN7_PS_8_DISPATCH_ENABLE                      (1 << 0)
235428d7b3dSmrg/* DW5 */
236428d7b3dSmrg# define GEN7_PS_DISPATCH_START_GRF_SHIFT_0             16
237428d7b3dSmrg# define GEN7_PS_DISPATCH_START_GRF_SHIFT_1             8
238428d7b3dSmrg# define GEN7_PS_DISPATCH_START_GRF_SHIFT_2             0
239428d7b3dSmrg/* DW6: kernel 1 pointer */
240428d7b3dSmrg/* DW7: kernel 2 pointer */
241428d7b3dSmrg
242428d7b3dSmrg#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL      BRW_3D(3, 0, 0x21)
243428d7b3dSmrg#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC         BRW_3D(3, 0, 0x23)
244428d7b3dSmrg
245428d7b3dSmrg#define GEN7_3DSTATE_BLEND_STATE_POINTERS               BRW_3D(3, 0, 0x24)
246428d7b3dSmrg#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS       BRW_3D(3, 0, 0x25)
247428d7b3dSmrg
248428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS          BRW_3D(3, 0, 0x26)
249428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS          BRW_3D(3, 0, 0x27)
250428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS          BRW_3D(3, 0, 0x28)
251428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS          BRW_3D(3, 0, 0x29)
252428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS          BRW_3D(3, 0, 0x2a)
253428d7b3dSmrg
254428d7b3dSmrg#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS          BRW_3D(3, 0, 0x2b)
255428d7b3dSmrg#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS          BRW_3D(3, 0, 0x2e)
256428d7b3dSmrg#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS          BRW_3D(3, 0, 0x2f)
257428d7b3dSmrg
258428d7b3dSmrg#define GEN7_3DSTATE_URB_VS                             BRW_3D(3, 0, 0x30)
259428d7b3dSmrg#define GEN7_3DSTATE_URB_HS                             BRW_3D(3, 0, 0x31)
260428d7b3dSmrg#define GEN7_3DSTATE_URB_DS                             BRW_3D(3, 0, 0x32)
261428d7b3dSmrg#define GEN7_3DSTATE_URB_GS                             BRW_3D(3, 0, 0x33)
262428d7b3dSmrg/* DW1 */
263428d7b3dSmrg# define GEN7_URB_ENTRY_NUMBER_SHIFT            0
264428d7b3dSmrg# define GEN7_URB_ENTRY_SIZE_SHIFT              16
265428d7b3dSmrg# define GEN7_URB_STARTING_ADDRESS_SHIFT        25
266428d7b3dSmrg
267428d7b3dSmrg#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS             BRW_3D(3, 1, 0x12)
268428d7b3dSmrg#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS             BRW_3D(3, 1, 0x16)
269428d7b3dSmrg/* DW1 */
270428d7b3dSmrg# define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16
271428d7b3dSmrg
272428d7b3dSmrg
273428d7b3dSmrg#define PIPELINE_SELECT_3D		0
274428d7b3dSmrg#define PIPELINE_SELECT_MEDIA		1
275428d7b3dSmrg
276428d7b3dSmrg#define UF0_CS_REALLOC			(1 << 13)
277428d7b3dSmrg#define UF0_VFE_REALLOC			(1 << 12)
278428d7b3dSmrg#define UF0_SF_REALLOC			(1 << 11)
279428d7b3dSmrg#define UF0_CLIP_REALLOC		(1 << 10)
280428d7b3dSmrg#define UF0_GS_REALLOC			(1 << 9)
281428d7b3dSmrg#define UF0_VS_REALLOC			(1 << 8)
282428d7b3dSmrg#define UF1_CLIP_FENCE_SHIFT		20
283428d7b3dSmrg#define UF1_GS_FENCE_SHIFT		10
284428d7b3dSmrg#define UF1_VS_FENCE_SHIFT		0
285428d7b3dSmrg#define UF2_CS_FENCE_SHIFT		20
286428d7b3dSmrg#define UF2_VFE_FENCE_SHIFT		10
287428d7b3dSmrg#define UF2_SF_FENCE_SHIFT		0
288428d7b3dSmrg
289428d7b3dSmrg/* for BRW_STATE_BASE_ADDRESS */
290428d7b3dSmrg#define BASE_ADDRESS_MODIFY		(1 << 0)
291428d7b3dSmrg
292428d7b3dSmrg/* for BRW_3DSTATE_PIPELINED_POINTERS */
293428d7b3dSmrg#define BRW_GS_DISABLE		       0
294428d7b3dSmrg#define BRW_GS_ENABLE		       1
295428d7b3dSmrg#define BRW_CLIP_DISABLE	       0
296428d7b3dSmrg#define BRW_CLIP_ENABLE		       1
297428d7b3dSmrg
298428d7b3dSmrg/* for BRW_PIPE_CONTROL */
299428d7b3dSmrg#define BRW_PIPE_CONTROL_CS_STALL      (1 << 20)
300428d7b3dSmrg#define BRW_PIPE_CONTROL_NOWRITE       (0 << 14)
301428d7b3dSmrg#define BRW_PIPE_CONTROL_WRITE_QWORD   (1 << 14)
302428d7b3dSmrg#define BRW_PIPE_CONTROL_WRITE_DEPTH   (2 << 14)
303428d7b3dSmrg#define BRW_PIPE_CONTROL_WRITE_TIME    (3 << 14)
304428d7b3dSmrg#define BRW_PIPE_CONTROL_DEPTH_STALL   (1 << 13)
305428d7b3dSmrg#define BRW_PIPE_CONTROL_WC_FLUSH      (1 << 12)
306428d7b3dSmrg#define BRW_PIPE_CONTROL_IS_FLUSH      (1 << 11)
307428d7b3dSmrg#define BRW_PIPE_CONTROL_TC_FLUSH      (1 << 10)
308428d7b3dSmrg#define BRW_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8)
309428d7b3dSmrg#define BRW_PIPE_CONTROL_GLOBAL_GTT    (1 << 2)
310428d7b3dSmrg#define BRW_PIPE_CONTROL_LOCAL_PGTT    (0 << 2)
311428d7b3dSmrg#define BRW_PIPE_CONTROL_STALL_AT_SCOREBOARD    (1 << 1)
312428d7b3dSmrg#define BRW_PIPE_CONTROL_DEPTH_CACHE_FLUSH	(1 << 0)
313428d7b3dSmrg
314428d7b3dSmrg/* VERTEX_BUFFER_STATE Structure */
315428d7b3dSmrg#define VB0_BUFFER_INDEX_SHIFT		27
316428d7b3dSmrg#define GEN6_VB0_BUFFER_INDEX_SHIFT	26
317428d7b3dSmrg#define VB0_VERTEXDATA			(0 << 26)
318428d7b3dSmrg#define VB0_INSTANCEDATA		(1 << 26)
319428d7b3dSmrg#define GEN6_VB0_VERTEXDATA		(0 << 20)
320428d7b3dSmrg#define GEN6_VB0_INSTANCEDATA		(1 << 20)
321428d7b3dSmrg#define VB0_BUFFER_PITCH_SHIFT		0
322428d7b3dSmrg
323428d7b3dSmrg/* VERTEX_ELEMENT_STATE Structure */
324428d7b3dSmrg#define VE0_VERTEX_BUFFER_INDEX_SHIFT	27
325428d7b3dSmrg#define GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT	26 /* for GEN6 */
326428d7b3dSmrg#define VE0_VALID			(1 << 26)
327428d7b3dSmrg#define GEN6_VE0_VALID			(1 << 25) /* for GEN6 */
328428d7b3dSmrg#define VE0_FORMAT_SHIFT		16
329428d7b3dSmrg#define VE0_OFFSET_SHIFT		0
330428d7b3dSmrg#define VE1_VFCOMPONENT_0_SHIFT		28
331428d7b3dSmrg#define VE1_VFCOMPONENT_1_SHIFT		24
332428d7b3dSmrg#define VE1_VFCOMPONENT_2_SHIFT		20
333428d7b3dSmrg#define VE1_VFCOMPONENT_3_SHIFT		16
334428d7b3dSmrg#define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT	0
335428d7b3dSmrg
336428d7b3dSmrg/* 3DPRIMITIVE bits */
337428d7b3dSmrg#define BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15)
338428d7b3dSmrg#define BRW_3DPRIMITIVE_VERTEX_RANDOM	  (1 << 15)
339428d7b3dSmrg/* Primitive types are in brw_defines.h */
340428d7b3dSmrg#define BRW_3DPRIMITIVE_TOPOLOGY_SHIFT	  10
341428d7b3dSmrg
342428d7b3dSmrg#define BRW_SVG_CTL		       0x7400
343428d7b3dSmrg
344428d7b3dSmrg#define BRW_SVG_CTL_GS_BA	       (0 << 8)
345428d7b3dSmrg#define BRW_SVG_CTL_SS_BA	       (1 << 8)
346428d7b3dSmrg#define BRW_SVG_CTL_IO_BA	       (2 << 8)
347428d7b3dSmrg#define BRW_SVG_CTL_GS_AUB	       (3 << 8)
348428d7b3dSmrg#define BRW_SVG_CTL_IO_AUB	       (4 << 8)
349428d7b3dSmrg#define BRW_SVG_CTL_SIP		       (5 << 8)
350428d7b3dSmrg
351428d7b3dSmrg#define BRW_SVG_RDATA		       0x7404
352428d7b3dSmrg#define BRW_SVG_WORK_CTL	       0x7408
353428d7b3dSmrg
354428d7b3dSmrg#define BRW_VF_CTL		       0x7500
355428d7b3dSmrg
356428d7b3dSmrg#define BRW_VF_CTL_SNAPSHOT_COMPLETE		   (1 << 31)
357428d7b3dSmrg#define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID	   (0 << 8)
358428d7b3dSmrg#define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG	   (1 << 8)
359428d7b3dSmrg#define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE   (0 << 4)
360428d7b3dSmrg#define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX	   (1 << 4)
361428d7b3dSmrg#define BRW_VF_CTL_SKIP_INITIAL_PRIMITIVES	   (1 << 3)
362428d7b3dSmrg#define BRW_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE	   (1 << 2)
363428d7b3dSmrg#define BRW_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE	   (1 << 1)
364428d7b3dSmrg#define BRW_VF_CTL_SNAPSHOT_ENABLE	     	   (1 << 0)
365428d7b3dSmrg
366428d7b3dSmrg#define BRW_VF_STRG_VAL		       0x7504
367428d7b3dSmrg#define BRW_VF_STR_VL_OVR	       0x7508
368428d7b3dSmrg#define BRW_VF_VC_OVR		       0x750c
369428d7b3dSmrg#define BRW_VF_STR_PSKIP	       0x7510
370428d7b3dSmrg#define BRW_VF_MAX_PRIM		       0x7514
371428d7b3dSmrg#define BRW_VF_RDATA		       0x7518
372428d7b3dSmrg
373428d7b3dSmrg#define BRW_VS_CTL		       0x7600
374428d7b3dSmrg#define BRW_VS_CTL_SNAPSHOT_COMPLETE		   (1 << 31)
375428d7b3dSmrg#define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_0	   (0 << 8)
376428d7b3dSmrg#define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_1	   (1 << 8)
377428d7b3dSmrg#define BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT	   (2 << 8)
378428d7b3dSmrg#define BRW_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER  (3 << 8)
379428d7b3dSmrg#define BRW_VS_CTL_SNAPSHOT_ALL_THREADS		   (1 << 2)
380428d7b3dSmrg#define BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE	   (1 << 1)
381428d7b3dSmrg#define BRW_VS_CTL_SNAPSHOT_ENABLE		   (1 << 0)
382428d7b3dSmrg
383428d7b3dSmrg#define BRW_VS_STRG_VAL		       0x7604
384428d7b3dSmrg#define BRW_VS_RDATA		       0x7608
385428d7b3dSmrg
386428d7b3dSmrg#define BRW_SF_CTL		       0x7b00
387428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_COMPLETE		   (1 << 31)
388428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID	   (0 << 8)
389428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8)
390428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID	   (2 << 8)
391428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8)
392428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID	   (4 << 8)
393428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8)
394428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT	   (6 << 8)
395428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER  (7 << 8)
396428d7b3dSmrg#define BRW_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE  (1 << 4)
397428d7b3dSmrg#define BRW_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE	   (1 << 3)
398428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_ALL_THREADS		   (1 << 2)
399428d7b3dSmrg#define BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE	   (1 << 1)
400428d7b3dSmrg#define BRW_SF_CTL_SNAPSHOT_ENABLE		   (1 << 0)
401428d7b3dSmrg
402428d7b3dSmrg#define BRW_SF_STRG_VAL		       0x7b04
403428d7b3dSmrg#define BRW_SF_RDATA		       0x7b18
404428d7b3dSmrg
405428d7b3dSmrg#define BRW_WIZ_CTL		       0x7c00
406428d7b3dSmrg#define BRW_WIZ_CTL_SNAPSHOT_COMPLETE		   (1 << 31)
407428d7b3dSmrg#define BRW_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT	   16
408428d7b3dSmrg#define BRW_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER   (0 << 8)
409428d7b3dSmrg#define BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE     (1 << 8)
410428d7b3dSmrg#define BRW_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE   (2 << 8)
411428d7b3dSmrg#define BRW_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH	      (1 << 6)
412428d7b3dSmrg#define BRW_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS    (1 << 5)
413428d7b3dSmrg#define BRW_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE   (1 << 4)
414428d7b3dSmrg#define BRW_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG	      (1 << 3)
415428d7b3dSmrg#define BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS	      (1 << 2)
416428d7b3dSmrg#define BRW_WIZ_CTL_THREAD_SNAPSHOT_ENABLE	      (1 << 1)
417428d7b3dSmrg#define BRW_WIZ_CTL_SNAPSHOT_ENABLE		      (1 << 0)
418428d7b3dSmrg
419428d7b3dSmrg#define BRW_WIZ_STRG_VAL			      0x7c04
420428d7b3dSmrg#define BRW_WIZ_RDATA				      0x7c18
421428d7b3dSmrg
422428d7b3dSmrg#define BRW_TS_CTL		       0x7e00
423428d7b3dSmrg#define BRW_TS_CTL_SNAPSHOT_COMPLETE		   (1 << 31)
424428d7b3dSmrg#define BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR	   (0 << 8)
425428d7b3dSmrg#define BRW_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR   (3 << 8)
426428d7b3dSmrg#define BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS	   (1 << 2)
427428d7b3dSmrg#define BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS  	   (1 << 1)
428428d7b3dSmrg#define BRW_TS_CTL_SNAPSHOT_ENABLE		   (1 << 0)
429428d7b3dSmrg
430428d7b3dSmrg#define BRW_TS_STRG_VAL		       0x7e04
431428d7b3dSmrg#define BRW_TS_RDATA		       0x7e08
432428d7b3dSmrg
433428d7b3dSmrg#define BRW_TD_CTL		       0x8000
434428d7b3dSmrg#define BRW_TD_CTL_MUX_SHIFT	       8
435428d7b3dSmrg#define BRW_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH	   (1 << 7)
436428d7b3dSmrg#define BRW_TD_CTL_FORCE_EXTERNAL_HALT		   (1 << 6)
437428d7b3dSmrg#define BRW_TD_CTL_EXCEPTION_MASK_OVERRIDE	   (1 << 5)
438428d7b3dSmrg#define BRW_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE  (1 << 4)
439428d7b3dSmrg#define BRW_TD_CTL_BREAKPOINT_ENABLE		   (1 << 2)
440428d7b3dSmrg#define BRW_TD_CTL2		       0x8004
441428d7b3dSmrg#define BRW_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28)
442428d7b3dSmrg#define BRW_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE      (1 << 26)
443428d7b3dSmrg#define BRW_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE	      (1 << 25)
444428d7b3dSmrg#define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT	      16
445428d7b3dSmrg#define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE	      (1 << 8)
446428d7b3dSmrg#define BRW_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7)
447428d7b3dSmrg#define BRW_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE	      (1 << 6)
448428d7b3dSmrg#define BRW_TD_CTL2_SF_EXECUTION_MASK_ENABLE	      (1 << 5)
449428d7b3dSmrg#define BRW_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE     (1 << 4)
450428d7b3dSmrg#define BRW_TD_CTL2_GS_EXECUTION_MASK_ENABLE	      (1 << 3)
451428d7b3dSmrg#define BRW_TD_CTL2_VS_EXECUTION_MASK_ENABLE	      (1 << 0)
452428d7b3dSmrg#define BRW_TD_VF_VS_EMSK	       0x8008
453428d7b3dSmrg#define BRW_TD_GS_EMSK		       0x800c
454428d7b3dSmrg#define BRW_TD_CLIP_EMSK	       0x8010
455428d7b3dSmrg#define BRW_TD_SF_EMSK		       0x8014
456428d7b3dSmrg#define BRW_TD_WIZ_EMSK		       0x8018
457428d7b3dSmrg#define BRW_TD_0_6_EHTRG_VAL	       0x801c
458428d7b3dSmrg#define BRW_TD_0_7_EHTRG_VAL	       0x8020
459428d7b3dSmrg#define BRW_TD_0_6_EHTRG_MSK           0x8024
460428d7b3dSmrg#define BRW_TD_0_7_EHTRG_MSK	       0x8028
461428d7b3dSmrg#define BRW_TD_RDATA		       0x802c
462428d7b3dSmrg#define BRW_TD_TS_EMSK		       0x8030
463428d7b3dSmrg
464428d7b3dSmrg#define BRW_EU_CTL		       0x8800
465428d7b3dSmrg#define BRW_EU_CTL_SELECT_SHIFT	       16
466428d7b3dSmrg#define BRW_EU_CTL_DATA_MUX_SHIFT      8
467428d7b3dSmrg#define BRW_EU_ATT_0		       0x8810
468428d7b3dSmrg#define BRW_EU_ATT_1		       0x8814
469428d7b3dSmrg#define BRW_EU_ATT_DATA_0	       0x8820
470428d7b3dSmrg#define BRW_EU_ATT_DATA_1	       0x8824
471428d7b3dSmrg#define BRW_EU_ATT_CLR_0	       0x8830
472428d7b3dSmrg#define BRW_EU_ATT_CLR_1	       0x8834
473428d7b3dSmrg#define BRW_EU_RDATA		       0x8840
474428d7b3dSmrg
475428d7b3dSmrg/* End regs for broadwater */
476428d7b3dSmrg
477