1/**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifdef HAVE_CONFIG_H
29#include "config.h"
30#endif
31
32#include "xf86.h"
33#include "i830.h"
34
35#include "i915_reg.h"
36
37void I915EmitInvarientState( ScrnInfoPtr pScrn )
38{
39   I830Ptr pI830 = I830PTR(pScrn);
40
41   BEGIN_BATCH(24);
42
43   OUT_BATCH(_3DSTATE_AA_CMD |
44	     AA_LINE_ECAAR_WIDTH_ENABLE |
45	     AA_LINE_ECAAR_WIDTH_1_0 |
46	     AA_LINE_REGION_WIDTH_ENABLE |
47	     AA_LINE_REGION_WIDTH_1_0);
48
49   /* Disable independent alpha blend */
50   OUT_BATCH(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
51	     IAB_MODIFY_ENABLE |
52	     IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) |
53	     IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) |
54	     IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT));
55
56   OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
57   OUT_BATCH(0);
58
59   OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
60   OUT_BATCH(0);
61
62   OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
63   OUT_BATCH(0);
64
65   /* Don't support texture crossbar yet */
66   OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
67	     CSB_TCB(0, 0) |
68	     CSB_TCB(1, 1) |
69	     CSB_TCB(2, 2) |
70	     CSB_TCB(3, 3) |
71	     CSB_TCB(4, 4) |
72	     CSB_TCB(5, 5) |
73	     CSB_TCB(6, 6) |
74	     CSB_TCB(7, 7));
75
76   OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
77	     ENABLE_POINT_RASTER_RULE |
78	     OGL_POINT_RASTER_RULE |
79	     ENABLE_LINE_STRIP_PROVOKE_VRTX |
80	     ENABLE_TRI_FAN_PROVOKE_VRTX |
81	     LINE_STRIP_PROVOKE_VRTX(1) |
82	     TRI_FAN_PROVOKE_VRTX(2) |
83	     ENABLE_TEXKILL_3D_4D |
84	     TEXKILL_4D);
85
86   OUT_BATCH(_3DSTATE_MODES_4_CMD |
87	     ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) |
88	     ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) |
89	     ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
90
91   OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 0);
92   OUT_BATCH(0x00000000);	/* Disable texture coordinate wrap-shortest */
93
94   OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
95   OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
96   OUT_BATCH(0);
97   OUT_BATCH(0);
98
99   OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
100
101   OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */
102   OUT_BATCH(0);
103
104   OUT_BATCH(_3DSTATE_STIPPLE);
105   OUT_BATCH(0x00000000);
106
107   OUT_BATCH(_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0 );
108   OUT_BATCH(MI_NOOP);
109
110   ADVANCE_BATCH();
111}
112