1/* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Xiang Haihao <haihao.xiang@intel.com> 25 * 26 */ 27 28#ifndef _I915XVMC_H 29#define _I915XVMC_H 30 31#include "intel_xvmc.h" 32#include "i915_hwmc.h" 33 34#define I915_SUBPIC_PALETTE_SIZE 16 35#define MAX_SUBCONTEXT_LEN 1024 36 37#define PCI_CHIP_I915_G 0x2582 38#define PCI_CHIP_I915_GM 0x2592 39#define PCI_CHIP_I945_G 0x2772 40#define PCI_CHIP_I945_GM 0x27A2 41#define PCI_CHIP_I945_GME 0x27AE 42#define PCI_CHIP_G33_G 0x29C2 43#define PCI_CHIP_Q35_G 0x29B2 44#define PCI_CHIP_Q33_G 0x29D2 45 46/* 47 * i915XvMCContext: 48 * Private Context data referenced via the privData 49 * pointer in the XvMCContext structure. 50 */ 51typedef struct _i915XvMCContext { 52 unsigned int ctxno; 53 unsigned int last_flip; 54 unsigned int dual_prime; /* Flag to identify when dual prime is in use. */ 55 unsigned int yStride; 56 unsigned int uvStride; 57 unsigned short ref; 58 unsigned int depth; 59 XvPortID port; /* Xv Port ID when displaying */ 60 int haveXv; /* Have I initialized the Xv 61 * connection for this surface? */ 62 XvImage *xvImage; /* Fake Xv Image used for command 63 * buffer transport to the X server */ 64 GC gc; /* X GC needed for displaying */ 65 Drawable draw; /* Drawable to undisplay from */ 66 void *drawHash; 67 int deviceID; 68 69 intel_xvmc_drm_map_t sis; 70 intel_xvmc_drm_map_t msb; 71 intel_xvmc_drm_map_t ssb; 72 intel_xvmc_drm_map_t psp; 73 intel_xvmc_drm_map_t psc; 74 intel_xvmc_drm_map_t corrdata; 75} i915XvMCContext; 76 77/* 78 * i915XvMCSubpicture: 79 * Private data structure for each XvMCSubpicture. This 80 * structure is referenced by the privData pointer in the XvMCSubpicture 81 * structure. 82 */ 83typedef struct _i915XvMCSubpicture { 84 unsigned int srfNo; 85 unsigned int last_render; 86 unsigned int last_flip; 87 unsigned int pitch; 88 unsigned char palette[3][16]; 89 intel_xvmc_drm_map_t srf; 90 i915XvMCContext *privContext; 91} i915XvMCSubpicture; 92 93/* Number of YUV buffers per surface */ 94#define I830_MAX_BUFS 2 95 96/* 97 * i915XvMCSurface: Private data structure for each XvMCSurface. This 98 * structure is referenced by the privData pointer in the XvMCSurface 99 * structure. 100 */ 101typedef struct _i915XvMCSurface { 102 unsigned int srfNo; /* XvMC private surface numbers */ 103 unsigned int last_render; 104 unsigned int last_flip; 105 unsigned int yStride; /* Stride of YUV420 Y component. */ 106 unsigned int uvStride; 107 unsigned int width; /* Dimensions */ 108 unsigned int height; 109 intel_xvmc_drm_map_t srf; 110 i915XvMCContext *privContext; 111 i915XvMCSubpicture *privSubPic; /* Subpicture to be blended when 112 * displaying. NULL if none. */ 113} i915XvMCSurface; 114 115#endif /* _I915XVMC_H */ 116