i915_program.h revision 03b705cf
1#ifndef _I915_PROGRAM_H 2#define _I915_PROGRAM_H 3 4#define REG_TYPE_R 0 /* temporary regs, no need to 5 * dcl, must be written before 6 * read -- Preserved between 7 * phases. 8 */ 9#define REG_TYPE_T 1 /* Interpolated values, must be 10 * dcl'ed before use. 11 * 12 * 0..7: texture coord, 13 * 8: diffuse spec, 14 * 9: specular color, 15 * 10: fog parameter in w. 16 */ 17#define REG_TYPE_CONST 2 /* Restriction: only one const 18 * can be referenced per 19 * instruction, though it may be 20 * selected for multiple inputs. 21 * Constants not initialized 22 * default to zero. 23 */ 24#define REG_TYPE_S 3 /* sampler */ 25#define REG_TYPE_OC 4 /* output color (rgba) */ 26#define REG_TYPE_OD 5 /* output depth (w), xyz are 27 * temporaries. If not written, 28 * interpolated depth is used? 29 */ 30#define REG_TYPE_U 6 /* unpreserved temporaries */ 31#define REG_TYPE_MASK 0x7 32#define REG_NR_MASK 0xf 33 34/* REG_TYPE_T: 35 */ 36#define T_TEX0 0 37#define T_TEX1 1 38#define T_TEX2 2 39#define T_TEX3 3 40#define T_TEX4 4 41#define T_TEX5 5 42#define T_TEX6 6 43#define T_TEX7 7 44#define T_DIFFUSE 8 45#define T_SPECULAR 9 46#define T_FOG_W 10 /* interpolated fog is in W coord */ 47 48/* Arithmetic instructions */ 49 50/* .replicate_swizzle == selection and replication of a particular 51 * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww 52 */ 53#define A0_NOP (0x0<<24) /* no operation */ 54#define A0_ADD (0x1<<24) /* dst = src0 + src1 */ 55#define A0_MOV (0x2<<24) /* dst = src0 */ 56#define A0_MUL (0x3<<24) /* dst = src0 * src1 */ 57#define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ 58#define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ 59#define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ 60#define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ 61#define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ 62#define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ 63#define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ 64#define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ 65#define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ 66#define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ 67#define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ 68#define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ 69#define A0_FLR (0x10<<24) /* dst = floor(src0) */ 70#define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ 71#define A0_TRC (0x12<<24) /* dst = int(src0) */ 72#define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ 73#define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ 74#define A0_DEST_SATURATE (1<<22) 75#define A0_DEST_TYPE_SHIFT 19 76/* Allow: R, OC, OD, U */ 77#define A0_DEST_NR_SHIFT 14 78/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ 79#define A0_DEST_CHANNEL_X (1<<10) 80#define A0_DEST_CHANNEL_Y (2<<10) 81#define A0_DEST_CHANNEL_Z (4<<10) 82#define A0_DEST_CHANNEL_W (8<<10) 83#define A0_DEST_CHANNEL_ALL (0xf<<10) 84#define A0_DEST_CHANNEL_SHIFT 10 85#define A0_SRC0_TYPE_SHIFT 7 86#define A0_SRC0_NR_SHIFT 2 87 88#define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) 89#define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) 90 91#define SRC_X 0 92#define SRC_Y 1 93#define SRC_Z 2 94#define SRC_W 3 95#define SRC_ZERO 4 96#define SRC_ONE 5 97 98#define A1_SRC0_CHANNEL_X_NEGATE (1<<31) 99#define A1_SRC0_CHANNEL_X_SHIFT 28 100#define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) 101#define A1_SRC0_CHANNEL_Y_SHIFT 24 102#define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) 103#define A1_SRC0_CHANNEL_Z_SHIFT 20 104#define A1_SRC0_CHANNEL_W_NEGATE (1<<19) 105#define A1_SRC0_CHANNEL_W_SHIFT 16 106#define A1_SRC1_TYPE_SHIFT 13 107#define A1_SRC1_NR_SHIFT 8 108#define A1_SRC1_CHANNEL_X_NEGATE (1<<7) 109#define A1_SRC1_CHANNEL_X_SHIFT 4 110#define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) 111#define A1_SRC1_CHANNEL_Y_SHIFT 0 112 113#define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) 114#define A2_SRC1_CHANNEL_Z_SHIFT 28 115#define A2_SRC1_CHANNEL_W_NEGATE (1<<27) 116#define A2_SRC1_CHANNEL_W_SHIFT 24 117#define A2_SRC2_TYPE_SHIFT 21 118#define A2_SRC2_NR_SHIFT 16 119#define A2_SRC2_CHANNEL_X_NEGATE (1<<15) 120#define A2_SRC2_CHANNEL_X_SHIFT 12 121#define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) 122#define A2_SRC2_CHANNEL_Y_SHIFT 8 123#define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) 124#define A2_SRC2_CHANNEL_Z_SHIFT 4 125#define A2_SRC2_CHANNEL_W_NEGATE (1<<3) 126#define A2_SRC2_CHANNEL_W_SHIFT 0 127 128/* Declaration instructions */ 129#define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) 130 * register or an s (sampler) 131 * register. */ 132#define D0_SAMPLE_TYPE_SHIFT 22 133#define D0_SAMPLE_TYPE_2D (0x0<<22) 134#define D0_SAMPLE_TYPE_CUBE (0x1<<22) 135#define D0_SAMPLE_TYPE_VOLUME (0x2<<22) 136#define D0_SAMPLE_TYPE_MASK (0x3<<22) 137 138#define D0_TYPE_SHIFT 19 139/* Allow: T, S */ 140#define D0_NR_SHIFT 14 141/* Allow T: 0..10, S: 0..15 */ 142#define D0_CHANNEL_X (1<<10) 143#define D0_CHANNEL_Y (2<<10) 144#define D0_CHANNEL_Z (4<<10) 145#define D0_CHANNEL_W (8<<10) 146#define D0_CHANNEL_ALL (0xf<<10) 147#define D0_CHANNEL_NONE (0<<10) 148 149#define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) 150#define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) 151 152/* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse 153 * or specular declarations. 154 * 155 * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) 156 * 157 * Must be zero for S (sampler) dcls 158 */ 159#define D1_MBZ 0 160#define D2_MBZ 0 161 162/* Texture instructions */ 163#define T0_TEXLD (0x15<<24) /* Sample texture using predeclared 164 * sampler and address, and output 165 * filtered texel data to destination 166 * register */ 167#define T0_TEXLDP (0x16<<24) /* Same as texld but performs a 168 * perspective divide of the texture 169 * coordinate .xyz values by .w before 170 * sampling. */ 171#define T0_TEXLDB (0x17<<24) /* Same as texld but biases the 172 * computed LOD by w. Only S4.6 two's 173 * comp is used. This implies that a 174 * float to fixed conversion is 175 * done. */ 176#define T0_TEXKILL (0x18<<24) /* Does not perform a sampling 177 * operation. Simply kills the pixel 178 * if any channel of the address 179 * register is < 0.0. */ 180#define T0_DEST_TYPE_SHIFT 19 181/* Allow: R, OC, OD, U */ 182/* Note: U (unpreserved) regs do not retain their values between 183 * phases (cannot be used for feedback) 184 * 185 * Note: oC and OD registers can only be used as the destination of a 186 * texture instruction once per phase (this is an implementation 187 * restriction). 188 */ 189#define T0_DEST_NR_SHIFT 14 190/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ 191#define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ 192#define T0_SAMPLER_NR_MASK (0xf<<0) 193 194#define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ 195/* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ 196#define T1_ADDRESS_REG_NR_SHIFT 17 197#define T2_MBZ 0 198 199/* Having zero and one in here makes the definition of swizzle a lot 200 * easier. 201 */ 202#define UREG_TYPE_SHIFT 29 203#define UREG_NR_SHIFT 24 204#define UREG_CHANNEL_X_NEGATE_SHIFT 23 205#define UREG_CHANNEL_X_SHIFT 20 206#define UREG_CHANNEL_Y_NEGATE_SHIFT 19 207#define UREG_CHANNEL_Y_SHIFT 16 208#define UREG_CHANNEL_Z_NEGATE_SHIFT 15 209#define UREG_CHANNEL_Z_SHIFT 12 210#define UREG_CHANNEL_W_NEGATE_SHIFT 11 211#define UREG_CHANNEL_W_SHIFT 8 212#define UREG_CHANNEL_ZERO_NEGATE_MBZ 5 213#define UREG_CHANNEL_ZERO_SHIFT 4 214#define UREG_CHANNEL_ONE_NEGATE_MBZ 1 215#define UREG_CHANNEL_ONE_SHIFT 0 216 217#define UREG_BAD 0xffffffff /* not a valid ureg */ 218 219#define X SRC_X 220#define Y SRC_Y 221#define Z SRC_Z 222#define W SRC_W 223#define ZERO SRC_ZERO 224#define ONE SRC_ONE 225 226/* Construct a ureg: 227 */ 228#define UREG(type, nr) (((type) << UREG_TYPE_SHIFT) | \ 229 ((nr) << UREG_NR_SHIFT) | \ 230 (X << UREG_CHANNEL_X_SHIFT) | \ 231 (Y << UREG_CHANNEL_Y_SHIFT) | \ 232 (Z << UREG_CHANNEL_Z_SHIFT) | \ 233 (W << UREG_CHANNEL_W_SHIFT) | \ 234 (ZERO << UREG_CHANNEL_ZERO_SHIFT) | \ 235 (ONE << UREG_CHANNEL_ONE_SHIFT)) 236 237#define GET_CHANNEL_SRC( reg, channel ) ((reg<<(channel*4)) & (0xf<<20)) 238#define CHANNEL_SRC( src, channel ) (src>>(channel*4)) 239 240#define GET_UREG_TYPE(reg) (((reg) >> UREG_TYPE_SHIFT) & REG_TYPE_MASK) 241#define GET_UREG_NR(reg) (((reg) >> UREG_NR_SHIFT) & REG_NR_MASK) 242 243#define UREG_XYZW_CHANNEL_MASK 0x00ffff00 244 245#define A0_DEST(reg) (((reg) & UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT) 246#define D0_DEST(reg) (((reg) & UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT) 247#define T0_DEST(reg) (((reg) & UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT) 248#define A0_SRC0(reg) (((reg) & UREG_MASK) >> UREG_A0_SRC0_SHIFT_LEFT) 249#define A1_SRC0(reg) (((reg) & UREG_MASK) << UREG_A1_SRC0_SHIFT_RIGHT) 250#define A1_SRC1(reg) (((reg) & UREG_MASK) >> UREG_A1_SRC1_SHIFT_LEFT) 251#define A2_SRC1(reg) (((reg) & UREG_MASK) << UREG_A2_SRC1_SHIFT_RIGHT) 252#define A2_SRC2(reg) (((reg) & UREG_MASK) >> UREG_A2_SRC2_SHIFT_LEFT) 253 254/* These are special, and don't have swizzle/negate bits. 255 */ 256#define T0_SAMPLER( reg ) (GET_UREG_NR(reg) << T0_SAMPLER_NR_SHIFT) 257#define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg) << T1_ADDRESS_REG_NR_SHIFT) | \ 258 (GET_UREG_TYPE(reg) << T1_ADDRESS_REG_TYPE_SHIFT)) 259 260/* Macros for translating UREG's into the various register fields used 261 * by the I915 programmable unit. 262 */ 263#define UREG_A0_DEST_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_DEST_TYPE_SHIFT) 264#define UREG_A0_SRC0_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_SRC0_TYPE_SHIFT) 265#define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT) 266#define UREG_A1_SRC1_SHIFT_LEFT (UREG_TYPE_SHIFT - A1_SRC1_TYPE_SHIFT) 267#define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT) 268#define UREG_A2_SRC2_SHIFT_LEFT (UREG_TYPE_SHIFT - A2_SRC2_TYPE_SHIFT) 269 270#define UREG_MASK 0xffffff00 271#define UREG_TYPE_NR_MASK ((REG_TYPE_MASK << UREG_TYPE_SHIFT) | \ 272 (REG_NR_MASK << UREG_NR_SHIFT)) 273 274#endif 275