103b705cfSriastradh/*
203b705cfSriastradh * Copyright © 2007 Intel Corporation
303b705cfSriastradh *
403b705cfSriastradh * Permission is hereby granted, free of charge, to any person obtaining a
503b705cfSriastradh * copy of this software and associated documentation files (the "Software"),
603b705cfSriastradh * to deal in the Software without restriction, including without limitation
703b705cfSriastradh * the rights to use, copy, modify, merge, publish, distribute, sublicense,
803b705cfSriastradh * and/or sell copies of the Software, and to permit persons to whom the
903b705cfSriastradh * Software is furnished to do so, subject to the following conditions:
1003b705cfSriastradh *
1103b705cfSriastradh * The above copyright notice and this permission notice (including the next
1203b705cfSriastradh * paragraph) shall be included in all copies or substantial portions of the
1303b705cfSriastradh * Software.
1403b705cfSriastradh *
1503b705cfSriastradh * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1603b705cfSriastradh * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1703b705cfSriastradh * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1803b705cfSriastradh * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1903b705cfSriastradh * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
2003b705cfSriastradh * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
2103b705cfSriastradh * SOFTWARE.
2203b705cfSriastradh *
2303b705cfSriastradh * Authors:
2403b705cfSriastradh *    Zhenyu Wang <zhenyu.z.wang@intel.com>
2503b705cfSriastradh *
2603b705cfSriastradh */
2703b705cfSriastradh#ifndef I830_HWMC_H
2803b705cfSriastradh#define I830_HWMC_H
2903b705cfSriastradh
3003b705cfSriastradh#define INTEL_XVMC_LIBNAME	"IntelXvMC"
3103b705cfSriastradh#define INTEL_XVMC_MAJOR	0
3203b705cfSriastradh#define INTEL_XVMC_MINOR	1
3303b705cfSriastradh#define INTEL_XVMC_PATCHLEVEL	0
3403b705cfSriastradh
3503b705cfSriastradh#define FOURCC_XVMC     (('C' << 24) + ('M' << 16) + ('V' << 8) + 'X')
3603b705cfSriastradh
3703b705cfSriastradh/*
3803b705cfSriastradh * Commands that client submits through XvPutImage:
3903b705cfSriastradh */
4003b705cfSriastradh
4103b705cfSriastradh#define INTEL_XVMC_COMMAND_DISPLAY      0x00
4203b705cfSriastradh#define INTEL_XVMC_COMMAND_UNDISPLAY    0x01
4303b705cfSriastradh
4403b705cfSriastradh/* hw xvmc support type */
4503b705cfSriastradh#define XVMC_I915_MPEG2_MC	0x01
4603b705cfSriastradh#define XVMC_I965_MPEG2_MC	0x02
4703b705cfSriastradh#define XVMC_I945_MPEG2_VLD	0x04
4803b705cfSriastradh#define XVMC_I965_MPEG2_VLD	0x08
4903b705cfSriastradh
5003b705cfSriastradhstruct intel_xvmc_hw_context {
5103b705cfSriastradh	unsigned int type;
5203b705cfSriastradh	union {
5303b705cfSriastradh		struct {
5403b705cfSriastradh			unsigned int use_phys_addr : 1;
5503b705cfSriastradh		} i915;
5603b705cfSriastradh		struct {
5703b705cfSriastradh			unsigned int is_g4x:1;
5803b705cfSriastradh			unsigned int is_965_q:1;
5903b705cfSriastradh			unsigned int is_igdng:1;
6003b705cfSriastradh		} i965;
6103b705cfSriastradh	};
6203b705cfSriastradh};
6303b705cfSriastradh
6403b705cfSriastradh/* Intel private XvMC command to DDX driver */
6503b705cfSriastradhstruct intel_xvmc_command {
6603b705cfSriastradh	uint32_t handle;
6703b705cfSriastradh};
6803b705cfSriastradh
6903b705cfSriastradh#ifdef _INTEL_XVMC_SERVER_
7003b705cfSriastradh#include <xf86xvmc.h>
7103b705cfSriastradh
7203b705cfSriastradhextern Bool intel_xvmc_adaptor_init(ScreenPtr);
7303b705cfSriastradh#endif
7403b705cfSriastradh
7503b705cfSriastradh#endif
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