154569438Smrg/* 254569438Smrg * Copyright 2007 George Sapountzis 354569438Smrg * 454569438Smrg * Permission is hereby granted, free of charge, to any person obtaining a 554569438Smrg * copy of this software and associated documentation files (the "Software"), 654569438Smrg * to deal in the Software without restriction, including without limitation 754569438Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 854569438Smrg * and/or sell copies of the Software, and to permit persons to whom the 954569438Smrg * Software is furnished to do so, subject to the following conditions: 1054569438Smrg * 1154569438Smrg * The above copyright notice and this permission notice (including the next 1254569438Smrg * paragraph) shall be included in all copies or substantial portions of the 1354569438Smrg * Software. 1454569438Smrg * 1554569438Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1654569438Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1754569438Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1854569438Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1954569438Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 2054569438Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 2154569438Smrg * SOFTWARE. 2254569438Smrg */ 2354569438Smrg 2454569438Smrg/** 2554569438Smrg * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess 2654569438Smrg * library. The main purpose being to facilitate source code compatibility. 2754569438Smrg */ 2854569438Smrg 2954569438Smrg#ifndef NEOPCIRENAME_H 3054569438Smrg#define NEOPCIRENAME_H 3154569438Smrg 3254569438Smrgenum region_type { 3354569438Smrg REGION_MEM, 3454569438Smrg REGION_IO 3554569438Smrg}; 3654569438Smrg 3754569438Smrg#ifndef XSERVER_LIBPCIACCESS 3854569438Smrg 3954569438Smrg/* pciVideoPtr */ 4054569438Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor) 4154569438Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType) 4254569438Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->chipRev) 4354569438Smrg 4454569438Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor) 4554569438Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard) 4654569438Smrg 4754569438Smrg#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus, \ 4854569438Smrg (_pcidev)->device, \ 4954569438Smrg (_pcidev)->func) 5054569438Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 5154569438Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->device) 5254569438Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 5354569438Smrg 5454569438Smrg/* pciConfigPtr */ 5554569438Smrg#define PCI_CFG_TAG(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->tag) 5654569438Smrg#define PCI_CFG_BUS(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->busnum) 5754569438Smrg#define PCI_CFG_DEV(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->devnum) 5854569438Smrg#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum) 5954569438Smrg 6054569438Smrg/* region addr: xfree86 uses different fields for memory regions and I/O ports */ 6154569438Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) \ 6254569438Smrg (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \ 6354569438Smrg : (_pcidev)->ioBase[(_b)]) 6454569438Smrg 6554569438Smrg/* region size: xfree86 uses the log2 of the region size, 6654569438Smrg * but with zero meaning no region, not size of one XXX */ 6754569438Smrg#define PCI_REGION_SIZE(_pcidev, _b) \ 6854569438Smrg (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0) 6954569438Smrg 7054569438Smrg/* read/write PCI configuration space */ 7154569438Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 7254569438Smrg *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset)) 7354569438Smrg 7454569438Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 7554569438Smrg *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset)) 7654569438Smrg 7754569438Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 7854569438Smrg pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value)) 7954569438Smrg 8054569438Smrg#else /* XSERVER_LIBPCIACCESS */ 8154569438Smrg 8254569438Smrgtypedef struct pci_device *pciVideoPtr; 8354569438Smrg 8454569438Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id) 8554569438Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id) 8654569438Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->revision) 8754569438Smrg 8854569438Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id) 8954569438Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id) 9054569438Smrg 9154569438Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 9254569438Smrg#define PCI_DEV_TAG(_pcidev) (_pcidev) 9354569438Smrg 9454569438Smrg/* PCI_DEV macros, typically used in printf's, add domain ? XXX */ 9554569438Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 9654569438Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->dev) 9754569438Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 9854569438Smrg 9954569438Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 10054569438Smrg#define PCI_CFG_TAG(_pcidev) (_pcidev) 10154569438Smrg 10254569438Smrg/* PCI_CFG macros, typically used in DRI init, contain the domain */ 10354569438Smrg#define PCI_CFG_BUS(_pcidev) (((_pcidev)->domain << 8) | \ 10454569438Smrg (_pcidev)->bus) 10554569438Smrg#define PCI_CFG_DEV(_pcidev) ((_pcidev)->dev) 10654569438Smrg#define PCI_CFG_FUNC(_pcidev) ((_pcidev)->func) 10754569438Smrg 10854569438Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr) 10954569438Smrg#define PCI_REGION_SIZE(_pcidev, _b) ((_pcidev)->regions[(_b)].size) 11054569438Smrg 11154569438Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 11254569438Smrg pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset)) 11354569438Smrg 11454569438Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 11554569438Smrg pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset)) 11654569438Smrg 11754569438Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 11854569438Smrg pci_device_cfg_write_u32((_pcidev), (_value), (_offset)) 11954569438Smrg 12054569438Smrg#endif /* XSERVER_LIBPCIACCESS */ 12154569438Smrg 12254569438Smrg#endif /* NEOPCIRENAME_H */ 123