1fda9279dSmrg#ifndef __NV50_TEXTURE_H__ 2fda9279dSmrg#define __NV50_TEXTURE_H__ 3fda9279dSmrg 4fda9279dSmrg/* It'd be really nice to have these in nouveau_class.h generated by 5fda9279dSmrg * renouveau like the rest of the object header - but not sure it can 6fda9279dSmrg * handle non-object stuff nicely - need to look into it. 7fda9279dSmrg */ 8fda9279dSmrg 9fda9279dSmrg/* Texture image control block */ 10fda9279dSmrg#define NV50TIC_0_0_MAPA_MASK 0x38000000 11fda9279dSmrg#define NV50TIC_0_0_MAPA_ZERO 0x00000000 12fda9279dSmrg#define NV50TIC_0_0_MAPA_C0 0x10000000 13fda9279dSmrg#define NV50TIC_0_0_MAPA_C1 0x18000000 14fda9279dSmrg#define NV50TIC_0_0_MAPA_C2 0x20000000 15fda9279dSmrg#define NV50TIC_0_0_MAPA_C3 0x28000000 16fda9279dSmrg#define NV50TIC_0_0_MAPA_ONE 0x38000000 17fda9279dSmrg#define NV50TIC_0_0_MAPB_MASK 0x07000000 18fda9279dSmrg#define NV50TIC_0_0_MAPB_ZERO 0x00000000 19fda9279dSmrg#define NV50TIC_0_0_MAPB_C0 0x02000000 20fda9279dSmrg#define NV50TIC_0_0_MAPB_C1 0x03000000 21fda9279dSmrg#define NV50TIC_0_0_MAPB_C2 0x04000000 22fda9279dSmrg#define NV50TIC_0_0_MAPB_C3 0x05000000 23fda9279dSmrg#define NV50TIC_0_0_MAPB_ONE 0x07000000 24fda9279dSmrg#define NV50TIC_0_0_MAPG_MASK 0x00e00000 25fda9279dSmrg#define NV50TIC_0_0_MAPG_ZERO 0x00000000 26fda9279dSmrg#define NV50TIC_0_0_MAPG_C0 0x00400000 27fda9279dSmrg#define NV50TIC_0_0_MAPG_C1 0x00600000 28fda9279dSmrg#define NV50TIC_0_0_MAPG_C2 0x00800000 29fda9279dSmrg#define NV50TIC_0_0_MAPG_C3 0x00a00000 30fda9279dSmrg#define NV50TIC_0_0_MAPG_ONE 0x00e00000 31fda9279dSmrg#define NV50TIC_0_0_MAPR_MASK 0x001c0000 32fda9279dSmrg#define NV50TIC_0_0_MAPR_ZERO 0x00000000 33fda9279dSmrg#define NV50TIC_0_0_MAPR_C0 0x00080000 34fda9279dSmrg#define NV50TIC_0_0_MAPR_C1 0x000c0000 35fda9279dSmrg#define NV50TIC_0_0_MAPR_C2 0x00100000 36fda9279dSmrg#define NV50TIC_0_0_MAPR_C3 0x00140000 37fda9279dSmrg#define NV50TIC_0_0_MAPR_ONE 0x001c0000 38fda9279dSmrg#define NV50TIC_0_0_TYPEA_MASK 0x00038000 39fda9279dSmrg#define NV50TIC_0_0_TYPEA_UNORM 0x00010000 40fda9279dSmrg#define NV50TIC_0_0_TYPEA_SNORM 0x00008000 41fda9279dSmrg#define NV50TIC_0_0_TYPEA_SINT 0x00018000 42fda9279dSmrg#define NV50TIC_0_0_TYPEA_UINT 0x00020000 43fda9279dSmrg#define NV50TIC_0_0_TYPEA_FLOAT 0x00038000 44fda9279dSmrg#define NV50TIC_0_0_TYPEB_MASK 0x00007000 45fda9279dSmrg#define NV50TIC_0_0_TYPEB_UNORM 0x00002000 46fda9279dSmrg#define NV50TIC_0_0_TYPEB_SNORM 0x00001000 47fda9279dSmrg#define NV50TIC_0_0_TYPEB_SINT 0x00003000 48fda9279dSmrg#define NV50TIC_0_0_TYPEB_UINT 0x00004000 49fda9279dSmrg#define NV50TIC_0_0_TYPEB_FLOAT 0x00007000 50fda9279dSmrg#define NV50TIC_0_0_TYPEG_MASK 0x00000e00 51fda9279dSmrg#define NV50TIC_0_0_TYPEG_UNORM 0x00000400 52fda9279dSmrg#define NV50TIC_0_0_TYPEG_SNORM 0x00000200 53fda9279dSmrg#define NV50TIC_0_0_TYPEG_SINT 0x00000600 54fda9279dSmrg#define NV50TIC_0_0_TYPEG_UINT 0x00000800 55fda9279dSmrg#define NV50TIC_0_0_TYPEG_FLOAT 0x00000e00 56fda9279dSmrg#define NV50TIC_0_0_TYPER_MASK 0x000001c0 57fda9279dSmrg#define NV50TIC_0_0_TYPER_UNORM 0x00000080 58fda9279dSmrg#define NV50TIC_0_0_TYPER_SNORM 0x00000040 59fda9279dSmrg#define NV50TIC_0_0_TYPER_SINT 0x000000c0 60fda9279dSmrg#define NV50TIC_0_0_TYPER_UINT 0x00000100 61fda9279dSmrg#define NV50TIC_0_0_TYPER_FLOAT 0x000001c0 62fda9279dSmrg#define NV50TIC_0_0_FMT_MASK 0x0000003f 63fda9279dSmrg#define NV50TIC_0_0_FMT_32_32_32_32 0x00000001 64fda9279dSmrg#define NV50TIC_0_0_FMT_16_16_16_16 0x00000003 65fda9279dSmrg#define NV50TIC_0_0_FMT_32_32 0x00000004 66fda9279dSmrg#define NV50TIC_0_0_FMT_8_8_8_8 0x00000008 67fda9279dSmrg#define NV50TIC_0_0_FMT_2_10_10_10 0x00000009 68fda9279dSmrg#define NV50TIC_0_0_FMT_16_16 0x0000000c 69fda9279dSmrg#define NV50TIC_0_0_FMT_32 0x0000000f 70fda9279dSmrg#define NV50TIC_0_0_FMT_4_4_4_4 0x00000012 71fda9279dSmrg/* #define NV50TIC_0_0_FMT_1_5_5_5 0x00000013 */ 72fda9279dSmrg#define NV50TIC_0_0_FMT_1_5_5_5 0x00000014 73fda9279dSmrg#define NV50TIC_0_0_FMT_5_6_5 0x00000015 74fda9279dSmrg#define NV50TIC_0_0_FMT_8_8 0x00000018 75fda9279dSmrg#define NV50TIC_0_0_FMT_16 0x0000001b 76fda9279dSmrg#define NV50TIC_0_0_FMT_8 0x0000001d 77fda9279dSmrg#define NV50TIC_0_0_FMT_5_9_9_9 0x00000020 78fda9279dSmrg#define NV50TIC_0_0_FMT_10_11_11 0x00000021 79fda9279dSmrg#define NV50TIC_0_0_FMT_DXT1 0x00000024 80fda9279dSmrg#define NV50TIC_0_0_FMT_DXT3 0x00000025 81fda9279dSmrg#define NV50TIC_0_0_FMT_DXT5 0x00000026 82fda9279dSmrg#define NV50TIC_0_0_FMT_RGTC1 0x00000027 83fda9279dSmrg#define NV50TIC_0_0_FMT_RGTC2 0x00000028 84fda9279dSmrg#define NV50TIC_0_0_FMT_24_8 0x00000029 85fda9279dSmrg#define NV50TIC_0_0_FMT_8_24 0x0000002a 86fda9279dSmrg#define NV50TIC_0_0_FMT_32_DEPTH 0x0000002f 87fda9279dSmrg#define NV50TIC_0_0_FMT_32_8 0x00000030 88fda9279dSmrg 89fda9279dSmrg#define NV50TIC_0_1_OFFSET_LOW_MASK 0xffffffff 90fda9279dSmrg#define NV50TIC_0_1_OFFSET_LOW_SHIFT 0 91fda9279dSmrg 92fda9279dSmrg#define NV50TIC_0_2_UNKNOWN_MASK 0xffffffff 93fda9279dSmrg 94fda9279dSmrg#define NV50TIC_0_3_UNKNOWN_MASK 0xffffffff 95fda9279dSmrg 96fda9279dSmrg#define NV50TIC_0_4_WIDTH_MASK 0x0000ffff 97fda9279dSmrg#define NV50TIC_0_4_WIDTH_SHIFT 0 98fda9279dSmrg 99fda9279dSmrg#define NV50TIC_0_5_DEPTH_MASK 0xffff0000 100fda9279dSmrg#define NV50TIC_0_5_DEPTH_SHIFT 16 101fda9279dSmrg#define NV50TIC_0_5_HEIGHT_MASK 0x0000ffff 102fda9279dSmrg#define NV50TIC_0_5_HEIGHT_SHIFT 0 103fda9279dSmrg 104fda9279dSmrg#define NV50TIC_0_6_UNKNOWN_MASK 0xffffffff 105fda9279dSmrg 106fda9279dSmrg#define NV50TIC_0_7_OFFSET_HIGH_MASK 0xffffffff 107fda9279dSmrg#define NV50TIC_0_7_OFFSET_HIGH_SHIFT 0 108fda9279dSmrg 109fda9279dSmrg/* Texture sampler control block */ 110fda9279dSmrg#define NV50TSC_1_0_WRAPS_MASK 0x00000007 111fda9279dSmrg#define NV50TSC_1_0_WRAPS_REPEAT 0x00000000 112fda9279dSmrg#define NV50TSC_1_0_WRAPS_MIRROR_REPEAT 0x00000001 113fda9279dSmrg#define NV50TSC_1_0_WRAPS_CLAMP_TO_EDGE 0x00000002 114fda9279dSmrg#define NV50TSC_1_0_WRAPS_CLAMP_TO_BORDER 0x00000003 115fda9279dSmrg#define NV50TSC_1_0_WRAPS_CLAMP 0x00000004 116fda9279dSmrg#define NV50TSC_1_0_WRAPS_MIRROR_CLAMP_TO_EDGE 0x00000005 117fda9279dSmrg#define NV50TSC_1_0_WRAPS_MIRROR_CLAMP_TO_BORDER 0x00000006 118fda9279dSmrg#define NV50TSC_1_0_WRAPS_MIRROR_CLAMP 0x00000007 119fda9279dSmrg#define NV50TSC_1_0_WRAPT_MASK 0x00000038 120fda9279dSmrg#define NV50TSC_1_0_WRAPT_REPEAT 0x00000000 121fda9279dSmrg#define NV50TSC_1_0_WRAPT_MIRROR_REPEAT 0x00000008 122fda9279dSmrg#define NV50TSC_1_0_WRAPT_CLAMP_TO_EDGE 0x00000010 123fda9279dSmrg#define NV50TSC_1_0_WRAPT_CLAMP_TO_BORDER 0x00000018 124fda9279dSmrg#define NV50TSC_1_0_WRAPT_CLAMP 0x00000020 125fda9279dSmrg#define NV50TSC_1_0_WRAPT_MIRROR_CLAMP_TO_EDGE 0x00000028 126fda9279dSmrg#define NV50TSC_1_0_WRAPT_MIRROR_CLAMP_TO_BORDER 0x00000030 127fda9279dSmrg#define NV50TSC_1_0_WRAPT_MIRROR_CLAMP 0x00000038 128fda9279dSmrg#define NV50TSC_1_0_WRAPR_MASK 0x000001c0 129fda9279dSmrg#define NV50TSC_1_0_WRAPR_REPEAT 0x00000000 130fda9279dSmrg#define NV50TSC_1_0_WRAPR_MIRROR_REPEAT 0x00000040 131fda9279dSmrg#define NV50TSC_1_0_WRAPR_CLAMP_TO_EDGE 0x00000080 132fda9279dSmrg#define NV50TSC_1_0_WRAPR_CLAMP_TO_BORDER 0x000000c0 133fda9279dSmrg#define NV50TSC_1_0_WRAPR_CLAMP 0x00000100 134fda9279dSmrg#define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_EDGE 0x00000140 135fda9279dSmrg#define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_BORDER 0x00000180 136fda9279dSmrg#define NV50TSC_1_0_WRAPR_MIRROR_CLAMP 0x000001c0 137fda9279dSmrg#define NV50TSC_1_0_MAX_ANISOTROPY_MASK 0x00700000 138fda9279dSmrg 139fda9279dSmrg#define NV50TSC_1_1_MAGF_MASK 0x00000003 140fda9279dSmrg#define NV50TSC_1_1_MAGF_NEAREST 0x00000001 141fda9279dSmrg#define NV50TSC_1_1_MAGF_LINEAR 0x00000002 142fda9279dSmrg#define NV50TSC_1_1_MINF_MASK 0x00000030 143fda9279dSmrg#define NV50TSC_1_1_MINF_NEAREST 0x00000010 144fda9279dSmrg#define NV50TSC_1_1_MINF_LINEAR 0x00000020 145fda9279dSmrg#define NV50TSC_1_1_MIPF_MASK 0x000000c0 146fda9279dSmrg#define NV50TSC_1_1_MIPF_NONE 0x00000040 147fda9279dSmrg#define NV50TSC_1_1_MIPF_NEAREST 0x00000080 148fda9279dSmrg#define NV50TSC_1_1_MIPF_LINEAR 0x000000c0 149fda9279dSmrg#define NV50TSC_1_1_LOD_BIAS_MASK 0x01fff000 150fda9279dSmrg#define NV50TSC_1_1_UNKN_ANISO_15 0x10000000 151fda9279dSmrg#define NV50TSC_1_1_UNKN_ANISO_35 0x18000000 152fda9279dSmrg 153fda9279dSmrg#define NV50TSC_1_2_MIN_LOD_MASK 0x00000f00 154fda9279dSmrg#define NV50TSC_1_2_MAX_LOD_MASK 0x00f00000 155fda9279dSmrg 156fda9279dSmrg#define NV50TSC_1_3_UNKNOWN_MASK 0xffffffff 157fda9279dSmrg 158fda9279dSmrg#define NV50TSC_1_4_BORDER_COLOR_RED_MASK 0xffffffff 159fda9279dSmrg 160fda9279dSmrg#define NV50TSC_1_5_BORDER_COLOR_GREEN_MASK 0xffffffff 161fda9279dSmrg 162fda9279dSmrg#define NV50TSC_1_6_BORDER_COLOR_BLUE_MASK 0xffffffff 163fda9279dSmrg 164fda9279dSmrg#define NV50TSC_1_7_BORDER_COLOR_ALPHA_MASK 0xffffffff 165fda9279dSmrg 166fda9279dSmrg#endif 167