1#ifndef __NV04_ACCEL_H__
2#define __NV04_ACCEL_H__
3
4#include "hwdefs/nv_object.xml.h"
5#include "hwdefs/nv01_2d.xml.h"
6
7#define XV_TABLE_SIZE 512
8
9/* scratch buffer offsets */
10#define PFP_PASS          0x00000000
11#define PFP_S             0x00000100
12#define PFP_C             0x00000200
13#define PFP_CCA           0x00000300
14#define PFP_CCASA         0x00000400
15#define PFP_S_A8          0x00000500
16#define PFP_C_A8          0x00000600
17#define PFP_NV12_BILINEAR 0x00000700
18#define PFP_NV12_BICUBIC  0x00000800
19#define XV_TABLE          0x00001000
20#define SOLID(i)         (0x00002000 + (i) * 0x100)
21
22/* subchannel assignments */
23#define SUBC_M2MF(mthd)  0, (mthd)
24#define NV03_M2MF(mthd)  SUBC_M2MF(NV03_M2MF_##mthd)
25#define SUBC_NVSW(mthd)  1, (mthd)
26#define SUBC_SF2D(mthd)  2, (mthd)
27#define NV04_SF2D(mthd)  SUBC_SF2D(NV04_SURFACE_2D_##mthd)
28#define NV10_SF2D(mthd)  SUBC_SF2D(NV10_SURFACE_2D_##mthd)
29#define SUBC_RECT(mthd)  3, (mthd)
30#define NV04_RECT(mthd)  SUBC_RECT(NV04_GDI_##mthd)
31#define SUBC_BLIT(mthd)  4, (mthd)
32#define NV01_BLIT(mthd)  SUBC_BLIT(NV01_BLIT_##mthd)
33#define NV04_BLIT(mthd)  SUBC_BLIT(NV04_BLIT_##mthd)
34#define NV15_BLIT(mthd)  SUBC_BLIT(NV15_BLIT_##mthd)
35#define SUBC_IFC(mthd)   5, (mthd)
36#define NV01_IFC(mthd)   SUBC_IFC(NV01_IFC_##mthd)
37#define NV04_IFC(mthd)   SUBC_IFC(NV04_IFC_##mthd)
38#define SUBC_MISC(mthd)  6, (mthd)
39#define NV03_SIFM(mthd)  SUBC_MISC(NV03_SIFM_##mthd)
40#define NV05_SIFM(mthd)  SUBC_MISC(NV05_SIFM_##mthd)
41#define NV01_BETA(mthd)  SUBC_MISC(NV01_BETA_##mthd)
42#define NV04_BETA4(mthd) SUBC_MISC(NV04_BETA4_##mthd)
43#define NV01_PATT(mthd)  SUBC_MISC(NV01_PATTERN_##mthd)
44#define NV04_PATT(mthd)  SUBC_MISC(NV04_PATTERN_##mthd)
45#define NV01_ROP(mthd)   SUBC_MISC(NV01_ROP_##mthd)
46#define NV01_CLIP(mthd)  SUBC_MISC(NV01_CLIP_##mthd)
47#define SUBC_3D(mthd)    7, (mthd)
48#define NV10_3D(mthd)    SUBC_3D(NV10_3D_##mthd)
49#define NV30_3D(mthd)    SUBC_3D(NV30_3D_##mthd)
50#define NV40_3D(mthd)    SUBC_3D(NV40_3D_##mthd)
51
52static __inline__ void
53PUSH_DATAu(struct nouveau_pushbuf *push, struct nouveau_bo *bo,
54	   unsigned delta, unsigned dwords)
55{
56	const uint32_t domain = NOUVEAU_BO_VRAM | NOUVEAU_BO_WR;
57	struct nouveau_pushbuf_refn refs[] = { { bo, domain } };
58	unsigned pitch = ((dwords * 4) + 63) & ~63;
59
60	if (nouveau_pushbuf_space(push, 32 + dwords, 2, 0) ||
61	    nouveau_pushbuf_refn (push, refs, 1))
62		return;
63
64	BEGIN_NV04(push, NV01_SUBC(MISC, OBJECT), 1);
65	PUSH_DATA (push, NvClipRectangle);
66	BEGIN_NV04(push, NV01_CLIP(POINT), 2);
67	PUSH_DATA (push, (0 << 16) | 0);
68	PUSH_DATA (push, (1 << 16) | dwords);
69	BEGIN_NV04(push, NV04_SF2D(FORMAT), 4);
70	PUSH_DATA (push, NV04_SURFACE_2D_FORMAT_A8R8G8B8);
71	PUSH_DATA (push, (pitch << 16) | pitch);
72	PUSH_RELOC(push, bo, delta, NOUVEAU_BO_LOW, 0, 0);
73	PUSH_RELOC(push, bo, delta, NOUVEAU_BO_LOW, 0, 0);
74	BEGIN_NV04(push, NV01_IFC(OPERATION), 5);
75	PUSH_DATA (push, NV01_IFC_OPERATION_SRCCOPY);
76	PUSH_DATA (push, NV01_IFC_COLOR_FORMAT_A8R8G8B8);
77	PUSH_DATA (push, (0 << 16) | 0);
78	PUSH_DATA (push, (1 << 16) | dwords);
79	PUSH_DATA (push, (1 << 16) | dwords);
80	BEGIN_NV04(push, NV01_IFC(COLOR(0)), dwords);
81}
82
83/* For NV40 FP upload, deal with the weird-arse big-endian swap */
84static __inline__ void
85PUSH_DATAs(struct nouveau_pushbuf *push, unsigned data)
86{
87#if (X_BYTE_ORDER != X_LITTLE_ENDIAN)
88	data = (data >> 16) | ((data & 0xffff) << 16);
89#endif
90	PUSH_DATA(push, data);
91}
92
93#endif
94