171d7fec4Smrg/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/durango.c,v 1.1 2002/12/10 15:12:25 alanh Exp $ */ 271d7fec4Smrg/* 371d7fec4Smrg * $Workfile: durango.c $ 471d7fec4Smrg * 571d7fec4Smrg * This is the main file used to add Durango graphics support to a software 671d7fec4Smrg * project. The main reason to have a single file include the other files 771d7fec4Smrg * is that it centralizes the location of the compiler options. This file 871d7fec4Smrg * should be tuned for a specific implementation, and then modified as needed 971d7fec4Smrg * for new Durango releases. The releases.txt file indicates any updates to 1071d7fec4Smrg * this main file, such as a new definition for a new hardware platform. 1171d7fec4Smrg * 1271d7fec4Smrg * In other words, this file should be copied from the Durango source files 1371d7fec4Smrg * once when a software project starts, and then maintained as necessary. 1471d7fec4Smrg * It should not be recopied with new versions of Durango unless the 1571d7fec4Smrg * developer is willing to tune the file again for the specific project. 1671d7fec4Smrg * 1771d7fec4Smrg * NSC_LIC_ALTERNATIVE_PREAMBLE 1871d7fec4Smrg * 1971d7fec4Smrg * Revision 1.0 2071d7fec4Smrg * 2171d7fec4Smrg * National Semiconductor Alternative GPL-BSD License 2271d7fec4Smrg * 2371d7fec4Smrg * National Semiconductor Corporation licenses this software 2471d7fec4Smrg * ("Software"): 2571d7fec4Smrg * 2671d7fec4Smrg * Durango 2771d7fec4Smrg * 2871d7fec4Smrg * under one of the two following licenses, depending on how the 2971d7fec4Smrg * Software is received by the Licensee. 3071d7fec4Smrg * 3171d7fec4Smrg * If this Software is received as part of the Linux Framebuffer or 3271d7fec4Smrg * other GPL licensed software, then the GPL license designated 3371d7fec4Smrg * NSC_LIC_GPL applies to this Software; in all other circumstances 3471d7fec4Smrg * then the BSD-style license designated NSC_LIC_BSD shall apply. 3571d7fec4Smrg * 3671d7fec4Smrg * END_NSC_LIC_ALTERNATIVE_PREAMBLE */ 3771d7fec4Smrg 3871d7fec4Smrg/* NSC_LIC_BSD 3971d7fec4Smrg * 4071d7fec4Smrg * National Semiconductor Corporation Open Source License for Durango 4171d7fec4Smrg * 4271d7fec4Smrg * (BSD License with Export Notice) 4371d7fec4Smrg * 4471d7fec4Smrg * Copyright (c) 1999-2001 4571d7fec4Smrg * National Semiconductor Corporation. 4671d7fec4Smrg * All rights reserved. 4771d7fec4Smrg * 4871d7fec4Smrg * Redistribution and use in source and binary forms, with or without 4971d7fec4Smrg * modification, are permitted provided that the following conditions 5071d7fec4Smrg * are met: 5171d7fec4Smrg * 5271d7fec4Smrg * * Redistributions of source code must retain the above copyright 5371d7fec4Smrg * notice, this list of conditions and the following disclaimer. 5471d7fec4Smrg * 5571d7fec4Smrg * * Redistributions in binary form must reproduce the above 5671d7fec4Smrg * copyright notice, this list of conditions and the following 5771d7fec4Smrg * disclaimer in the documentation and/or other materials provided 5871d7fec4Smrg * with the distribution. 5971d7fec4Smrg * 6071d7fec4Smrg * * Neither the name of the National Semiconductor Corporation nor 6171d7fec4Smrg * the names of its contributors may be used to endorse or promote 6271d7fec4Smrg * products derived from this software without specific prior 6371d7fec4Smrg * written permission. 6471d7fec4Smrg * 6571d7fec4Smrg * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 6671d7fec4Smrg * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 6771d7fec4Smrg * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 6871d7fec4Smrg * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 6971d7fec4Smrg * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 7071d7fec4Smrg * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 7171d7fec4Smrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 7271d7fec4Smrg * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 7371d7fec4Smrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 7471d7fec4Smrg * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 7571d7fec4Smrg * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 7671d7fec4Smrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 7771d7fec4Smrg * OF SUCH DAMAGE. 7871d7fec4Smrg * 7971d7fec4Smrg * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 8071d7fec4Smrg * YOUR JURISDICTION. It is licensee's responsibility to comply with 8171d7fec4Smrg * any export regulations applicable in licensee's jurisdiction. Under 8271d7fec4Smrg * CURRENT (2001) U.S. export regulations this software 8371d7fec4Smrg * is eligible for export from the U.S. and can be downloaded by or 8471d7fec4Smrg * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 8571d7fec4Smrg * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 8671d7fec4Smrg * Syria, Sudan, Afghanistan and any other country to which the U.S. 8771d7fec4Smrg * has embargoed goods and services. 8871d7fec4Smrg * 8971d7fec4Smrg * END_NSC_LIC_BSD */ 9071d7fec4Smrg 9171d7fec4Smrg/* NSC_LIC_GPL 9271d7fec4Smrg * 9371d7fec4Smrg * National Semiconductor Corporation Gnu General Public License for Durango 9471d7fec4Smrg * 9571d7fec4Smrg * (GPL License with Export Notice) 9671d7fec4Smrg * 9771d7fec4Smrg * Copyright (c) 1999-2001 9871d7fec4Smrg * National Semiconductor Corporation. 9971d7fec4Smrg * All rights reserved. 10071d7fec4Smrg * 10171d7fec4Smrg * Redistribution and use in source and binary forms, with or without 10271d7fec4Smrg * modification, are permitted under the terms of the GNU General 10371d7fec4Smrg * Public License as published by the Free Software Foundation; either 10471d7fec4Smrg * version 2 of the License, or (at your option) any later version 10571d7fec4Smrg * 10671d7fec4Smrg * In addition to the terms of the GNU General Public License, neither 10771d7fec4Smrg * the name of the National Semiconductor Corporation nor the names of 10871d7fec4Smrg * its contributors may be used to endorse or promote products derived 10971d7fec4Smrg * from this software without specific prior written permission. 11071d7fec4Smrg * 11171d7fec4Smrg * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 11271d7fec4Smrg * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 11371d7fec4Smrg * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 11471d7fec4Smrg * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 11571d7fec4Smrg * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 11671d7fec4Smrg * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 11771d7fec4Smrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 11871d7fec4Smrg * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 11971d7fec4Smrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 12071d7fec4Smrg * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 12171d7fec4Smrg * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 12271d7fec4Smrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 12371d7fec4Smrg * OF SUCH DAMAGE. See the GNU General Public License for more details. 12471d7fec4Smrg * 12571d7fec4Smrg * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 12671d7fec4Smrg * YOUR JURISDICTION. It is licensee's responsibility to comply with 12771d7fec4Smrg * any export regulations applicable in licensee's jurisdiction. Under 12871d7fec4Smrg * CURRENT (2001) U.S. export regulations this software 12971d7fec4Smrg * is eligible for export from the U.S. and can be downloaded by or 13071d7fec4Smrg * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 13171d7fec4Smrg * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 13271d7fec4Smrg * Syria, Sudan, Afghanistan and any other country to which the U.S. 13371d7fec4Smrg * has embargoed goods and services. 13471d7fec4Smrg * 13571d7fec4Smrg * You should have received a copy of the GNU General Public License 13671d7fec4Smrg * along with this file; if not, write to the Free Software Foundation, 13771d7fec4Smrg * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 13871d7fec4Smrg * 13971d7fec4Smrg * END_NSC_LIC_GPL */ 14071d7fec4Smrg 14171d7fec4Smrg/* COMPILER OPTIONS 14271d7fec4Smrg * These compiler options specify how the Durango routines are compiled 14371d7fec4Smrg * for the different hardware platforms. For best performance, a driver 14471d7fec4Smrg * would build for a specific platform. The "dynamic" switches are set 14571d7fec4Smrg * by diagnostic applications such as Darwin that will run on a variety 14671d7fec4Smrg * of platforms and use the appropriate code at runtime. Each component 14771d7fec4Smrg * may be separately dynamic, so that a driver has the option of being 14871d7fec4Smrg * tuned for a specific 2D accelerator, but will still run with a variety 14971d7fec4Smrg * of chipsets. 15071d7fec4Smrg */ 15171d7fec4Smrg 15271d7fec4Smrg#define GFX_DISPLAY_DYNAMIC 1 /* runtime selection */ 15371d7fec4Smrg#define GFX_DISPLAY_GU1 1 /* 1st generation display controller */ 15471d7fec4Smrg#define GFX_DISPLAY_GU2 1 /* 2nd generation display controller */ 15571d7fec4Smrg 15671d7fec4Smrg#define GFX_INIT_DYNAMIC 1 /* runtime selection */ 15771d7fec4Smrg#define GFX_INIT_GU1 1 /* Geode family */ 15871d7fec4Smrg#define GFX_INIT_GU2 1 /* Redcloud */ 15971d7fec4Smrg 16071d7fec4Smrg#define GFX_MSR_DYNAMIC 1 /* runtime selection */ 16171d7fec4Smrg#define GFX_MSR_REDCLOUD 1 /* Redcloud */ 16271d7fec4Smrg 16371d7fec4Smrg#define GFX_2DACCEL_DYNAMIC 1 /* runtime selection */ 16471d7fec4Smrg#define GFX_2DACCEL_GU1 1 /* 1st generation 2D accelerator */ 16571d7fec4Smrg#define GFX_2DACCEL_GU2 1 /* 2nd generation 2D accelerator */ 16671d7fec4Smrg 16771d7fec4Smrg#define GFX_VIDEO_DYNAMIC 1 /* runtime selection */ 16871d7fec4Smrg#define GFX_VIDEO_CS5530 1 /* support for CS5530 */ 16971d7fec4Smrg#define GFX_VIDEO_SC1200 1 /* support for SC1200 */ 17071d7fec4Smrg#define GFX_VIDEO_REDCLOUD 1 /* support for Redcloud */ 17171d7fec4Smrg 17271d7fec4Smrg#define GFX_VIP_DYNAMIC 1 /* runtime selection */ 17371d7fec4Smrg#define GFX_VIP_SC1200 1 /* support for SC1200 */ 17471d7fec4Smrg 17571d7fec4Smrg#define GFX_DECODER_DYNAMIC 1 /* runtime selection */ 17671d7fec4Smrg#define GFX_DECODER_SAA7114 1 /* Philips SAA7114 decoder */ 17771d7fec4Smrg 17871d7fec4Smrg#define GFX_TV_DYNAMIC 1 /* runtime selection */ 17971d7fec4Smrg#define GFX_TV_FS451 1 /* Focus Enhancements FS450 */ 18071d7fec4Smrg#define GFX_TV_SC1200 1 /* SC1200 integrated TV encoder */ 18171d7fec4Smrg 18271d7fec4Smrg#define GFX_I2C_DYNAMIC 1 /* runtime selection */ 18371d7fec4Smrg#define GFX_I2C_ACCESS 1 /* support for ACCESS.BUS */ 18471d7fec4Smrg#define GFX_I2C_GPIO 1 /* support for CS5530 GPIOs */ 18571d7fec4Smrg 18671d7fec4Smrg#define GFX_VGA_DYNAMIC 1 /* runtime selection */ 18771d7fec4Smrg#define GFX_VGA_GU1 1 /* 1st generation graphics unit */ 18871d7fec4Smrg 18971d7fec4Smrg#define FB4MB 1 /* Set to use 4Mb video ram for Pyramid */ 19071d7fec4Smrg 19171d7fec4Smrg#define GFX_NO_IO_IN_WAIT_MACROS 0 /* Set to remove I/O accesses in GP bit testing */ 19271d7fec4Smrg 19371d7fec4Smrg/* ROUTINES TO READ VALUES 19471d7fec4Smrg * These are routines used by Darwin or other diagnostics to read the 19571d7fec4Smrg * current state of the hardware. Display drivers or embedded applications can 19671d7fec4Smrg * reduce the size of the Durango code by not including these routines. 19771d7fec4Smrg */ 19871d7fec4Smrg#define GFX_READ_ROUTINES 1 /* add routines to read values */ 19971d7fec4Smrg 20071d7fec4Smrg/* VARIABLES USED FOR RUNTIME SELECTION 20171d7fec4Smrg * If part of the graphics subsystem is declared as dynamic, then the 20271d7fec4Smrg * following variables are used to specify which platform has been detected. 20371d7fec4Smrg * The variables are set in the "gfx_detect_cpu" routine. The values should 20471d7fec4Smrg * be bit flags to allow masks to be used to check for multiple platforms. 20571d7fec4Smrg */ 20671d7fec4Smrg 20771d7fec4Smrg#if GFX_DISPLAY_DYNAMIC 20871d7fec4Smrgint gfx_display_type = 0; 20971d7fec4Smrg#endif 21071d7fec4Smrg 21171d7fec4Smrg#if GFX_INIT_DYNAMIC 21271d7fec4Smrgint gfx_init_type = 0; 21371d7fec4Smrg#endif 21471d7fec4Smrg 21571d7fec4Smrg#if GFX_MSR_DYNAMIC 21671d7fec4Smrgint gfx_msr_type = 0; 21771d7fec4Smrg#endif 21871d7fec4Smrg 21971d7fec4Smrg#if GFX_2DACCEL_DYNAMIC 22071d7fec4Smrgint gfx_2daccel_type = 0; 22171d7fec4Smrg#endif 22271d7fec4Smrg 22371d7fec4Smrg#if GFX_VIDEO_DYNAMIC 22471d7fec4Smrgint gfx_video_type = 0; 22571d7fec4Smrg#endif 22671d7fec4Smrg 22771d7fec4Smrg#if GFX_VIP_DYNAMIC 22871d7fec4Smrgint gfx_vip_type = 0; 22971d7fec4Smrg#endif 23071d7fec4Smrg 23171d7fec4Smrg#if GFX_DECODER_DYNAMIC 23271d7fec4Smrgint gfx_decoder_type = 0; 23371d7fec4Smrg#endif 23471d7fec4Smrg 23571d7fec4Smrg#if GFX_TV_DYNAMIC 23671d7fec4Smrgint gfx_tv_type = 0; 23771d7fec4Smrg#endif 23871d7fec4Smrg 23971d7fec4Smrg#if GFX_I2C_DYNAMIC 24071d7fec4Smrgint gfx_i2c_type = 0; 24171d7fec4Smrg#endif 24271d7fec4Smrg 24371d7fec4Smrg#if GFX_VGA_DYNAMIC 24471d7fec4Smrgint gfx_vga_type = 0; 24571d7fec4Smrg#endif 24671d7fec4Smrg 24771d7fec4Smrg/* HEADER FILE FOR DURANGO ROUTINE DEFINITIONS 24871d7fec4Smrg * Needed since some of the Durango routines call other Durango routines. 24971d7fec4Smrg * Also defines the size of chipset array (GFX_CSPTR_SIZE). 25071d7fec4Smrg */ 25171d7fec4Smrg#include "gfx_rtns.h" /* routine definitions */ 25271d7fec4Smrg 25371d7fec4Smrg/* DEFINE POINTERS TO MEMORY MAPPED REGIONS 25471d7fec4Smrg * These pointers are used by the Durango routines to access the hardware. 25571d7fec4Smrg * The variables must be set by the project's initialization code after 25671d7fec4Smrg * mapping the regions in the appropriate manner. 25771d7fec4Smrg */ 25871d7fec4Smrg 25971d7fec4Smrg/* DEFINE VIRTUAL ADDRESSES */ 26071d7fec4Smrg/* Note: These addresses define the starting base expected by all */ 26171d7fec4Smrg/* Durango offsets. Under an OS that requires these pointers */ 26271d7fec4Smrg/* to be mapped to linear addresses (i.e Windows), it may not */ 26371d7fec4Smrg/* be possible to keep these base offsets. In these cases, */ 26471d7fec4Smrg/* the addresses are modified to point to the beginning of the */ 26571d7fec4Smrg/* relevant memory region and the access macros are adjusted */ 26671d7fec4Smrg/* to subtract the offset from the default base. For example, */ 26771d7fec4Smrg/* the register pointer could be moved to be 0x40008000, while */ 26871d7fec4Smrg/* the WRITE_REG* macros are modified to subtract 0x8000 from */ 26971d7fec4Smrg/* the offset. */ 27071d7fec4Smrg 27171d7fec4Smrgunsigned char *gfx_virt_regptr = (unsigned char *)0x40000000; 27271d7fec4Smrgunsigned char *gfx_virt_fbptr = (unsigned char *)0x40800000; 27371d7fec4Smrgunsigned char *gfx_virt_vidptr = (unsigned char *)0x40010000; 27471d7fec4Smrgunsigned char *gfx_virt_vipptr = (unsigned char *)0x40015000; 27571d7fec4Smrgunsigned char *gfx_virt_spptr = (unsigned char *)0x40000000; 27671d7fec4Smrgunsigned char *gfx_virt_gpptr = (unsigned char *)0x40000000; 27771d7fec4Smrg 27871d7fec4Smrg/* DEFINE PHYSICAL ADDRESSES */ 27971d7fec4Smrg 28071d7fec4Smrgunsigned char *gfx_phys_regptr = (unsigned char *)0x40000000; 28171d7fec4Smrgunsigned char *gfx_phys_fbptr = (unsigned char *)0x40800000; 28271d7fec4Smrgunsigned char *gfx_phys_vidptr = (unsigned char *)0x40010000; 28371d7fec4Smrgunsigned char *gfx_phys_vipptr = (unsigned char *)0x40015000; 28471d7fec4Smrg 28571d7fec4Smrg/* HEADER FILE FOR GRAPHICS REGISTER DEFINITIONS 28671d7fec4Smrg * This contains only constant definitions, so it should be able to be 28771d7fec4Smrg * included in any software project as is. 28871d7fec4Smrg */ 28971d7fec4Smrg#include "gfx_regs.h" /* graphics register definitions */ 29071d7fec4Smrg 29171d7fec4Smrg/* HEADER FILE FOR REGISTER ACCESS MACROS 29271d7fec4Smrg * This file contains the definitions of the WRITE_REG32 and similar macros 29371d7fec4Smrg * used by the Durango routines to access the hardware. The file assumes 29471d7fec4Smrg * that the environment can handle 32-bit pointer access. If this is not 29571d7fec4Smrg * the case, or if there are special requirements, then this header file 29671d7fec4Smrg * should not be included and the project must define the macros itself. 29771d7fec4Smrg * (A project may define WRITE_REG32 to call a routine, for example). 29871d7fec4Smrg */ 29971d7fec4Smrg#include "gfx_defs.h" /* register access macros */ 30071d7fec4Smrg 30171d7fec4Smrg/* IO MACROS AND ROUTINES 30271d7fec4Smrg * These macros must be defined before the initialization or I2C 30371d7fec4Smrg * routines will work properly. 30471d7fec4Smrg */ 30571d7fec4Smrg 30671d7fec4Smrg#if defined(OS_WIN32) /* For Windows */ 30771d7fec4Smrg 30871d7fec4Smrg/* VSA II CALL */ 30971d7fec4Smrg 31071d7fec4Smrgvoid 31171d7fec4Smrggfx_msr_asm_read(unsigned short msrReg, unsigned long msrAddr, 31271d7fec4Smrg unsigned long *ptrHigh, unsigned long *ptrLow) 31371d7fec4Smrg{ 31471d7fec4Smrg unsigned long temp1, temp2; 31571d7fec4Smrg 31671d7fec4Smrg _asm { 31771d7fec4Smrg mov dx, 0x0AC1C 31871d7fec4Smrg mov eax, 0x0FC530007 31971d7fec4Smrg out dx, eax 32071d7fec4Smrg add dl, 2 32171d7fec4Smrg mov ecx, msrAddr 32271d7fec4Smrg mov cx, msrReg 32371d7fec4Smrg in ax, dx; 32471d7fec4Smrg ;EDX:EAX will contain MSR contents. 32571d7fec4Smrg mov temp1, edx 32671d7fec4Smrg mov temp2, eax 32771d7fec4Smrg } 32871d7fec4Smrg 32971d7fec4Smrg *ptrHigh = temp1; 33071d7fec4Smrg *ptrLow = temp2; 33171d7fec4Smrg} 33271d7fec4Smrg 33371d7fec4Smrgvoid 33471d7fec4Smrggfx_msr_asm_write(unsigned short msrReg, unsigned long msrAddr, 33571d7fec4Smrg unsigned long *ptrHigh, unsigned long *ptrLow) 33671d7fec4Smrg{ 33771d7fec4Smrg unsigned long temp1 = *ptrHigh; 33871d7fec4Smrg unsigned long temp2 = *ptrLow; 33971d7fec4Smrg 34071d7fec4Smrg _asm { 34171d7fec4Smrg mov dx, 0x0AC1C 34271d7fec4Smrg mov eax, 0x0FC530007 34371d7fec4Smrg out dx, eax i 34471d7fec4Smrg add dl, 2 34571d7fec4Smrg ;ECX contains msrAddr | msrReg 34671d7fec4Smrg mov ecx, msrAddr 34771d7fec4Smrg mov cx, msrReg 34871d7fec4Smrg ;<OR_mask_hi > 34971d7fec4Smrg mov ebx, temp1 35071d7fec4Smrg 35171d7fec4Smrg ;<OR_mask_hi > 35271d7fec4Smrg mov eax, temp2 35371d7fec4Smrg ;<AND_mask_hi > 35471d7fec4Smrg mov esi, 0 35571d7fec4Smrg ;<AND_mask_lo > 35671d7fec4Smrg mov edi, 0 35771d7fec4Smrg ;MSR is written at this point 35871d7fec4Smrg out dx, ax 35971d7fec4Smrg } 36071d7fec4Smrg} 36171d7fec4Smrg 36271d7fec4Smrgunsigned char 36371d7fec4Smrggfx_inb(unsigned short port) 36471d7fec4Smrg{ 36571d7fec4Smrg unsigned char data; 36671d7fec4Smrg 36771d7fec4Smrg _asm { 36871d7fec4Smrg pushf 36971d7fec4Smrg mov dx, port 37071d7fec4Smrg in al, dx 37171d7fec4Smrg mov data, al 37271d7fec4Smrg popf 37371d7fec4Smrg } 37471d7fec4Smrg return (data); 37571d7fec4Smrg} 37671d7fec4Smrg 37771d7fec4Smrgunsigned short 37871d7fec4Smrggfx_inw(unsigned short port) 37971d7fec4Smrg{ 38071d7fec4Smrg unsigned short data; 38171d7fec4Smrg 38271d7fec4Smrg _asm { 38371d7fec4Smrg pushf 38471d7fec4Smrg mov dx, port 38571d7fec4Smrg in ax, dx 38671d7fec4Smrg mov data, ax 38771d7fec4Smrg popf 38871d7fec4Smrg } 38971d7fec4Smrg return (data); 39071d7fec4Smrg} 39171d7fec4Smrg 39271d7fec4Smrgunsigned long 39371d7fec4Smrggfx_ind(unsigned short port) 39471d7fec4Smrg{ 39571d7fec4Smrg unsigned long data; 39671d7fec4Smrg 39771d7fec4Smrg _asm { 39871d7fec4Smrg pushf 39971d7fec4Smrg mov dx, port 40071d7fec4Smrg in eax, dx 40171d7fec4Smrg mov data, eax 40271d7fec4Smrg popf 40371d7fec4Smrg } 40471d7fec4Smrg return (data); 40571d7fec4Smrg} 40671d7fec4Smrg 40771d7fec4Smrgvoid 40871d7fec4Smrggfx_outb(unsigned short port, unsigned char data) 40971d7fec4Smrg{ 41071d7fec4Smrg _asm { 41171d7fec4Smrg pushf 41271d7fec4Smrg mov al, data 41371d7fec4Smrg mov dx, port 41471d7fec4Smrg out dx, al 41571d7fec4Smrg popf 41671d7fec4Smrg } 41771d7fec4Smrg} 41871d7fec4Smrg 41971d7fec4Smrgvoid 42071d7fec4Smrggfx_outw(unsigned short port, unsigned short data) 42171d7fec4Smrg{ 42271d7fec4Smrg _asm { 42371d7fec4Smrg pushf 42471d7fec4Smrg mov ax, data 42571d7fec4Smrg mov dx, port 42671d7fec4Smrg out dx, ax 42771d7fec4Smrg popf 42871d7fec4Smrg } 42971d7fec4Smrg} 43071d7fec4Smrg 43171d7fec4Smrgvoid 43271d7fec4Smrggfx_outd(unsigned short port, unsigned long data) 43371d7fec4Smrg{ 43471d7fec4Smrg _asm { 43571d7fec4Smrg pushf 43671d7fec4Smrg mov eax, data 43771d7fec4Smrg mov dx, port 43871d7fec4Smrg out dx, eax 43971d7fec4Smrg popf 44071d7fec4Smrg } 44171d7fec4Smrg} 44271d7fec4Smrg 44371d7fec4Smrg 44471d7fec4Smrg#elif defined(OS_VXWORKS) || defined (OS_LINUX) /* VxWorks and Linux */ 44571d7fec4Smrg 44671d7fec4Smrg#if defined(OS_LINUX) 44771d7fec4Smrg#include "asm/msr.h" 44871d7fec4Smrg#endif 44971d7fec4Smrg 45071d7fec4Smrgvoid 45171d7fec4Smrggfx_msr_asm_read(unsigned short msrReg, unsigned long msrAddr, 45271d7fec4Smrg unsigned long *ptrHigh, unsigned long *ptrLow) 45371d7fec4Smrg{ 45471d7fec4Smrg unsigned long addr, val1, val2; 45571d7fec4Smrg 45671d7fec4Smrg addr = msrAddr | (unsigned long)msrReg; 45771d7fec4Smrg rdmsr(addr, val1, val2); 45871d7fec4Smrg 45971d7fec4Smrg *ptrHigh = val2; 46071d7fec4Smrg *ptrLow = val1; 46171d7fec4Smrg} 46271d7fec4Smrg 46371d7fec4Smrgvoid 46471d7fec4Smrggfx_msr_asm_write(unsigned short msrReg, unsigned long msrAddr, 46571d7fec4Smrg unsigned long *ptrHigh, unsigned long *ptrLow) 46671d7fec4Smrg{ 46771d7fec4Smrg unsigned long addr, val1, val2; 46871d7fec4Smrg 46971d7fec4Smrg val2 = *ptrHigh; 47071d7fec4Smrg val1 = *ptrLow; 47171d7fec4Smrg 47271d7fec4Smrg addr = (msrAddr & 0xFFFF0000) | (unsigned long)msrReg; 47371d7fec4Smrg wrmsr(addr, val1, val2); 47471d7fec4Smrg} 47571d7fec4Smrg 47671d7fec4Smrgunsigned char 47771d7fec4Smrggfx_inb(unsigned short port) 47871d7fec4Smrg{ 47971d7fec4Smrg unsigned char value; 48071d7fec4Smrg __asm__ volatile ("inb %1,%0":"=a" (value):"d"(port)); 48171d7fec4Smrg 48271d7fec4Smrg return value; 48371d7fec4Smrg} 48471d7fec4Smrg 48571d7fec4Smrgunsigned short 48671d7fec4Smrggfx_inw(unsigned short port) 48771d7fec4Smrg{ 48871d7fec4Smrg unsigned short value; 48971d7fec4Smrg __asm__ volatile ("in %1,%0":"=a" (value):"d"(port)); 49071d7fec4Smrg 49171d7fec4Smrg return value; 49271d7fec4Smrg} 49371d7fec4Smrg 49471d7fec4Smrgunsigned long 49571d7fec4Smrggfx_ind(unsigned short port) 49671d7fec4Smrg{ 49771d7fec4Smrg unsigned long value; 49871d7fec4Smrg __asm__ volatile ("inl %1,%0":"=a" (value):"d"(port)); 49971d7fec4Smrg 50071d7fec4Smrg return value; 50171d7fec4Smrg} 50271d7fec4Smrg 50371d7fec4Smrgvoid 50471d7fec4Smrggfx_outb(unsigned short port, unsigned char data) 50571d7fec4Smrg{ 50671d7fec4Smrg __asm__ volatile ("outb %0,%1"::"a" (data), "d"(port)); 50771d7fec4Smrg} 50871d7fec4Smrg 50971d7fec4Smrgvoid 51071d7fec4Smrggfx_outw(unsigned short port, unsigned short data) 51171d7fec4Smrg{ 51271d7fec4Smrg __asm__ volatile ("out %0,%1"::"a" (data), "d"(port)); 51371d7fec4Smrg} 51471d7fec4Smrg 51571d7fec4Smrgvoid 51671d7fec4Smrggfx_outd(unsigned short port, unsigned long data) 51771d7fec4Smrg{ 51871d7fec4Smrg __asm__ volatile ("outl %0,%1"::"a" (data), "d"(port)); 51971d7fec4Smrg} 52071d7fec4Smrg 52171d7fec4Smrg#else /* else nothing */ 52271d7fec4Smrg 52371d7fec4Smrgunsigned char 52471d7fec4Smrggfx_inb(unsigned short port) 52571d7fec4Smrg{ 52671d7fec4Smrg /* ADD OS SPECIFIC IMPLEMENTATION */ 52771d7fec4Smrg return (0); 52871d7fec4Smrg} 52971d7fec4Smrg 53071d7fec4Smrgunsigned short 53171d7fec4Smrggfx_inw(unsigned short port) 53271d7fec4Smrg{ 53371d7fec4Smrg /* ADD OS SPECIFIC IMPLEMENTATION */ 53471d7fec4Smrg return (0); 53571d7fec4Smrg} 53671d7fec4Smrg 53771d7fec4Smrgunsigned long 53871d7fec4Smrggfx_ind(unsigned short port) 53971d7fec4Smrg{ 54071d7fec4Smrg /* ADD OS SPECIFIC IMPLEMENTATION */ 54171d7fec4Smrg return (0); 54271d7fec4Smrg} 54371d7fec4Smrg 54471d7fec4Smrgvoid 54571d7fec4Smrggfx_outb(unsigned short port, unsigned char data) 54671d7fec4Smrg{ 54771d7fec4Smrg /* ADD OS SPECIFIC IMPLEMENTATION */ 54871d7fec4Smrg} 54971d7fec4Smrg 55071d7fec4Smrgvoid 55171d7fec4Smrggfx_outw(unsigned short port, unsigned short data) 55271d7fec4Smrg{ 55371d7fec4Smrg /* ADD OS SPECIFIC IMPLEMENTATION */ 55471d7fec4Smrg} 55571d7fec4Smrg 55671d7fec4Smrgvoid 55771d7fec4Smrggfx_outd(unsigned short port, unsigned long data) 55871d7fec4Smrg{ 55971d7fec4Smrg /* ADD OS SPECIFIC IMPLEMENTATION */ 56071d7fec4Smrg} 56171d7fec4Smrg#endif 56271d7fec4Smrg 56371d7fec4Smrg#define INB(port) gfx_inb(port) 56471d7fec4Smrg#define INW(port) gfx_inw(port) 56571d7fec4Smrg#define IND(port) gfx_ind(port) 56671d7fec4Smrg#define OUTB(port, data) gfx_outb(port, data) 56771d7fec4Smrg#define OUTW(port, data) gfx_outw(port, data) 56871d7fec4Smrg#define OUTD(port, data) gfx_outd(port, data) 56971d7fec4Smrg 57071d7fec4Smrg/* INITIALIZATION ROUTINES 57171d7fec4Smrg * These routines are used during the initialization of the driver to 57271d7fec4Smrg * perform such tasks as detecting the type of CPU and video hardware. 57371d7fec4Smrg * The routines require the use of IO, so the above IO routines need 57471d7fec4Smrg * to be implemented before the initialization routines will work 57571d7fec4Smrg * properly. 57671d7fec4Smrg */ 57771d7fec4Smrg 57871d7fec4Smrg#include "gfx_init.c" 57971d7fec4Smrg 58071d7fec4Smrg/* INCLUDE MSR ACCESS ROUTINES */ 58171d7fec4Smrg 58271d7fec4Smrg#include "gfx_msr.c" 58371d7fec4Smrg 58471d7fec4Smrg/* INCLUDE GRAPHICS ENGINE ROUTINES 58571d7fec4Smrg * These routines are used to program the 2D graphics accelerator. If 58671d7fec4Smrg * the project does not use graphics acceleration (direct frame buffer 58771d7fec4Smrg * access only), then this file does not need to be included. 58871d7fec4Smrg */ 58971d7fec4Smrg#include "gfx_rndr.c" /* graphics engine routines */ 59071d7fec4Smrg 59171d7fec4Smrg/* INCLUDE DISPLAY CONTROLLER ROUTINES 59271d7fec4Smrg * These routines are used if the display mode is set directly. If the 59371d7fec4Smrg * project uses VGA registers to set a display mode, then these files 59471d7fec4Smrg * do not need to be included. 59571d7fec4Smrg */ 59671d7fec4Smrg#include "gfx_mode.h" /* display mode tables */ 59771d7fec4Smrg#include "gfx_disp.c" /* display controller routines */ 59871d7fec4Smrg 59971d7fec4Smrg/* INCLUDE VIDEO OVERLAY ROUTINES 60071d7fec4Smrg * These routines control the video overlay hardware. 60171d7fec4Smrg */ 60271d7fec4Smrg#include "gfx_vid.c" /* video overlay routines */ 60371d7fec4Smrg 60471d7fec4Smrg/* VIDEO PORT AND VIDEO DECODER ROUTINES 60571d7fec4Smrg * These routines rely on the I2C routines. 60671d7fec4Smrg */ 60771d7fec4Smrg#include "gfx_vip.c" /* video port routines */ 60871d7fec4Smrg#include "gfx_dcdr.c" /* video decoder routines */ 60971d7fec4Smrg 61071d7fec4Smrg/* I2C BUS ACCESS ROUTINES 61171d7fec4Smrg * These routines are used by the video decoder and possibly an 61271d7fec4Smrg * external TV encoer. 61371d7fec4Smrg */ 61471d7fec4Smrg#include "gfx_i2c.c" /* I2C bus access routines */ 61571d7fec4Smrg 61671d7fec4Smrg/* TV ENCODER ROUTINES 61771d7fec4Smrg * This file does not need to be included if the system does not 61871d7fec4Smrg * support TV output. 61971d7fec4Smrg */ 62071d7fec4Smrg#include "gfx_tv.c" /* TV encoder routines */ 62171d7fec4Smrg 62271d7fec4Smrg/* VGA ROUTINES 62371d7fec4Smrg * This file is used if setting display modes using VGA registers. 62471d7fec4Smrg */ 62571d7fec4Smrg#include "gfx_vga.c" /* VGA routines */ 62671d7fec4Smrg 62771d7fec4Smrg/* END OF FILE */ 628