171d7fec4Smrg/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/cen9211.c,v 1.1 2002/12/10 15:12:28 alanh Exp $ */ 271d7fec4Smrg/* 371d7fec4Smrg * $Workfile: cen9211.c $ 471d7fec4Smrg * 571d7fec4Smrg * File Contents: This file contains panel functions to interface with 671d7fec4Smrg * the centaraus platform. 771d7fec4Smrg * 871d7fec4Smrg * SubModule: Geode FlatPanel library 971d7fec4Smrg * 1071d7fec4Smrg */ 1171d7fec4Smrg 1271d7fec4Smrg/* 1371d7fec4Smrg * NSC_LIC_ALTERNATIVE_PREAMBLE 1471d7fec4Smrg * 1571d7fec4Smrg * Revision 1.0 1671d7fec4Smrg * 1771d7fec4Smrg * National Semiconductor Alternative GPL-BSD License 1871d7fec4Smrg * 1971d7fec4Smrg * National Semiconductor Corporation licenses this software 2071d7fec4Smrg * ("Software"): 2171d7fec4Smrg * 2271d7fec4Smrg * Geode graphics driver for panel support 2371d7fec4Smrg * under one of the two following licenses, depending on how the 2471d7fec4Smrg * Software is received by the Licensee. 2571d7fec4Smrg * 2671d7fec4Smrg * If this Software is received as part of the Linux Framebuffer or 2771d7fec4Smrg * other GPL licensed software, then the GPL license designated 2871d7fec4Smrg * NSC_LIC_GPL applies to this Software; in all other circumstances 2971d7fec4Smrg * then the BSD-style license designated NSC_LIC_BSD shall apply. 3071d7fec4Smrg * 3171d7fec4Smrg * END_NSC_LIC_ALTERNATIVE_PREAMBLE */ 3271d7fec4Smrg 3371d7fec4Smrg/* NSC_LIC_BSD 3471d7fec4Smrg * 3571d7fec4Smrg * National Semiconductor Corporation Open Source License for Durango 3671d7fec4Smrg * 3771d7fec4Smrg * (BSD License with Export Notice) 3871d7fec4Smrg * 3971d7fec4Smrg * Copyright (c) 1999-2001 4071d7fec4Smrg * National Semiconductor Corporation. 4171d7fec4Smrg * All rights reserved. 4271d7fec4Smrg * 4371d7fec4Smrg * Redistribution and use in source and binary forms, with or without 4471d7fec4Smrg * modification, are permitted provided that the following conditions 4571d7fec4Smrg * are met: 4671d7fec4Smrg * 4771d7fec4Smrg * * Redistributions of source code must retain the above copyright 4871d7fec4Smrg * notice, this list of conditions and the following disclaimer. 4971d7fec4Smrg * 5071d7fec4Smrg * * Redistributions in binary form must reproduce the above 5171d7fec4Smrg * copyright notice, this list of conditions and the following 5271d7fec4Smrg * disclaimer in the documentation and/or other materials provided 5371d7fec4Smrg * with the distribution. 5471d7fec4Smrg * 5571d7fec4Smrg * * Neither the name of the National Semiconductor Corporation nor 5671d7fec4Smrg * the names of its contributors may be used to endorse or promote 5771d7fec4Smrg * products derived from this software without specific prior 5871d7fec4Smrg * written permission. 5971d7fec4Smrg * 6071d7fec4Smrg * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 6171d7fec4Smrg * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 6271d7fec4Smrg * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 6371d7fec4Smrg * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 6471d7fec4Smrg * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 6571d7fec4Smrg * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 6671d7fec4Smrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 6771d7fec4Smrg * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 6871d7fec4Smrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 6971d7fec4Smrg * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 7071d7fec4Smrg * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 7171d7fec4Smrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 7271d7fec4Smrg * OF SUCH DAMAGE. 7371d7fec4Smrg * 7471d7fec4Smrg * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 7571d7fec4Smrg * YOUR JURISDICTION. It is licensee's responsibility to comply with 7671d7fec4Smrg * any export regulations applicable in licensee's jurisdiction. Under 7771d7fec4Smrg * CURRENT (2001) U.S. export regulations this software 7871d7fec4Smrg * is eligible for export from the U.S. and can be downloaded by or 7971d7fec4Smrg * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 8071d7fec4Smrg * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 8171d7fec4Smrg * Syria, Sudan, Afghanistan and any other country to which the U.S. 8271d7fec4Smrg * has embargoed goods and services. 8371d7fec4Smrg * 8471d7fec4Smrg * END_NSC_LIC_BSD */ 8571d7fec4Smrg 8671d7fec4Smrg/* NSC_LIC_GPL 8771d7fec4Smrg * 8871d7fec4Smrg * National Semiconductor Corporation Gnu General Public License for Durango 8971d7fec4Smrg * 9071d7fec4Smrg * (GPL License with Export Notice) 9171d7fec4Smrg * 9271d7fec4Smrg * Copyright (c) 1999-2001 9371d7fec4Smrg * National Semiconductor Corporation. 9471d7fec4Smrg * All rights reserved. 9571d7fec4Smrg * 9671d7fec4Smrg * Redistribution and use in source and binary forms, with or without 9771d7fec4Smrg * modification, are permitted under the terms of the GNU General 9871d7fec4Smrg * Public License as published by the Free Software Foundation; either 9971d7fec4Smrg * version 2 of the License, or (at your option) any later version 10071d7fec4Smrg * 10171d7fec4Smrg * In addition to the terms of the GNU General Public License, neither 10271d7fec4Smrg * the name of the National Semiconductor Corporation nor the names of 10371d7fec4Smrg * its contributors may be used to endorse or promote products derived 10471d7fec4Smrg * from this software without specific prior written permission. 10571d7fec4Smrg * 10671d7fec4Smrg * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 10771d7fec4Smrg * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 10871d7fec4Smrg * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 10971d7fec4Smrg * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 11071d7fec4Smrg * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 11171d7fec4Smrg * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 11271d7fec4Smrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 11371d7fec4Smrg * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 11471d7fec4Smrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 11571d7fec4Smrg * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 11671d7fec4Smrg * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 11771d7fec4Smrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 11871d7fec4Smrg * OF SUCH DAMAGE. See the GNU General Public License for more details. 11971d7fec4Smrg * 12071d7fec4Smrg * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 12171d7fec4Smrg * YOUR JURISDICTION. It is licensee's responsibility to comply with 12271d7fec4Smrg * any export regulations applicable in licensee's jurisdiction. Under 12371d7fec4Smrg * CURRENT (2001) U.S. export regulations this software 12471d7fec4Smrg * is eligible for export from the U.S. and can be downloaded by or 12571d7fec4Smrg * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 12671d7fec4Smrg * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 12771d7fec4Smrg * Syria, Sudan, Afghanistan and any other country to which the U.S. 12871d7fec4Smrg * has embargoed goods and services. 12971d7fec4Smrg * 13071d7fec4Smrg * You should have received a copy of the GNU General Public License 13171d7fec4Smrg * along with this file; if not, write to the Free Software Foundation, 13271d7fec4Smrg * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 13371d7fec4Smrg * 13471d7fec4Smrg * END_NSC_LIC_GPL */ 13571d7fec4Smrg 13671d7fec4Smrg#include "cen9211.h" 13771d7fec4Smrg 13871d7fec4Smrgstatic unsigned char sioc2_orig_val; 13971d7fec4Smrgstatic unsigned char must_restore_97317 = FALSE; 14071d7fec4Smrg 14171d7fec4Smrg/******************************************************************** 14271d7fec4Smrg * 14371d7fec4Smrg * PASS_FAIL init_GPIO(void); 14471d7fec4Smrg * Initializes the GPIO pins in the Cx5530 or the National PC97317 14571d7fec4Smrg * for use with a 9211 on a Marmot or Centaurus board. Uses 14671d7fec4Smrg * the global variables RdPCIVal and sioc2_orig_val. 14771d7fec4Smrg * 14871d7fec4Smrg *********************************************************************/ 14971d7fec4Smrg 15071d7fec4Smrgunsigned char 15171d7fec4Smrginit_Centaurus_GPIO(void) 15271d7fec4Smrg{ 15371d7fec4Smrg unsigned char reg_val; 15471d7fec4Smrg static unsigned char first_time = TRUE; 15571d7fec4Smrg 15671d7fec4Smrg /* The Centaurus board uses ports 1 and 2 of the 97317 for GPIO. 15771d7fec4Smrg * These ports require bank 0 to be active. The first thing we will 15871d7fec4Smrg * do is verify that bank 0 is active and set it if it is not. 15971d7fec4Smrg */ 16071d7fec4Smrg 16171d7fec4Smrg /* set the index for access to the configuration register */ 16271d7fec4Smrg gfx_outb(CENT_CONFIG_INDEX, CENT_SIOC2); 16371d7fec4Smrg reg_val = gfx_inb(CENT_CONFIG_DATA); 16471d7fec4Smrg 16571d7fec4Smrg /* set to bank 0 */ 16671d7fec4Smrg if (reg_val & CENT_GPIO_BANK_SELECT) { 16771d7fec4Smrg gfx_outb(CENT_CONFIG_DATA, 16871d7fec4Smrg (unsigned char)(reg_val & ~CENT_GPIO_BANK_SELECT)); 16971d7fec4Smrg } 17071d7fec4Smrg 17171d7fec4Smrg /* If this is the first time we have modified sioc2, we must 17271d7fec4Smrg * save the current value (set by the BIOS) for restoration by 17371d7fec4Smrg * the calling program, set the global flag must_restore_97317, and set 17471d7fec4Smrg * first_time to FALSE. 17571d7fec4Smrg */ 17671d7fec4Smrg 17771d7fec4Smrg if (first_time == TRUE) { 17871d7fec4Smrg sioc2_orig_val = reg_val; 17971d7fec4Smrg must_restore_97317 = TRUE; 18071d7fec4Smrg first_time = FALSE; 18171d7fec4Smrg } 18271d7fec4Smrg 18371d7fec4Smrg /* set port 1 direction */ 18471d7fec4Smrg reg_val = gfx_inb(CENT_PORT1_DIRECTION); 18571d7fec4Smrg 18671d7fec4Smrg /* make GPIO 14 and 17 outputs */ 18771d7fec4Smrg reg_val |= CENT_97317_CLOCK_MASK | CENT_97317_DATA_OUT_MASK; 18871d7fec4Smrg gfx_outb(CENT_PORT1_DIRECTION, reg_val); 18971d7fec4Smrg 19071d7fec4Smrg /* set port 2 direction */ 19171d7fec4Smrg reg_val = gfx_inb(CENT_PORT2_DIRECTION); 19271d7fec4Smrg 19371d7fec4Smrg /* make GPIO 20 an output */ 19471d7fec4Smrg 19571d7fec4Smrg reg_val |= CENT_97317_CHIP_SEL_MASK; 19671d7fec4Smrg 19771d7fec4Smrg /* make GPIO 21 an input */ 19871d7fec4Smrg 19971d7fec4Smrg reg_val &= ~CENT_97317_DATA_IN_MASK; 20071d7fec4Smrg gfx_outb(CENT_PORT2_DIRECTION, reg_val); 20171d7fec4Smrg 20271d7fec4Smrg /* make GPIO 14 and 17 push-pull */ 20371d7fec4Smrg 20471d7fec4Smrg reg_val = gfx_inb(CENT_PORT1_OUTPUT_TYPE); 20571d7fec4Smrg reg_val |= CENT_97317_CLOCK_MASK | CENT_97317_DATA_OUT_MASK; 20671d7fec4Smrg gfx_outb(CENT_PORT1_OUTPUT_TYPE, reg_val); 20771d7fec4Smrg 20871d7fec4Smrg /* make GPIO 20 and 21 push-pull */ 20971d7fec4Smrg reg_val = gfx_inb(CENT_PORT2_OUTPUT_TYPE); 21071d7fec4Smrg reg_val |= CENT_97317_CHIP_SEL_MASK | CENT_97317_DATA_IN_MASK; 21171d7fec4Smrg gfx_outb(CENT_PORT2_OUTPUT_TYPE, reg_val); 21271d7fec4Smrg return CENT_PASS; 21371d7fec4Smrg 21471d7fec4Smrg} /* end init_GPIO() */ 21571d7fec4Smrg 21671d7fec4Smrg/********************************************************************* 21771d7fec4Smrg * 21871d7fec4Smrg * PASS_FAIL init_9211(void); 21971d7fec4Smrg * Initializes (sets to 0) the clock, chip select, and data pins 22071d7fec4Smrg * of the Cx9211 on a Marmot or Centaurus board. 22171d7fec4Smrg * 22271d7fec4Smrg **********************************************************************/ 22371d7fec4Smrg 22471d7fec4Smrgunsigned char 22571d7fec4Smrginit_Centaurus_9211(void) 22671d7fec4Smrg{ 22771d7fec4Smrg unsigned char ReadData; 22871d7fec4Smrg 22971d7fec4Smrg /* Uses the 97317 for GPIO. 23071d7fec4Smrg * we will use the clock port define for port 1 23171d7fec4Smrg */ 23271d7fec4Smrg ReadData = gfx_inb(CENT_97317_CLOCK_PORT); 23371d7fec4Smrg ReadData &= ~CENT_97317_CLOCK_MASK & ~CENT_97317_DATA_OUT_MASK; 23471d7fec4Smrg gfx_outb(CENT_97317_CLOCK_PORT, ReadData); 23571d7fec4Smrg /* we will use the chip select port define for port 2 */ 23671d7fec4Smrg ReadData = gfx_inb(CENT_97317_CHIP_SELECT); 23771d7fec4Smrg ReadData &= ~CENT_97317_CHIP_SEL_MASK & ~CENT_97317_DATA_IN_MASK; 23871d7fec4Smrg gfx_outb(CENT_97317_CHIP_SELECT, ReadData); 23971d7fec4Smrg return (CENT_PASS); 24071d7fec4Smrg 24171d7fec4Smrg} /*end init_9211() */ 24271d7fec4Smrg 24371d7fec4Smrg/****************************************************************** 24471d7fec4Smrg * 24571d7fec4Smrg * PASS_FAIL restore_97317_SIOC2(void); 24671d7fec4Smrg * Restores the original value to the 97317 SIOC2 register using 24771d7fec4Smrg * the global variable sioc2_orig_val. Returns PASS if the value 24871d7fec4Smrg * was written, FAIL if not. 24971d7fec4Smrg * 25071d7fec4Smrg *******************************************************************/ 25171d7fec4Smrg 25271d7fec4Smrgunsigned char 25371d7fec4Smrgrestore_Centaurus_97317_SIOC2(void) 25471d7fec4Smrg{ 25571d7fec4Smrg /* set the global flag */ 25671d7fec4Smrg if (must_restore_97317 == TRUE) { 25771d7fec4Smrg unsigned char cfg; 25871d7fec4Smrg 25971d7fec4Smrg /* set the index for access to the configuration register */ 26071d7fec4Smrg gfx_outb(CENT_CONFIG_INDEX, CENT_SIOC2); 26171d7fec4Smrg 26271d7fec4Smrg /* restore the value */ 26371d7fec4Smrg gfx_outb(CENT_CONFIG_DATA, sioc2_orig_val); 26471d7fec4Smrg 26571d7fec4Smrg /* now read and verify */ 26671d7fec4Smrg cfg = gfx_inb(CENT_CONFIG_DATA); 26771d7fec4Smrg if (cfg == sioc2_orig_val) 26871d7fec4Smrg return (CENT_PASS); 26971d7fec4Smrg else 27071d7fec4Smrg return (CENT_FAIL); 27171d7fec4Smrg 27271d7fec4Smrg } /* end if() */ 27371d7fec4Smrg return (CENT_FAIL); 27471d7fec4Smrg 27571d7fec4Smrg} /* end restore_97317_SIOC2bank() */ 27671d7fec4Smrg 27771d7fec4Smrg/* ----------------------------------------------------------------------- 27871d7fec4Smrg * 27971d7fec4Smrg * SET_FLAT_PANEL_MODE 28071d7fec4Smrg * 28171d7fec4Smrg * This routine sets the specified flat panel moden parameters in 28271d7fec4Smrg * the 9211. 28371d7fec4Smrg * Returns PASS if successful, FAIL if the mode parameters could 28471d7fec4Smrg * not be set. 28571d7fec4Smrg * 28671d7fec4Smrg *------------------------------------------------------------------------*/ 28771d7fec4Smrg 28871d7fec4Smrgunsigned char 28971d7fec4Smrgset_Centaurus_92xx_mode(Pnl_PanelStat * pstat) 29071d7fec4Smrg{ 29171d7fec4Smrg int mode; 29271d7fec4Smrg 29371d7fec4Smrg /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */ 29471d7fec4Smrg 29571d7fec4Smrg for (mode = 0; mode < NUM_92XX_MODES; mode++) { 29671d7fec4Smrg if ((FPModeParams[mode].xres == pstat->XRes) && 29771d7fec4Smrg (FPModeParams[mode].yres == pstat->YRes) && 29871d7fec4Smrg (FPModeParams[mode].bpp == pstat->Depth) && 29971d7fec4Smrg (FPModeParams[mode].panel_type == pstat->Type) && 30071d7fec4Smrg (FPModeParams[mode].color_type == pstat->MonoColor)) { 30171d7fec4Smrg 30271d7fec4Smrg /* SET THE 92xx FOR THE SELECTED MODE */ 30371d7fec4Smrg set_Centaurus_92xx_mode_params(mode); 30471d7fec4Smrg return (CENT_PASS); 30571d7fec4Smrg } /* end if() */ 30671d7fec4Smrg } /* end for() */ 30771d7fec4Smrg return (CENT_FAIL); 30871d7fec4Smrg 30971d7fec4Smrg} /* end set_Centaurus_92xx_mode() */ 31071d7fec4Smrg 31171d7fec4Smrg/*------------------------------------------------------------------- 31271d7fec4Smrg * 31371d7fec4Smrg * SET_92XX_MODE_PARAMS 31471d7fec4Smrg * This routine sets the 9211 mode parameters. 31571d7fec4Smrg * 31671d7fec4Smrg *-------------------------------------------------------------------*/ 31771d7fec4Smrg 31871d7fec4Smrgvoid 31971d7fec4Smrgset_Centaurus_92xx_mode_params(int mode) 32071d7fec4Smrg{ 32171d7fec4Smrg CS92xx_MODE *pMode = &FPModeParams[mode]; 32271d7fec4Smrg unsigned long off_data = 0; 32371d7fec4Smrg 32471d7fec4Smrg /* Turn the 92xx power off before setting any new parameters. 32571d7fec4Smrg * Since we are going to reset all the power bit positions, we will 32671d7fec4Smrg * force the power register to 0. 32771d7fec4Smrg */ 32871d7fec4Smrg 32971d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data); 33071d7fec4Smrg 33171d7fec4Smrg /* set 9211 registers using the desired panel settings */ 33271d7fec4Smrg 33371d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 33471d7fec4Smrg CS92xx_LCD_PAN_TIMING1, pMode->panel_timing1); 33571d7fec4Smrg 33671d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 33771d7fec4Smrg CS92xx_LCD_PAN_TIMING2, pMode->panel_timing2); 33871d7fec4Smrg 33971d7fec4Smrg if (Pnl_Rev_ID == PNL_9211_C) { 34071d7fec4Smrg 34171d7fec4Smrg /* load the LSFR seeds */ 34271d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 34371d7fec4Smrg CS92xx_LCD_DITH_FR_CNTRL, pMode->rev_C_dither_frc); 34471d7fec4Smrg 34571d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 34671d7fec4Smrg CS92xx_BLUE_LSFR_SEED, pMode->blue_lsfr_seed); 34771d7fec4Smrg 34871d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 34971d7fec4Smrg CS92xx_RED_GREEN_LSFR_SEED, 35071d7fec4Smrg pMode->red_green_lsfr_seed); 35171d7fec4Smrg } else { 35271d7fec4Smrg 35371d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 35471d7fec4Smrg CS92xx_LCD_DITH_FR_CNTRL, pMode->pre_C_dither_frc); 35571d7fec4Smrg 35671d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 35771d7fec4Smrg CS92xx_LCD_BLOCK_SEL1, pMode->block_select1); 35871d7fec4Smrg 35971d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 36071d7fec4Smrg CS92xx_LCD_BLOCK_SEL2, pMode->block_select2); 36171d7fec4Smrg 36271d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 36371d7fec4Smrg CS92xx_LCD_DISPER1, pMode->dispersion1); 36471d7fec4Smrg 36571d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 36671d7fec4Smrg CS92xx_LCD_DISPER2, pMode->dispersion2); 36771d7fec4Smrg 36871d7fec4Smrg CentaurusProgramFRMload(); 36971d7fec4Smrg } 37071d7fec4Smrg 37171d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL, 37271d7fec4Smrg pMode->memory_control); 37371d7fec4Smrg 37471d7fec4Smrg /* Set the power register last. This will turn the panel on at the 9211. */ 37571d7fec4Smrg 37671d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 37771d7fec4Smrg CS92xx_LCD_PWR_MAN, pMode->power_management); 37871d7fec4Smrg 37971d7fec4Smrg} /* end set_Centaurus_92xx_mode_params() */ 38071d7fec4Smrg 38171d7fec4Smrgvoid 38271d7fec4SmrgCentaurus_write_gpio(int width, ULONG address, unsigned long data) 38371d7fec4Smrg{ 38471d7fec4Smrg int num_clock_toggles; 38571d7fec4Smrg int count; 38671d7fec4Smrg unsigned long Addr = address; 38771d7fec4Smrg 38871d7fec4Smrg enable_Centaurus_9211_chip_select(); 38971d7fec4Smrg 39071d7fec4Smrg /* Write 1 Clock period of no valid transfer */ 39171d7fec4Smrg write_Centaurus_CX9211_GPIO(CENT_NO_DATA); 39271d7fec4Smrg 39371d7fec4Smrg /* Write 1 control bit (the data book calls this the control bar write) */ 39471d7fec4Smrg write_Centaurus_CX9211_GPIO(0x1); 39571d7fec4Smrg 39671d7fec4Smrg /* Write the 12-bit address */ 39771d7fec4Smrg for (count = 0; count < 12; count++) { 39871d7fec4Smrg write_Centaurus_CX9211_GPIO((unsigned char)(Addr & 0x01)); 39971d7fec4Smrg /*the 9211 expects data LSB->MSB */ 40071d7fec4Smrg Addr = Addr >> 1; 40171d7fec4Smrg } 40271d7fec4Smrg 40371d7fec4Smrg /* write */ 40471d7fec4Smrg write_Centaurus_CX9211_DWdata(data); 40571d7fec4Smrg 40671d7fec4Smrg /* a write will require four toggles after disabling CS */ 40771d7fec4Smrg num_clock_toggles = CENT_NUM_WRITE_CLOCK_TOGGLES; 40871d7fec4Smrg disable_Centaurus_9211_chip_select(); 40971d7fec4Smrg 41071d7fec4Smrg /* now toggle the clock */ 41171d7fec4Smrg for (count = 0; count < num_clock_toggles; count++) { 41271d7fec4Smrg toggle_Centaurus_9211_clock(); 41371d7fec4Smrg } 41471d7fec4Smrg return; 41571d7fec4Smrg 41671d7fec4Smrg} /* end Centaurus_write_gpio() */ 41771d7fec4Smrg 41871d7fec4Smrgunsigned long 41971d7fec4SmrgCentaurus_read_gpio(int width, unsigned long address) 42071d7fec4Smrg{ 42171d7fec4Smrg int num_clock_toggles; 42271d7fec4Smrg int count; 42371d7fec4Smrg unsigned long Addr = address; 42471d7fec4Smrg unsigned long data; 42571d7fec4Smrg 42671d7fec4Smrg enable_Centaurus_9211_chip_select(); 42771d7fec4Smrg 42871d7fec4Smrg /* Write 1 Clock period of no valid transfer */ 42971d7fec4Smrg write_Centaurus_CX9211_GPIO(CENT_NO_DATA); 43071d7fec4Smrg 43171d7fec4Smrg /* Write 1 control bit (the data book calls this the control bar write) */ 43271d7fec4Smrg write_Centaurus_CX9211_GPIO(0x1); 43371d7fec4Smrg 43471d7fec4Smrg /* Write the 12-bit address */ 43571d7fec4Smrg for (count = 0; count < 12; count++) { 43671d7fec4Smrg write_Centaurus_CX9211_GPIO((unsigned char)(Addr & 0x01)); 43771d7fec4Smrg 43871d7fec4Smrg /*the 9211 expects data LSB->MSB */ 43971d7fec4Smrg Addr = Addr >> 1; 44071d7fec4Smrg } 44171d7fec4Smrg 44271d7fec4Smrg data = read_Centaurus_CX9211_DWdata(); 44371d7fec4Smrg 44471d7fec4Smrg /* a read will require one toggle after disabling CS */ 44571d7fec4Smrg num_clock_toggles = CENT_NUM_READ_CLOCK_TOGGLES; 44671d7fec4Smrg disable_Centaurus_9211_chip_select(); 44771d7fec4Smrg 44871d7fec4Smrg /* now toggle the clock */ 44971d7fec4Smrg for (count = 0; count < num_clock_toggles; count++) { 45071d7fec4Smrg toggle_Centaurus_9211_clock(); 45171d7fec4Smrg } 45271d7fec4Smrg return data; 45371d7fec4Smrg 45471d7fec4Smrg} /* end Centaurus_read_gpio() */ 45571d7fec4Smrg 45671d7fec4Smrg/******************************************************************* 45771d7fec4Smrg * 45871d7fec4Smrg * void enable_Centaurus_9211_chip_select(void); 45971d7fec4Smrg * Enables the chip select of the CX9211 using the National 97317 46071d7fec4Smrg * on a Centaurus board. 46171d7fec4Smrg * 46271d7fec4Smrg *******************************************************************/ 46371d7fec4Smrg 46471d7fec4Smrgvoid 46571d7fec4Smrgenable_Centaurus_9211_chip_select(void) 46671d7fec4Smrg{ 46771d7fec4Smrg unsigned char cs_port_val; 46871d7fec4Smrg 46971d7fec4Smrg /* Set the chip select (GPIO20) high */ 47071d7fec4Smrg cs_port_val = gfx_inb(CENT_97317_CHIP_SELECT); 47171d7fec4Smrg gfx_outb(CENT_97317_CHIP_SELECT, 47271d7fec4Smrg (unsigned char)(cs_port_val | CENT_97317_CHIP_SEL_MASK)); 47371d7fec4Smrg return; 47471d7fec4Smrg 47571d7fec4Smrg} /* end enable_Centaurus_9211_chip_select() */ 47671d7fec4Smrg 47771d7fec4Smrg/******************************************************************** 47871d7fec4Smrg * 47971d7fec4Smrg * void disable_Centaurus_9211_chip_select(void); 48071d7fec4Smrg * Disables the chip select of the CX9211 using the National 97317 48171d7fec4Smrg * on a Centaurus board. 48271d7fec4Smrg * 48371d7fec4Smrg *******************************************************************/ 48471d7fec4Smrg 48571d7fec4Smrgvoid 48671d7fec4Smrgdisable_Centaurus_9211_chip_select(void) 48771d7fec4Smrg{ 48871d7fec4Smrg unsigned char cs_port_val; 48971d7fec4Smrg 49071d7fec4Smrg /* Set the chip select (GPIO20) low */ 49171d7fec4Smrg cs_port_val = gfx_inb(CENT_97317_CHIP_SELECT); 49271d7fec4Smrg gfx_outb(CENT_97317_CHIP_SELECT, 49371d7fec4Smrg (unsigned char)(cs_port_val & ~CENT_97317_CHIP_SEL_MASK)); 49471d7fec4Smrg return; 49571d7fec4Smrg 49671d7fec4Smrg} /* end disable_Centaurus_9211_chip_select() */ 49771d7fec4Smrg 49871d7fec4Smrg/********************************************************************** 49971d7fec4Smrg * 50071d7fec4Smrg * void toggle_Centaurus_9211_clock(void); 50171d7fec4Smrg * Toggles the clock bit of the CX9211 using the National 97317 on a 50271d7fec4Smrg * Centaurus board. Assumes the 9211 clock bit has previously been 50371d7fec4Smrg * initialized to 0 (this way we do not have to waste GPIO cycles 50471d7fec4Smrg * windowing the clock pulse). 50571d7fec4Smrg * 50671d7fec4Smrg **********************************************************************/ 50771d7fec4Smrg 50871d7fec4Smrgvoid 50971d7fec4Smrgtoggle_Centaurus_9211_clock(void) 51071d7fec4Smrg{ 51171d7fec4Smrg unsigned char port_val; 51271d7fec4Smrg 51371d7fec4Smrg /* get the 97317 GPIO port contents for the 9211 clock */ 51471d7fec4Smrg 51571d7fec4Smrg port_val = gfx_inb(CENT_97317_CLOCK_PORT); 51671d7fec4Smrg /* set the clock bit high */ 51771d7fec4Smrg gfx_outb(CENT_97317_CLOCK_PORT, 51871d7fec4Smrg (unsigned char)(port_val | CENT_97317_CLOCK_MASK)); 51971d7fec4Smrg 52071d7fec4Smrg /* set the clock bit low */ 52171d7fec4Smrg gfx_outb(CENT_97317_CLOCK_PORT, 52271d7fec4Smrg (unsigned char)(port_val & ~CENT_97317_CLOCK_MASK)); 52371d7fec4Smrg 52471d7fec4Smrg} /* end toggle_Centaurus_9211_clock() */ 52571d7fec4Smrg 52671d7fec4Smrg/******************************************************************** 52771d7fec4Smrg * 52871d7fec4Smrg * void write_Centaurus_CX9211_GPIO(unsigned char databit); 52971d7fec4Smrg * Writes the value in bit 0 of the value passed in databit to 53071d7fec4Smrg * the 9211 through the GPIO interface of the National 97317 on a 53171d7fec4Smrg * Centaurus board. 53271d7fec4Smrg * NOTE: This function does not set or reset the chip select line! 53371d7fec4Smrg * 53471d7fec4Smrg *******************************************************************/ 53571d7fec4Smrg 53671d7fec4Smrgvoid 53771d7fec4Smrgwrite_Centaurus_CX9211_GPIO(unsigned char databit) 53871d7fec4Smrg{ 53971d7fec4Smrg unsigned char data_port_val; 54071d7fec4Smrg 54171d7fec4Smrg /* Set the data bit for (GPIO17) */ 54271d7fec4Smrg databit <<= 7; 54371d7fec4Smrg 54471d7fec4Smrg /* read the value of the other bits in the 97317 data port */ 54571d7fec4Smrg data_port_val = gfx_inb(CENT_97317_DATA_OUTPORT); 54671d7fec4Smrg 54771d7fec4Smrg /* set the bit accordingly */ 54871d7fec4Smrg data_port_val &= ~CENT_97317_DATA_OUT_MASK; 54971d7fec4Smrg data_port_val |= databit; 55071d7fec4Smrg gfx_outb(CENT_97317_DATA_OUTPORT, data_port_val); 55171d7fec4Smrg 55271d7fec4Smrg /* clock the data */ 55371d7fec4Smrg toggle_Centaurus_9211_clock(); 55471d7fec4Smrg return; 55571d7fec4Smrg 55671d7fec4Smrg} /* end write_Centaurus_CX9211_GPIO() */ 55771d7fec4Smrg 55871d7fec4Smrg/***************************************************************** 55971d7fec4Smrg * 56071d7fec4Smrg * void write_Centaurus_CX9211_DWdata(unsigned long data); 56171d7fec4Smrg * Writes the doubleword value passed in data to the CX9211 56271d7fec4Smrg * using GPIO Pins of the National 97317 on a Centaurus board. 56371d7fec4Smrg * This function assumes the Direction register of the 97317 56471d7fec4Smrg * and the address register of the CX9211 have been previously set. 56571d7fec4Smrg * Uses the global variable count. 56671d7fec4Smrg * NOTE: This function does not set or reset the chip select line! 56771d7fec4Smrg * 56871d7fec4Smrg ******************************************************************/ 56971d7fec4Smrg 57071d7fec4Smrgvoid 57171d7fec4Smrgwrite_Centaurus_CX9211_DWdata(unsigned long data) 57271d7fec4Smrg{ 57371d7fec4Smrg int count; 57471d7fec4Smrg 57571d7fec4Smrg /* Send the read/write command to the 9211 first. */ 57671d7fec4Smrg 57771d7fec4Smrg write_Centaurus_CX9211_GPIO(CENT_WRITE); 57871d7fec4Smrg 57971d7fec4Smrg /* Now write the 32-bit Data */ 58071d7fec4Smrg for (count = 0; count < 32; count++) { 58171d7fec4Smrg write_Centaurus_CX9211_GPIO((unsigned char)(data & 0x01)); 58271d7fec4Smrg 58371d7fec4Smrg /* the 9211 expects the data LSB->MSB */ 58471d7fec4Smrg data >>= 1; 58571d7fec4Smrg } 58671d7fec4Smrg return; 58771d7fec4Smrg 58871d7fec4Smrg} /* end write_Centaurus_CX9211_DWdata() */ 58971d7fec4Smrg 59071d7fec4Smrg/********************************************************************* 59171d7fec4Smrg * 59271d7fec4Smrg * unsigned char read_Centaurus_CX9211_GPIO(void); 59371d7fec4Smrg * Returns the current value of the databit of the 9211 in bit 0 59471d7fec4Smrg * using the GPIO interface of the National 97317 on a Centaurus board. 59571d7fec4Smrg * NOTE: This function does not set or reset the chip select line! 59671d7fec4Smrg * 59771d7fec4Smrg *********************************************************************/ 59871d7fec4Smrg 59971d7fec4Smrgunsigned char 60071d7fec4Smrgread_Centaurus_CX9211_GPIO(void) 60171d7fec4Smrg{ 60271d7fec4Smrg unsigned char data_port_val; 60371d7fec4Smrg 60471d7fec4Smrg toggle_Centaurus_9211_clock(); 60571d7fec4Smrg 60671d7fec4Smrg /* read the data */ 60771d7fec4Smrg data_port_val = gfx_inb(CENT_97317_DATA_INPORT); 60871d7fec4Smrg 60971d7fec4Smrg /* Save the data from (GPIO21) as bit 0 */ 61071d7fec4Smrg data_port_val >>= 1; 61171d7fec4Smrg return (data_port_val & 0x1); 61271d7fec4Smrg 61371d7fec4Smrg} /* end read_Centaurus_CX9211_GPIO() */ 61471d7fec4Smrg 61571d7fec4Smrg/********************************************************************** 61671d7fec4Smrg * 61771d7fec4Smrg * void read_Centaurus_CX9211_DWdata(unsigned long *data); 61871d7fec4Smrg * Reads a doubleword value from the CX9211 using GPIO Pins of 61971d7fec4Smrg * the National 97317 on a Centaurus board. 62071d7fec4Smrg * This function assumes the Direction register of the 97317 and 62171d7fec4Smrg * the address register of the CX9211 have been previously set. 62271d7fec4Smrg * NOTE: This function does not set or reset the chip select line! 62371d7fec4Smrg * 62471d7fec4Smrg ***********************************************************************/ 62571d7fec4Smrg 62671d7fec4Smrgunsigned long 62771d7fec4Smrgread_Centaurus_CX9211_DWdata(void) 62871d7fec4Smrg{ 62971d7fec4Smrg unsigned char ReadData; 63071d7fec4Smrg int count; 63171d7fec4Smrg unsigned long Data; 63271d7fec4Smrg 63371d7fec4Smrg /* Send read/write command word to the 9211 first. */ 63471d7fec4Smrg write_Centaurus_CX9211_GPIO(CENT_READ); 63571d7fec4Smrg 63671d7fec4Smrg /* The data book (revision 0.1) states 8 clock periods of no valid data. 63771d7fec4Smrg * However, the data becomes valid on the eighth clock, making the eighth 63871d7fec4Smrg * clock valid. Since read_Centaurus_GPIO() toggles the clock before 63971d7fec4Smrg * reading, we will only toggle the clock 7 times here. 64071d7fec4Smrg */ 64171d7fec4Smrg for (count = 0; count < 7; count++) /* works */ 64271d7fec4Smrg toggle_Centaurus_9211_clock(); 64371d7fec4Smrg 64471d7fec4Smrg /* Now read the 32-bit Data, bit by bit in a single loop. */ 64571d7fec4Smrg Data = 0; 64671d7fec4Smrg for (count = 0; count < 32; count++) { 64771d7fec4Smrg ReadData = read_Centaurus_CX9211_GPIO(); 64871d7fec4Smrg /* 9211 sends data LSB->MSB */ 64971d7fec4Smrg Data = Data | (((unsigned long)ReadData) << count); 65071d7fec4Smrg } /* end for() */ 65171d7fec4Smrg 65271d7fec4Smrg return Data; 65371d7fec4Smrg 65471d7fec4Smrg} /* end read_Centaurus_CX9211_DWdata() */ 65571d7fec4Smrg 65671d7fec4Smrgvoid 65771d7fec4SmrgCentaurus_Get_9211_Details(unsigned long flags, PPnl_PanelParams pParam) 65871d7fec4Smrg{ 65971d7fec4Smrg unsigned long PanelType; 66071d7fec4Smrg int i; 66171d7fec4Smrg 66271d7fec4Smrg for (i = 0; i < 0x7fff; i++) { 66371d7fec4Smrg } 66471d7fec4Smrg 66571d7fec4Smrg init_Centaurus_GPIO(); 66671d7fec4Smrg 66771d7fec4Smrg for (i = 0; i < 5; i++) 66871d7fec4Smrg toggle_Centaurus_9211_clock(); 66971d7fec4Smrg 67071d7fec4Smrg if (flags & PNL_PANELCHIP) { 67171d7fec4Smrg 67271d7fec4Smrg PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x430); 67371d7fec4Smrg PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x430); 67471d7fec4Smrg if ((PanelType & 0xFFFF0000) == 0x92110000) { 67571d7fec4Smrg 67671d7fec4Smrg /* found 9211 */ 67771d7fec4Smrg /* check the values for revision ID */ 67871d7fec4Smrg if (PanelType >= 0x92110301) 67971d7fec4Smrg pParam->PanelChip = PNL_9211_C; 68071d7fec4Smrg else if ((PanelType >= 0x92110101) && (PanelType < 0x92110301)) 68171d7fec4Smrg pParam->PanelChip = PNL_9211_A; 68271d7fec4Smrg else 68371d7fec4Smrg pParam->PanelChip = PNL_UNKNOWN_CHIP; 68471d7fec4Smrg } else { /* no 9211 present */ 68571d7fec4Smrg pParam->PanelChip = PNL_UNKNOWN_CHIP; 68671d7fec4Smrg } 68771d7fec4Smrg Pnl_Rev_ID = pParam->PanelChip; 68871d7fec4Smrg } 68971d7fec4Smrg /* if end */ 69071d7fec4Smrg if ((pParam->PanelChip != PNL_UNKNOWN_CHIP) && (flags & PNL_PANELSTAT)) { 69171d7fec4Smrg PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x438); 69271d7fec4Smrg PanelType &= 0x00f8f8f8; 69371d7fec4Smrg PanelType |= 0x00070000; 69471d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, 0x438, PanelType); 69571d7fec4Smrg PanelType = 0; 69671d7fec4Smrg PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x434); 69771d7fec4Smrg PanelType = (PanelType >> 8); 69871d7fec4Smrg PanelType &= 0x7; 69971d7fec4Smrg 70071d7fec4Smrg switch (PanelType) { 70171d7fec4Smrg case 0: 70271d7fec4Smrg pParam->PanelStat.XRes = 800; 70371d7fec4Smrg pParam->PanelStat.YRes = 600; 70471d7fec4Smrg pParam->PanelStat.Depth = 18; 70571d7fec4Smrg pParam->PanelStat.MonoColor = PNL_COLOR_PANEL; 70671d7fec4Smrg pParam->PanelStat.Type = PNL_TFT; 70771d7fec4Smrg break; 70871d7fec4Smrg case 1: 70971d7fec4Smrg pParam->PanelStat.XRes = 640; 71071d7fec4Smrg pParam->PanelStat.YRes = 480; 71171d7fec4Smrg pParam->PanelStat.Depth = 8; 71271d7fec4Smrg pParam->PanelStat.MonoColor = PNL_COLOR_PANEL; 71371d7fec4Smrg pParam->PanelStat.Type = PNL_SSTN; 71471d7fec4Smrg break; 71571d7fec4Smrg case 2: 71671d7fec4Smrg pParam->PanelStat.XRes = 1024; 71771d7fec4Smrg pParam->PanelStat.YRes = 768; 71871d7fec4Smrg pParam->PanelStat.Depth = 18; 71971d7fec4Smrg pParam->PanelStat.MonoColor = PNL_COLOR_PANEL; 72071d7fec4Smrg pParam->PanelStat.Type = PNL_TFT; 72171d7fec4Smrg break; 72271d7fec4Smrg case 3: 72371d7fec4Smrg pParam->PanelStat.XRes = 640; 72471d7fec4Smrg pParam->PanelStat.YRes = 480; 72571d7fec4Smrg pParam->PanelStat.Depth = 16; 72671d7fec4Smrg pParam->PanelStat.MonoColor = PNL_COLOR_PANEL; 72771d7fec4Smrg pParam->PanelStat.Type = PNL_DSTN; 72871d7fec4Smrg break; 72971d7fec4Smrg case 4: 73071d7fec4Smrg pParam->PanelStat.XRes = 640; 73171d7fec4Smrg pParam->PanelStat.YRes = 480; 73271d7fec4Smrg pParam->PanelStat.Depth = 18; 73371d7fec4Smrg pParam->PanelStat.MonoColor = PNL_COLOR_PANEL; 73471d7fec4Smrg pParam->PanelStat.Type = PNL_TFT; 73571d7fec4Smrg break; 73671d7fec4Smrg case 5: 73771d7fec4Smrg pParam->PanelStat.XRes = 1024; 73871d7fec4Smrg pParam->PanelStat.YRes = 768; 73971d7fec4Smrg pParam->PanelStat.Depth = 24; 74071d7fec4Smrg pParam->PanelStat.MonoColor = PNL_COLOR_PANEL; 74171d7fec4Smrg pParam->PanelStat.Type = PNL_DSTN; 74271d7fec4Smrg break; 74371d7fec4Smrg case 6: 74471d7fec4Smrg pParam->PanelStat.XRes = 640; 74571d7fec4Smrg pParam->PanelStat.YRes = 480; 74671d7fec4Smrg pParam->PanelStat.Depth = 8; 74771d7fec4Smrg pParam->PanelStat.MonoColor = PNL_MONO_PANEL; 74871d7fec4Smrg pParam->PanelStat.Type = PNL_DSTN; 74971d7fec4Smrg break; 75071d7fec4Smrg case 7: 75171d7fec4Smrg pParam->PanelStat.XRes = 800; 75271d7fec4Smrg pParam->PanelStat.YRes = 600; 75371d7fec4Smrg pParam->PanelStat.Depth = 16; 75471d7fec4Smrg pParam->PanelStat.MonoColor = PNL_COLOR_PANEL; 75571d7fec4Smrg pParam->PanelStat.Type = PNL_DSTN; 75671d7fec4Smrg break; 75771d7fec4Smrg default: 75871d7fec4Smrg break; 75971d7fec4Smrg } 76071d7fec4Smrg } 76171d7fec4Smrg 76271d7fec4Smrg} 76371d7fec4Smrg 76471d7fec4Smrgvoid 76571d7fec4SmrgCentaurusProgramFRMload(void) 76671d7fec4Smrg{ 76771d7fec4Smrg unsigned long CentaurusFRMtable[] = { 76871d7fec4Smrg 0x00000000, 76971d7fec4Smrg 0x00000000, 77071d7fec4Smrg 0x01000100, 77171d7fec4Smrg 0x01000100, 77271d7fec4Smrg 0x01010101, 77371d7fec4Smrg 0x01010101, 77471d7fec4Smrg 0x02081041, 77571d7fec4Smrg 0x02081041, 77671d7fec4Smrg 0x10111111, 77771d7fec4Smrg 0x11111101, 77871d7fec4Smrg 0x49249241, 77971d7fec4Smrg 0x12412492, 78071d7fec4Smrg 0x92244891, 78171d7fec4Smrg 0x92244891, 78271d7fec4Smrg 0x22252525, 78371d7fec4Smrg 0x22252525, 78471d7fec4Smrg 0x528294a5, 78571d7fec4Smrg 0x2528494a, 78671d7fec4Smrg 0x294a5295, 78771d7fec4Smrg 0x294a5295, 78871d7fec4Smrg 0x54a54a95, 78971d7fec4Smrg 0x2952a52a, 79071d7fec4Smrg 0x2a552a55, 79171d7fec4Smrg 0x2a552a55, 79271d7fec4Smrg 0x554aa955, 79371d7fec4Smrg 0x2a9552aa, 79471d7fec4Smrg 0x2aaa5555, 79571d7fec4Smrg 0x2aaa5555, 79671d7fec4Smrg 0x55555555, 79771d7fec4Smrg 0x2aaaaaaa, 79871d7fec4Smrg 0x55555555, 79971d7fec4Smrg 0x55555555, 80071d7fec4Smrg 0xaaaaaaab, 80171d7fec4Smrg 0x55555555, 80271d7fec4Smrg 0x5555aaab, 80371d7fec4Smrg 0x5555aaab, 80471d7fec4Smrg 0xaab556ab, 80571d7fec4Smrg 0x556aad55, 80671d7fec4Smrg 0x55ab55ab, 80771d7fec4Smrg 0x55ab55ab, 80871d7fec4Smrg 0xab5ab56b, 80971d7fec4Smrg 0x56ad5ad5, 81071d7fec4Smrg 0x56b5ad6b, 81171d7fec4Smrg 0x56b5ad6b, 81271d7fec4Smrg 0xad6d6b5b, 81371d7fec4Smrg 0x5ad6b6b6, 81471d7fec4Smrg 0x5b5b5b5b, 81571d7fec4Smrg 0x5b5b5b5b, 81671d7fec4Smrg 0x5F6db6db, 81771d7fec4Smrg 0x5F6db6db, 81871d7fec4Smrg 0xF776F776, 81971d7fec4Smrg 0xF776F776, 82071d7fec4Smrg 0xFBDEFBDE, 82171d7fec4Smrg 0xFBDEFBDE, 82271d7fec4Smrg 0x7eFFBFF7, 82371d7fec4Smrg 0x7eFFBFF7, 82471d7fec4Smrg 0xFF7FF7F7, 82571d7fec4Smrg 0xFF7FF7F7, 82671d7fec4Smrg 0xFF7FFF7F, 82771d7fec4Smrg 0xFF7FFF7F, 82871d7fec4Smrg 0xFFF7FFFF, 82971d7fec4Smrg 0xFFF7FFFF, 83071d7fec4Smrg 0xFFFFFFFF, 83171d7fec4Smrg 0xFFFFFFFF, 83271d7fec4Smrg }; 83371d7fec4Smrg 83471d7fec4Smrg unsigned char i; 83571d7fec4Smrg unsigned short index; 83671d7fec4Smrg unsigned long data; 83771d7fec4Smrg 83871d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_INDEX, 0); 83971d7fec4Smrg index = CS92xx_FRM_MEMORY_DATA; 84071d7fec4Smrg for (i = 0; i < 64; i += 2) { 84171d7fec4Smrg data = CentaurusFRMtable[i]; 84271d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, data); 84371d7fec4Smrg data = CentaurusFRMtable[i + 1]; 84471d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, data); 84571d7fec4Smrg } 84671d7fec4Smrg 84771d7fec4Smrg /* 84871d7fec4Smrg * The first FRM location (64 bits) does not program correctly. 84971d7fec4Smrg * This location always reads back with the last value programmed. 85071d7fec4Smrg * ie. If 32 64-bit values are programmed, location 0 reads 85171d7fec4Smrg * back as the 32nd If 30 locations are programmed, location 0 85271d7fec4Smrg * reads back as the 30th, etc. 85371d7fec4Smrg * Fix this by re-writing location 0 after programming all 64 in 85471d7fec4Smrg * the writeFRM loop in RevCFrmload() in CS9211. 85571d7fec4Smrg */ 85671d7fec4Smrg 85771d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_INDEX, 0); 85871d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, 0); 85971d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, 0); 86071d7fec4Smrg} 86171d7fec4Smrg 86271d7fec4Smrg/******************************************************************** 86371d7fec4Smrg * 86471d7fec4Smrg * void Centaurus_Enable_Power((void); 86571d7fec4Smrg * Enables the power of the CX9211 using the National 97317 on 86671d7fec4Smrg * a Centaurus board. 86771d7fec4Smrg * 86871d7fec4Smrg ********************************************************************/ 86971d7fec4Smrg 87071d7fec4Smrgvoid 87171d7fec4SmrgCentaurus_Power_Up(void) 87271d7fec4Smrg{ 87371d7fec4Smrg unsigned long off_data = 0x01000000; 87471d7fec4Smrg 87571d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data); 87671d7fec4Smrg return; 87771d7fec4Smrg 87871d7fec4Smrg} /* Centaurus_Disable_Power */ 87971d7fec4Smrg 88071d7fec4Smrg/*********************************************************************** 88171d7fec4Smrg * 88271d7fec4Smrg * void Centaurus_Disable_Power((void); 88371d7fec4Smrg * Disables the power of the CX9211 using the National 97317 88471d7fec4Smrg * on a Centaurus board. 88571d7fec4Smrg * 88671d7fec4Smrg **********************************************************************/ 88771d7fec4Smrg 88871d7fec4Smrgvoid 88971d7fec4SmrgCentaurus_Power_Down(void) 89071d7fec4Smrg{ 89171d7fec4Smrg unsigned long off_data = 0; 89271d7fec4Smrg 89371d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data); 89471d7fec4Smrg return; 89571d7fec4Smrg 89671d7fec4Smrg} /* Centaurus_Disable_Power */ 89771d7fec4Smrg 89871d7fec4Smrgvoid 89971d7fec4SmrgCentaurus_9211init(Pnl_PanelStat * pstat) 90071d7fec4Smrg{ 90171d7fec4Smrg init_Centaurus_GPIO(); 90271d7fec4Smrg init_Centaurus_9211(); 90371d7fec4Smrg set_Centaurus_92xx_mode(pstat); 90471d7fec4Smrg restore_Centaurus_97317_SIOC2(); 90571d7fec4Smrg} 90671d7fec4Smrg 90771d7fec4Smrgvoid 90871d7fec4SmrgCentaurus_Save_Panel_State(void) 90971d7fec4Smrg{ 91071d7fec4Smrg /* set 9211 registers using the desired panel settings */ 91171d7fec4Smrg 91271d7fec4Smrg cs9211_regs.panel_timing1 = 91371d7fec4Smrg Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING1); 91471d7fec4Smrg cs9211_regs.panel_timing2 = 91571d7fec4Smrg Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING2); 91671d7fec4Smrg cs9211_regs.dither_frc_ctrl = 91771d7fec4Smrg Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_DITH_FR_CNTRL); 91871d7fec4Smrg cs9211_regs.blue_lsfr_seed = 91971d7fec4Smrg Centaurus_read_gpio(FOUR_BYTES, CS92xx_BLUE_LSFR_SEED); 92071d7fec4Smrg 92171d7fec4Smrg cs9211_regs.red_green_lsfr_seed = 92271d7fec4Smrg Centaurus_read_gpio(FOUR_BYTES, CS92xx_RED_GREEN_LSFR_SEED); 92371d7fec4Smrg /* CentaurusProgramFRMload(); */ 92471d7fec4Smrg 92571d7fec4Smrg cs9211_regs.memory_control = 92671d7fec4Smrg Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL); 92771d7fec4Smrg 92871d7fec4Smrg /* Set the power register last. 92971d7fec4Smrg * This will turn the panel on at the 9211. 93071d7fec4Smrg */ 93171d7fec4Smrg cs9211_regs.power_management = 93271d7fec4Smrg Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN); 93371d7fec4Smrg} 93471d7fec4Smrg 93571d7fec4Smrgvoid 93671d7fec4SmrgCentaurus_Restore_Panel_State(void) 93771d7fec4Smrg{ 93871d7fec4Smrg 93971d7fec4Smrg unsigned long off_data = 0; 94071d7fec4Smrg 94171d7fec4Smrg /* Before restoring the 9211 registers, power off the 9211. */ 94271d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data); 94371d7fec4Smrg 94471d7fec4Smrg /* set 9211 registers using the desired panel settings */ 94571d7fec4Smrg 94671d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING1, 94771d7fec4Smrg cs9211_regs.panel_timing1); 94871d7fec4Smrg 94971d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING2, 95071d7fec4Smrg cs9211_regs.panel_timing2); 95171d7fec4Smrg 95271d7fec4Smrg /* load the LSFR seeds */ 95371d7fec4Smrg 95471d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_DITH_FR_CNTRL, 95571d7fec4Smrg cs9211_regs.dither_frc_ctrl); 95671d7fec4Smrg 95771d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_BLUE_LSFR_SEED, 95871d7fec4Smrg cs9211_regs.blue_lsfr_seed); 95971d7fec4Smrg 96071d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_RED_GREEN_LSFR_SEED, 96171d7fec4Smrg cs9211_regs.red_green_lsfr_seed); 96271d7fec4Smrg 96371d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL, 96471d7fec4Smrg cs9211_regs.memory_control); 96571d7fec4Smrg 96671d7fec4Smrg /* Set the power register last. This will turn the panel on at the 9211. */ 96771d7fec4Smrg 96871d7fec4Smrg Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, 96971d7fec4Smrg cs9211_regs.power_management); 97071d7fec4Smrg 97171d7fec4Smrg} 972