r128_probe.h revision a4470643 
1/*
2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 *                VA Linux Systems Inc., Fremont, California.
4 *
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining
8 * a copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation on the rights to use, copy, modify, merge,
11 * publish, distribute, sublicense, and/or sell copies of the Software,
12 * and to permit persons to whom the Software is furnished to do so,
13 * subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial
17 * portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
22 * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
23 * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
24 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
27 */
28
29/*
30 * Authors:
31 *   Kevin E. Martin <martin@valinux.com>
32 *
33 * Modified by Marc Aurele La France <tsi@xfree86.org> for ATI driver merge.
34 */
35
36#ifndef _R128_PROBE_H_
37#define _R128_PROBE_H_ 1
38
39#include "xorg-server.h"
40#include "xf86str.h"
41#include "xf86DDC.h"
42#include "randrstr.h"
43#include "xf86Crtc.h"
44
45#include "compat-api.h"
46
47#ifdef USE_EXA
48#include "exa.h"
49#endif
50
51/* Chip definitions */
52#define PCI_VENDOR_ATI			0x1002
53#define PCI_CHIP_RAGE128LE		0x4C45
54#define PCI_CHIP_RAGE128LF		0x4C46
55#define PCI_CHIP_RAGE128MF		0x4D46
56#define PCI_CHIP_RAGE128ML		0x4D4C
57#define PCI_CHIP_RAGE128PA		0x5041
58#define PCI_CHIP_RAGE128PB		0x5042
59#define PCI_CHIP_RAGE128PC		0x5043
60#define PCI_CHIP_RAGE128PD		0x5044
61#define PCI_CHIP_RAGE128PE		0x5045
62#define PCI_CHIP_RAGE128PF		0x5046
63#define PCI_CHIP_RAGE128PG		0x5047
64#define PCI_CHIP_RAGE128PH		0x5048
65#define PCI_CHIP_RAGE128PI		0x5049
66#define PCI_CHIP_RAGE128PJ		0x504A
67#define PCI_CHIP_RAGE128PK		0x504B
68#define PCI_CHIP_RAGE128PL		0x504C
69#define PCI_CHIP_RAGE128PM		0x504D
70#define PCI_CHIP_RAGE128PN		0x504E
71#define PCI_CHIP_RAGE128PO		0x504F
72#define PCI_CHIP_RAGE128PP		0x5050
73#define PCI_CHIP_RAGE128PQ		0x5051
74#define PCI_CHIP_RAGE128PR		0x5052
75#define PCI_CHIP_RAGE128PS		0x5053
76#define PCI_CHIP_RAGE128PT		0x5054
77#define PCI_CHIP_RAGE128PU		0x5055
78#define PCI_CHIP_RAGE128PV		0x5056
79#define PCI_CHIP_RAGE128PW		0x5057
80#define PCI_CHIP_RAGE128PX		0x5058
81#define PCI_CHIP_RAGE128RE		0x5245
82#define PCI_CHIP_RAGE128RF		0x5246
83#define PCI_CHIP_RAGE128RG		0x5247
84#define PCI_CHIP_RAGE128RK		0x524B
85#define PCI_CHIP_RAGE128RL		0x524C
86#define PCI_CHIP_RAGE128SE		0x5345
87#define PCI_CHIP_RAGE128SF		0x5346
88#define PCI_CHIP_RAGE128SG		0x5347
89#define PCI_CHIP_RAGE128SH		0x5348
90#define PCI_CHIP_RAGE128SK		0x534B
91#define PCI_CHIP_RAGE128SL		0x534C
92#define PCI_CHIP_RAGE128SM		0x534D
93#define PCI_CHIP_RAGE128SN		0x534E
94#define PCI_CHIP_RAGE128TF		0x5446
95#define PCI_CHIP_RAGE128TL		0x544C
96#define PCI_CHIP_RAGE128TR		0x5452
97#define PCI_CHIP_RAGE128TS		0x5453
98#define PCI_CHIP_RAGE128TT		0x5454
99#define PCI_CHIP_RAGE128TU		0x5455
100
101extern DriverRec R128;
102
103typedef enum
104{
105    MT_UNKNOWN = -1,
106    MT_NONE    = 0,
107    MT_CRT     = 1,
108    MT_LCD     = 2,
109    MT_DFP     = 3,
110    MT_CTV     = 4,
111    MT_STV     = 5
112} R128MonitorType;
113
114typedef enum
115{
116    OUTPUT_NONE,
117    OUTPUT_VGA,
118    OUTPUT_DVI,
119    OUTPUT_LVDS
120} R128OutputType;
121
122typedef struct {
123    uint32_t ddc_reg;
124    uint32_t put_clk_mask;
125    uint32_t put_data_mask;
126    uint32_t get_clk_mask;
127    uint32_t get_data_mask;
128} R128I2CBusRec, *R128I2CBusPtr;
129
130typedef struct _R128CrtcPrivateRec {
131    void *rotate_mem;
132    int crtc_id;
133    uint32_t cursor_offset;
134    /* Lookup table values to be set when the CRTC is enabled */
135    uint8_t lut_r[256], lut_g[256], lut_b[256];
136} R128CrtcPrivateRec, *R128CrtcPrivatePtr;
137
138typedef struct _R128OutputPrivateRec {
139    int num;
140    R128OutputType type;
141    R128MonitorType MonType;
142    I2CBusPtr pI2CBus;
143    R128I2CBusRec ddc_i2c;
144    int PanelXRes;
145    int PanelYRes;
146    int PanelPwrDly;
147} R128OutputPrivateRec, *R128OutputPrivatePtr;
148
149#define R128_MAX_CRTC 2
150#define R128_MAX_BIOS_CONNECTOR 2
151
152typedef struct
153{
154    Bool HasSecondary;
155    Bool HasCRTC2;
156    /*These two registers are used to make sure the CRTC2 is
157      retored before CRTC_EXT, otherwise it could lead to blank screen.*/
158    Bool IsSecondaryRestored;
159    Bool RestorePrimary;
160
161    xf86CrtcPtr pCrtc[R128_MAX_CRTC];
162    R128CrtcPrivatePtr Controller[R128_MAX_CRTC];
163
164    ScrnInfoPtr pSecondaryScrn;
165    ScrnInfoPtr pPrimaryScrn;
166} R128EntRec, *R128EntPtr;
167
168/* r128_probe.c */
169extern SymTabRec             R128Chipsets[];
170
171/* r128_driver.c */
172extern Bool                  R128PreInit(ScrnInfoPtr, int);
173extern Bool                  R128ScreenInit(SCREEN_INIT_ARGS_DECL);
174extern Bool                  R128SwitchMode(SWITCH_MODE_ARGS_DECL);
175extern void                  R128AdjustFrame(ADJUST_FRAME_ARGS_DECL);
176extern Bool                  R128EnterVT(VT_FUNC_ARGS_DECL);
177extern void                  R128LeaveVT(VT_FUNC_ARGS_DECL);
178extern void                  R128FreeScreen(FREE_SCREEN_ARGS_DECL);
179extern ModeStatus            R128ValidMode(SCRN_ARG_TYPE, DisplayModePtr, Bool, int);
180
181extern const OptionInfoRec * R128OptionsWeak(void);
182
183#endif /* _R128_PROBE_H_ */
184