1bdcaa8d0Smrg/* 2bdcaa8d0Smrg * includes 3bdcaa8d0Smrg */ 4bdcaa8d0Smrg 5bdcaa8d0Smrg#ifdef HAVE_CONFIG_H 6bdcaa8d0Smrg#include "config.h" 7bdcaa8d0Smrg#endif 8bdcaa8d0Smrg 9bdcaa8d0Smrg#include "rendition.h" 10bdcaa8d0Smrg#include "vramdac.h" 11bdcaa8d0Smrg#include "vos.h" 12bdcaa8d0Smrg#include "v1kregs.h" 13bdcaa8d0Smrg#include "v2kregs.h" 14bdcaa8d0Smrg 15bdcaa8d0Smrg/* 16bdcaa8d0Smrg * defines 17bdcaa8d0Smrg */ 18bdcaa8d0Smrg 19bdcaa8d0Smrg#undef DEBUG 20bdcaa8d0Smrg 21bdcaa8d0Smrg/* directly accessable RAMDAC registers */ 22bdcaa8d0Smrg#define BT485_WRITE_ADDR 0x00 23bdcaa8d0Smrg#define BT485_RAMDAC_DATA 0x01 24bdcaa8d0Smrg#define BT485_PIXEL_MASK 0x02 25bdcaa8d0Smrg#define BT485_READ_ADDR 0x03 26bdcaa8d0Smrg#define BT485_CURS_WR_ADDR 0x04 27bdcaa8d0Smrg#define BT485_CURS_DATA 0x05 28bdcaa8d0Smrg#define BT485_COMMAND_REG_0 0x06 29bdcaa8d0Smrg#define BT485_CURS_RD_ADDR 0x07 30bdcaa8d0Smrg#define BT485_COMMAND_REG_1 0x08 31bdcaa8d0Smrg#define BT485_COMMAND_REG_2 0x09 32bdcaa8d0Smrg#define BT485_STATUS_REG 0x0a 33bdcaa8d0Smrg#define BT485_CURS_RAM_DATA 0x0b 34bdcaa8d0Smrg#define BT485_CURS_X_LOW 0x0c 35bdcaa8d0Smrg#define BT485_CURS_X_HIGH 0x0d 36bdcaa8d0Smrg#define BT485_CURS_Y_LOW 0x0e 37bdcaa8d0Smrg#define BT485_CURS_Y_HIGH 0x0f 38bdcaa8d0Smrg 39bdcaa8d0Smrg/* indirectly accessable ramdac registers */ 40bdcaa8d0Smrg#define BT485_COMMAND_REG_3 0x01 41bdcaa8d0Smrg 42bdcaa8d0Smrg/* bits in command register 0 */ 43bdcaa8d0Smrg#define BT485_CR0_EXTENDED_REG_ACCESS 0x80 44bdcaa8d0Smrg#define BT485_CR0_SCLK_SLEEP_DISABLE 0x40 45bdcaa8d0Smrg#define BT485_CR0_BLANK_PEDESTAL 0x20 46bdcaa8d0Smrg#define BT485_CR0_SYNC_ON_BLUE 0x10 47bdcaa8d0Smrg#define BT485_CR0_SYNC_ON_GREEN 0x08 48bdcaa8d0Smrg#define BT485_CR0_SYNC_ON_RED 0x04 49bdcaa8d0Smrg#define BT485_CR0_8_BIT_DAC 0x02 50bdcaa8d0Smrg#define BT485_CR0_SLEEP_ENABLE 0x01 51bdcaa8d0Smrg 52bdcaa8d0Smrg/* bits in command register 1 */ 53bdcaa8d0Smrg#define BT485_CR1_24BPP 0x00 54bdcaa8d0Smrg#define BT485_CR1_16BPP 0x20 55bdcaa8d0Smrg#define BT485_CR1_8BPP 0x40 56bdcaa8d0Smrg#define BT485_CR1_4BPP 0x60 57bdcaa8d0Smrg#define BT485_CR1_1BPP 0x80 58bdcaa8d0Smrg#define BT485_CR1_BYPASS_CLUT 0x10 59bdcaa8d0Smrg#define BT485_CR1_565_16BPP 0x08 60bdcaa8d0Smrg#define BT485_CR1_555_16BPP 0x00 61bdcaa8d0Smrg#define BT485_CR1_1_TO_1_16BPP 0x04 62bdcaa8d0Smrg#define BT485_CR1_2_TO_1_16BPP 0x00 63bdcaa8d0Smrg#define BT485_CR1_PD7_PIXEL_SWITCH 0x02 64bdcaa8d0Smrg#define BT485_CR1_PIXEL_PORT_CD 0x01 65bdcaa8d0Smrg#define BT485_CR1_PIXEL_PORT_AB 0x00 66bdcaa8d0Smrg 67bdcaa8d0Smrg/* bits in command register 2 */ 68bdcaa8d0Smrg#define BT485_CR2_SCLK_DISABLE 0x80 69bdcaa8d0Smrg#define BT485_TEST_PATH_SELECT 0x40 70bdcaa8d0Smrg#define BT485_PIXEL_INPUT_GATE 0x20 71bdcaa8d0Smrg#define BT485_PIXEL_CLK_SELECT 0x10 72bdcaa8d0Smrg#define BT485_INTERLACE_SELECT 0x08 73bdcaa8d0Smrg#define BT485_16BPP_CLUT_PACKED 0x04 74bdcaa8d0Smrg#define BT485_X_WINDOW_CURSOR 0x03 75bdcaa8d0Smrg#define BT485_2_COLOR_CURSOR 0x02 76bdcaa8d0Smrg#define BT485_3_COLOR_CURSOR 0x01 77bdcaa8d0Smrg#define BT485_DISABLE_CURSOR 0x00 78bdcaa8d0Smrg#define BT485_CURSOR_MASK 0x03 79bdcaa8d0Smrg 80bdcaa8d0Smrg/* bits in command register 3 */ 81bdcaa8d0Smrg#define BT485_4BPP_NIBBLE_SWAP 0x10 82bdcaa8d0Smrg#define BT485_CLOCK_DOUBLER 0x08 83bdcaa8d0Smrg#define BT485_64_BY_64_CURSOR 0x04 84bdcaa8d0Smrg#define BT485_32_BY_32_CURSOR 0x00 85bdcaa8d0Smrg#define BT485_SIZE_MASK 0x04 86bdcaa8d0Smrg 87bdcaa8d0Smrg/* special constants for the Brooktree BT485 RAMDAC */ 88bdcaa8d0Smrg#define BT485_INPUT_LIMIT 110000000 89bdcaa8d0Smrg 90bdcaa8d0Smrg 91bdcaa8d0Smrg 92bdcaa8d0Smrg/* 93bdcaa8d0Smrg * local function prototypes 94bdcaa8d0Smrg */ 95bdcaa8d0Smrg 96880c7e28Smrgstatic void Bt485_write_masked(unsigned long port, vu8 reg, vu8 mask, vu8 data); 97880c7e28Smrgstatic void Bt485_write_cmd3_masked(unsigned long port, vu8 mask, vu8 data); 98bdcaa8d0Smrg#if 0 99880c7e28Smrgstatic vu8 Bt485_read_masked(unsigned long port, vu8 reg, vu8 mask); 100880c7e28Smrgstatic vu8 Bt485_read_cmd3_masked(unsigned long port, vu8 mask); 101bdcaa8d0Smrg#endif 102bdcaa8d0Smrg 103bdcaa8d0Smrg/* 104bdcaa8d0Smrg * local data 105bdcaa8d0Smrg */ 106bdcaa8d0Smrg 107bdcaa8d0Smrgstatic int Cursor_size=0; 108bdcaa8d0Smrg 109bdcaa8d0Smrg 110bdcaa8d0Smrg 111bdcaa8d0Smrg/* 112bdcaa8d0Smrg * functions 113bdcaa8d0Smrg */ 114bdcaa8d0Smrg 115bdcaa8d0Smrg/* 116bdcaa8d0Smrg * int verite_initdac(ScrnInfoPtr pScreenInfo, vu8 bpp, vu8 doubleclock) 117bdcaa8d0Smrg * 118bdcaa8d0Smrg * Used to initialize the ramdac. Palette-bypass is dis-/enabled with respect 119bdcaa8d0Smrg * to the color depth, the cursor is disabled by default. If needed (i.e. if 120bdcaa8d0Smrg * the corresponding field in the verite_board_t struct is set), the clock doubling 121bdcaa8d0Smrg * is turned on. 122bdcaa8d0Smrg */ 123bdcaa8d0Smrg 124bdcaa8d0Smrgvoid 125bdcaa8d0Smrgverite_savedac (ScrnInfoPtr pScreenInfo) 126bdcaa8d0Smrg{ 127bdcaa8d0Smrg renditionPtr pRendition = RENDITIONPTR(pScreenInfo); 128bdcaa8d0Smrg int iob=pRendition->board.io_base + RAMDACBASEADDR; 129bdcaa8d0Smrg RenditionRegPtr reg = &pRendition->saveRegs; 130bdcaa8d0Smrg 131bdcaa8d0Smrg reg->daccmd0 = verite_in8(iob+BT485_COMMAND_REG_0); 132bdcaa8d0Smrg reg->daccmd1 = verite_in8(iob+BT485_COMMAND_REG_1); 133bdcaa8d0Smrg reg->daccmd2 = verite_in8(iob+BT485_COMMAND_REG_2); 134bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_0,reg->daccmd0 135bdcaa8d0Smrg | BT485_CR0_EXTENDED_REG_ACCESS); 136bdcaa8d0Smrg verite_out8(iob+BT485_WRITE_ADDR, BT485_COMMAND_REG_3); 137bdcaa8d0Smrg reg->daccmd3 = verite_in8(iob+BT485_STATUS_REG); 138bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_0,reg->daccmd0); 139bdcaa8d0Smrg} 140bdcaa8d0Smrg 141bdcaa8d0Smrg 142bdcaa8d0Smrgvoid 143bdcaa8d0Smrgverite_restoredac (ScrnInfoPtr pScreenInfo, RenditionRegPtr reg) 144bdcaa8d0Smrg{ 145bdcaa8d0Smrg renditionPtr pRendition = RENDITIONPTR(pScreenInfo); 146bdcaa8d0Smrg int iob=pRendition->board.io_base + RAMDACBASEADDR; 147bdcaa8d0Smrg 148bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_0, reg->daccmd0 149bdcaa8d0Smrg | BT485_CR0_EXTENDED_REG_ACCESS); 150bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_1, reg->daccmd1); 151bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_2, reg->daccmd2); 152bdcaa8d0Smrg verite_out8(iob+BT485_WRITE_ADDR, BT485_COMMAND_REG_3); 153bdcaa8d0Smrg verite_out8(iob+BT485_STATUS_REG, reg->daccmd3); 154bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_0, reg->daccmd0); 155bdcaa8d0Smrg 156bdcaa8d0Smrg} 157bdcaa8d0Smrg 158bdcaa8d0Smrgint 159bdcaa8d0Smrgverite_initdac(ScrnInfoPtr pScreenInfo, vu8 bpp, vu8 doubleclock) 160bdcaa8d0Smrg{ 161bdcaa8d0Smrg renditionPtr pRendition = RENDITIONPTR(pScreenInfo); 162880c7e28Smrg unsigned long iob=pRendition->board.io_base+RAMDACBASEADDR; 163bdcaa8d0Smrg vu8 cmd0,cmd1,cmd2; 164bdcaa8d0Smrg vu8 cmd3_data=0; 165bdcaa8d0Smrg 166bdcaa8d0Smrg#ifdef DEBUG 167bdcaa8d0Smrg ErrorF ("Rendition: Debug verite_initdac called\n"); 168bdcaa8d0Smrg#endif 169bdcaa8d0Smrg 170bdcaa8d0Smrg if (doubleclock) 171bdcaa8d0Smrg cmd3_data|=BT485_CLOCK_DOUBLER; 172bdcaa8d0Smrg 173bdcaa8d0Smrg switch (bpp) { 174bdcaa8d0Smrg case 1: 175bdcaa8d0Smrg case 4: 176bdcaa8d0Smrg xf86DrvMsg(pScreenInfo->scrnIndex, X_CONFIG, 177bdcaa8d0Smrg "color depth %d not (yet ?) supported\n", 178bdcaa8d0Smrg bpp); 179bdcaa8d0Smrg return -1; 180bdcaa8d0Smrg 181bdcaa8d0Smrg case 8: 182bdcaa8d0Smrg cmd0 = BT485_CR0_EXTENDED_REG_ACCESS | 183bdcaa8d0Smrg BT485_CR0_8_BIT_DAC; 184bdcaa8d0Smrg 185bdcaa8d0Smrg cmd1 = BT485_CR1_8BPP | 186bdcaa8d0Smrg BT485_CR1_PIXEL_PORT_AB; 187bdcaa8d0Smrg 188bdcaa8d0Smrg cmd2 = BT485_PIXEL_INPUT_GATE | 189bdcaa8d0Smrg BT485_DISABLE_CURSOR; 190bdcaa8d0Smrg 191bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_0, cmd0); 192bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_1, cmd1); 193bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_2, cmd2); 194bdcaa8d0Smrg break; 195bdcaa8d0Smrg 196bdcaa8d0Smrg case 16: 197bdcaa8d0Smrg cmd0 = BT485_CR0_EXTENDED_REG_ACCESS | 198bdcaa8d0Smrg BT485_CR0_8_BIT_DAC; 199bdcaa8d0Smrg 200bdcaa8d0Smrg cmd1 = BT485_CR1_16BPP | 201bdcaa8d0Smrg BT485_CR1_2_TO_1_16BPP | 202bdcaa8d0Smrg BT485_CR1_PIXEL_PORT_AB; 203bdcaa8d0Smrg 204bdcaa8d0Smrg cmd2 = BT485_PIXEL_INPUT_GATE | 205bdcaa8d0Smrg BT485_DISABLE_CURSOR; 206bdcaa8d0Smrg 207bdcaa8d0Smrg if (pScreenInfo->defaultVisual == TrueColor) 208bdcaa8d0Smrg cmd1 |= BT485_CR1_BYPASS_CLUT; 209bdcaa8d0Smrg 210bdcaa8d0Smrg if (pScreenInfo->weight.green == 5) 211bdcaa8d0Smrg cmd1 |= BT485_CR1_555_16BPP; 212bdcaa8d0Smrg else 213bdcaa8d0Smrg cmd1 |= BT485_CR1_565_16BPP; 214bdcaa8d0Smrg 215bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_0,cmd0); 216bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_1,cmd1); 217bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_2,cmd2); 218bdcaa8d0Smrg break; 219bdcaa8d0Smrg 220bdcaa8d0Smrg case 32: 221bdcaa8d0Smrg cmd0 = BT485_CR0_EXTENDED_REG_ACCESS | 222bdcaa8d0Smrg BT485_CR0_8_BIT_DAC; 223bdcaa8d0Smrg 224bdcaa8d0Smrg cmd1 = BT485_CR1_24BPP | 225bdcaa8d0Smrg BT485_CR1_PIXEL_PORT_AB; 226bdcaa8d0Smrg 227bdcaa8d0Smrg cmd2 = BT485_PIXEL_INPUT_GATE | 228bdcaa8d0Smrg BT485_DISABLE_CURSOR; 229bdcaa8d0Smrg 230bdcaa8d0Smrg if (pScreenInfo->defaultVisual == TrueColor) 231bdcaa8d0Smrg cmd1 |= BT485_CR1_BYPASS_CLUT; 232bdcaa8d0Smrg 233bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_0,cmd0); 234bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_1,cmd1); 235bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_2,cmd2); 236bdcaa8d0Smrg break; 237bdcaa8d0Smrg 238bdcaa8d0Smrg default: 239bdcaa8d0Smrg xf86DrvMsg(pScreenInfo->scrnIndex, X_CONFIG, 240bdcaa8d0Smrg "Color depth not supported (%d bpp)\n", bpp); 241bdcaa8d0Smrg return -1; 242bdcaa8d0Smrg break; 243bdcaa8d0Smrg } 244bdcaa8d0Smrg 245bdcaa8d0Smrg verite_out8(iob+BT485_WRITE_ADDR, BT485_COMMAND_REG_3); 246bdcaa8d0Smrg verite_out8(iob+BT485_STATUS_REG, cmd3_data); 247bdcaa8d0Smrg/* 248bdcaa8d0Smrg Bt485_write_masked(iob, BT485_COMMAND_REG_0, 0x7f, 0x00); 249bdcaa8d0Smrg*/ 250bdcaa8d0Smrg verite_out8(iob+BT485_PIXEL_MASK, 0xff); 251bdcaa8d0Smrg 252bdcaa8d0Smrg return 0; 253bdcaa8d0Smrg} 254bdcaa8d0Smrg 255bdcaa8d0Smrg 256bdcaa8d0Smrg 257bdcaa8d0Smrg/* 258bdcaa8d0Smrg * void verite_enablecursor(ScrnInfoPtr pScreenInfo, int type, int size) 259bdcaa8d0Smrg * 260bdcaa8d0Smrg * Used to enable the hardware cursor. Size indicates, whether to use no cursor 261bdcaa8d0Smrg * at all, a 32x32 or a 64x64 cursor. The type selects a two-color, three-color 262bdcaa8d0Smrg * or X-window-like cursor. Valid values are defined in vramdac.h. 263bdcaa8d0Smrg * 264bdcaa8d0Smrg */ 265bdcaa8d0Smrgvoid 266bdcaa8d0Smrgverite_enablecursor(ScrnInfoPtr pScreenInfo, int type, int size) 267bdcaa8d0Smrg{ 268bdcaa8d0Smrg renditionPtr pRendition = RENDITIONPTR(pScreenInfo); 269bdcaa8d0Smrg 270bdcaa8d0Smrg static vu8 ctypes[]={ BT485_DISABLE_CURSOR, BT485_2_COLOR_CURSOR, 271bdcaa8d0Smrg BT485_3_COLOR_CURSOR, BT485_X_WINDOW_CURSOR }; 272bdcaa8d0Smrg static vu8 csizes[]={ BT485_32_BY_32_CURSOR, BT485_64_BY_64_CURSOR }; 273bdcaa8d0Smrg 274880c7e28Smrg unsigned long iob=pRendition->board.io_base+RAMDACBASEADDR; 275bdcaa8d0Smrg 276bdcaa8d0Smrg#ifdef DEBUG 277bdcaa8d0Smrg ErrorF ("Rendition: Debug verite_enablecursor called type=0x%x\n",type); 278bdcaa8d0Smrg#endif 279bdcaa8d0Smrg 280bdcaa8d0Smrg /* type goes to command register 2 */ 281bdcaa8d0Smrg Bt485_write_masked(iob, BT485_COMMAND_REG_2, ~BT485_CURSOR_MASK, 282bdcaa8d0Smrg ctypes[type]); 283bdcaa8d0Smrg 284bdcaa8d0Smrg /* size is in command register 3 */ 285bdcaa8d0Smrg Bt485_write_cmd3_masked(iob, ~BT485_SIZE_MASK, csizes[size]); 286bdcaa8d0Smrg 287bdcaa8d0Smrg if (type) 288bdcaa8d0Smrg Cursor_size=(size ? 64 : 32); 289bdcaa8d0Smrg 290bdcaa8d0Smrg#ifdef DEBUG 291bdcaa8d0Smrg ErrorF ("Rendition: Debug verite_enablecursor Exit\n"); 292bdcaa8d0Smrg#endif 293bdcaa8d0Smrg 294bdcaa8d0Smrg} 295bdcaa8d0Smrg 296bdcaa8d0Smrg/* 297bdcaa8d0Smrg * void verite_movecursor(ScrnInfoPtr pScreenInfo, vu16 x, vu16 y, vu8 xo, vu8 yo) 298bdcaa8d0Smrg * 299bdcaa8d0Smrg * Moves the cursor to the specified location. To hide the cursor, call 300bdcaa8d0Smrg * this routine with x=0x0 and y=0x0. 301bdcaa8d0Smrg * 302bdcaa8d0Smrg */ 303bdcaa8d0Smrgvoid 304bdcaa8d0Smrgverite_movecursor(ScrnInfoPtr pScreenInfo, vu16 x, vu16 y, vu8 xo, vu8 yo) 305bdcaa8d0Smrg{ 306bdcaa8d0Smrg renditionPtr pRendition = RENDITIONPTR(pScreenInfo); 307880c7e28Smrg unsigned long iob=pRendition->board.io_base+RAMDACBASEADDR; 308bdcaa8d0Smrg 309bdcaa8d0Smrg x+=Cursor_size-xo; 310bdcaa8d0Smrg y+=Cursor_size-yo; 311bdcaa8d0Smrg 312bdcaa8d0Smrg verite_out8(iob+BT485_CURS_X_LOW, x&0xff); 313bdcaa8d0Smrg verite_out8(iob+BT485_CURS_X_HIGH, (x>>8)&0x0f); 314bdcaa8d0Smrg verite_out8(iob+BT485_CURS_Y_LOW, y&0xff); 315bdcaa8d0Smrg verite_out8(iob+BT485_CURS_Y_HIGH, (y>>8)&0x0f); 316bdcaa8d0Smrg} 317bdcaa8d0Smrg 318bdcaa8d0Smrg 319bdcaa8d0Smrg 320bdcaa8d0Smrg/* 321bdcaa8d0Smrg * void verite_setcursorcolor(ScrnInfoPtr pScreenInfo, vu32 bg, vu32 fg) 322bdcaa8d0Smrg * 323bdcaa8d0Smrg * Sets the color of the cursor -- should be revised for use with 3 colors! 324bdcaa8d0Smrg * 325bdcaa8d0Smrg */ 326bdcaa8d0Smrgvoid 327bdcaa8d0Smrgverite_setcursorcolor(ScrnInfoPtr pScreenInfo, vu32 fg, vu32 bg) 328bdcaa8d0Smrg{ 329bdcaa8d0Smrg renditionPtr pRendition = RENDITIONPTR(pScreenInfo); 330880c7e28Smrg unsigned long iob=pRendition->board.io_base+RAMDACBASEADDR; 331bdcaa8d0Smrg 332bdcaa8d0Smrg#ifdef DEBUG 333bdcaa8d0Smrg ErrorF ("Rendition: Debug verite_setcursorcolor called FG=0x%x BG=0x%x\n", 334bdcaa8d0Smrg fg,bg); 335bdcaa8d0Smrg#endif 336bdcaa8d0Smrg 337bdcaa8d0Smrg verite_out8(iob+BT485_CURS_WR_ADDR, 0x00); 338bdcaa8d0Smrg 339bdcaa8d0Smrg /* load the cursor color 0 */ 340bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, 0x00); 341bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, 0x00); 342bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, 0x00); 343bdcaa8d0Smrg 344bdcaa8d0Smrg /* load the cursor color 1 */ 345bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, (fg>>16) & 0xff); 346bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, (fg>>8) & 0xff); 347bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, fg&0xff ); 348bdcaa8d0Smrg 349bdcaa8d0Smrg /* 350bdcaa8d0Smrg * The V2xxx and the V1xxx with external BT485 behave differently. 351bdcaa8d0Smrg * If we set color 2 to fg both work correctly. 352bdcaa8d0Smrg */ 353bdcaa8d0Smrg /* load the cursor color 2 */ 354bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, (fg>>16) & 0xff); 355bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, (fg>>8) & 0xff); 356bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, fg & 0xff); 357bdcaa8d0Smrg 358bdcaa8d0Smrg /* load the cursor color 3 */ 359bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, (bg>>16)&0xff ); 360bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, (bg>>8)&0xff ); 361bdcaa8d0Smrg verite_out8(iob+BT485_CURS_DATA, bg&0xff ); 362bdcaa8d0Smrg} 363bdcaa8d0Smrg 364bdcaa8d0Smrg 365bdcaa8d0Smrg 366bdcaa8d0Smrg/* 367bdcaa8d0Smrg * Oh god, this code is quite a mess ... should be re-written soon. 368bdcaa8d0Smrg * But for now I'm happy it works ;) <ml> 369bdcaa8d0Smrg * 370bdcaa8d0Smrg */ 371bdcaa8d0Smrgvoid 372bdcaa8d0Smrgverite_loadcursor(ScrnInfoPtr pScreenInfo, vu8 size, vu8 *cursorimage) 373bdcaa8d0Smrg{ 374bdcaa8d0Smrg int c, bytes, row; 375bdcaa8d0Smrg vu8 *src = cursorimage; 376bdcaa8d0Smrg renditionPtr pRendition = RENDITIONPTR(pScreenInfo); 377880c7e28Smrg unsigned long iob=pRendition->board.io_base+RAMDACBASEADDR; 378bdcaa8d0Smrg vu8 tmp; 379bdcaa8d0Smrg vu8 memend; /* Added for byte-swap fix */ 380bdcaa8d0Smrg 381bdcaa8d0Smrg#ifdef DEBUG 382bdcaa8d0Smrg ErrorF ("Rendition: Debug verite_loadcursor called\n"); 383bdcaa8d0Smrg#endif 384bdcaa8d0Smrg 385bdcaa8d0Smrg if (NULL == cursorimage) 386bdcaa8d0Smrg return; 387bdcaa8d0Smrg 388bdcaa8d0Smrg /* Following two lines added for the byte-swap fix */ 389bdcaa8d0Smrg memend = verite_in8(pRendition->board.io_base + MEMENDIAN); 390bdcaa8d0Smrg verite_out8(pRendition->board.io_base + MEMENDIAN, MEMENDIAN_HW); 391bdcaa8d0Smrg 392bdcaa8d0Smrg size&=1; 393bdcaa8d0Smrg if (size) 394bdcaa8d0Smrg bytes=64; 395bdcaa8d0Smrg else 396bdcaa8d0Smrg bytes=32; 397bdcaa8d0Smrg bytes=(bytes*bytes)>>3; 398bdcaa8d0Smrg 399bdcaa8d0Smrg if (pRendition->board.chip == V1000_DEVICE) { 400bdcaa8d0Smrg /* now load the cursor data into the cursor ram */ 401bdcaa8d0Smrg 402bdcaa8d0Smrg tmp=verite_in8(iob+BT485_COMMAND_REG_0)&0x7f; 403bdcaa8d0Smrg verite_out8(iob+BT485_COMMAND_REG_0, tmp|0x80); 404bdcaa8d0Smrg 405bdcaa8d0Smrg verite_out8(iob+BT485_WRITE_ADDR, BT485_COMMAND_REG_3); 406bdcaa8d0Smrg 407bdcaa8d0Smrg tmp=verite_in8(iob+BT485_STATUS_REG)&0xf8; 408bdcaa8d0Smrg verite_out8(iob+BT485_STATUS_REG, tmp|(size<<2)); 409bdcaa8d0Smrg verite_out8(iob+BT485_WRITE_ADDR, 0x00); 410bdcaa8d0Smrg 411bdcaa8d0Smrg /* output cursor image */ 412bdcaa8d0Smrg src=cursorimage; 413bdcaa8d0Smrg 414bdcaa8d0Smrg /* First plane data */ 415bdcaa8d0Smrg for (c=0; c<bytes; c++) { 416bdcaa8d0Smrg verite_out8(iob+BT485_CURS_RAM_DATA, *src); 417bdcaa8d0Smrg src+=2; 418bdcaa8d0Smrg } 419bdcaa8d0Smrg 420bdcaa8d0Smrg /* Second plane data */ 421bdcaa8d0Smrg src=cursorimage+1; 422bdcaa8d0Smrg for (c=0; c<bytes; c++) { 423bdcaa8d0Smrg verite_out8(iob+BT485_CURS_RAM_DATA, *src); 424bdcaa8d0Smrg src+=2; 425bdcaa8d0Smrg } 426bdcaa8d0Smrg } 427bdcaa8d0Smrg else { 428bdcaa8d0Smrg /* V2x00 HW-Cursor, supports only 64x64x2 size */ 429bdcaa8d0Smrg 430bdcaa8d0Smrg verite_out32(iob+CURSORBASE, pRendition->board.hwcursor_membase); 431bdcaa8d0Smrg 432bdcaa8d0Smrg /* First plane data */ 433bdcaa8d0Smrg for (row=0; row<64; row++) 434bdcaa8d0Smrg for (c=0, src=cursorimage+1+16*row; c<8; c++, src+=2) 435bdcaa8d0Smrg verite_write_memory8(pRendition->board.vmem_base, 16*(63-row)+c, 436bdcaa8d0Smrg (c&1)?(*(src-2)):(*(src+2))); 437bdcaa8d0Smrg /* Second plane data */ 438bdcaa8d0Smrg for (row=0; row<64; row++) 439bdcaa8d0Smrg for (c=0, src=cursorimage+16*row; c<8; c++, src+=2) 440bdcaa8d0Smrg verite_write_memory8(pRendition->board.vmem_base, 8+16*(63-row)+c, 441bdcaa8d0Smrg (c&1)?(*(src-2)):(*(src+2))); 442bdcaa8d0Smrg 443bdcaa8d0Smrg } 444bdcaa8d0Smrg /* Following line added for the byte-swap fix */ 445bdcaa8d0Smrg verite_out8(pRendition->board.io_base + MEMENDIAN, memend); 446bdcaa8d0Smrg} 447bdcaa8d0Smrg 448bdcaa8d0Smrg 449bdcaa8d0Smrg 450bdcaa8d0Smrg/* NOTE: count is the actual number of colors decremented by 1 */ 451bdcaa8d0Smrg 452bdcaa8d0Smrgvoid 453bdcaa8d0Smrgverite_setpalette(ScrnInfoPtr pScreenInfo, int numColors, int *indices, 454bdcaa8d0Smrg LOCO *colors, VisualPtr pVisual) 455bdcaa8d0Smrg{ 456bdcaa8d0Smrg renditionPtr pRendition = RENDITIONPTR(pScreenInfo); 457880c7e28Smrg unsigned long iob=pRendition->board.io_base; 458bdcaa8d0Smrg vu32 crtc_status; 459bdcaa8d0Smrg int i, index; 460bdcaa8d0Smrg 461bdcaa8d0Smrg#ifdef DEBUG 462bdcaa8d0Smrg ErrorF ("Rendition: Debug verite_setpalette called\n"); 463bdcaa8d0Smrg#endif 464bdcaa8d0Smrg 465bdcaa8d0Smrg while (1) { 466bdcaa8d0Smrg crtc_status=verite_in32(iob+CRTCSTATUS); 467bdcaa8d0Smrg if (crtc_status & CRTCSTATUS_VERT_SYNC) 468bdcaa8d0Smrg break; 469bdcaa8d0Smrg }; 470bdcaa8d0Smrg 471bdcaa8d0Smrg iob+=RAMDACBASEADDR; 472bdcaa8d0Smrg 473bdcaa8d0Smrg for (i = 0; i < numColors; i++) { 474bdcaa8d0Smrg index = indices[i]; 475bdcaa8d0Smrg verite_out8(iob+BT485_WRITE_ADDR, index); 476bdcaa8d0Smrg 477bdcaa8d0Smrg verite_out8(iob+BT485_RAMDAC_DATA, colors[index].red); 478bdcaa8d0Smrg verite_out8(iob+BT485_RAMDAC_DATA, colors[index].green); 479bdcaa8d0Smrg verite_out8(iob+BT485_RAMDAC_DATA, colors[index].blue); 480bdcaa8d0Smrg } 481bdcaa8d0Smrg} 482bdcaa8d0Smrg 483bdcaa8d0Smrg/* 484bdcaa8d0Smrg * local functions 485bdcaa8d0Smrg */ 486bdcaa8d0Smrg 487bdcaa8d0Smrg/* 488880c7e28Smrg * static void Bt485_write_masked(unsigned long port, vu8 reg, vu8 mask, vu8 data) 489bdcaa8d0Smrg * 490bdcaa8d0Smrg * 491bdcaa8d0Smrg */ 492bdcaa8d0Smrgstatic void 493880c7e28SmrgBt485_write_masked(unsigned long port, vu8 reg, vu8 mask, vu8 data) 494bdcaa8d0Smrg{ 495bdcaa8d0Smrg vu8 tmp; 496bdcaa8d0Smrg 497bdcaa8d0Smrg tmp=verite_in8(port+reg)&mask; 498bdcaa8d0Smrg verite_out8(port+reg, tmp|data); 499bdcaa8d0Smrg} 500bdcaa8d0Smrg 501bdcaa8d0Smrg 502bdcaa8d0Smrg 503bdcaa8d0Smrg/* 504880c7e28Smrg * static void Bt485_write_cmd3_masked(unsigned long port, vu8 mask, vu8 data) 505bdcaa8d0Smrg * 506bdcaa8d0Smrg * 507bdcaa8d0Smrg */ 508bdcaa8d0Smrgstatic void 509880c7e28SmrgBt485_write_cmd3_masked(unsigned long port, vu8 mask, vu8 data) 510bdcaa8d0Smrg{ 511bdcaa8d0Smrg/* 512bdcaa8d0Smrg * Bt485_write_masked(port, BT485_COMMAND_REG_0, 0x7f, 0x80); 513bdcaa8d0Smrg */ 514bdcaa8d0Smrg verite_out8(port+BT485_WRITE_ADDR, BT485_COMMAND_REG_3); 515bdcaa8d0Smrg Bt485_write_masked(port, BT485_STATUS_REG, mask, data); 516bdcaa8d0Smrg/* 517bdcaa8d0Smrg * Bt485_write_masked(port, BT485_COMMAND_REG_0, 0x7f, 0x00); 518bdcaa8d0Smrg */ 519bdcaa8d0Smrg} 520bdcaa8d0Smrg 521bdcaa8d0Smrg 522bdcaa8d0Smrg 523bdcaa8d0Smrg#if 0 524bdcaa8d0Smrg/* 525880c7e28Smrg * static vu8 Bt485_read_masked(unsigned long port, vu8 reg, vu8 mask) 526bdcaa8d0Smrg * 527bdcaa8d0Smrg * 528bdcaa8d0Smrg */ 529bdcaa8d0Smrgstatic vu8 530880c7e28SmrgBt485_read_masked(unsigned long port, vu8 reg, vu8 mask) 531bdcaa8d0Smrg{ 532bdcaa8d0Smrg return verite_in8(port+reg)&mask; 533bdcaa8d0Smrg} 534bdcaa8d0Smrg 535bdcaa8d0Smrg 536bdcaa8d0Smrg/* 537880c7e28Smrg * static vu8 Bt485_read_cmd3_masked(unsigned long port, vu8 mask) 538bdcaa8d0Smrg * 539bdcaa8d0Smrg * 540bdcaa8d0Smrg */ 541bdcaa8d0Smrgstatic vu8 542880c7e28SmrgBt485_read_cmd3_masked(unsigned long port, vu8 mask) 543bdcaa8d0Smrg{ 544bdcaa8d0Smrg vu8 value; 545bdcaa8d0Smrg 546bdcaa8d0Smrg Bt485_write_masked(port, BT485_COMMAND_REG_0, 0x7f, 0x80); 547bdcaa8d0Smrg verite_out8(port+BT485_WRITE_ADDR, BT485_COMMAND_REG_3); 548bdcaa8d0Smrg value=Bt485_read_masked(port, BT485_STATUS_REG, mask); 549bdcaa8d0Smrg Bt485_write_masked(port, BT485_COMMAND_REG_0, 0x7f, 0x00); 550bdcaa8d0Smrg 551bdcaa8d0Smrg return value; 552bdcaa8d0Smrg} 553bdcaa8d0Smrg#endif 554bdcaa8d0Smrg 555bdcaa8d0Smrg 556bdcaa8d0Smrg/* 557bdcaa8d0Smrg * end of file vramdac.c 558bdcaa8d0Smrg */ 559