vramdac.c revision bdcaa8d0
1bdcaa8d0Smrg/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vramdac.c,v 1.18 2002/12/11 17:23:33 dawes Exp $ */
2bdcaa8d0Smrg/*
3bdcaa8d0Smrg * includes
4bdcaa8d0Smrg */
5bdcaa8d0Smrg
6bdcaa8d0Smrg#ifdef HAVE_CONFIG_H
7bdcaa8d0Smrg#include "config.h"
8bdcaa8d0Smrg#endif
9bdcaa8d0Smrg
10bdcaa8d0Smrg#include "rendition.h"
11bdcaa8d0Smrg#include "vramdac.h"
12bdcaa8d0Smrg#include "vos.h"
13bdcaa8d0Smrg#include "v1kregs.h"
14bdcaa8d0Smrg#include "v2kregs.h"
15bdcaa8d0Smrg
16bdcaa8d0Smrg/*
17bdcaa8d0Smrg * defines
18bdcaa8d0Smrg */
19bdcaa8d0Smrg
20bdcaa8d0Smrg#undef DEBUG
21bdcaa8d0Smrg
22bdcaa8d0Smrg/* directly accessable RAMDAC registers */
23bdcaa8d0Smrg#define BT485_WRITE_ADDR        0x00
24bdcaa8d0Smrg#define BT485_RAMDAC_DATA       0x01
25bdcaa8d0Smrg#define BT485_PIXEL_MASK        0x02
26bdcaa8d0Smrg#define BT485_READ_ADDR         0x03
27bdcaa8d0Smrg#define BT485_CURS_WR_ADDR      0x04
28bdcaa8d0Smrg#define BT485_CURS_DATA         0x05
29bdcaa8d0Smrg#define BT485_COMMAND_REG_0     0x06
30bdcaa8d0Smrg#define BT485_CURS_RD_ADDR      0x07
31bdcaa8d0Smrg#define BT485_COMMAND_REG_1     0x08
32bdcaa8d0Smrg#define BT485_COMMAND_REG_2     0x09
33bdcaa8d0Smrg#define BT485_STATUS_REG        0x0a
34bdcaa8d0Smrg#define BT485_CURS_RAM_DATA     0x0b
35bdcaa8d0Smrg#define BT485_CURS_X_LOW        0x0c
36bdcaa8d0Smrg#define BT485_CURS_X_HIGH       0x0d
37bdcaa8d0Smrg#define BT485_CURS_Y_LOW        0x0e
38bdcaa8d0Smrg#define BT485_CURS_Y_HIGH       0x0f
39bdcaa8d0Smrg
40bdcaa8d0Smrg/* indirectly accessable ramdac registers */
41bdcaa8d0Smrg#define BT485_COMMAND_REG_3     0x01
42bdcaa8d0Smrg
43bdcaa8d0Smrg/* bits in command register 0 */
44bdcaa8d0Smrg#define BT485_CR0_EXTENDED_REG_ACCESS   0x80
45bdcaa8d0Smrg#define BT485_CR0_SCLK_SLEEP_DISABLE    0x40
46bdcaa8d0Smrg#define BT485_CR0_BLANK_PEDESTAL        0x20
47bdcaa8d0Smrg#define BT485_CR0_SYNC_ON_BLUE          0x10
48bdcaa8d0Smrg#define BT485_CR0_SYNC_ON_GREEN         0x08
49bdcaa8d0Smrg#define BT485_CR0_SYNC_ON_RED           0x04
50bdcaa8d0Smrg#define BT485_CR0_8_BIT_DAC             0x02
51bdcaa8d0Smrg#define BT485_CR0_SLEEP_ENABLE          0x01
52bdcaa8d0Smrg
53bdcaa8d0Smrg/* bits in command register 1 */
54bdcaa8d0Smrg#define BT485_CR1_24BPP             0x00
55bdcaa8d0Smrg#define BT485_CR1_16BPP             0x20
56bdcaa8d0Smrg#define BT485_CR1_8BPP              0x40
57bdcaa8d0Smrg#define BT485_CR1_4BPP              0x60
58bdcaa8d0Smrg#define BT485_CR1_1BPP              0x80
59bdcaa8d0Smrg#define BT485_CR1_BYPASS_CLUT       0x10
60bdcaa8d0Smrg#define BT485_CR1_565_16BPP         0x08
61bdcaa8d0Smrg#define BT485_CR1_555_16BPP         0x00
62bdcaa8d0Smrg#define BT485_CR1_1_TO_1_16BPP      0x04
63bdcaa8d0Smrg#define BT485_CR1_2_TO_1_16BPP      0x00
64bdcaa8d0Smrg#define BT485_CR1_PD7_PIXEL_SWITCH  0x02
65bdcaa8d0Smrg#define BT485_CR1_PIXEL_PORT_CD     0x01
66bdcaa8d0Smrg#define BT485_CR1_PIXEL_PORT_AB     0x00
67bdcaa8d0Smrg
68bdcaa8d0Smrg/* bits in command register 2 */
69bdcaa8d0Smrg#define BT485_CR2_SCLK_DISABLE      0x80
70bdcaa8d0Smrg#define BT485_TEST_PATH_SELECT      0x40
71bdcaa8d0Smrg#define BT485_PIXEL_INPUT_GATE      0x20
72bdcaa8d0Smrg#define BT485_PIXEL_CLK_SELECT      0x10
73bdcaa8d0Smrg#define BT485_INTERLACE_SELECT      0x08
74bdcaa8d0Smrg#define BT485_16BPP_CLUT_PACKED     0x04
75bdcaa8d0Smrg#define BT485_X_WINDOW_CURSOR       0x03
76bdcaa8d0Smrg#define BT485_2_COLOR_CURSOR        0x02
77bdcaa8d0Smrg#define BT485_3_COLOR_CURSOR        0x01
78bdcaa8d0Smrg#define BT485_DISABLE_CURSOR        0x00
79bdcaa8d0Smrg#define BT485_CURSOR_MASK           0x03
80bdcaa8d0Smrg
81bdcaa8d0Smrg/* bits in command register 3 */
82bdcaa8d0Smrg#define BT485_4BPP_NIBBLE_SWAP      0x10
83bdcaa8d0Smrg#define BT485_CLOCK_DOUBLER         0x08
84bdcaa8d0Smrg#define BT485_64_BY_64_CURSOR       0x04
85bdcaa8d0Smrg#define BT485_32_BY_32_CURSOR       0x00
86bdcaa8d0Smrg#define BT485_SIZE_MASK             0x04
87bdcaa8d0Smrg
88bdcaa8d0Smrg/* special constants for the Brooktree BT485 RAMDAC */
89bdcaa8d0Smrg#define BT485_INPUT_LIMIT           110000000
90bdcaa8d0Smrg
91bdcaa8d0Smrg
92bdcaa8d0Smrg
93bdcaa8d0Smrg/*
94bdcaa8d0Smrg * local function prototypes
95bdcaa8d0Smrg */
96bdcaa8d0Smrg
97bdcaa8d0Smrgstatic void Bt485_write_masked(IOADDRESS port, vu8 reg, vu8 mask, vu8 data);
98bdcaa8d0Smrgstatic void Bt485_write_cmd3_masked(IOADDRESS port, vu8 mask, vu8 data);
99bdcaa8d0Smrg#if 0
100bdcaa8d0Smrgstatic vu8 Bt485_read_masked(IOADDRESS port, vu8 reg, vu8 mask);
101bdcaa8d0Smrgstatic vu8 Bt485_read_cmd3_masked(IOADDRESS port, vu8 mask);
102bdcaa8d0Smrg#endif
103bdcaa8d0Smrg
104bdcaa8d0Smrg/*
105bdcaa8d0Smrg * local data
106bdcaa8d0Smrg */
107bdcaa8d0Smrg
108bdcaa8d0Smrgstatic int Cursor_size=0;
109bdcaa8d0Smrg
110bdcaa8d0Smrg
111bdcaa8d0Smrg
112bdcaa8d0Smrg/*
113bdcaa8d0Smrg * functions
114bdcaa8d0Smrg */
115bdcaa8d0Smrg
116bdcaa8d0Smrg/*
117bdcaa8d0Smrg * int verite_initdac(ScrnInfoPtr pScreenInfo, vu8 bpp, vu8 doubleclock)
118bdcaa8d0Smrg *
119bdcaa8d0Smrg * Used to initialize the ramdac. Palette-bypass is dis-/enabled with respect
120bdcaa8d0Smrg * to the color depth, the cursor is disabled by default. If needed (i.e. if
121bdcaa8d0Smrg * the corresponding field in the verite_board_t struct is set), the clock doubling
122bdcaa8d0Smrg * is turned on.
123bdcaa8d0Smrg */
124bdcaa8d0Smrg
125bdcaa8d0Smrgvoid
126bdcaa8d0Smrgverite_savedac (ScrnInfoPtr pScreenInfo)
127bdcaa8d0Smrg{
128bdcaa8d0Smrg    renditionPtr pRendition = RENDITIONPTR(pScreenInfo);
129bdcaa8d0Smrg    int iob=pRendition->board.io_base + RAMDACBASEADDR;
130bdcaa8d0Smrg    RenditionRegPtr reg = &pRendition->saveRegs;
131bdcaa8d0Smrg
132bdcaa8d0Smrg    reg->daccmd0 = verite_in8(iob+BT485_COMMAND_REG_0);
133bdcaa8d0Smrg    reg->daccmd1 = verite_in8(iob+BT485_COMMAND_REG_1);
134bdcaa8d0Smrg    reg->daccmd2 = verite_in8(iob+BT485_COMMAND_REG_2);
135bdcaa8d0Smrg    verite_out8(iob+BT485_COMMAND_REG_0,reg->daccmd0
136bdcaa8d0Smrg		| BT485_CR0_EXTENDED_REG_ACCESS);
137bdcaa8d0Smrg    verite_out8(iob+BT485_WRITE_ADDR, BT485_COMMAND_REG_3);
138bdcaa8d0Smrg    reg->daccmd3 = verite_in8(iob+BT485_STATUS_REG);
139bdcaa8d0Smrg    verite_out8(iob+BT485_COMMAND_REG_0,reg->daccmd0);
140bdcaa8d0Smrg}
141bdcaa8d0Smrg
142bdcaa8d0Smrg
143bdcaa8d0Smrgvoid
144bdcaa8d0Smrgverite_restoredac (ScrnInfoPtr pScreenInfo, RenditionRegPtr reg)
145bdcaa8d0Smrg{
146bdcaa8d0Smrg    renditionPtr pRendition = RENDITIONPTR(pScreenInfo);
147bdcaa8d0Smrg    int iob=pRendition->board.io_base + RAMDACBASEADDR;
148bdcaa8d0Smrg
149bdcaa8d0Smrg    verite_out8(iob+BT485_COMMAND_REG_0, reg->daccmd0
150bdcaa8d0Smrg		| BT485_CR0_EXTENDED_REG_ACCESS);
151bdcaa8d0Smrg    verite_out8(iob+BT485_COMMAND_REG_1, reg->daccmd1);
152bdcaa8d0Smrg    verite_out8(iob+BT485_COMMAND_REG_2, reg->daccmd2);
153bdcaa8d0Smrg    verite_out8(iob+BT485_WRITE_ADDR, BT485_COMMAND_REG_3);
154bdcaa8d0Smrg    verite_out8(iob+BT485_STATUS_REG, reg->daccmd3);
155bdcaa8d0Smrg    verite_out8(iob+BT485_COMMAND_REG_0, reg->daccmd0);
156bdcaa8d0Smrg
157bdcaa8d0Smrg}
158bdcaa8d0Smrg
159bdcaa8d0Smrgint
160bdcaa8d0Smrgverite_initdac(ScrnInfoPtr pScreenInfo, vu8 bpp, vu8 doubleclock)
161bdcaa8d0Smrg{
162bdcaa8d0Smrg    renditionPtr pRendition = RENDITIONPTR(pScreenInfo);
163bdcaa8d0Smrg    IOADDRESS iob=pRendition->board.io_base+RAMDACBASEADDR;
164bdcaa8d0Smrg    vu8 cmd0,cmd1,cmd2;
165bdcaa8d0Smrg    vu8 cmd3_data=0;
166bdcaa8d0Smrg
167bdcaa8d0Smrg#ifdef DEBUG
168bdcaa8d0Smrg    ErrorF ("Rendition: Debug verite_initdac called\n");
169bdcaa8d0Smrg#endif
170bdcaa8d0Smrg
171bdcaa8d0Smrg    if (doubleclock)
172bdcaa8d0Smrg        cmd3_data|=BT485_CLOCK_DOUBLER;
173bdcaa8d0Smrg
174bdcaa8d0Smrg    switch (bpp) {
175bdcaa8d0Smrg        case 1:
176bdcaa8d0Smrg        case 4:
177bdcaa8d0Smrg			xf86DrvMsg(pScreenInfo->scrnIndex, X_CONFIG,
178bdcaa8d0Smrg				   "color depth %d not (yet ?) supported\n",
179bdcaa8d0Smrg				   bpp);
180bdcaa8d0Smrg			return -1;
181bdcaa8d0Smrg
182bdcaa8d0Smrg        case 8:
183bdcaa8d0Smrg	    cmd0 = BT485_CR0_EXTENDED_REG_ACCESS |
184bdcaa8d0Smrg	           BT485_CR0_8_BIT_DAC;
185bdcaa8d0Smrg
186bdcaa8d0Smrg	    cmd1 = BT485_CR1_8BPP |
187bdcaa8d0Smrg	           BT485_CR1_PIXEL_PORT_AB;
188bdcaa8d0Smrg
189bdcaa8d0Smrg	    cmd2 = BT485_PIXEL_INPUT_GATE |
190bdcaa8d0Smrg	           BT485_DISABLE_CURSOR;
191bdcaa8d0Smrg
192bdcaa8d0Smrg            verite_out8(iob+BT485_COMMAND_REG_0, cmd0);
193bdcaa8d0Smrg            verite_out8(iob+BT485_COMMAND_REG_1, cmd1);
194bdcaa8d0Smrg            verite_out8(iob+BT485_COMMAND_REG_2, cmd2);
195bdcaa8d0Smrg            break;
196bdcaa8d0Smrg
197bdcaa8d0Smrg        case 16:
198bdcaa8d0Smrg	    cmd0 = BT485_CR0_EXTENDED_REG_ACCESS |
199bdcaa8d0Smrg	           BT485_CR0_8_BIT_DAC;
200bdcaa8d0Smrg
201bdcaa8d0Smrg	    cmd1 = BT485_CR1_16BPP |
202bdcaa8d0Smrg	           BT485_CR1_2_TO_1_16BPP |
203bdcaa8d0Smrg	           BT485_CR1_PIXEL_PORT_AB;
204bdcaa8d0Smrg
205bdcaa8d0Smrg	    cmd2 = BT485_PIXEL_INPUT_GATE |
206bdcaa8d0Smrg	           BT485_DISABLE_CURSOR;
207bdcaa8d0Smrg
208bdcaa8d0Smrg	    if (pScreenInfo->defaultVisual == TrueColor)
209bdcaa8d0Smrg	      cmd1 |= BT485_CR1_BYPASS_CLUT;
210bdcaa8d0Smrg
211bdcaa8d0Smrg            if (pScreenInfo->weight.green == 5)
212bdcaa8d0Smrg	      cmd1 |= BT485_CR1_555_16BPP;
213bdcaa8d0Smrg	    else
214bdcaa8d0Smrg	      cmd1 |= BT485_CR1_565_16BPP;
215bdcaa8d0Smrg
216bdcaa8d0Smrg            verite_out8(iob+BT485_COMMAND_REG_0,cmd0);
217bdcaa8d0Smrg            verite_out8(iob+BT485_COMMAND_REG_1,cmd1);
218bdcaa8d0Smrg            verite_out8(iob+BT485_COMMAND_REG_2,cmd2);
219bdcaa8d0Smrg            break;
220bdcaa8d0Smrg
221bdcaa8d0Smrg        case 32:
222bdcaa8d0Smrg	    cmd0 = BT485_CR0_EXTENDED_REG_ACCESS |
223bdcaa8d0Smrg	           BT485_CR0_8_BIT_DAC;
224bdcaa8d0Smrg
225bdcaa8d0Smrg	    cmd1 = BT485_CR1_24BPP |
226bdcaa8d0Smrg	           BT485_CR1_PIXEL_PORT_AB;
227bdcaa8d0Smrg
228bdcaa8d0Smrg	    cmd2 = BT485_PIXEL_INPUT_GATE |
229bdcaa8d0Smrg	           BT485_DISABLE_CURSOR;
230bdcaa8d0Smrg
231bdcaa8d0Smrg	    if (pScreenInfo->defaultVisual == TrueColor)
232bdcaa8d0Smrg	      cmd1 |= BT485_CR1_BYPASS_CLUT;
233bdcaa8d0Smrg
234bdcaa8d0Smrg            verite_out8(iob+BT485_COMMAND_REG_0,cmd0);
235bdcaa8d0Smrg            verite_out8(iob+BT485_COMMAND_REG_1,cmd1);
236bdcaa8d0Smrg            verite_out8(iob+BT485_COMMAND_REG_2,cmd2);
237bdcaa8d0Smrg            break;
238bdcaa8d0Smrg
239bdcaa8d0Smrg        default:
240bdcaa8d0Smrg            xf86DrvMsg(pScreenInfo->scrnIndex, X_CONFIG,
241bdcaa8d0Smrg			"Color depth not supported (%d bpp)\n", bpp);
242bdcaa8d0Smrg            return -1;
243bdcaa8d0Smrg            break;
244bdcaa8d0Smrg    }
245bdcaa8d0Smrg
246bdcaa8d0Smrg    verite_out8(iob+BT485_WRITE_ADDR, BT485_COMMAND_REG_3);
247bdcaa8d0Smrg    verite_out8(iob+BT485_STATUS_REG, cmd3_data);
248bdcaa8d0Smrg/*
249bdcaa8d0Smrg    Bt485_write_masked(iob, BT485_COMMAND_REG_0, 0x7f, 0x00);
250bdcaa8d0Smrg*/
251bdcaa8d0Smrg    verite_out8(iob+BT485_PIXEL_MASK, 0xff);
252bdcaa8d0Smrg
253bdcaa8d0Smrg    return 0;
254bdcaa8d0Smrg}
255bdcaa8d0Smrg
256bdcaa8d0Smrg
257bdcaa8d0Smrg
258bdcaa8d0Smrg/*
259bdcaa8d0Smrg * void verite_enablecursor(ScrnInfoPtr pScreenInfo, int type, int size)
260bdcaa8d0Smrg *
261bdcaa8d0Smrg * Used to enable the hardware cursor. Size indicates, whether to use no cursor
262bdcaa8d0Smrg * at all, a 32x32 or a 64x64 cursor. The type selects a two-color, three-color
263bdcaa8d0Smrg * or X-window-like cursor. Valid values are defined in vramdac.h.
264bdcaa8d0Smrg *
265bdcaa8d0Smrg */
266bdcaa8d0Smrgvoid
267bdcaa8d0Smrgverite_enablecursor(ScrnInfoPtr pScreenInfo, int type, int size)
268bdcaa8d0Smrg{
269bdcaa8d0Smrg    renditionPtr pRendition = RENDITIONPTR(pScreenInfo);
270bdcaa8d0Smrg
271bdcaa8d0Smrg    static vu8 ctypes[]={ BT485_DISABLE_CURSOR, BT485_2_COLOR_CURSOR,
272bdcaa8d0Smrg                      BT485_3_COLOR_CURSOR, BT485_X_WINDOW_CURSOR };
273bdcaa8d0Smrg    static vu8 csizes[]={ BT485_32_BY_32_CURSOR, BT485_64_BY_64_CURSOR };
274bdcaa8d0Smrg
275bdcaa8d0Smrg    IOADDRESS iob=pRendition->board.io_base+RAMDACBASEADDR;
276bdcaa8d0Smrg
277bdcaa8d0Smrg#ifdef DEBUG
278bdcaa8d0Smrg    ErrorF ("Rendition: Debug verite_enablecursor called type=0x%x\n",type);
279bdcaa8d0Smrg#endif
280bdcaa8d0Smrg
281bdcaa8d0Smrg    /* type goes to command register 2 */
282bdcaa8d0Smrg    Bt485_write_masked(iob, BT485_COMMAND_REG_2, ~BT485_CURSOR_MASK,
283bdcaa8d0Smrg                      ctypes[type]);
284bdcaa8d0Smrg
285bdcaa8d0Smrg    /* size is in command register 3 */
286bdcaa8d0Smrg    Bt485_write_cmd3_masked(iob, ~BT485_SIZE_MASK, csizes[size]);
287bdcaa8d0Smrg
288bdcaa8d0Smrg    if (type)
289bdcaa8d0Smrg      Cursor_size=(size ? 64 : 32);
290bdcaa8d0Smrg
291bdcaa8d0Smrg#ifdef DEBUG
292bdcaa8d0Smrg    ErrorF ("Rendition: Debug verite_enablecursor Exit\n");
293bdcaa8d0Smrg#endif
294bdcaa8d0Smrg
295bdcaa8d0Smrg}
296bdcaa8d0Smrg
297bdcaa8d0Smrg/*
298bdcaa8d0Smrg * void verite_movecursor(ScrnInfoPtr pScreenInfo, vu16 x, vu16 y, vu8 xo, vu8 yo)
299bdcaa8d0Smrg *
300bdcaa8d0Smrg * Moves the cursor to the specified location. To hide the cursor, call
301bdcaa8d0Smrg * this routine with x=0x0 and y=0x0.
302bdcaa8d0Smrg *
303bdcaa8d0Smrg */
304bdcaa8d0Smrgvoid
305bdcaa8d0Smrgverite_movecursor(ScrnInfoPtr pScreenInfo, vu16 x, vu16 y, vu8 xo, vu8 yo)
306bdcaa8d0Smrg{
307bdcaa8d0Smrg    renditionPtr pRendition = RENDITIONPTR(pScreenInfo);
308bdcaa8d0Smrg    IOADDRESS iob=pRendition->board.io_base+RAMDACBASEADDR;
309bdcaa8d0Smrg
310bdcaa8d0Smrg    x+=Cursor_size-xo;
311bdcaa8d0Smrg    y+=Cursor_size-yo;
312bdcaa8d0Smrg
313bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_X_LOW, x&0xff);
314bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_X_HIGH, (x>>8)&0x0f);
315bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_Y_LOW, y&0xff);
316bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_Y_HIGH, (y>>8)&0x0f);
317bdcaa8d0Smrg}
318bdcaa8d0Smrg
319bdcaa8d0Smrg
320bdcaa8d0Smrg
321bdcaa8d0Smrg/*
322bdcaa8d0Smrg * void verite_setcursorcolor(ScrnInfoPtr pScreenInfo, vu32 bg, vu32 fg)
323bdcaa8d0Smrg *
324bdcaa8d0Smrg * Sets the color of the cursor -- should be revised for use with 3 colors!
325bdcaa8d0Smrg *
326bdcaa8d0Smrg */
327bdcaa8d0Smrgvoid
328bdcaa8d0Smrgverite_setcursorcolor(ScrnInfoPtr pScreenInfo, vu32 fg, vu32 bg)
329bdcaa8d0Smrg{
330bdcaa8d0Smrg    renditionPtr pRendition = RENDITIONPTR(pScreenInfo);
331bdcaa8d0Smrg    IOADDRESS iob=pRendition->board.io_base+RAMDACBASEADDR;
332bdcaa8d0Smrg
333bdcaa8d0Smrg#ifdef DEBUG
334bdcaa8d0Smrg    ErrorF ("Rendition: Debug verite_setcursorcolor called FG=0x%x BG=0x%x\n",
335bdcaa8d0Smrg	    fg,bg);
336bdcaa8d0Smrg#endif
337bdcaa8d0Smrg
338bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_WR_ADDR, 0x00);
339bdcaa8d0Smrg
340bdcaa8d0Smrg    /* load the cursor color 0 */
341bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, 0x00);
342bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, 0x00);
343bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, 0x00);
344bdcaa8d0Smrg
345bdcaa8d0Smrg    /* load the cursor color 1 */
346bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, (fg>>16) & 0xff);
347bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, (fg>>8) & 0xff);
348bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA,  fg&0xff );
349bdcaa8d0Smrg
350bdcaa8d0Smrg    /*
351bdcaa8d0Smrg     *  The V2xxx and the V1xxx with external BT485 behave differently.
352bdcaa8d0Smrg     *  If we set color 2 to fg both work correctly.
353bdcaa8d0Smrg     */
354bdcaa8d0Smrg    /* load the cursor color 2 */
355bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, (fg>>16) & 0xff);
356bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, (fg>>8) & 0xff);
357bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA,  fg & 0xff);
358bdcaa8d0Smrg
359bdcaa8d0Smrg    /* load the cursor color 3 */
360bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, (bg>>16)&0xff );
361bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, (bg>>8)&0xff );
362bdcaa8d0Smrg    verite_out8(iob+BT485_CURS_DATA, bg&0xff );
363bdcaa8d0Smrg}
364bdcaa8d0Smrg
365bdcaa8d0Smrg
366bdcaa8d0Smrg
367bdcaa8d0Smrg/*
368bdcaa8d0Smrg * Oh god, this code is quite a mess ... should be re-written soon.
369bdcaa8d0Smrg * But for now I'm happy it works ;) <ml>
370bdcaa8d0Smrg *
371bdcaa8d0Smrg */
372bdcaa8d0Smrgvoid
373bdcaa8d0Smrgverite_loadcursor(ScrnInfoPtr pScreenInfo, vu8 size, vu8 *cursorimage)
374bdcaa8d0Smrg{
375bdcaa8d0Smrg    int c, bytes, row;
376bdcaa8d0Smrg    vu8 *src = cursorimage;
377bdcaa8d0Smrg    renditionPtr pRendition = RENDITIONPTR(pScreenInfo);
378bdcaa8d0Smrg    IOADDRESS iob=pRendition->board.io_base+RAMDACBASEADDR;
379bdcaa8d0Smrg    vu8 tmp;
380bdcaa8d0Smrg    vu8 memend; /* Added for byte-swap fix */
381bdcaa8d0Smrg
382bdcaa8d0Smrg#ifdef DEBUG
383bdcaa8d0Smrg    ErrorF ("Rendition: Debug verite_loadcursor called\n");
384bdcaa8d0Smrg#endif
385bdcaa8d0Smrg
386bdcaa8d0Smrg    if (NULL == cursorimage)
387bdcaa8d0Smrg        return;
388bdcaa8d0Smrg
389bdcaa8d0Smrg    /* Following two lines added for the byte-swap fix */
390bdcaa8d0Smrg    memend = verite_in8(pRendition->board.io_base + MEMENDIAN);
391bdcaa8d0Smrg    verite_out8(pRendition->board.io_base + MEMENDIAN, MEMENDIAN_HW);
392bdcaa8d0Smrg
393bdcaa8d0Smrg    size&=1;
394bdcaa8d0Smrg    if (size)
395bdcaa8d0Smrg        bytes=64;
396bdcaa8d0Smrg    else
397bdcaa8d0Smrg        bytes=32;
398bdcaa8d0Smrg    bytes=(bytes*bytes)>>3;
399bdcaa8d0Smrg
400bdcaa8d0Smrg    if (pRendition->board.chip == V1000_DEVICE) {
401bdcaa8d0Smrg      /* now load the cursor data into the cursor ram */
402bdcaa8d0Smrg
403bdcaa8d0Smrg      tmp=verite_in8(iob+BT485_COMMAND_REG_0)&0x7f;
404bdcaa8d0Smrg      verite_out8(iob+BT485_COMMAND_REG_0, tmp|0x80);
405bdcaa8d0Smrg
406bdcaa8d0Smrg      verite_out8(iob+BT485_WRITE_ADDR, BT485_COMMAND_REG_3);
407bdcaa8d0Smrg
408bdcaa8d0Smrg      tmp=verite_in8(iob+BT485_STATUS_REG)&0xf8;
409bdcaa8d0Smrg      verite_out8(iob+BT485_STATUS_REG, tmp|(size<<2));
410bdcaa8d0Smrg      verite_out8(iob+BT485_WRITE_ADDR, 0x00);
411bdcaa8d0Smrg
412bdcaa8d0Smrg      /* output cursor image */
413bdcaa8d0Smrg      src=cursorimage;
414bdcaa8d0Smrg
415bdcaa8d0Smrg      /* First plane data */
416bdcaa8d0Smrg      for (c=0; c<bytes; c++)  {
417bdcaa8d0Smrg        verite_out8(iob+BT485_CURS_RAM_DATA, *src);
418bdcaa8d0Smrg        src+=2;
419bdcaa8d0Smrg      }
420bdcaa8d0Smrg
421bdcaa8d0Smrg      /* Second plane data */
422bdcaa8d0Smrg      src=cursorimage+1;
423bdcaa8d0Smrg      for (c=0; c<bytes; c++)  {
424bdcaa8d0Smrg        verite_out8(iob+BT485_CURS_RAM_DATA, *src);
425bdcaa8d0Smrg        src+=2;
426bdcaa8d0Smrg      }
427bdcaa8d0Smrg    }
428bdcaa8d0Smrg    else {
429bdcaa8d0Smrg      /* V2x00 HW-Cursor, supports only 64x64x2 size */
430bdcaa8d0Smrg
431bdcaa8d0Smrg      verite_out32(iob+CURSORBASE, pRendition->board.hwcursor_membase);
432bdcaa8d0Smrg
433bdcaa8d0Smrg      /* First plane data */
434bdcaa8d0Smrg      for (row=0; row<64; row++)
435bdcaa8d0Smrg	for (c=0, src=cursorimage+1+16*row; c<8; c++, src+=2)
436bdcaa8d0Smrg	  verite_write_memory8(pRendition->board.vmem_base, 16*(63-row)+c,
437bdcaa8d0Smrg     			  (c&1)?(*(src-2)):(*(src+2)));
438bdcaa8d0Smrg      /* Second plane data */
439bdcaa8d0Smrg      for (row=0; row<64; row++)
440bdcaa8d0Smrg	for (c=0, src=cursorimage+16*row; c<8; c++, src+=2)
441bdcaa8d0Smrg	  verite_write_memory8(pRendition->board.vmem_base, 8+16*(63-row)+c,
442bdcaa8d0Smrg			  (c&1)?(*(src-2)):(*(src+2)));
443bdcaa8d0Smrg
444bdcaa8d0Smrg    }
445bdcaa8d0Smrg    /* Following line added for the byte-swap fix */
446bdcaa8d0Smrg    verite_out8(pRendition->board.io_base + MEMENDIAN, memend);
447bdcaa8d0Smrg}
448bdcaa8d0Smrg
449bdcaa8d0Smrg
450bdcaa8d0Smrg
451bdcaa8d0Smrg/* NOTE: count is the actual number of colors decremented by 1 */
452bdcaa8d0Smrg
453bdcaa8d0Smrgvoid
454bdcaa8d0Smrgverite_setpalette(ScrnInfoPtr pScreenInfo, int numColors, int *indices,
455bdcaa8d0Smrg		LOCO *colors, VisualPtr pVisual)
456bdcaa8d0Smrg{
457bdcaa8d0Smrg    renditionPtr pRendition = RENDITIONPTR(pScreenInfo);
458bdcaa8d0Smrg    IOADDRESS iob=pRendition->board.io_base;
459bdcaa8d0Smrg    vu32 crtc_status;
460bdcaa8d0Smrg    int i, index;
461bdcaa8d0Smrg
462bdcaa8d0Smrg#ifdef DEBUG
463bdcaa8d0Smrg    ErrorF ("Rendition: Debug verite_setpalette called\n");
464bdcaa8d0Smrg#endif
465bdcaa8d0Smrg
466bdcaa8d0Smrg    while (1) {
467bdcaa8d0Smrg        crtc_status=verite_in32(iob+CRTCSTATUS);
468bdcaa8d0Smrg        if (crtc_status & CRTCSTATUS_VERT_SYNC)
469bdcaa8d0Smrg            break;
470bdcaa8d0Smrg    };
471bdcaa8d0Smrg
472bdcaa8d0Smrg    iob+=RAMDACBASEADDR;
473bdcaa8d0Smrg
474bdcaa8d0Smrg    for (i = 0; i < numColors; i++) {
475bdcaa8d0Smrg        index = indices[i];
476bdcaa8d0Smrg	verite_out8(iob+BT485_WRITE_ADDR, index);
477bdcaa8d0Smrg
478bdcaa8d0Smrg        verite_out8(iob+BT485_RAMDAC_DATA, colors[index].red);
479bdcaa8d0Smrg        verite_out8(iob+BT485_RAMDAC_DATA, colors[index].green);
480bdcaa8d0Smrg        verite_out8(iob+BT485_RAMDAC_DATA, colors[index].blue);
481bdcaa8d0Smrg    }
482bdcaa8d0Smrg}
483bdcaa8d0Smrg
484bdcaa8d0Smrg/*
485bdcaa8d0Smrg * local functions
486bdcaa8d0Smrg */
487bdcaa8d0Smrg
488bdcaa8d0Smrg/*
489bdcaa8d0Smrg * static void Bt485_write_masked(IOADDRESS port, vu8 reg, vu8 mask, vu8 data)
490bdcaa8d0Smrg *
491bdcaa8d0Smrg *
492bdcaa8d0Smrg */
493bdcaa8d0Smrgstatic void
494bdcaa8d0SmrgBt485_write_masked(IOADDRESS port, vu8 reg, vu8 mask, vu8 data)
495bdcaa8d0Smrg{
496bdcaa8d0Smrg    vu8 tmp;
497bdcaa8d0Smrg
498bdcaa8d0Smrg    tmp=verite_in8(port+reg)&mask;
499bdcaa8d0Smrg    verite_out8(port+reg, tmp|data);
500bdcaa8d0Smrg}
501bdcaa8d0Smrg
502bdcaa8d0Smrg
503bdcaa8d0Smrg
504bdcaa8d0Smrg/*
505bdcaa8d0Smrg * static void Bt485_write_cmd3_masked(IOADDRESS port, vu8 mask, vu8 data)
506bdcaa8d0Smrg *
507bdcaa8d0Smrg *
508bdcaa8d0Smrg */
509bdcaa8d0Smrgstatic void
510bdcaa8d0SmrgBt485_write_cmd3_masked(IOADDRESS port, vu8 mask, vu8 data)
511bdcaa8d0Smrg{
512bdcaa8d0Smrg/*
513bdcaa8d0Smrg *   Bt485_write_masked(port, BT485_COMMAND_REG_0, 0x7f, 0x80);
514bdcaa8d0Smrg */
515bdcaa8d0Smrg    verite_out8(port+BT485_WRITE_ADDR, BT485_COMMAND_REG_3);
516bdcaa8d0Smrg    Bt485_write_masked(port, BT485_STATUS_REG, mask, data);
517bdcaa8d0Smrg/*
518bdcaa8d0Smrg *    Bt485_write_masked(port, BT485_COMMAND_REG_0, 0x7f, 0x00);
519bdcaa8d0Smrg */
520bdcaa8d0Smrg}
521bdcaa8d0Smrg
522bdcaa8d0Smrg
523bdcaa8d0Smrg
524bdcaa8d0Smrg#if 0
525bdcaa8d0Smrg/*
526bdcaa8d0Smrg * static vu8 Bt485_read_masked(IOADDRESS port, vu8 reg, vu8 mask)
527bdcaa8d0Smrg *
528bdcaa8d0Smrg *
529bdcaa8d0Smrg */
530bdcaa8d0Smrgstatic vu8
531bdcaa8d0SmrgBt485_read_masked(IOADDRESS port, vu8 reg, vu8 mask)
532bdcaa8d0Smrg{
533bdcaa8d0Smrg    return verite_in8(port+reg)&mask;
534bdcaa8d0Smrg}
535bdcaa8d0Smrg
536bdcaa8d0Smrg
537bdcaa8d0Smrg/*
538bdcaa8d0Smrg * static vu8 Bt485_read_cmd3_masked(IOADDRESS port, vu8 mask)
539bdcaa8d0Smrg *
540bdcaa8d0Smrg *
541bdcaa8d0Smrg */
542bdcaa8d0Smrgstatic vu8
543bdcaa8d0SmrgBt485_read_cmd3_masked(IOADDRESS port, vu8 mask)
544bdcaa8d0Smrg{
545bdcaa8d0Smrg    vu8 value;
546bdcaa8d0Smrg
547bdcaa8d0Smrg    Bt485_write_masked(port, BT485_COMMAND_REG_0, 0x7f, 0x80);
548bdcaa8d0Smrg    verite_out8(port+BT485_WRITE_ADDR, BT485_COMMAND_REG_3);
549bdcaa8d0Smrg    value=Bt485_read_masked(port, BT485_STATUS_REG, mask);
550bdcaa8d0Smrg    Bt485_write_masked(port, BT485_COMMAND_REG_0, 0x7f, 0x00);
551bdcaa8d0Smrg
552bdcaa8d0Smrg    return value;
553bdcaa8d0Smrg}
554bdcaa8d0Smrg#endif
555bdcaa8d0Smrg
556bdcaa8d0Smrg
557bdcaa8d0Smrg/*
558bdcaa8d0Smrg * end of file vramdac.c
559bdcaa8d0Smrg */
560