s3v.h revision 1d54945d
1/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h,v 1.31 2003/02/04 02:20:49 dawes Exp $ */ 2 3/* 4Copyright (C) 1994-1999 The XFree86 Project, Inc. All Rights Reserved. 5 6Permission is hereby granted, free of charge, to any person obtaining a copy of 7this software and associated documentation files (the "Software"), to deal in 8the Software without restriction, including without limitation the rights to 9use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies 10of the Software, and to permit persons to whom the Software is furnished to do 11so, subject to the following conditions: 12 13The above copyright notice and this permission notice shall be included in all 14copies or substantial portions of the Software. 15 16THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FIT- 18NESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 20AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 21WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 23Except as contained in this notice, the name of the XFree86 Project shall not 24be used in advertising or otherwise to promote the sale, use or other dealings 25in this Software without prior written authorization from the XFree86 Project. 26*/ 27 28#ifndef _S3V_H 29#define _S3V_H 30 31#include <string.h> 32 33/* All drivers should typically include these */ 34#include "xf86.h" 35#include "xf86_OSproc.h" 36 37/* All drivers need this */ 38 39/* Everything using inb/outb, etc needs "compiler.h" */ 40#include "compiler.h" 41 42/* Drivers for PCI hardware need this */ 43#include "xf86PciInfo.h" 44 45/* Drivers that need to access the PCI config space directly need this */ 46#include "xf86Pci.h" 47 48#include "xf86Cursor.h" 49 50#include "vgaHW.h" 51 52#include "s3v_macros.h" 53 54/* All drivers initialising the SW cursor need this */ 55#include "mipointer.h" 56 57/* All drivers using the mi colormap manipulation need this */ 58#include "micmap.h" 59 60/* fb support */ 61 62#include "fb.h" 63 64/* Drivers using the XAA interface ... */ 65#include "xaa.h" 66#include "xaalocal.h" 67#include "xf86cmap.h" 68#include "xf86i2c.h" 69 70#include "vbe.h" 71 72#include "xf86xv.h" 73#include <X11/extensions/Xv.h> 74#include "fourcc.h" 75 76#ifndef _S3V_VGAHWMMIO_H 77#define _S3V_VGAHWMMIO_H 78 79#define VGAIN8(addr) MMIO_IN8(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr))) 80#define VGAIN16(addr) MMIO_IN16(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr))) 81#define VGAIN(addr) MMIO_IN32(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr))) 82#define VGAOUT8(addr,val) MMIO_OUT8(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr)),\ 83 val) 84#define VGAOUT16(addr,val) MMIO_OUT16(ps3v->MapBase,\ 85 (S3V_MMIO_REGSIZE + (addr)), val) 86#define VGAOUT(addr, val) MMIO_OUT32(ps3v->MapBase,\ 87 (S3V_MMIO_REGSIZE + (addr)), val) 88 89#define INREG(addr) MMIO_IN32(ps3v->MapBase, addr) 90#define OUTREG(addr, val) MMIO_OUT32(ps3v->MapBase, addr, val) 91#define NEW_INREG(addr) MMIO_IN32(s3vMmioMem, addr) 92#define NEW_OUTREG(addr, val) MMIO_OUT32(s3vMmioMem, addr, val) 93 94#endif /*_S3V_VGAHWMMIO_H*/ 95 96/******************* s3v_i2c ****************************/ 97 98Bool S3V_I2CInit(ScrnInfoPtr pScrn); 99 100/******************* s3v_accel ****************************/ 101 102void S3VGEReset(ScrnInfoPtr pScrn, int from_timeout, int line, char *file); 103 104 105/*********************************************/ 106/* locals */ 107 108/* Some S3 ViRGE structs */ 109#include "newmmio.h" 110 111/* More ViRGE defines */ 112#include "regs3v.h" 113 114/*********************************************/ 115 116 117 118/* Driver data structure; this should contain all needed info for a mode */ 119/* used to be in s3v_driver.h for pre 4.0 */ 120typedef struct { 121 unsigned char SR08, SR0A, SR0F; 122 unsigned char SR10, SR11, SR12, SR13, SR15, SR18; /* SR9-SR1C, ext seq. */ 123 unsigned char SR29; 124 unsigned char SR54, SR55, SR56, SR57; 125 unsigned char Clock; 126 unsigned char s3DacRegs[0x101]; 127 unsigned char CR31, CR33, CR34, CR36, CR3A, CR3B, CR3C; 128 unsigned char CR40, CR41, CR42, CR43, CR45; 129 unsigned char CR51, CR53, CR54, CR55, CR58, CR5D, CR5E; 130 unsigned char CR63, CR65, CR66, CR67, CR68, CR69, CR6D; /* Video attrib. */ 131 unsigned char CR7B, CR7D; 132 unsigned char CR85, CR86, CR87; 133 unsigned char CR90, CR91, CR92, CR93; 134 unsigned char ColorStack[8]; /* S3 hw cursor color stack CR4A/CR4B */ 135 unsigned int STREAMS[22]; /* Streams regs */ 136 unsigned int MMPR0, MMPR1, MMPR2, MMPR3; /* MIU regs */ 137} S3VRegRec, *S3VRegPtr; 138 139 140/*********************************/ 141/* S3VPortPrivRec */ 142/*********************************/ 143 144typedef struct { 145 unsigned char brightness; 146 unsigned char contrast; 147 FBAreaPtr area; 148 RegionRec clip; 149 CARD32 colorKey; 150 CARD32 videoStatus; 151 Time offTime; 152 Time freeTime; 153 int lastPort; 154} S3VPortPrivRec, *S3VPortPrivPtr; 155 156 157/*************************/ 158/* S3VRec */ 159/*************************/ 160 161typedef struct tagS3VRec { 162 /* accel additions */ 163 CARD32 AccelFlags; 164 CARD32 AccelCmd; 165 CARD32 SrcBaseY, DestBaseY; 166 CARD32 Stride; 167 CARD32 CommonCmd; 168 CARD32 FullPlaneMask; 169 GCPtr CurrentGC; 170 /* fb support */ 171 DrawablePtr CurrentDrawable; 172 /* end accel stuff */ 173 /* ViRGE specifics -start- */ 174 /* Xv support */ 175 XF86VideoAdaptorPtr adaptor; 176 S3VPortPrivPtr portPrivate; 177 178 /* S3V console saved mode registers */ 179 S3VRegRec SavedReg; 180 /* XServer video state mode registers */ 181 S3VRegRec ModeReg; 182 /* HW Cursor info */ 183 xf86CursorInfoPtr CursorInfoRec; 184 /* Flag indicating ModeReg has been */ 185 /* duped from console state. */ 186 Bool ModeStructInit; 187 /* Is STREAMS processor needed for */ 188 /* this mode? */ 189 Bool NeedSTREAMS; 190 /* Is STREAMS running now ? */ 191 Bool STREAMSRunning; 192 /* Compatibility variables */ 193 int vgaCRIndex, vgaCRReg; 194 int Width, Bpp,Bpl, ScissB; 195 /* XAA */ 196 unsigned PlaneMask; 197 int bltbug_width1, bltbug_width2; 198 /* In units as noted, set in PreInit */ 199 int videoRambytes; 200 int videoRamKbytes; 201 /* In Kbytes, set in PreInit */ 202 int MemOffScreen; 203 /* Holds the virtual memory address */ 204 /* returned when the MMIO registers */ 205 /* are mapped with xf86MapPciMem */ 206 unsigned char * MapBase; 207 unsigned char * MapBaseDense; 208 209 /* Same as MapBase, except framebuffer*/ 210 unsigned char * FBBase; 211 /* Current visual FB starting location */ 212 unsigned char * FBStart; 213 /* Cursor storage location */ 214 CARD32 FBCursorOffset; 215 /* Saved CR53 value */ 216 unsigned char EnableMmioCR53; 217 /* Extended reg unlock storage */ 218 unsigned char CR38,CR39,CR40; 219 /* Flag indicating if vgaHWMapMem was */ 220 /* used successfully for this screen */ 221 Bool PrimaryVidMapped; 222 int HorizScaleFactor; 223 Bool bankedMono; 224 /* Memory Clock */ 225 int MCLK; 226 /* input reference Clock */ 227 int REFCLK; 228 /* MX LCD clock */ 229 int LCDClk; 230 /* MX reference clock scale */ 231 double refclk_fact; 232 /* Limit the number of errors */ 233 /* printed using a counter */ 234 int GEResetCnt; 235 /* Accel WaitFifo function */ 236 void (*pWaitFifo)(struct tagS3VRec *, int); 237 /* Accel WaitCmd function */ 238 void (*pWaitCmd)(struct tagS3VRec *); 239 240 /*************************/ 241 /* ViRGE options -start- */ 242 /*************************/ 243 OptionInfoPtr Options; 244 /* Enable PCI burst mode for reads? */ 245 Bool pci_burst; 246 /* Diasable PCI retries */ 247 Bool NoPCIRetry; 248 /* Adjust fifo for acceleration? */ 249 Bool fifo_conservative; 250 Bool fifo_moderate; 251 Bool fifo_aggressive; 252 /* Set memory options */ 253 Bool slow_edodram; 254 Bool slow_dram; 255 Bool fast_dram; 256 Bool fpm_vram; 257 /* Disable Acceleration */ 258 Bool NoAccel; 259 /* Adjust memory ras precharge */ 260 /* timing */ 261 Bool ShowCache; 262 Bool early_ras_precharge; 263 Bool late_ras_precharge; 264 /* MX LCD centering */ 265 Bool lcd_center; 266 /* hardware cursor enabled */ 267 Bool hwcursor; 268 Bool UseFB; 269 Bool mx_cr3a_fix; 270 Bool XVideo; 271 /* ViRGE options -end- */ 272 /***********************/ 273 /* ViRGE specifics -end- */ 274 275 /* Used by ViRGE driver, but generic */ 276 277 /* Pointer used to save wrapped */ 278 /* CloseScreen function. */ 279 CloseScreenProcPtr CloseScreen; 280 /* XAA info Rec */ 281 XAAInfoRecPtr AccelInfoRec; 282 /* PCI info vars. */ 283 pciVideoPtr PciInfo; 284 PCITAG PciTag; 285 /* Chip info, set using PCI */ 286 /* above. */ 287 int Chipset; 288 int ChipRev; 289 /* DGA2 */ 290 DGAModePtr DGAModes; 291 int numDGAModes; 292 Bool DGAactive; 293 int DGAViewportStatus; 294 I2CBusPtr I2C; 295 vbeInfoPtr pVbe; 296 Bool shadowFB; 297 int rotate; 298 unsigned char * ShadowPtr; 299 int ShadowPitch; 300 void (*PointerMoved)(int index, int x, int y); 301 302 /* Used by ViRGE driver, but generic -end- */ 303 304 305} S3VRec, *S3VPtr; 306 307 308#define S3VPTR(p) ((S3VPtr)((p)->driverPrivate)) 309 310 311/* #define S3V_DEBUG */ 312 313#ifdef S3V_DEBUG 314#define PVERB5(arg) ErrorF(arg) 315#define VERBLEV 1 316#else 317#define PVERB5(arg) xf86ErrorFVerb(5, arg) 318#define VERBLEV 5 319#endif 320 321 322/******************* regs3v *******************************/ 323 324/* cep kjb */ 325#define VertDebug 1 326 327/* #ifndef MetroLink */ 328#if !defined (MetroLink) && !defined (VertDebug) 329#define VerticalRetraceWait() do { \ 330 VGAOUT8(vgaCRIndex, 0x17); \ 331 if ( VGAIN8(vgaCRReg) & 0x80 ) { \ 332 while ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) ; \ 333 while ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x08) ; \ 334 while ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) ; \ 335 }\ 336} while (0) 337 338#else 339#define SPIN_LIMIT 1000000 340#define VerticalRetraceWait() do { \ 341 VGAOUT8(vgaCRIndex, 0x17); \ 342 if ( VGAIN8(vgaCRReg) & 0x80 ) { \ 343 volatile unsigned long _spin_me; \ 344 for (_spin_me = 0; \ 345 ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) && _spin_me <= SPIN_LIMIT; \ 346 _spin_me++) ; \ 347 if (_spin_me > SPIN_LIMIT) \ 348 ErrorF("s3v: warning: VerticalRetraceWait timed out(1:3).\n"); \ 349 for (_spin_me = 0; \ 350 ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x08) && _spin_me <= SPIN_LIMIT; \ 351 _spin_me++) ; \ 352 if (_spin_me > SPIN_LIMIT) \ 353 ErrorF("s3v: warning: VerticalRetraceWait timed out(2:3).\n"); \ 354 for (_spin_me = 0; \ 355 ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) && _spin_me <= SPIN_LIMIT; \ 356 _spin_me++) ; \ 357 if (_spin_me > SPIN_LIMIT) \ 358 ErrorF("s3v: warning: VerticalRetraceWait timed out(3:3).\n"); \ 359 } \ 360} while (0) 361#endif 362 363 364/*********************************************************/ 365 366 367/* Various defines which are used to pass flags between the Setup and 368 * Subsequent functions. 369 */ 370 371#define NO_MONO_FILL 0x00 372#define NEED_MONO_FILL 0x01 373#define MONO_TRANSPARENCY 0x02 374 375/* prototypes */ 376/* s3v_dac.c */ 377extern void S3VCommonCalcClock(ScrnInfoPtr pScrn, DisplayModePtr mode, 378 long freq, int min_m, int min_n1, int max_n1, 379 int min_n2, int max_n2, long freq_min, long freq_max, 380 unsigned char * mdiv, unsigned char * ndiv); 381 382/* s3v_accel.c */ 383extern Bool S3VAccelInit(ScreenPtr pScreen); 384extern Bool S3VAccelInit32(ScreenPtr pScreen); 385void S3VAccelSync(ScrnInfoPtr); 386void S3VWaitFifoGX2(S3VPtr ps3v, int slots ); 387void S3VWaitFifoMain(S3VPtr ps3v, int slots ); 388void S3VWaitCmdGX2(S3VPtr ps3v); 389void S3VWaitDummy(S3VPtr ps3v); 390 391/* s3v_hwcurs.c */ 392extern Bool S3VHWCursorInit(ScreenPtr pScreen); 393 394/* s3v_driver.c */ 395void S3VAdjustFrame(int scrnIndex, int x, int y, int flags); 396Bool S3VSwitchMode(int scrnIndex, DisplayModePtr mode, int flags); 397 398/* s3v_dga.c */ 399Bool S3VDGAInit(ScreenPtr pScreen); 400 401/* in s3v_shadow.c */ 402void s3vPointerMoved(int index, int x, int y); 403void s3vRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 404void s3vRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 405void s3vRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 406void s3vRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 407void s3vRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 408 409/* s3v_xv.c X Video Extension support */ 410void S3VInitVideo(ScreenPtr pScreen); 411int S3VQueryXvCapable(ScrnInfoPtr); 412 413#endif /*_S3V_H*/ 414 415 416/*EOF*/ 417 418 419