s3v.h revision ba85709e
1 2/* 3Copyright (C) 1994-1999 The XFree86 Project, Inc. All Rights Reserved. 4 5Permission is hereby granted, free of charge, to any person obtaining a copy of 6this software and associated documentation files (the "Software"), to deal in 7the Software without restriction, including without limitation the rights to 8use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies 9of the Software, and to permit persons to whom the Software is furnished to do 10so, subject to the following conditions: 11 12The above copyright notice and this permission notice shall be included in all 13copies or substantial portions of the Software. 14 15THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FIT- 17NESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 19AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 20WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 21 22Except as contained in this notice, the name of the XFree86 Project shall not 23be used in advertising or otherwise to promote the sale, use or other dealings 24in this Software without prior written authorization from the XFree86 Project. 25*/ 26 27#ifndef _S3V_H 28#define _S3V_H 29 30#include "s3v_pcirename.h" 31 32#include <string.h> 33 34/* All drivers should typically include these */ 35#include "xf86.h" 36#include "xf86_OSproc.h" 37 38/* All drivers need this */ 39 40/* Everything using inb/outb, etc needs "compiler.h" */ 41#include "compiler.h" 42 43/* Drivers for PCI hardware need this */ 44#include "xf86PciInfo.h" 45 46/* Drivers that need to access the PCI config space directly need this */ 47#include "xf86Pci.h" 48 49#include "xf86Cursor.h" 50 51#include "vgaHW.h" 52 53#include "s3v_macros.h" 54 55/* All drivers initialising the SW cursor need this */ 56#include "mipointer.h" 57 58/* All drivers using the mi colormap manipulation need this */ 59#include "micmap.h" 60 61/* fb support */ 62 63#include "fb.h" 64 65/* Drivers using the XAA interface ... */ 66#include "xaa.h" 67#include "xaalocal.h" 68#include "xf86cmap.h" 69#include "xf86i2c.h" 70 71#include "vbe.h" 72 73#include "xf86xv.h" 74#include <X11/extensions/Xv.h> 75#include "fourcc.h" 76 77#ifndef _S3V_VGAHWMMIO_H 78#define _S3V_VGAHWMMIO_H 79 80#define VGAIN8(addr) MMIO_IN8(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr))) 81#define VGAIN16(addr) MMIO_IN16(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr))) 82#define VGAIN(addr) MMIO_IN32(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr))) 83#define VGAOUT8(addr,val) MMIO_OUT8(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr)),\ 84 val) 85#define VGAOUT16(addr,val) MMIO_OUT16(ps3v->MapBase,\ 86 (S3V_MMIO_REGSIZE + (addr)), val) 87#define VGAOUT(addr, val) MMIO_OUT32(ps3v->MapBase,\ 88 (S3V_MMIO_REGSIZE + (addr)), val) 89 90#define INREG(addr) MMIO_IN32(ps3v->MapBase, addr) 91#define OUTREG(addr, val) MMIO_OUT32(ps3v->MapBase, addr, val) 92#define NEW_INREG(addr) MMIO_IN32(s3vMmioMem, addr) 93#define NEW_OUTREG(addr, val) MMIO_OUT32(s3vMmioMem, addr, val) 94 95#endif /*_S3V_VGAHWMMIO_H*/ 96 97/******************* s3v_i2c ****************************/ 98 99Bool S3V_I2CInit(ScrnInfoPtr pScrn); 100 101/******************* s3v_accel ****************************/ 102 103void S3VGEReset(ScrnInfoPtr pScrn, int from_timeout, int line, char *file); 104 105 106/*********************************************/ 107/* locals */ 108 109/* Some S3 ViRGE structs */ 110#include "newmmio.h" 111 112/* More ViRGE defines */ 113#include "regs3v.h" 114 115/*********************************************/ 116 117 118 119/* Driver data structure; this should contain all needed info for a mode */ 120/* used to be in s3v_driver.h for pre 4.0 */ 121typedef struct { 122 unsigned char SR08, SR0A, SR0F; 123 unsigned char SR10, SR11, SR12, SR13, SR15, SR18; /* SR9-SR1C, ext seq. */ 124 unsigned char SR29; 125 unsigned char SR54, SR55, SR56, SR57; 126 unsigned char Clock; 127 unsigned char s3DacRegs[0x101]; 128 unsigned char CR31, CR33, CR34, CR36, CR3A, CR3B, CR3C; 129 unsigned char CR40, CR41, CR42, CR43, CR45; 130 unsigned char CR51, CR53, CR54, CR55, CR58, CR5D, CR5E; 131 unsigned char CR63, CR65, CR66, CR67, CR68, CR69, CR6D; /* Video attrib. */ 132 unsigned char CR7B, CR7D; 133 unsigned char CR85, CR86, CR87; 134 unsigned char CR90, CR91, CR92, CR93; 135 unsigned char ColorStack[8]; /* S3 hw cursor color stack CR4A/CR4B */ 136 unsigned int STREAMS[22]; /* Streams regs */ 137 unsigned int MMPR0, MMPR1, MMPR2, MMPR3; /* MIU regs */ 138} S3VRegRec, *S3VRegPtr; 139 140 141/*********************************/ 142/* S3VPortPrivRec */ 143/*********************************/ 144 145typedef struct { 146 unsigned char brightness; 147 unsigned char contrast; 148 FBAreaPtr area; 149 RegionRec clip; 150 CARD32 colorKey; 151 CARD32 videoStatus; 152 Time offTime; 153 Time freeTime; 154 int lastPort; 155} S3VPortPrivRec, *S3VPortPrivPtr; 156 157 158/*************************/ 159/* S3VRec */ 160/*************************/ 161 162typedef struct tagS3VRec { 163 /* accel additions */ 164 CARD32 AccelFlags; 165 CARD32 AccelCmd; 166 CARD32 SrcBaseY, DestBaseY; 167 CARD32 Stride; 168 CARD32 CommonCmd; 169 CARD32 FullPlaneMask; 170 GCPtr CurrentGC; 171 /* fb support */ 172 DrawablePtr CurrentDrawable; 173 /* end accel stuff */ 174 /* ViRGE specifics -start- */ 175 /* Xv support */ 176 XF86VideoAdaptorPtr adaptor; 177 S3VPortPrivPtr portPrivate; 178 179 /* S3V console saved mode registers */ 180 S3VRegRec SavedReg; 181 /* XServer video state mode registers */ 182 S3VRegRec ModeReg; 183 /* HW Cursor info */ 184 xf86CursorInfoPtr CursorInfoRec; 185 /* Flag indicating ModeReg has been */ 186 /* duped from console state. */ 187 Bool ModeStructInit; 188 /* Is STREAMS processor needed for */ 189 /* this mode? */ 190 Bool NeedSTREAMS; 191 /* Is STREAMS running now ? */ 192 Bool STREAMSRunning; 193 /* Compatibility variables */ 194 int vgaCRIndex, vgaCRReg; 195 int Width, Bpp,Bpl, ScissB; 196 /* XAA */ 197 unsigned PlaneMask; 198 int bltbug_width1, bltbug_width2; 199 /* In units as noted, set in PreInit */ 200 int videoRambytes; 201 int videoRamKbytes; 202 /* In Kbytes, set in PreInit */ 203 int MemOffScreen; 204 /* Holds the virtual memory address */ 205 /* returned when the MMIO registers */ 206 /* are mapped with xf86MapPciMem */ 207 unsigned char * MapBase; 208 unsigned char * MapBaseDense; 209 210 /* Same as MapBase, except framebuffer*/ 211 unsigned char * FBBase; 212 /* Current visual FB starting location */ 213 unsigned char * FBStart; 214 /* Cursor storage location */ 215 CARD32 FBCursorOffset; 216 /* Saved CR53 value */ 217 unsigned char EnableMmioCR53; 218 /* Extended reg unlock storage */ 219 unsigned char CR38,CR39,CR40; 220 /* Flag indicating if vgaHWMapMem was */ 221 /* used successfully for this screen */ 222 Bool PrimaryVidMapped; 223 int HorizScaleFactor; 224 Bool bankedMono; 225 /* Memory Clock */ 226 int MCLK; 227 /* input reference Clock */ 228 int REFCLK; 229 /* MX LCD clock */ 230 int LCDClk; 231 /* MX reference clock scale */ 232 double refclk_fact; 233 /* Limit the number of errors */ 234 /* printed using a counter */ 235 int GEResetCnt; 236 /* Accel WaitFifo function */ 237 void (*pWaitFifo)(struct tagS3VRec *, int); 238 /* Accel WaitCmd function */ 239 void (*pWaitCmd)(struct tagS3VRec *); 240 241 /*************************/ 242 /* ViRGE options -start- */ 243 /*************************/ 244 OptionInfoPtr Options; 245 /* Enable PCI burst mode for reads? */ 246 Bool pci_burst; 247 /* Diasable PCI retries */ 248 Bool NoPCIRetry; 249 /* Adjust fifo for acceleration? */ 250 Bool fifo_conservative; 251 Bool fifo_moderate; 252 Bool fifo_aggressive; 253 /* Set memory options */ 254 Bool slow_edodram; 255 Bool slow_dram; 256 Bool fast_dram; 257 Bool fpm_vram; 258 /* Disable Acceleration */ 259 Bool NoAccel; 260 /* Adjust memory ras precharge */ 261 /* timing */ 262 Bool ShowCache; 263 Bool early_ras_precharge; 264 Bool late_ras_precharge; 265 /* MX LCD centering */ 266 Bool lcd_center; 267 /* hardware cursor enabled */ 268 Bool hwcursor; 269 Bool UseFB; 270 Bool mx_cr3a_fix; 271 Bool XVideo; 272 /* ViRGE options -end- */ 273 /***********************/ 274 /* ViRGE specifics -end- */ 275 276 /* Used by ViRGE driver, but generic */ 277 278 /* Pointer used to save wrapped */ 279 /* CloseScreen function. */ 280 CloseScreenProcPtr CloseScreen; 281 /* XAA info Rec */ 282 XAAInfoRecPtr AccelInfoRec; 283 /* PCI info vars. */ 284 pciVideoPtr PciInfo; 285 PCITAG PciTag; 286 /* Chip info, set using PCI */ 287 /* above. */ 288 int Chipset; 289 int ChipRev; 290 /* DGA2 */ 291 DGAModePtr DGAModes; 292 int numDGAModes; 293 Bool DGAactive; 294 int DGAViewportStatus; 295 I2CBusPtr I2C; 296 vbeInfoPtr pVbe; 297 Bool shadowFB; 298 int rotate; 299 unsigned char * ShadowPtr; 300 int ShadowPitch; 301 void (*PointerMoved)(int index, int x, int y); 302 303 /* Used by ViRGE driver, but generic -end- */ 304 305 306} S3VRec, *S3VPtr; 307 308 309#define S3VPTR(p) ((S3VPtr)((p)->driverPrivate)) 310 311 312/* #define S3V_DEBUG */ 313 314#ifdef S3V_DEBUG 315#define PVERB5(arg) ErrorF(arg) 316#define VERBLEV 1 317#else 318#define PVERB5(arg) xf86ErrorFVerb(5, arg) 319#define VERBLEV 5 320#endif 321 322 323/******************* regs3v *******************************/ 324 325/* cep kjb */ 326#define VertDebug 1 327 328/* #ifndef MetroLink */ 329#if !defined (MetroLink) && !defined (VertDebug) 330#define VerticalRetraceWait() do { \ 331 VGAOUT8(vgaCRIndex, 0x17); \ 332 if ( VGAIN8(vgaCRReg) & 0x80 ) { \ 333 while ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) ; \ 334 while ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x08) ; \ 335 while ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) ; \ 336 }\ 337} while (0) 338 339#else 340#define SPIN_LIMIT 1000000 341#define VerticalRetraceWait() do { \ 342 VGAOUT8(vgaCRIndex, 0x17); \ 343 if ( VGAIN8(vgaCRReg) & 0x80 ) { \ 344 volatile unsigned long _spin_me; \ 345 for (_spin_me = 0; \ 346 ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) && _spin_me <= SPIN_LIMIT; \ 347 _spin_me++) ; \ 348 if (_spin_me > SPIN_LIMIT) \ 349 ErrorF("s3v: warning: VerticalRetraceWait timed out(1:3).\n"); \ 350 for (_spin_me = 0; \ 351 ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x08) && _spin_me <= SPIN_LIMIT; \ 352 _spin_me++) ; \ 353 if (_spin_me > SPIN_LIMIT) \ 354 ErrorF("s3v: warning: VerticalRetraceWait timed out(2:3).\n"); \ 355 for (_spin_me = 0; \ 356 ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) && _spin_me <= SPIN_LIMIT; \ 357 _spin_me++) ; \ 358 if (_spin_me > SPIN_LIMIT) \ 359 ErrorF("s3v: warning: VerticalRetraceWait timed out(3:3).\n"); \ 360 } \ 361} while (0) 362#endif 363 364 365/*********************************************************/ 366 367 368/* Various defines which are used to pass flags between the Setup and 369 * Subsequent functions. 370 */ 371 372#define NO_MONO_FILL 0x00 373#define NEED_MONO_FILL 0x01 374#define MONO_TRANSPARENCY 0x02 375 376/* prototypes */ 377/* s3v_dac.c */ 378extern void S3VCommonCalcClock(ScrnInfoPtr pScrn, DisplayModePtr mode, 379 long freq, int min_m, int min_n1, int max_n1, 380 int min_n2, int max_n2, long freq_min, long freq_max, 381 unsigned char * mdiv, unsigned char * ndiv); 382 383/* s3v_accel.c */ 384extern Bool S3VAccelInit(ScreenPtr pScreen); 385extern Bool S3VAccelInit32(ScreenPtr pScreen); 386void S3VAccelSync(ScrnInfoPtr); 387void S3VWaitFifoGX2(S3VPtr ps3v, int slots ); 388void S3VWaitFifoMain(S3VPtr ps3v, int slots ); 389void S3VWaitCmdGX2(S3VPtr ps3v); 390void S3VWaitDummy(S3VPtr ps3v); 391 392/* s3v_hwcurs.c */ 393extern Bool S3VHWCursorInit(ScreenPtr pScreen); 394 395/* s3v_driver.c */ 396void S3VAdjustFrame(int scrnIndex, int x, int y, int flags); 397Bool S3VSwitchMode(int scrnIndex, DisplayModePtr mode, int flags); 398 399/* s3v_dga.c */ 400Bool S3VDGAInit(ScreenPtr pScreen); 401 402/* in s3v_shadow.c */ 403void s3vPointerMoved(int index, int x, int y); 404void s3vRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 405void s3vRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 406void s3vRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 407void s3vRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 408void s3vRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 409 410/* s3v_xv.c X Video Extension support */ 411void S3VInitVideo(ScreenPtr pScreen); 412int S3VQueryXvCapable(ScrnInfoPtr); 413 414#endif /*_S3V_H*/ 415 416 417/*EOF*/ 418 419 420