initextx.h revision 1fd23544
1/* 2 * X.org/XFree86 specific supplements to init.c/init301.c 3 * 4 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1) Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2) Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3) The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Author: Thomas Winischhofer <thomas@winischhofer.net> 29 * 30 */ 31 32#ifndef _INITEXTX_H_ 33#define _INITEXTX_H_ 34 35#include "osdef.h" 36#include "initdef.h" 37 38#include "sis.h" 39#include "sis_regs.h" 40 41#ifdef SIS315H 42static const struct { 43 unsigned char Ext_ModeID; /* ModeID in new ROM */ 44 unsigned char Ext_MyModeID; /* corresponding ModeID in my tables (0 = identical) */ 45 unsigned short Ext_VESAID; /* corresponding VESA ID in new ROM */ 46} SiS_EModeIDTable661[] = { 47 { 0x6a, 0x00, 0x0102 }, 48 { 0x1d, 0x20, 0x0000 }, 49 { 0x1e, 0x21, 0x0000 }, 50 { 0x1f, 0x22, 0x0000 }, 51 { 0x20, 0x29, 0x0000 }, 52 { 0x21, 0x2a, 0x0000 }, 53 { 0x22, 0x2b, 0x0000 }, 54 { 0x23, 0x00, 0x011c }, 55 { 0x24, 0x00, 0x011d }, 56 { 0x25, 0x00, 0x011e }, 57 { 0x26, 0x00, 0x011f }, 58 { 0x27, 0x00, 0x0120 }, 59 { 0x28, 0x00, 0x0121 }, 60 { 0x2a, 0x14, 0x013d }, 61 { 0x2b, 0x15, 0x013e }, 62 { 0x2c, 0x16, 0x013f }, 63 { 0x2e, 0x00, 0x0101 }, 64 { 0x2f, 0x00, 0x0100 }, 65 { 0x30, 0x00, 0x0103 }, 66 { 0x37, 0x00, 0x0104 }, 67 { 0x38, 0x00, 0x0105 }, 68 { 0x3a, 0x00, 0x0107 }, 69 { 0x3c, 0x00, 0x0125 }, 70 { 0x3d, 0x00, 0x0126 }, 71 { 0x40, 0x00, 0x010d }, 72 { 0x41, 0x00, 0x010e }, 73 { 0x43, 0x00, 0x0110 }, 74 { 0x44, 0x00, 0x0111 }, 75 { 0x46, 0x00, 0x0113 }, 76 { 0x47, 0x00, 0x0114 }, 77 { 0x49, 0x00, 0x0116 }, 78 { 0x4a, 0x00, 0x0117 }, 79 { 0x4c, 0x00, 0x0119 }, 80 { 0x4d, 0x00, 0x011a }, 81 { 0x50, 0x00, 0x0127 }, 82 { 0x51, 0x00, 0x0128 }, 83 { 0x52, 0x00, 0x0129 }, 84 { 0x53, 0x1a, 0x0141 }, 85 { 0x54, 0x1b, 0x0142 }, 86 { 0x55, 0x1c, 0x0143 }, 87 { 0x56, 0x00, 0x012a }, 88 { 0x57, 0x00, 0x012b }, 89 { 0x58, 0x00, 0x012c }, 90 { 0x59, 0x00, 0x012d }, 91 { 0x5a, 0x17, 0x012e }, 92 { 0x5b, 0x18, 0x012f }, 93 { 0x5c, 0x19, 0x0130 }, 94 { 0x5d, 0x00, 0x0131 }, 95 { 0x62, 0x00, 0x0112 }, 96 { 0x63, 0x00, 0x0115 }, 97 { 0x64, 0x00, 0x0118 }, 98 { 0x65, 0x00, 0x011b }, 99 { 0x66, 0x00, 0x0132 }, 100 { 0x75, 0x00, 0x013a }, 101 { 0x78, 0x00, 0x013b }, 102 { 0x79, 0x00, 0x013c }, 103 { 0x7b, 0x7c, 0x0136 }, 104 { 0x7c, 0x7d, 0x0137 }, 105 { 0x7d, 0x7e, 0x0138 }, 106 { 0xff, 0xff, 0xffff } 107}; 108#endif 109 110#define SIS_PL_HSYNCP 0x01 111#define SIS_PL_HSYNCN 0x02 112#define SIS_PL_VSYNCP 0x04 113#define SIS_PL_VSYNCN 0x08 114#define SIS_PL_DVI 0x80 115 116struct SiS_PlasmaModes 117{ 118 const char *name; 119 unsigned int clock; 120 unsigned short HDisplay, HTotal, HFrontPorch, HSyncWidth; 121 unsigned short VDisplay, VTotal, VFrontPorch, VSyncWidth; 122 unsigned char SyncFlags; 123}; 124 125struct SiS_PlasmaTables 126{ 127 unsigned short vendor; 128 unsigned char productnum; 129 unsigned short product[5]; 130 const char *DDCnames[5]; 131 const char *plasmaname; 132 unsigned short maxx,maxy; 133 unsigned short prefx, prefy; 134 unsigned char modenum; 135 unsigned char plasmamodes[20]; /* | 0x80 = DVI-capable, | 0x40 = analog */ 136}; 137 138static const struct SiS_PlasmaModes SiS_PlasmaMode[] = { 139 { "640x400", /* 00: IBM 400@70 */ 140 25175, 141 640, 800, 17, 64, 142 400, 449, 13, 2, 143 SIS_PL_HSYNCN | SIS_PL_VSYNCN }, 144 { "640x480", /* 01: VESA 480@72 */ 145 31500, 146 640, 832, 24, 40, 147 480, 520, 9, 3, 148 SIS_PL_HSYNCN | SIS_PL_VSYNCN }, 149 { "800x600", /* 02: VESA 600@72 */ 150 50000, 151 800, 1040, 56, 120, 152 600, 666, 37, 6, 153 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 154 { "864x480", /* 03: Cereb wide 1 */ 155 42526, 156 864, 1134, 22, 86, 157 480, 500, 1, 3, 158 SIS_PL_HSYNCP | SIS_PL_VSYNCN }, 159 { "848x480", /* 04: VESA wide (NEC1) */ 160 33750, 161 848, 1088, 16, 112, 162 480, 517, 6, 8, 163 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 164 { "1024x576", /* 05: VESA wide (NEC2) */ 165 47250, 166 1024, 1320, 16, 144, 167 576, 596, 2, 4, 168 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 169 { "1280x720", /* 06: VESA wide (NEC3) */ 170 76500, 171 1280, 1696, 48, 176, 172 720, 750, 4, 8, 173 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 174 { "1360x765", /* 07: VESA wide (NEC4) */ 175 85500, 176 1360, 1792, 64, 176, 177 765, 795, 4, 8, 178 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 179 { "1024x600", /* 08: CEREB wide 2 */ 180 51200, 181 1024, 1352, 51, 164, 182 600, 628, 1, 4, 183 SIS_PL_HSYNCN | SIS_PL_VSYNCP }, 184 { "1024x768", /* 09: VESA 768@75 */ 185 78750, 186 1024, 1312, 16, 96, 187 768, 800, 1, 3, 188 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 189 { "1152x864", /* 10: VESA 1152x864@75 */ 190 108000, 191 1152, 1600, 64, 128, 192 864, 900, 1, 3, 193 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 194 { "1280x1024", /* 11: VESA 1024@60 */ 195 108000, 196 1280, 1688, 48, 112, 197 1024, 1066, 1, 3, 198 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 199 { "1280x768", /* 12: W_XGA */ 200 81000, 201 1280, 1688, 48, 112, 202 768, 802, 3, 6, 203 SIS_PL_HSYNCP | SIS_PL_VSYNCN }, 204 { "1280x768", /* 13: I/O Data W_XGA@56Hz */ 205 76064, 206 1280, 1688, 48, 112, 207 768, 802, 2, 3, 208 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 209 { "1376x768", /* 14: I/O Wide XGA */ 210 87340, 211 1376, 1808, 32, 128, 212 768, 806, 3, 6, 213 SIS_PL_HSYNCN | SIS_PL_VSYNCP }, 214 { "1280x960", /* 15: VESA 960@60 */ 215 108000, 216 1280, 1800, 96, 112, 217 960, 1000, 1, 3, 218 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 219 { "1400x1050", /* 16: VESA 1050@60Hz */ 220 108000, 221 1400, 1688, 48, 112, 222 1050, 1066, 1, 3, 223 SIS_PL_HSYNCN | SIS_PL_VSYNCN }, 224 { "1360x768", /* 17: VESA wide (NEC4/2) */ 225 85500, 226 1360, 1792, 64, 112, 227 765, 795, 3, 6, 228 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 229 { "800x600", /* 18: VESA 600@56 */ 230 36000, 231 800, 1024, 24, 2, 232 600, 625, 1, 2, 233 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 234 { "1072x600", /* 19: Panasonic 1072x600 (sync?) */ 235 54100, 236 1072, 1424, 48, 176, 237 600, 628, 16, 1, 238 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 239 { "848x480", /* 20: Panasonic 848x480 (sync?) */ 240 33070, /* is 852x480, but we can't use 852 */ 241 848, 1068, 20, 40, /* differs from DDC data, better centered */ 242 480, 516, 3, 5, /* won't work assumingly, because data is % 8 */ 243 SIS_PL_HSYNCN | SIS_PL_VSYNCN }, 244 { "1280x720", /* 21: WIDE720(60) (aka "750p") (Panasonic) */ 245 74300, 246 1280, 1650,110, 40, 247 720, 750, 5, 5, 248 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 249 { "1280x768", /* 22: 1280x768@56.5 (Panasonic) */ 250 76200, /* (According to manual not supported for HDMI; but works) */ 251 1280, 1680, 16, 24, 252 768, 802, 2, 5, 253 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 254 { "1280x720@50", /* 23: WIDE720(50) (aka "750p") (Panasonic) */ 255 74300, /* Panasonic states 45.0kHz. Not possible. This one works (with some overscan) */ 256 1280, 1980,400, 80, 257 720, 750, 1, 2, 258 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 259 { "720x480", /* 24: 720x480 (aka "525p" and "480p") (Panasonic) */ 260 27000, 261 720, 856, 40, 32, 262 480, 525, 1, 3, 263 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 264 { "720x576", /* 25: 720x576 (aka "625p"and "576p") (Panasonic) */ 265 27500, 266 720, 864, 16, 64, 267 576, 625, 5, 6, 268 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 269 { "1280x720@50", /* 26: WIDE720(50) (aka "750p") (Generic) */ 270 74300, 271 1280, 1980,400, 80, 272 720, 750, 5, 5, 273 SIS_PL_HSYNCP | SIS_PL_VSYNCP }, 274}; 275 276/* 27727.00 720 755 791 858 480 480 484 525 27827.50 720 732 795 864 576 581 587 625 279*/ 280 281static const struct SiS_PlasmaTables SiS_PlasmaTable[] = { 282#if 0 /* Product IDs missing */ 283 { 0x38a3, 4, 284 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 285 { "", "", "", "", "" }, 286 "NEC PlasmaSync 42VP4/42VP4D/42VP4G/42VP4DG", 287 0, 0, 288 0, 0, 289 11, /* All DVI, except 0, 7, 13 */ 290 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 7|0x40, 9|0xc0,10|0xc0,11|0xc0,13|0x40,14|0xc0, 291 17|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 292 }, 293#endif 294#if 0 /* Product IDs missing */ 295 { 0x38a3, 3, 296 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 297 { "", "", "", "", "" }, 298 "NEC PlasmaSync 42PD1/50PD1/50PD2", 299 0, 0, 300 0, 0, 301 5, /* DVI entirely unknown */ 302 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 9|0xc0, 0 , 0 , 0 , 0 , 0 , 303 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 304 }, 305 { 0x38a3, 1, 306 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 307 { "", "", "", "", "" }, 308 "NEC PlasmaSync 42PD3", 309 0, 0, 310 0, 0, 311 10, /* DVI entirely unknown */ 312 { 0|0x40, 1|0xc0, 2|0xc0, 3|0xc0, 4|0xc0, 5|0xc0, 6|0xc0, 7|0x40, 8|0xc0, 9|0xc0, 313 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 314 }, 315 { 0x38a3, 2, 316 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 317 { "", "", "", "", "" }, 318 "NEC PlasmaSync 42VM3/61XM1", 319 0, 0, 320 0, 0, 321 11, /* DVI entirely unknown */ 322 { 0|0x40, 1|0xc0, 2|0xc0, 3|0xc0, 4|0xc0, 5|0xc0, 6|0xc0, 8|0xc0, 9|0xc0,11|0xc0, 323 17|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 324 }, 325 { 0x38a3, 2, 326 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 327 { "", "", "", "", "" }, 328 "NEC PlasmaSync 42MP1/42MP2", 329 0, 0, 330 0, 0, 331 6, /* DVI entirely unknown */ 332 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 9|0xc0,11|0xc0, 0 , 0 , 0 , 0 , 333 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 334 }, 335 { 0x38a3, 1, 336 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 337 { "", "", "", "", "" }, 338 "NEC PlasmaSync 50MP1", 339 0, 0, 340 0, 0, 341 10, /* DVI entirely unknown */ 342 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 7|0x40, 9|0xc0,10|0xc0,11|0xc0,13|0x40,14|0xc0, 343 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 344 }, 345#endif 346 { 0x38a3, 4, 347 { 0xa482, 0xa483, 0x0000, 0x0000, 0x0000 }, 348 { "PX-42VM", "", "", "", "" }, 349 "NEC PlasmaSync 42MP3/42MP4/50MP2/61MP1", 350 0, 0, 351 0, 0, 352 11, /* All DVI except 0, 7, 13, 17 */ 353 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 7|0x40, 9|0xc0,10|0xc0,11|0xc0,13|0x40,14|0xc0, 354 17|0x40, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 355 }, 356#if 0 /* Product IDs missing */ 357 { 0x38a3, 1, 358 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 359 { "", "", "", "", "" }, 360 "NEC PlasmaSync 3300W", 361 0, 0, 362 0, 0, 363 3, 364 { 0|0x40, 1|0xc0,18|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 365 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 366 }, 367 { 0x38a3, 1, 368 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 369 { "", "", "", "", "" }, 370 "NEC PlasmaSync 4200W", 371 4, /* DVI entirely unknown */ 372 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 373 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 374 }, 375 { 0x38a3, 1, 376 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 377 { "", "", "", "", "" }, 378 "NEC PlasmaSync 4210W", 379 0, 0, 380 0, 0, 381 6, /* DVI entirely unknown */ 382 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 9|0xc0,11|0xc0, 0 , 0 , 0 , 0 , 383 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 384 }, 385 { 0x38a3, 1, 386 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 387 { "", "", "", "", "" }, 388 "NEC PlasmaSync 5000W", 389 0, 0, 390 0, 0, 391 7, /* DVI entirely unknown */ 392 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 7|0x40, 9|0xc0,11|0xc0, 0 , 0 , 0 , 393 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 394 }, 395#endif 396 { 0x412f, 2, 397 { 0x000c, 0x000b, 0x0000, 0x0000, 0x0000 }, 398 { "", "", "", "", "" }, 399 "Pioneer 503CMX/PDA-5002", 400 0, 0, 401 0, 0, 402 6, /* DVI unknown */ 403 { 1|0xc0, 2|0xc0, 9|0xc0,11|0xc0,12|0xc0,15|0xc0, 0 , 0 , 0 , 0 , 404 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 405 }, 406 { 0x34a9, 1, 407 { 0xa00e, 0x0000, 0x0000, 0x0000, 0x0000 }, 408 { "", "", "", "", "" }, 409 "Panasonic TH-42", 410 0, 0, 411 0, 0, 412 5, /* No DVI output */ 413 { 1|0x40, 2|0x40, 4|0x40, 9|0x40,15|0x40, 0 , 0 , 0 , 0 , 0 , 414 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 415 }, 416 { 0x34a9, 1, 417 { 0xa005, 0x0000, 0x0000, 0x0000, 0x0000 }, 418 { "TH-42PW*4", "", "", "", "" }, 419 "Panasonic TH-42PW5", 420 0, 0, 421 0, 0, 422 1, /* No special modes otherwise; no DVI. */ 423 {20|0x40,19|0x40, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 424 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 425 }, 426 { 0x4c2e, 1, 427 { 0x9b05, 0x0000, 0x0000, 0x0000, 0x0000 }, 428 { "PLV-Z2", "", "", "", "" }, 429 "Sanyo PLV-Z2 (non HDCP-mode)", /* HDCP mode would be id 9b06, but not needed */ 430 1280, 768, /* as it then advertises correct size */ 431 1280, 720, 432 1, /* 1280x720, no special modes otherwise */ 433 {21|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 434 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 435 }, 436 { 0x34a9, 1, 437 { 0xd034, 0x0000, 0x0000, 0x0000, 0x0000 }, 438 { "AE500U (DVI-D)", "", "", "", "" }, 439 "Panasonic AE500U", 440 1280, 768, 441 1280, 720, 442 1, /* 1280x720, no special modes otherwise */ 443 {21|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 444 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 445 }, 446 { 0x34a9, 1, 447 { 0xd043, 0x0000, 0x0000, 0x0000, 0x0000 }, 448 { "AE700U (HDMI)", "", "", "", "" }, 449 "Panasonic AE700U", 450 1360, 768, 451 1280, 720, 452 6, /* 1280x720/60, 1280x720/50, 1280x768@56(digital/analog), 720x480, 720x576 */ 453 {21|0xc0,23|0xc0,22|0x80,13|0x40,24|0x80,25|0x80, 0 , 0 , 0 , 0 , 454 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 455 }, 456 { 0x0000 } 457}; 458 459unsigned short SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, unsigned int VBFlags); 460DisplayModePtr SiSBuildBuiltInModeList(ScrnInfoPtr pScrn, BOOLEAN, BOOLEAN, BOOLEAN, BOOLEAN); 461int SiSTranslateToVESA(ScrnInfoPtr pScrn, int modenumber); 462int SiSTranslateToOldMode(int modenumber); 463BOOLEAN SiS_GetPanelID(struct SiS_Private *SiS_Pr); 464 465unsigned short SiS_SenseLCDDDC(struct SiS_Private *SiS_Pr, SISPtr pSiS); 466unsigned short SiS_SenseVGA2DDC(struct SiS_Private *SiS_Pr, SISPtr pSiS); 467 468void SiS_CalcXTapScaler(struct SiS_Private *SiS_Pr, int srcsize, int destsize, int taps, Bool ishoriz); 469void SiS_SetGroup2_C_ELV(struct SiS_Private *SiS_Pr, unsigned short ModeNo, 470 unsigned short ModeIdIndex, unsigned short RefreshRateTableIndex); 471 472extern unsigned char SiS_GetReg(SISIOADDRESS port, unsigned short index); 473extern void SiS_SetReg(SISIOADDRESS port, unsigned short index, unsigned short data); 474extern void SiS_SetRegOR(SISIOADDRESS, unsigned short, unsigned short); 475extern void SiS_SetRegAND(SISIOADDRESS, unsigned short, unsigned short); 476extern void SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND, 477 unsigned short DataOR); 478extern int SiS_compute_vclk(int Clock, int *out_n, int *out_dn, int *out_div, 479 int *out_sbit, int *out_scale); 480extern void SiSCalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned int *vclk); 481extern void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); 482extern BOOLEAN SiSInitPtr(struct SiS_Private *SiS_Pr); 483extern unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); 484extern unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); 485extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, 486 int xres, int yres, DisplayModePtr current); 487 488extern unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, 489 unsigned short adaptnum, unsigned short DDCdatatype, BOOLEAN checkcr32, 490 unsigned int VBFlags2); 491extern unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); 492extern unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, 493 unsigned char *buffer); 494 495#endif 496 497 498 499