sis_cursor.h revision 72b676d7
172b676d7Smrg/* $XFree86$ */
272b676d7Smrg/* $XdotOrg$ */
372b676d7Smrg/*
472b676d7Smrg * SiS hardware cursor handling
572b676d7Smrg * Definitions
672b676d7Smrg *
772b676d7Smrg * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria.
872b676d7Smrg *
972b676d7Smrg * Redistribution and use in source and binary forms, with or without
1072b676d7Smrg * modification, are permitted provided that the following conditions
1172b676d7Smrg * are met:
1272b676d7Smrg * 1) Redistributions of source code must retain the above copyright
1372b676d7Smrg *    notice, this list of conditions and the following disclaimer.
1472b676d7Smrg * 2) Redistributions in binary form must reproduce the above copyright
1572b676d7Smrg *    notice, this list of conditions and the following disclaimer in the
1672b676d7Smrg *    documentation and/or other materials provided with the distribution.
1772b676d7Smrg * 3) The name of the author may not be used to endorse or promote products
1872b676d7Smrg *    derived from this software without specific prior written permission.
1972b676d7Smrg *
2072b676d7Smrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
2172b676d7Smrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
2272b676d7Smrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
2372b676d7Smrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2472b676d7Smrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2572b676d7Smrg * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2672b676d7Smrg * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2772b676d7Smrg * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2872b676d7Smrg * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2972b676d7Smrg * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3072b676d7Smrg *
3172b676d7Smrg * Author:   Thomas Winischhofer <thomas@winischhofer.net>
3272b676d7Smrg *
3372b676d7Smrg * Idea based on code by Can-Ru Yeou, SiS Inc.
3472b676d7Smrg *
3572b676d7Smrg */
3672b676d7Smrg
3772b676d7Smrg#define CS(x)   (0x8500 + (x << 2))
3872b676d7Smrg
3972b676d7Smrg/* 300 series, CRT1 */
4072b676d7Smrg
4172b676d7Smrg/* 80000000 = RGB(1) - MONO(0)
4272b676d7Smrg * 40000000 = enable(1) - disable(0)
4372b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB
4472b676d7Smrg * 10000000 = "ghost"(1) - [other effect](0)
4572b676d7Smrg */
4672b676d7Smrg
4772b676d7Smrg#define sis300GetCursorStatus \
4872b676d7Smrg  SIS_MMIO_IN32(pSiS->IOBase, CS(0)) & 0x40000000;
4972b676d7Smrg
5072b676d7Smrg#define sis300SetCursorStatus(status) \
5172b676d7Smrg  { \
5272b676d7Smrg  ULong temp; \
5372b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
5472b676d7Smrg  temp &= 0xbfffffff; \
5572b676d7Smrg  temp |= status; \
5672b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
5772b676d7Smrg  }
5872b676d7Smrg
5972b676d7Smrg#define sis300EnableHWCursor() \
6072b676d7Smrg  { \
6172b676d7Smrg  ULong temp; \
6272b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
6372b676d7Smrg  temp &= 0x0fffffff; \
6472b676d7Smrg  temp |= 0x40000000; \
6572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
6672b676d7Smrg  }
6772b676d7Smrg
6872b676d7Smrg#define sis300EnableHWARGBCursor() \
6972b676d7Smrg  { \
7072b676d7Smrg  ULong temp; \
7172b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
7272b676d7Smrg  temp |= 0xF0000000; \
7372b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
7472b676d7Smrg  }
7572b676d7Smrg
7672b676d7Smrg#define sis300EnableHWARGB16Cursor() \
7772b676d7Smrg  { \
7872b676d7Smrg  ULong temp; \
7972b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
8072b676d7Smrg  temp &= 0x0fffffff; \
8172b676d7Smrg  temp |= 0xD0000000; \
8272b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
8372b676d7Smrg  }
8472b676d7Smrg
8572b676d7Smrg#define sis300SwitchToMONOCursor() \
8672b676d7Smrg  { \
8772b676d7Smrg  ULong temp; \
8872b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
8972b676d7Smrg  temp &= 0x4fffffff; \
9072b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
9172b676d7Smrg  }
9272b676d7Smrg
9372b676d7Smrg#define sis300SwitchToRGBCursor() \
9472b676d7Smrg  { \
9572b676d7Smrg  ULong temp; \
9672b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
9772b676d7Smrg  temp |= 0xB0000000; \
9872b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
9972b676d7Smrg  }
10072b676d7Smrg
10172b676d7Smrg#define sis300DisableHWCursor()\
10272b676d7Smrg  { \
10372b676d7Smrg  ULong temp; \
10472b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
10572b676d7Smrg  temp &= 0xbFFFFFFF; \
10672b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
10772b676d7Smrg  }
10872b676d7Smrg
10972b676d7Smrg#define sis300SetCursorBGColor(color)\
11072b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(1), (color));
11172b676d7Smrg#define sis300SetCursorFGColor(color)\
11272b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(2), (color));
11372b676d7Smrg
11472b676d7Smrg#define sis300SetCursorPositionX(x,preset)\
11572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(3), ((x) | ((preset) << 16)));
11672b676d7Smrg#define sis300SetCursorPositionY(y,preset)\
11772b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(4), ((y) | ((preset) << 16)));
11872b676d7Smrg
11972b676d7Smrg#define sis300SetCursorAddress(address)\
12072b676d7Smrg  { \
12172b676d7Smrg  ULong temp; \
12272b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
12372b676d7Smrg  temp &= 0xF0FF0000; \
12472b676d7Smrg  temp |= address; \
12572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase,CS(0),temp); \
12672b676d7Smrg  }
12772b676d7Smrg
12872b676d7Smrg/* 300 series, CRT2 */
12972b676d7Smrg
13072b676d7Smrg/* 80000000 = RGB(1) - MONO(0)
13172b676d7Smrg * 40000000 = enable(1) - disable(0)
13272b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB
13372b676d7Smrg * 10000000 = unused (always "ghosting")
13472b676d7Smrg */
13572b676d7Smrg
13672b676d7Smrg#define sis301GetCursorStatus \
13772b676d7Smrg  SIS_MMIO_IN32(pSiS->IOBase, CS(8)) & 0x40000000;
13872b676d7Smrg
13972b676d7Smrg#define sis301SetCursorStatus(status) \
14072b676d7Smrg  { \
14172b676d7Smrg  ULong temp; \
14272b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \
14372b676d7Smrg  temp &= 0xbfffffff; \
14472b676d7Smrg  temp |= status; \
14572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
14672b676d7Smrg  }
14772b676d7Smrg
14872b676d7Smrg#define sis301EnableHWCursor()\
14972b676d7Smrg  { \
15072b676d7Smrg  ULong temp; \
15172b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \
15272b676d7Smrg  temp &= 0x0fffffff; \
15372b676d7Smrg  temp |= 0x40000000; \
15472b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
15572b676d7Smrg  }
15672b676d7Smrg
15772b676d7Smrg#define sis301EnableHWARGBCursor()\
15872b676d7Smrg  { \
15972b676d7Smrg  ULong temp; \
16072b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \
16172b676d7Smrg  temp |= 0xF0000000; \
16272b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
16372b676d7Smrg  }
16472b676d7Smrg
16572b676d7Smrg#define sis301EnableHWARGB16Cursor()\
16672b676d7Smrg  { \
16772b676d7Smrg  ULong temp; \
16872b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \
16972b676d7Smrg  temp &= 0x0FFFFFFF; \
17072b676d7Smrg  temp |= 0xD0000000; \
17172b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
17272b676d7Smrg  }
17372b676d7Smrg
17472b676d7Smrg#define sis301SwitchToRGBCursor() \
17572b676d7Smrg  { \
17672b676d7Smrg  ULong temp; \
17772b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \
17872b676d7Smrg  temp |= 0xB0000000; \
17972b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
18072b676d7Smrg  }
18172b676d7Smrg
18272b676d7Smrg#define sis301SwitchToMONOCursor() \
18372b676d7Smrg  { \
18472b676d7Smrg  ULong temp; \
18572b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \
18672b676d7Smrg  temp &= 0x4fffffff; \
18772b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
18872b676d7Smrg  }
18972b676d7Smrg
19072b676d7Smrg#define sis301DisableHWCursor()\
19172b676d7Smrg  { \
19272b676d7Smrg  ULong temp; \
19372b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \
19472b676d7Smrg  temp &= 0xbFFFFFFF; \
19572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
19672b676d7Smrg  }
19772b676d7Smrg
19872b676d7Smrg#define sis301SetCursorBGColor(color)\
19972b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(9), (color));
20072b676d7Smrg#define sis301SetCursorFGColor(color)\
20172b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(10), (color));
20272b676d7Smrg
20372b676d7Smrg#define sis301SetCursorPositionX(x,preset)\
20472b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), ((x) | ((preset) << 16)));
20572b676d7Smrg#define sis301SetCursorPositionY(y,preset)\
20672b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), ((y) | ((preset) << 16)));
20772b676d7Smrg
20872b676d7Smrg#define sis301SetCursorAddress(address)\
20972b676d7Smrg  { \
21072b676d7Smrg  ULong temp; \
21172b676d7Smrg  temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \
21272b676d7Smrg  temp &= 0xF0FF0000; \
21372b676d7Smrg  temp |= address; \
21472b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase,CS(8),temp); \
21572b676d7Smrg  }
21672b676d7Smrg
21772b676d7Smrg/* 315/330 series CRT1 */
21872b676d7Smrg
21972b676d7Smrg/* 80000000 = RGB(1) - MONO(0)
22072b676d7Smrg * 40000000 = enable(1) - disable(0)
22172b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB
22272b676d7Smrg * 10000000 = "ghost"(1) - Alpha Blend(0)
22372b676d7Smrg */
22472b676d7Smrg
22572b676d7Smrg#define sis310GetCursorStatus \
22672b676d7Smrg  SIS_MMIO_IN32(pSiS->IOBase, CS(0)) & 0x40000000;
22772b676d7Smrg
22872b676d7Smrg#define sis310SetCursorStatus(status) \
22972b676d7Smrg  pSiS->HWCursorBackup[0] &= 0xbfffffff; \
23072b676d7Smrg  pSiS->HWCursorBackup[0] |= status; \
23172b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \
23272b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \
23372b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]);
23472b676d7Smrg
23572b676d7Smrg#define sis310EnableHWCursor()\
23672b676d7Smrg  pSiS->HWCursorBackup[0] &= 0x0fffffff; \
23772b676d7Smrg  pSiS->HWCursorBackup[0] |= 0x40000000; \
23872b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \
23972b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \
24072b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]);
24172b676d7Smrg
24272b676d7Smrg#define sis310EnableHWARGBCursor()\
24372b676d7Smrg  pSiS->HWCursorBackup[0] &= 0x0FFFFFFF; \
24472b676d7Smrg  pSiS->HWCursorBackup[0] |= 0xE0000000; \
24572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \
24672b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \
24772b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]);
24872b676d7Smrg
24972b676d7Smrg#define sis310SwitchToMONOCursor() \
25072b676d7Smrg  pSiS->HWCursorBackup[0] &= 0x4fffffff; \
25172b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \
25272b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \
25372b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]);
25472b676d7Smrg
25572b676d7Smrg#define sis310SwitchToRGBCursor() \
25672b676d7Smrg  pSiS->HWCursorBackup[0] &= 0xBFFFFFFF; \
25772b676d7Smrg  pSiS->HWCursorBackup[0] |= 0xA0000000; \
25872b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \
25972b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \
26072b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]);
26172b676d7Smrg
26272b676d7Smrg#define sis310DisableHWCursor()\
26372b676d7Smrg  pSiS->HWCursorBackup[0] &= 0xBFFFFFFF; \
26472b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \
26572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \
26672b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]);
26772b676d7Smrg
26872b676d7Smrg#define sis310SetCursorBGColor(color) \
26972b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(1), (color)); \
27072b676d7Smrg  pSiS->HWCursorBackup[1] = color;
27172b676d7Smrg
27272b676d7Smrg#define sis310SetCursorFGColor(color)\
27372b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(2), (color)); \
27472b676d7Smrg  pSiS->HWCursorBackup[2] = color;
27572b676d7Smrg
27672b676d7Smrg#define sis310SetCursorPositionX(x,preset) \
27772b676d7Smrg  pSiS->HWCursorBackup[3] = ((x) | ((preset) << 16)); \
27872b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]);
27972b676d7Smrg
28072b676d7Smrg#define sis310SetCursorPositionY(y,preset) \
28172b676d7Smrg  pSiS->HWCursorBackup[4] = ((y) | ((preset) << 16)); \
28272b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]);
28372b676d7Smrg
28472b676d7Smrg#define sis310SetCursorAddress(address)\
28572b676d7Smrg  pSiS->HWCursorBackup[0] &= 0xF0F00000; \
28672b676d7Smrg  pSiS->HWCursorBackup[0] |= address; \
28772b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \
28872b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(1), pSiS->HWCursorBackup[1]); \
28972b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(2), pSiS->HWCursorBackup[2]); \
29072b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \
29172b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]);
29272b676d7Smrg
29372b676d7Smrg/* 315 series CRT2 */
29472b676d7Smrg
29572b676d7Smrg/* 80000000 = RGB(1) - MONO(0)
29672b676d7Smrg * 40000000 = enable(1) - disable(0)
29772b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB
29872b676d7Smrg * 10000000 = "ghost"(1) - Alpha Blend(0)  ?
29972b676d7Smrg */
30072b676d7Smrg
30172b676d7Smrg#define sis301GetCursorStatus310 \
30272b676d7Smrg  SIS_MMIO_IN32(pSiS->IOBase, CS(8)) & 0x40000000;
30372b676d7Smrg
30472b676d7Smrg#define sis301SetCursorStatus310(status) \
30572b676d7Smrg  pSiS->HWCursorBackup[8] &= 0xbfffffff; \
30672b676d7Smrg  pSiS->HWCursorBackup[8] |= status; \
30772b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8),  pSiS->HWCursorBackup[8]); \
30872b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \
30972b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]);
31072b676d7Smrg
31172b676d7Smrg#define sis301EnableHWCursor310()\
31272b676d7Smrg  pSiS->HWCursorBackup[8] &= 0x0fffffff; \
31372b676d7Smrg  pSiS->HWCursorBackup[8] |= 0x40000000; \
31472b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8),  pSiS->HWCursorBackup[8]); \
31572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \
31672b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]);
31772b676d7Smrg
31872b676d7Smrg#define sis301EnableHWARGBCursor310()\
31972b676d7Smrg  pSiS->HWCursorBackup[8] &= 0x0FFFFFFF; \
32072b676d7Smrg  pSiS->HWCursorBackup[8] |= 0xE0000000; \
32172b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8),  pSiS->HWCursorBackup[8]); \
32272b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \
32372b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]);
32472b676d7Smrg
32572b676d7Smrg#define sis301SwitchToRGBCursor310() \
32672b676d7Smrg  pSiS->HWCursorBackup[8] &= 0xBFFFFFFF; \
32772b676d7Smrg  pSiS->HWCursorBackup[8] |= 0xA0000000; \
32872b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8),  pSiS->HWCursorBackup[8]); \
32972b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \
33072b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]);
33172b676d7Smrg
33272b676d7Smrg#define sis301SwitchToMONOCursor310() \
33372b676d7Smrg  pSiS->HWCursorBackup[8] &= 0x4fffffff; \
33472b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8),  pSiS->HWCursorBackup[8]); \
33572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \
33672b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]);
33772b676d7Smrg
33872b676d7Smrg#define sis301DisableHWCursor310()\
33972b676d7Smrg  pSiS->HWCursorBackup[8] &= 0xBFFFFFFF; \
34072b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8),  pSiS->HWCursorBackup[8]); \
34172b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \
34272b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]);
34372b676d7Smrg
34472b676d7Smrg#define sis301SetCursorBGColor310(color) \
34572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(9), (color)); \
34672b676d7Smrg  pSiS->HWCursorBackup[9] = color;
34772b676d7Smrg
34872b676d7Smrg#define sis301SetCursorFGColor310(color) \
34972b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(10), (color)); \
35072b676d7Smrg  pSiS->HWCursorBackup[10] = color;
35172b676d7Smrg
35272b676d7Smrg#define sis301SetCursorPositionX310(x,preset) \
35372b676d7Smrg  pSiS->HWCursorBackup[11] = ((x) | ((preset) << 16)); \
35472b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]);
35572b676d7Smrg
35672b676d7Smrg#define sis301SetCursorPositionY310(y,preset) \
35772b676d7Smrg  pSiS->HWCursorBackup[12] = ((y) | ((preset) << 16)); \
35872b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]);
35972b676d7Smrg
36072b676d7Smrg#define sis301SetCursorAddress310(address) \
36172b676d7Smrg  if(pSiS->ChipType == SIS_315H) { \
36272b676d7Smrg     if(address & 0x10000) { \
36372b676d7Smrg        address &= ~0x10000; \
36472b676d7Smrg	orSISIDXREG(SISSR, 0x37, 0x80); \
36572b676d7Smrg     } else { \
36672b676d7Smrg        andSISIDXREG(SISSR, 0x37, 0x7f); \
36772b676d7Smrg     } \
36872b676d7Smrg  } \
36972b676d7Smrg  pSiS->HWCursorBackup[8] &= 0xF0F00000; \
37072b676d7Smrg  pSiS->HWCursorBackup[8] |= address; \
37172b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8),  pSiS->HWCursorBackup[8]);  \
37272b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(9),  pSiS->HWCursorBackup[9]);  \
37372b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(10), pSiS->HWCursorBackup[10]); \
37472b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \
37572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]);
37672b676d7Smrg
37772b676d7Smrg/* 330 series CRT2 */
37872b676d7Smrg
37972b676d7Smrg/* Mono cursor engine for CRT2 on SiS330 (Xabre) has bugs
38072b676d7Smrg * and cannot be used! Will hang engine.
38172b676d7Smrg */
38272b676d7Smrg
38372b676d7Smrg/* 80000000 = RGB(1) - MONO(0)
38472b676d7Smrg * 40000000 = enable(1) - disable(0)
38572b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB
38672b676d7Smrg * 10000000 = "ghost"(1) - Alpha Blend(0)  ?
38772b676d7Smrg */
38872b676d7Smrg
38972b676d7Smrg#define sis301EnableHWCursor330() \
39072b676d7Smrg  /* andSISIDXREG(SISCR,0x5b,~0x10); */ \
39172b676d7Smrg  pSiS->HWCursorBackup[8] &= 0x0fffffff; \
39272b676d7Smrg  pSiS->HWCursorBackup[8] |= 0xE0000000; \
39372b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(8),  pSiS->HWCursorBackup[8]); \
39472b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \
39572b676d7Smrg  SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); \
39672b676d7Smrg  /* orSISIDXREG(SISCR,0x5b,0x10); */
39772b676d7Smrg
39872b676d7Smrg
39972b676d7Smrg
400