1#ifndef _TSENG_H
2#define _TSENG_H
3
4#include "config.h"
5
6#include "tseng_pcirename.h"
7#include <string.h>
8
9/* All drivers should typically include these */
10#include "xf86.h"
11#include "xf86_OSproc.h"
12
13/* All drivers need this */
14
15/* Everything using inb/outb, etc needs "compiler.h" */
16#include "compiler.h"
17
18/* Drivers that need to access the PCI config space directly need this */
19#include "xf86Pci.h"
20
21/* All drivers using the vgahw module need this */
22/* All Tseng chips _need_ VGA register access, so multihead operation is out of the question */
23#include "vgaHW.h"
24
25/* All drivers using the mi colormap manipulation need this */
26#include "micmap.h"
27
28/* Needed for the 1 and 4 bpp framebuffers */
29#ifdef HAVE_XF1BPP
30#include "xf1bpp.h"
31#endif
32#ifdef HAVE_XF4BPP
33#include "xf4bpp.h"
34#endif
35#include "fb.h"
36
37/* Drivers using the XAA interface ... */
38#ifdef HAVE_XAA_H
39#include "xaa.h"
40#include "xaalocal.h"
41#endif
42#include "xf86Cursor.h"
43#include "xf86fbman.h"
44
45#include "compat-api.h"
46/*
47 * Contrary to the old driver, we use the "Chip Revision" here intead of
48 * multiple chipsets like "TYPE_ET4000W32Pa", "TYPE_ET4000W32Pb", etc.
49 */
50
51typedef enum {
52    ET4000, /* We only have the PCI ones so all are W32p */
53    ET6000  /* Both ET6000 and ET6100 */
54} tseng_chiptype;
55
56/* Artificial: W32p revisions are different pci ids.
57 * ET6000 and ET6100 have same pci id but differ by revision.
58 */
59typedef enum {
60    TSENGNOREV = 0,
61    REV_A,
62    REV_B,
63    REV_C,
64    REV_D,
65    REV_ET6000,
66    REV_ET6100
67} tseng_chiprev;
68
69typedef enum {
70    UNKNOWN_DAC = -1,
71    STG1703,
72    CH8398
73} tseng_ramdac;
74
75typedef struct {
76    CARD8 CR30, CR31, CR32, CR33, CR34, CR35, CR36, CR37, CR3F;
77
78    CARD8 SR06, SR07;
79
80    /* ATC 0x16 */
81    CARD8 ExtATC;
82
83    /* 0x3CD , 0x3CB */
84    CARD8 ExtSegSel[2];
85
86    /* ET6000 PCI config space registers */
87    CARD8 ET6K_13, ET6K_40, ET6K_41;
88    CARD8 ET6K_44, ET6K_46, ET6K_58;
89    CARD16 ET6K_PLL, ET6K_MClk;
90
91    CARD8 CursorCtrl;
92    void *RAMDAC; /* new RAMDAC register pointer */
93} TsengRegRec, *TsengRegPtr;
94
95typedef struct {
96    /* we'll put variables that we want to access _fast_ at the beginning (just a hunch) */
97    unsigned char cache_SegSelL, cache_SegSelH;  /* for tseng_bank.c */
98    int Bytesperpixel;		       /* a shorthand for the XAA code */
99    Bool need_wait_acl;		       /* always need a full "WAIT" for ACL finish */
100    int line_width;		       /* framebuffer width in bytes per scanline */
101    int planemask_mask;		       /* mask for active bits in planemask */
102    int neg_x_pixel_offset;
103    int powerPerPixel;		       /* power-of-2 version of bytesperpixel */
104    unsigned char *BresenhamTable;
105    /* normal stuff starts here */
106    pciVideoPtr PciInfo;
107#ifndef XSERVER_LIBPCIACCESS
108    PCITAG PciTag;
109#endif
110
111    Bool UsePCIRetry;		       /* Do we use PCI-retry or busy-waiting */
112    Bool UseAccel;		       /* Do we use the XAA acceleration architecture */
113    Bool HWCursor;		       /* Do we use the hardware cursor (if supported) */
114
115    Bool SlowDram;
116    Bool FastDram;
117    Bool MedDram;
118    Bool SetPCIBurst;
119    Bool PCIBurst;
120    Bool SetW32Interleave;
121    Bool W32Interleave;
122    Bool ShowCache;
123
124    TsengRegRec SavedReg; /* saved Tseng registers at server start */
125
126    tseng_chiptype  ChipType;  /* "Chipset" causes confusion with pScrn->chipset */
127    tseng_chiprev  ChipRev;
128
129    memType FbAddress;
130    unsigned char *FbBase;
131    long FbMapSize;
132    CARD32 ET6000IOAddress; /* PCI config space base address for ET6000 */
133    char * MMioBase;
134
135    int MemClk;  /* ET6000 only */
136    ClockRange clockRange;
137    tseng_ramdac RAMDAC; /* ET4000W32p only */
138
139    int max_vco_freq;  /* ET6000: max internal VCO frequency */
140    CloseScreenProcPtr CloseScreen;
141    int save_divide;
142#ifdef HAVE_XAA_H
143    XAAInfoRecPtr AccelInfoRec;
144#endif
145    xf86CursorInfoPtr CursorInfoRec;
146    CARD32 AccelColorBufferOffset;     /* offset in video memory where FG and BG colors will be stored */
147    CARD32 AccelColorExpandBufferOffsets[3];   /* offset in video memory for ColorExpand buffers */
148    unsigned char * XAAColorExpandBuffers[3];  /* pointers to colorexpand buffers */
149    CARD32 AccelImageWriteBufferOffsets[2];    /* offset in video memory for ImageWrite Buffers */
150    unsigned char * XAAScanlineImageWriteBuffers[2];   /* pointers to ImageWrite Buffers */
151    CARD32 HWCursorBufferOffset;
152    unsigned char *HWCursorBuffer;
153    unsigned char * XAAScanlineColorExpandBuffers[1];
154    int acl_blitxdir;
155    int acl_blitydir;
156    CARD32 acl_iw_dest;
157    CARD32 acl_skipleft;
158    CARD32 acl_ColorExpandDst;
159    int acl_colexp_width_dwords;
160    int acl_colexp_width_bytes;
161
162    CARD32* ColExpLUT;
163
164    EntityInfoPtr       pEnt;
165
166    pointer scratchMemBase;
167    pointer tsengCPU2ACLBase;
168    /* These will hold the ping-pong registers. */
169    int tsengFg;
170    int tsengBg;
171    int tsengPat;
172    int tseng_old_dir;
173    int old_x;
174    int old_y;
175    int DGAnumModes;
176    Bool DGAactive;
177    DGAModePtr DGAModes;
178    int	DGAViewportStatus;
179    OptionInfoPtr Options;
180} TsengRec, *TsengPtr;
181
182#define TsengPTR(p) ((TsengPtr)((p)->driverPrivate))
183
184/* tseng_accel.c */
185void tseng_init_acl(ScrnInfoPtr pScrn);
186Bool TsengXAAInit(ScreenPtr pScreen);
187
188/* tseng_cursor.c */
189Bool TsengHWCursorInit(ScreenPtr pScreen);
190void TsengCursorStore(ScrnInfoPtr pScrn, TsengRegPtr Reg);
191void TsengCursorRestore(ScrnInfoPtr pScrn, TsengRegPtr Reg);
192
193/* tseng_dga.c */
194Bool TsengDGAInit(ScreenPtr pScreen);
195
196/* some IO abstractions
197 * May seem daft when you're worked in on this driver but it makes all the
198 * difference when coming back after a while or when new to it.
199 */
200void vgaHWWriteBank(vgaHWPtr hwp, CARD8 value);
201CARD8 vgaHWReadBank(vgaHWPtr hwp);
202void vgaHWWriteSegment(vgaHWPtr hwp, CARD8 value);
203CARD8 vgaHWReadSegment(vgaHWPtr hwp);
204void vgaHWWriteModeControl(vgaHWPtr hwp, CARD8 value);
205void vgaHWHerculesSecondPage(vgaHWPtr hwp, Bool Enable);
206CARD8 ET6000IORead(TsengPtr pTseng, CARD8 Offset);
207void ET6000IOWrite(TsengPtr pTseng, CARD8 Offset, CARD8 Value);
208
209/* tseng_mode.c */
210Bool TsengRAMDACProbe(ScrnInfoPtr pScrn);
211void TsengSetupClockRange(ScrnInfoPtr pScrn);
212Bool TsengModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
213void TsengAdjustFrame(ADJUST_FRAME_ARGS_DECL);
214ModeStatus TsengValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode, Bool verbose, int flags);
215void TsengSave(ScrnInfoPtr pScrn);
216void TsengRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, TsengRegPtr tsengReg, int flags);
217void TsengHVSyncDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags);
218void TsengCrtcDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags);
219
220/*
221 * For debugging
222 */
223
224#undef TSENG_DEBUG
225
226#ifdef TSENG_DEBUG
227#define PDEBUG(arg) do { ErrorF(arg); } while (0)
228#else
229#define PDEBUG(arg) do {} while (0)
230#endif
231
232#endif
233