1/* ********************************************************** 2 * Copyright (C) 1998-2001 VMware, Inc. 3 * All Rights Reserved 4 * **********************************************************/ 5 6/* 7 * svga_limits.h -- 8 * 9 * SVGA limits 10 */ 11 12#ifndef _SVGA_LIMITS_H_ 13#define _SVGA_LIMITS_H_ 14 15#define INCLUDE_ALLOW_USERLEVEL 16#define INCLUDE_ALLOW_MONITOR 17#include "includeCheck.h" 18 19/* 20 * Location and size of SVGA frame buffer and the FIFO. 21 */ 22#define SVGA_VRAM_SIZE (16*1024*1024) 23#define SVGA_MEM_SIZE (256*1024) 24 25/* 26 * SVGA_FB_START is the default starting address of the SVGA frame 27 * buffer in the guest's physical address space. 28 * SVGA_FB_START_BIGMEM is the starting address of the SVGA frame 29 * buffer for VMs that have a large amount of physical memory. 30 * 31 * The address of SVGA_FB_START is set to 2GB - (SVGA_FB_MAX_SIZE + SVGA_MEM_SIZE), 32 * thus the SVGA frame buffer sits at [SVGA_FB_START .. 2GB-1] in the 33 * physical address space. Our older SVGA drivers for NT treat the 34 * address of the frame buffer as a signed integer. For backwards 35 * compatibility, we keep the default location of the frame buffer 36 * at under 2GB in the address space. This restricts VMs to have "only" 37 * up to ~2031MB (i.e., up to SVGA_FB_START) of physical memory. 38 * 39 * For VMs that want more memory than the ~2031MB, we place the SVGA 40 * frame buffer at SVGA_FB_START_BIGMEM. This allows VMs to have up 41 * to 3584MB, at least as far as the SVGA frame buffer is concerned 42 * (note that there may be other issues that limit the VM memory 43 * size). PCI devices use high memory addresses, so we have to put 44 * SVGA_FB_START_BIGMEM low enough so that it doesn't overlap with any 45 * of these devices. Placing SVGA_FB_START_BIGMEM at 0xE0000000 46 * should leave plenty of room for the PCI devices. 47 * 48 * NOTE: All of that is only true for the 0710 chipset. As of the 0405 49 * chipset, the framebuffer start is determined solely based on the value 50 * the guest BIOS or OS programs into the PCI base address registers. 51 */ 52#define SVGA_FB_LEGACY_START 0x7EFC0000 53#define SVGA_FB_LEGACY_START_BIGMEM 0xE0000000 54 55#endif 56