1dfe64dd3Smacallan/* 2dfe64dd3Smacallan * Copyright 1998,1999 by Alan Hourihane, Wigan, England. 3dfe64dd3Smacallan * 4dfe64dd3Smacallan * Permission to use, copy, modify, distribute, and sell this software and its 5dfe64dd3Smacallan * documentation for any purpose is hereby granted without fee, provided that 6dfe64dd3Smacallan * the above copyright notice appear in all copies and that both that 7dfe64dd3Smacallan * copyright notice and this permission notice appear in supporting 8dfe64dd3Smacallan * documentation, and that the name of Alan Hourihane not be used in 9dfe64dd3Smacallan * advertising or publicity pertaining to distribution of the software without 10dfe64dd3Smacallan * specific, written prior permission. Alan Hourihane makes no representations 11dfe64dd3Smacallan * about the suitability of this software for any purpose. It is provided 12dfe64dd3Smacallan * "as is" without express or implied warranty. 13dfe64dd3Smacallan * 14dfe64dd3Smacallan * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 15dfe64dd3Smacallan * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 16dfe64dd3Smacallan * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR 17dfe64dd3Smacallan * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 18dfe64dd3Smacallan * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 19dfe64dd3Smacallan * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 20dfe64dd3Smacallan * PERFORMANCE OF THIS SOFTWARE. 21dfe64dd3Smacallan * 22dfe64dd3Smacallan * Authors: Alan Hourihane, alanh@fairlite.demon.co.uk 23dfe64dd3Smacallan * Mike Chapman <mike@paranoia.com>, 24dfe64dd3Smacallan * Juanjo Santamarta <santamarta@ctv.es>, 25dfe64dd3Smacallan * Mitani Hiroshi <hmitani@drl.mei.co.jp> 26dfe64dd3Smacallan * David Thomas <davtom@dream.org.uk>. 27dfe64dd3Smacallan */ 28dfe64dd3Smacallan 29dfe64dd3Smacallan#ifndef _XGI_REGS_H_ 30dfe64dd3Smacallan#define _XGI_REGS_H_ 31dfe64dd3Smacallan 32dfe64dd3Smacallan/* Jong 02/11/2009; replace inb/outb */ 33dfe64dd3Smacallan#if defined(__arm__) 34dfe64dd3Smacallan#ifndef minb 35dfe64dd3Smacallan#define minb(p) MMIO_IN8(0, (p)) 36dfe64dd3Smacallan#endif 37dfe64dd3Smacallan#ifndef moutb 38dfe64dd3Smacallan#define moutb(p,v) MMIO_OUT8(0, (p),(v)) 39dfe64dd3Smacallan#endif 40dfe64dd3Smacallan#ifndef minw 41dfe64dd3Smacallan#define minw(p) MMIO_IN16(0, (p)) 42dfe64dd3Smacallan#endif 43dfe64dd3Smacallan#ifndef moutw 44dfe64dd3Smacallan#define moutw(p,v) MMIO_OUT16(0, (p)) 45dfe64dd3Smacallan#endif 46dfe64dd3Smacallan#ifndef minl 47dfe64dd3Smacallan#define minl(p) MMIO_IN32(0, (p)) 48dfe64dd3Smacallan#endif 49dfe64dd3Smacallan#ifndef moutl 50dfe64dd3Smacallan#define moutl(p,v) MMIO_OUT32(0, (p), (v)) 51dfe64dd3Smacallan#endif 52dfe64dd3Smacallan 53dfe64dd3Smacallan/* Jong 02/11/2009; replace inb/outb */ 54dfe64dd3Smacallan#define inb(p) minb(p) 55dfe64dd3Smacallan#define outb(p, v) moutb(p, v) 56dfe64dd3Smacallan#endif 57dfe64dd3Smacallan 58dfe64dd3Smacallan#include "vgaHW.h" 59dfe64dd3Smacallan 60dfe64dd3Smacallan#define inXGIREG(base) inb(base) 61dfe64dd3Smacallan#define outXGIREG(base,val) outb(base,val) 62dfe64dd3Smacallan#define orXGIREG(base,val) do { \ 63dfe64dd3Smacallan unsigned char temp = inb(base); \ 64dfe64dd3Smacallan outXGIREG(base, temp | (val)); \ 65dfe64dd3Smacallan } while (0) 66dfe64dd3Smacallan 67dfe64dd3Smacallan#define andXGIREG(base,val) do { \ 68dfe64dd3Smacallan unsigned char temp = inb(base); \ 69dfe64dd3Smacallan outXGIREG(base, temp & (val)); \ 70dfe64dd3Smacallan } while (0) 71dfe64dd3Smacallan 72dfe64dd3Smacallan#define inXGIIDXREG(base,idx,var)\ 73dfe64dd3Smacallan do { \ 74dfe64dd3Smacallan outb(base,idx); var=inb((base)+1); \ 75dfe64dd3Smacallan } while (0) 76dfe64dd3Smacallan 77dfe64dd3Smacallan#define outXGIIDXREG(base,idx,val)\ 78dfe64dd3Smacallan do { \ 79dfe64dd3Smacallan outb(base,idx); outb((base)+1,val); \ 80dfe64dd3Smacallan } while (0) 81dfe64dd3Smacallan 82dfe64dd3Smacallan#define orXGIIDXREG(base,idx,val)\ 83dfe64dd3Smacallan do { \ 84dfe64dd3Smacallan unsigned char temp; \ 85dfe64dd3Smacallan outb(base,idx); \ 86dfe64dd3Smacallan temp = inb((base)+1)|(val); \ 87dfe64dd3Smacallan outXGIIDXREG(base,idx,temp); \ 88dfe64dd3Smacallan } while (0) 89dfe64dd3Smacallan#define andXGIIDXREG(base,idx,and)\ 90dfe64dd3Smacallan do { \ 91dfe64dd3Smacallan unsigned char temp; \ 92dfe64dd3Smacallan outb(base,idx); \ 93dfe64dd3Smacallan temp = inb((base)+1)&(and); \ 94dfe64dd3Smacallan outXGIIDXREG(base,idx,temp); \ 95dfe64dd3Smacallan } while (0) 96dfe64dd3Smacallan#define setXGIIDXREG(base,idx,and,or)\ 97dfe64dd3Smacallan do { \ 98dfe64dd3Smacallan unsigned char temp; \ 99dfe64dd3Smacallan outb(base,idx); \ 100dfe64dd3Smacallan temp = (inb((base)+1)&(and))|(or); \ 101dfe64dd3Smacallan outXGIIDXREG(base,idx,temp); \ 102dfe64dd3Smacallan } while (0) 103dfe64dd3Smacallan 104dfe64dd3Smacallan#define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l)) 105dfe64dd3Smacallan#define GENMASK(mask) BITMASK(1?mask,0?mask) 106dfe64dd3Smacallan 107dfe64dd3Smacallan#define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0?mask)) 108dfe64dd3Smacallan/* #define SETBITS(val,mask) ((val) << (0?mask)) */ /* Jong@08032009 */ 109dfe64dd3Smacallan#define SETBIT(n) (1<<(n)) 110dfe64dd3Smacallan 111dfe64dd3Smacallan#define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to)) 112dfe64dd3Smacallan#define SETVARBITS(var,val,from,to)\ 113dfe64dd3Smacallan (((var)&(~(GENMASK(to)))) | GETBITSTR(val,from,to)) 114dfe64dd3Smacallan 115dfe64dd3Smacallan#define GETVAR8(var) ((var)&0xFF) 116dfe64dd3Smacallan#define SETVAR8(var,val) (var) = GETVAR8(val) 117dfe64dd3Smacallan 118dfe64dd3Smacallan#define VGA_RELIO_BASE 0x380 119dfe64dd3Smacallan 120dfe64dd3Smacallan#define AROFFSET VGA_ATTR_INDEX - VGA_RELIO_BASE 121dfe64dd3Smacallan#define ARROFFSET VGA_ATTR_DATA_R - VGA_RELIO_BASE 122dfe64dd3Smacallan#define GROFFSET VGA_GRAPH_INDEX - VGA_RELIO_BASE 123dfe64dd3Smacallan#define SROFFSET VGA_SEQ_INDEX - VGA_RELIO_BASE 124dfe64dd3Smacallan#define CROFFSET VGA_CRTC_INDEX_OFFSET + VGA_IOBASE_COLOR-VGA_RELIO_BASE 125dfe64dd3Smacallan#define MISCROFFSET VGA_MISC_OUT_R - VGA_RELIO_BASE 126dfe64dd3Smacallan#define MISCWOFFSET VGA_MISC_OUT_W - VGA_RELIO_BASE 127dfe64dd3Smacallan#define COLREGOFFSET 0x48 128dfe64dd3Smacallan#define INPUTSTATOFFSET 0x5A 129dfe64dd3Smacallan#define DACROFFSET VGA_DAC_READ_ADDR - VGA_RELIO_BASE 130dfe64dd3Smacallan#define DACWOFFSET VGA_DAC_WRITE_ADDR - VGA_RELIO_BASE 131dfe64dd3Smacallan#define DACDOFFSET VGA_DAC_DATA - VGA_RELIO_BASE 132dfe64dd3Smacallan#define IS1OFFSET VGA_IOBASE_COLOR - VGA_RELIO_BASE + VGA_IN_STAT_1_OFFSET 133dfe64dd3Smacallan 134dfe64dd3Smacallan#define XGI_IS1 (pXGI->RelIO+IS1OFFSET) 135dfe64dd3Smacallan 136dfe64dd3Smacallan/**********************************************************************/ 137dfe64dd3Smacallan#define IS_BIT_DIAGNOSTIC_RB (3<<4) 138dfe64dd3Smacallan#define IS_BIT_VERT_ACTIVE (1<<3) 139dfe64dd3Smacallan#define IS_BIT_HORZ_NACTIVE (1) 140dfe64dd3Smacallan/**********************************************************************/ 141dfe64dd3Smacallan 142dfe64dd3Smacallan#define XGIARR (pXGI->RelIO+ARROFFSET) 143dfe64dd3Smacallan#define XGIGR (pXGI->RelIO+GROFFSET) 144dfe64dd3Smacallan#define XGISR (pXGI->RelIO+SROFFSET) 145dfe64dd3Smacallan#define XGICR (pXGI->RelIO+CROFFSET) 146dfe64dd3Smacallan#define XGIMISCR (pXGI->RelIO+MISCROFFSET) 147dfe64dd3Smacallan#define XGIMISCW (pXGI->RelIO+MISCWOFFSET) 148dfe64dd3Smacallan#define XGIDACREAD (pXGI->RelIO+DACROFFSET) 149dfe64dd3Smacallan#define XGIDACWRITE (pXGI->RelIO+DACWOFFSET) 150dfe64dd3Smacallan#define XGIDACDATA (pXGI->RelIO+DACDOFFSET) 151dfe64dd3Smacallan#define XGIVIDEO (pXGI->RelIO+0x02) 152dfe64dd3Smacallan#define XGICOLIDX (pXGI->RelIO+COLREGOFFSET) 153dfe64dd3Smacallan#define XGICOLDATA (pXGI->RelIO+COLREGOFFSET+1) 154dfe64dd3Smacallan#define XGIINPSTAT (pXGI->RelIO+INPUTSTATOFFSET) 155dfe64dd3Smacallan#define XGIPART1 (pXGI->RelIO+0x04) 156dfe64dd3Smacallan#define XGIPART2 (pXGI->RelIO+0x10) 157dfe64dd3Smacallan#define XGIPART3 (pXGI->RelIO+0x12) 158dfe64dd3Smacallan#define XGIPART4 (pXGI->RelIO+0x14) 159dfe64dd3Smacallan#define XGIPART5 (pXGI->RelIO+0x16) 160dfe64dd3Smacallan 161dfe64dd3Smacallan 162dfe64dd3Smacallan/* PART1 */ 163dfe64dd3Smacallan#define xgiPART1_FUNCTION 0x00 164dfe64dd3Smacallan#define xgiPART1_THRESHOLD_HIGH 0x01 165dfe64dd3Smacallan#define xgiPART1_THRESHOLD_LOW 0x02 166dfe64dd3Smacallan#define xgiPART1_FIFO_STOP 0x03 167dfe64dd3Smacallan#define xgiPART1_MEM_ADDR_HIGH 0x04 168dfe64dd3Smacallan#define xgiPART1_MEM_ADDR_MID 0x05 169dfe64dd3Smacallan#define xgiPART1_MEM_ADDR_LOW 0x06 170dfe64dd3Smacallan#define xgiPART1_SCR_PITCH_LOW 0x07 171dfe64dd3Smacallan#define xgiPART1_HORZ_TOTAL_LOW 0x08 172dfe64dd3Smacallan#define xgiPART1_SCR_HTOTAL_OVERFLOW 0x09 173dfe64dd3Smacallan#define xgiPART1_HORZ_DISP_END 0x0A 174dfe64dd3Smacallan#define xgiPART1_HORZ_RETRACE_START 0x0B 175dfe64dd3Smacallan#define xgiPART1_HORZ_OVERFLOW 0x0C 176dfe64dd3Smacallan#define xgiPART1_HORZ_RETRACE_END 0x0D 177dfe64dd3Smacallan 178dfe64dd3Smacallan#define xgiPART1_VERT_TOTAL_LOW 0x0E 179dfe64dd3Smacallan#define xgiPART1_VERT_DISP_END 0x0F 180dfe64dd3Smacallan#define xgiPART1_VERT_RETRACE_START 0x10 181dfe64dd3Smacallan#define xgiPART1_VERT_RETRACE_END 0x11 182dfe64dd3Smacallan#define xgiPART1_VERT_OVERFLOW 0x12 183dfe64dd3Smacallan 184dfe64dd3Smacallan/* 2000/04/10 added by jjtseng */ 185dfe64dd3Smacallan/* [VBCTL_000410] */ 186dfe64dd3Smacallan#define xgiPART1_CRT2_FLIP 0x24 187dfe64dd3Smacallan#define xgiPART1_LOWRES_DUALVB_MODE 0x2c 188dfe64dd3Smacallan/* ~jjtseng 2000/04/10 */ 189dfe64dd3Smacallan 190dfe64dd3Smacallan#define xgiPART1_ENABLEWRITE 0x2f 191dfe64dd3Smacallan#define xgiPART1_VERTRETRACE 0x30 192dfe64dd3Smacallan#define xgiPART1_HORZRETRACE 0x33 193dfe64dd3Smacallan 194dfe64dd3Smacallan/* 2005/11/08 added by jjtseng */ 195dfe64dd3Smacallan#define Index_CR_GPIO_Reg1 0x48 196dfe64dd3Smacallan#define Index_CR_GPIO_Reg2 0x49 197dfe64dd3Smacallan#define Index_CR_GPIO_Reg3 0x4a 198dfe64dd3Smacallan 199dfe64dd3Smacallan#define GPIOA_EN (1<<0) 200dfe64dd3Smacallan#define GPIOA_WRITE (1<<0) 201dfe64dd3Smacallan#define GPIOA_READ (1<<7) 202dfe64dd3Smacallan 203dfe64dd3Smacallan#define GPIOA_EN (1<<0) 204dfe64dd3Smacallan#define GPIOA_WRITE (1<<0) 205dfe64dd3Smacallan#define GPIOA_READ (1<<7) 206dfe64dd3Smacallan 207dfe64dd3Smacallan#define GPIOB_EN (1<<1) 208dfe64dd3Smacallan#define GPIOB_WRITE (1<<1) 209dfe64dd3Smacallan#define GPIOB_READ (1<<6) 210dfe64dd3Smacallan 211dfe64dd3Smacallan#define GPIOC_EN (1<<2) 212dfe64dd3Smacallan#define GPIOC_WRITE (1<<2) 213dfe64dd3Smacallan#define GPIOC_READ (1<<5) 214dfe64dd3Smacallan 215dfe64dd3Smacallan#define GPIOD_EN (1<<3) 216dfe64dd3Smacallan#define GPIOD_WRITE (1<<3) 217dfe64dd3Smacallan#define GPIOD_READ (1<<4) 218dfe64dd3Smacallan 219dfe64dd3Smacallan#define GPIOE_EN (1<<4) 220dfe64dd3Smacallan#define GPIOE_WRITE (1<<4) 221dfe64dd3Smacallan#define GPIOE_READ (1<<3) 222dfe64dd3Smacallan 223dfe64dd3Smacallan#define GPIOF_EN (1<<5) 224dfe64dd3Smacallan#define GPIOF_WRITE (1<<5) 225dfe64dd3Smacallan#define GPIOF_READ (1<<2) 226dfe64dd3Smacallan 227dfe64dd3Smacallan#define GPIOG_EN (1<<6) 228dfe64dd3Smacallan#define GPIOG_WRITE (1<<6) 229dfe64dd3Smacallan#define GPIOG_READ (1<<1) 230dfe64dd3Smacallan 231dfe64dd3Smacallan#define GPIOH_EN (1<<7) 232dfe64dd3Smacallan#define GPIOH_WRITE (1<<7) 233dfe64dd3Smacallan#define GPIOH_READ (1<<0) 234dfe64dd3Smacallan 235dfe64dd3Smacallan#define XGIMMIOLONG(offset) *(volatile unsigned long *)(pXGI->IOBase+(offset)) 236dfe64dd3Smacallan#define XGIMMIOSHORT(offset) *(volatile unsigned short *)(pXGI->IOBase+(offset)) 237dfe64dd3Smacallan#define XGIMMIOBYTE(offset) *(volatile unsigned char *)(pXGI->IOBase+(offset)) 238dfe64dd3Smacallan 239dfe64dd3Smacallan#endif /* _XGI_REGS_H_ */ 240