105b261ecSmrg 205b261ecSmrg/* 305b261ecSmrg * Copyright (c) 1997-2003 by The XFree86 Project, Inc. 405b261ecSmrg * 505b261ecSmrg * Permission is hereby granted, free of charge, to any person obtaining a 605b261ecSmrg * copy of this software and associated documentation files (the "Software"), 705b261ecSmrg * to deal in the Software without restriction, including without limitation 805b261ecSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 905b261ecSmrg * and/or sell copies of the Software, and to permit persons to whom the 1005b261ecSmrg * Software is furnished to do so, subject to the following conditions: 1105b261ecSmrg * 1205b261ecSmrg * The above copyright notice and this permission notice shall be included in 1305b261ecSmrg * all copies or substantial portions of the Software. 1405b261ecSmrg * 1505b261ecSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1605b261ecSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1705b261ecSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1805b261ecSmrg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 1905b261ecSmrg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 2005b261ecSmrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2105b261ecSmrg * OTHER DEALINGS IN THE SOFTWARE. 2205b261ecSmrg * 2305b261ecSmrg * Except as contained in this notice, the name of the copyright holder(s) 2405b261ecSmrg * and author(s) shall not be used in advertising or otherwise to promote 2505b261ecSmrg * the sale, use or other dealings in this Software without prior written 2605b261ecSmrg * authorization from the copyright holder(s) and author(s). 2705b261ecSmrg */ 2805b261ecSmrg 2905b261ecSmrg/* 3005b261ecSmrg * This file contains definitions of the public XFree86 data structures/types. 3105b261ecSmrg * Any data structures that video drivers need to access should go here. 3205b261ecSmrg */ 3305b261ecSmrg 3405b261ecSmrg#ifndef _XF86STR_H 3505b261ecSmrg#define _XF86STR_H 3605b261ecSmrg 3705b261ecSmrg#include "misc.h" 3805b261ecSmrg#include "input.h" 3905b261ecSmrg#include "scrnintstr.h" 4005b261ecSmrg#include "pixmapstr.h" 4105b261ecSmrg#include "colormapst.h" 4205b261ecSmrg#include "xf86Module.h" 4305b261ecSmrg#include "xf86Opt.h" 44f7df2e56Smrg#include "displaymode.h" 454642e01fSmrg 464642e01fSmrg/** 474642e01fSmrg * Integer type that is of the size of the addressable memory (machine size). 484642e01fSmrg * On most platforms \c uintptr_t will suffice. However, on some mixed 494642e01fSmrg * 32-bit / 64-bit platforms, such as 32-bit binaries on 64-bit PowerPC, this 504642e01fSmrg * must be 64-bits. 5105b261ecSmrg */ 524642e01fSmrg#include <inttypes.h> 534642e01fSmrg#if defined(__powerpc__) 544642e01fSmrgtypedef uint64_t memType; 554642e01fSmrg#else 564642e01fSmrgtypedef uintptr_t memType; 574642e01fSmrg#endif 584642e01fSmrg 5905b261ecSmrg/* Video mode flags */ 6005b261ecSmrg 6105b261ecSmrgtypedef enum { 62f7df2e56Smrg V_PHSYNC = 0x0001, 63f7df2e56Smrg V_NHSYNC = 0x0002, 64f7df2e56Smrg V_PVSYNC = 0x0004, 65f7df2e56Smrg V_NVSYNC = 0x0008, 66f7df2e56Smrg V_INTERLACE = 0x0010, 67f7df2e56Smrg V_DBLSCAN = 0x0020, 68f7df2e56Smrg V_CSYNC = 0x0040, 69f7df2e56Smrg V_PCSYNC = 0x0080, 70f7df2e56Smrg V_NCSYNC = 0x0100, 71f7df2e56Smrg V_HSKEW = 0x0200, /* hskew provided */ 72f7df2e56Smrg V_BCAST = 0x0400, 73f7df2e56Smrg V_PIXMUX = 0x1000, 74f7df2e56Smrg V_DBLCLK = 0x2000, 75f7df2e56Smrg V_CLKDIV2 = 0x4000 7605b261ecSmrg} ModeFlags; 7705b261ecSmrg 7805b261ecSmrgtypedef enum { 79f7df2e56Smrg INTERLACE_HALVE_V = 0x0001 /* Halve V values for interlacing */ 8005b261ecSmrg} CrtcAdjustFlags; 8105b261ecSmrg 8205b261ecSmrg/* Flags passed to ChipValidMode() */ 8305b261ecSmrgtypedef enum { 8405b261ecSmrg MODECHECK_INITIAL = 0, 85f7df2e56Smrg MODECHECK_FINAL = 1 8605b261ecSmrg} ModeCheckFlags; 8705b261ecSmrg 8805b261ecSmrg/* 8905b261ecSmrg * The mode sets are, from best to worst: USERDEF, DRIVER, and DEFAULT/BUILTIN. 9005b261ecSmrg * Preferred will bubble a mode to the top within a set. 9105b261ecSmrg */ 92f7df2e56Smrg#define M_T_BUILTIN 0x01 /* built-in mode */ 93f7df2e56Smrg#define M_T_CLOCK_C (0x02 | M_T_BUILTIN) /* built-in mode - configure clock */ 94f7df2e56Smrg#define M_T_CRTC_C (0x04 | M_T_BUILTIN) /* built-in mode - configure CRTC */ 95f7df2e56Smrg#define M_T_CLOCK_CRTC_C (M_T_CLOCK_C | M_T_CRTC_C) 9605b261ecSmrg /* built-in mode - configure CRTC and clock */ 97f7df2e56Smrg#define M_T_PREFERRED 0x08 /* preferred mode within a set */ 98f7df2e56Smrg#define M_T_DEFAULT 0x10 /* (VESA) default modes */ 99f7df2e56Smrg#define M_T_USERDEF 0x20 /* One of the modes from the config file */ 100f7df2e56Smrg#define M_T_DRIVER 0x40 /* Supplied by the driver (EDID, etc) */ 101f7df2e56Smrg#define M_T_USERPREF 0x80 /* mode preferred by the user config */ 10205b261ecSmrg 10305b261ecSmrg/* The monitor description */ 10405b261ecSmrg 10505b261ecSmrg#define MAX_HSYNC 8 10605b261ecSmrg#define MAX_VREFRESH 8 10705b261ecSmrg 108f7df2e56Smrgtypedef struct { 109f7df2e56Smrg float hi, lo; 110f7df2e56Smrg} range; 11105b261ecSmrg 112f7df2e56Smrgtypedef struct { 113f7df2e56Smrg CARD32 red, green, blue; 114f7df2e56Smrg} rgb; 11505b261ecSmrg 116f7df2e56Smrgtypedef struct { 117f7df2e56Smrg float red, green, blue; 118f7df2e56Smrg} Gamma; 11905b261ecSmrg 12005b261ecSmrg/* The permitted gamma range is 1 / GAMMA_MAX <= g <= GAMMA_MAX */ 12105b261ecSmrg#define GAMMA_MAX 10.0 12205b261ecSmrg#define GAMMA_MIN (1.0 / GAMMA_MAX) 12305b261ecSmrg#define GAMMA_ZERO (GAMMA_MIN / 100.0) 12405b261ecSmrg 12505b261ecSmrgtypedef struct { 126f7df2e56Smrg const char *id; 127f7df2e56Smrg const char *vendor; 128f7df2e56Smrg const char *model; 129f7df2e56Smrg int nHsync; 130f7df2e56Smrg range hsync[MAX_HSYNC]; 131f7df2e56Smrg int nVrefresh; 132f7df2e56Smrg range vrefresh[MAX_VREFRESH]; 133f7df2e56Smrg DisplayModePtr Modes; /* Start of the monitor's mode list */ 134f7df2e56Smrg DisplayModePtr Last; /* End of the monitor's mode list */ 135f7df2e56Smrg Gamma gamma; /* Gamma of the monitor */ 136f7df2e56Smrg int widthmm; 137f7df2e56Smrg int heightmm; 138f7df2e56Smrg void *options; 139f7df2e56Smrg void *DDC; 140f7df2e56Smrg Bool reducedblanking; /* Allow CVT reduced blanking modes? */ 141f7df2e56Smrg int maxPixClock; /* in kHz, like mode->Clock */ 14205b261ecSmrg} MonRec, *MonPtr; 14305b261ecSmrg 14405b261ecSmrg/* the list of clock ranges */ 14505b261ecSmrgtypedef struct x_ClockRange { 14605b261ecSmrg struct x_ClockRange *next; 147f7df2e56Smrg int minClock; /* (kHz) */ 148f7df2e56Smrg int maxClock; /* (kHz) */ 149f7df2e56Smrg int clockIndex; /* -1 for programmable clocks */ 150f7df2e56Smrg Bool interlaceAllowed; 151f7df2e56Smrg Bool doubleScanAllowed; 152f7df2e56Smrg int ClockMulFactor; 153f7df2e56Smrg int ClockDivFactor; 154f7df2e56Smrg int PrivFlags; 15505b261ecSmrg} ClockRange, *ClockRangePtr; 15605b261ecSmrg 15705b261ecSmrg/* 15805b261ecSmrg * The driverFunc. xorgDriverFuncOp specifies the action driver should 15905b261ecSmrg * perform. If requested option is not supported function should return 16005b261ecSmrg * FALSE. pointer can be used to pass arguments to the function or 16105b261ecSmrg * to return data to the caller. 16205b261ecSmrg */ 16305b261ecSmrgtypedef struct _ScrnInfoRec *ScrnInfoPtr; 16405b261ecSmrg 16505b261ecSmrg/* do not change order */ 16605b261ecSmrgtypedef enum { 16705b261ecSmrg RR_GET_INFO, 16805b261ecSmrg RR_SET_CONFIG, 16905b261ecSmrg RR_GET_MODE_MM, 170f7df2e56Smrg GET_REQUIRED_HW_INTERFACES = 10, 171f7df2e56Smrg SUPPORTS_SERVER_FDS = 11, 17205b261ecSmrg} xorgDriverFuncOp; 17305b261ecSmrg 174f7df2e56Smrgtypedef Bool xorgDriverFuncProc(ScrnInfoPtr, xorgDriverFuncOp, void *); 17505b261ecSmrg 17605b261ecSmrg/* RR_GET_INFO, RR_SET_CONFIG */ 17705b261ecSmrgtypedef struct { 17805b261ecSmrg int rotation; 17905b261ecSmrg int rate; 18005b261ecSmrg int width; 18105b261ecSmrg int height; 18205b261ecSmrg} xorgRRConfig; 18305b261ecSmrg 18405b261ecSmrgtypedef union { 18505b261ecSmrg short RRRotations; 18605b261ecSmrg xorgRRConfig RRConfig; 18705b261ecSmrg} xorgRRRotation, *xorgRRRotationPtr; 18805b261ecSmrg 18905b261ecSmrg/* RR_GET_MODE_MM */ 19005b261ecSmrgtypedef struct { 19105b261ecSmrg DisplayModePtr mode; 19205b261ecSmrg int virtX; 19305b261ecSmrg int virtY; 19405b261ecSmrg int mmWidth; 19505b261ecSmrg int mmHeight; 19605b261ecSmrg} xorgRRModeMM, *xorgRRModeMMPtr; 19705b261ecSmrg 19805b261ecSmrg/* GET_REQUIRED_HW_INTERFACES */ 19905b261ecSmrg#define HW_IO 1 20005b261ecSmrg#define HW_MMIO 2 2016747b715Smrg#define HW_SKIP_CONSOLE 4 20205b261ecSmrg#define NEED_IO_ENABLED(x) (x & HW_IO) 20305b261ecSmrg 20405b261ecSmrgtypedef CARD32 xorgHWFlags; 20505b261ecSmrg 20605b261ecSmrg/* 20705b261ecSmrg * The driver list struct. This contains the information required for each 20805b261ecSmrg * driver before a ScrnInfoRec has been allocated. 20905b261ecSmrg */ 21005b261ecSmrgstruct _DriverRec; 21105b261ecSmrg 2124642e01fSmrgstruct _SymTabRec; 2134642e01fSmrgstruct _PciChipsets; 2144642e01fSmrg 215f7df2e56Smrgstruct pci_device; 216f7df2e56Smrgstruct xf86_platform_device; 217f7df2e56Smrg 21805b261ecSmrgtypedef struct _DriverRec { 219f7df2e56Smrg int driverVersion; 220f7df2e56Smrg const char *driverName; 221f7df2e56Smrg void (*Identify) (int flags); 222f7df2e56Smrg Bool (*Probe) (struct _DriverRec * drv, int flags); 223f7df2e56Smrg const OptionInfoRec *(*AvailableOptions) (int chipid, int bustype); 224f7df2e56Smrg void *module; 225f7df2e56Smrg int refCount; 226f7df2e56Smrg xorgDriverFuncProc *driverFunc; 227f7df2e56Smrg 228f7df2e56Smrg const struct pci_id_match *supported_devices; 229f7df2e56Smrg Bool (*PciProbe) (struct _DriverRec * drv, int entity_num, 230f7df2e56Smrg struct pci_device * dev, intptr_t match_data); 231f7df2e56Smrg Bool (*platformProbe) (struct _DriverRec * drv, int entity_num, int flags, 232f7df2e56Smrg struct xf86_platform_device * dev, intptr_t match_data); 23305b261ecSmrg} DriverRec, *DriverPtr; 23405b261ecSmrg 235f7df2e56Smrg/* 236f7df2e56Smrg * platform probe flags 237f7df2e56Smrg */ 238f7df2e56Smrg#define PLATFORM_PROBE_GPU_SCREEN 1 239f7df2e56Smrg 24005b261ecSmrg/* 24105b261ecSmrg * AddDriver flags 24205b261ecSmrg */ 24305b261ecSmrg#define HaveDriverFuncs 1 24405b261ecSmrg 24505b261ecSmrg/* 24605b261ecSmrg * These are the private bus types. New types can be added here. Types 24705b261ecSmrg * required for the public interface should be added to xf86str.h, with 24805b261ecSmrg * function prototypes added to xf86.h. 24905b261ecSmrg */ 25005b261ecSmrg 25105b261ecSmrg/* Tolerate prior #include <linux/input.h> */ 2527e31ba66Smrg#if defined(__linux__) 25305b261ecSmrg#undef BUS_NONE 25405b261ecSmrg#undef BUS_PCI 25505b261ecSmrg#undef BUS_SBUS 256f7df2e56Smrg#undef BUS_PLATFORM 2575a112b11Smrg#undef BUS_USB 25805b261ecSmrg#undef BUS_last 25905b261ecSmrg#endif 26005b261ecSmrg 26105b261ecSmrgtypedef enum { 26205b261ecSmrg BUS_NONE, 26305b261ecSmrg BUS_PCI, 26405b261ecSmrg BUS_SBUS, 2650208663bSmacallan BUS_ISA, 266f7df2e56Smrg BUS_PLATFORM, 2675a112b11Smrg BUS_USB, 268f7df2e56Smrg BUS_last /* Keep last */ 26905b261ecSmrg} BusType; 27005b261ecSmrg 27105b261ecSmrgtypedef struct { 272f7df2e56Smrg int fbNum; 27305b261ecSmrg} SbusBusId; 27405b261ecSmrg 27505b261ecSmrgtypedef struct _bus { 27605b261ecSmrg BusType type; 27705b261ecSmrg union { 278f7df2e56Smrg struct pci_device *pci; 279f7df2e56Smrg SbusBusId sbus; 280f7df2e56Smrg struct xf86_platform_device *plat; 28105b261ecSmrg } id; 28205b261ecSmrg} BusRec, *BusPtr; 28305b261ecSmrg 28405b261ecSmrgtypedef enum { 28505b261ecSmrg DAC_BPP8 = 0, 28605b261ecSmrg DAC_BPP16, 28705b261ecSmrg DAC_BPP24, 28805b261ecSmrg DAC_BPP32, 28905b261ecSmrg MAXDACSPEEDS 29005b261ecSmrg} DacSpeedIndex; 29105b261ecSmrg 29205b261ecSmrgtypedef struct { 293f7df2e56Smrg const char *identifier; 294f7df2e56Smrg const char *vendor; 295f7df2e56Smrg const char *board; 296f7df2e56Smrg const char *chipset; 297f7df2e56Smrg const char *ramdac; 298f7df2e56Smrg const char *driver; 299f7df2e56Smrg struct _confscreenrec *myScreenSection; 300f7df2e56Smrg Bool claimed; 301f7df2e56Smrg int dacSpeeds[MAXDACSPEEDS]; 302f7df2e56Smrg int numclocks; 303f7df2e56Smrg int clock[MAXCLOCKS]; 304f7df2e56Smrg const char *clockchip; 305f7df2e56Smrg const char *busID; 306f7df2e56Smrg Bool active; 307f7df2e56Smrg Bool inUse; 308f7df2e56Smrg int videoRam; 309f7df2e56Smrg unsigned long MemBase; /* Frame buffer base address */ 310f7df2e56Smrg unsigned long IOBase; 311f7df2e56Smrg int chipID; 312f7df2e56Smrg int chipRev; 313f7df2e56Smrg void *options; 314f7df2e56Smrg int irq; 315f7df2e56Smrg int screen; /* For multi-CRTC cards */ 31605b261ecSmrg} GDevRec, *GDevPtr; 31705b261ecSmrg 31805b261ecSmrgtypedef struct { 319f7df2e56Smrg int frameX0; 320f7df2e56Smrg int frameY0; 321f7df2e56Smrg int virtualX; 322f7df2e56Smrg int virtualY; 323f7df2e56Smrg int depth; 324f7df2e56Smrg int fbbpp; 325f7df2e56Smrg rgb weight; 326f7df2e56Smrg rgb blackColour; 327f7df2e56Smrg rgb whiteColour; 328f7df2e56Smrg int defaultVisual; 329f7df2e56Smrg const char **modes; 330f7df2e56Smrg void *options; 33105b261ecSmrg} DispRec, *DispPtr; 33205b261ecSmrg 33305b261ecSmrgtypedef struct _confxvportrec { 334f7df2e56Smrg const char *identifier; 335f7df2e56Smrg void *options; 33605b261ecSmrg} confXvPortRec, *confXvPortPtr; 33705b261ecSmrg 33805b261ecSmrgtypedef struct _confxvadaptrec { 339f7df2e56Smrg const char *identifier; 340f7df2e56Smrg int numports; 341f7df2e56Smrg confXvPortPtr ports; 342f7df2e56Smrg void *options; 34305b261ecSmrg} confXvAdaptorRec, *confXvAdaptorPtr; 34405b261ecSmrg 345f7df2e56Smrg#define MAX_GPUDEVICES 4 34605b261ecSmrgtypedef struct _confscreenrec { 347f7df2e56Smrg const char *id; 348f7df2e56Smrg int screennum; 349f7df2e56Smrg int defaultdepth; 350f7df2e56Smrg int defaultbpp; 351f7df2e56Smrg int defaultfbbpp; 352f7df2e56Smrg MonPtr monitor; 353f7df2e56Smrg GDevPtr device; 354f7df2e56Smrg int numdisplays; 355d44ca368Smrg DispPtr *displays; 356f7df2e56Smrg int numxvadaptors; 357f7df2e56Smrg confXvAdaptorPtr xvadaptors; 358f7df2e56Smrg void *options; 359f7df2e56Smrg 360f7df2e56Smrg int num_gpu_devices; 361f7df2e56Smrg GDevPtr gpu_devices[MAX_GPUDEVICES]; 36205b261ecSmrg} confScreenRec, *confScreenPtr; 36305b261ecSmrg 36405b261ecSmrgtypedef enum { 36505b261ecSmrg PosObsolete = -1, 36605b261ecSmrg PosAbsolute = 0, 36705b261ecSmrg PosRightOf, 36805b261ecSmrg PosLeftOf, 36905b261ecSmrg PosAbove, 37005b261ecSmrg PosBelow, 37105b261ecSmrg PosRelative 37205b261ecSmrg} PositionType; 37305b261ecSmrg 37405b261ecSmrgtypedef struct _screenlayoutrec { 375f7df2e56Smrg confScreenPtr screen; 376f7df2e56Smrg const char *topname; 377f7df2e56Smrg confScreenPtr top; 378f7df2e56Smrg const char *bottomname; 379f7df2e56Smrg confScreenPtr bottom; 380f7df2e56Smrg const char *leftname; 381f7df2e56Smrg confScreenPtr left; 382f7df2e56Smrg const char *rightname; 383f7df2e56Smrg confScreenPtr right; 384f7df2e56Smrg PositionType where; 385f7df2e56Smrg int x; 386f7df2e56Smrg int y; 387f7df2e56Smrg const char *refname; 388f7df2e56Smrg confScreenPtr refscreen; 38905b261ecSmrg} screenLayoutRec, *screenLayoutPtr; 39005b261ecSmrg 39165b04b38Smrgtypedef struct _InputInfoRec InputInfoRec; 39265b04b38Smrg 39305b261ecSmrgtypedef struct _serverlayoutrec { 394f7df2e56Smrg const char *id; 395f7df2e56Smrg screenLayoutPtr screens; 396f7df2e56Smrg GDevPtr inactives; 397f7df2e56Smrg InputInfoRec **inputs; /* NULL terminated */ 398f7df2e56Smrg void *options; 39905b261ecSmrg} serverLayoutRec, *serverLayoutPtr; 40005b261ecSmrg 40105b261ecSmrgtypedef struct _confdribufferrec { 402f7df2e56Smrg int count; 403f7df2e56Smrg int size; 40405b261ecSmrg enum { 405f7df2e56Smrg XF86DRI_WC_HINT = 0x0001 /* Placeholder: not implemented */ 406f7df2e56Smrg } flags; 40705b261ecSmrg} confDRIBufferRec, *confDRIBufferPtr; 40805b261ecSmrg 40905b261ecSmrgtypedef struct _confdrirec { 410f7df2e56Smrg int group; 411f7df2e56Smrg int mode; 412f7df2e56Smrg int bufs_count; 413f7df2e56Smrg confDRIBufferRec *bufs; 41405b261ecSmrg} confDRIRec, *confDRIPtr; 41505b261ecSmrg 4167e31ba66Smrg#define NUM_RESERVED_INTS 4 4177e31ba66Smrg#define NUM_RESERVED_POINTERS 4 4187e31ba66Smrg#define NUM_RESERVED_FUNCS 4 41905b261ecSmrg 420f7df2e56Smrg/* let clients know they can use this */ 421f7df2e56Smrg#define XF86_SCRN_HAS_PREFER_CLONE 1 422f7df2e56Smrg 423f7df2e56Smrgtypedef void *(*funcPointer) (void); 42405b261ecSmrg 42505b261ecSmrg/* Power management events: so far we only support APM */ 42605b261ecSmrg 42705b261ecSmrgtypedef enum { 42805b261ecSmrg XF86_APM_UNKNOWN = -1, 42905b261ecSmrg XF86_APM_SYS_STANDBY, 43005b261ecSmrg XF86_APM_SYS_SUSPEND, 43105b261ecSmrg XF86_APM_CRITICAL_SUSPEND, 43205b261ecSmrg XF86_APM_USER_STANDBY, 43305b261ecSmrg XF86_APM_USER_SUSPEND, 43405b261ecSmrg XF86_APM_STANDBY_RESUME, 43505b261ecSmrg XF86_APM_NORMAL_RESUME, 43605b261ecSmrg XF86_APM_CRITICAL_RESUME, 43705b261ecSmrg XF86_APM_LOW_BATTERY, 43805b261ecSmrg XF86_APM_POWER_STATUS_CHANGE, 43905b261ecSmrg XF86_APM_UPDATE_TIME, 44005b261ecSmrg XF86_APM_CAPABILITY_CHANGED, 44105b261ecSmrg XF86_APM_STANDBY_FAILED, 44205b261ecSmrg XF86_APM_SUSPEND_FAILED 44305b261ecSmrg} pmEvent; 44405b261ecSmrg 44505b261ecSmrgtypedef enum { 44605b261ecSmrg PM_WAIT, 44705b261ecSmrg PM_CONTINUE, 44805b261ecSmrg PM_FAILED, 44905b261ecSmrg PM_NONE 45005b261ecSmrg} pmWait; 45105b261ecSmrg 4524642e01fSmrgtypedef struct _PciChipsets { 45305b261ecSmrg /** 45405b261ecSmrg * Key used to match this device with its name in an array of 45505b261ecSmrg * \c SymTabRec. 45605b261ecSmrg */ 45705b261ecSmrg int numChipset; 45805b261ecSmrg 45905b261ecSmrg /** 46005b261ecSmrg * This value is quirky. Depending on the driver, it can take on one of 46105b261ecSmrg * three meanings. In drivers that have exactly one vendor ID (e.g., 46205b261ecSmrg * radeon, mga, i810) the low 16-bits are the device ID. 46305b261ecSmrg * 46405b261ecSmrg * In drivers that can have multiple vendor IDs (e.g., the glint driver 46505b261ecSmrg * can have either 3dlabs' ID or TI's ID, the i740 driver can have either 46605b261ecSmrg * Intel's ID or Real3D's ID, etc.) the low 16-bits are the device ID and 46705b261ecSmrg * the high 16-bits are the vendor ID. 46805b261ecSmrg * 46905b261ecSmrg * In drivers that don't have a specific vendor (e.g., vga) contains the 47005b261ecSmrg * device ID for either the generic VGA or generic 8514 devices. This 47105b261ecSmrg * turns out to be the same as the subclass and programming interface 472f7df2e56Smrg * value (e.g., the full 24-bit class for the VGA device is 0x030000 (or 47305b261ecSmrg * 0x000101) and for 8514 is 0x030001). 47405b261ecSmrg */ 47505b261ecSmrg int PCIid; 47605b261ecSmrg 4776747b715Smrg/* dummy place holders for drivers to build against old/new servers */ 4786747b715Smrg#define RES_UNDEFINED NULL 4796747b715Smrg#define RES_EXCLUSIVE_VGA NULL 4806747b715Smrg#define RES_SHARED_VGA NULL 4816747b715Smrg void *dummy; 48205b261ecSmrg} PciChipsets; 48305b261ecSmrg 48405b261ecSmrg/* Entity properties */ 485f7df2e56Smrgtypedef void (*EntityProc) (int entityIndex, void *private); 48605b261ecSmrg 48705b261ecSmrgtypedef struct _entityInfo { 48805b261ecSmrg int index; 48905b261ecSmrg BusRec location; 49005b261ecSmrg int chipset; 49105b261ecSmrg Bool active; 49205b261ecSmrg GDevPtr device; 49305b261ecSmrg DriverPtr driver; 49405b261ecSmrg} EntityInfoRec, *EntityInfoPtr; 49505b261ecSmrg 49605b261ecSmrg/* DGA */ 49705b261ecSmrg 49805b261ecSmrgtypedef struct { 499f7df2e56Smrg int num; /* A unique identifier for the mode (num > 0) */ 500f7df2e56Smrg DisplayModePtr mode; 501f7df2e56Smrg int flags; /* DGA_CONCURRENT_ACCESS, etc... */ 502f7df2e56Smrg int imageWidth; /* linear accessible portion (pixels) */ 503f7df2e56Smrg int imageHeight; 504f7df2e56Smrg int pixmapWidth; /* Xlib accessible portion (pixels) */ 505f7df2e56Smrg int pixmapHeight; /* both fields ignored if no concurrent access */ 506f7df2e56Smrg int bytesPerScanline; 507f7df2e56Smrg int byteOrder; /* MSBFirst, LSBFirst */ 508f7df2e56Smrg int depth; 509f7df2e56Smrg int bitsPerPixel; 510f7df2e56Smrg unsigned long red_mask; 511f7df2e56Smrg unsigned long green_mask; 512f7df2e56Smrg unsigned long blue_mask; 513f7df2e56Smrg short visualClass; 514f7df2e56Smrg int viewportWidth; 515f7df2e56Smrg int viewportHeight; 516f7df2e56Smrg int xViewportStep; /* viewport position granularity */ 517f7df2e56Smrg int yViewportStep; 518f7df2e56Smrg int maxViewportX; /* max viewport origin */ 519f7df2e56Smrg int maxViewportY; 520f7df2e56Smrg int viewportFlags; /* types of page flipping possible */ 521f7df2e56Smrg int offset; /* offset into physical memory */ 522f7df2e56Smrg unsigned char *address; /* server's mapped framebuffer */ 523f7df2e56Smrg int reserved1; 524f7df2e56Smrg int reserved2; 52505b261ecSmrg} DGAModeRec, *DGAModePtr; 52605b261ecSmrg 52705b261ecSmrgtypedef struct { 528f7df2e56Smrg DGAModePtr mode; 529f7df2e56Smrg PixmapPtr pPix; 53005b261ecSmrg} DGADeviceRec, *DGADevicePtr; 53105b261ecSmrg 53205b261ecSmrg/* 53305b261ecSmrg * Flags for driver Probe() functions. 53405b261ecSmrg */ 53505b261ecSmrg#define PROBE_DEFAULT 0x00 53605b261ecSmrg#define PROBE_DETECT 0x01 53705b261ecSmrg#define PROBE_TRYHARD 0x02 53805b261ecSmrg 53905b261ecSmrg/* 54005b261ecSmrg * Driver entry point types 54105b261ecSmrg */ 54205b261ecSmrg 543f7df2e56Smrgtypedef Bool xf86ProbeProc(DriverPtr, int); 544f7df2e56Smrgtypedef Bool xf86PreInitProc(ScrnInfoPtr, int); 545f7df2e56Smrgtypedef Bool xf86ScreenInitProc(ScreenPtr, int, char **); 546f7df2e56Smrgtypedef Bool xf86SwitchModeProc(ScrnInfoPtr, DisplayModePtr); 547f7df2e56Smrgtypedef void xf86AdjustFrameProc(ScrnInfoPtr, int, int); 548f7df2e56Smrgtypedef Bool xf86EnterVTProc(ScrnInfoPtr); 549f7df2e56Smrgtypedef void xf86LeaveVTProc(ScrnInfoPtr); 550f7df2e56Smrgtypedef void xf86FreeScreenProc(ScrnInfoPtr); 551f7df2e56Smrgtypedef ModeStatus xf86ValidModeProc(ScrnInfoPtr, DisplayModePtr, Bool, int); 552f7df2e56Smrgtypedef void xf86EnableDisableFBAccessProc(ScrnInfoPtr, Bool); 553f7df2e56Smrgtypedef int xf86SetDGAModeProc(ScrnInfoPtr, int, DGADevicePtr); 554f7df2e56Smrgtypedef int xf86ChangeGammaProc(ScrnInfoPtr, Gamma); 555f7df2e56Smrgtypedef void xf86PointerMovedProc(ScrnInfoPtr, int, int); 556f7df2e56Smrgtypedef Bool xf86PMEventProc(ScrnInfoPtr, pmEvent, Bool); 557f7df2e56Smrgtypedef void xf86DPMSSetProc(ScrnInfoPtr, int, int); 558f7df2e56Smrgtypedef void xf86LoadPaletteProc(ScrnInfoPtr, int, int *, LOCO *, VisualPtr); 559f7df2e56Smrgtypedef void xf86SetOverscanProc(ScrnInfoPtr, int); 560f7df2e56Smrgtypedef void xf86ModeSetProc(ScrnInfoPtr); 56105b261ecSmrg 56205b261ecSmrg/* 56305b261ecSmrg * ScrnInfoRec 56405b261ecSmrg * 56505b261ecSmrg * There is one of these for each screen, and it holds all the screen-specific 5667e31ba66Smrg * information. Note: No fields are to be dependent on compile-time defines. 56705b261ecSmrg */ 56805b261ecSmrg 56905b261ecSmrgtypedef struct _ScrnInfoRec { 570f7df2e56Smrg int driverVersion; 571f7df2e56Smrg const char *driverName; /* canonical name used in */ 572f7df2e56Smrg /* the config file */ 573f7df2e56Smrg ScreenPtr pScreen; /* Pointer to the ScreenRec */ 574f7df2e56Smrg int scrnIndex; /* Number of this screen */ 575f7df2e56Smrg Bool configured; /* Is this screen valid */ 576f7df2e56Smrg int origIndex; /* initial number assigned to 577f7df2e56Smrg * this screen before 578f7df2e56Smrg * finalising the number of 579f7df2e56Smrg * available screens */ 58005b261ecSmrg 58105b261ecSmrg /* Display-wide screenInfo values needed by this screen */ 582f7df2e56Smrg int imageByteOrder; 583f7df2e56Smrg int bitmapScanlineUnit; 584f7df2e56Smrg int bitmapScanlinePad; 585f7df2e56Smrg int bitmapBitOrder; 586f7df2e56Smrg int numFormats; 587f7df2e56Smrg PixmapFormatRec formats[MAXFORMATS]; 588f7df2e56Smrg PixmapFormatRec fbFormat; 589f7df2e56Smrg 590f7df2e56Smrg int bitsPerPixel; /* fb bpp */ 591f7df2e56Smrg int depth; /* depth of default visual */ 592f7df2e56Smrg MessageType depthFrom; /* set from config? */ 593f7df2e56Smrg MessageType bitsPerPixelFrom; /* set from config? */ 594f7df2e56Smrg rgb weight; /* r/g/b weights */ 595f7df2e56Smrg rgb mask; /* rgb masks */ 596f7df2e56Smrg rgb offset; /* rgb offsets */ 597f7df2e56Smrg int rgbBits; /* Number of bits in r/g/b */ 598f7df2e56Smrg Gamma gamma; /* Gamma of the monitor */ 599f7df2e56Smrg int defaultVisual; /* default visual class */ 600f7df2e56Smrg int virtualX; /* Virtual width */ 601f7df2e56Smrg int virtualY; /* Virtual height */ 602f7df2e56Smrg int xInc; /* Horizontal timing increment */ 603f7df2e56Smrg int displayWidth; /* memory pitch */ 604f7df2e56Smrg int frameX0; /* viewport position */ 605f7df2e56Smrg int frameY0; 606f7df2e56Smrg int frameX1; 607f7df2e56Smrg int frameY1; 608f7df2e56Smrg int zoomLocked; /* Disallow mode changes */ 609f7df2e56Smrg DisplayModePtr modePool; /* list of compatible modes */ 610f7df2e56Smrg DisplayModePtr modes; /* list of actual modes */ 611f7df2e56Smrg DisplayModePtr currentMode; /* current mode 612f7df2e56Smrg * This was previously 613f7df2e56Smrg * overloaded with the modes 614f7df2e56Smrg * field, which is a pointer 615f7df2e56Smrg * into a circular list */ 616f7df2e56Smrg confScreenPtr confScreen; /* Screen config info */ 617f7df2e56Smrg MonPtr monitor; /* Monitor information */ 618f7df2e56Smrg DispPtr display; /* Display information */ 619f7df2e56Smrg int *entityList; /* List of device entities */ 620f7df2e56Smrg int numEntities; 621f7df2e56Smrg int widthmm; /* physical display dimensions 622f7df2e56Smrg * in mm */ 623f7df2e56Smrg int heightmm; 624f7df2e56Smrg int xDpi; /* width DPI */ 625f7df2e56Smrg int yDpi; /* height DPI */ 626f7df2e56Smrg const char *name; /* Name to prefix messages */ 627f7df2e56Smrg void *driverPrivate; /* Driver private area */ 628f7df2e56Smrg DevUnion *privates; /* Other privates can hook in 629f7df2e56Smrg * here */ 630f7df2e56Smrg DriverPtr drv; /* xf86DriverList[] entry */ 631f7df2e56Smrg void *module; /* Pointer to module head */ 632f7df2e56Smrg int colorKey; 633f7df2e56Smrg int overlayFlags; 63405b261ecSmrg 63505b261ecSmrg /* Some of these may be moved out of here into the driver private area */ 63605b261ecSmrg 637f7df2e56Smrg const char *chipset; /* chipset name */ 638f7df2e56Smrg const char *ramdac; /* ramdac name */ 639f7df2e56Smrg const char *clockchip; /* clock name */ 640f7df2e56Smrg Bool progClock; /* clock is programmable */ 641f7df2e56Smrg int numClocks; /* number of clocks */ 642f7df2e56Smrg int clock[MAXCLOCKS]; /* list of clock frequencies */ 643f7df2e56Smrg int videoRam; /* amount of video ram (kb) */ 644f7df2e56Smrg unsigned long memPhysBase; /* Physical address of FB */ 645f7df2e56Smrg unsigned long fbOffset; /* Offset of FB in the above */ 646f7df2e56Smrg void *options; 647f7df2e56Smrg 64805b261ecSmrg /* Allow screens to be enabled/disabled individually */ 649f7df2e56Smrg Bool vtSema; 65005b261ecSmrg 6517e31ba66Smrg /* hw cursor moves from input thread */ 652f7df2e56Smrg Bool silkenMouse; 65305b261ecSmrg 65405b261ecSmrg /* Storage for clockRanges and adjustFlags for use with the VidMode ext */ 655f7df2e56Smrg ClockRangePtr clockRanges; 656f7df2e56Smrg int adjustFlags; 657f7df2e56Smrg 658f7df2e56Smrg /* initial rightof support disable */ 659f7df2e56Smrg int preferClone; 66005b261ecSmrg 6617e31ba66Smrg Bool is_gpu; 6627e31ba66Smrg uint32_t capabilities; 66305b261ecSmrg 664f7df2e56Smrg int *entityInstanceList; 665f7df2e56Smrg struct pci_device *vgaDev; 6666747b715Smrg 66705b261ecSmrg /* 66805b261ecSmrg * Driver entry points. 66905b261ecSmrg * 67005b261ecSmrg */ 67105b261ecSmrg 672f7df2e56Smrg xf86ProbeProc *Probe; 673f7df2e56Smrg xf86PreInitProc *PreInit; 674f7df2e56Smrg xf86ScreenInitProc *ScreenInit; 675f7df2e56Smrg xf86SwitchModeProc *SwitchMode; 676f7df2e56Smrg xf86AdjustFrameProc *AdjustFrame; 677f7df2e56Smrg xf86EnterVTProc *EnterVT; 678f7df2e56Smrg xf86LeaveVTProc *LeaveVT; 679f7df2e56Smrg xf86FreeScreenProc *FreeScreen; 680f7df2e56Smrg xf86ValidModeProc *ValidMode; 681f7df2e56Smrg xf86EnableDisableFBAccessProc *EnableDisableFBAccess; 682f7df2e56Smrg xf86SetDGAModeProc *SetDGAMode; 683f7df2e56Smrg xf86ChangeGammaProc *ChangeGamma; 684f7df2e56Smrg xf86PointerMovedProc *PointerMoved; 685f7df2e56Smrg xf86PMEventProc *PMEvent; 686f7df2e56Smrg xf86DPMSSetProc *DPMSSet; 687f7df2e56Smrg xf86LoadPaletteProc *LoadPalette; 688f7df2e56Smrg xf86SetOverscanProc *SetOverscan; 689f7df2e56Smrg xorgDriverFuncProc *DriverFunc; 690f7df2e56Smrg xf86ModeSetProc *ModeSet; 69105b261ecSmrg 6927e31ba66Smrg int reservedInt[NUM_RESERVED_INTS]; 6937e31ba66Smrg void *reservedPtr[NUM_RESERVED_POINTERS]; 694f7df2e56Smrg funcPointer reservedFuncs[NUM_RESERVED_FUNCS]; 69505b261ecSmrg} ScrnInfoRec; 69605b261ecSmrg 69705b261ecSmrgtypedef struct { 698f7df2e56Smrg Bool (*OpenFramebuffer) (ScrnInfoPtr pScrn, 699f7df2e56Smrg char **name, 700f7df2e56Smrg unsigned char **mem, 701f7df2e56Smrg int *size, int *offset, int *extra); 702f7df2e56Smrg void (*CloseFramebuffer) (ScrnInfoPtr pScrn); 703f7df2e56Smrg Bool (*SetMode) (ScrnInfoPtr pScrn, DGAModePtr pMode); 704f7df2e56Smrg void (*SetViewport) (ScrnInfoPtr pScrn, int x, int y, int flags); 705f7df2e56Smrg int (*GetViewport) (ScrnInfoPtr pScrn); 706f7df2e56Smrg void (*Sync) (ScrnInfoPtr); 707f7df2e56Smrg void (*FillRect) (ScrnInfoPtr pScrn, 708f7df2e56Smrg int x, int y, int w, int h, unsigned long color); 709f7df2e56Smrg void (*BlitRect) (ScrnInfoPtr pScrn, 710f7df2e56Smrg int srcx, int srcy, int w, int h, int dstx, int dsty); 711f7df2e56Smrg void (*BlitTransRect) (ScrnInfoPtr pScrn, 712f7df2e56Smrg int srcx, int srcy, 713f7df2e56Smrg int w, int h, 714f7df2e56Smrg int dstx, int dsty, unsigned long color); 71505b261ecSmrg} DGAFunctionRec, *DGAFunctionPtr; 71605b261ecSmrg 7174642e01fSmrgtypedef struct _SymTabRec { 718f7df2e56Smrg int token; /* id of the token */ 719f7df2e56Smrg const char *name; /* token name */ 72005b261ecSmrg} SymTabRec, *SymTabPtr; 72105b261ecSmrg 72205b261ecSmrg/* flags for xf86LookupMode */ 72305b261ecSmrgtypedef enum { 724f7df2e56Smrg LOOKUP_DEFAULT = 0, /* Use default mode lookup method */ 725f7df2e56Smrg LOOKUP_BEST_REFRESH, /* Pick modes with best refresh */ 726f7df2e56Smrg LOOKUP_CLOSEST_CLOCK, /* Pick modes with the closest clock */ 727f7df2e56Smrg LOOKUP_LIST_ORDER, /* Pick first useful mode in list */ 728f7df2e56Smrg LOOKUP_CLKDIV2 = 0x0100, /* Allow half clocks */ 729f7df2e56Smrg LOOKUP_OPTIONAL_TOLERANCES = 0x0200 /* Allow missing hsync/vrefresh */ 73005b261ecSmrg} LookupModeFlags; 73105b261ecSmrg 73205b261ecSmrg#define NoDepth24Support 0x00 733f7df2e56Smrg#define Support24bppFb 0x01 /* 24bpp framebuffer supported */ 734f7df2e56Smrg#define Support32bppFb 0x02 /* 32bpp framebuffer supported */ 735f7df2e56Smrg#define SupportConvert24to32 0x04 /* Can convert 24bpp pixmap to 32bpp */ 736f7df2e56Smrg#define SupportConvert32to24 0x08 /* Can convert 32bpp pixmap to 24bpp */ 737f7df2e56Smrg#define PreferConvert24to32 0x10 /* prefer 24bpp pixmap to 32bpp conv */ 738f7df2e56Smrg#define PreferConvert32to24 0x20 /* prefer 32bpp pixmap to 24bpp conv */ 73905b261ecSmrg 74005b261ecSmrg/* For DPMS */ 741f7df2e56Smrgtypedef void (*DPMSSetProcPtr) (ScrnInfoPtr, int, int); 74205b261ecSmrg 74305b261ecSmrg/* Input handler proc */ 744f7df2e56Smrgtypedef void (*InputHandlerProc) (int fd, void *data); 74505b261ecSmrg 74605b261ecSmrg/* These are used by xf86GetClocks */ 74705b261ecSmrg#define CLK_REG_SAVE -1 74805b261ecSmrg#define CLK_REG_RESTORE -2 74905b261ecSmrg 75005b261ecSmrg/* 75105b261ecSmrg * misc constants 75205b261ecSmrg */ 75305b261ecSmrg#define INTERLACE_REFRESH_WEIGHT 1.5 754f7df2e56Smrg#define SYNC_TOLERANCE 0.01 /* 1 percent */ 755f7df2e56Smrg#define CLOCK_TOLERANCE 2000 /* Clock matching tolerance (2MHz) */ 75605b261ecSmrg 75705b261ecSmrg#define OVERLAY_8_32_DUALFB 0x00000001 75805b261ecSmrg#define OVERLAY_8_24_DUALFB 0x00000002 75905b261ecSmrg#define OVERLAY_8_16_DUALFB 0x00000004 76005b261ecSmrg#define OVERLAY_8_32_PLANAR 0x00000008 76105b261ecSmrg 76205b261ecSmrg/* Values of xf86Info.mouseFlags */ 76305b261ecSmrg#define MF_CLEAR_DTR 1 76405b261ecSmrg#define MF_CLEAR_RTS 2 76505b261ecSmrg 76605b261ecSmrg/* Action Events */ 76705b261ecSmrgtypedef enum { 768f7df2e56Smrg ACTION_TERMINATE = 0, /* Terminate Server */ 769f7df2e56Smrg ACTION_NEXT_MODE = 10, /* Switch to next video mode */ 77005b261ecSmrg ACTION_PREV_MODE, 771f7df2e56Smrg ACTION_SWITCHSCREEN = 100, /* VT switch */ 77205b261ecSmrg ACTION_SWITCHSCREEN_NEXT, 77305b261ecSmrg ACTION_SWITCHSCREEN_PREV, 77405b261ecSmrg} ActionEvent; 77505b261ecSmrg 776f7df2e56Smrg#endif /* _XF86STR_H */ 777