xf86EdidModes.c revision 52397711
1/* 2 * Copyright 2006 Luc Verhaegen. 3 * Copyright 2008 Red Hat, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sub license, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 */ 24 25/** 26 * @file This file covers code to convert a xf86MonPtr containing EDID-probed 27 * information into a list of modes, including applying monitor-specific 28 * quirks to fix broken EDID data. 29 */ 30#ifdef HAVE_XORG_CONFIG_H 31#include <xorg-config.h> 32#else 33#ifdef HAVE_CONFIG_H 34#include <config.h> 35#endif 36#endif 37 38#define _PARSE_EDID_ 39#include "xf86.h" 40#include "xf86DDC.h" 41#include <X11/Xatom.h> 42#include "property.h" 43#include "propertyst.h" 44#include "xf86Crtc.h" 45#include <string.h> 46#include <math.h> 47 48static Bool 49xf86MonitorSupportsReducedBlanking(xf86MonPtr DDC) 50{ 51 /* EDID 1.4 explicitly defines RB support */ 52 if (DDC->ver.revision >= 4) { 53 int i; 54 for (i = 0; i < DET_TIMINGS; i++) { 55 struct detailed_monitor_section *det_mon = &DDC->det_mon[i]; 56 if (det_mon->type == DS_RANGES) 57 if (det_mon->section.ranges.supported_blanking & CVT_REDUCED) 58 return TRUE; 59 } 60 61 return FALSE; 62 } 63 64 /* For anything older, assume digital means RB support. Boo. */ 65 if (DDC->features.input_type) 66 return TRUE; 67 68 return FALSE; 69} 70 71/* 72 * Quirks to work around broken EDID data from various monitors. 73 */ 74 75typedef enum { 76 DDC_QUIRK_NONE = 0, 77 /* First detailed mode is bogus, prefer largest mode at 60hz */ 78 DDC_QUIRK_PREFER_LARGE_60 = 1 << 0, 79 /* 135MHz clock is too high, drop a bit */ 80 DDC_QUIRK_135_CLOCK_TOO_HIGH = 1 << 1, 81 /* Prefer the largest mode at 75 Hz */ 82 DDC_QUIRK_PREFER_LARGE_75 = 1 << 2, 83 /* Convert detailed timing's horizontal from units of cm to mm */ 84 DDC_QUIRK_DETAILED_H_IN_CM = 1 << 3, 85 /* Convert detailed timing's vertical from units of cm to mm */ 86 DDC_QUIRK_DETAILED_V_IN_CM = 1 << 4, 87 /* Detailed timing descriptors have bogus size values, so just take the 88 * maximum size and use that. 89 */ 90 DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE = 1 << 5, 91 /* Monitor forgot to set the first detailed is preferred bit. */ 92 DDC_QUIRK_FIRST_DETAILED_PREFERRED = 1 << 6, 93 /* use +hsync +vsync for detailed mode */ 94 DDC_QUIRK_DETAILED_SYNC_PP = 1 << 7, 95 /* Force single-link DVI bandwidth limit */ 96 DDC_QUIRK_DVI_SINGLE_LINK = 1 << 8, 97} ddc_quirk_t; 98 99static Bool quirk_prefer_large_60 (int scrnIndex, xf86MonPtr DDC) 100{ 101 /* Belinea 10 15 55 */ 102 if (memcmp (DDC->vendor.name, "MAX", 4) == 0 && 103 ((DDC->vendor.prod_id == 1516) || 104 (DDC->vendor.prod_id == 0x77e))) 105 return TRUE; 106 107 /* Acer AL1706 */ 108 if (memcmp (DDC->vendor.name, "ACR", 4) == 0 && 109 DDC->vendor.prod_id == 44358) 110 return TRUE; 111 112 /* Bug #10814: Samsung SyncMaster 225BW */ 113 if (memcmp (DDC->vendor.name, "SAM", 4) == 0 && 114 DDC->vendor.prod_id == 596) 115 return TRUE; 116 117 /* Bug #10545: Samsung SyncMaster 226BW */ 118 if (memcmp (DDC->vendor.name, "SAM", 4) == 0 && 119 DDC->vendor.prod_id == 638) 120 return TRUE; 121 122 /* Acer F51 */ 123 if (memcmp (DDC->vendor.name, "API", 4) == 0 && 124 DDC->vendor.prod_id == 0x7602) 125 return TRUE; 126 127 128 return FALSE; 129} 130 131static Bool quirk_prefer_large_75 (int scrnIndex, xf86MonPtr DDC) 132{ 133 /* Bug #11603: Funai Electronics PM36B */ 134 if (memcmp (DDC->vendor.name, "FCM", 4) == 0 && 135 DDC->vendor.prod_id == 13600) 136 return TRUE; 137 138 return FALSE; 139} 140 141static Bool quirk_detailed_h_in_cm (int scrnIndex, xf86MonPtr DDC) 142{ 143 /* Bug #11603: Funai Electronics PM36B */ 144 if (memcmp (DDC->vendor.name, "FCM", 4) == 0 && 145 DDC->vendor.prod_id == 13600) 146 return TRUE; 147 148 return FALSE; 149} 150 151static Bool quirk_detailed_v_in_cm (int scrnIndex, xf86MonPtr DDC) 152{ 153 /* Bug #11603: Funai Electronics PM36B */ 154 if (memcmp (DDC->vendor.name, "FCM", 4) == 0 && 155 DDC->vendor.prod_id == 13600) 156 return TRUE; 157 158 /* Bug #21000: LGPhilipsLCD LP154W01-TLAJ */ 159 if (memcmp (DDC->vendor.name, "LPL", 4) == 0 && 160 DDC->vendor.prod_id == 47360) 161 return TRUE; 162 163 return FALSE; 164} 165 166static Bool quirk_detailed_use_maximum_size (int scrnIndex, xf86MonPtr DDC) 167{ 168 /* Bug #10304: LGPhilipsLCD LP154W01-A5 */ 169 if (memcmp (DDC->vendor.name, "LPL", 4) == 0 && 170 (DDC->vendor.prod_id == 0 || DDC->vendor.prod_id == 0x2a00)) 171 return TRUE; 172 173 /* Bug #21324: Iiyama Vision Master 450 */ 174 if (memcmp (DDC->vendor.name, "IVM", 4) == 0 && 175 DDC->vendor.prod_id == 6400) 176 return TRUE; 177 178 return FALSE; 179} 180 181static Bool quirk_135_clock_too_high (int scrnIndex, xf86MonPtr DDC) 182{ 183 /* Envision Peripherals, Inc. EN-7100e. See bug #9550. */ 184 if (memcmp (DDC->vendor.name, "EPI", 4) == 0 && 185 DDC->vendor.prod_id == 59264) 186 return TRUE; 187 188 return FALSE; 189} 190 191static Bool quirk_first_detailed_preferred (int scrnIndex, xf86MonPtr DDC) 192{ 193 /* Philips 107p5 CRT. Reported on xorg@ with pastebin. */ 194 if (memcmp (DDC->vendor.name, "PHL", 4) == 0 && 195 DDC->vendor.prod_id == 57364) 196 return TRUE; 197 198 /* Proview AY765C 17" LCD. See bug #15160*/ 199 if (memcmp (DDC->vendor.name, "PTS", 4) == 0 && 200 DDC->vendor.prod_id == 765) 201 return TRUE; 202 203 /* ACR of some sort RH #284231 */ 204 if (memcmp (DDC->vendor.name, "ACR", 4) == 0 && 205 DDC->vendor.prod_id == 2423) 206 return TRUE; 207 208 return FALSE; 209} 210 211static Bool quirk_detailed_sync_pp(int scrnIndex, xf86MonPtr DDC) 212{ 213 /* Bug #12439: Samsung SyncMaster 205BW */ 214 if (memcmp (DDC->vendor.name, "SAM", 4) == 0 && 215 DDC->vendor.prod_id == 541) 216 return TRUE; 217 return FALSE; 218} 219 220/* This should probably be made more generic */ 221static Bool quirk_dvi_single_link(int scrnIndex, xf86MonPtr DDC) 222{ 223 /* Red Hat bug #453106: Apple 23" Cinema Display */ 224 if (memcmp (DDC->vendor.name, "APL", 4) == 0 && 225 DDC->vendor.prod_id == 0x921c) 226 return TRUE; 227 return FALSE; 228} 229 230typedef struct { 231 Bool (*detect) (int scrnIndex, xf86MonPtr DDC); 232 ddc_quirk_t quirk; 233 char *description; 234} ddc_quirk_map_t; 235 236static const ddc_quirk_map_t ddc_quirks[] = { 237 { 238 quirk_prefer_large_60, DDC_QUIRK_PREFER_LARGE_60, 239 "Detailed timing is not preferred, use largest mode at 60Hz" 240 }, 241 { 242 quirk_135_clock_too_high, DDC_QUIRK_135_CLOCK_TOO_HIGH, 243 "Recommended 135MHz pixel clock is too high" 244 }, 245 { 246 quirk_prefer_large_75, DDC_QUIRK_PREFER_LARGE_75, 247 "Detailed timing is not preferred, use largest mode at 75Hz" 248 }, 249 { 250 quirk_detailed_h_in_cm, DDC_QUIRK_DETAILED_H_IN_CM, 251 "Detailed timings give horizontal size in cm." 252 }, 253 { 254 quirk_detailed_v_in_cm, DDC_QUIRK_DETAILED_V_IN_CM, 255 "Detailed timings give vertical size in cm." 256 }, 257 { 258 quirk_detailed_use_maximum_size, DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE, 259 "Detailed timings give sizes in cm." 260 }, 261 { 262 quirk_first_detailed_preferred, DDC_QUIRK_FIRST_DETAILED_PREFERRED, 263 "First detailed timing was not marked as preferred." 264 }, 265 { 266 quirk_detailed_sync_pp, DDC_QUIRK_DETAILED_SYNC_PP, 267 "Use +hsync +vsync for detailed timing." 268 }, 269 { 270 quirk_dvi_single_link, DDC_QUIRK_DVI_SINGLE_LINK, 271 "Forcing maximum pixel clock to single DVI link." 272 }, 273 { 274 NULL, DDC_QUIRK_NONE, 275 "No known quirks" 276 }, 277}; 278 279/* 280 * These more or less come from the DMT spec. The 720x400 modes are 281 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75 282 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode 283 * should be 1152x870, again for the Mac, but instead we use the x864 DMT 284 * mode. 285 * 286 * The DMT modes have been fact-checked; the rest are mild guesses. 287 */ 288#define MODEPREFIX NULL, NULL, NULL, 0, M_T_DRIVER 289#define MODESUFFIX 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,FALSE,FALSE,0,NULL,0,0.0,0.0 290 291static const DisplayModeRec DDCEstablishedModes[17] = { 292 { MODEPREFIX, 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@60Hz */ 293 { MODEPREFIX, 36000, 800, 824, 896, 1024, 0, 600, 601, 603, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@56Hz */ 294 { MODEPREFIX, 31500, 640, 656, 720, 840, 0, 480, 481, 484, 500, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@75Hz */ 295 { MODEPREFIX, 31500, 640, 664, 704, 832, 0, 480, 489, 492, 520, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@72Hz */ 296 { MODEPREFIX, 30240, 640, 704, 768, 864, 0, 480, 483, 486, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@67Hz */ 297 { MODEPREFIX, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@60Hz */ 298 { MODEPREFIX, 35500, 720, 738, 846, 900, 0, 400, 421, 423, 449, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 720x400@88Hz */ 299 { MODEPREFIX, 28320, 720, 738, 846, 900, 0, 400, 412, 414, 449, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 720x400@70Hz */ 300 { MODEPREFIX, 135000, 1280, 1296, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x1024@75Hz */ 301 { MODEPREFIX, 78750, 1024, 1040, 1136, 1312, 0, 768, 769, 772, 800, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1024x768@75Hz */ 302 { MODEPREFIX, 75000, 1024, 1048, 1184, 1328, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 1024x768@70Hz */ 303 { MODEPREFIX, 65000, 1024, 1048, 1184, 1344, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 1024x768@60Hz */ 304 { MODEPREFIX, 44900, 1024, 1032, 1208, 1264, 0, 768, 768, 772, 817, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX }, /* 1024x768@43Hz */ 305 { MODEPREFIX, 57284, 832, 864, 928, 1152, 0, 624, 625, 628, 667, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 832x624@75Hz */ 306 { MODEPREFIX, 49500, 800, 816, 896, 1056, 0, 600, 601, 604, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@75Hz */ 307 { MODEPREFIX, 50000, 800, 856, 976, 1040, 0, 600, 637, 643, 666, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@72Hz */ 308 { MODEPREFIX, 108000, 1152, 1216, 1344, 1600, 0, 864, 865, 868, 900, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1152x864@75Hz */ 309}; 310 311static DisplayModePtr 312DDCModesFromEstablished(int scrnIndex, struct established_timings *timing, 313 ddc_quirk_t quirks) 314{ 315 DisplayModePtr Modes = NULL, Mode = NULL; 316 CARD32 bits = (timing->t1) | (timing->t2 << 8) | 317 ((timing->t_manu & 0x80) << 9); 318 int i; 319 320 for (i = 0; i < 17; i++) { 321 if (bits & (0x01 << i)) { 322 Mode = xf86DuplicateMode(&DDCEstablishedModes[i]); 323 Modes = xf86ModesAdd(Modes, Mode); 324 } 325 } 326 327 return Modes; 328} 329 330/* Autogenerated from the DMT spec */ 331static const DisplayModeRec DMTModes[] = { 332 { MODEPREFIX, 31500, 640, 672, 736, 832, 0, 350, 382, 385, 445, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x350@85Hz */ 333 { MODEPREFIX, 31500, 640, 672, 736, 832, 0, 400, 401, 404, 445, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 640x400@85Hz */ 334 { MODEPREFIX, 35500, 720, 756, 828, 936, 0, 400, 401, 404, 446, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 720x400@85Hz */ 335 { MODEPREFIX, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@60Hz */ 336 { MODEPREFIX, 31500, 640, 664, 704, 832, 0, 480, 489, 492, 520, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@72Hz */ 337 { MODEPREFIX, 31500, 640, 656, 720, 840, 0, 480, 481, 484, 500, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@75Hz */ 338 { MODEPREFIX, 36000, 640, 696, 752, 832, 0, 480, 481, 484, 509, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@85Hz */ 339 { MODEPREFIX, 36000, 800, 824, 896, 1024, 0, 600, 601, 603, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@56Hz */ 340 { MODEPREFIX, 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@60Hz */ 341 { MODEPREFIX, 50000, 800, 856, 976, 1040, 0, 600, 637, 643, 666, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@72Hz */ 342 { MODEPREFIX, 49500, 800, 816, 896, 1056, 0, 600, 601, 604, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@75Hz */ 343 { MODEPREFIX, 56250, 800, 832, 896, 1048, 0, 600, 601, 604, 631, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@85Hz */ 344 { MODEPREFIX, 73250, 800, 848, 880, 960, 0, 600, 603, 607, 636, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 800x600@120Hz RB */ 345 { MODEPREFIX, 33750, 848, 864, 976, 1088, 0, 480, 486, 494, 517, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 848x480@60Hz */ 346 { MODEPREFIX, 44900, 1024, 1032, 1208, 1264, 0, 768, 768, 772, 817, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX }, /* 1024x768@43Hz (interlaced) */ 347 { MODEPREFIX, 65000, 1024, 1048, 1184, 1344, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 1024x768@60Hz */ 348 { MODEPREFIX, 75000, 1024, 1048, 1184, 1328, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 1024x768@70Hz */ 349 { MODEPREFIX, 78750, 1024, 1040, 1136, 1312, 0, 768, 769, 772, 800, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1024x768@75Hz */ 350 { MODEPREFIX, 94500, 1024, 1072, 1168, 1376, 0, 768, 769, 772, 808, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1024x768@85Hz */ 351 { MODEPREFIX, 115500, 1024, 1072, 1104, 1184, 0, 768, 771, 775, 813, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1024x768@120Hz RB */ 352 { MODEPREFIX, 108000, 1152, 1216, 1344, 1600, 0, 864, 865, 868, 900, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1152x864@75Hz */ 353 { MODEPREFIX, 68250, 1280, 1328, 1360, 1440, 0, 768, 771, 778, 790, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1280x768@60Hz RB */ 354 { MODEPREFIX, 79500, 1280, 1344, 1472, 1664, 0, 768, 771, 778, 798, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x768@60Hz */ 355 { MODEPREFIX, 102250, 1280, 1360, 1488, 1696, 0, 768, 771, 778, 805, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x768@75Hz */ 356 { MODEPREFIX, 117500, 1280, 1360, 1496, 1712, 0, 768, 771, 778, 809, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x768@85Hz */ 357 { MODEPREFIX, 140250, 1280, 1328, 1360, 1440, 0, 768, 771, 778, 813, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1280x768@120Hz RB */ 358 { MODEPREFIX, 71000, 1280, 1328, 1360, 1440, 0, 800, 803, 809, 823, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1280x800@60Hz RB */ 359 { MODEPREFIX, 83500, 1280, 1352, 1480, 1680, 0, 800, 803, 809, 831, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x800@60Hz */ 360 { MODEPREFIX, 106500, 1280, 1360, 1488, 1696, 0, 800, 803, 809, 838, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x800@75Hz */ 361 { MODEPREFIX, 122500, 1280, 1360, 1496, 1712, 0, 800, 803, 809, 843, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x800@85Hz */ 362 { MODEPREFIX, 146250, 1280, 1328, 1360, 1440, 0, 800, 803, 809, 847, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1280x800@120Hz RB */ 363 { MODEPREFIX, 108000, 1280, 1376, 1488, 1800, 0, 960, 961, 964, 1000, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x960@60Hz */ 364 { MODEPREFIX, 148500, 1280, 1344, 1504, 1728, 0, 960, 961, 964, 1011, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x960@85Hz */ 365 { MODEPREFIX, 175500, 1280, 1328, 1360, 1440, 0, 960, 963, 967, 1017, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1280x960@120Hz RB */ 366 { MODEPREFIX, 108000, 1280, 1328, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x1024@60Hz */ 367 { MODEPREFIX, 135000, 1280, 1296, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x1024@75Hz */ 368 { MODEPREFIX, 157500, 1280, 1344, 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x1024@85Hz */ 369 { MODEPREFIX, 187250, 1280, 1328, 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1280x1024@120Hz RB */ 370 { MODEPREFIX, 85500, 1360, 1424, 1536, 1792, 0, 768, 771, 777, 795, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1360x768@60Hz */ 371 { MODEPREFIX, 148250, 1360, 1408, 1440, 1520, 0, 768, 771, 776, 813, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1360x768@120Hz RB */ 372 { MODEPREFIX, 101000, 1400, 1448, 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1400x1050@60Hz RB */ 373 { MODEPREFIX, 121750, 1400, 1488, 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1400x1050@60Hz */ 374 { MODEPREFIX, 156000, 1400, 1504, 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1400x1050@75Hz */ 375 { MODEPREFIX, 179500, 1400, 1504, 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1400x1050@85Hz */ 376 { MODEPREFIX, 208000, 1400, 1448, 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1400x1050@120Hz RB */ 377 { MODEPREFIX, 88750, 1440, 1488, 1520, 1600, 0, 900, 903, 909, 926, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1440x900@60Hz RB */ 378 { MODEPREFIX, 106500, 1440, 1520, 1672, 1904, 0, 900, 903, 909, 934, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1440x900@60Hz */ 379 { MODEPREFIX, 136750, 1440, 1536, 1688, 1936, 0, 900, 903, 909, 942, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1440x900@75Hz */ 380 { MODEPREFIX, 157000, 1440, 1544, 1696, 1952, 0, 900, 903, 909, 948, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1440x900@85Hz */ 381 { MODEPREFIX, 182750, 1440, 1488, 1520, 1600, 0, 900, 903, 909, 953, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1440x900@120Hz RB */ 382 { MODEPREFIX, 162000, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1600x1200@60Hz */ 383 { MODEPREFIX, 175500, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1600x1200@65Hz */ 384 { MODEPREFIX, 189000, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1600x1200@70Hz */ 385 { MODEPREFIX, 202500, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1600x1200@75Hz */ 386 { MODEPREFIX, 229500, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1600x1200@85Hz */ 387 { MODEPREFIX, 268250, 1600, 1648, 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1600x1200@120Hz RB */ 388 { MODEPREFIX, 119000, 1680, 1728, 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1680x1050@60Hz RB */ 389 { MODEPREFIX, 146250, 1680, 1784, 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1680x1050@60Hz */ 390 { MODEPREFIX, 187000, 1680, 1800, 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1680x1050@75Hz */ 391 { MODEPREFIX, 214750, 1680, 1808, 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1680x1050@85Hz */ 392 { MODEPREFIX, 245500, 1680, 1728, 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1680x1050@120Hz RB */ 393 { MODEPREFIX, 204750, 1792, 1920, 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1792x1344@60Hz */ 394 { MODEPREFIX, 261000, 1792, 1888, 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1792x1344@75Hz */ 395 { MODEPREFIX, 333250, 1792, 1840, 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1792x1344@120Hz RB */ 396 { MODEPREFIX, 218250, 1856, 1952, 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1856x1392@60Hz */ 397 { MODEPREFIX, 288000, 1856, 1984, 2208, 2560, 0, 1392, 1393, 1396, 1500, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1856x1392@75Hz */ 398 { MODEPREFIX, 356500, 1856, 1904, 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1856x1392@120Hz RB */ 399 { MODEPREFIX, 154000, 1920, 1968, 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1920x1200@60Hz RB */ 400 { MODEPREFIX, 193250, 1920, 2056, 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1920x1200@60Hz */ 401 { MODEPREFIX, 245250, 1920, 2056, 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1920x1200@75Hz */ 402 { MODEPREFIX, 281250, 1920, 2064, 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1920x1200@85Hz */ 403 { MODEPREFIX, 317000, 1920, 1968, 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1920x1200@120Hz RB */ 404 { MODEPREFIX, 234000, 1920, 2048, 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1920x1440@60Hz */ 405 { MODEPREFIX, 297000, 1920, 2064, 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 1920x1440@75Hz */ 406 { MODEPREFIX, 380500, 1920, 1968, 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 1920x1440@120Hz RB */ 407 { MODEPREFIX, 268500, 2560, 2608, 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 2560x1600@60Hz RB */ 408 { MODEPREFIX, 348500, 2560, 2752, 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 2560x1600@60Hz */ 409 { MODEPREFIX, 443250, 2560, 2768, 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 2560x1600@75Hz */ 410 { MODEPREFIX, 505250, 2560, 2768, 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 2560x1600@85Hz */ 411 { MODEPREFIX, 552750, 2560, 2608, 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, /* 2560x1600@120Hz RB */ 412}; 413 414#define LEVEL_DMT 0 415#define LEVEL_GTF 1 416#define LEVEL_CVT 2 417 418static int 419MonitorStandardTimingLevel(xf86MonPtr DDC) 420{ 421 if (DDC->ver.revision >= 2) { 422 if (DDC->ver.revision >= 4 && CVT_SUPPORTED(DDC->features.msc)) { 423 return LEVEL_CVT; 424 } 425 return LEVEL_GTF; 426 } 427 return LEVEL_DMT; 428} 429 430static int 431ModeRefresh(const DisplayModeRec *mode) 432{ 433 return (int)(xf86ModeVRefresh(mode) + 0.5); 434} 435 436/* 437 * If rb is not set, then we'll not consider reduced-blanking modes as 438 * part of the DMT pool. For the 'standard' EDID mode descriptor there's 439 * no way to specify whether the mode should be RB or not. 440 */ 441static DisplayModePtr 442FindDMTMode(int hsize, int vsize, int refresh, Bool rb) 443{ 444 int i; 445 const DisplayModeRec *ret; 446 447 for (i = 0; i < sizeof(DMTModes) / sizeof(DisplayModeRec); i++) { 448 ret = &DMTModes[i]; 449 450 if (!rb && xf86ModeIsReduced(ret)) 451 continue; 452 453 if (ret->HDisplay == hsize && 454 ret->VDisplay == vsize && 455 refresh == ModeRefresh(ret)) 456 return xf86DuplicateMode(ret); 457 } 458 459 return NULL; 460} 461 462/* 463 * Appendix B of the EDID 1.4 spec defines the right thing to do here. 464 * If the timing given here matches a mode defined in the VESA DMT standard, 465 * we _must_ use that. If the device supports CVT modes, then we should 466 * generate a CVT timing. If both of the above fail, use GTF. 467 * 468 * There are some wrinkles here. EDID 1.1 and 1.0 sinks can't really 469 * "support" GTF, since it wasn't a standard yet; so if they ask for a 470 * timing in this section that isn't defined in DMT, returning a GTF mode 471 * may not actually be valid. EDID 1.3 sinks often report support for 472 * some CVT modes, but they are not required to support CVT timings for 473 * modes in the standard timing descriptor, so we should _not_ treat them 474 * as CVT-compliant (unless specified in an extension block I suppose). 475 * 476 * EDID 1.4 requires that all sink devices support both GTF and CVT timings 477 * for modes in this section, but does say that CVT is preferred. 478 */ 479static DisplayModePtr 480DDCModesFromStandardTiming(struct std_timings *timing, ddc_quirk_t quirks, 481 int timing_level, Bool rb) 482{ 483 DisplayModePtr Modes = NULL, Mode = NULL; 484 int i; 485 486 for (i = 0; i < STD_TIMINGS; i++) { 487 if (timing[i].hsize && timing[i].vsize && timing[i].refresh) { 488 Mode = FindDMTMode(timing[i].hsize, timing[i].vsize, 489 timing[i].refresh, rb); 490 491 if (!Mode) { 492 if (timing_level == LEVEL_CVT) 493 /* pass rb here too? */ 494 Mode = xf86CVTMode(timing[i].hsize, timing[i].vsize, 495 timing[i].refresh, FALSE, FALSE); 496 else if (timing_level == LEVEL_GTF) 497 Mode = xf86GTFMode(timing[i].hsize, timing[i].vsize, 498 timing[i].refresh, FALSE, FALSE); 499 } 500 501 if (!Mode) 502 continue; 503 504 Mode->type = M_T_DRIVER; 505 Modes = xf86ModesAdd(Modes, Mode); 506 } 507 } 508 509 return Modes; 510} 511 512/* 513 * 514 */ 515static DisplayModePtr 516DDCModeFromDetailedTiming(int scrnIndex, struct detailed_timings *timing, 517 Bool preferred, ddc_quirk_t quirks) 518{ 519 DisplayModePtr Mode; 520 521 /* 522 * Refuse to create modes that are insufficiently large. 64 is a random 523 * number, maybe the spec says something about what the minimum is. In 524 * particular I see this frequently with _old_ EDID, 1.0 or so, so maybe 525 * our parser is just being too aggresive there. 526 */ 527 if (timing->h_active < 64 || timing->v_active < 64) { 528 xf86DrvMsg(scrnIndex, X_INFO, 529 "%s: Ignoring tiny %dx%d mode\n", __func__, 530 timing->h_active, timing->v_active); 531 return NULL; 532 } 533 534 /* We don't do stereo */ 535 if (timing->stereo) { 536 xf86DrvMsg(scrnIndex, X_INFO, 537 "%s: Ignoring: We don't handle stereo.\n", __func__); 538 return NULL; 539 } 540 541 /* We only do seperate sync currently */ 542 if (timing->sync != 0x03) { 543 xf86DrvMsg(scrnIndex, X_INFO, 544 "%s: %dx%d Warning: We only handle separate" 545 " sync.\n", __func__, timing->h_active, timing->v_active); 546 } 547 548 Mode = xnfcalloc(1, sizeof(DisplayModeRec)); 549 550 Mode->type = M_T_DRIVER; 551 if (preferred) 552 Mode->type |= M_T_PREFERRED; 553 554 if( ( quirks & DDC_QUIRK_135_CLOCK_TOO_HIGH ) && 555 timing->clock == 135000000 ) 556 Mode->Clock = 108880; 557 else 558 Mode->Clock = timing->clock / 1000.0; 559 560 Mode->HDisplay = timing->h_active; 561 Mode->HSyncStart = timing->h_active + timing->h_sync_off; 562 Mode->HSyncEnd = Mode->HSyncStart + timing->h_sync_width; 563 Mode->HTotal = timing->h_active + timing->h_blanking; 564 565 Mode->VDisplay = timing->v_active; 566 Mode->VSyncStart = timing->v_active + timing->v_sync_off; 567 Mode->VSyncEnd = Mode->VSyncStart + timing->v_sync_width; 568 Mode->VTotal = timing->v_active + timing->v_blanking; 569 570 /* perform basic check on the detail timing */ 571 if (Mode->HSyncEnd > Mode->HTotal || Mode->VSyncEnd > Mode->VTotal) { 572 xfree(Mode); 573 return NULL; 574 } 575 576 xf86SetModeDefaultName(Mode); 577 578 /* We ignore h/v_size and h/v_border for now. */ 579 580 if (timing->interlaced) 581 Mode->Flags |= V_INTERLACE; 582 583 if (quirks & DDC_QUIRK_DETAILED_SYNC_PP) 584 Mode->Flags |= V_PVSYNC | V_PHSYNC; 585 else { 586 if (timing->misc & 0x02) 587 Mode->Flags |= V_PVSYNC; 588 else 589 Mode->Flags |= V_NVSYNC; 590 591 if (timing->misc & 0x01) 592 Mode->Flags |= V_PHSYNC; 593 else 594 Mode->Flags |= V_NHSYNC; 595 } 596 597 return Mode; 598} 599 600#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0) 601static DisplayModePtr 602DDCModesFromCVT(int scrnIndex, struct cvt_timings *t) 603{ 604 DisplayModePtr modes = NULL; 605 int i; 606 607 for (i = 0; i < 4; i++) { 608 if (t[i].height) { 609 if (t[i].rates & 0x10) 610 modes = xf86ModesAdd(modes, 611 xf86CVTMode(t[i].width, t[i].height, 50, 0, 0)); 612 if (t[i].rates & 0x08) 613 modes = xf86ModesAdd(modes, 614 xf86CVTMode(t[i].width, t[i].height, 60, 0, 0)); 615 if (t[i].rates & 0x04) 616 modes = xf86ModesAdd(modes, 617 xf86CVTMode(t[i].width, t[i].height, 75, 0, 0)); 618 if (t[i].rates & 0x02) 619 modes = xf86ModesAdd(modes, 620 xf86CVTMode(t[i].width, t[i].height, 85, 0, 0)); 621 if (t[i].rates & 0x01) 622 modes = xf86ModesAdd(modes, 623 xf86CVTMode(t[i].width, t[i].height, 60, 1, 0)); 624 } else break; 625 } 626 627 return modes; 628} 629#endif 630 631static const struct { 632 short w; 633 short h; 634 short r; 635 short rb; 636} EstIIIModes[] = { 637 /* byte 6 */ 638 { 640, 350, 85, 0 }, 639 { 640, 400, 85, 0 }, 640 { 720, 400, 85, 0 }, 641 { 640, 480, 85, 0 }, 642 { 848, 480, 60, 0 }, 643 { 800, 600, 85, 0 }, 644 { 1024, 768, 85, 0 }, 645 { 1152, 864, 75, 0 }, 646 /* byte 7 */ 647 { 1280, 768, 60, 1 }, 648 { 1280, 768, 60, 0 }, 649 { 1280, 768, 75, 0 }, 650 { 1280, 768, 85, 0 }, 651 { 1280, 960, 60, 0 }, 652 { 1280, 960, 85, 0 }, 653 { 1280, 1024, 60, 0 }, 654 { 1280, 1024, 85, 0 }, 655 /* byte 8 */ 656 { 1360, 768, 60, 0 }, 657 { 1440, 900, 60, 1 }, 658 { 1440, 900, 60, 0 }, 659 { 1440, 900, 75, 0 }, 660 { 1440, 900, 85, 0 }, 661 { 1400, 1050, 60, 1 }, 662 { 1400, 1050, 60, 0 }, 663 { 1400, 1050, 75, 0 }, 664 /* byte 9 */ 665 { 1400, 1050, 85, 0 }, 666 { 1680, 1050, 60, 1 }, 667 { 1680, 1050, 60, 0 }, 668 { 1680, 1050, 75, 0 }, 669 { 1680, 1050, 85, 0 }, 670 { 1600, 1200, 60, 0 }, 671 { 1600, 1200, 65, 0 }, 672 { 1600, 1200, 70, 0 }, 673 /* byte 10 */ 674 { 1600, 1200, 75, 0 }, 675 { 1600, 1200, 85, 0 }, 676 { 1792, 1344, 60, 0 }, 677 { 1792, 1344, 85, 0 }, 678 { 1856, 1392, 60, 0 }, 679 { 1856, 1392, 75, 0 }, 680 { 1920, 1200, 60, 1 }, 681 { 1920, 1200, 60, 0 }, 682 /* byte 11 */ 683 { 1920, 1200, 75, 0 }, 684 { 1920, 1200, 85, 0 }, 685 { 1920, 1440, 60, 0 }, 686 { 1920, 1440, 75, 0 }, 687}; 688 689static DisplayModePtr 690DDCModesFromEstIII(unsigned char *est) 691{ 692 DisplayModePtr modes = NULL; 693 int i, j, m; 694 695 for (i = 0; i < 6; i++) { 696 for (j = 7; j > 0; j--) { 697 if (est[i] & (1 << j)) { 698 m = (i * 8) + (7 - j); 699 modes = xf86ModesAdd(modes, 700 FindDMTMode(EstIIIModes[m].w, 701 EstIIIModes[m].h, 702 EstIIIModes[m].r, 703 EstIIIModes[m].rb)); 704 } 705 } 706 } 707 708 return modes; 709} 710 711/* 712 * This is only valid when the sink claims to be continuous-frequency 713 * but does not supply a detailed range descriptor. Such sinks are 714 * arguably broken. Currently the mode validation code isn't aware of 715 * this; the non-RANDR code even punts the decision of optional sync 716 * range checking to the driver. Loss. 717 */ 718static void 719DDCGuessRangesFromModes(int scrnIndex, MonPtr Monitor, DisplayModePtr Modes) 720{ 721 DisplayModePtr Mode = Modes; 722 723 if (!Monitor || !Modes) 724 return; 725 726 /* set up the ranges for scanning through the modes */ 727 Monitor->nHsync = 1; 728 Monitor->hsync[0].lo = 1024.0; 729 Monitor->hsync[0].hi = 0.0; 730 731 Monitor->nVrefresh = 1; 732 Monitor->vrefresh[0].lo = 1024.0; 733 Monitor->vrefresh[0].hi = 0.0; 734 735 while (Mode) { 736 if (!Mode->HSync) 737 Mode->HSync = ((float) Mode->Clock ) / ((float) Mode->HTotal); 738 739 if (!Mode->VRefresh) 740 Mode->VRefresh = (1000.0 * ((float) Mode->Clock)) / 741 ((float) (Mode->HTotal * Mode->VTotal)); 742 743 if (Mode->HSync < Monitor->hsync[0].lo) 744 Monitor->hsync[0].lo = Mode->HSync; 745 746 if (Mode->HSync > Monitor->hsync[0].hi) 747 Monitor->hsync[0].hi = Mode->HSync; 748 749 if (Mode->VRefresh < Monitor->vrefresh[0].lo) 750 Monitor->vrefresh[0].lo = Mode->VRefresh; 751 752 if (Mode->VRefresh > Monitor->vrefresh[0].hi) 753 Monitor->vrefresh[0].hi = Mode->VRefresh; 754 755 Mode = Mode->next; 756 } 757} 758 759static ddc_quirk_t 760xf86DDCDetectQuirks(int scrnIndex, xf86MonPtr DDC, Bool verbose) 761{ 762 ddc_quirk_t quirks; 763 int i; 764 765 quirks = DDC_QUIRK_NONE; 766 for (i = 0; ddc_quirks[i].detect; i++) { 767 if (ddc_quirks[i].detect (scrnIndex, DDC)) { 768 if (verbose) { 769 xf86DrvMsg (scrnIndex, X_INFO, " EDID quirk: %s\n", 770 ddc_quirks[i].description); 771 } 772 quirks |= ddc_quirks[i].quirk; 773 } 774 } 775 776 return quirks; 777} 778 779/** 780 * Applies monitor-specific quirks to the decoded EDID information. 781 * 782 * Note that some quirks applying to the mode list are still implemented in 783 * xf86DDCGetModes. 784 */ 785void 786xf86DDCApplyQuirks(int scrnIndex, xf86MonPtr DDC) 787{ 788 ddc_quirk_t quirks = xf86DDCDetectQuirks (scrnIndex, DDC, FALSE); 789 int i; 790 791 for (i = 0; i < DET_TIMINGS; i++) { 792 struct detailed_monitor_section *det_mon = &DDC->det_mon[i]; 793 794 if (det_mon->type != DT) 795 continue; 796 797 if (quirks & DDC_QUIRK_DETAILED_H_IN_CM) 798 det_mon->section.d_timings.h_size *= 10; 799 800 if (quirks & DDC_QUIRK_DETAILED_V_IN_CM) 801 det_mon->section.d_timings.v_size *= 10; 802 803 if (quirks & DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 804 det_mon->section.d_timings.h_size = 10 * DDC->features.hsize; 805 det_mon->section.d_timings.v_size = 10 * DDC->features.vsize; 806 } 807 } 808} 809 810/** 811 * Walks the modes list, finding the mode with the largest area which is 812 * closest to the target refresh rate, and marks it as the only preferred mode. 813*/ 814static void 815xf86DDCSetPreferredRefresh(int scrnIndex, DisplayModePtr modes, 816 float target_refresh) 817{ 818 DisplayModePtr mode, best = modes; 819 820 for (mode = modes; mode; mode = mode->next) 821 { 822 mode->type &= ~M_T_PREFERRED; 823 824 if (mode == best) continue; 825 826 if (mode->HDisplay * mode->VDisplay > 827 best->HDisplay * best->VDisplay) 828 { 829 best = mode; 830 continue; 831 } 832 if (mode->HDisplay * mode->VDisplay == 833 best->HDisplay * best->VDisplay) 834 { 835 double mode_refresh = xf86ModeVRefresh (mode); 836 double best_refresh = xf86ModeVRefresh (best); 837 double mode_dist = fabs(mode_refresh - target_refresh); 838 double best_dist = fabs(best_refresh - target_refresh); 839 840 if (mode_dist < best_dist) 841 { 842 best = mode; 843 continue; 844 } 845 } 846 } 847 if (best) 848 best->type |= M_T_PREFERRED; 849} 850 851_X_EXPORT DisplayModePtr 852xf86DDCGetModes(int scrnIndex, xf86MonPtr DDC) 853{ 854 int i; 855 DisplayModePtr Modes = NULL, Mode; 856 ddc_quirk_t quirks; 857 Bool preferred, rb; 858 int timing_level; 859 860 xf86DrvMsg (scrnIndex, X_INFO, "EDID vendor \"%s\", prod id %d\n", 861 DDC->vendor.name, DDC->vendor.prod_id); 862 863 quirks = xf86DDCDetectQuirks(scrnIndex, DDC, TRUE); 864 865 preferred = PREFERRED_TIMING_MODE(DDC->features.msc); 866 if (DDC->ver.revision >= 4) 867 preferred = TRUE; 868 if (quirks & DDC_QUIRK_FIRST_DETAILED_PREFERRED) 869 preferred = TRUE; 870 if (quirks & (DDC_QUIRK_PREFER_LARGE_60 | DDC_QUIRK_PREFER_LARGE_75)) 871 preferred = FALSE; 872 873 rb = xf86MonitorSupportsReducedBlanking(DDC); 874 875 timing_level = MonitorStandardTimingLevel(DDC); 876 877 for (i = 0; i < DET_TIMINGS; i++) { 878 struct detailed_monitor_section *det_mon = &DDC->det_mon[i]; 879 880 Mode = NULL; 881 switch (det_mon->type) { 882 case DT: 883 Mode = DDCModeFromDetailedTiming(scrnIndex, 884 &det_mon->section.d_timings, 885 preferred, 886 quirks); 887 preferred = FALSE; 888 break; 889 case DS_STD_TIMINGS: 890 Mode = DDCModesFromStandardTiming(det_mon->section.std_t, 891 quirks, timing_level, rb); 892 break; 893#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0) 894 case DS_CVT: 895 Mode = DDCModesFromCVT(scrnIndex, det_mon->section.cvt); 896 break; 897#endif 898 case DS_EST_III: 899 Mode = DDCModesFromEstIII(det_mon->section.est_iii); 900 break; 901 default: 902 break; 903 } 904 Modes = xf86ModesAdd(Modes, Mode); 905 } 906 907 /* Add established timings */ 908 Mode = DDCModesFromEstablished(scrnIndex, &DDC->timings1, quirks); 909 Modes = xf86ModesAdd(Modes, Mode); 910 911 /* Add standard timings */ 912 Mode = DDCModesFromStandardTiming(DDC->timings2, quirks, timing_level, rb); 913 Modes = xf86ModesAdd(Modes, Mode); 914 915 if (quirks & DDC_QUIRK_PREFER_LARGE_60) 916 xf86DDCSetPreferredRefresh(scrnIndex, Modes, 60); 917 918 if (quirks & DDC_QUIRK_PREFER_LARGE_75) 919 xf86DDCSetPreferredRefresh(scrnIndex, Modes, 75); 920 921 return Modes; 922} 923 924/* 925 * Fill out MonPtr with xf86MonPtr information. 926 */ 927_X_EXPORT void 928xf86DDCMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC) 929{ 930 DisplayModePtr Modes = NULL, Mode; 931 int i, clock; 932 Bool have_hsync = FALSE, have_vrefresh = FALSE, have_maxpixclock = FALSE; 933 ddc_quirk_t quirks; 934 935 if (!Monitor || !DDC) 936 return; 937 938 Monitor->DDC = DDC; 939 940 quirks = xf86DDCDetectQuirks(scrnIndex, DDC, FALSE); 941 942 if (Monitor->widthmm <= 0 && Monitor->heightmm <= 0) { 943 Monitor->widthmm = 10 * DDC->features.hsize; 944 Monitor->heightmm = 10 * DDC->features.vsize; 945 } 946 947 Monitor->reducedblanking = xf86MonitorSupportsReducedBlanking(DDC); 948 949 Modes = xf86DDCGetModes(scrnIndex, DDC); 950 951 /* Skip EDID ranges if they were specified in the config file */ 952 have_hsync = (Monitor->nHsync != 0); 953 have_vrefresh = (Monitor->nVrefresh != 0); 954 have_maxpixclock = (Monitor->maxPixClock != 0); 955 956 /* Go through the detailed monitor sections */ 957 for (i = 0; i < DET_TIMINGS; i++) { 958 switch (DDC->det_mon[i].type) { 959 case DS_RANGES: 960 if (!have_hsync) { 961 if (!Monitor->nHsync) 962 xf86DrvMsg(scrnIndex, X_INFO, 963 "Using EDID range info for horizontal sync\n"); 964 Monitor->hsync[Monitor->nHsync].lo = 965 DDC->det_mon[i].section.ranges.min_h; 966 Monitor->hsync[Monitor->nHsync].hi = 967 DDC->det_mon[i].section.ranges.max_h; 968 Monitor->nHsync++; 969 } else { 970 xf86DrvMsg(scrnIndex, X_INFO, 971 "Using hsync ranges from config file\n"); 972 } 973 974 if (!have_vrefresh) { 975 if (!Monitor->nVrefresh) 976 xf86DrvMsg(scrnIndex, X_INFO, 977 "Using EDID range info for vertical refresh\n"); 978 Monitor->vrefresh[Monitor->nVrefresh].lo = 979 DDC->det_mon[i].section.ranges.min_v; 980 Monitor->vrefresh[Monitor->nVrefresh].hi = 981 DDC->det_mon[i].section.ranges.max_v; 982 Monitor->nVrefresh++; 983 } else { 984 xf86DrvMsg(scrnIndex, X_INFO, 985 "Using vrefresh ranges from config file\n"); 986 } 987 988 clock = DDC->det_mon[i].section.ranges.max_clock * 1000; 989 if (quirks & DDC_QUIRK_DVI_SINGLE_LINK) 990 clock = min(clock, 165000); 991 if (!have_maxpixclock && clock > Monitor->maxPixClock) 992 Monitor->maxPixClock = clock; 993 994 break; 995 default: 996 break; 997 } 998 } 999 1000 if (Modes) { 1001 /* Print Modes */ 1002 xf86DrvMsg(scrnIndex, X_INFO, "Printing DDC gathered Modelines:\n"); 1003 1004 Mode = Modes; 1005 while (Mode) { 1006 xf86PrintModeline(scrnIndex, Mode); 1007 Mode = Mode->next; 1008 } 1009 1010 /* Do we still need ranges to be filled in? */ 1011 if (!Monitor->nHsync || !Monitor->nVrefresh) 1012 DDCGuessRangesFromModes(scrnIndex, Monitor, Modes); 1013 1014 /* look for last Mode */ 1015 Mode = Modes; 1016 1017 while (Mode->next) 1018 Mode = Mode->next; 1019 1020 /* add to MonPtr */ 1021 if (Monitor->Modes) { 1022 Monitor->Last->next = Modes; 1023 Modes->prev = Monitor->Last; 1024 Monitor->Last = Mode; 1025 } else { 1026 Monitor->Modes = Modes; 1027 Monitor->Last = Mode; 1028 } 1029 } 1030} 1031