| History log of /src/common/lib/libc/arch/arm |
| Revision | Date | Author | Comments |
| 1.3 | 11-Oct-2020 |
skrll | Define _ARM_ARCH_8 when __ARM_ARCH_8A (no trailing double underscore) as
it is defined by gcc.
__ARM_ARCH_8A__ (with trailing double underscore) seems to be a typo (or
maybe historical)
|
| 1.2 | 02-Aug-2019 |
joerg | ARMv6KZ has been misspelled by GCC since forever, but clang only
provides the correct name. Support both.
|
| 1.1 | 27-Feb-2014 |
matt | branches: 1.1.4; 1.1.8; 1.1.30;
Add a method to test the compiler for things like LDREX availability,
LDRD availability, THUMB2, EABI.
|
| 1.1.30.3 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.1.30.2 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.1.30.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.1.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.1 | 27-Feb-2014 |
tls | file features.c was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.1.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.4.1 | 27-Feb-2014 |
yamt | file features.c was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2 | 07-Jun-2015 |
matt | branches: 1.2.16;
Use ${COPT} so it properly emits the right features doing MKCOMPAT
|
| 1.1 | 27-Feb-2014 |
matt | branches: 1.1.4; 1.1.6; 1.1.8;
Add a method to test the compiler for things like LDREX availability,
LDRD availability, THUMB2, EABI.
|
| 1.1.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.1 | 27-Feb-2014 |
tls | file features.mk was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.1.6.1 | 10-Jun-2015 |
snj | Pull up following revision(s) (requested by martin in ticket #837):
common/lib/libc/arch/arm/features.mk: revision 1.2
lib/libarch/Makefile: revision 1.29
lib/libarch/i386/Makefile.inc: revision 1.15
lib/libarch/x86_64/Makefile.inc: revision 1.5
share/mk/bsd.gcc.mk: revision 1.11
share/mk/bsd.prog.mk: revision 1.292
Make LIBCRT* depend on the right files if MLIBDIR from MKCOMPAT is defined.
Use ${COPT} so it properly emits the right features doing MKCOMPAT
Avoid defining MLIBDIR. Use ${MLIBDIR:Unone} instead.
|
| 1.1.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.4.1 | 27-Feb-2014 |
yamt | file features.mk was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.29 | 07-Jun-2015 |
matt | branches: 1.29.16;
Back out last change; fixed in the correct place.
|
| 1.28 | 07-Jun-2015 |
joerg | Require ARMv5TE to assemble.
|
| 1.27 | 17-May-2015 |
justin | Move arm sync_* changes to Makefile.inc
|
| 1.26 | 14-Oct-2014 |
martin | Provide C++ 2011 <atomic> support functions for hppa and arm.
|
| 1.25 | 13-Oct-2014 |
martin | Move the and_{16,8}_nv sources into the right (libc only) block.
|
| 1.24 | 13-Oct-2014 |
martin | Provide __sync_and_and_fetch_2 and __sync_and_and_fetch_1 for pre-ARMv6,
they are needed for the C++ 2011 <atomic> stuff.
|
| 1.23 | 05-Jul-2014 |
joerg | branches: 1.23.2;
Provide a basic implementation of __atomic_load_* and __atomic_store_*,
used by GCC and LLVM as backing for C11/C++11 atomics, if the hardware
is not known to have corresponding features. Include it on ARM as LLVM
and libc++ hit it when compiled for ARMv4.
|
| 1.22 | 04-Mar-2014 |
matt | branches: 1.22.2;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.21 | 04-Mar-2014 |
matt | fix typo.
|
| 1.20 | 04-Mar-2014 |
matt | Add atomic_sub_64.S
|
| 1.19 | 27-Feb-2014 |
matt | Add atomic_cas_64 support for ARM EABI on V5TE and V5TEJ cpus.
(strd is atomic).
|
| 1.18 | 22-Feb-2014 |
martin | Missed one __sync_* op (or gcc4.8 does inline it, while 4.5 does not?)
|
| 1.17 | 22-Feb-2014 |
martin | Move the __sync_* ops added in the previous change to a libc-only section
|
| 1.16 | 21-Feb-2014 |
martin | Provide the missing __sync_* ops for earlier arm versions
|
| 1.15 | 27-Jan-2014 |
matt | Add _atomic_cas_16_up and _atomic_cas_8_up
|
| 1.14 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.13 | 19-Aug-2013 |
matt | Rework to allow thumb armv7 compilation.
Add atomic_simplelock.c for thumb
|
| 1.12 | 06-Aug-2013 |
matt | Only use MACHINE_ARCH if !_STANDALONE and CPPFLAGS/CFLAGS/CPUFLAGS don't
contain -mcpu or -march
|
| 1.11 | 06-Aug-2013 |
matt | Select ldrex/strex if ${MACHINE_ARCH:Mearmv[67]*}
|
| 1.10 | 11-Sep-2012 |
matt | branches: 1.10.2;
Add 64bit atomic ops for ARMv6+ (using ldrexd/strexd).
|
| 1.9 | 16-Aug-2012 |
matt | Actually use the assembly version of the atomic function if compiling
for armv6 or armv7 cpus. Use atomic_cas_ptr instead of _lock_cas so
we pick up the assembly version when it's used.
|
| 1.8 | 04-Jan-2009 |
pooka | branches: 1.8.8; 1.8.12;
allow inclusion of atomic ops in librump
|
| 1.7 | 29-Sep-2008 |
ad | branches: 1.7.8;
Allow atomic ops to be built as part of libpthread.
|
| 1.6 | 29-Apr-2008 |
scw | Implement _atomic_cas_up() in assembly code as the compiler cannot be
trusted to generate fully restartable code sequences.
Addresses lib/38482 for ARM and m68000.
|
| 1.5 | 11-Feb-2008 |
ad | branches: 1.5.4;
Only build atomic ops for libkern/libc.
|
| 1.4 | 10-Feb-2008 |
ad | Enable the atomic ops in userspace.
|
| 1.3 | 29-Nov-2007 |
ad | branches: 1.3.4;
Use the CAS-based inc/dec variants, since these CPUs don't have atomic
add in hardware (does arm?).
|
| 1.2 | 29-Nov-2007 |
ad | Atomic ops for arm.
|
| 1.1 | 18-Apr-2007 |
thorpej | branches: 1.1.2;
file Makefile.inc was initially added on branch thorpej-atomic.
|
| 1.1.2.2 | 26-Aug-2007 |
matt | Add armv6 variants of atomic ops which use ldrex/strex.
Add atomic_swap (all arm architectures) which uses swp and swpb.
Add membar_ops which uses armv6 data {sync, memory} barrier.
XXX let thorpej figure out the Makefile magic.
|
| 1.1.2.1 | 18-Apr-2007 |
thorpej | Atomic ops implementation for ARM. Everything is built on top of
atomic_cas_32(), which is itself a restartable atomic sequence.
|
| 1.3.4.3 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.3.4.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.3.4.1 | 29-Nov-2007 |
matt | file Makefile.inc was added on branch matt-armv6 on 2008-01-09 01:20:51 +0000
|
| 1.5.4.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.7.8.2 | 15-Feb-2014 |
matt | Add 64-bit atomic ops if ARMv6+
|
| 1.7.8.1 | 19-Dec-2013 |
matt | Enable ldrex/strex based atomic ops on armv6/armv7
|
| 1.8.12.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.8.8.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.8.8.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.10.2.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.22.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.23.2.1 | 12-Nov-2014 |
snj | Pull up following revision(s) (requested by martin in ticket #218):
common/lib/libc/arch/arm/atomic/Makefile.inc: revision 1.24-1.26
common/lib/libc/arch/hppa/atomic/Makefile.inc: revision 1.13
common/lib/libc/arch/mips/atomic/Makefile.inc: revision 1.13
common/lib/libc/arch/sh3/atomic/Makefile.inc: revision 1.7
common/lib/libc/arch/sparc/atomic/Makefile.inc: revision 1.18
common/lib/libc/arch/vax/atomic/Makefile.inc: revision 1.7
common/lib/libc/atomic/atomic_and_16_nv_cas.c: revision 1.2
common/lib/libc/atomic/atomic_and_8_nv_cas.c: revision 1.2
common/lib/libc/atomic/atomic_c11_compare_exchange_cas_16.c: revision 1.1-1.2
common/lib/libc/atomic/atomic_c11_compare_exchange_cas_32.c: revision 1.1-1.2
common/lib/libc/atomic/atomic_c11_compare_exchange_cas_8.c: revision 1.1-1.2
common/lib/libc/atomic/atomic_cas_by_cas32.c: revision 1.4
common/lib/libc/atomic/atomic_op_namespace.h: revision 1.7
Add __sync_val_compare_and_swap_{1,2} aliases for _atomic_cas_{8,16}
--
Provide __atomic_compare_exchange_N (as needed for the C11 2011 <atomic>
ops) via the corresponding CAS.
--
Hook __atomic_compare_exchange_N into vax libc.
--
Provide __sync_and_and_fetch_2 and __sync_and_and_fetch_1 for pre-ARMv6,
they are needed for the C++ 2011 <atomic> stuff.
--
Add C++ 2011 <atomic> support functions.
--
Move the and_{16,8}_nv sources into the right (libc only) block.
--
Provide <atomic> C++ 2011 support functions for mips and sh3.
--
Provide C++ 2011 <atomic> support functions for hppa and arm.
--
Provide prototypes to fix build with clang.
|
| 1.29.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.29.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4; 1.3.26; 1.3.28;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_add_16.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file atomic_add_16.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.10 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.9 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.8 | 23-Jun-2014 |
joerg | branches: 1.8.24; 1.8.26;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.7 | 22-Feb-2014 |
martin | branches: 1.7.2;
Try to hide the C runtime implementation specific __sync_* ops from librump,
to avoid duplicates.
|
| 1.6 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.5 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.4 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.3 | 31-Aug-2012 |
matt | branches: 1.3.2;
Add dmb/dsb instructions as required by the armv7 arch man.
|
| 1.2 | 16-Aug-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.24;
Add assembly versions of atomic ops with ldrex/strex
|
| 1.1 | 26-Aug-2007 |
matt | branches: 1.1.2;
file atomic_add_32.S was initially added on branch thorpej-atomic.
|
| 1.1.2.2 | 27-Aug-2007 |
matt | Don't use r4 (since it's caller saved). Use ip (it's available since we
are leaf functions).
|
| 1.1.2.1 | 26-Aug-2007 |
matt | Add armv6 variants of atomic ops which use ldrex/strex.
Add atomic_swap (all arm architectures) which uses swp and swpb.
Add membar_ops which uses armv6 data {sync, memory} barrier.
XXX let thorpej figure out the Makefile magic.
|
| 1.2.24.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.2.2.1 | 16-Aug-2008 |
wrstuden | file atomic_add_32.S was added on branch wrstuden-revivesa on 2008-09-18 04:54:18 +0000
|
| 1.3.2.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.7.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.8.26.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.8.24.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.8.24.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.14 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.13 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.12 | 28-Jun-2021 |
skrll | Whitespace
|
| 1.11 | 04-Mar-2014 |
matt | branches: 1.11.26; 1.11.28;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.10 | 30-Nov-2013 |
joerg | branches: 1.10.2;
Explicitly name the register pairs.
|
| 1.9 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.8 | 20-Aug-2013 |
matt | Push two registers to keep stack aligned.
|
| 1.7 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.6 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.5 | 10-Aug-2013 |
matt | Never modify NLO/NHI (r2,r3) only LO/HI (r0,r1) so subsequent loops will work.
|
| 1.4 | 10-Aug-2013 |
matt | use push/pop
|
| 1.3 | 13-Sep-2012 |
matt | branches: 1.3.2; 1.3.4;
Correct copyright/fix comments.
|
| 1.2 | 12-Sep-2012 |
matt | Fix bas code, use ldr
|
| 1.1 | 11-Sep-2012 |
matt | branches: 1.1.2;
Add 64bit atomic ops for ARMv6+ (using ldrexd/strexd).
|
| 1.1.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.3.4.2 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.3.4.1 | 13-Sep-2012 |
matt | file atomic_add_64.S was added on branch matt-nb6-plus on 2012-11-27 23:42:35 +0000
|
| 1.3.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.3.2.1 | 13-Sep-2012 |
yamt | file atomic_add_64.S was added on branch yamt-pagecache on 2012-10-30 18:46:10 +0000
|
| 1.10.2.2 | 15-Feb-2014 |
matt | Add 64-bit atomic ops if ARMv6+
|
| 1.10.2.1 | 30-Nov-2013 |
matt | file atomic_add_64.S was added on branch matt-nb5-mips64 on 2014-02-15 10:27:44 +0000
|
| 1.11.28.2 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.11.28.1 | 06-Jul-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1313):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.12
Whitespace
|
| 1.11.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.11.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4; 1.3.26; 1.3.28;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_add_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file atomic_add_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4; 1.3.26; 1.3.28;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_and_16.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file atomic_and_16.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.10 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.9 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.8 | 23-Jun-2014 |
joerg | branches: 1.8.24; 1.8.26;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.7 | 22-Feb-2014 |
martin | branches: 1.7.2;
Try to hide the C runtime implementation specific __sync_* ops from librump,
to avoid duplicates.
|
| 1.6 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.5 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.4 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.3 | 31-Aug-2012 |
matt | branches: 1.3.2;
Add dmb/dsb instructions as required by the armv7 arch man.
|
| 1.2 | 16-Aug-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.24;
Add assembly versions of atomic ops with ldrex/strex
|
| 1.1 | 26-Aug-2007 |
matt | branches: 1.1.2;
file atomic_and_32.S was initially added on branch thorpej-atomic.
|
| 1.1.2.2 | 27-Aug-2007 |
matt | Don't use r4 (since it's caller saved). Use ip (it's available since we
are leaf functions).
|
| 1.1.2.1 | 26-Aug-2007 |
matt | Add armv6 variants of atomic ops which use ldrex/strex.
Add atomic_swap (all arm architectures) which uses swp and swpb.
Add membar_ops which uses armv6 data {sync, memory} barrier.
XXX let thorpej figure out the Makefile magic.
|
| 1.2.24.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.2.2.1 | 16-Aug-2008 |
wrstuden | file atomic_and_32.S was added on branch wrstuden-revivesa on 2008-09-18 04:54:18 +0000
|
| 1.3.2.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.7.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.8.26.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.8.24.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.8.24.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.13 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.12 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.11 | 28-Jun-2021 |
skrll | Whitespace
|
| 1.10 | 04-Mar-2014 |
matt | branches: 1.10.26; 1.10.28;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.9 | 30-Nov-2013 |
joerg | branches: 1.9.2;
Use explicit form of register pair operations by specifying both.
|
| 1.8 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.7 | 20-Aug-2013 |
matt | Push two registers to keep stack aligned.
|
| 1.6 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.5 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.4 | 10-Aug-2013 |
matt | Never modify NLO/NHI (r2,r3) only LO/HI (r0,r1) so subsequent loops will work.
|
| 1.3 | 10-Aug-2013 |
matt | Use push/pop
|
| 1.2 | 13-Sep-2012 |
matt | branches: 1.2.2; 1.2.4;
Correct copyright/fix comments.
|
| 1.1 | 11-Sep-2012 |
matt | branches: 1.1.2;
Add 64bit atomic ops for ARMv6+ (using ldrexd/strexd).
|
| 1.1.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.2.4.2 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.1 | 13-Sep-2012 |
matt | file atomic_and_64.S was added on branch matt-nb6-plus on 2012-11-27 23:42:35 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.1 | 13-Sep-2012 |
yamt | file atomic_and_64.S was added on branch yamt-pagecache on 2012-10-30 18:46:10 +0000
|
| 1.9.2.2 | 15-Feb-2014 |
matt | Add 64-bit atomic ops if ARMv6+
|
| 1.9.2.1 | 30-Nov-2013 |
matt | file atomic_and_64.S was added on branch matt-nb5-mips64 on 2014-02-15 10:27:44 +0000
|
| 1.10.28.2 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.10.28.1 | 06-Jul-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1313):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.12
Whitespace
|
| 1.10.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.10.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4; 1.3.26; 1.3.28;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_and_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file atomic_and_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.3 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.4; 1.2.8; 1.2.30; 1.2.32;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.32.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.2.30.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.30.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.1 | 04-Mar-2014 |
tls | file atomic_cas_16.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_cas_16.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.8 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.7 | 04-Mar-2014 |
matt | branches: 1.7.26; 1.7.28;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.6 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.5 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.4 | 29-Oct-2012 |
chs | _ARCH_ARM_6 -> _ARM_ARCH_6
|
| 1.3 | 31-Aug-2012 |
matt | branches: 1.3.2;
Add dmb/dsb instructions as required by the armv7 arch man.
|
| 1.2 | 16-Aug-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.12; 1.2.24;
Add assembly versions of atomic ops with ldrex/strex
|
| 1.1 | 18-Apr-2007 |
thorpej | branches: 1.1.2;
file atomic_cas_32.S was initially added on branch thorpej-atomic.
|
| 1.1.2.5 | 29-Aug-2007 |
matt | Typo. cmpeq should just be cmp
|
| 1.1.2.4 | 27-Aug-2007 |
matt | Don't use r4 (since it's caller saved). Use ip (it's available since we
are leaf functions).
|
| 1.1.2.3 | 26-Aug-2007 |
matt | Add armv6 variants of atomic ops which use ldrex/strex.
Add atomic_swap (all arm architectures) which uses swp and swpb.
Add membar_ops which uses armv6 data {sync, memory} barrier.
XXX let thorpej figure out the Makefile magic.
|
| 1.1.2.2 | 22-Apr-2007 |
thorpej | Make sure namespace-cleansed aliases are avaialble for all atomic ops.
|
| 1.1.2.1 | 18-Apr-2007 |
thorpej | Atomic ops implementation for ARM. Everything is built on top of
atomic_cas_32(), which is itself a restartable atomic sequence.
|
| 1.2.24.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.12.1 | 19-Dec-2013 |
matt | Enable ldrex/strex based atomic ops on armv6/armv7
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.2.2.1 | 16-Aug-2008 |
wrstuden | file atomic_cas_32.S was added on branch wrstuden-revivesa on 2008-09-18 04:54:18 +0000
|
| 1.3.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.7.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.7.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.7.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.12 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.11 | 18-Feb-2019 |
martin | branches: 1.11.2;
Add some atomic_cas_64_ni aliases
|
| 1.10 | 05-Mar-2014 |
matt | branches: 1.10.26;
apcs-gnu only passes one register on the stack.
ldrd always loads little endian (low address, low register).
|
| 1.9 | 04-Mar-2014 |
matt | Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.8 | 04-Mar-2014 |
matt | Fix #if/#endif nesting
|
| 1.7 | 04-Mar-2014 |
matt | Fix non-EABI loading of argument. Deal with endian issues.
Fixes PR/48635
|
| 1.6 | 04-Mar-2014 |
matt | Fetch value from correct stack location. Push an even number of registers
so ldrd won't fail.
|
| 1.5 | 30-Nov-2013 |
joerg | branches: 1.5.2;
Use explicit form of register pair operations by specifying both.
|
| 1.4 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.3 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.2 | 29-Oct-2012 |
chs | branches: 1.2.2; 1.2.4;
_ARCH_ARM_6 -> _ARM_ARCH_6
|
| 1.1 | 11-Sep-2012 |
matt | branches: 1.1.2;
Add 64bit atomic ops for ARMv6+ (using ldrexd/strexd).
|
| 1.1.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.2.4.2 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.1 | 29-Oct-2012 |
matt | file atomic_cas_64.S was added on branch matt-nb6-plus on 2012-11-27 23:42:35 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.1 | 29-Oct-2012 |
yamt | file atomic_cas_64.S was added on branch yamt-pagecache on 2012-10-30 18:46:10 +0000
|
| 1.5.2.2 | 15-Feb-2014 |
matt | Add 64-bit atomic ops if ARMv6+
|
| 1.5.2.1 | 30-Nov-2013 |
matt | file atomic_cas_64.S was added on branch matt-nb5-mips64 on 2014-02-15 10:27:44 +0000
|
| 1.10.26.2 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.10.26.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.11.2.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.9 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.8 | 29-Jun-2021 |
skrll | Whitespace
|
| 1.7 | 04-Mar-2014 |
matt | branches: 1.7.26; 1.7.28;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.6 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.5 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.4 | 29-Oct-2012 |
chs | _ARCH_ARM_6 -> _ARM_ARCH_6
|
| 1.3 | 31-Aug-2012 |
matt | branches: 1.3.2;
Add dmb/dsb instructions as required by the armv7 arch man.
|
| 1.2 | 16-Aug-2012 |
matt | Actually use the assembly version of the atomic function if compiling
for armv6 or armv7 cpus. Use atomic_cas_ptr instead of _lock_cas so
we pick up the assembly version when it's used.
|
| 1.1 | 18-Nov-2008 |
matt | branches: 1.1.8; 1.1.12;
Add an atomic_cas_8 which uses ldrex/strex.
|
| 1.1.12.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.1.8.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.8.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.3.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.7.28.2 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.7.28.1 | 06-Jul-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1313):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.12
Whitespace
|
| 1.7.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.7.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.8 | 09-Mar-2020 |
skrll | Give the thumb atomic ops a chance of working
|
| 1.7 | 04-Mar-2014 |
matt | branches: 1.7.26; 1.7.28;
Load new value from correct stack location in _atomic_cas_64_up
|
| 1.6 | 27-Feb-2014 |
matt | Add atomic_cas_64 support for ARM EABI on V5TE and V5TEJ cpus.
(strd is atomic).
|
| 1.5 | 27-Jan-2014 |
matt | Add _atomic_cas_16_up and _atomic_cas_8_up
|
| 1.4 | 19-Aug-2013 |
matt | Thumbify
|
| 1.3 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.2 | 25-May-2008 |
chs | branches: 1.2.2; 1.2.24;
enable profiling of assembly functions.
|
| 1.1 | 29-Apr-2008 |
scw | branches: 1.1.2; 1.1.4;
Implement _atomic_cas_up() in assembly code as the compiler cannot be
trusted to generate fully restartable code sequences.
Addresses lib/38482 for ARM and m68000.
|
| 1.1.4.3 | 04-Jun-2008 |
yamt | sync with head
|
| 1.1.4.2 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.4.1 | 29-Apr-2008 |
yamt | file atomic_cas_up.S was added on branch yamt-pf42 on 2008-05-18 12:28:44 +0000
|
| 1.1.2.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.2.24.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.7.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.7.26.2 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.7.26.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.7 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.6 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.5 | 11-Aug-2013 |
matt | branches: 1.5.26; 1.5.28;
Use foo{s} since it reduces the ifdefs for thumb
|
| 1.4 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.3 | 31-Aug-2012 |
matt | branches: 1.3.2;
Add dmb/dsb instructions as required by the armv7 arch man.
|
| 1.2 | 16-Aug-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.24;
Add assembly versions of atomic ops with ldrex/strex
|
| 1.1 | 26-Aug-2007 |
matt | branches: 1.1.2;
file atomic_dec_32.S was initially added on branch thorpej-atomic.
|
| 1.1.2.1 | 26-Aug-2007 |
matt | Add armv6 variants of atomic ops which use ldrex/strex.
Add atomic_swap (all arm architectures) which uses swp and swpb.
Add membar_ops which uses armv6 data {sync, memory} barrier.
XXX let thorpej figure out the Makefile magic.
|
| 1.2.24.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.2.2.1 | 16-Aug-2008 |
wrstuden | file atomic_dec_32.S was added on branch wrstuden-revivesa on 2008-09-18 04:54:18 +0000
|
| 1.3.2.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.5.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.9 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.8 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.7 | 30-Nov-2013 |
joerg | branches: 1.7.2; 1.7.28; 1.7.30;
Use explicit form of register pair operations by specifying both.
|
| 1.6 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.5 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.4 | 10-Aug-2013 |
matt | Use r2 instead of ip
|
| 1.3 | 10-Aug-2013 |
matt | Use subs/sbc
Use push/pop
Don't adjust return for atomic_dec_64 since it's void and returns nothing
|
| 1.2 | 13-Sep-2012 |
matt | branches: 1.2.2; 1.2.4;
Correct copyright/fix comments.
|
| 1.1 | 11-Sep-2012 |
matt | branches: 1.1.2;
Add 64bit atomic ops for ARMv6+ (using ldrexd/strexd).
|
| 1.1.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.2.4.2 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.1 | 13-Sep-2012 |
matt | file atomic_dec_64.S was added on branch matt-nb6-plus on 2012-11-27 23:42:35 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.1 | 13-Sep-2012 |
yamt | file atomic_dec_64.S was added on branch yamt-pagecache on 2012-10-30 18:46:11 +0000
|
| 1.7.30.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.7.28.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.7.28.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.7.2.2 | 15-Feb-2014 |
matt | Add 64-bit atomic ops if ARMv6+
|
| 1.7.2.1 | 30-Nov-2013 |
matt | file atomic_dec_64.S was added on branch matt-nb5-mips64 on 2014-02-15 10:27:44 +0000
|
| 1.9 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.8 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.7 | 08-Nov-2013 |
matt | branches: 1.7.26; 1.7.28;
Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.6 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.5 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.4 | 29-Oct-2012 |
chs | _ARCH_ARM_6 -> _ARM_ARCH_6
|
| 1.3 | 31-Aug-2012 |
matt | branches: 1.3.2;
Add dmb/dsb instructions as required by the armv7 arch man.
|
| 1.2 | 16-Aug-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.24;
Add assembly versions of atomic ops with ldrex/strex
|
| 1.1 | 26-Aug-2007 |
matt | branches: 1.1.2;
file atomic_inc_32.S was initially added on branch thorpej-atomic.
|
| 1.1.2.1 | 26-Aug-2007 |
matt | Add armv6 variants of atomic ops which use ldrex/strex.
Add atomic_swap (all arm architectures) which uses swp and swpb.
Add membar_ops which uses armv6 data {sync, memory} barrier.
XXX let thorpej figure out the Makefile magic.
|
| 1.2.24.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.2.2.1 | 16-Aug-2008 |
wrstuden | file atomic_inc_32.S was added on branch wrstuden-revivesa on 2008-09-18 04:54:18 +0000
|
| 1.3.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.7.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.7.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.7.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.11 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.10 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.9 | 30-Nov-2013 |
joerg | branches: 1.9.2; 1.9.28; 1.9.30;
Use explicit form of register pair operations by specifying both.
|
| 1.8 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.7 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.6 | 10-Aug-2013 |
matt | Use r2 instead of ip
|
| 1.5 | 10-Aug-2013 |
matt | Don't adjust return of atomic_inc_64 since it's void and doesn't return
anything.
|
| 1.4 | 10-Aug-2013 |
matt | Fix add -> adds
|
| 1.3 | 29-Oct-2012 |
chs | branches: 1.3.2; 1.3.4;
_ARCH_ARM_6 -> _ARM_ARCH_6
|
| 1.2 | 13-Sep-2012 |
matt | Correct copyright/fix comments.
|
| 1.1 | 11-Sep-2012 |
matt | branches: 1.1.2;
Add 64bit atomic ops for ARMv6+ (using ldrexd/strexd).
|
| 1.1.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.3.4.2 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.3.4.1 | 29-Oct-2012 |
matt | file atomic_inc_64.S was added on branch matt-nb6-plus on 2012-11-27 23:42:35 +0000
|
| 1.3.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.3.2.1 | 29-Oct-2012 |
yamt | file atomic_inc_64.S was added on branch yamt-pagecache on 2012-10-30 18:46:11 +0000
|
| 1.9.30.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.9.28.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.9.28.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.9.2.2 | 15-Feb-2014 |
matt | Add 64-bit atomic ops if ARMv6+
|
| 1.9.2.1 | 30-Nov-2013 |
matt | file atomic_inc_64.S was added on branch matt-nb5-mips64 on 2014-02-15 10:27:44 +0000
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 11-Dec-2015 |
skrll | branches: 1.3.16; 1.3.18;
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.4; 1.2.6; 1.2.8;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.1 | 04-Mar-2014 |
tls | file atomic_nand_16.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.2.6.1 | 26-Feb-2016 |
snj | Pull up following revision(s) (requested by skrll in ticket #1105):
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.5
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_nand_16.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.3.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 11-Dec-2015 |
skrll | branches: 1.3.16; 1.3.18;
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.4; 1.2.6; 1.2.8;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.1 | 04-Mar-2014 |
tls | file atomic_nand_32.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.2.6.1 | 26-Feb-2016 |
snj | Pull up following revision(s) (requested by skrll in ticket #1105):
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.5
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_nand_32.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.3.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.7 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.6 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.5 | 28-Jun-2021 |
skrll | Whitespace
|
| 1.4 | 11-Dec-2015 |
skrll | branches: 1.4.16; 1.4.18;
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.3 | 04-Mar-2014 |
matt | branches: 1.3.4; 1.3.6; 1.3.8;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.2 | 30-Nov-2013 |
joerg | Use explicit form of register pair operations by specifying both.
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.3.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.8.1 | 04-Mar-2014 |
tls | file atomic_nand_64.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.3.6.1 | 26-Feb-2016 |
snj | Pull up following revision(s) (requested by skrll in ticket #1105):
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.5
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.3.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.4.1 | 04-Mar-2014 |
yamt | file atomic_nand_64.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.4.18.2 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4.18.1 | 06-Jul-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1313):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.12
Whitespace
|
| 1.4.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.4.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 11-Dec-2015 |
skrll | branches: 1.3.16; 1.3.18;
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.4; 1.2.6; 1.2.8;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.1 | 04-Mar-2014 |
tls | file atomic_nand_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.2.6.1 | 26-Feb-2016 |
snj | Pull up following revision(s) (requested by skrll in ticket #1105):
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.5
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_nand_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.3.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.10 | 28-Jul-2021 |
simonb | #define<tab> consistency.
|
| 1.9 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.8 | 16-Sep-2019 |
skrll | Traiing whitespace.
|
| 1.7 | 17-May-2015 |
justin | branches: 1.7.16; 1.7.18;
Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.6 | 04-Mar-2014 |
matt | Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.5 | 22-Feb-2014 |
martin | Try to hide the C runtime implementation specific __sync_* ops from librump,
to avoid duplicates.
|
| 1.4 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.3 | 11-Sep-2012 |
matt | branches: 1.3.2;
Add 64bit atomic ops for ARMv6+ (using ldrexd/strexd).
|
| 1.2 | 16-Aug-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.12; 1.2.24;
Add assembly versions of atomic ops with ldrex/strex
|
| 1.1 | 18-Apr-2007 |
thorpej | branches: 1.1.2;
file atomic_op_asm.h was initially added on branch thorpej-atomic.
|
| 1.1.2.1 | 18-Apr-2007 |
thorpej | Atomic ops implementation for ARM. Everything is built on top of
atomic_cas_32(), which is itself a restartable atomic sequence.
|
| 1.2.24.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.12.1 | 15-Feb-2014 |
matt | Add 64-bit atomic ops if ARMv6+
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.2.2.1 | 16-Aug-2008 |
wrstuden | file atomic_op_asm.h was added on branch wrstuden-revivesa on 2008-09-18 04:54:18 +0000
|
| 1.3.2.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.7.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.7.16.2 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.7.16.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4; 1.3.26; 1.3.28;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_or_16.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file atomic_or_16.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.10 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.9 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.8 | 23-Jun-2014 |
joerg | branches: 1.8.24; 1.8.26;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.7 | 22-Feb-2014 |
martin | branches: 1.7.2;
Try to hide the C runtime implementation specific __sync_* ops from librump,
to avoid duplicates.
|
| 1.6 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.5 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.4 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.3 | 31-Aug-2012 |
matt | branches: 1.3.2;
Add dmb/dsb instructions as required by the armv7 arch man.
|
| 1.2 | 16-Aug-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.24;
Add assembly versions of atomic ops with ldrex/strex
|
| 1.1 | 26-Aug-2007 |
matt | branches: 1.1.2;
file atomic_or_32.S was initially added on branch thorpej-atomic.
|
| 1.1.2.2 | 27-Aug-2007 |
matt | Don't use r4 (since it's caller saved). Use ip (it's available since we
are leaf functions).
|
| 1.1.2.1 | 26-Aug-2007 |
matt | Add armv6 variants of atomic ops which use ldrex/strex.
Add atomic_swap (all arm architectures) which uses swp and swpb.
Add membar_ops which uses armv6 data {sync, memory} barrier.
XXX let thorpej figure out the Makefile magic.
|
| 1.2.24.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.2.2.1 | 16-Aug-2008 |
wrstuden | file atomic_or_32.S was added on branch wrstuden-revivesa on 2008-09-18 04:54:18 +0000
|
| 1.3.2.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.7.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.8.26.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.8.24.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.8.24.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.14 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.13 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.12 | 28-Jun-2021 |
skrll | Whitespace
|
| 1.11 | 15-Sep-2019 |
skrll | __sync_{,x}or_and_fetch_8 should return new value... make it so.
|
| 1.10 | 04-Mar-2014 |
matt | branches: 1.10.18; 1.10.26; 1.10.28;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.9 | 30-Nov-2013 |
joerg | branches: 1.9.2;
Use explicit form of register pair operations by specifying both.
|
| 1.8 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.7 | 20-Aug-2013 |
matt | Push two registers to keep stack aligned.
|
| 1.6 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.5 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.4 | 10-Aug-2013 |
matt | Never modify NLO/NHI (r2,r3) only LO/HI (r0,r1) so subsequent loops will work.
|
| 1.3 | 10-Aug-2013 |
matt | use push/pop
|
| 1.2 | 13-Sep-2012 |
matt | branches: 1.2.2; 1.2.4;
Correct copyright/fix comments.
|
| 1.1 | 11-Sep-2012 |
matt | branches: 1.1.2;
Add 64bit atomic ops for ARMv6+ (using ldrexd/strexd).
|
| 1.1.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.2.4.2 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.1 | 13-Sep-2012 |
matt | file atomic_or_64.S was added on branch matt-nb6-plus on 2012-11-27 23:42:35 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.1 | 13-Sep-2012 |
yamt | file atomic_or_64.S was added on branch yamt-pagecache on 2012-10-30 18:46:11 +0000
|
| 1.9.2.2 | 15-Feb-2014 |
matt | Add 64-bit atomic ops if ARMv6+
|
| 1.9.2.1 | 30-Nov-2013 |
matt | file atomic_or_64.S was added on branch matt-nb5-mips64 on 2014-02-15 10:27:44 +0000
|
| 1.10.28.3 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.10.28.2 | 06-Jul-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1313):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.12
Whitespace
|
| 1.10.28.1 | 17-Sep-2019 |
martin | Pull up following revision(s) (requested by skrll in ticket #202):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.11
__sync_{,x}or_and_fetch_8 should return new value... make it so.
|
| 1.10.26.2 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.10.26.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.10.18.1 | 17-Sep-2019 |
martin | Pull up following revision(s) (requested by skrll in ticket #1375):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.11
__sync_{,x}or_and_fetch_8 should return new value... make it so.
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4; 1.3.26; 1.3.28;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_or_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file atomic_or_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.2 | 16-Aug-2013 |
matt | branches: 1.2.4; 1.2.8; 1.2.30;
Add a hidden version for libpthread.
|
| 1.1 | 15-Aug-2013 |
matt | When compiling for Thumb1, the swp instruction is not availble. So this
stub is added to provide __cpu_simple_lock and __cpu_simple_lock_try via
thumb interwork support. It is compiled with -mno-thumb.
|
| 1.2.30.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.30.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.1 | 16-Aug-2013 |
tls | file atomic_simplelock.c was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 16-Aug-2013 |
yamt | file atomic_simplelock.c was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 28-Jun-2021 |
skrll | Whitespace
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.4; 1.2.8; 1.2.30; 1.2.32;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.32.2 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.2.32.1 | 06-Jul-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1313):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.12
Whitespace
|
| 1.2.30.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.30.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.1 | 04-Mar-2014 |
tls | file atomic_sub_64.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_sub_64.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.19 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.18 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.17 | 26-Apr-2021 |
skrll | Add the appropriate memory barrier before the lock is cleared in
__sync_lock_release_{1,2,4,8}. That is, all reads and write for in inner
shareability domain before the lock clear store.
|
| 1.16 | 24-Apr-2021 |
skrll | Trailing whitespace
|
| 1.15 | 24-Apr-2021 |
skrll | Fix __sync_lock_release_4 to actually zeroise the whole 4bytes/32bits.
|
| 1.14 | 17-May-2015 |
justin | branches: 1.14.8; 1.14.16; 1.14.18;
Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.13 | 17-Apr-2015 |
skrll | Use the right register in previous. Spotted by matt@
|
| 1.12 | 17-Apr-2015 |
skrll | ARM ARM D7.3.2 - ensure all previous accesses are observed before
the lock is cleared
|
| 1.11 | 28-Jun-2014 |
joerg | Add aliases for the C11/C++11 spelling of the CAS primitives.
|
| 1.10 | 04-Mar-2014 |
matt | branches: 1.10.2;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.9 | 30-Jan-2014 |
matt | switch to unified syntax
|
| 1.8 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.7 | 11-Aug-2013 |
matt | Use foo{s} since it reduces the ifdefs for thumb
|
| 1.6 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.5 | 28-Jan-2013 |
matt | Change movsne to movnes for clang.
|
| 1.4 | 31-Aug-2012 |
matt | branches: 1.4.2;
Add dmb/dsb instructions as required by the armv7 arch man.
|
| 1.3 | 16-Aug-2012 |
matt | Actually use the assembly version of the atomic function if compiling
for armv6 or armv7 cpus. Use atomic_cas_ptr instead of _lock_cas so
we pick up the assembly version when it's used.
|
| 1.2 | 16-Aug-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.12; 1.2.24;
Add assembly versions of atomic ops with ldrex/strex
|
| 1.1 | 26-Aug-2007 |
matt | branches: 1.1.2;
file atomic_swap.S was initially added on branch thorpej-atomic.
|
| 1.1.2.1 | 26-Aug-2007 |
matt | Add armv6 variants of atomic ops which use ldrex/strex.
Add atomic_swap (all arm architectures) which uses swp and swpb.
Add membar_ops which uses armv6 data {sync, memory} barrier.
XXX let thorpej figure out the Makefile magic.
|
| 1.2.24.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.12.1 | 24-Mar-2014 |
matt | Use ldrex/strex instead of swp when possible.
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.2.2.1 | 16-Aug-2008 |
wrstuden | file atomic_swap.S was added on branch wrstuden-revivesa on 2008-09-18 04:54:18 +0000
|
| 1.4.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.2.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.10.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.14.18.3 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.14.18.2 | 30-Apr-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1261):
sys/arch/arm/include/lock.h: revision 1.38
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.17
Add the appropriate memory barrier before the lock is cleared in
__sync_lock_release_{1,2,4,8}. That is, all reads and write for the
inner shareability domain before the lock clear store.
Improve the membar_ops barriers - no need to use dsb and wait for
completion. Also, we only to act on the inner shareability domain.
Fix the barrier confusion. From Riastradh - thanks!.
|
| 1.14.18.1 | 26-Apr-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1254):
sys/arch/arm/include/lock.h: revision 1.37
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.15
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.16
sys/arch/arm/include/lock.h: revision 1.36
Fix ARMv8 instructions
Fix __sync_lock_release_4 to actually zeroise the whole 4bytes/32bits.
Trailing whitespace
Change #ifdef FOO to #if defined(FOO). NFCI.
|
| 1.14.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.14.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.14.8.1 | 26-Apr-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1672):
sys/arch/arm/include/lock.h: revision 1.37
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.15
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.16
sys/arch/arm/include/lock.h: revision 1.36
Fix ARMv8 instructions
Fix __sync_lock_release_4 to actually zeroise the whole 4bytes/32bits.
Trailing whitespace
Change #ifdef FOO to #if defined(FOO). NFCI.
|
| 1.7 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.6 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.5 | 26-Apr-2021 |
skrll | Add the appropriate memory barrier before the lock is cleared in
__sync_lock_release_{1,2,4,8}. That is, all reads and write for in inner
shareability domain before the lock clear store.
|
| 1.4 | 17-May-2015 |
justin | branches: 1.4.16; 1.4.18;
Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.3 | 28-Jun-2014 |
joerg | branches: 1.3.4;
Add aliases for the C11/C++11 spelling of the CAS primitives.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_swap_16.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 28-Jun-2014 |
tls | file atomic_swap_16.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.4.18.2 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4.18.1 | 30-Apr-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1261):
sys/arch/arm/include/lock.h: revision 1.38
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.17
Add the appropriate memory barrier before the lock is cleared in
__sync_lock_release_{1,2,4,8}. That is, all reads and write for the
inner shareability domain before the lock clear store.
Improve the membar_ops barriers - no need to use dsb and wait for
completion. Also, we only to act on the inner shareability domain.
Fix the barrier confusion. From Riastradh - thanks!.
|
| 1.4.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.4.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.15 | 01-Aug-2021 |
andvar | s/overwriten/overwritten/ in comments.
|
| 1.14 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.13 | 28-Jun-2021 |
skrll | Whitespace
|
| 1.12 | 26-Apr-2021 |
skrll | Add the appropriate memory barrier before the lock is cleared in
__sync_lock_release_{1,2,4,8}. That is, all reads and write for in inner
shareability domain before the lock clear store.
|
| 1.11 | 24-Apr-2021 |
skrll | Trailing whitespace
|
| 1.10 | 17-May-2015 |
justin | branches: 1.10.8; 1.10.16; 1.10.18;
Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.9 | 28-Jun-2014 |
joerg | Add aliases for the C11/C++11 spelling of the CAS primitives.
|
| 1.8 | 04-Mar-2014 |
matt | branches: 1.8.2;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.7 | 30-Nov-2013 |
joerg | Use explicit form of register pair operations by specifying both.
|
| 1.6 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.5 | 20-Aug-2013 |
matt | Push two registers to keep stack aligned.
|
| 1.4 | 10-Aug-2013 |
matt | Make these under Thumb2
|
| 1.3 | 10-Aug-2013 |
matt | cmpne -> cmp
Use push/pop
|
| 1.2 | 13-Sep-2012 |
matt | branches: 1.2.2; 1.2.4;
Correct copyright/fix comments.
|
| 1.1 | 11-Sep-2012 |
matt | branches: 1.1.2;
Add 64bit atomic ops for ARMv6+ (using ldrexd/strexd).
|
| 1.1.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.2.4.2 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.1 | 13-Sep-2012 |
matt | file atomic_swap_64.S was added on branch matt-nb6-plus on 2012-11-27 23:42:35 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.1 | 13-Sep-2012 |
yamt | file atomic_swap_64.S was added on branch yamt-pagecache on 2012-10-30 18:46:12 +0000
|
| 1.8.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.10.18.4 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.10.18.3 | 06-Jul-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1313):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.12
Whitespace
|
| 1.10.18.2 | 30-Apr-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1261):
sys/arch/arm/include/lock.h: revision 1.38
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.17
Add the appropriate memory barrier before the lock is cleared in
__sync_lock_release_{1,2,4,8}. That is, all reads and write for the
inner shareability domain before the lock clear store.
Improve the membar_ops barriers - no need to use dsb and wait for
completion. Also, we only to act on the inner shareability domain.
Fix the barrier confusion. From Riastradh - thanks!.
|
| 1.10.18.1 | 26-Apr-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1254):
sys/arch/arm/include/lock.h: revision 1.37
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.15
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.16
sys/arch/arm/include/lock.h: revision 1.36
Fix ARMv8 instructions
Fix __sync_lock_release_4 to actually zeroise the whole 4bytes/32bits.
Trailing whitespace
Change #ifdef FOO to #if defined(FOO). NFCI.
|
| 1.10.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.10.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.10.8.1 | 26-Apr-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1672):
sys/arch/arm/include/lock.h: revision 1.37
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.15
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.16
sys/arch/arm/include/lock.h: revision 1.36
Fix ARMv8 instructions
Fix __sync_lock_release_4 to actually zeroise the whole 4bytes/32bits.
Trailing whitespace
Change #ifdef FOO to #if defined(FOO). NFCI.
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4; 1.3.26; 1.3.28;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_xor_16.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file atomic_xor_16.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4; 1.3.26; 1.3.28;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_xor_32.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file atomic_xor_32.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.7 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.6 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.5 | 28-Jun-2021 |
skrll | Whitespace
|
| 1.4 | 15-Sep-2019 |
skrll | __sync_{,x}or_and_fetch_8 should return new value... make it so.
|
| 1.3 | 04-Mar-2014 |
matt | branches: 1.3.4; 1.3.8; 1.3.22; 1.3.30; 1.3.32;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.2 | 30-Nov-2013 |
joerg | Use explicit form of register pair operations by specifying both.
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.3.32.3 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.32.2 | 06-Jul-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1313):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.12
Whitespace
|
| 1.3.32.1 | 17-Sep-2019 |
martin | Pull up following revision(s) (requested by skrll in ticket #202):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.11
__sync_{,x}or_and_fetch_8 should return new value... make it so.
|
| 1.3.30.2 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.30.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.3.22.1 | 17-Sep-2019 |
martin | Pull up following revision(s) (requested by skrll in ticket #1375):
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.11
__sync_{,x}or_and_fetch_8 should return new value... make it so.
|
| 1.3.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.8.1 | 04-Mar-2014 |
tls | file atomic_xor_64.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.3.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.4.1 | 04-Mar-2014 |
yamt | file atomic_xor_64.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4; 1.3.26; 1.3.28;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 04-Mar-2014 |
matt | branches: 1.2.2; 1.2.4;
Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 04-Mar-2014 |
yamt | file atomic_xor_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.28.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file atomic_xor_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.10 | 09-Apr-2022 |
riastradh | Introduce membar_acquire/release. Deprecate membar_enter/exit.
The names membar_enter/exit were unclear, and the documentation of
membar_enter has disagreed with the implementations on sparc,
powerpc, and even x86(!) for the entire time it has been in NetBSD.
The terms `acquire' and `release' are ubiquitous in the literature
today, and have been adopted in the C and C++ standards to mean
load-before-load/store and load/store-before-store, respectively,
which are exactly the orderings required by acquiring and releasing a
mutex, as well as other useful applications like decrementing a
reference count and then freeing the underlying object if it went to
zero.
Originally I proposed changing one word in the documentation for
membar_enter to make it load-before-load/store instead of
store-before-load/store, i.e., to make it an acquire barrier. I
proposed this on the grounds that
(a) all implementations guarantee load-before-load/store,
(b) some implementations fail to guarantee store-before-load/store,
and
(c) all uses in-tree assume load-before-load/store.
I verified parts (a) and (b) (except, for (a), powerpc didn't even
guarantee load-before-load/store -- isync isn't necessarily enough;
need lwsync in general -- but it _almost_ did, and it certainly didn't
guarantee store-before-load/store).
Part (c) might not be correct, however: under the mistaken assumption
that atomic-r/m/w then membar-w/rw is equivalent to atomic-r/m/w then
membar-r/rw, I only audited the cases of membar_enter that _aren't_
immediately after an atomic-r/m/w. All of those cases assume
load-before-load/store. But my assumption was wrong -- there are
cases of atomic-r/m/w then membar-w/rw that would be broken by
changing to atomic-r/m/w then membar-r/rw:
https://mail-index.netbsd.org/tech-kern/2022/03/29/msg028044.html
Furthermore, the name membar_enter has been adopted in other places
like OpenBSD where it actually does follow the documentation and
guarantee store-before-load/store, even if that order is not useful.
So the name membar_enter currently lives in a bad place where it
means either of two things -- r/rw or w/rw.
With this change, we deprecate membar_enter/exit, introduce
membar_acquire/release as better names for the useful pair (r/rw and
rw/w), and make sure the implementation of membar_enter guarantees
both what was documented _and_ what was implemented, making it an
alias for membar_sync.
While here, rework all of the membar_* definitions and aliases. The
new logic follows a rule to make it easier to audit:
membar_X is defined as an alias for membar_Y iff membar_X is
guaranteed by membar_Y.
The `no stronger than' relation is (the transitive closure of):
- membar_consumer (r/r) is guaranteed by membar_acquire (r/rw)
- membar_producer (w/w) is guaranteed by membar_release (rw/w)
- membar_acquire (r/rw) is guaranteed by membar_sync (rw/rw)
- membar_release (rw/w) is guaranteed by membar_sync (rw/rw)
And, for the deprecated membars:
- membar_enter (whether r/rw, w/rw, or rw/rw) is guaranteed by
membar_sync (rw/rw)
- membar_exit (rw/w) is guaranteed by membar_release (rw/w)
(membar_exit is identical to membar_release, but the name is
deprecated.)
Finally, while here, annotate some of the instructions with their
semantics. For powerpc, leave an essay with citations on the
unfortunate but -- as far as I can tell -- necessary decision to use
lwsync, not isync, for membar_acquire and membar_consumer.
Also add membar(3) and atomic(3) man page links.
|
| 1.9 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.8 | 10-Jul-2021 |
skrll | s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
|
| 1.7 | 27-Apr-2021 |
skrll | Improve the membar_ops barriers - no need to use dsb and wait for
completion. Also, we only to act on the inner shareability domain.
|
| 1.6 | 28-Mar-2014 |
skrll | branches: 1.6.26; 1.6.28;
Ensure SBZ register is zero
|
| 1.5 | 04-Mar-2014 |
matt | Don't export __sync* if _KERNEL || _STANDALONE are defined.
(except if _RUMPKERNEL is defined)
|
| 1.4 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.3 | 16-Aug-2012 |
matt | branches: 1.3.2;
Actually use the assembly version of the atomic function if compiling
for armv6 or armv7 cpus. Use atomic_cas_ptr instead of _lock_cas so
we pick up the assembly version when it's used.
|
| 1.2 | 16-Aug-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.24;
Add assembly versions of atomic ops with ldrex/strex
|
| 1.1 | 26-Aug-2007 |
matt | branches: 1.1.2;
file membar_ops.S was initially added on branch thorpej-atomic.
|
| 1.1.2.1 | 26-Aug-2007 |
matt | Add armv6 variants of atomic ops which use ldrex/strex.
Add atomic_swap (all arm architectures) which uses swp and swpb.
Add membar_ops which uses armv6 data {sync, memory} barrier.
XXX let thorpej figure out the Makefile magic.
|
| 1.2.24.1 | 27-Nov-2012 |
matt | Pull atomic ops from HEAD.
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.2.2.1 | 16-Aug-2008 |
wrstuden | file membar_ops.S was added on branch wrstuden-revivesa on 2008-09-18 04:54:18 +0000
|
| 1.3.2.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.6.28.2 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.6.28.1 | 30-Apr-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1261):
sys/arch/arm/include/lock.h: revision 1.38
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.17
Add the appropriate memory barrier before the lock is cleared in
__sync_lock_release_{1,2,4,8}. That is, all reads and write for the
inner shareability domain before the lock clear store.
Improve the membar_ops barriers - no need to use dsb and wait for
completion. Also, we only to act on the inner shareability domain.
Fix the barrier confusion. From Riastradh - thanks!.
|
| 1.6.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.6.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3 | 17-May-2015 |
justin | branches: 1.3.16; 1.3.18;
Move arm sync_* changes to Makefile.inc
|
| 1.2 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.1 | 08-Nov-2013 |
matt | branches: 1.1.4; 1.1.8;
Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.1.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.1 | 08-Nov-2013 |
tls | file sync_bool_compare_and_swap_1.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.1.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.4.1 | 08-Nov-2013 |
yamt | file sync_bool_compare_and_swap_1.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.3.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3 | 17-May-2015 |
justin | branches: 1.3.16; 1.3.18;
Move arm sync_* changes to Makefile.inc
|
| 1.2 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.1 | 08-Nov-2013 |
matt | branches: 1.1.4; 1.1.8;
Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.1.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.1 | 08-Nov-2013 |
tls | file sync_bool_compare_and_swap_2.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.1.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.4.1 | 08-Nov-2013 |
yamt | file sync_bool_compare_and_swap_2.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.3.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3 | 17-May-2015 |
justin | branches: 1.3.16; 1.3.18;
Move arm sync_* changes to Makefile.inc
|
| 1.2 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.1 | 08-Nov-2013 |
matt | branches: 1.1.4; 1.1.8;
Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.1.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.1 | 08-Nov-2013 |
tls | file sync_bool_compare_and_swap_4.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.1.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.4.1 | 08-Nov-2013 |
yamt | file sync_bool_compare_and_swap_4.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.3.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.3.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4 | 17-May-2015 |
justin | branches: 1.4.16; 1.4.18;
Move arm sync_* changes to Makefile.inc
|
| 1.3 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.2 | 30-Nov-2013 |
joerg | branches: 1.2.4; 1.2.8;
Use explicit form of register pair operations by specifying both.
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.1 | 30-Nov-2013 |
tls | file sync_bool_compare_and_swap_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Nov-2013 |
yamt | file sync_bool_compare_and_swap_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.4.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.4.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.4.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.6 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5 | 17-May-2015 |
justin | branches: 1.5.16; 1.5.18;
Move arm sync_* changes to Makefile.inc
|
| 1.4 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 30-Nov-2013 |
joerg | branches: 1.2.2; 1.2.4;
Use explicit form of register pair operations by specifying both.
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Nov-2013 |
yamt | file sync_fetch_and_add_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file sync_fetch_and_add_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.5.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.6 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5 | 17-May-2015 |
justin | branches: 1.5.16; 1.5.18;
Move arm sync_* changes to Makefile.inc
|
| 1.4 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 30-Nov-2013 |
joerg | branches: 1.2.2; 1.2.4;
Use explicit form of register pair operations by specifying both.
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Nov-2013 |
yamt | file sync_fetch_and_and_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file sync_fetch_and_and_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.5.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.6 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5 | 11-Dec-2015 |
skrll | branches: 1.5.16; 1.5.18;
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.4 | 17-May-2015 |
justin | Move arm sync_* changes to Makefile.inc
|
| 1.3 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.2 | 30-Nov-2013 |
joerg | branches: 1.2.4; 1.2.6; 1.2.8;
Use explicit form of register pair operations by specifying both.
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.1 | 30-Nov-2013 |
tls | file sync_fetch_and_nand_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.2.6.1 | 26-Feb-2016 |
snj | Pull up following revision(s) (requested by skrll in ticket #1105):
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.3
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.5
Use gcc 4.4 and later operation for nand, i.e.
*ptr = ~(tmp & value) instead of *ptr = ~tmp & value
There was also another bug in sync_fetch_and_nand_8 which I've also fixed.
PR port-arm32/50513: Incorrect logic for atomic_nand_xx.S
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Nov-2013 |
yamt | file sync_fetch_and_nand_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.5.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.6 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5 | 17-May-2015 |
justin | branches: 1.5.16; 1.5.18;
Move arm sync_* changes to Makefile.inc
|
| 1.4 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 30-Nov-2013 |
joerg | branches: 1.2.2; 1.2.4;
Use explicit form of register pair operations by specifying both.
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Nov-2013 |
yamt | file sync_fetch_and_or_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file sync_fetch_and_or_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.5.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.6 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5 | 17-May-2015 |
justin | branches: 1.5.16; 1.5.18;
Move arm sync_* changes to Makefile.inc
|
| 1.4 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 30-Nov-2013 |
joerg | branches: 1.2.2; 1.2.4;
Use explicit form of register pair operations by specifying both.
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Nov-2013 |
yamt | file sync_fetch_and_sub_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file sync_fetch_and_sub_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.5.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.6 | 28-Jul-2021 |
skrll | Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5 | 17-May-2015 |
justin | branches: 1.5.16; 1.5.18;
Move arm sync_* changes to Makefile.inc
|
| 1.4 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.3 | 23-Jun-2014 |
joerg | branches: 1.3.4;
Add aliases for the builtins used to implement C11/C++11 atomics.
|
| 1.2 | 30-Nov-2013 |
joerg | branches: 1.2.2; 1.2.4;
Use explicit form of register pair operations by specifying both.
|
| 1.1 | 08-Nov-2013 |
matt | Add support for the gcc __sync builtins.
Note that these need earmv6 or later to get the ldrex/strex instructions
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 30-Nov-2013 |
yamt | file sync_fetch_and_xor_8.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.2.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.4.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 | 23-Jun-2014 |
tls | file sync_fetch_and_xor_8.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.5.18.1 | 11-Aug-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1330):
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.18
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.19
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_inc_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_cas_up.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.9
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.8
common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_op_asm.h: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_cas_16.S: revision 1.3
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_xor_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_64.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_cas_32.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_xor_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.8
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_64.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_add_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_xor_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_add_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_or_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_16.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_nand_32.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_cas_8.S: revision 1.9
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_inc_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_cas_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.6
common/lib/libc/arch/arm/atomic/atomic_or_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_dec_32.S: revision 1.7
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_sub_64.S: revision 1.5
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S: revision 1.6
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.12
common/lib/libc/arch/arm/atomic/atomic_or_32.S: revision 1.10
common/lib/libc/arch/arm/atomic/atomic_and_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.14
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.13
common/lib/libc/arch/arm/atomic/atomic_nand_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_8.S: revision 1.5
common/lib/libc/arch/arm/atomic/atomic_and_16.S: revision 1.4
common/lib/libc/arch/arm/atomic/atomic_add_64.S: revision 1.14
Give the thumb atomic ops a chance of working
s/ifdef _ARM_ARCH_6/if defined(_ARM_ARCH_6)/ for consistency. NFCI.
Remove memory barriers from the atomic_ops(3) atomic operations. They're
not needed for correctness.
Add the correct memory barriers to the gcc legacy __sync built-in
functions for atomic memory access. From the gcc documentation:
In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.
type __sync_lock_test_and_set (type *ptr, type value, ...)
This built-in function is not a full barrier, but rather an acquire
barrier. This means that references after the operation cannot move to
(or be speculated to) before the operation, but previous memory stores
may not be globally visible yet, and previous memory loads may not yet
be satisfied.
void __sync_lock_release (type *ptr, ...)
This built-in function is not a full barrier, but rather a release
barrier. This means that all previous memory stores are globally
visible, and all previous memory loads have been satisfied, but
following memory reads are not prevented from being speculated to
before the barrier.
|
| 1.5.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3 | 29-Jan-2014 |
joerg | branches: 1.3.4; 1.3.28;
Kernel and standalone code uses panic() for broken code.
|
| 1.2 | 08-May-2013 |
matt | When using EABI, call __aeabi_{i,l}div0 when diving by 0.
|
| 1.1 | 23-Jan-2013 |
matt | branches: 1.1.4;
Add EABI support routines to raise SIGFPE on integer divide by 0.
|
| 1.1.4.4 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.4.3 | 23-Jun-2013 |
tls | resync from head
|
| 1.1.4.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.4.1 | 23-Jan-2013 |
tls | file __aeabi_idiv0.c was added on branch tls-maxphys on 2013-02-25 00:23:55 +0000
|
| 1.3.28.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.28.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.4.1 | 29-Jan-2014 |
yamt | file __aeabi_idiv0.c was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.3 | 29-Jan-2014 |
joerg | branches: 1.3.4; 1.3.28;
Kernel and standalone code uses panic() for broken code.
|
| 1.2 | 08-May-2013 |
matt | When using EABI, call __aeabi_{i,l}div0 when diving by 0.
|
| 1.1 | 23-Jan-2013 |
matt | branches: 1.1.4;
Add EABI support routines to raise SIGFPE on integer divide by 0.
|
| 1.1.4.4 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.4.3 | 23-Jun-2013 |
tls | resync from head
|
| 1.1.4.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.4.1 | 23-Jan-2013 |
tls | file __aeabi_ldiv0.c was added on branch tls-maxphys on 2013-02-25 00:23:55 +0000
|
| 1.3.28.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.28.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.4.1 | 29-Jan-2014 |
yamt | file __aeabi_ldiv0.c was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.6 | 19-Aug-2013 |
matt | branches: 1.6.26;
Use STRONG_ALIAS
Add thumb variation
|
| 1.5 | 27-Nov-2012 |
matt | Use the armv6 rev/rev16 if armv6 or later
|
| 1.4 | 28-Apr-2008 |
martin | branches: 1.4.4; 1.4.24; 1.4.26;
Remove clause 3 and 4 from TNF licenses
|
| 1.3 | 04-Feb-2006 |
uwe | branches: 1.3.18; 1.3.26;
Define htonl &co as alternative names to bswap only if little endian.
I'm not sure if idempotent versions need to be defined for big endian,
as the man page says in that case they are defined idempotent macros.
PR port-arm/32734
|
| 1.2 | 04-Feb-2006 |
uwe | libc wants __bswapNN, kernel wants bswapNN. That was not accounted
for during the merge of kernel and libc versions. Fix to match
e.g. i386 code.
|
| 1.1 | 20-Dec-2005 |
christos | Merge libkern + libc common files. As requested by core.
|
| 1.3.26.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.3.18.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.4.26.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.26.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.4.24.1 | 28-Nov-2012 |
matt | Use rev/rev16 on armv6 and later.
|
| 1.4.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.4.4.1 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.6.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.6.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.9 | 11-Dec-2020 |
dholland | arm bswap32: fix fatal typo in thumb code (PR 55854)
|
| 1.8 | 09-Dec-2020 |
dholland | arm bswap32: Improve the comments showing the byte flow.
It's confusing to use 1-4 for bytes 1-4 and then 0 for literal zero,
so use a-d for bytes 1-4.
|
| 1.7 | 19-Aug-2013 |
matt | branches: 1.7.26;
Add thumb version
Use STRONG_ALIAS
|
| 1.6 | 16-Jan-2013 |
matt | Add some comments to illustrate what is actually happening.
|
| 1.5 | 27-Nov-2012 |
matt | Use the armv6 rev/rev16 if armv6 or later
|
| 1.4 | 28-Apr-2008 |
martin | branches: 1.4.4; 1.4.24; 1.4.26;
Remove clause 3 and 4 from TNF licenses
|
| 1.3 | 04-Feb-2006 |
uwe | branches: 1.3.18; 1.3.26;
Define htonl &co as alternative names to bswap only if little endian.
I'm not sure if idempotent versions need to be defined for big endian,
as the man page says in that case they are defined idempotent macros.
PR port-arm/32734
|
| 1.2 | 04-Feb-2006 |
uwe | libc wants __bswapNN, kernel wants bswapNN. That was not accounted
for during the merge of kernel and libc versions. Fix to match
e.g. i386 code.
|
| 1.1 | 20-Dec-2005 |
christos | Merge libkern + libc common files. As requested by core.
|
| 1.3.26.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.3.18.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.4.26.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.26.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.4.24.1 | 28-Nov-2012 |
matt | Use rev/rev16 on armv6 and later.
|
| 1.4.4.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.4.4.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.4.4.1 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.7.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.7.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 29-Jan-2014 |
joerg | Include compiler-rt in libc, libm and libkern.
|
| 1.4 | 19-Aug-2013 |
matt | This is ARM only
|
| 1.3 | 20-Jun-2013 |
matt | Add support for __ARM_ARCH_EXT_IDIV__ which is set for those cores
with hardware divide instructions. Note that gcc 4.5.x doesn't support
this so this is just latent. gcc 4.7.x does.
|
| 1.2 | 08-May-2013 |
matt | When using EABI, call __aeabi_{i,l}div0 when diving by 0.
|
| 1.1 | 30-Oct-2012 |
christos | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
split udivsi3 and divsi3 to fix static linking. This could be done better.
|
| 1.1.8.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.8.2 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.1.8.1 | 30-Oct-2012 |
yamt | file divide.S was added on branch yamt-pagecache on 2013-01-16 05:25:53 +0000
|
| 1.1.6.2 | 28-Nov-2012 |
matt | Merge from HEAD.
split udivsi3 and divsi3 to fix static linking.
|
| 1.1.6.1 | 30-Oct-2012 |
matt | file divide.S was added on branch matt-nb6-plus on 2012-11-28 01:53:42 +0000
|
| 1.1.4.4 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.4.3 | 23-Jun-2013 |
tls | resync from head
|
| 1.1.4.2 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.1.4.1 | 30-Oct-2012 |
tls | file divide.S was added on branch tls-maxphys on 2012-11-20 02:57:29 +0000
|
| 1.1.2.2 | 19-Nov-2012 |
riz | Pull up following revision(s) (requested by christos in ticket #654):
common/lib/libc/arch/arm/gen/modsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/umodsi3.S: revision 1.1
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.11
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.12
common/lib/libc/arch/arm/gen/divide.S: revision 1.1
lib/libc/arch/arm/gen/Makefile.inc: revision 1.20
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.3
common/lib/libc/arch/arm/gen/udivsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.4
Split out modsi3 and umodsi3 from the divsi3 file. This is so that
we don't get re-defined symbols in libc from libgcc in static linking.
Example: cc -pthread -static main-calls-pthread-create.c
add split files.
add new divsi3 related files.
add new files to fix static linking
split udivsi3 and divsi3 to fix static linking. This could be done better.
Fixes PR#47139
|
| 1.1.2.1 | 30-Oct-2012 |
riz | file divide.S was added on branch netbsd-6 on 2012-11-19 18:38:02 +0000
|
| 1.14 | 29-Jan-2014 |
joerg | Include compiler-rt in libc, libm and libkern.
|
| 1.13 | 12-Sep-2013 |
joerg | Pass PICFLAGS down to cc-as-as and use __PIC__ to decide if it is small
vs big PIC mode. Retire -DPIC and -DBIGPIC.
|
| 1.12 | 09-Sep-2013 |
matt | Remove movw/movt due to linker problems.
Check for 0 divisor and __aeabi_idiv0 if needed (EABI && _LIBC only).
|
| 1.11 | 09-Sep-2013 |
matt | s/__libc/_libc/
|
| 1.10 | 08-Sep-2013 |
matt | Support using hwdiv instructions if those are available.
But only for EABI.
|
| 1.9 | 05-Sep-2013 |
matt | Use __ARM_EABI__ and new __UNWIND_TABLES__ to decide when to use .cfi ops
|
| 1.8 | 22-Aug-2013 |
matt | Don't include .cfi info if _KERNEL || _STANDALONE
|
| 1.7 | 19-Aug-2013 |
matt | Thumbify (and use .cfi ops)
|
| 1.6 | 20-Jun-2013 |
matt | Add support for __ARM_ARCH_EXT_IDIV__ which is set for those cores
with hardware divide instructions. Note that gcc 4.5.x doesn't support
this so this is just latent. gcc 4.7.x does.
|
| 1.5 | 08-May-2013 |
matt | When using EABI, call __aeabi_{i,l}div0 when diving by 0.
|
| 1.4 | 30-Oct-2012 |
christos | split udivsi3 and divsi3 to fix static linking. This could be done better.
|
| 1.3 | 10-Oct-2012 |
christos | Split out modsi3 and umodsi3 from the divsi3 file. This is so that
we don't get re-defined symbols in libc from libgcc in static linking.
Example: cc -pthread -static main-calls-pthread-create.c
|
| 1.2 | 05-Aug-2012 |
matt | branches: 1.2.2;
For __udivsi3 and __divsi3, add their EABI aliases as alternate entry
points.
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.18; 1.1.50; 1.1.52; 1.1.54;
Merge libkern + libc common files. As requested by core.
|
| 1.1.54.1 | 28-Nov-2012 |
matt | Merge from HEAD.
split udivsi3 and divsi3 to fix static linking.
|
| 1.1.52.2 | 20-Nov-2012 |
msaitoh | The last commit message said rev. 1.4 was included, but it wasn't in divsi3.
Apply rev. 1.4.
|
| 1.1.52.1 | 19-Nov-2012 |
riz | Pull up following revision(s) (requested by christos in ticket #654):
common/lib/libc/arch/arm/gen/modsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/umodsi3.S: revision 1.1
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.11
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.12
common/lib/libc/arch/arm/gen/divide.S: revision 1.1
lib/libc/arch/arm/gen/Makefile.inc: revision 1.20
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.3
common/lib/libc/arch/arm/gen/udivsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.4
Split out modsi3 and umodsi3 from the divsi3 file. This is so that
we don't get re-defined symbols in libc from libgcc in static linking.
Example: cc -pthread -static main-calls-pthread-create.c
add split files.
add new divsi3 related files.
add new files to fix static linking
split udivsi3 and divsi3 to fix static linking. This could be done better.
Fixes PR#47139
|
| 1.1.50.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.50.2 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.1.50.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.1.18.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.2.2.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.2.2 | 23-Jun-2013 |
tls | resync from head
|
| 1.2.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.5 | 29-Jan-2014 |
joerg | Include compiler-rt in libc, libm and libkern.
|
| 1.4 | 15-Aug-2013 |
matt | Only assemble if !__ARM_EABI__
|
| 1.3 | 20-Jun-2013 |
matt | Add support for __ARM_ARCH_EXT_IDIV__ which is set for those cores
with hardware divide instructions. Note that gcc 4.5.x doesn't support
this so this is just latent. gcc 4.7.x does.
|
| 1.2 | 28-Nov-2012 |
matt | branches: 1.2.2;
Optimize.
|
| 1.1 | 10-Oct-2012 |
christos | branches: 1.1.2; 1.1.4; 1.1.6;
Split out modsi3 and umodsi3 from the divsi3 file. This is so that
we don't get re-defined symbols in libc from libgcc in static linking.
Example: cc -pthread -static main-calls-pthread-create.c
|
| 1.1.6.5 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.6.4 | 23-Jun-2013 |
tls | resync from head
|
| 1.1.6.3 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.6.2 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.1.6.1 | 10-Oct-2012 |
tls | file modsi3.S was added on branch tls-maxphys on 2012-11-20 02:57:29 +0000
|
| 1.1.4.2 | 19-Nov-2012 |
riz | Pull up following revision(s) (requested by christos in ticket #654):
common/lib/libc/arch/arm/gen/modsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/umodsi3.S: revision 1.1
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.11
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.12
common/lib/libc/arch/arm/gen/divide.S: revision 1.1
lib/libc/arch/arm/gen/Makefile.inc: revision 1.20
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.3
common/lib/libc/arch/arm/gen/udivsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.4
Split out modsi3 and umodsi3 from the divsi3 file. This is so that
we don't get re-defined symbols in libc from libgcc in static linking.
Example: cc -pthread -static main-calls-pthread-create.c
add split files.
add new divsi3 related files.
add new files to fix static linking
split udivsi3 and divsi3 to fix static linking. This could be done better.
Fixes PR#47139
|
| 1.1.4.1 | 10-Oct-2012 |
riz | file modsi3.S was added on branch netbsd-6 on 2012-11-19 18:38:01 +0000
|
| 1.1.2.4 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.2.3 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.1.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.1.2.1 | 10-Oct-2012 |
yamt | file modsi3.S was added on branch yamt-pagecache on 2012-10-30 18:46:12 +0000
|
| 1.2.2.2 | 28-Nov-2012 |
matt | Merge from HEAD.
split udivsi3 and divsi3 to fix static linking.
|
| 1.2.2.1 | 28-Nov-2012 |
matt | file modsi3.S was added on branch matt-nb6-plus on 2012-11-28 01:53:42 +0000
|
| 1.2 | 18-Dec-2012 |
matt | branches: 1.2.2; 1.2.6; 1.2.36;
Don't need to include assym.h
Add a missing comma.
|
| 1.1 | 17-Dec-2012 |
matt | Add a routine to create an up to an 128 bitmask returned
in VFP/NEON q0 starting at the rightmost bit (bit 0).
|
| 1.2.36.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.36.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.6.1 | 18-Dec-2012 |
tls | file neon_mask.S was added on branch tls-maxphys on 2013-02-25 00:23:55 +0000
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 18-Dec-2012 |
yamt | file neon_mask.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.10 | 29-Jan-2014 |
joerg | Include compiler-rt in libc, libm and libkern.
|
| 1.9 | 12-Sep-2013 |
joerg | Pass PICFLAGS down to cc-as-as and use __PIC__ to decide if it is small
vs big PIC mode. Retire -DPIC and -DBIGPIC.
|
| 1.8 | 09-Sep-2013 |
matt | Remove movw/movt due to linker problems.
Check for 0 divisor and __aeabi_idiv0 if needed (EABI && _LIBC only).
|
| 1.7 | 09-Sep-2013 |
matt | s/__libc/_libc/
|
| 1.6 | 08-Sep-2013 |
matt | Support using hwdiv instructions if those are available.
But only for EABI.
|
| 1.5 | 05-Sep-2013 |
matt | Use __ARM_EABI__ and new __UNWIND_TABLES__ to decide when to use .cfi ops
|
| 1.4 | 22-Aug-2013 |
matt | Don't include .cfi info if _KERNEL || _STANDALONE
|
| 1.3 | 19-Aug-2013 |
matt | thumbify
add .cfi ops (for thumb)
|
| 1.2 | 20-Jun-2013 |
matt | Add support for __ARM_ARCH_EXT_IDIV__ which is set for those cores
with hardware divide instructions. Note that gcc 4.5.x doesn't support
this so this is just latent. gcc 4.7.x does.
|
| 1.1 | 30-Oct-2012 |
christos | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
split udivsi3 and divsi3 to fix static linking. This could be done better.
|
| 1.1.8.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.8.2 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.1.8.1 | 30-Oct-2012 |
yamt | file udivsi3.S was added on branch yamt-pagecache on 2013-01-16 05:25:53 +0000
|
| 1.1.6.2 | 28-Nov-2012 |
matt | Merge from HEAD.
split udivsi3 and divsi3 to fix static linking.
|
| 1.1.6.1 | 30-Oct-2012 |
matt | file udivsi3.S was added on branch matt-nb6-plus on 2012-11-28 01:53:42 +0000
|
| 1.1.4.4 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.4.3 | 23-Jun-2013 |
tls | resync from head
|
| 1.1.4.2 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.1.4.1 | 30-Oct-2012 |
tls | file udivsi3.S was added on branch tls-maxphys on 2012-11-20 02:57:29 +0000
|
| 1.1.2.2 | 19-Nov-2012 |
riz | Pull up following revision(s) (requested by christos in ticket #654):
common/lib/libc/arch/arm/gen/modsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/umodsi3.S: revision 1.1
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.11
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.12
common/lib/libc/arch/arm/gen/divide.S: revision 1.1
lib/libc/arch/arm/gen/Makefile.inc: revision 1.20
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.3
common/lib/libc/arch/arm/gen/udivsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.4
Split out modsi3 and umodsi3 from the divsi3 file. This is so that
we don't get re-defined symbols in libc from libgcc in static linking.
Example: cc -pthread -static main-calls-pthread-create.c
add split files.
add new divsi3 related files.
add new files to fix static linking
split udivsi3 and divsi3 to fix static linking. This could be done better.
Fixes PR#47139
|
| 1.1.2.1 | 30-Oct-2012 |
riz | file udivsi3.S was added on branch netbsd-6 on 2012-11-19 18:38:02 +0000
|
| 1.5 | 29-Jan-2014 |
joerg | Include compiler-rt in libc, libm and libkern.
|
| 1.4 | 15-Aug-2013 |
matt | Only assemble if !__ARM_EABI__
|
| 1.3 | 20-Jun-2013 |
matt | Add support for __ARM_ARCH_EXT_IDIV__ which is set for those cores
with hardware divide instructions. Note that gcc 4.5.x doesn't support
this so this is just latent. gcc 4.7.x does.
|
| 1.2 | 28-Nov-2012 |
matt | branches: 1.2.2;
Optimize.
|
| 1.1 | 10-Oct-2012 |
christos | branches: 1.1.2; 1.1.4; 1.1.6;
Split out modsi3 and umodsi3 from the divsi3 file. This is so that
we don't get re-defined symbols in libc from libgcc in static linking.
Example: cc -pthread -static main-calls-pthread-create.c
|
| 1.1.6.5 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.6.4 | 23-Jun-2013 |
tls | resync from head
|
| 1.1.6.3 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.6.2 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.1.6.1 | 10-Oct-2012 |
tls | file umodsi3.S was added on branch tls-maxphys on 2012-11-20 02:57:29 +0000
|
| 1.1.4.2 | 19-Nov-2012 |
riz | Pull up following revision(s) (requested by christos in ticket #654):
common/lib/libc/arch/arm/gen/modsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/umodsi3.S: revision 1.1
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.11
sys/lib/libkern/arch/arm/Makefile.inc: revision 1.12
common/lib/libc/arch/arm/gen/divide.S: revision 1.1
lib/libc/arch/arm/gen/Makefile.inc: revision 1.20
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.3
common/lib/libc/arch/arm/gen/udivsi3.S: revision 1.1
common/lib/libc/arch/arm/gen/divsi3.S: revision 1.4
Split out modsi3 and umodsi3 from the divsi3 file. This is so that
we don't get re-defined symbols in libc from libgcc in static linking.
Example: cc -pthread -static main-calls-pthread-create.c
add split files.
add new divsi3 related files.
add new files to fix static linking
split udivsi3 and divsi3 to fix static linking. This could be done better.
Fixes PR#47139
|
| 1.1.4.1 | 10-Oct-2012 |
riz | file umodsi3.S was added on branch netbsd-6 on 2012-11-19 18:38:02 +0000
|
| 1.1.2.4 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.2.3 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.1.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.1.2.1 | 10-Oct-2012 |
yamt | file umodsi3.S was added on branch yamt-pagecache on 2012-10-30 18:46:12 +0000
|
| 1.2.2.2 | 28-Nov-2012 |
matt | Merge from HEAD.
split udivsi3 and divsi3 to fix static linking.
|
| 1.2.2.1 | 28-Nov-2012 |
matt | file umodsi3.S was added on branch matt-nb6-plus on 2012-11-28 01:53:42 +0000
|
| 1.2 | 06-Aug-2012 |
matt | branches: 1.2.4; 1.2.36;
Change include to <arm/aeabi.h>
|
| 1.1 | 06-Aug-2012 |
matt | Add long long / unsigned long long comparision routines. These differ
from cmpdi2 in they return strcmp like values (-1, 0, 1).
|
| 1.2.36.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.36.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2.4.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.4.1 | 06-Aug-2012 |
yamt | file __aeabi_lcmp.c was added on branch yamt-pagecache on 2012-10-30 18:46:12 +0000
|
| 1.13 | 06-May-2014 |
joerg | branches: 1.13.24;
Make EHABI optional.
|
| 1.12 | 19-Aug-2013 |
matt | branches: 1.12.2;
Add cfi ops.
Thumbify
|
| 1.11 | 13-Aug-2013 |
matt | Use mvnge AHI, #0x80000000 instead of mvnge AHI, ALO, lsr #1
|
| 1.10 | 13-Aug-2013 |
matt | 0x800000000 -> 0x80000000 (one too many zeroes)
|
| 1.9 | 13-Aug-2013 |
matt | Fix movlt
|
| 1.8 | 13-Aug-2013 |
matt | andlt -> movlt
|
| 1.7 | 09-May-2013 |
matt | Don't worry about divide by 0 for kernel or standalone
|
| 1.6 | 09-May-2013 |
skrll | Don't use old syntax - it breaks the build. hi matt.
|
| 1.5 | 08-May-2013 |
matt | When using EABI, call __aeabi_{i,l}div0 when diving by 0.
|
| 1.4 | 05-May-2013 |
skrll | Whitespace.
|
| 1.3 | 19-Apr-2013 |
skrll | Fix logic inversion.
|
| 1.2 | 14-Apr-2013 |
matt | Fix calling of __qdivrem which the 3rd arg needs to passed on the stack.
|
| 1.1 | 05-Aug-2012 |
matt | branches: 1.1.2; 1.1.4;
Add another ARM EABI runtime routine for
combined quotient / remainder for signed long long.
|
| 1.1.4.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.4.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.1.4.1 | 05-Aug-2012 |
yamt | file __aeabi_ldivmod.S was added on branch yamt-pagecache on 2012-10-30 18:46:13 +0000
|
| 1.1.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.2.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.12.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.13.24.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.13.24.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2 | 06-Aug-2012 |
matt | branches: 1.2.4; 1.2.36;
Change include to <arm/aeabi.h>
|
| 1.1 | 06-Aug-2012 |
matt | Add long long / unsigned long long comparision routines. These differ
from cmpdi2 in they return strcmp like values (-1, 0, 1).
|
| 1.2.36.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.36.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2.4.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.4.1 | 06-Aug-2012 |
yamt | file __aeabi_ulcmp.c was added on branch yamt-pagecache on 2012-10-30 18:46:13 +0000
|
| 1.9 | 06-May-2014 |
joerg | branches: 1.9.24;
Make EHABI optional.
|
| 1.8 | 12-Dec-2013 |
matt | branches: 1.8.2;
Fix a bug in the divby0 case.
|
| 1.7 | 19-Aug-2013 |
matt | Add .cfi ops
Thumbify
|
| 1.6 | 09-May-2013 |
matt | Don't worry about divide by 0 for kernel or standalone
|
| 1.5 | 08-May-2013 |
matt | When using EABI, call __aeabi_{i,l}div0 when diving by 0.
|
| 1.4 | 14-Apr-2013 |
skrll | Pretty sure we don't want to change instruction set here. hi matt.
|
| 1.3 | 14-Apr-2013 |
matt | Fix calling of __qdivrem which the 3rd arg needs to passed on the stack.
|
| 1.2 | 05-Aug-2012 |
matt | branches: 1.2.2; 1.2.4;
Add RCSID.
Simplify.
|
| 1.1 | 05-Aug-2012 |
matt | Add a routine for __aeabi_uldivmod which is just a wrapper around __qdivrem
but returns the 64-bit dividend and remainder in r0-r3.
|
| 1.2.4.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.4.1 | 05-Aug-2012 |
yamt | file __aeabi_uldivmod.S was added on branch yamt-pagecache on 2012-10-30 18:46:13 +0000
|
| 1.2.2.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.2.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.8.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.9.24.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.9.24.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.9 | 17-May-2015 |
justin | branches: 1.9.16;
It is just the __ffssi2 alias we do not want in rump kernel
|
| 1.8 | 17-May-2015 |
justin | Do not build arm toolchain symbols in the rump kernel
These symbols will be provided at link time and will be
duplicate symbols in rump kernel and libc if defined.
Many have been fixed previously, but these were missed
as did not have a test.
|
| 1.7 | 23-Jan-2014 |
martin | PR port-arm/48543: do provide __ffssi2 as strong alias (in case libgcc.a gets
not linked in) for now.
OK: skrll@
|
| 1.6 | 30-Sep-2013 |
skrll | More (stylistic) whitespace.
|
| 1.5 | 30-Sep-2013 |
skrll | Appease new gas
|
| 1.4 | 19-Aug-2013 |
matt | Add END() and clarify thumb/arm
|
| 1.3 | 11-Aug-2013 |
matt | Convert some more conditional instructions to unified syntax
|
| 1.2 | 03-Jul-2011 |
matt | branches: 1.2.2; 1.2.8;
Add a weak symbol definition for __ffssi2 so that __builtin_ffs will use
this if no strong defintion of __ffssi2 is available.
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.18;
Merge libkern + libc common files. As requested by core.
|
| 1.1.18.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.2.8.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.9.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.9.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 26-Mar-2015 |
justin | branches: 1.5.16;
Don't build the __eabi_ aliases in the arm rump kernel.
These are provided by libc in userspace, so leave out of kernel
|
| 1.4 | 02-Dec-2013 |
joerg | Improve EABI handling of string functions. Most importantly, fix
__aeabi_memset, which has the arguments in the wrong order.
|
| 1.3 | 19-Aug-2013 |
matt | Add END()
|
| 1.2 | 11-Aug-2013 |
matt | Switch to unified syntax
use RET/RETc
use push/pop
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.18; 1.1.50; 1.1.56;
Merge libkern + libc common files. As requested by core.
|
| 1.1.56.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.50.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.18.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.5.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.8 | 07-Jun-2015 |
joerg | branches: 1.8.16;
Add ARM EABI aliases for aligned arguments.
|
| 1.7 | 26-Mar-2015 |
justin | Don't build the __eabi_ aliases in the arm rump kernel.
These are provided by libc in userspace, so leave out of kernel
|
| 1.6 | 02-Dec-2013 |
joerg | branches: 1.6.4;
Improve EABI handling of string functions. Most importantly, fix
__aeabi_memset, which has the arguments in the wrong order.
|
| 1.5 | 20-Aug-2013 |
matt | Unless we are using an XSCALE, default to the normal arm version of memcpy.
|
| 1.4 | 15-Feb-2013 |
matt | #include <arm/cdefs.h> to get _ARM_ARCH_DWORD_OK
|
| 1.3 | 08-Feb-2013 |
matt | Fix typo.
|
| 1.2 | 12-Dec-2012 |
matt | Change __XSCALE__ to _ARM_ARCH_DWORD_OK so that any cpu with dword load/store
can use it.
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.50; 1.1.54; 1.1.56;
Merge libkern + libc common files. As requested by core.
|
| 1.1.56.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.56.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.54.3 | 15-Feb-2013 |
matt | #include <arm/cdefs.h> to get _ARM_ARCH_DWORD_OK
|
| 1.1.54.2 | 08-Feb-2013 |
matt | Fix typo.
|
| 1.1.54.1 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.50.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.50.1 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.6.4.1 | 10-Jun-2015 |
snj | Pull up following revision(s) (requested by joerg in ticket #834):
common/lib/libc/arch/arm/string/memcpy.S: revision 1.8
Add ARM EABI aliases for aligned arguments.
|
| 1.8.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.8.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.7 | 24-Jan-2023 |
mlelstv | Fix two signed comparisons that were missed in the last patch.
Found be rillig@
|
| 1.6 | 19-Jan-2023 |
mlelstv | Use unsigned comparisons for pointers and size_t values.
|
| 1.5 | 02-Dec-2013 |
joerg | branches: 1.5.26; 1.5.40;
Improve EABI handling of string functions. Most importantly, fix
__aeabi_memset, which has the arguments in the wrong order.
|
| 1.4 | 11-Aug-2013 |
matt | Switch to unified syntax
use RET/RETc
use push/pop
|
| 1.3 | 28-Jan-2013 |
matt | Add aeabi strong aliases.
|
| 1.2 | 28-Apr-2008 |
martin | branches: 1.2.4; 1.2.24; 1.2.26;
Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.18; 1.1.26;
Merge libkern + libc common files. As requested by core.
|
| 1.1.26.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.18.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.2.26.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.26.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.24.1 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.4.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.5.40.1 | 20-Jul-2024 |
martin | Pull up following revision(s) (requested by rin in ticket #745):
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.7
common/lib/libc/arch/arm/string/memcpy_xscale.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_neon.S: revision 1.2
common/lib/libc/arch/arm/string/memset_naive.S: revision 1.2
common/lib/libc/arch/arm/string/memmove.S: revision 1.11
common/lib/libc/arch/arm/string/strlen_neon.S: revision 1.4
common/lib/libc/arch/arm/string/memset.S: revision 1.9
Use unsigned comparisons for pointers and size_t values.
Fix two signed comparisons that were missed in the last patch.
Found be rillig@
|
| 1.5.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3 | 27-Feb-2025 |
andvar | Fix various typos in comments.
|
| 1.2 | 19-Jan-2023 |
mlelstv | branches: 1.2.6;
Use unsigned comparisons for pointers and size_t values.
|
| 1.1 | 03-Jan-2013 |
matt | branches: 1.1.2; 1.1.4; 1.1.8; 1.1.38; 1.1.52;
This is a working version of memcpy implemented using NEON instructions.
Still needs tuning as it is still about 15% than the non-NEON version.
|
| 1.1.52.1 | 20-Jul-2024 |
martin | Pull up following revision(s) (requested by rin in ticket #745):
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.7
common/lib/libc/arch/arm/string/memcpy_xscale.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_neon.S: revision 1.2
common/lib/libc/arch/arm/string/memset_naive.S: revision 1.2
common/lib/libc/arch/arm/string/memmove.S: revision 1.11
common/lib/libc/arch/arm/string/strlen_neon.S: revision 1.4
common/lib/libc/arch/arm/string/memset.S: revision 1.9
Use unsigned comparisons for pointers and size_t values.
Fix two signed comparisons that were missed in the last patch.
Found be rillig@
|
| 1.1.38.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.1.38.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.1.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.8.1 | 03-Jan-2013 |
tls | file memcpy_neon.S was added on branch tls-maxphys on 2013-02-25 00:23:56 +0000
|
| 1.1.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.4.1 | 03-Jan-2013 |
matt | file memcpy_neon.S was added on branch matt-nb6-plus on 2013-02-07 07:05:59 +0000
|
| 1.1.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.1.2.1 | 03-Jan-2013 |
yamt | file memcpy_neon.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.2.6.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.6 | 19-Jan-2023 |
mlelstv | Use unsigned comparisons for pointers and size_t values.
|
| 1.5 | 17-Dec-2013 |
joerg | branches: 1.5.26; 1.5.40;
Write out register pairs for strd.
|
| 1.4 | 19-Aug-2013 |
matt | Add END(memcpy)
|
| 1.3 | 11-Aug-2013 |
matt | Switch to unified syntax
use RET/RETc
use push/pop
|
| 1.2 | 21-Jun-2007 |
scw | branches: 1.2.4; 1.2.34; 1.2.40;
Apply the patch, with some minor tweaks, supplied in PR/36513.
This prevents a possible prefetch past the end of the source buffer.
Note that the semantics of the pld instruction mean that it is unlikely
that this would have caused any problems except in very specific
circumstances in some types of device drivers.
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.6; 1.1.14;
Merge libkern + libc common files. As requested by core.
|
| 1.1.14.1 | 03-Sep-2007 |
wrstuden | Sync w/ NetBSD-4-RC_1
|
| 1.1.6.1 | 22-Jun-2007 |
liamjfoy | Pull up following revision(s) (requested by scw in ticket #741):
common/lib/libc/arch/arm/string/memcpy_xscale.S: revision 1.2
Apply the patch, with some minor tweaks, supplied in PR/36513.
This prevents a possible prefetch past the end of the source buffer.
Note that the semantics of the pld instruction mean that it is unlikely
that this would have caused any problems except in very specific
circumstances in some types of device drivers.
|
| 1.2.40.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.34.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.5.40.1 | 20-Jul-2024 |
martin | Pull up following revision(s) (requested by rin in ticket #745):
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.7
common/lib/libc/arch/arm/string/memcpy_xscale.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_neon.S: revision 1.2
common/lib/libc/arch/arm/string/memset_naive.S: revision 1.2
common/lib/libc/arch/arm/string/memmove.S: revision 1.11
common/lib/libc/arch/arm/string/strlen_neon.S: revision 1.4
common/lib/libc/arch/arm/string/memset.S: revision 1.9
Use unsigned comparisons for pointers and size_t values.
Fix two signed comparisons that were missed in the last patch.
Found be rillig@
|
| 1.5.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.11 | 19-Jan-2023 |
mlelstv | Use unsigned comparisons for pointers and size_t values.
|
| 1.10 | 13-Apr-2017 |
skrll | branches: 1.10.12; 1.10.26;
Comment alignment. No functional change.
|
| 1.9 | 26-Mar-2015 |
justin | branches: 1.9.2; 1.9.4;
Don't build the __eabi_ aliases in the arm rump kernel.
These are provided by libc in userspace, so leave out of kernel
|
| 1.8 | 02-Dec-2013 |
joerg | Improve EABI handling of string functions. Most importantly, fix
__aeabi_memset, which has the arguments in the wrong order.
|
| 1.7 | 30-Nov-2013 |
joerg | Use PLT_SYM.
|
| 1.6 | 19-Aug-2013 |
matt | Add END()
|
| 1.5 | 11-Aug-2013 |
matt | Switch to unified syntax
use RET/RETc
use push/pop
|
| 1.4 | 28-Jan-2013 |
matt | Add aeabi strong aliases.
|
| 1.3 | 28-Apr-2008 |
martin | branches: 1.3.4; 1.3.24; 1.3.26;
Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 20-Jun-2007 |
scw | branches: 1.2.4; 1.2.10;
Apply the patch supplied in PR/36512 to fix the buffer overlap check.
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.6; 1.1.14;
Merge libkern + libc common files. As requested by core.
|
| 1.1.14.1 | 03-Sep-2007 |
wrstuden | Sync w/ NetBSD-4-RC_1
|
| 1.1.6.1 | 21-Jun-2007 |
liamjfoy | Pull up following revision(s) (requested by scw in ticket #740):
common/lib/libc/arch/arm/string/memmove.S: revision 1.2
Apply the patch supplied in PR/36512 to fix the buffer overlap check.
|
| 1.2.10.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.4.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.3.26.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.26.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.3.24.1 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.3.4.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.9.4.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.9.2.1 | 26-Apr-2017 |
pgoyette | Sync with HEAD
|
| 1.10.26.1 | 20-Jul-2024 |
martin | Pull up following revision(s) (requested by rin in ticket #745):
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.7
common/lib/libc/arch/arm/string/memcpy_xscale.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_neon.S: revision 1.2
common/lib/libc/arch/arm/string/memset_naive.S: revision 1.2
common/lib/libc/arch/arm/string/memmove.S: revision 1.11
common/lib/libc/arch/arm/string/strlen_neon.S: revision 1.4
common/lib/libc/arch/arm/string/memset.S: revision 1.9
Use unsigned comparisons for pointers and size_t values.
Fix two signed comparisons that were missed in the last patch.
Found be rillig@
|
| 1.10.12.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.10.12.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.9 | 19-Jan-2023 |
mlelstv | Use unsigned comparisons for pointers and size_t values.
|
| 1.8 | 26-Mar-2015 |
justin | branches: 1.8.16; 1.8.30;
Don't build the __eabi_ aliases in the arm rump kernel.
These are provided by libc in userspace, so leave out of kernel
|
| 1.7 | 02-Dec-2013 |
joerg | Improve EABI handling of string functions. Most importantly, fix
__aeabi_memset, which has the arguments in the wrong order.
|
| 1.6 | 30-Nov-2013 |
joerg | Use explicit form of register pair operations by specifying both.
|
| 1.5 | 19-Aug-2013 |
matt | Add END()
|
| 1.4 | 11-Aug-2013 |
matt | Switch to unified syntax
use RET/RETc
use push/pop
|
| 1.3 | 28-Jan-2013 |
matt | Add aeabi strong aliases.
|
| 1.2 | 12-Dec-2012 |
matt | Change __XSCALE__ to _ARM_ARCH_DWORD_OK so that any cpu with strd can use it.
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.18; 1.1.50; 1.1.54; 1.1.56;
Merge libkern + libc common files. As requested by core.
|
| 1.1.56.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.56.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.54.1 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.50.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.50.1 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.1.18.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.8.30.1 | 20-Jul-2024 |
martin | Pull up following revision(s) (requested by rin in ticket #745):
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.7
common/lib/libc/arch/arm/string/memcpy_xscale.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_neon.S: revision 1.2
common/lib/libc/arch/arm/string/memset_naive.S: revision 1.2
common/lib/libc/arch/arm/string/memmove.S: revision 1.11
common/lib/libc/arch/arm/string/strlen_neon.S: revision 1.4
common/lib/libc/arch/arm/string/memset.S: revision 1.9
Use unsigned comparisons for pointers and size_t values.
Fix two signed comparisons that were missed in the last patch.
Found be rillig@
|
| 1.8.16.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.8.16.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2 | 14-Jan-2013 |
matt | branches: 1.2.2; 1.2.4; 1.2.8; 1.2.38;
Fix two typos
|
| 1.1 | 12-Jan-2013 |
matt | A version of memset that can do NEON, VFP as well as normal arm instructions
|
| 1.2.38.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.38.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.8.1 | 14-Jan-2013 |
tls | file memset_arm.S was added on branch tls-maxphys on 2013-02-25 00:23:56 +0000
|
| 1.2.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.4.1 | 14-Jan-2013 |
matt | file memset_arm.S was added on branch matt-nb6-plus on 2013-02-07 07:05:59 +0000
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 14-Jan-2013 |
yamt | file memset_arm.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.2 | 19-Jan-2023 |
mlelstv | Use unsigned comparisons for pointers and size_t values.
|
| 1.1 | 08-Jan-2013 |
matt | branches: 1.1.2; 1.1.4; 1.1.8; 1.1.38; 1.1.52;
Add a simplier version of memset which is less than 1/2 the size of the
current one. On a Cortex-A9, this is about 15%-30% faster than the current
libc version. This is not a trivial implementation since that was an order
magnitude slower than the existing libc version.
|
| 1.1.52.1 | 20-Jul-2024 |
martin | Pull up following revision(s) (requested by rin in ticket #745):
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.7
common/lib/libc/arch/arm/string/memcpy_xscale.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_neon.S: revision 1.2
common/lib/libc/arch/arm/string/memset_naive.S: revision 1.2
common/lib/libc/arch/arm/string/memmove.S: revision 1.11
common/lib/libc/arch/arm/string/strlen_neon.S: revision 1.4
common/lib/libc/arch/arm/string/memset.S: revision 1.9
Use unsigned comparisons for pointers and size_t values.
Fix two signed comparisons that were missed in the last patch.
Found be rillig@
|
| 1.1.38.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.1.38.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.1.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.8.1 | 08-Jan-2013 |
tls | file memset_naive.S was added on branch tls-maxphys on 2013-02-25 00:23:56 +0000
|
| 1.1.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.4.1 | 08-Jan-2013 |
matt | file memset_naive.S was added on branch matt-nb6-plus on 2013-02-07 07:05:59 +0000
|
| 1.1.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.1.2.1 | 08-Jan-2013 |
yamt | file memset_naive.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.1 | 13-Dec-2012 |
matt | branches: 1.1.2; 1.1.4; 1.1.8; 1.1.38;
Add a NEON(only) implementation of memset.
This is a work in progress.
|
| 1.1.38.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.1.38.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.1.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.8.1 | 13-Dec-2012 |
tls | file memset_neon.S was added on branch tls-maxphys on 2013-02-25 00:23:56 +0000
|
| 1.1.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.4.1 | 13-Dec-2012 |
matt | file memset_neon.S was added on branch matt-nb6-plus on 2013-02-07 07:06:00 +0000
|
| 1.1.2.2 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.1.2.1 | 13-Dec-2012 |
yamt | file memset_neon.S was added on branch yamt-pagecache on 2013-01-16 05:25:53 +0000
|
| 1.1 | 23-Jan-2013 |
matt | branches: 1.1.2; 1.1.6; 1.1.14; 1.1.38;
Switch to using ARM assembly versions of strcat, strchr, strrchr.
|
| 1.1.38.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.1.38.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.1.14.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.14.1 | 23-Jan-2013 |
yamt | file strcat.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.1.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.6.1 | 23-Jan-2013 |
tls | file strcat.S was added on branch tls-maxphys on 2013-02-25 00:23:57 +0000
|
| 1.1.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.2.1 | 23-Jan-2013 |
matt | file strcat.S was added on branch matt-nb6-plus on 2013-02-07 07:06:00 +0000
|
| 1.6 | 06-May-2014 |
joerg | branches: 1.6.24;
Make EHABI optional.
|
| 1.5 | 05-Sep-2013 |
matt | branches: 1.5.2;
Use __ARM_EABI__ and new __UNWIND_TABLES__ to decide when to use .cfi ops
|
| 1.4 | 22-Aug-2013 |
matt | Don't include .cfi info if _KERNEL || _STANDALONE
|
| 1.3 | 19-Aug-2013 |
matt | Add .cfi ops if EABI.
Thumbify.
|
| 1.2 | 15-Jan-2013 |
matt | branches: 1.2.2; 1.2.4; 1.2.8;
Add missing ! on str
|
| 1.1 | 14-Jan-2013 |
matt | Add a native version of strcat which uses the optimized strlen and strcpy
routines.
|
| 1.2.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.8.1 | 15-Jan-2013 |
tls | file strcat_arm.S was added on branch tls-maxphys on 2013-02-25 00:23:57 +0000
|
| 1.2.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.4.1 | 15-Jan-2013 |
matt | file strcat_arm.S was added on branch matt-nb6-plus on 2013-02-07 07:06:00 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 15-Jan-2013 |
yamt | file strcat_arm.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.5.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.6.24.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.6.24.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3 | 19-Aug-2013 |
matt | branches: 1.3.26;
cbnz/cbz can not branch backwards so nuke 'em.
Use the same register usage in strlen as in strnlen
|
| 1.2 | 19-Aug-2013 |
matt | Thumbify
|
| 1.1 | 14-Jan-2013 |
matt | branches: 1.1.2; 1.1.4; 1.1.8;
Add a simple version of strcat.
|
| 1.1.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.8.1 | 14-Jan-2013 |
tls | file strcat_naive.S was added on branch tls-maxphys on 2013-02-25 00:23:57 +0000
|
| 1.1.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.4.1 | 14-Jan-2013 |
matt | file strcat_naive.S was added on branch matt-nb6-plus on 2013-02-07 07:06:00 +0000
|
| 1.1.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.1.2.1 | 14-Jan-2013 |
yamt | file strcat_naive.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4 | 20-Aug-2013 |
matt | branches: 1.4.4; 1.4.28;
Use the arm versions of strlen/strchr/strrchr if compiling thumb2
|
| 1.3 | 19-Aug-2013 |
matt | For Thumb, use naive version
|
| 1.2 | 23-Jan-2013 |
matt | branches: 1.2.2; 1.2.6;
Add index/rindex strong aiases.
|
| 1.1 | 23-Jan-2013 |
matt | Switch to using ARM assembly versions of strcat, strchr, strrchr.
|
| 1.2.6.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.6.1 | 23-Jan-2013 |
tls | file strchr.S was added on branch tls-maxphys on 2013-02-25 00:23:57 +0000
|
| 1.2.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.2.1 | 23-Jan-2013 |
matt | file strchr.S was added on branch matt-nb6-plus on 2013-02-07 07:06:00 +0000
|
| 1.4.28.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.4.28.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.4.4.1 | 20-Aug-2013 |
yamt | file strchr.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.8 | 19-Aug-2013 |
matt | branches: 1.8.26;
Add two thumb2 bits.
|
| 1.7 | 19-Aug-2013 |
matt | Missing one teq -> cmp
|
| 1.6 | 19-Aug-2013 |
matt | Swap use of r1 and ip
teq -> cmp.
add s to few instructions
(thumbify part 1)
|
| 1.5 | 08-Feb-2013 |
matt | branches: 1.5.4;
Fix corner cases when searching for NUL.
|
| 1.4 | 07-Feb-2013 |
matt | branches: 1.4.2;
orrne wants 3 registers
|
| 1.3 | 26-Jan-2013 |
matt | Fix bug in detecting EOS/match on armv6+.
|
| 1.2 | 15-Jan-2013 |
matt | branches: 1.2.2;
Fix case when searching for NUL.
|
| 1.1 | 15-Jan-2013 |
matt | Add an ARM optimized version of strchr.
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 15-Jan-2013 |
yamt | file strchr_arm.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.4.2.3 | 08-Feb-2013 |
matt | Sync with HEAD.
|
| 1.4.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.4.2.1 | 07-Feb-2013 |
matt | file strchr_arm.S was added on branch matt-nb6-plus on 2013-02-07 07:06:00 +0000
|
| 1.5.4.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.5.4.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.5.4.1 | 08-Feb-2013 |
tls | file strchr_arm.S was added on branch tls-maxphys on 2013-02-25 00:23:57 +0000
|
| 1.8.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.8.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4 | 19-Aug-2013 |
matt | branches: 1.4.26;
cbnz/cbz can not branch backwards so nuke 'em.
Use the same register usage in strlen as in strnlen
|
| 1.3 | 19-Aug-2013 |
matt | Thumbify
|
| 1.2 | 19-Aug-2013 |
matt | ip -> r2
teq -> cmp
|
| 1.1 | 15-Jan-2013 |
matt | branches: 1.1.2; 1.1.4; 1.1.8;
Add simple/small versions of strchr/strrchr for ARM.
|
| 1.1.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.8.1 | 15-Jan-2013 |
tls | file strchr_naive.S was added on branch tls-maxphys on 2013-02-25 00:23:57 +0000
|
| 1.1.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.4.1 | 15-Jan-2013 |
matt | file strchr_naive.S was added on branch matt-nb6-plus on 2013-02-07 07:06:00 +0000
|
| 1.1.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.1.2.1 | 15-Jan-2013 |
yamt | file strchr_naive.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.4.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.4.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.2 | 19-Aug-2013 |
matt | branches: 1.2.26;
Thumbify
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.18; 1.1.50; 1.1.56;
Merge libkern + libc common files. As requested by core.
|
| 1.1.56.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.50.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.18.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.2.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 20-Aug-2013 |
matt | branches: 1.5.26;
If compiling standalone with Thumb, use the thumb version instead of the
naive version.
|
| 1.4 | 10-Jan-2013 |
matt | branches: 1.4.2; 1.4.4; 1.4.8;
use #if defined(xxx) instead of ifdef
|
| 1.3 | 08-Jan-2013 |
matt | Depending on _STANDALONE include the "naive" version or the normal arm version.
|
| 1.2 | 02-Jan-2013 |
matt | Deal with _LIBC (aliases, etc).
Add missing #endif.
|
| 1.1 | 02-Jan-2013 |
matt | Add an assembly version of strcpy/strncpy/strlcpy.
(they all use a common source with defines to determine which to build).
|
| 1.4.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.4.8.1 | 10-Jan-2013 |
tls | file strcpy.S was added on branch tls-maxphys on 2013-02-25 00:23:57 +0000
|
| 1.4.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.4.4.1 | 10-Jan-2013 |
matt | file strcpy.S was added on branch matt-nb6-plus on 2013-02-07 07:06:01 +0000
|
| 1.4.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.4.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.4.2.1 | 10-Jan-2013 |
yamt | file strcpy.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.5.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.7 | 08-Feb-2024 |
andvar | fix misplaced or missing "e" in words with "ment" ending (argument, implement,
increment, decrement, alignment), in comments, documentation, log messages.
|
| 1.6 | 14-Jan-2017 |
christos | branches: 1.6.14;
fix rump
|
| 1.5 | 14-Jan-2017 |
christos | fix weak symbols. More work needs to be done for memcpy/strlen etc.
|
| 1.4 | 13-Jan-2017 |
christos | No need to include namespace.h; no other assembly code does.
|
| 1.3 | 11-Aug-2013 |
matt | branches: 1.3.8;
Switch to unified syntax
use RET/RETc
use push/pop
|
| 1.2 | 10-Jan-2013 |
matt | branches: 1.2.2; 1.2.4; 1.2.8;
Fix a typo in strlcpy which caused to not deal with NULs predecing the
string properly.
|
| 1.1 | 08-Jan-2013 |
matt | Rename strlen.S and strcpy.S to strlen_arm.S and strcpy_arm.S
|
| 1.2.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.8.1 | 10-Jan-2013 |
tls | file strcpy_arm.S was added on branch tls-maxphys on 2013-02-25 00:23:58 +0000
|
| 1.2.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.4.1 | 10-Jan-2013 |
matt | file strcpy_arm.S was added on branch matt-nb6-plus on 2013-02-07 07:06:01 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 10-Jan-2013 |
yamt | file strcpy_arm.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.3.8.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.6.14.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.6.14.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.8 | 14-Jan-2017 |
christos | branches: 1.8.14;
fix standalone
|
| 1.7 | 14-Jan-2017 |
christos | fix standalone
|
| 1.6 | 14-Jan-2017 |
christos | fix rump
|
| 1.5 | 13-Jan-2017 |
christos | No need to include namespace.h; no other assembly code does.
|
| 1.4 | 20-Aug-2013 |
matt | branches: 1.4.8;
write of final NUL in strlcpy doesn't need to be post-incremented
|
| 1.3 | 11-Aug-2013 |
matt | Convert some more conditional instructions to unified syntax
|
| 1.2 | 10-Jan-2013 |
matt | branches: 1.2.2; 1.2.4; 1.2.8;
Add weak alias for strlcpy
|
| 1.1 | 08-Jan-2013 |
matt | Add simple/small versions of the str* functions. Suitable for libsa, etc.
|
| 1.2.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.8.1 | 10-Jan-2013 |
tls | file strcpy_naive.S was added on branch tls-maxphys on 2013-02-25 00:23:58 +0000
|
| 1.2.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.4.1 | 10-Jan-2013 |
matt | file strcpy_naive.S was added on branch matt-nb6-plus on 2013-02-07 07:06:01 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 10-Jan-2013 |
yamt | file strcpy_naive.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.4.8.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.8.14.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.8.14.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3 | 14-Jan-2017 |
christos | branches: 1.3.14;
fix weak symbols. More work needs to be done for memcpy/strlen etc.
|
| 1.2 | 13-Jan-2017 |
christos | No need to include namespace.h; no other assembly code does.
|
| 1.1 | 20-Aug-2013 |
matt | branches: 1.1.4; 1.1.8; 1.1.12;
Thumb versions of strcpy/strlcpy/strncpy
|
| 1.1.12.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.1.8.2 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.1 | 20-Aug-2013 |
tls | file strcpy_thumb.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000
|
| 1.1.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.4.1 | 20-Aug-2013 |
yamt | file strcpy_thumb.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.3.14.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.14.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4 | 14-Jan-2017 |
christos | branches: 1.4.14;
fix weak symbols. More work needs to be done for memcpy/strlen etc.
|
| 1.3 | 13-Jan-2017 |
christos | No need to include namespace.h; no other assembly code does.
|
| 1.2 | 20-Aug-2013 |
matt | branches: 1.2.4; 1.2.10;
strlcat_arm.S is smaller than strlcat_naive.S so always use it.
|
| 1.1 | 23-Jan-2013 |
matt | branches: 1.1.2; 1.1.6;
Enable ARM assembly versions of strlcat and strnlen.
|
| 1.1.6.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.6.1 | 23-Jan-2013 |
tls | file strlcat.S was added on branch tls-maxphys on 2013-02-25 00:23:58 +0000
|
| 1.1.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.2.1 | 23-Jan-2013 |
matt | file strlcat.S was added on branch matt-nb6-plus on 2013-02-07 07:06:01 +0000
|
| 1.2.10.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.2.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.4.1 | 20-Aug-2013 |
yamt | file strlcat.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.4.14.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.4.14.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.6 | 06-May-2014 |
joerg | branches: 1.6.2; 1.6.26;
Make EHABI optional.
|
| 1.5 | 05-Sep-2013 |
matt | branches: 1.5.2;
Use __ARM_EABI__ and new __UNWIND_TABLES__ to decide when to use .cfi ops
|
| 1.4 | 22-Aug-2013 |
matt | Don't include .cfi info if _KERNEL || _STANDALONE
|
| 1.3 | 19-Aug-2013 |
matt | fix cfi_register -> cfi_offset
|
| 1.2 | 19-Aug-2013 |
matt | Add .cfi for __ARM_EABI__
Thumbify
|
| 1.1 | 23-Jan-2013 |
matt | branches: 1.1.2; 1.1.6;
Add ARM assembly of strlcat which is implemented using (the ARM optimized)
strnlen and strlcpy.
|
| 1.1.6.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.6.1 | 23-Jan-2013 |
tls | file strlcat_arm.S was added on branch tls-maxphys on 2013-02-25 00:23:58 +0000
|
| 1.1.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.2.1 | 23-Jan-2013 |
matt | file strlcat_arm.S was added on branch matt-nb6-plus on 2013-02-07 07:06:01 +0000
|
| 1.5.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.6.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.6.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.6.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.6.2.1 | 06-May-2014 |
yamt | file strlcat_arm.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.3 | 22-Aug-2013 |
matt | branches: 1.3.26;
Don't include .cfi info if _KERNEL || _STANDALONE
|
| 1.2 | 11-Aug-2013 |
matt | Convert some more conditional instructions to unified syntax
|
| 1.1 | 18-Jan-2013 |
matt | branches: 1.1.2; 1.1.4; 1.1.8;
Simple version of strlcat for ARM.
|
| 1.1.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.8.1 | 18-Jan-2013 |
tls | file strlcat_naive.S was added on branch tls-maxphys on 2013-02-25 00:23:58 +0000
|
| 1.1.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.4.1 | 18-Jan-2013 |
matt | file strlcat_naive.S was added on branch matt-nb6-plus on 2013-02-07 07:06:01 +0000
|
| 1.1.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.1.2.1 | 18-Jan-2013 |
yamt | file strlcat_naive.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.5 | 20-Aug-2013 |
matt | branches: 1.5.26;
If compiling standalone with Thumb, use the thumb version instead of the
naive version.
|
| 1.4 | 10-Jan-2013 |
matt | branches: 1.4.2; 1.4.4; 1.4.8;
Back out workaround.
|
| 1.3 | 10-Jan-2013 |
matt | Use the naive version of strlcpy until the longer one is fixed (it's still
faster than the C version).
|
| 1.2 | 10-Jan-2013 |
matt | use #if defined(xxx) instead of ifdef
|
| 1.1 | 02-Jan-2013 |
matt | Add an assembly version of strcpy/strncpy/strlcpy.
(they all use a common source with defines to determine which to build).
|
| 1.4.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.4.8.1 | 10-Jan-2013 |
tls | file strlcpy.S was added on branch tls-maxphys on 2013-02-25 00:23:58 +0000
|
| 1.4.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.4.4.1 | 10-Jan-2013 |
matt | file strlcpy.S was added on branch matt-nb6-plus on 2013-02-07 07:06:01 +0000
|
| 1.4.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.4.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.4.2.1 | 10-Jan-2013 |
yamt | file strlcpy.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.5.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.5.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4 | 20-Aug-2013 |
matt | branches: 1.4.26;
Use the arm versions of strlen/strchr/strrchr if compiling thumb2
|
| 1.3 | 19-Aug-2013 |
matt | For Thumb, use naive version
|
| 1.2 | 08-Jan-2013 |
matt | branches: 1.2.2; 1.2.4; 1.2.8;
Depending on _STANDALONE include the "naive" version or the normal arm version.
|
| 1.1 | 02-Jan-2013 |
matt | Rename strlen_armv6.S to strlen.S since this is no longer armv6 dependent.
|
| 1.2.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.8.1 | 08-Jan-2013 |
tls | file strlen.S was added on branch tls-maxphys on 2013-02-25 00:23:58 +0000
|
| 1.2.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.4.1 | 08-Jan-2013 |
matt | file strlen.S was added on branch matt-nb6-plus on 2013-02-07 07:06:01 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 08-Jan-2013 |
yamt | file strlen.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.4.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.4.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.11 | 15-Jan-2023 |
skrll | Fix strnlen with a large maxlen argument by using unsigned comparison
conditions - from mlelstv.
I had a similar, but not quite as good patch.
|
| 1.10 | 03-Dec-2022 |
skrll | branches: 1.10.2;
Fix some comments
|
| 1.9 | 06-May-2014 |
joerg | branches: 1.9.24; 1.9.26;
Make EHABI optional.
|
| 1.8 | 05-Sep-2013 |
matt | branches: 1.8.2;
Use __ARM_EABI__ and new __UNWIND_TABLES__ to decide when to use .cfi ops
|
| 1.7 | 22-Aug-2013 |
matt | Don't include .cfi info if _KERNEL || _STANDALONE
|
| 1.6 | 20-Aug-2013 |
matt | Add a missing it gt before movgt for thumb
|
| 1.5 | 20-Aug-2013 |
matt | thumbify (part2)
|
| 1.4 | 19-Aug-2013 |
matt | For EABI, add .cfi ops
|
| 1.3 | 23-Jan-2013 |
matt | branches: 1.3.2; 1.3.6;
Add support for strnlen.
|
| 1.2 | 09-Jan-2013 |
matt | branches: 1.2.2;
Use movw on armv7 to fill uppper halfword.
|
| 1.1 | 08-Jan-2013 |
matt | Rename strlen.S and strcpy.S to strlen_arm.S and strcpy_arm.S
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 09-Jan-2013 |
yamt | file strlen_arm.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.3.6.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.3.6.1 | 23-Jan-2013 |
tls | file strlen_arm.S was added on branch tls-maxphys on 2013-02-25 00:23:59 +0000
|
| 1.3.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.3.2.1 | 23-Jan-2013 |
matt | file strlen_arm.S was added on branch matt-nb6-plus on 2013-02-07 07:06:02 +0000
|
| 1.8.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.9.26.1 | 19-Jan-2023 |
martin | Pull up following revision(s) (requested by skrll in ticket #1567):
common/lib/libc/arch/arm/string/strlen_arm.S: revision 1.11
Fix strnlen with a large maxlen argument by using unsigned comparison
conditions - from mlelstv.
I had a similar, but not quite as good patch.
|
| 1.9.24.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.9.24.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.10.2.1 | 19-Jan-2023 |
martin | Pull up following revision(s) (requested by skrll in ticket #51):
common/lib/libc/arch/arm/string/strlen_arm.S: revision 1.11
Fix strnlen with a large maxlen argument by using unsigned comparison
conditions - from mlelstv.
I had a similar, but not quite as good patch.
|
| 1.4 | 02-Jan-2013 |
matt | Rename strlen_armv6.S to strlen.S since this is no longer armv6 dependent.
|
| 1.3 | 31-Dec-2012 |
matt | Make this work on all ARMs but keep the armv6 optimizations. It as fast as
the existing strlen for small string and once strings are 8 bytes or more in
length it starts getting significantly faster. For really long strings,
compared to the existing strlen, this uses about 1/2 of the cycles for the
non-armv6 version and about 1/3 of the cycles for the armv6 version.
|
| 1.2 | 29-Dec-2012 |
matt | A few slight speedups (remove one instruction from the main loop).
|
| 1.1 | 28-Dec-2012 |
matt | strlen implementation for armv6 and later. Uses clz and uqadd8 to really
speed the search for NUL. as fast as normal strlen at about a length of
6 or 7 and 2-3 times faster starting around 10.
|
| 1.9 | 03-Dec-2022 |
skrll | improve a comment
|
| 1.8 | 19-Aug-2013 |
matt | branches: 1.8.26;
cbnz/cbz can not branch backwards so nuke 'em.
Use the same register usage in strlen as in strnlen
|
| 1.7 | 19-Aug-2013 |
matt | Thumbify
|
| 1.6 | 19-Aug-2013 |
matt | Use ip as a temporary
|
| 1.5 | 19-Aug-2013 |
matt | Change previous use of r2 to r3
|
| 1.4 | 19-Aug-2013 |
matt | teq -> cmp
ip -> r2
add/sub -> adds/subs
(thumbify part 1)
|
| 1.3 | 23-Jan-2013 |
matt | branches: 1.3.2; 1.3.6;
Add support for strnlen.
|
| 1.2 | 08-Jan-2013 |
pgoyette | branches: 1.2.2;
Add missing quote - fix build
|
| 1.1 | 08-Jan-2013 |
matt | Add simple/small versions of the str* functions. Suitable for libsa, etc.
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 08-Jan-2013 |
yamt | file strlen_naive.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.3.6.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.3.6.1 | 23-Jan-2013 |
tls | file strlen_naive.S was added on branch tls-maxphys on 2013-02-25 00:23:59 +0000
|
| 1.3.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.3.2.1 | 23-Jan-2013 |
matt | file strlen_naive.S was added on branch matt-nb6-plus on 2013-02-07 07:06:02 +0000
|
| 1.8.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.8.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4 | 19-Jan-2023 |
mlelstv | Use unsigned comparisons for pointers and size_t values.
|
| 1.3 | 28-Dec-2012 |
matt | branches: 1.3.2; 1.3.4; 1.3.8; 1.3.38; 1.3.52;
Debug. This becomes faster than the normal strlen at about 80 characters.
|
| 1.2 | 15-Dec-2012 |
matt | Slighly improved (can deal with all 16 bytes being non-NUL and quickly
proceed to next qword).
|
| 1.1 | 15-Dec-2012 |
matt | Add a NEON implementation of strlen.
|
| 1.3.52.1 | 20-Jul-2024 |
martin | Pull up following revision(s) (requested by rin in ticket #745):
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_arm.S: revision 1.7
common/lib/libc/arch/arm/string/memcpy_xscale.S: revision 1.6
common/lib/libc/arch/arm/string/memcpy_neon.S: revision 1.2
common/lib/libc/arch/arm/string/memset_naive.S: revision 1.2
common/lib/libc/arch/arm/string/memmove.S: revision 1.11
common/lib/libc/arch/arm/string/strlen_neon.S: revision 1.4
common/lib/libc/arch/arm/string/memset.S: revision 1.9
Use unsigned comparisons for pointers and size_t values.
Fix two signed comparisons that were missed in the last patch.
Found be rillig@
|
| 1.3.38.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.38.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.3.8.1 | 28-Dec-2012 |
tls | file strlen_neon.S was added on branch tls-maxphys on 2013-02-25 00:23:59 +0000
|
| 1.3.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.3.4.1 | 28-Dec-2012 |
matt | file strlen_neon.S was added on branch matt-nb6-plus on 2013-02-07 07:06:02 +0000
|
| 1.3.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.3.2.1 | 28-Dec-2012 |
yamt | file strlen_neon.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.2 | 19-Aug-2013 |
matt | branches: 1.2.26;
Thumbify
|
| 1.1 | 20-Dec-2005 |
christos | branches: 1.1.18; 1.1.50; 1.1.56;
Merge libkern + libc common files. As requested by core.
|
| 1.1.56.1 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.50.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.18.1 | 28-Aug-2007 |
matt | Add thumb versions (or force to arm32 mode when in thumb mode).
|
| 1.2.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.2.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3 | 20-Aug-2013 |
matt | branches: 1.3.26;
If compiling standalone with Thumb, use the thumb version instead of the
naive version.
|
| 1.2 | 10-Jan-2013 |
matt | branches: 1.2.2; 1.2.4; 1.2.8;
use #if defined(xxx) instead of ifdef
|
| 1.1 | 02-Jan-2013 |
matt | Add an assembly version of strcpy/strncpy/strlcpy.
(they all use a common source with defines to determine which to build).
|
| 1.2.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.8.1 | 10-Jan-2013 |
tls | file strncpy.S was added on branch tls-maxphys on 2013-02-25 00:23:59 +0000
|
| 1.2.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.4.1 | 10-Jan-2013 |
matt | file strncpy.S was added on branch matt-nb6-plus on 2013-02-07 07:06:02 +0000
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.1 | 10-Jan-2013 |
yamt | file strncpy.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.3.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3 | 20-Aug-2013 |
matt | branches: 1.3.4; 1.3.28;
Use the arm versions of strnlen if compiling thumb2
|
| 1.2 | 19-Aug-2013 |
matt | For Thumb, use naive version
|
| 1.1 | 23-Jan-2013 |
matt | branches: 1.1.2; 1.1.6;
Enable ARM assembly versions of strlcat and strnlen.
|
| 1.1.6.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.6.1 | 23-Jan-2013 |
tls | file strnlen.S was added on branch tls-maxphys on 2013-02-25 00:23:59 +0000
|
| 1.1.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.2.1 | 23-Jan-2013 |
matt | file strnlen.S was added on branch matt-nb6-plus on 2013-02-07 07:06:02 +0000
|
| 1.3.28.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.3.28.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.3.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.4.1 | 20-Aug-2013 |
yamt | file strnlen.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.4 | 20-Aug-2013 |
matt | branches: 1.4.4; 1.4.28;
Use the arm versions of strlen/strchr/strrchr if compiling thumb2
|
| 1.3 | 19-Aug-2013 |
matt | For Thumb, use naive version
|
| 1.2 | 23-Jan-2013 |
matt | branches: 1.2.2; 1.2.6;
Add index/rindex strong aiases.
|
| 1.1 | 23-Jan-2013 |
matt | Switch to using ARM assembly versions of strcat, strchr, strrchr.
|
| 1.2.6.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.6.1 | 23-Jan-2013 |
tls | file strrchr.S was added on branch tls-maxphys on 2013-02-25 00:23:59 +0000
|
| 1.2.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.2.1 | 23-Jan-2013 |
matt | file strrchr.S was added on branch matt-nb6-plus on 2013-02-07 07:06:02 +0000
|
| 1.4.28.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.4.28.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.4.4.1 | 20-Aug-2013 |
yamt | file strrchr.S was added on branch yamt-pagecache on 2014-05-22 11:26:28 +0000
|
| 1.6 | 25-Aug-2013 |
matt | branches: 1.6.26;
move a misplaced #endif
|
| 1.5 | 20-Aug-2013 |
matt | swap r1 & ip
use adds, eors, etc.
teq -> cmp
|
| 1.4 | 11-Aug-2013 |
matt | Switch to unified syntax
use RET/RETc
use push/pop
|
| 1.3 | 08-Feb-2013 |
matt | branches: 1.3.4;
Fix corner cases when searching for NUL.
|
| 1.2 | 28-Jan-2013 |
matt | branches: 1.2.2;
Deal with an end-of-string condition properly.
|
| 1.1 | 15-Jan-2013 |
matt | branches: 1.1.2;
Add ARM optimized version of strrchr.
|
| 1.1.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.1.2.1 | 15-Jan-2013 |
yamt | file strrchr_arm.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.2.2.3 | 08-Feb-2013 |
matt | Sync with HEAD.
|
| 1.2.2.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.2.2.1 | 28-Jan-2013 |
matt | file strrchr_arm.S was added on branch matt-nb6-plus on 2013-02-07 07:06:02 +0000
|
| 1.3.4.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.3.4.1 | 08-Feb-2013 |
tls | file strrchr_arm.S was added on branch tls-maxphys on 2013-02-25 00:23:59 +0000
|
| 1.6.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.6.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.4 | 19-Aug-2013 |
matt | branches: 1.4.26;
cbnz/cbz can not branch backwards so nuke 'em.
Use the same register usage in strlen as in strnlen
|
| 1.3 | 19-Aug-2013 |
matt | Thumbify
|
| 1.2 | 19-Aug-2013 |
matt | ip -> r2
teq -> cmp
|
| 1.1 | 15-Jan-2013 |
matt | branches: 1.1.2; 1.1.4; 1.1.8;
Add simple/small versions of strchr/strrchr for ARM.
|
| 1.1.8.3 | 19-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.8.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.8.1 | 15-Jan-2013 |
tls | file strrchr_naive.S was added on branch tls-maxphys on 2013-02-25 00:23:59 +0000
|
| 1.1.4.2 | 07-Feb-2013 |
matt | Sync with HEAD
|
| 1.1.4.1 | 15-Jan-2013 |
matt | file strrchr_naive.S was added on branch matt-nb6-plus on 2013-02-07 07:06:02 +0000
|
| 1.1.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.1.2.1 | 15-Jan-2013 |
yamt | file strrchr_naive.S was added on branch yamt-pagecache on 2013-01-23 00:04:06 +0000
|
| 1.4.26.2 | 21-Apr-2020 |
martin | Ooops, restore accidently removed files from merge mishap
|
| 1.4.26.1 | 21-Apr-2020 |
martin | Sync with HEAD
|
