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History log of /src/lib/csu/arch/riscv
RevisionDateAuthorComments
 1.3 28-Dec-2018  christos Undo previous; breaks macppc/m68k (at least)
 1.2 27-Dec-2018  christos Enable initfini array support for everyone.
 1.1 19-Sep-2014  matt branches: 1.1.16;
New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
 1.1.16.1 10-Jun-2019  christos Sync with HEAD
 1.3 07-May-2023  skrll RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).
 1.2 26-Nov-2018  joerg Do not pass the main object handle from the assembler startup stub to
the common ___start routine. It's only used for a pointless magic
version check. Thanks to martin@ for testing various architectures.
 1.1 19-Sep-2014  matt branches: 1.1.14; 1.1.16;
New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
 1.1.16.1 10-Jun-2019  christos Sync with HEAD
 1.1.14.1 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.1 19-Sep-2014  matt New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
 1.1 19-Sep-2014  matt New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
 1.2 10-Feb-2019  maya Update comment (copied from or1k)
 1.1 19-Sep-2014  matt branches: 1.1.16;
New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
 1.1.16.1 10-Jun-2019  christos Sync with HEAD
 1.2 10-Feb-2019  maya Update comment (copied from or1k)
 1.1 19-Sep-2014  matt branches: 1.1.16;
New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
 1.1.16.1 10-Jun-2019  christos Sync with HEAD

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