History log of /src/lib/libc/arch/riscv/gen |
Revision | Date | Author | Comments |
1.3 | 14-Sep-2023 |
rin | libc/arch: Fix copy-paste; or1k, powerpc64, riscv are not powerpc ;)
|
1.2 | 13-Apr-2019 |
maya | build the generic 128bit long double code.
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1.1 | 19-Sep-2014 |
matt | branches: 1.1.16; New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.1.16.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
1.5 | 11-Oct-2023 |
skrll | Consistently pass 0 as first and ignored argument to sigprocmask in the setjmp implementations.
NFCI.
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1.4 | 07-May-2023 |
skrll | RISC-V support that works on QEMU with a single hart.
Thanks for Simon Burge for plic(4).
|
1.3 | 04-Dec-2022 |
skrll | Consistently use the 'mv' instrucation (which is itself an alias) instead of the (old) alternative alias 'move'.
|
1.2 | 27-Mar-2015 |
matt | Switch to new ABI (return values now in a0/a1; v0/v1 are no more)
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1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.2 | 27-Mar-2015 |
matt | Adapt to new assembler. jump->tail[call] auipc/lo12 changes.
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1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.2 | 30-Nov-2024 |
christos | Create a new header lwp_private.h to contain _lwp_getprivate_fast, _lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that: 1. we don't need special hacks to hide them 2. we can include <lwp.h> where needed to get the necessary prototypes without redefining them locally.
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1.1 | 19-Sep-2014 |
matt | branches: 1.1.28; New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
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1.1.28.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
1.3 | 04-Dec-2022 |
skrll | Consistently use the 'mv' instrucation (which is itself an alias) instead of the (old) alternative alias 'move'.
|
1.2 | 27-Mar-2015 |
matt | Switch to new ABI (return values now in a0/a1; v0/v1 are no more)
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.2 | 19-Mar-2015 |
joerg | Call libc's fpgetround.
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1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.3 | 07-May-2023 |
skrll | RISC-V support that works on QEMU with a single hart.
Thanks for Simon Burge for plic(4).
|
1.2 | 03-Dec-2022 |
skrll | Trailing whitespace
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.4 | 16-May-2024 |
riastradh | riscv: Nix shifting around FRRM and FSRM in libc too.
These read and write the floating-point rounding mode directly, not the whole floating-point control and status register.
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1.3 | 07-May-2023 |
skrll | RISC-V support that works on QEMU with a single hart.
Thanks for Simon Burge for plic(4).
|
1.2 | 03-Dec-2022 |
skrll | Trailing whitespace
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.4 | 16-May-2024 |
riastradh | riscv: More shiftiness reduction around FCSR in libc.
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1.3 | 07-May-2023 |
skrll | RISC-V support that works on QEMU with a single hart.
Thanks for Simon Burge for plic(4).
|
1.2 | 03-Dec-2022 |
skrll | Trailing whitespace
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.4 | 11-May-2024 |
skrll | Do the '#if FCSR_FMASK == 0' thing that fpgetmask.c does for consistency.
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1.3 | 07-May-2023 |
skrll | RISC-V support that works on QEMU with a single hart.
Thanks for Simon Burge for plic(4).
|
1.2 | 03-Dec-2022 |
skrll | Trailing whitespace
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.4 | 16-May-2024 |
riastradh | riscv: Nix shifting around FRRM and FSRM in libc too.
These read and write the floating-point rounding mode directly, not the whole floating-point control and status register.
|
1.3 | 07-May-2023 |
skrll | RISC-V support that works on QEMU with a single hart.
Thanks for Simon Burge for plic(4).
|
1.2 | 03-Dec-2022 |
skrll | Trailing whitespace
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.4 | 16-May-2024 |
riastradh | riscv: More shiftiness reduction around FCSR in libc.
|
1.3 | 07-May-2023 |
skrll | RISC-V support that works on QEMU with a single hart.
Thanks for Simon Burge for plic(4).
|
1.2 | 03-Dec-2022 |
skrll | Trailing whitespace
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.3 | 04-May-2024 |
skrll | makecontext: correct the type to setup register based arguments.
Use __greg_t rather than int for register based arguments. This fixes various atf tests.
|
1.2 | 07-May-2023 |
skrll | RISC-V support that works on QEMU with a single hart.
Thanks for Simon Burge for plic(4).
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.2 | 03-Dec-2022 |
skrll | Trailing whitespace
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|
1.3 | 27-Mar-2015 |
matt | Adapt to new assembler. jump->tail[call] auipc/lo12 changes.
|
1.2 | 27-Mar-2015 |
matt | Switch to new ABI (return values now in a0/a1; v0/v1 are no more)
|
1.1 | 19-Sep-2014 |
matt | New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)
|