libc/arch: Fix copy-paste; or1k, powerpc64, riscv are not powerpc ;)

build the generic 128bit long double code.

branches: 1.1.16;
New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

Consistently pass 0 as first and ignored argument to sigprocmask in the
setjmp implementations.

NFCI.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Consistently use the 'mv' instrucation (which is itself an alias) instead
of the (old) alternative alias 'move'.

Switch to new ABI (return values now in a0/a1; v0/v1 are no more)

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

Adapt to new assembler. jump->tail[call] auipc/lo12 changes.

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

Create a new header lwp_private.h to contain _lwp_getprivate_fast,
_lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that:
1. we don't need special hacks to hide them
2. we can include <lwp.h> where needed to get the necessary prototypes
without redefining them locally.

branches: 1.1.28;
New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

Consistently use the 'mv' instrucation (which is itself an alias) instead
of the (old) alternative alias 'move'.

Switch to new ABI (return values now in a0/a1; v0/v1 are no more)

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

Call libc's fpgetround.

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Trailing whitespace

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

riscv: Nix shifting around FRRM and FSRM in libc too.

These read and write the floating-point rounding mode directly, not
the whole floating-point control and status register.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Trailing whitespace

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

riscv: More shiftiness reduction around FCSR in libc.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Trailing whitespace

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

Do the '#if FCSR_FMASK == 0' thing that fpgetmask.c does for consistency.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Trailing whitespace

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

riscv: Nix shifting around FRRM and FSRM in libc too.

These read and write the floating-point rounding mode directly, not
the whole floating-point control and status register.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Trailing whitespace

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

riscv: More shiftiness reduction around FCSR in libc.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Trailing whitespace

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

makecontext: correct the type to setup register based arguments.

Use __greg_t rather than int for register based arguments. This fixes
various atf tests.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

Trailing whitespace

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

Adapt to new assembler. jump->tail[call] auipc/lo12 changes.

Switch to new ABI (return values now in a0/a1; v0/v1 are no more)

New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)