| History log of /src/sys/arch/aarch64/conf |
| Revision | Date | Author | Comments |
| 1.25 | 28-Jul-2023 |
rin | Simplify fix for PR toolchain/57146
Introduce ARCH_STRIP_SYMBOLS variable to centralize logic for debug symbols from MD Makefile's to Makefile.kern.inc.
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| 1.24 | 26-Jul-2023 |
rin | Fix kernel size inflation for arm and aarch64 (PR toolchain/57146)
For some conditions, SYSTEM_LD_TAIL is set for arm and aarch64. Then, ctfmerge(1) in default SYSTEM_LD_TAIL is unintentionally skipped, which results in the catastrophic kernel size inflation, as reported in the PR.
Also, introduce and use OBJCOPY_STRIPFLAGS variable instead of STRIPFLAGS, as strip(1) is replaced by objcopy(1) during MI kernel build procedure.
XXX For Makefile.{arm,aarch64}, weird logic is used to determine how to handle debug symbols; MKDEBUG{,KERNEL} are taken into account later in sys/conf/Makefile.kern.inc.
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| 1.23 | 27-May-2021 |
ryo | branches: 1.23.12; In gcc10, -msign-return-address is no longer supported. Instead, (LLVM-compatible) -mbranch-protection option is supported.
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| 1.22 | 10-Feb-2021 |
ryo | branches: 1.22.4; 1.22.6; add support kernel profiling on aarch64
- add MCOUNT_ENTER, MCOUNT_EXIT macro - __mcount() function should be aligned - add "-fno-optimize-sibling-calls" option when PROF. for accurate profiling, it is better to suppress the tail call.
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| 1.21 | 11-May-2020 |
ryo | branches: 1.21.2; "options ARMV83_PAC" is now supported for gcc as well.
- add "-msign-return-address=all" to CFLAGS for gcc when specified options ARMV83_PAC - AARCH64REG_{READ,WRITE}_INLINE3 macro can now use the APIAKey registers in both gcc and llvm. llvm requires asm(".arch armv8.3-a"), whereas gcc requires __attribute__((target("arch=armv8.3-a"))). - use ".arch armv8.3-a" rather than ".arch armv8.3-a+pac" in *.S for llvm.
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| 1.20 | 13-Apr-2020 |
maxv | Add KASAN instrumentation on on-stack VLAs, same as amd64.
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| 1.19 | 13-Apr-2020 |
maxv | Add support for Branch Target Identification (BTI).
On the executable pages that have the GP (Guarded Page) bit, the semantic of the "br" and "blr" instructions is changed: the CPU expects the first instruction of the jump/call target to be "bti", and faults if it isn't.
We add the GP bit on the kernel .text pages (and incidentally the .rodata pages, but we don't care). The compiler adds a "bti c" instruction at the beginning of each C function. We modify the ENTRY() macros to manually add "bti c" in the asm functions.
cpuswitch.S needs a specific change: with "br x27" the CPU expects "bti j", which is bad because the functions begin with "bti c"; switch to "br x16", for the CPU to accept "bti c".
BTI helps defend against JOP/COP. Tested on Qemu.
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| 1.18 | 12-Apr-2020 |
maxv | Add support for Pointer Authentication (PAC).
We use the "pac-ret" option, to sign the return instruction pointer on function entry, and authenticate it on function exit. This acts as a mitigation against ROP.
The authentication uses a per-lwp (secret) I-A key stored in the 128bit APIAKey register and part of the lwp context. During lwp creation, the kernel generates a random key, and during context switches, it installs the key of the target lwp on the CPU.
Userland cannot read the APIAKey register directly. However, it can sign its pointers with it, because the register is architecturally shared between userland and the kernel. Although part of the CPU design, it is a bit of an undesired behavior, because it allows to forge valid kernel pointers from userland. To avoid that, we don't share the key with userland, and rather switch it in EL0<->EL1 transitions. This means that when userland executes, a different key is loaded in APIAKey than the one the kernel uses. For now the userland key is a fixed 128bit zero value.
The DDB stack unwinder is changed to strip the authentication code from the pointers in lr.
Two problems are known:
* Currently the idlelwps' keys are not really secret. This is because the RNG is not yet available when we spawn these lwps. Not overly important, but would be nice to fix with UEFI RNG. * The key switching in EL0<->EL1 transitions is not the most optimized code on the planet. Instead of checking aarch64_pac_enabled, it would be better to hot-patch the code at boot time, but there currently is no hot-patch support on aarch64.
Tested on Qemu.
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| 1.17 | 04-Mar-2020 |
ryo | branches: 1.17.2; change kernel vm base address to use more than 256GB of memory. (up to 64TB)
also enlarge KSEG(direct map) region from 512GB to 64TB. KASAN works ok.
Note: -fasan-shadow-offset= KASAN_SHADOW_START - (CANONICAL_BASE >> 3) = 0xFFFF400000000000 - (0xFFFF000000000000 >> 3) = 0xDFFF600000000000
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| 1.16 | 04-Dec-2019 |
jmcneill | Fix alignment of .text section by changing load address to 0xffffffc000000000 and adding 64 bytes of padding before the entry point.
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| 1.15 | 03-Mar-2019 |
maxv | branches: 1.15.4; Add KASAN use-after-scope detection in aarch64, tested by Ryo Shimizu, thanks.
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| 1.14 | 08-Nov-2018 |
maxv | Track the stack with kASan on aarch64. Same principle as on amd64. Illegal accesses occurring there are now detected.
Originally written by me, but reworked by ryo@, thanks.
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| 1.13 | 01-Nov-2018 |
maxv | Add kASan support for aarch64. Stack tracking needs more investigation and will come in a separate commit.
Reviewed by ryo@ jmcneill@ skrll@.
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| 1.12 | 22-Sep-2018 |
rin | - Determine KERN_AS automatically depending on whether OPT_MODULAR is set or not, in the same way as libcompat.
- Specify OPT_MODULAR in the port Makefile instead of KERN_AS.
Now, KERN_AS=library is used for kernels without module(7) for all ports.
OK christos
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| 1.11 | 14-Sep-2018 |
skrll | s/A64/ARM/
no functional change
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| 1.10 | 23-Jun-2018 |
jakllsch | branches: 1.10.2; locore.S is a MD_SFILES.
This keeps the dependency handling in the loop, so rebuilds after changing options, say EARLYCONS, don't fail.
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| 1.9 | 01-Apr-2018 |
ryo | Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)
- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
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| 1.8 | 10-Dec-2017 |
christos | branches: 1.8.2; - Allow multiple .BEGIN targets - Make their protection consistent
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| 1.7 | 05-May-2016 |
rjs | Fix config(1) errors and warnings.
Set up arm headers for the build.
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| 1.6 | 24-Aug-2015 |
uebayasi | Define ${LINKSCRIPT} in one place.
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| 1.5 | 20-Aug-2015 |
uebayasi | Use ${KERNLDSCRIPT}.
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| 1.4 | 15-Nov-2014 |
uebayasi | branches: 1.4.2; Use LINKSCRIPT.
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| 1.3 | 17-Aug-2014 |
joerg | branches: 1.3.2; Reorganize symbol table embedding. The existing option SYMTAB_SPACE is replaced by the make option COPY_SYMTAB set to any value. The copy of the symbol table is no longer put into a buffer in kern_ksyms.o, but a small helper object. This object is build first with a dummy size, then the kernel is linked to compute the real dimension of the symbol table buffer. After that, the helper object is rebuild and the kernel linked again.
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| 1.2 | 14-Aug-2014 |
joerg | Use wildcards for stripping/preserving the mapping symbols on ARM and AArch64. LLVM creates unique symbols in each file of the form $a.n etc.
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| 1.1 | 10-Aug-2014 |
matt | branches: 1.1.2; Preliminary files for AARCH64 (64-bit ARM) support. Enough for a distribution build.
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| 1.1.2.1 | 05-Jan-2016 |
snj | Pull up following revision(s) (requested by martin in ticket #1058): sys/arch/arm/conf/Makefile.arm: revision 1.43 sys/arch/aarch64/conf/Makefile.aarch64: revision 1.2 share/mk/bsd.sys.mk: revision 1.243, 1.244 Use wildcards for stripping/preserving the mapping symbols on ARM and AArch64. LLVM creates unique symbols in each file of the form $a.n etc. -- Fix typo in OBJCOPYLIBFLAGS_EXTRA for aarch64eb.
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| 1.3.2.3 | 03-Dec-2017 |
jdolecek | update from HEAD
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| 1.3.2.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
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| 1.3.2.1 | 17-Aug-2014 |
tls | file Makefile.aarch64 was added on branch tls-maxphys on 2014-08-20 00:02:39 +0000
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| 1.4.2.2 | 29-May-2016 |
skrll | Sync with HEAD
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| 1.4.2.1 | 22-Sep-2015 |
skrll | Sync with HEAD
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| 1.8.2.4 | 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
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| 1.8.2.3 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
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| 1.8.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
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| 1.8.2.1 | 07-Apr-2018 |
pgoyette | Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
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| 1.10.2.3 | 21-Apr-2020 |
martin | Sync with HEAD
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| 1.10.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
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| 1.10.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
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| 1.15.4.1 | 09-Dec-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #525):
external/cddl/osnet/dev/dtrace/aarch64/dtrace_isa.c: revision 1.1 distrib/sets/lists/modules/md.i386: revision 1.83 share/mk/bsd.own.mk: revision 1.1168 usr.bin/mkubootimage/mkubootimage.c: revision 1.25 sys/modules/dtrace/Makefile: revision 1.7 usr.bin/mkubootimage/mkubootimage.c: revision 1.26 sys/modules/dtrace/Makefile: revision 1.8 external/cddl/osnet/dist/lib/libdtrace/aarch64/dt_isadep.c: revision 1.2 distrib/sets/lists/modules/mi: revision 1.128 sys/arch/aarch64/include/frame.h: revision 1.3 sys/arch/evbarm/conf/mk.generic64: revision 1.4 external/cddl/osnet/dist/lib/libdtrace/common/dt_link.c: revision 1.12 sys/modules/cyclic/Makefile: revision 1.4 sys/arch/aarch64/conf/Makefile.aarch64: revision 1.16 external/cddl/osnet/dev/dtrace/aarch64/dtrace_subr.c: revision 1.1 sys/arch/aarch64/aarch64/start.S: revision 1.3 sys/arch/aarch64/aarch64/trap.c: revision 1.22 external/cddl/osnet/dev/fbt/aarch64/fbt_isa.c: revision 1.1 external/cddl/osnet/dev/dtrace/aarch64/dtrace_asm.S: revision 1.1 external/cddl/osnet/dev/fbt/aarch64/fbt_isa.h: revision 1.1 external/cddl/osnet/dev/dtrace/aarch64/regset.h: revision 1.1 external/cddl/osnet/lib/libdtrace/Makefile: revision 1.26 distrib/sets/lists/modules/md.amd64: revision 1.82 usr.bin/mkubootimage/mkubootimage.1: revision 1.13 distrib/sets/lists/modules/ad.arm: revision 1.14
Add KDTRACE_HOOKS support.
Define lwp_trapframe() macro
dtrace: add support for aarch64
Add syscall_linux back for other arm architectures (accidently removed in previous)
Add -u flag for updating headers in place.
Fix alignment of .text section by changing load address to 0xffffffc000000000 and adding 64 bytes of padding before the entry point.
Update arm64 image header in place
Move dtrace_syscall_linux out of mi set list
Enable DTrace on aarch64
Fix signed/unsigned comparison
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| 1.17.2.1 | 20-Apr-2020 |
bouyer | Sync with HEAD
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| 1.21.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
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| 1.22.6.1 | 31-May-2021 |
cjep | sync with head
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| 1.22.4.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
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| 1.23.12.1 | 11-Sep-2023 |
martin | Pull up following revision(s) (requested by rin in ticket #363):
sys/arch/aarch64/conf/Makefile.aarch64: revision 1.24 sys/arch/aarch64/conf/Makefile.aarch64: revision 1.25 sys/arch/shark/conf/Makefile.shark.inc: revision 1.28 sys/arch/alpha/conf/Makefile.alpha: revision 1.88 sys/arch/mips/conf/Makefile.mips: revision 1.73 sys/conf/Makefile.kern.inc: revision 1.298 sys/conf/Makefile.kern.inc: revision 1.299 sys/arch/cats/conf/Makefile.cats.inc: revision 1.37 sys/arch/arm/conf/Makefile.arm: revision 1.56 sys/arch/arm/conf/Makefile.arm: revision 1.57 sys/arch/riscv/conf/Makefile.riscv: revision 1.10
Always use arm-elf2aout; no a.out support both for binutils{,.old}
Fix kernel size inflation for arm and aarch64 (PR toolchain/57146)
For some conditions, SYSTEM_LD_TAIL is set for arm and aarch64. Then, ctfmerge(1) in default SYSTEM_LD_TAIL is unintentionally skipped, which results in the catastrophic kernel size inflation, as reported in the PR.
Also, introduce and use OBJCOPY_STRIPFLAGS variable instead of STRIPFLAGS, as strip(1) is replaced by objcopy(1) during MI kernel build procedure.
For Makefile.{arm,aarch64}, weird logic is used to determine how to handle debug symbols; MKDEBUG{,KERNEL} are taken into account later in sys/conf/Makefile.kern.inc.
Use OBJCOPY_STRIPFLAGS instead of STRIPFLAGS. Simplify fix for PR toolchain/57146
Introduce ARCH_STRIP_SYMBOLS variable to centralize logic for debug symbols from MD Makefile's to Makefile.kern.inc.
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| 1.45 | 09-May-2024 |
pho | port-arm/58194: Resurrect vmt(4) from bitrot
On this architecture vmt(4) used to search for a node "/hypervisor" in the FDT and probed the VMware hypervisor call only when the node was found. However, things appear to have changed and VMware no longer provides the FDT node.
Since vmt(4) doesn't actually need to read anything from FDT, and the hypervisor call logically resides in virtual CPUs themselves, it would be better to attach it directly to cpu, just like how it's probed on x86.
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| 1.44 | 18-Feb-2024 |
andvar | Change KDB to KGDB, including "sys/kgdb.h", which were likely meant to be defined.
Also comment out kgdb_machdep.c in files.aarch64, it doesn't exist yet.
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| 1.43 | 20-Apr-2023 |
skrll | Provide a shared pmap_devmap implementation and convert all pmap_devmap arrays to use DEVMAP_ENTRY{,_END}
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| 1.42 | 05-Nov-2022 |
skrll | G/C
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| 1.41 | 03-Nov-2022 |
skrll | Provide MI PMAP support on AARCH64
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| 1.40 | 28-Oct-2022 |
skrll | MI PMAP EFI_RUNTIME support
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| 1.39 | 15-Oct-2022 |
jmcneill | Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings
Rename the following defines: - _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED - PMAP_DEV_SO to PMAP_DEV_NP - LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP Rename the following option: - AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED
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| 1.38 | 25-Jun-2022 |
jmcneill | Remove GIC_SPLFUNCS.
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| 1.37 | 31-Jan-2022 |
ryo | add support Hardware updates to Access flag and Dirty state (FEAT_HAFDBS)
- The DBM bit of the PTE is now used to determine if it is writable, and the AF bit is treated entirely as a reference bit. A valid PTE is always treated as readable. There can be no valid PTE that is not readable. - LX_BLKPAG_OS_{READ,WRITE} are used only for debugging purposes, and has been superseded by LX_BLKPAG_AF and LX_BLKPAG_DBM. - Improve comment
The need for reference/modify emulation has been eliminated, and access/permission faults have been reduced, however, there has been little change in overall performance.
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| 1.36 | 25-Nov-2021 |
ryo | add support COMPAT_LINUX32 for aarch64
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| 1.35 | 30-Oct-2021 |
jmcneill | Implement gic_splraise and the gic_splx fast path in asm (armv8).
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| 1.34 | 10-Oct-2021 |
skrll | Use sys/uvm/pmap/pmap_tlb.c on Aarch64 in the same way that some Arm, MIPS, and some PPC kernels do. This removes the limitation of 256 processes on CPUs with 8bit ASID field, e.g. Apple M1.
Additionally the following changes have been made
- removed a couple of unnecessary aarch64_tlbi_all calls - removed any invalidation after freeing page tables due to _pmap_sweep_pdp. This was never necessary afaict. - all kernel mappings are marked global and userland mapping not-global.
Performance testing hasn't show a significant difference. The data here is from building a kernel on an lx2k system with nvme.
before 1489.6u 400.4s 2:40.65 1176.5% 228+224k 0+32289io 57pf+0w 1482.6u 403.2s 2:38.49 1189.9% 228+222k 0+32274io 46pf+0w 1485.4u 402.2s 2:37.27 1200.2% 228+222k 0+32275io 12pf+0w
after 1493.9u 404.6s 2:37.50 1205.4% 227+221k 0+32265io 48pf+0w 1485.0u 408.0s 2:38.54 1194.0% 227+222k 0+32272io 36pf+0w 1484.3u 407.0s 2:35.88 1213.3% 228+224k 0+32268io 14pf+0w
>>> stats.ttest_ind([160.65,158.49,157.27], [157.5,158.54,155.88]) Ttest_indResult(statistic=1.1923622711296888, pvalue=0.2990182944606766) >>>
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| 1.33 | 23-Sep-2021 |
ryo | add support COMPAT_LINUX for aarch64
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| 1.32 | 06-Aug-2021 |
jmcneill | Arm: Add support for SMC Calling Convention
Arm DEN0028 defines a calling mechanism used with Secure Monitor Call (SMC) and Hypervisor Call (HVC) instructions. To discover SMCCC, we must:
1) Find the PSCI conduit (either via ACPI FADT, or Device Tree) 2) Use PSCI_VERSION to determine whether PSCI_FEATURES is supported 3) Call PSCI_FEATURES with SMCCC_VERSION to determine the implementation version.
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| 1.31 | 24-Jul-2021 |
jmcneill | aarch64: Remove empty source file and references to it.
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| 1.30 | 21-Oct-2020 |
christos | branches: 1.30.6; make process_machdep.c included always since it provides register i/o used by sys_process_getlwpstatus.c which is always included.
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| 1.29 | 20-Oct-2020 |
christos | harmonize process_machdep.c inclusion.
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| 1.28 | 29-Sep-2020 |
jmcneill | Collapse all CPU_CORTEXA<n> options into CPU_CORTEX and do runtime detection instead of ifdefs where required.
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| 1.27 | 12-Aug-2020 |
skrll | Part III of ad's performance improvements for aarch64
- Assembly language stubs for mutex_enter() and mutex_exit().
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| 1.26 | 25-Jul-2020 |
riastradh | Implement ChaCha with NEON on ARM.
XXX Needs performance measurement. XXX Needs adaptation to arm32 neon which has half the registers.
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| 1.25 | 17-Jul-2020 |
ryo | Add options PMAPBOOT_DEBUG to dump TTBR when pmapboot_enter(). Formerly DEBUG_MMU in locore.S, but there was a bit of confusion.
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| 1.24 | 29-Jun-2020 |
riastradh | New permutation-based AES implementation using ARM NEON.
Also derived from Mike Hamburg's public-domain vpaes code.
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| 1.23 | 29-Jun-2020 |
riastradh | Implement AES in kernel using ARMv8.0-AES on aarch64.
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| 1.22 | 18-Apr-2020 |
skrll | PMAP_DEBUG has been deleted on arm
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| 1.21 | 13-Apr-2020 |
maxv | Add KASAN-DMA support on aarch64, same as amd64. Discussed with skrll@.
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| 1.20 | 15-Feb-2020 |
skrll | branches: 1.20.4; Various updates and improvements to cpu start up on arm/aarch64
- start sharing more code around the AP startup messaging. - call arm_cpu_topology_set early so that ci_core_id is available for drivers, e.g. bcm2835_intr.c - both arm and aarch64 now have - a static cpu_info_store array - the same arm_cpu_{hatched,mbox}
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| 1.19 | 03-Feb-2020 |
ryo | add support pmap_pv(9)
Patch originally from jmcneill@. thanks
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| 1.18 | 21-Jan-2020 |
skrll | Small re-org. NFCI.
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| 1.17 | 15-Jan-2020 |
mrg | port the arm64 cpu topology setup for big.little to arm.
rename arm64 cpu_do_topology() to arm_cpu_do_topology() and call it from both arm cpu_attach().
replace both aarch64_set_topology() inline code in arm cpu_attach() with new arm_cpu_do_topology(), which is called by the arm64 locore as well (possibly not needed, which would allow it to become static.)
not yet tested on a real big.little armv7 system. tested on rockpro64 and pinebook pro.
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| 1.16 | 28-Dec-2019 |
jmcneill | branches: 1.16.2; Do not use Early Write Acknowledge for PCIe I/O and config space.
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| 1.15 | 27-Dec-2019 |
jmcneill | Enable early write acknowledge for device memory mappings.
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| 1.14 | 20-Nov-2019 |
pgoyette | Move all non-emulation-specific coredump code into the coredump module, and remove all #ifdef COREDUMP conditional compilation. Now, the coredump module is completely separated from the emulation modules, and they can all be independently loaded and unloaded.
Welcome to 9.99.18 !
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| 1.13 | 27-Jan-2019 |
pgoyette | branches: 1.13.4; Merge the [pgoyette-compat] branch
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| 1.12 | 05-Dec-2018 |
jmcneill | Add needs-flag to tprof_armv8.c
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| 1.11 | 05-Dec-2018 |
jmcneill | Split armv7/armv8 tprof backend config logic from the fdt bus glue.
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| 1.10 | 18-Nov-2018 |
skrll | Add CPU_THUNDERX which sets COHERENCY_UNIT and CACHE_LINE_SIZE to 128
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| 1.9 | 28-Oct-2018 |
jmcneill | Add support for EFI runtime services on aarch64.
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| 1.8 | 18-Oct-2018 |
skrll | Provide generic start code that assumes the MMU is off and caches are disabled as per the linux booting protocol for ARMv6 and ARMv7 boards. u-boot image type should be changed to 'linux' for correct behaviour.
The new start code builds a minimal "bootstrap" L1PT with cached access disabled and uses the same table for all processors. AP startup is performed in less steps and more code is written in C.
The bootstrap tables and stack are placed into an (orphaned) section "_init_memory" which is given to uvm when it is no longer used.
Various kernels have been converted to use this code and tested. Some boards were provided by TNF. Thanks!
The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS kernels. The GENERIC kernel will also work on RPI2 using u-boot.
Thanks to martin@ and aymeric@ for testing on parallella and nanosoc respectively
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| 1.7 | 12-Oct-2018 |
ryo | add initial support of COMPAT_NETBSD32 on AArch64. arm ELF32 EABI binaries could be execute in AArch32 state on AArch64. A32 THUMB mode is not supported yet.
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| 1.6 | 06-Oct-2018 |
skrll | Whitespace
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| 1.5 | 04-Oct-2018 |
ryo | cleanup locore, and changed the way to map memories during boot. - add functions bootpage_enter() and bootpage_alloc() to adapt various layout of physical memory map. especially for 64bit physical memory layout. pmapboot_alloc() allocates pagetable pages from _end[]. - changed to map only the required amount for PA=VA identity mapping (kernel image, UART device, and FDT blob) with L2_BLOCK(2Mbyte). - changing page permission for kernel image, and making KSEG mapping are done at cpu_kernel_vm_init() instead of at locore. - optimize PTE entries with PTE Contiguous bit. it is enabled on devmap only for now.
reviewed by skrll@, thanks.
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| 1.4 | 21-Sep-2018 |
jakllsch | catch up to files.arm's recent "opt_console.h" changes
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| 1.3 | 01-Apr-2018 |
ryo | branches: 1.3.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)
- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
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| 1.2 | 16-Aug-2017 |
nisimura | branches: 1.2.2; retire copyinout.S and fusu.S
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| 1.1 | 10-Aug-2014 |
matt | branches: 1.1.4; 1.1.6; Preliminary files for AARCH64 (64-bit ARM) support. Enough for a distribution build.
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| 1.1.6.1 | 28-Aug-2017 |
skrll | Sync with HEAD
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| 1.1.4.3 | 03-Dec-2017 |
jdolecek | update from HEAD
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| 1.1.4.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
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| 1.1.4.1 | 10-Aug-2014 |
tls | file files.aarch64 was added on branch tls-maxphys on 2014-08-20 00:02:39 +0000
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| 1.2.2.6 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
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| 1.2.2.5 | 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
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| 1.2.2.4 | 20-Oct-2018 |
pgoyette | Sync with head
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| 1.2.2.3 | 02-Oct-2018 |
pgoyette | Use a hook callback to allow sparc fpu code to determine if a process is running under sunos emulation (in which case, fpu cleanup uses a different set of fpu_codes[]).
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| 1.2.2.2 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
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| 1.2.2.1 | 07-Apr-2018 |
pgoyette | Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
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| 1.3.2.3 | 21-Apr-2020 |
martin | Sync with HEAD
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| 1.3.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
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| 1.3.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
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| 1.13.4.1 | 29-Dec-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #586):
sys/arch/arm/nvidia/tegra_pcie.c: revision 1.27 sys/arch/aarch64/aarch64/pmap.c: revision 1.57 sys/arch/aarch64/aarch64/locore.S: revision 1.48 sys/arch/aarch64/include/armreg.h: revision 1.29 sys/arch/aarch64/aarch64/pmap.c: revision 1.58 sys/arch/aarch64/aarch64/locore.S: revision 1.49 sys/arch/arm/acpi/acpipchb.c: revision 1.14 sys/arch/aarch64/aarch64/genassym.cf: revision 1.16 sys/arch/arm/acpi/acpi_machdep.c: revision 1.13 sys/arch/aarch64/include/pmap.h: revision 1.27 sys/arch/aarch64/aarch64/genassym.cf: revision 1.17 sys/arch/aarch64/include/pmap.h: revision 1.28 sys/arch/arm/fdt/pcihost_fdtvar.h: revision 1.3 sys/arch/arm/include/bus_defs.h: revision 1.14 sys/arch/aarch64/aarch64/bus_space.c: revision 1.9 sys/arch/arm/fdt/pcihost_fdt.c: revision 1.12 sys/arch/aarch64/conf/files.aarch64: revision 1.15 sys/arch/aarch64/conf/files.aarch64: revision 1.16 sys/arch/arm/rockchip/rk3399_pcie.c: revision 1.9
Enable early write acknowledge for device memory mappings.
Do not use Early Write Acknowledge for PCIe I/O and config space.
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| 1.16.2.3 | 29-Feb-2020 |
ad | Sync with head.
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| 1.16.2.2 | 25-Jan-2020 |
ad | Sync with head.
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| 1.16.2.1 | 17-Jan-2020 |
ad | Sync with head.
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| 1.20.4.1 | 20-Apr-2020 |
bouyer | Sync with HEAD
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| 1.30.6.1 | 01-Aug-2021 |
thorpej | Sync with HEAD.
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| 1.12 | 10-Feb-2021 |
ryo | add support kernel profiling on aarch64
- add MCOUNT_ENTER, MCOUNT_EXIT macro - __mcount() function should be aligned - add "-fno-optimize-sibling-calls" option when PROF. for accurate profiling, it is better to suppress the tail call.
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| 1.11 | 01-Nov-2018 |
maxv | branches: 1.11.12; Add kASan support for aarch64. Stack tracking needs more investigation and will come in a separate commit.
Reviewed by ryo@ jmcneill@ skrll@.
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| 1.10 | 07-Oct-2018 |
skrll | Don't use a magic number for COHERENCY_UNIT use COHERENCY_UNIT
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| 1.9 | 10-Sep-2018 |
maxv | reduce the battlefield
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| 1.8 | 30-Aug-2018 |
maxv | style, no functional change
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| 1.7 | 06-Aug-2018 |
ryo | set kernel rodata/data non-executable. set rodata section on 2Mbytes aligned. (kernel image is mapped with 2Mbytes L2 block)
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| 1.6 | 03-Aug-2018 |
ryo | set kernel text/rodata readonly when not defined DDB. set readonly segment on 2Mbytes aligned. (kernel image is mapped with 2Mbytes L2 block)
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| 1.5 | 01-Apr-2018 |
ryo | branches: 1.5.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)
- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
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| 1.4 | 16-Aug-2017 |
nisimura | branches: 1.4.2; add more sence. now compilable
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| 1.3 | 24-Aug-2015 |
uebayasi | Don't mention stab and DWARF sections, because these (poorly mtaintained) lists only help to make them harder to read.
If those sections are found in inputs, they simply appear in outputs as orphaned sections, sorted by section types and attributes.
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| 1.2 | 20-Aug-2015 |
uebayasi | Indent with 2 spaces.
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| 1.1 | 10-Aug-2014 |
matt | branches: 1.1.4; 1.1.6; Preliminary files for AARCH64 (64-bit ARM) support. Enough for a distribution build.
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| 1.1.6.2 | 28-Aug-2017 |
skrll | Sync with HEAD
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| 1.1.6.1 | 22-Sep-2015 |
skrll | Sync with HEAD
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| 1.1.4.3 | 03-Dec-2017 |
jdolecek | update from HEAD
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| 1.1.4.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
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| 1.1.4.1 | 10-Aug-2014 |
tls | file kern.ldscript was added on branch tls-maxphys on 2014-08-20 00:02:39 +0000
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| 1.4.2.5 | 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
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| 1.4.2.4 | 20-Oct-2018 |
pgoyette | Sync with head
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| 1.4.2.3 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
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| 1.4.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
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| 1.4.2.1 | 07-Apr-2018 |
pgoyette | Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
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| 1.5.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
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| 1.11.12.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
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| 1.7 | 29-Jun-2021 |
nia | Remove uscanner(4) driver
This exists for compatibility with a Linux interface which was apparently deprecated in Linux 2.6. There are various mailing list threads going back to 2004 where the usefulness of this driver is discussed, but the conclusion is that scanner software has all moved to using ugen(4) instead, and enabling this driver will not help you scan things.
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| 1.6 | 04-Apr-2020 |
jdolecek | branches: 1.6.8; mark nsmb major obsolete
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| 1.5 | 29-Jan-2020 |
maya | remove urio(4), a driver for the Rio500 MP3 player.
At this point it is highly unlikely this 1999 device still has users, but it still comes up in the context of maxv's USB-fuzzing (and any device could pretend to be a urio(4)), so it's best to get rid of it.
Renamed all major entries to obsolete, as was done in previous removals.
This still requires an update to sanitizers, but they're located in "external", perhaps it should be first committed upstream?
Proposed on tech-kern a month ago.
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| 1.4 | 28-Jan-2019 |
dholland | branches: 1.4.6; Systematize handling of removed drivers.
- Every driver that was removed and whose number hasn't already been reused is now listed with a commented-out "obsolete" line. - The format of these has been systematized. Future format changes can probably be safely done with a script. - This does not include a few cases of assignments that only lasted a couple days, or stuff from before major reorgs. Some of these may be included nonetheless, because there was a lot of ground to cover and therefore not a lot of time to dig into history in detail.
Note that the obsolete listings do not mean the major numbers can never be reused; that's up to portmasters and/or core. It does mean that they won't be reused by accident, however, which in some cases (depending on the driver, how widely used it was, its family of device nodes, their default permissions, etc.) can be quite dangerous.
Note that some of the things now explicitly listed as obsolete are really ancient history. My scan went back as far as when the majors files were added. (But not before that.)
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| 1.3 | 23-Sep-2018 |
maxv | Remove ISDN from the kernel. It has remained unmaintained for a long time, is of poor quality, and is now an obstacle to MP-ification. It was removed ten years ago from FreeBSD for the same reason.
This retires a big user of the mbuf API, and will ease maintenance of the kernel.
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| 1.2 | 23-Apr-2015 |
pgoyette | branches: 1.2.16; 1.2.18; Update device dependency information - the sysmon major device now depends on the sysmon module itself, not on the individual components.
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| 1.1 | 10-Aug-2014 |
matt | branches: 1.1.4; 1.1.6; Preliminary files for AARCH64 (64-bit ARM) support. Enough for a distribution build.
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| 1.1.6.1 | 06-Jun-2015 |
skrll | Sync with HEAD
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| 1.1.4.3 | 03-Dec-2017 |
jdolecek | update from HEAD
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| 1.1.4.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
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| 1.1.4.1 | 10-Aug-2014 |
tls | file majors.aarch64 was added on branch tls-maxphys on 2014-08-20 00:02:39 +0000
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| 1.2.18.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
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| 1.2.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
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| 1.2.16.1 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
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| 1.4.6.1 | 29-Feb-2020 |
ad | Sync with head.
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| 1.6.8.1 | 01-Aug-2021 |
thorpej | Sync with HEAD.
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| 1.3 | 01-Apr-2018 |
ryo | Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)
- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
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| 1.2 | 07-May-2015 |
mrg | branches: 1.2.16; bump CHILD_MAX and OPEN_MAX defaults on several platforms, both to 1024.
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| 1.1 | 10-Aug-2014 |
matt | branches: 1.1.2; 1.1.4; 1.1.6; Preliminary files for AARCH64 (64-bit ARM) support. Enough for a distribution build.
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| 1.1.6.1 | 06-Jun-2015 |
skrll | Sync with HEAD
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| 1.1.4.3 | 03-Dec-2017 |
jdolecek | update from HEAD
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| 1.1.4.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
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| 1.1.4.1 | 10-Aug-2014 |
tls | file std.aarch64 was added on branch tls-maxphys on 2014-08-20 00:02:39 +0000
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| 1.1.2.1 | 09-May-2015 |
snj | Pull up following revision(s) (requested by mrg in ticket #741): sys/arch/aarch64/conf/std.aarch64: revision 1.2 sys/arch/amd64/conf/std.amd64: revision 1.10 sys/arch/evbarm/conf/std.evbarm: revision 1.4 sys/arch/evbarm64/conf/std.evbarm64: revision 1.2 sys/arch/i386/conf/std.i386: revision 1.34 sys/arch/sparc64/conf/std.sparc64: revision 1.19 bump CHILD_MAX and OPEN_MAX defaults on several platforms, both to 1024.
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| 1.2.16.1 | 07-Apr-2018 |
pgoyette | Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
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