Merge thorpej-cfargs2.

branches: 1.18.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.17.32;
If ALGOR_P6032 is not defined, set sc_bonito to NULL instead of using
random garbage off the stack. PR 51012 from David Binderman.

#include <mips/cpuregs.h>

branches: 1.15.14;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.

branches: 1.14.2; 1.14.12;
Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

#include <sys/bus.h> instead of <machine/bus.h>.

PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

branches: 1.11.22; 1.11.28;
Remove clause 3 and 4 from TNF licenses

branches: 1.10.74; 1.10.76; 1.10.78;
merge ktrace-lwp.

Phase out the use of a string as first "attach args" member to control
which bustype should be attached with a specific call to config_found()
(from a "mainbus" or a bus bridge).
Do it for isa/eisa/mca and pci/agp for now. These buses all attach to
an mi interface attribute "isabus", "eisabus" etc., and the autoconf
framework now allows to specify an interface attribute on config_found()
and config_search(), which limits the search of matching config data
to these which attach to that specific attribute.
So we basically have to call config_found_ia(..., "foobus", ...) where
such a bus is attached.
As a consequence, where a "mainbus" or alike also attaches other
devices (eg CPUs) which do not attach to a specific attribute yet,
we need at least pass an attribute name (different from "foobus") so
that the foo bus is not found at these places. This made some minor
changes necessary which are not obviously related to the mentioned buses.

add __KERNEL_RCSID()

branches: 1.7.2;
Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.

Use aprint_normal() for cfprint() routines.

Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

* Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.

branches: 1.1.2; 1.1.8; 1.1.16;
Print more BONITO rev. info.

Clean up initialization of com_regs structure, in preparation for
some additional changers.

branches: 1.14.52; 1.14.54;
Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

#include <sys/bus.h> instead of <machine/bus.h>.

- Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.

Remove clause 3 and 4 from TNF licenses

branches: 1.10.2; 1.10.4;
Split device_t and softc for all com(4) devices (well, everything that
uses a com_softc backend). Use proper types and ansify where appropriate.

Use pmf_device_register1() instead of shutdownhook_establish() to
register com_cleanup() as the shutdown hook.

Add a generic suspend routine. Suspend and resume com@isa.

Protect against dereferencing a NULL softc in comioctl().

Destroy both a mutex and a callout in com_detach().

Cosmetic: use aprint_*_dev(). Use PMF_FN_ARGS, PMF_FN_PROTO.

branches: 1.8.34; 1.8.54; 1.8.58;
Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.

Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.

This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.

Approved by core@. Fixes PR port-evbmips/32362.

branches: 1.7.22; 1.7.36; 1.7.40; 1.7.48;
Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver. The cfdriver is then looked
up in a list which is built at run-time.

branches: 1.3.2; 1.3.8;
Yet more interrupt cleanup -- the platform mater interrupt establish
function now just takes an "irq", which is an index into the irqmap
table for that platform.

Rewrite the interrupt handling code:
- Compute the number of CPU pipeline cycles per second using the
mc146818.
- Use the COMPARE interrupt for the hardclock interrupt.
- Collapse all interrupt priorities into a single priority, and use
the CPU interrupt inputs to determine the interrupt source (local
device, PCI device, ISA device, etc.)

This allows us to have interrupt sharing.

Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".

Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

#include <sys/bus.h> instead of <machine/bus.h>.

- Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.

Remove clause 3 and 4 from TNF licenses

branches: 1.8.2; 1.8.4;
Split the softc from the device_t for all lpt(4) variants and attachments
except the ppbus stuff (which doesn't compile) and ulpt(4) which is
unrelated and can be dealt with separately.

As usual, it comes with related cosmetic changes.

branches: 1.7.22; 1.7.84; 1.7.104; 1.7.108;
Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver. The cfdriver is then looked
up in a list which is built at run-time.

branches: 1.3.2; 1.3.8;
Yet more interrupt cleanup -- the platform mater interrupt establish
function now just takes an "irq", which is an index into the irqmap
table for that platform.

Rewrite the interrupt handling code:
- Compute the number of CPU pipeline cycles per second using the
mc146818.
- Use the COMPARE interrupt for the hardclock interrupt.
- Collapse all interrupt priorities into a single priority, and use
the CPU interrupt inputs to determine the interrupt source (local
device, PCI device, ISA device, etc.)

This allows us to have interrupt sharing.

Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".

Remove unnecessary <sys/malloc.h>.

Merge thorpej-cfargs2.

branches: 1.29.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.28.4;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

branches: 1.25.2; 1.25.6;
Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

Major update of algor.
Now uses generic mips bus_space.h bus_dma.h isa_machdep.h pci_machdep.h
Now uses evbmips versions of cpu.c isadma_bounce.c mcclock_isa.c

#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t, struct cfdata * -> cfdata_t
CFATTACH_DECL(*, sizeof(struct device), -> CFATTACH_DECL_NEW(&, 0

branches: 1.21.2;
Merge forward from matt-nb5-mips64.
Adapt to new interrupt/spl framework.

branches: 1.20.18; 1.20.22; 1.20.28; 1.20.30;
Remove clause 3 and 4 from TNF licenses

branches: 1.19.74; 1.19.76; 1.19.78;
merge ktrace-lwp.

s/locdesc_t/int/g

branches: 1.17.2;
adaptions to config_search() change, and minor autoconf fixes, mostly from Havard Eidnes

kill questionable uses of config(8) generated xxxlocnames[]
locator information does belong elsewhere and definitely shouldn't
be in the global namespace

convert remaining autoconf bus "submatch" functions to use the new
signature (passing locators), and remove some which obviously don't
serve any purpose
(untested, sorry)

add __KERNEL_RCSID()

branches: 1.13.2;
Use aprint_normal() for cfprint() routines.

Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.

Fix a typo.

Add a "cacheline_size" argument to pci_configure_bus(). It is used
to set the cacheline size in the BHLC register. This should be the
size of the largest D-cache line on a system.

branches: 1.6.2;
Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.

branches: 1.5.2;
Fix a tyop in a comment.

If PCI_NETBSD_ENABLE_IDE is set, enable the PIIX{3,4} southbridge
IDE channels on the P-5064 and P-6032, since PMON doesn't do it
for us (thus causing the `pciide' driver to ignore them).

branches: 1.3.2;
Check in work-in-progress of P-6032 support. This is not tested,
but is meant for back-up purposes.

Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".

A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.

Update algor clock handling. This includes using the common mc146818
support code, using the common MIPS 3 cp0 based interrupt code, adding
time counters, and using the generic TODR code.

Unfortunately, due to lack of hardware, I don't know for sure that any
of this works, though the same code in evbmips works. Commiting anyway,
ok'd by simon@.

branches: 1.2.8; 1.2.40; 1.2.54; 1.2.58;
Rewrite the interrupt handling code:
- Compute the number of CPU pipeline cycles per second using the
mc146818.
- Use the COMPARE interrupt for the hardclock interrupt.
- Collapse all interrupt priorities into a single priority, and use
the CPU interrupt inputs to determine the interrupt source (local
device, PCI device, ISA device, etc.)

This allows us to have interrupt sharing.

A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.

Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

#include <sys/bus.h> instead of <machine/bus.h>.

Don't forget to initialize sc_dev.

Split device_t and softc for MI mc146818 clock,
and other related misc cosmetics.

branches: 1.8.6;
Move todr_attach(9) calls from each MD attachment to MI mc146818_attach().

Fix botch on MI todr(9) migration of algor on September 2006:
- year0 should be 1980, not 80
- put a newline after MI mc146818_attach()
- call todr_attach(9)

branches: 1.6.6; 1.6.22; 1.6.32; 1.6.38; 1.6.46;
Update algor clock handling. This includes using the common mc146818
support code, using the common MIPS 3 cp0 based interrupt code, adding
time counters, and using the generic TODR code.

Unfortunately, due to lack of hardware, I don't know for sure that any
of this works, though the same code in evbmips works. Commiting anyway,
ok'd by simon@.

branches: 1.5.22; 1.5.36; 1.5.40;
Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver. The cfdriver is then looked
up in a list which is built at run-time.

branches: 1.1.2; 1.1.8;
Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".

Update algor clock handling. This includes using the common mc146818
support code, using the common MIPS 3 cp0 based interrupt code, adding
time counters, and using the generic TODR code.

Unfortunately, due to lack of hardware, I don't know for sure that any
of this works, though the same code in evbmips works. Commiting anyway,
ok'd by simon@.

branches: 1.1.8; 1.1.40; 1.1.54; 1.1.58;
A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.

Merge thorpej-cfargs2.

branches: 1.20.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.19.52;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.

branches: 1.18.2; 1.18.12;
Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

#include <sys/bus.h> instead of <machine/bus.h>.

PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

branches: 1.15.22; 1.15.28;
Remove clause 3 and 4 from TNF licenses

branches: 1.14.74; 1.14.76; 1.14.78;
merge ktrace-lwp.

Phase out the use of a string as first "attach args" member to control
which bustype should be attached with a specific call to config_found()
(from a "mainbus" or a bus bridge).
Do it for isa/eisa/mca and pci/agp for now. These buses all attach to
an mi interface attribute "isabus", "eisabus" etc., and the autoconf
framework now allows to specify an interface attribute on config_found()
and config_search(), which limits the search of matching config data
to these which attach to that specific attribute.
So we basically have to call config_found_ia(..., "foobus", ...) where
such a bus is attached.
As a consequence, where a "mainbus" or alike also attaches other
devices (eg CPUs) which do not attach to a specific attribute yet,
we need at least pass an attribute name (different from "foobus") so
that the foo bus is not found at these places. This made some minor
changes necessary which are not obviously related to the mentioned buses.

add __KERNEL_RCSID()

branches: 1.11.2;
Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.

Use aprint_normal() for cfprint() routines.

Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

* Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.

branches: 1.5.2; 1.5.8; 1.5.16;
A P-6032 will never have a V3 PBC -- don't include its option header.

When the old PCI address map is in use, disable I/O space. Also disable
I/O space on PBC revs < B2.

Read the PCI memory space base and the PCI DMA window base from the
V3 PBC, and use them in the bus mem tag and the bus dma tag on the
P-4032. This allows us to get much further when PMON has configured
the PBC using the old-style PCI address map.

Correct for a data structure change.

A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.