Cross Reference: /src/sys/arch/algor/pci/vtpbcvar.h

History log of /src/sys/arch/algor/pci/vtpbcvar.h
Revision	Date	Author	Comments
1.4	28-Apr-2008	martin	Remove clause 3 and 4 from TNF licenses
1.3	14-Jun-2001	thorpej	branches: 1.3.8; 1.3.126; 1.3.128; 1.3.130; When the old PCI address map is in use, disable I/O space. Also disable I/O space on PBC revs < B2.
1.2	14-Jun-2001	thorpej	Read the PCI memory space base and the PCI DMA window base from the V3 PBC, and use them in the bus mem tag and the bus dma tag on the P-4032. This allows us to get much further when PMON has configured the PBC using the old-style PCI address map.
1.1	28-May-2001	thorpej	A port to the Algorithmics MIPS evaluation boards. We currently support the P-5064, which has a QED RM5xxx CPU soldered on. There is some skeletal support for the P-4032 (an older board, which had an R4xxx CPU). There are some placeholders for the P-6032, which is their newest board, but no real code yet (the P-6032 has a different PCI controller, the Algorithmics BONITO). There are still some (apprently softintr-related) problems with the algor kernel, but it works well-enough to self-host. Kudos to Allegro Networks for loaning me a P-5064 board on which to do the port.
1.3.130.1	16-May-2008	yamt	sync with head.
1.3.128.1	18-May-2008	yamt	sync with head.
1.3.126.1	02-Jun-2008	mjf	Sync with HEAD.
1.3.8.2	14-Jun-2001	thorpej	When the old PCI address map is in use, disable I/O space. Also disable I/O space on PBC revs < B2.
1.3.8.1	14-Jun-2001	thorpej	file vtpbcvar.h was added on branch nathanw_sa on 2001-06-14 18:52:28 +0000

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