| History log of /src/sys/arch/alpha/include/pci_machdep.h |
| Revision | | Date | Author | Comments |
| 1.25 |
| 09-Mar-2025 |
thorpej | Re-factor the boot device and consinit routines into common functions
per platform type (PCI vs TC), eliminating a bunch of copy-pasta.
|
| 1.24 |
| 04-Jul-2021 |
thorpej | branches: 1.24.16;
Reduce code duplication when setting up the interrupt handler data
structures:
- alpha_shared_intr_alloc() no longer takes a "string length" argument,
and just uses kmem_asprintf() to create an "irq %u" string by default.
This is suitable for nearly every caller.
- Add a alpha_shared_intr_set_string() that allows callers to override
the default IRQ description string.
- Related: make alpha_shared_intr_string() return a const char *, since
no callers should need to modify the string directly now.
- Re-factor PCI shared interrupt structure allocation / initialization
into a new alpha_pci_intr_alloc(), which is suitable for nearly every
Alpha PCI platform. Callers are expected to first have initialized
the interrupt hardware to the quiescent state.
Adjust various call sites of above functions to account for changes,
even if they are not able to use the newly re-factored code.
|
| 1.23 |
| 19-Jun-2021 |
thorpej | Don't use a bunch of switch() statements in the core logic drivers to select
the PCI interrupt initialization routine. Instead, register said routines
by systype in a link set, and look them up and invoke them in a new function
alpha_pci_intr_init().
|
| 1.22 |
| 27-May-2021 |
thorpej | The Tsunami / Typhoon chipsets have a static "monster window" for DMA
that allows for up to 32GB of RAM to be direct-mapped if the PCI device
can issue a 64-bit address (the monster window lives at 0x10000000000).
Enable this window and provide this to the PCI bus as a "dmat64".
|
| 1.21 |
| 26-Sep-2020 |
thorpej | branches: 1.21.6; 1.21.8;
Implement cpu_intr_redistribute() for Tusnami/Titan systems.
|
| 1.20 |
| 26-Sep-2020 |
thorpej | Add support for CPU interrupt affinity for PCI interrupts:
- Keep a bitmap of eligible interrupt-handling CPUs in the pci_chipset_tag_t.
If this bitmap is 0, then we assume that all PCI interrupts should be
routed to the primary CPU.
- Add an optional PCI chipset callback for setting the CPU affinity of
an interrupt.
- When an establishing an interrupt handler, select the CPU that will
handle this irq using the following algorithm:
==> If the irq already has a CPU assignment, keep it.
==> Otherwise, find the CPU with the fewest registered handlers that
is eligible from both a hardware (based on the pci_chipset_tag_t)
and software (based on cpu_info::ci_schedstate.spc_flags) perspectives.
==> Fall back to the primary CPU failing all else.
|
| 1.19 |
| 22-Sep-2020 |
thorpej | Changes to make MPSAFE interrupts work on Alpha:
- Remove the ipl argument to scb_set() and the associated array of
"mpsafe" booleans initialized based on the ipl. It was bogus
anyway; all IPL_{BIO,NET,TTY}, etc. values are aliases of IPL_VM,
and for all practical purposes, there is really only one device
interrrupt level on Alpha anyway. Intead, we now treat all dispatches
from the SCB vector table as MP-safe, and it is now the handler for
that vector who is responsible for acquiring the KERNEL_LOCK if needed.
- Update the direct interrupt vector handlers in jensenio and TURBOchannel
to acquire the KERNEL_LOCK.
- Introduce a new ALPHA_INTR_MPSAFE flag, and add a flags argument to
alpha_shared_intr_establish(). When it is set, indicate that the
handler is MP-safe. Update alpha_shared_intr_dispatch() to pay
attention and acquire the KERNEL_LOCK (or not) as indicated.
- Re-factor all of the PCI interrupt handling, providing "generic PCI"
"PCI interrupts through ISA IRQs" implementations to significantly
reduce code duplication. Supplement the PCI chipset tag with more
info to facilitate this, and make the PCI interrupt-related routines
take a pci_chipset_tag_t argument rather than a void * argument.
- Because PCI interrupts on KN8AE are dispatched directly from the
SCB, provide a wrapper for non-MPSAFE interrupt handlers that
acquires the KERNEL_LOCK.
- Change the pci_intr_handle_t type to be a struct rather than an
integer type in order to catch any direct use of it as a value.
Add a set of functions to interact with pci_intr_handle_t, including
setting interrupt flags.
- Implement pci_intr_setattr() so that the PCI_INTR_MPSAFE attribute
can be set on a pci_intr_handle_t.
- While I'm here, make all of the MI PCI back-end operations call
through real functions rather than hopping directly through function
pointers in the chipset tag.
This change looks a lot bigger than it really is because of the re-factor
in the plethora of model-specific PCI interrupt back-ends. The KN8AE,
KN300, and T2/T3/T4 (Sable) are largely un-changed.
|
| 1.18 |
| 29-Mar-2014 |
christos | make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.
|
| 1.17 |
| 21-Mar-2014 |
christos | gc sprintf; reduce local static usage of interrupt strings that are only
used once for autoconf printing.
|
| 1.16 |
| 20-Jan-2014 |
tsutsui | Check and set "is_console" property to PCI displays for framebuffer drivers.
Tested on DS15 with radeonfb(4) and XP1000 with vga(4)
by Naruaki Etomi in PR/48431.
|
| 1.15 |
| 06-Feb-2012 |
matt | branches: 1.15.6; 1.15.10;
Do a minor cleanup of alpha (this will make applying pullups post branching
easier).
u_int{8,16,32,64}_t -> uint{*}_t
Change all old-style definitions to C89 prototypes.
Whitespace cleanup.
Constification in db_disasm.c
|
| 1.14 |
| 14-Jun-2011 |
matt | branches: 1.14.2; 1.14.6;
struct device * -> device_t
|
| 1.13 |
| 04-Apr-2011 |
dyoung | branches: 1.13.2;
Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.
For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:
Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.
siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.
slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.
viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.
While I'm here, make pci_mapreg_submap() static.
With these changes in place, I have tested the compilation of these
kernels:
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:
### evbmips-el GDIUM
nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop
### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'
### ia64 GENERIC
/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type
### sgimips GENERIC32_IP3x
crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
|
| 1.12 |
| 11-Dec-2005 |
christos | branches: 1.12.100; 1.12.106;
merge ktrace-lwp.
|
| 1.11 |
| 29-Jul-2004 |
drochner | remove now unnecessary "pci_enumerate_bus" definitions
|
| 1.10 |
| 15-May-2002 |
thorpej | branches: 1.10.10;
Let machine-dependent code specify how to enumerate the bus.
Currently, everyone uses pci_enumerate_bus_generic().
|
| 1.9 |
| 15-May-2002 |
thorpej | (*pc_decompose_tag)() is no longer alpha specific. Move it as appropriate.
|
| 1.8 |
| 15-May-2002 |
thorpej | Rename alpha_pci_decompose_tag() to pci_decompose_tag(). There *is*
some MI PCI code that uses it, and soon there will be more. (The rationale
for not making it available previously was that it could be mis-used, but
that's true of a lot of things.)
|
| 1.7 |
| 08-Jun-2001 |
simonb | branches: 1.7.2; 1.7.4;
For ports that wire up pciide in compatibility mode, have
them define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
in pci_machdep.h and pciide_map_compat_intr() only calls
pciide_machdep_compat_intr_establish() if that preprocessor
define exists.
Ports that don't need to do this no longer need to supply a
dummy function.
|
| 1.6 |
| 28-Dec-2000 |
sommerfeld | branches: 1.6.2;
Change pci_intr_map to get interrupt source information from a "struct
pci_attach_args *" instead of from four separate parameters which in
all cases were extracted from the same "struct pci_attach_args".
This both simplifies the driver api, and allows for alternate PCI
interrupt mapping schemes, such as one using the tables described in
the Intel Multiprocessor Spec which describe interrupt wirings for
devices behind pci-pci bridges based on the device's location rather
the bridge's location.
Tested on alpha and i386; welcome to 1.5Q
|
| 1.5 |
| 04-Jun-2000 |
cgd | Implement the more flexiable `evcnt' interface as discussed (briefly) on
tech-kern and now documented in evcnt(9).
|
| 1.4 |
| 01-Jun-2000 |
cgd | kill __P in these files. (I had to look at them anyway with an eye for
adding some protos... and adding them with __P seems wrong, but mixing
__P and not __P in the same file seems wrong too, so...)
|
| 1.3 |
| 19-Mar-1999 |
cgd | branches: 1.3.8; 1.3.16;
move pci/pci_machdep.h to include/pci_machdep.h. (can't do it via
repository copy because alpha already had an include/pci_machdep.h in
the attic.)
|
| 1.2 |
| 12-Apr-1996 |
cgd | this file is no longer used
|
| 1.1 |
| 23-Nov-1995 |
cgd | wholesale update from my NetBSD/Alpha source tree. Includes:
Support for AXPpci CPUs,
Support for AlphaStation 600 CPUs,
new boot block structure, which requires an 'installboot'
program and works a lot like the NetBSD/sparc boot blocks.
|
| 1.3.16.1 |
| 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.3.8.2 |
| 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.3.8.1 |
| 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.6.2.1 |
| 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.7.4.2 |
| 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.7.4.1 |
| 08-Jun-2001 |
nathanw | file pci_machdep.h was added on branch nathanw_sa on 2002-06-20 03:37:38 +0000
|
| 1.7.2.1 |
| 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.10.10.3 |
| 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.10.10.2 |
| 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.10.10.1 |
| 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.12.106.1 |
| 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.12.100.1 |
| 21-Apr-2011 |
rmind | sync with head
|
| 1.13.2.1 |
| 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.14.6.1 |
| 18-Feb-2012 |
mrg | merge to -current.
|
| 1.14.2.2 |
| 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.14.2.1 |
| 17-Apr-2012 |
yamt | sync with head
|
| 1.15.10.1 |
| 18-May-2014 |
rmind | sync with head
|
| 1.15.6.1 |
| 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.21.8.1 |
| 31-May-2021 |
cjep | sync with head
|
| 1.21.6.2 |
| 01-Aug-2021 |
thorpej | Sync with HEAD.
|
| 1.21.6.1 |
| 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.24.16.1 |
| 02-Aug-2025 |
perseant | Sync with HEAD
|
