| History log of /src/sys/arch/alpha/pci/cia_bwx_bus_io.c |
| Revision | | Date | Author | Comments |
| 1.7 |
| 04-Dec-2023 |
thorpej | Convert the Alpha port's bus_space back-end to manage address space
with vmem(9) arenas (using statically-allocated private boundary tags
for very early-in-boot) rather than extent(9).
As a side-effect, there's arguments to some initialization functions
that are no longer required, so garbage-collect those, update all the
call sites.
|
| 1.6 |
| 04-Jul-2021 |
thorpej | Remove unnecessary #include <sys/malloc.h>
|
| 1.5 |
| 01-Jul-2011 |
dyoung | branches: 1.5.70;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.4 |
| 15-Dec-2010 |
matt | Remove unneeded includes of <uvm/uvm_extern.h>
|
| 1.3 |
| 29-Jun-2000 |
mrg | branches: 1.3.152;
remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.2 |
| 02-Dec-1999 |
thorpej | CIA core logic with BWX enabled appears on both EV56 and PCA56. We
require at least EV56 for the assembler to emit BWX opcodes, so set
the arch to "ev56".
|
| 1.1 |
| 04-Jun-1998 |
thorpej | branches: 1.1.14; 1.1.20;
Add support for using BWX for PCI config space and PCI i/o and mem space
on the ALCOR2 and Pyxis. BWX is enabled iff:
- It hasn't been disabled by the user (patch `cia_use_bwx' or build cia.o
with the option "CIA_USE_BWX=0"),
- it's enabled in CIA_CSR_CNFG,
- we are running on an EV5-family processor,
- BWX is in the processor's capabilities mask.
|
| 1.1.20.1 |
| 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.1.14.1 |
| 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.3.152.1 |
| 05-Mar-2011 |
rmind | sync with head
|
| 1.5.70.1 |
| 01-Aug-2021 |
thorpej | Sync with HEAD.
|
