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History log of /src/sys/arch/alpha/pci/siovar.h
RevisionDateAuthorComments
 1.14  25-Jun-2021  thorpej Reduce code duplication among platforms that use the i82378 SIO to
route PCI interrupts to the ISA PIC by refactoring it into a new
sio_pirq_intr_map() function.
 1.13  22-Sep-2020  thorpej branches: 1.13.6;
Changes to make MPSAFE interrupts work on Alpha:

- Remove the ipl argument to scb_set() and the associated array of
"mpsafe" booleans initialized based on the ipl. It was bogus
anyway; all IPL_{BIO,NET,TTY}, etc. values are aliases of IPL_VM,
and for all practical purposes, there is really only one device
interrrupt level on Alpha anyway. Intead, we now treat all dispatches
from the SCB vector table as MP-safe, and it is now the handler for
that vector who is responsible for acquiring the KERNEL_LOCK if needed.

- Update the direct interrupt vector handlers in jensenio and TURBOchannel
to acquire the KERNEL_LOCK.

- Introduce a new ALPHA_INTR_MPSAFE flag, and add a flags argument to
alpha_shared_intr_establish(). When it is set, indicate that the
handler is MP-safe. Update alpha_shared_intr_dispatch() to pay
attention and acquire the KERNEL_LOCK (or not) as indicated.

- Re-factor all of the PCI interrupt handling, providing "generic PCI"
"PCI interrupts through ISA IRQs" implementations to significantly
reduce code duplication. Supplement the PCI chipset tag with more
info to facilitate this, and make the PCI interrupt-related routines
take a pci_chipset_tag_t argument rather than a void * argument.

- Because PCI interrupts on KN8AE are dispatched directly from the
SCB, provide a wrapper for non-MPSAFE interrupt handlers that
acquires the KERNEL_LOCK.

- Change the pci_intr_handle_t type to be a struct rather than an
integer type in order to catch any direct use of it as a value.
Add a set of functions to interact with pci_intr_handle_t, including
setting interrupt flags.

- Implement pci_intr_setattr() so that the PCI_INTR_MPSAFE attribute
can be set on a pci_intr_handle_t.

- While I'm here, make all of the MI PCI back-end operations call
through real functions rather than hopping directly through function
pointers in the chipset tag.

This change looks a lot bigger than it really is because of the re-factor
in the plethora of model-specific PCI interrupt back-ends. The KN8AE,
KN300, and T2/T3/T4 (Sable) are largely un-changed.
 1.12  21-Mar-2014  christos gc sprintf; reduce local static usage of interrupt strings that are only
used once for autoconf printing.
 1.11  14-Mar-2009  dsl branches: 1.11.12; 1.11.22; 1.11.26;
Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.
 1.10  05-Jun-2000  thorpej branches: 1.10.132; 1.10.140; 1.10.146;
Switch to the new `evcnt' mechanism for counting interrupts. Maintain
a per-CPU interrupt counter for clock, device, and interprocessor
interrupts.
 1.9  04-Jun-2000  cgd Implement the more flexiable `evcnt' interface as discussed (briefly) on
tech-kern and now documented in evcnt(9).
 1.8  23-May-1998  ross branches: 1.8.14; 1.8.22;
Prototype sio_intr_alloc().
 1.7  14-Apr-1998  thorpej Pass the pci_chipset_tag_t to sio_intr_setup(). XXX This code should be
rearranged so that other non-PCI-but-in-all-other-ways-ISA-PIC-like
devices can share code.
 1.6  07-Apr-1997  cgd clean up NetBSD RCS ID strings
 1.5  23-Oct-1996  cgd branches: 1.5.2;
update for new bus.h macros. bus_io_* and bus_mem_* integrated into
single bus_space_* framework. Unfortunately, bus_space_{read,write}_*
operations still imply barriers. That will change soon.
 1.4  14-Jul-1996  cgd (1) Clean up interrupt handling slightly.
 1.3  12-Apr-1996  cgd clean up copyrights and RCS IDs
 1.2  12-Apr-1996  cgd clean up for new ISA and 'bus' code, etc.
 1.1  23-Nov-1995  cgd wholesale update from my NetBSD/Alpha source tree. Includes:
Support for AXPpci CPUs,
Support for AlphaStation 600 CPUs,
new boot block structure, which requires an 'installboot'
program and works a lot like the NetBSD/sparc boot blocks.
 1.5.2.1  01-Jun-1997  cgd sync the nwscons branch up with yesterday's version of the trunk.
Lots of conflicts/changes because of the RCS Id format changes.
Also, a few cleanups and corrections.
 1.8.22.1  22-Jun-2000  minoura Sync w/ netbsd-1-5-base.
 1.8.14.1  20-Nov-2000  bouyer Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
 1.10.146.1  13-May-2009  jym Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.
 1.10.140.1  28-Apr-2009  skrll Sync with HEAD.
 1.10.132.1  04-May-2009  yamt sync with head.
 1.11.26.1  18-May-2014  rmind sync with head
 1.11.22.1  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.11.12.1  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.13.6.1  01-Aug-2021  thorpej Sync with HEAD.

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