branches: 1.1.2;
file Makefile.wakecode was initially added on branch jmcneill-pm.

KNF, and reduce the diff between amd64 and i386.

branches: 1.12.6; 1.12.10;
LLVM doesn't support data32/addr32, but is smart enough to figure the
necessary prefixes out.

branches: 1.11.2; 1.11.4;
Set the CR0_AM bit so processes can enable alignment check errors under
x86 through PSL_AC bit.

ATF test incoming shortly.

branches: 1.10.12; 1.10.16; 1.10.18;
Add definition for WAKEUP_vesa_modenum

Ensure that the VBE mode is only restored when machdep.acpi_vbios_reset=1

Pass the VBE mode number from the bootloader to the kernel, and then
make the ACPI wakecode aware of it. Restore the desired VBE mode on resume
when acpi_vbios_reset=1, so suspend/resume with genfb console will work.

branches: 1.7.12;
Random underdocumented CPU facts:
AMD K8 and newer will trap when enabling the NX support outside PAE
paging mode. The AMD64 wake code was restoring the MSR EFER to switch to
Long Mode and naturally didn't have paging enabled at that point.
While this works fine with Intel CPUs, it resulted in an immediate
reboot with AMD processors.

Fixed by a joint brain storming session of jmcneill@, cegger@ and
myself, based on some input from the hardware developers. This fixes
PR 38587.

Remove unnecessary rdmsr when modifying MSR_EFER.

Share cpu.h between the x86 ports.

branches: 1.4.2;
Remove clause 3 and 4 from TNF licenses

branches: 1.3.2; 1.3.4; 1.3.10; 1.3.12; 1.3.14;
Add new IPI for saving CPU state explicitly, share high-level part of
ACPI wakeup code and teach it how to start the APs again. As a side
effect the CPU_START interface allows choosing between different
bootstrap codes more easily now.

branches: 1.2.2;
Merge jmcneill-pm branch.

branches: 1.1.2; 1.1.8; 1.1.10; 1.1.12;
file acpi_wakecode.S was initially added on branch jmcneill-pm.

branches: 1.1.2;
file acpi_wakecode.h was initially added on branch jmcneill-pm.

Add new IPI for saving CPU state explicitly, share high-level part of
ACPI wakeup code and teach it how to start the APs again. As a side
effect the CPU_START interface allows choosing between different
bootstrap codes more easily now.

Move mapping of the real mode location for the ACPI wakeup code into a
separate function called from acpi_md_callback.

Steal some rope from innocent users and disallow ACPI suspend if more
than one CPU was found.

branches: 1.4.2;
Merge jmcneill-pm branch.

branches: 1.3.48; 1.3.50; 1.3.56; 1.3.60; 1.3.62;
merge ktrace-lwp.

branches: 1.2.16;
__KERNEL_RCSID()

branches: 1.1.2;
Empty sleep stub function.

Drop NENTRY() from the x86 kernels, use ENTRY(). With PMCs (and other hardware
tracing facilities) we have a much better ways of monitoring the CPU activity
than GPROF, without software modification.

Also I think GPROF has never worked, because the 'start' functions of both
i386 and amd64 use ENTRY(), and it would have caused a function call while the
kernel was not yet relocated.

branches: 1.9.2; 1.9.4;
Use NENTRY -> END.

Improve our segregs model. Pass 3/3.

Treat %gs the same way we treat %ds/%es/%fs: restore it in INTRFASTEXIT
on 32bit LWPs.

On Xen however, its behavior does not change, because we need to do an
hypercall before INTR_RESTORE_GPRS, and that's too complicated for now.

As a side effect, this change fixes a bug in the ACPI wakeup code; %fs/%gs
were not restored on 32bit LWPs, and chances are they would segfault
shortly afterwards.

Support for USER_LDT on amd64 is almost complete now.

Improve our segregs model. Pass 1/3.

Right now, we are saving and restoring %ds/%es each time we enter/leave the
kernel. However, we let %fs/%gs live in the kernel space, and we rely on
the fact that when switching to an LWP, %fs/%gs are set right away (via
cpu_switchto or setregs).

It has two drawbacks: we are taking care of %ds/%es while they are
deprecated (useless) on 64bit LWPs, and we are restricting %fs/%gs while
they still have a meaning on 32bit LWPs.

Therefore, handle 32bit and 64bit LWPs differently:
* 64bit LWPs use fixed segregs, which are not taken care of.
* 32bit LWPs have dynamic segregs, always saved/restored.

For now, only %ds and %es are changed; %fs and %gs will be in the next
passes.

The trapframe is constructed as usual. In INTRFASTEXIT, we restore %ds/%es
depending on the %cs value. If %cs contains one of the two standard 64bit
selectors, don't do anything. Otherwise, restore everything.

When doing a context switch, just restore %ds/%es to their default values.
On a 32bit LWP they will be overwritten by INTRFASTEXIT; on a 64bit LWP
they won't be updated.

In the ACPI wakeup code, restore %ds/%es to the default 64bit user value.

Make sure %edx is clear.

KNF, and reduce the diff between amd64 and i386.

branches: 1.4.42; 1.4.62; 1.4.66;
Share cpu.h between the x86 ports.

branches: 1.3.2; 1.3.4; 1.3.10; 1.3.12; 1.3.14; 1.3.16;
Add new IPI for saving CPU state explicitly, share high-level part of
ACPI wakeup code and teach it how to start the APs again. As a side
effect the CPU_START interface allows choosing between different
bootstrap codes more easily now.

branches: 1.2.2;
Merge jmcneill-pm branch.

branches: 1.1.2; 1.1.8; 1.1.10; 1.1.12;
file acpi_wakeup_low.S was initially added on branch jmcneill-pm.

branches: 1.1.2;
file genwakecode.sh was initially added on branch jmcneill-pm.