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History log of /src/sys/arch/arm/cortex/pl310_reg.h
RevisionDateAuthorComments
 1.4  22-Mar-2014  reinoud Add constant for a reserved bit 31 for the L2C_AUXCTL register for use in
masks
 1.3  22-Mar-2014  reinoud Add defines for the PL310's L2C_PREFETCH_CTL and L2C_POWER_CTL registers as
per r3p2 spec.
 1.2  07-Sep-2012  matt branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; 1.2.16;
Switch cortex_a9 back to need_ptesync = 1
Add code to disable the L2 cache on cortex-a9 (for now).
Add evcnt for all the fault types.
Move cache info in a structure and have one for the pcache and one for scache.
Probe L1/L2 caches properly for ARMv7
 1.1  02-Sep-2012  matt Add driver to attach ARM PL210 L2 Cache Controller
arml2cc0 at armperiph0: ARM PL310 L2 r3p2 Cache Controller
arml2cc0: 256KB/32B 16-way L2 Unified cache
 1.2.16.2  15-Feb-2014  matt Merge armv7 support from HEAD, specifically support for the BCM5301X
and BCM56340 evbarm kernels.
 1.2.16.1  07-Sep-2012  matt file pl310_reg.h was added on branch matt-nb5-mips64 on 2014-02-15 16:18:36 +0000
 1.2.8.1  18-May-2014  rmind sync with head
 1.2.6.2  28-Nov-2012  matt Merge improved arm support (especially Cortex) from HEAD
including OMAP and BCM53xx support.
 1.2.6.1  07-Sep-2012  matt file pl310_reg.h was added on branch matt-nb6-plus on 2012-11-28 22:40:27 +0000
 1.2.4.3  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.2.4.2  30-Oct-2012  yamt sync with head
 1.2.4.1  07-Sep-2012  yamt file pl310_reg.h was added on branch yamt-pagecache on 2012-10-30 17:19:01 +0000
 1.2.2.1  20-Aug-2014  tls Rebase to HEAD as of a few days ago.

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