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History log of /src/sys/arch/arm/gemini/gemini_pci.c
RevisionDateAuthorComments
 1.23  20-Nov-2020  thorpej malloc(9) -> kmem(9)
 1.22  07-Jul-2020  thorpej branches: 1.22.2;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.
 1.21  14-Jun-2020  chs replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.
 1.20  10-Nov-2019  chs in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
 1.19  16-Nov-2018  jmcneill Add intr_establish_xname support to arm and expose it to intrctl
 1.18  02-Oct-2015  msaitoh branches: 1.18.16; 1.18.18;
PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific
 1.17  30-Mar-2014  christos branches: 1.17.6;
wrap a few lines
 1.16  29-Mar-2014  christos make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.
 1.15  18-Aug-2013  matt <arm/locore.h> fallout (fixes some include ordering errors)
 1.14  27-Oct-2012  chs branches: 1.14.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
 1.13  07-Sep-2012  matt branches: 1.13.2;
Fix more pci_conf_interrupt/pci_conf_hook problems
 1.12  06-Sep-2012  matt Change pci_conf_hook to pass pc->conf_v
Add pci_conf_interrupt
 1.11  27-Jan-2012  para converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged
 1.10  01-Jul-2011  dyoung branches: 1.10.2; 1.10.6;
#include <sys/bus.h> instead of <machine/bus.h>.
 1.9  04-Apr-2011  dyoung Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
 1.8  05-Jan-2010  mbalmer branches: 1.8.4; 1.8.6;
One semicolon is enough.
 1.7  04-Dec-2008  cliff branches: 1.7.4; 1.7.8;
remove old debug stuff, including Debugger() call that was not #ifdef DDB
 1.6  20-Nov-2008  cliff use CFATTACH_DECL_NEW, make device in softc type device_t, etc.
 1.5  13-Nov-2008  cliff add option GEMINI_BUSBASE to define kernel offset between
kernel physical addr and (DMA master) bus addr
 1.4  13-Nov-2008  cliff on the Slave CPU where memory is remaped, use 'struct arm32_dma_range'
to manage kernel physical address unequal to DMA master bus address.

when Slave CPU configures PCI bus, program PCI memory window
to allow only bus addresses into memory owned by the Slave CPU.

Note: this code assumes that the CPU performing
PCI bus configuration has exclusive use of that bus.
 1.3  28-Oct-2008  cliff set up PCI memory size based on MEMSIZE (actual memory size)
instead of GEMINI_DRAM_SIZE (size of DRAM physical address space).
 1.2  24-Oct-2008  cliff branches: 1.2.2;
fix comment regarding IO extent.
 1.1  24-Oct-2008  matt Add support for Cortina Systems SL3516 eval board.
 1.2.2.1  19-Jan-2009  skrll Sync with HEAD.
 1.7.8.3  11-Mar-2010  yamt sync with head
 1.7.8.2  04-May-2009  yamt sync with head.
 1.7.8.1  04-Dec-2008  yamt file gemini_pci.c was added on branch yamt-nfs-mp on 2009-05-04 08:10:41 +0000
 1.7.4.2  17-Jan-2009  mjf Sync with HEAD.
 1.7.4.1  04-Dec-2008  mjf file gemini_pci.c was added on branch mjf-devfs2 on 2009-01-17 13:27:52 +0000
 1.8.6.1  06-Jun-2011  jruoho Sync with HEAD.
 1.8.4.1  21-Apr-2011  rmind sync with head
 1.10.6.1  18-Feb-2012  mrg merge to -current.
 1.10.2.3  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.10.2.2  30-Oct-2012  yamt sync with head
 1.10.2.1  17-Apr-2012  yamt sync with head
 1.13.2.3  03-Dec-2017  jdolecek update from HEAD
 1.13.2.2  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.13.2.1  20-Nov-2012  tls Resync to 2012-11-19 00:00:00 UTC
 1.14.2.2  18-May-2014  rmind sync with head
 1.14.2.1  28-Aug-2013  rmind sync with head
 1.17.6.1  27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.18.18.2  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.18.18.1  10-Jun-2019  christos Sync with HEAD
 1.18.16.1  26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.22.2.1  14-Dec-2020  thorpej Sync w/ HEAD.

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