Cross Reference: /src/sys/arch/arm/include

History log of /src/sys/arch/arm/include
Revision	Date	Author	Comments
1.55	30-Nov-2024	christos	Create a new header lwp_private.h to contain _lwp_getprivate_fast, _lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that: 1. we don't need special hacks to hide them 2. we can include <lwp.h> where needed to get the necessary prototypes without redefining them locally.
1.54	04-Nov-2024	christos	Undo previous lwp.h change.
1.53	03-Nov-2024	christos	Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate lwp.h file.
1.52	26-Sep-2020	skrll	branches: 1.52.26; G/C arm/atomic.h
1.51	12-Jul-2018	maxv	Remove the kernel PMC code. Sent yesterday on tech-kern@. This change: * Removes "options PERFCTRS", the associated includes, and the associated ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is good. * Removes the PMC code of ARM XSCALE. * Removes all the pmc.h files. They were all empty, except for ARM XSCALE. * Reorders the x86 PMC code not to rely on the legacy pmc.h file. The definitions are put in sysarch.h. * Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control and sys_pmc_get_info syscalls. They are marked as OBSOL in kern, netbsd32 and rump. * Removes the pmc_evid_t and pmc_ctr_t types. * Removes all the associated man pages. The sets are marked as obsolete.
1.50	20-Mar-2018	ryo	branches: 1.50.2; separate cputypes.h for CPU_ID_* from armreg.h, and add some implementor IDs, CortexA55,73,75 IDs. (preliminary changes for merging aarch64)
1.49	23-Jul-2014	alnsn	branches: 1.49.26; Rename sljitarch.h to sljit_machdep.h.
1.48	17-Jun-2014	alnsn	Add sljit support to arm.
1.47	02-May-2013	matt	branches: 1.47.8; This change arm, armeb, earm, earmeb, earmhf, earmhfeb so all builds that share a MACHINE_ARCH for userland so that except for etc, will produce identical sets. usr/include/machine now points to usr/include/arm
1.46	01-May-2013	matt	Add a default arm32 vmparam.h
1.45	23-Apr-2013	matt	Install fenv.h
1.44	11-Jan-2013	matt	Don't install fp.h anymore
1.43	15-Aug-2012	matt	branches: 1.43.2; Export <arm/vfpreg.h>
1.42	06-Aug-2012	matt	Add aeabi.h header which descibes the C portion of the EABI run time API.
1.41	16-Feb-2012	christos	Added cpuconf.h needed by libkvm build.
1.40	17-Jul-2011	dyoung	branches: 1.40.2; 1.40.6; 1.40.10; Do not install bus.h.
1.39	17-Jul-2011	joerg	Retire varargs.h support. Move machine/stdarg.h logic into MI sys/stdarg.h and expect compiler to provide proper builtins, defaulting to the GCC interface. lint still has a special fallback. Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and derive va_list as required by standards.
1.38	25-Jun-2008	matt	Revert last change and just use .WAIT
1.37	23-Jun-2008	matt	Fix a race condition -j. Don't do SUBDIRS= include/arm include/arm/... since the latter might be done before the former which mtree doesn't like. Instead have arm recurse into its own subdirs.
1.36	19-Jan-2008	chris	branches: 1.36.14; Remove arm support for IPKDB. It hasn't worked since arm was broken out from arm32 in Jan 2001, and no-one has noticed or cared to fix it.
1.35	01-Jan-2008	chris	Add support for kcore headers to arm32 kernel core dumps. The kcore code is based on i386's kcore header handling. Having an asm stub for dumpsys, to dump the registers onto the stack, and then call the C code to do the memory dump is based on amd64's core dump code. This allows a successful core dump on cats. Part of fixing PR cats/18026.
1.34	18-Feb-2007	briggs	branches: 1.34.10; 1.34.18; 1.34.22; 1.34.24; 1.34.30; 1.34.36; Install atomic.h, as needed by the installed rwlock.h.
1.33	18-Feb-2007	matt	Add <arm/mutex.h> and <arm/rwlock.h> Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>
1.32	09-Feb-2007	ad	branches: 1.32.2; Merge newlock2 to head.
1.31	26-Jul-2006	drochner	branches: 1.31.4; don't install <machine/db_machdep.h>, this is kernel only
1.30	11-Dec-2005	christos	branches: 1.30.4; 1.30.8; merge ktrace-lwp.
1.29	08-May-2004	kleink	branches: 1.29.12; Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
1.28	17-Jan-2003	thorpej	branches: 1.28.2; Merge the nathanw_sa branch.
1.27	26-Nov-2002	lukem	Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.
1.26	13-Aug-2002	thorpej	Byte-swapping optimizations, enabled if compiling with GCC: * Byte-swap 16-bit and 32-bit constants at compile-time. * Inline 16-bit and 32-bit variable byte-swaps. These take 3 and 4 insns, respectively, and inlining saves the minimum 6 cycle penalty to call/return from the byte swap function.
1.25	07-Aug-2002	briggs	Implement pmc(9) -- An interface to hardware performance monitoring counters. These counters do not exist on all CPUs, but where they do exist, can be used for counting events such as dcache misses that would otherwise be difficult or impossible to instrument by code inspection or hardware simulation. pmc(9) is meant to be a general interface. Initially, the Intel XScale counters are the only ones supported.
1.24	13-Jan-2002	bjh21	branches: 1.24.8; 1.24.10; Add an <arm/swi.h>, containing symbolic names for SWI ranges.
1.23	26-Nov-2001	thorpej	Don't install includes which userland doesn't need.
1.22	23-Nov-2001	thorpej	- Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.21	03-Sep-2001	matt	branches: 1.21.6; Add a merged <pcb.h> for arm26/arm32.
1.20	29-Jul-2001	chris	PR 13581 Add empty pmap.h and vmparam.h to make userland happier.
1.19	14-Jul-2001	matt	Make <sysarch.h> valid for all arm platforms. Adjust/remove port-specific includes as required.
1.18	23-Jun-2001	bjh21	branches: 1.18.2; Add a common <arm/param.h>, containing those few things that are obviously common across all ARM systems.
1.17	23-Jun-2001	bjh21	Add <arm/endian.h> and remove the cats, dnard and netwinder versions, since they're all the same (a redirect to <sys/endian.h>).
1.16	18-Jun-2001	bjh21	Move <arm/arm32/bus.h> to <arm/bus.h>, since it looks like it's going to be necessary on arm26 as well.
1.15	15-Apr-2001	kleink	Add definitions of C99 integer format conversion macros. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.14	15-Apr-2001	kleink	Add definitions of C99 specified-width integer type limits. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.13	14-Apr-2001	kleink	Add definitions of C99 integer constant macros. Tidy Makefiles up a little.
1.12	14-Apr-2001	kleink	Add definitions of C99 minimum-width and greatest-width integer types. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.11	24-Feb-2001	ichiro	branches: 1.11.2; some include files added newly write into Makefile.
1.10	17-Feb-2001	bjh21	Install <arm/endian_machdep.h>.
1.9	13-Feb-2001	simonb	Fix typo in header filename.
1.8	11-Feb-2001	bjh21	branches: 1.8.2; Shared ARM ptrace(2) implementation. Mostly the same as the arm32 version, but with some #ifdefs for arm26. Also, don't define PT_STEP, since we don't implement it. This should reduce code size a little.
1.7	11-Feb-2001	bjh21	Common <arm/reg.h> (and hence common struct reg) for ARM. This is theoretically backward-incompatible on arm26, but GDB doesn't work there yet anyway.
1.6	22-Jan-2001	bjh21	Initial potentially sharable <arm/armreg.h>. Used by all arm26 code.
1.5	18-Jan-2001	bjh21	Add <arm/frame.h>, for shared stack frame structures. Currently, only sigframes are common.
1.4	13-Jan-2001	bjh21	Move <machine/signal.h> into shared directory.
1.3	11-Jan-2001	bjh21	Share <machine/elf_machdep.h> between arm26 and arm32.
1.2	11-Jan-2001	bjh21	Install all the headers (arm32 does).
1.1	10-Jan-2001	bjh21	Skeleton ARM include infrastructure.
1.8.2.3	21-Apr-2001	bouyer	Sync with HEAD
1.8.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.8.2.1	11-Feb-2001	bouyer	file Makefile was added on branch thorpej_scsipi on 2001-03-12 13:27:21 +0000
1.11.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.18.2.5	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.18.2.4	11-Feb-2002	jdolecek	Sync w/ -current.
1.18.2.3	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.18.2.2	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.18.2.1	03-Aug-2001	lukem	update to -current
1.21.6.7	11-Dec-2002	thorpej	Sync with HEAD.
1.21.6.6	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.21.6.5	13-Aug-2002	nathanw	Catch up to -current.
1.21.6.4	28-Feb-2002	nathanw	Catch up to -current.
1.21.6.3	08-Jan-2002	nathanw	Catch up to -current.
1.21.6.2	14-Nov-2001	thorpej	ARM-specific mcontext support. From Klaus Klein <kleink@netbsd.org>.
1.21.6.1	03-Sep-2001	thorpej	file Makefile was added on branch nathanw_sa on 2001-11-14 20:53:09 +0000
1.24.10.1	18-Nov-2002	he	Pull up revision 1.26 (requested by thorpej in ticket #667): Byte-swapping optimizations, enabled if compiling with GCC: o Byte-swap 16-bit and 32-bit constants at compile-time o Inline 16-bit and 32-bit variable byte-swaps
1.24.8.1	30-Aug-2002	gehenna	catch up with -current.
1.28.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.28.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.28.2.1	03-Aug-2004	skrll	Sync with HEAD
1.29.12.3	21-Jan-2008	yamt	sync with head
1.29.12.2	26-Feb-2007	yamt	sync with head.
1.29.12.1	30-Dec-2006	yamt	sync with head.
1.30.8.1	11-Aug-2006	yamt	sync with head
1.30.4.1	09-Sep-2006	rpaulo	sync with head
1.31.4.1	01-Feb-2007	ad	Header file cleanup.
1.32.2.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.34.36.2	20-Jan-2008	bouyer	Sync with HEAD
1.34.36.1	02-Jan-2008	bouyer	Sync with HEAD
1.34.30.1	18-Feb-2008	mjf	Sync with HEAD.
1.34.24.2	23-Mar-2008	matt	sync with HEAD
1.34.24.1	09-Jan-2008	matt	sync with HEAD
1.34.22.2	20-Jan-2008	chris	Sync to HEAD.
1.34.22.1	01-Jan-2008	chris	Sync with HEAD.
1.34.18.1	28-Feb-2008	rjs	Sync with HEAD.
1.34.10.1	19-Apr-2007	thorpej	Convert to the new atomic ops API.
1.36.14.1	27-Jun-2008	simonb	Sync with head.
1.40.10.1	21-Nov-2012	matt	Add aeabi.h, cpuconf.h, and vfpreg.h
1.40.6.1	18-Feb-2012	mrg	merge to -current.
1.40.2.4	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.40.2.3	23-Jan-2013	yamt	sync with head
1.40.2.2	30-Oct-2012	yamt	sync with head
1.40.2.1	17-Apr-2012	yamt	sync with head
1.43.2.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.43.2.2	23-Jun-2013	tls	resync from head
1.43.2.1	25-Feb-2013	tls	resync with head
1.47.8.1	10-Aug-2014	tls	Rebase.
1.49.26.2	28-Jul-2018	pgoyette	Sync with HEAD
1.49.26.1	22-Mar-2018	pgoyette	Synch with HEAD, resolve conflicts
1.50.2.1	10-Jun-2019	christos	Sync with HEAD
1.52.26.1	02-Aug-2025	perseant	Sync with HEAD
1.3	12-Jul-2018	maxv	Remove the kernel PMC code. Sent yesterday on tech-kern@. This change: * Removes "options PERFCTRS", the associated includes, and the associated ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is good. * Removes the PMC code of ARM XSCALE. * Removes all the pmc.h files. They were all empty, except for ARM XSCALE. * Reorders the x86 PMC code not to rely on the legacy pmc.h file. The definitions are put in sysarch.h. * Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control and sys_pmc_get_info syscalls. They are marked as OBSOL in kern, netbsd32 and rump. * Removes the pmc_evid_t and pmc_ctr_t types. * Removes all the associated man pages. The sets are marked as obsolete.
1.2	02-May-2013	matt	branches: 1.2.4; 1.2.12; 1.2.38; 1.2.40; This change arm, armeb, earm, earmeb, earmhf, earmhfeb so all builds that share a MACHINE_ARCH for userland so that except for etc, will produce identical sets. usr/include/machine now points to usr/include/arm
1.1	01-May-2013	matt	Pickup fenv.h from a common location since it's only used from userland and the kernel will never include it.
1.2.40.1	10-Jun-2019	christos	Sync with HEAD
1.2.38.1	28-Jul-2018	pgoyette	Sync with HEAD
1.2.12.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2.12.1	02-May-2013	yamt	file Makefile.common was added on branch yamt-pagecache on 2014-05-22 11:39:32 +0000
1.2.4.2	23-Jun-2013	tls	resync from head
1.2.4.1	02-May-2013	tls	file Makefile.common was added on branch tls-maxphys on 2013-06-23 06:20:00 +0000
1.2	22-Feb-2015	riastradh	branches: 1.2.2; 1.2.18; Make -mfloat-abi=soft a native kernel only option. Fixes rump build. ok justin@
1.1	21-Feb-2015	joerg	Don't build modules with float instructions.
1.2.18.2	03-Dec-2017	jdolecek	update from HEAD
1.2.18.1	22-Feb-2015	jdolecek	file Makefile.inc was added on branch tls-maxphys on 2017-12-03 11:35:53 +0000
1.2.2.2	06-Apr-2015	skrll	Sync with HEAD
1.2.2.1	22-Feb-2015	skrll	file Makefile.inc was added on branch nick-nhusb on 2015-04-06 15:17:52 +0000
1.3	22-Dec-2019	thorpej	Add acpi_intr_mask() and acpi_intr_unmask() which, following the pre-existing ACPI software layering model, are wrappers around acpi_md_intr_mask() and acpi_md_intr_unmask(), which in turn are wrappers around intr_mask() and intr_unmask(). XXX ARM and IA64 implementations of acpi_md_intr_mask() and acpi_md_intr_unmask() are just stubs for now.
1.2	16-Nov-2018	jmcneill	branches: 1.2.4; Add MD functions for establishing and disestablishing interrupt handlers.
1.1	12-Oct-2018	jmcneill	branches: 1.1.2; Add ARM MD ACPI implementation.
1.1.2.3	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.1.2.2	20-Oct-2018	pgoyette	Sync with head
1.1.2.1	12-Oct-2018	pgoyette	file acpi_machdep.h was added on branch pgoyette-compat on 2018-10-20 06:58:25 +0000
1.2.4.3	08-Apr-2020	martin	Merge changes from current as of 20200406
1.2.4.2	10-Jun-2019	christos	Sync with HEAD
1.2.4.1	16-Nov-2018	christos	file acpi_machdep.h was added on branch phil-wifi on 2019-06-10 22:05:54 +0000
1.6	06-Oct-2021	skrll	More trailing whitespace
1.5	01-Aug-2013	matt	All floating point related rtabi (__aeabi) are called using the aapcs calling standard, not aapcs-vfp. This fixes lots of problems on earmhf
1.4	08-Apr-2013	skrll	branches: 1.4.4; Handle _STANDALONE case. OK from matt@
1.3	24-Jan-2013	matt	Allow this to be included in libkern
1.2	11-Aug-2012	matt	branches: 1.2.2; 1.2.4; 1.2.6; #include <stddef.h>
1.1	06-Aug-2012	matt	Add aeabi.h header which descibes the C portion of the EABI run time API.
1.2.6.2	21-Nov-2012	matt	Add aeabi.h, cpuconf.h, and vfpreg.h
1.2.6.1	11-Aug-2012	matt	file aeabi.h was added on branch matt-nb6-plus on 2012-11-21 00:00:10 +0000
1.2.4.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2.4.2	30-Oct-2012	yamt	sync with head
1.2.4.1	11-Aug-2012	yamt	file aeabi.h was added on branch yamt-pagecache on 2012-10-30 17:19:03 +0000
1.2.2.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.2.2.2	23-Jun-2013	tls	resync from head
1.2.2.1	25-Feb-2013	tls	resync with head
1.4.4.1	28-Aug-2013	rmind	sync with head
1.18	07-May-2019	kamil	Switch all users (except ia64) of custom machine/ansi.h to common_ansi.h Deduplicate the code among ports and poll definitions of types directly from a compiler. This fixes miscompilation of certain programs that instruct compilers to generate code for different types. This bug has been detected with -fshort-wchar in EFI firmware. Proposed and discussed on a mailing list (twice). Itanium uses custom !ELF fallback switch, temporarily leave it as it is.
1.17	24-Feb-2014	christos	branches: 1.17.30; consistency in include protection
1.16	29-Jan-2014	matt	change include protection from _ANSI_H_ to _ARM_ANSI_H_
1.15	27-Jan-2013	matt	branches: 1.15.2; Change _BSD_SSIZE_T_ so it's not dependent of _BSD_PTRDIFF_T_
1.14	24-Jan-2013	matt	Use __{PTRDIFF,SIZE,WCHAR,WINT}_TYPE__ is they are defined.
1.13	17-Jul-2011	joerg	branches: 1.13.2; 1.13.12; Retire varargs.h support. Move machine/stdarg.h logic into MI sys/stdarg.h and expect compiler to provide proper builtins, defaulting to the GCC interface. lint still has a special fallback. Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and derive va_list as required by standards.
1.12	27-Mar-2010	tnozaki	1. {wctype,wctrans,mbstate}_t: switch MD to MI like other libc implementation (such as BSD and glibc2). 2. don't typedef void wc{type,trans}_t, suggested by soda@-san. it may pass through compiler type check, it's harmful. so i introduce dummy struct __tag_wc{type,trans}_t(iconv_t already does). no ABI change was made.
1.11	11-Jan-2009	christos	branches: 1.11.4; 1.11.6; merge christos-time_t
1.10	29-Aug-2008	matt	branches: 1.10.2; Remove non-__ELF__ snippets.
1.9	17-Oct-2007	garbled	branches: 1.9.16; 1.9.18; 1.9.22; 1.9.24; 1.9.28; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.8	03-Sep-2007	drochner	clean up some definitions around rune_t which are not needed anymore
1.7	04-Oct-2006	tnozaki	branches: 1.7.8; 1.7.16; 1.7.22; 1.7.24; 1.7.26; 1.7.28; 1.7.30; fix gcc -Werror -Wmissing-braces problem mbstate_t(this is opaque object)'s initializer should be ``{ 0 }'', so changed 1st field of union from character array to integer.
1.6	11-Dec-2005	christos	branches: 1.6.20; 1.6.22; merge ktrace-lwp.
1.5	07-Aug-2003	agc	branches: 1.5.16; Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.4	02-Mar-2003	tshiozak	branches: 1.4.2; add some ISO C 1995 I18N functions and types: btowc, wctrans, towctrans, wcscoll, wcsxfrm, wctype_t and wctrans_t.
1.3	08-Nov-2002	thorpej	Adjust stdargs/varargs for GCC 3.x.
1.2	28-Jul-2001	matt	branches: 1.2.6; 1.2.16; 1.2.18; Change ARM-ELF to LP64 friendly types.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.6; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.6.1	03-Aug-2001	lukem	update to -current
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file ansi.h was added on branch thorpej_scsipi on 2001-01-10 19:02:06 +0000
1.2.18.1	09-Nov-2002	bjh21	Catch up with -current.
1.2.16.1	11-Dec-2002	he	Pull up revision 1.3 (requested by thorpej in ticket #973): Adjust stdargs/varargs for GCC 3.x.
1.2.6.2	11-Nov-2002	nathanw	Catch up to -current
1.2.6.1	28-Jul-2001	nathanw	file ansi.h was added on branch nathanw_sa on 2002-11-11 21:56:45 +0000
1.4.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.4.2.1	03-Aug-2004	skrll	Sync with HEAD
1.5.16.2	27-Oct-2007	yamt	sync with head.
1.5.16.1	30-Dec-2006	yamt	sync with head.
1.6.22.1	22-Oct-2006	yamt	sync with head
1.6.20.1	18-Nov-2006	ad	Sync with head.
1.7.30.1	06-Nov-2007	matt	sync with HEAD
1.7.28.1	01-Jan-2008	chris	Sync with HEAD.
1.7.26.1	02-Oct-2007	joerg	Sync with HEAD.
1.7.24.1	01-Nov-2007	rjs	Sync with HEAD.
1.7.22.1	10-Sep-2007	skrll	Sync with HEAD.
1.7.16.1	03-Oct-2007	garbled	Sync with HEAD
1.7.8.1	09-Oct-2007	ad	Sync with head.
1.9.28.1	19-Oct-2008	haad	Sync with HEAD.
1.9.24.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.9.22.2	11-Aug-2010	yamt	sync with head.
1.9.22.1	04-May-2009	yamt	sync with head.
1.9.18.3	01-Nov-2008	christos	Sync with head.
1.9.18.2	30-Mar-2008	christos	time_t is now __int64_t
1.9.18.1	29-Mar-2008	christos	Welcome to the time_t=long long dev_t=uint64_t branch.
1.9.16.2	17-Jan-2009	mjf	Sync with HEAD.
1.9.16.1	28-Sep-2008	mjf	Sync with HEAD.
1.10.2.1	19-Jan-2009	skrll	Sync with HEAD.
1.11.6.1	30-May-2010	rmind	sync with head
1.11.4.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.13.12.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.13.12.1	25-Feb-2013	tls	resync with head
1.13.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.15.2.1	18-May-2014	rmind	sync with head
1.17.30.1	10-Jun-2019	christos	Sync with HEAD
1.8	17-Mar-2018	ryo	whitespace
1.7	24-Feb-2014	christos	branches: 1.7.28; consistency in include protection
1.6	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.5	11-Dec-2005	christos	branches: 1.5.114; 1.5.124; 1.5.130; merge ktrace-lwp.
1.4	04-Feb-2005	jmc	Put this back to a #define after he patched sys/exec_aout.h. Otherwise errno.h has to be pulled in for ENOEXEC definition.
1.3	04-Feb-2005	joff	Make cpu_exec_aout_makecmds() a static inline instead of just #define'ed to ENOEXEC. Broken on ARM build from the de-__P'ing, this is the fix.
1.2	10-Dec-2002	thorpej	branches: 1.2.6; 1.2.14; Rename __LDPGSZ to AOUT_LDPGSZ, to accurately reflect what it is.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.10; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.10.1	11-Dec-2002	thorpej	Sync with HEAD.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file aout_machdep.h was added on branch thorpej_scsipi on 2001-01-10 19:02:06 +0000
1.2.14.1	29-Apr-2005	kent	sync with -current
1.2.6.1	06-Feb-2005	skrll	Sync with HEAD.
1.5.130.1	18-May-2014	rmind	sync with head
1.5.124.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.5.114.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.7.28.1	22-Mar-2018	pgoyette	Synch with HEAD, resolve conflicts
1.2	24-Feb-2014	christos	branches: 1.2.4; consistency in include protection
1.1	02-May-2013	matt	branches: 1.1.4; 1.1.6; This change arm, armeb, earm, earmeb, earmhf, earmhfeb so all builds that share a MACHINE_ARCH for userland so that except for etc, will produce identical sets. usr/include/machine now points to usr/include/arm
1.1.6.1	18-May-2014	rmind	sync with head
1.1.4.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.1.4.2	23-Jun-2013	tls	resync from head
1.1.4.1	02-May-2013	tls	file apmvar.h was added on branch tls-maxphys on 2013-06-23 06:20:00 +0000
1.2.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2.4.1	24-Feb-2014	yamt	file apmvar.h was added on branch yamt-pagecache on 2014-05-22 11:39:32 +0000
1.1	11-Aug-2007	chris	branches: 1.1.2; file arm_intr.h was initially added on branch chris-arm-intr-rework.
1.1.2.9	24-Feb-2008	chris	Reorder splx code so we don't have to disable interrupts, we might get a few spurious times when we go into splx_lifter, but that'll hopefully be the minority case. Uses suggested reordering from scw@
1.1.2.8	09-Feb-2008	chris	Make sure interrupts are not lost between comparing the pending ipl list and the updating of the current_ipl_level. Also bias the comparision so that the "fast path" is to assume that we're unlikely to have interrupts to process on the splx call.
1.1.2.7	09-Feb-2008	chris	Add initial reworking of acorn32 to use new interrupt code. Note that cats probably won't work currently as acorn32 changed the way that the pic is registered, it has to provide the irq lines as on acorn32 we attach the iomd after we need to register irqs for the pioc. So we setup the irqs for iomd before malloc etc are available. This needs to be fixed. More work is still needed to update most of the podulebus drivers. First I need to add podulebus wrapper for interrupts that handles the maskaddr and maskbits. Exposing them to the common irq code is wrong.
1.1.2.6	26-Jan-2008	chris	Rename some structures, eg intrq->intrline, irqgroup->pic. A lot of member variables have changed name to reflect this. Change the API for registering a PIC with the common code, so that it passes a structure to the common code, rather than lots of parameters.
1.1.2.5	01-Jan-2008	chris	Make branch build again following sync to head.
1.1.2.4	18-Aug-2007	chris	Fix off by one issues when deciding if there are ipls which can be processed from splx. Don't lower the spl level in raisespl. Correct test when scheduling a interrupt. These issues were more noticable on slower (EB7500ATX) than on faster (cats) hardware. Particularly noticed when handling disk interrupts, where disk interrupts were processed even when spl was splbio. They should have been blocked till the next splx. This was causing disk timeouts. Add futher diagnostic output from arm_intr_print_pending_irq_details. Add some temporary code used to debug the problem. To be remove later.
1.1.2.3	18-Aug-2007	chris	Rework registration call, so that it no longer takes a status paramater. Rework dispatch routines, so no implicit ordering is required in the irq groups. This removes the primary flag, and also makes hardware dependant dispatch routines again. Update arm_intr_queue_irqs to disable interrupts. This is necessary when child buses are present, eg isa bus, as the isa interrupt handler is called with interrupts enabled, and I believe that the footbridge handler was trampling on the isa handler setting up pending flags. cats can now install using the update irq code (previously it would randomly hang)
1.1.2.2	12-Aug-2007	chris	Switch footbridge isa to use common code. This required changes to the arm code: * intr_claim now takes a type to indicate edge, level or pulse. It has isa level understanding of types and uses a callback to set the hardware type. * slightly adjust how pending interrupts are queued up. * switch the ICU setup code to make use the defines in i8259reg.h, rather than using magic numbers.
1.1.2.1	11-Aug-2007	chris	Initial check-in of reworked arm interrupt routines. Main things to note on this branch: * spl routines are inlined, less complex, and small (kernel drops in size) * interrupts are handled in priority order (for most things it doesn't matter, but pending ipls are used to determine if there is any work to do) * arm_irqhandler.c is derived from footbridge_irqhandler.c, which was based on work by thorpej. * The code tries to touch hardware as little as possible. * spl masks are no longer tracked, as the system is based on pending ipls The shared code uses global ipl lists to track which interrupt handlers are attached to which ipl (arm_iplq[]). Interrupt sources register with the common code to indicate: * how many irq lines they have * a function to set the hardware mask. * call arm_intr_claim and arm_intr_disestablish to setup handlers When an interrupt occurs the ipl is flagged as pending, in ipls_pending. If it can be handled at the current_ipl_level the code does so. If it can't be handled it's left until the current_ipl_level drops. As the ipl level changes down a quick test is made of the new ipl level against the ipls_pending value. If an ipl is pending arm_intr_splx_lifter is called to handle the pending ipls. It should be noted that all interrupts are left enabled at the hardware level, interrupts are only masked when they occur. They are only re-enabled after it's interrupt handler is called. Hardware masks are not changed at any other time. Soft interrupts are treated the same as hardware interrupts, they register as a provider, and do not get treated specially. All the soft interrupt handlers are placed onto the relevant global ipl queue, the same as hard interrupts handlers. At the moment only footbridge within a cats has been updated to use the new handling. Todo: * change the handling of interrupts, so that the hardware doesn't register a routine to fetch the hardware status. Instead is makes a call which provides the mask. This removes the primary flag when registering an interrupt provider. It also makes more sense with multiple interrupt sources. * Arm v5 has the clz asm, which could be used instead of the carefully hand rolled arm_intr_fls function. * switch cats isa support to use this framework. * switch iomd and acorn32 to use this framework. * switch shark to use this framework. * port any other arm platforms that are interested * examine overlaps between this code and ppcoea-renovation branch. * add support for different trigger types (Edge, level, pulse, etc) (note that iomd and shark currently touch hardware on every spl change, hence why they're targets to port)
1.136	03-Dec-2022	ryo	move ARMv7 PMC register definitions to armreg.h from tprof_armv7.c
1.135	20-May-2022	andvar	s/auxillary/auxiliary/ in comments.
1.134	27-Nov-2021	skrll	Add the Cortex A17 Diagnostic control registers
1.133	13-Nov-2021	jmcneill	Set ACTLR.SMP=1 on Cortex-A17
1.132	10-Oct-2021	skrll	Add a placeholder for PRRR
1.131	03-Sep-2021	andvar	fix typos in comments, mainly s/extention/extension/ and s/sufficent/sufficient/
1.130	31-Jan-2021	skrll	Fix (unused) PRRR_NOSn #define
1.129	29-Oct-2019	joerg	branches: 1.129.8; Explicitly annotate FPU requirements for LLVM MC. When using GCC, this annotations change the global state, but there is no push/pop functionality for .fpu to avoid this problem. The state is local to each inline assembler block with LLVM MC.
1.128	12-Aug-2019	jmcneill	Add support for physical timers and sprinkle isb where needed.
1.127	02-May-2019	skrll	branches: 1.127.2; It's the Normal Memory Remap Register (not Normal Region Remap Register)
1.126	02-May-2019	skrll	Fix Normal Region Remap Register bitmask names
1.125	30-Jan-2019	jmcneill	add gtmr_cntv_cval_write
1.124	15-Aug-2018	skrll	Some CPU specific ACTLR bit definitions
1.123	12-Aug-2018	skrll	Provide and use cpu_mpidr_aff_read in psci_fdt_bootstrap
1.122	15-Jul-2018	jmcneill	Add some PMC event registers
1.121	14-May-2018	joerg	branches: 1.121.2; Workaround A-008585 errata in GTMR. Register reads and writes may provide unstable results if the counter hardware is active at the same time. This results in non-monotonic counters seen by both the gtmr interrupt and time counter. The loops are currently applied unconditionally, restricting them to appropiate FDT markers can be applied later.
1.120	01-Apr-2018	ryo	Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.119	20-Mar-2018	ryo	separate cputypes.h for CPU_ID_* from armreg.h, and add some implementor IDs, CortexA55,73,75 IDs. (preliminary changes for merging aarch64)
1.118	02-Mar-2018	christos	branches: 1.118.2; insert a couple of .fpu directives when we access the vfp registers while is softvpf fpu mode for gcc 6. XXX: there is no .fpu push/pop...
1.117	24-Jan-2018	skrll	Remove port-acorn26 OK core@
1.116	20-Dec-2017	skrll	One copy of the generic timer register defines is enough for anyone. The ARM_ prefixed copies are prefered (at this point) and the comments from the non-ARM_ prefixed versions are copied over.
1.115	20-Dec-2017	skrll	Correct ARM_CNTKCTL_PL0[VP]CTEN values. NFC as nothing uses them.
1.114	17-Dec-2017	skrll	Typo in comment cvS: ----------------------------------------------------------------------
1.113	24-Oct-2017	skrll	Some more registers
1.112	16-Sep-2017	matt	Add Cortex-A35 CPU ID.
1.111	17-May-2016	msaitoh	branches: 1.111.14; Fix CORTEXA9Rx definitions.
1.110	03-Mar-2016	skrll	Get the RPI3 working (in aarch32 mode) by recognising Cortex A53 CPUs. While I'm here add some A57/A72 info as well. My RPI3 works with FB console - the uart needs some help with its clocks.
1.109	15-Oct-2015	skrll	No need to shout
1.108	15-Oct-2015	skrll	Setting actlr.bit15=1 (Force in order issue in the branch execution unit) makes my jetson tk1 stable. Apply this workaround until we figure out what the real problem is.
1.107	09-Jun-2015	skrll	Use TTBR_[UM]PATTR in a9_mpsubr.S as well as cpufunc_asm_armv7 Prompted by matt@
1.106	30-May-2015	skrll	Add Revision ID register
1.105	20-May-2015	hsuenaga	move register accessor macros for MPIDR and AUXFMC0 to armreg.h
1.104	27-Apr-2015	skrll	Trailing whitespace
1.103	27-Apr-2015	skrll	ARM spells the System Control Register SCTLR
1.102	27-Nov-2014	matt	branches: 1.102.2; Add Cortex-A17 ID
1.101	15-Oct-2014	skrll	Fix dccmvau. Add bpimva.
1.100	15-Oct-2014	skrll	Fix bpiall and the comment against bpiallis
1.99	12-Oct-2014	skrll	Minor amendment/corrections.
1.98	16-Sep-2014	matt	Remove redundant CORTEXA9_AUXCTL defines
1.97	14-Apr-2014	matt	branches: 1.97.2; Support (untested) SHEEVA_L2_CACHE and SHEEVA_L2_CACHE_WT options. Move prototypes out to <arm/cpufunc.h> to their own file. Add sdcache routines to cpufunc_asm_sheeva.S Add code sheeve_setup to init the sdcache and sdcache info.
1.96	13-Apr-2014	matt	Add tpidruro and tpidrurw inlines
1.95	29-Mar-2014	matt	branches: 1.95.2; Add scr inline
1.94	26-Mar-2014	matt	Add NSACR
1.93	07-Mar-2014	matt	Restrict arm_cond_ok_p to when !__ASSEMBLER && _KERNEL is true.
1.92	07-Mar-2014	matt	Avoid a gcc4.8 bogon.
1.91	05-Mar-2014	matt	Define all the instruction conditions. Use __SHIFTOUT to get the condition. Add bool arm_cond_ok_p(uint32_t insn, uint32_t psr) inline Add tlbtr inline
1.90	03-Mar-2014	matt	More control bits. SYNCHPRIM defines.
1.89	01-Mar-2014	matt	Fix typos
1.88	01-Mar-2014	matt	defines/inlines for cortex a5/a7 tlbdata ops
1.87	26-Feb-2014	matt	Add more MMU registers
1.86	24-Feb-2014	matt	Add more inlines. Default FSR ARMv6+ bits. Add A7/A15 L2CTRL defs.
1.85	10-Jan-2014	matt	Flush out the PSR definitions.
1.84	27-Dec-2013	matt	Switch to using FP instructions instead of cp10/11 instructions.
1.83	07-Sep-2013	matt	fix CPU_ID_CORTEXA7R0
1.82	02-Aug-2013	matt	Add MVFR (Media & VFP Features) definitions.
1.81	02-Jul-2013	matt	Add TTBCR definitions
1.80	16-Jun-2013	matt	branches: 1.80.2; Improve generic timer inlines to be cnt_ consistently
1.79	12-Jun-2013	matt	Fix VBAR inlines
1.78	12-Jun-2013	matt	Fix ARM_PRF1_SEC_MASK value.
1.77	12-Jun-2013	matt	Add defines for ARM Generic Timer Add defines for PFR1 GTIMER and SEC extensions. Add VBAR inlines
1.76	01-May-2013	rkujawa	Add Armada XP specific IDs and registers. Obtained from Marvell, Semihalf.
1.75	28-Apr-2013	kiyohara	Fix ID ARM710a for CL PS-711x.
1.74	28-Feb-2013	matt	Add c16 c8 (tlb) inlines. Add CPUID of Cortex-A7 r0
1.73	12-Feb-2013	matt	Add inlines for cp10 (vfp) registers
1.72	24-Jan-2013	matt	Don't define CP15 inlines when compiling for a _RUMPKERNEL
1.71	25-Dec-2012	matt	Add CP15 Generic Timer definitions. Add cortex PMUSERENR inlines
1.70	29-Nov-2012	matt	Add inlines for SCTRL
1.69	27-Sep-2012	matt	Add PSR_HYP32_MODE (hypervisor mode).
1.68	22-Sep-2012	matt	Only use CPACR register for ARM11 and CORTEX cores. Add VFP ids for other CORTEX CPUs.
1.67	22-Sep-2012	matt	Before testing for VFP, make sure CP10 is enabled. (And CP11 for Neon too).
1.66	22-Sep-2012	matt	Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead but add a second argument to it to indicate whether the TLB/caches need to be flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field to see if the fixed can be skipped. Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1) or enabeld (bit = 0). With these changes, the A9 MMU can use traverse caches to do MMU tablewalks Also, make sure all memory has the shareable bit for the A9.
1.65	11-Sep-2012	matt	branches: 1.65.2; Add more c7 register inlines. Add some more CT4 defintions
1.64	07-Sep-2012	matt	Switch cortex_a9 back to need_ptesync = 1 Add code to disable the L2 cache on cortex-a9 (for now). Add evcnt for all the fault types. Move cache info in a structure and have one for the pcache and one for scache. Probe L1/L2 caches properly for ARMv7
1.63	06-Sep-2012	matt	Add ttbr/ttbr1/ttbcr registers
1.62	31-Aug-2012	matt	Use __ASSEMBLER__ to control inline definitions
1.61	31-Aug-2012	matt	Don't do inlines if _STANDALONE
1.60	29-Aug-2012	matt	Use new armv7 CP15 register to print out cache types. If the cpu_cc_freq is set, report it. Add macros to make inlines for reading/writing co-processor registers.
1.59	15-Aug-2012	matt	Add SWP enable bit to system control register (Cortex-A9).
1.58	14-Aug-2012	matt	Add __HAVE_CPU_COUNTER support for ARM11 and Cortex CPUs
1.57	31-Jul-2012	matt	Add MON32 mode (just for completeness).
1.56	23-Jul-2012	skrll	Make auxiliary register naming consistent for the 1136.
1.55	17-Jul-2012	skrll	Fix spelling mistake in comments.
1.54	17-Jul-2012	skrll	Add the documented ARM11[37]6 Auxiliary control register defines.
1.53	14-Jul-2012	matt	Fix CPU_ID_CORTEX_P and add CPU_ID_CORTEX_A8_P
1.52	13-Jul-2012	matt	Begin support for Cortex A5, A7, A15 and expand A8 and A9 definitions. Instead of testing all possible CPUids for a cortex, we know what range a cortex will be so mask out the insignificant parts and do a single test.
1.51	20-May-2012	skrll	Remove the ARM1156T2 bloat - it only has an MPU. Prompted by matt@
1.50	20-May-2012	skrll	Add the ARM1156T2-S
1.49	20-May-2012	skrll	Add the 'Z' to the 1176 cpu product name. ok matt@
1.48	30-Jun-2011	wiz	branches: 1.48.2; 1.48.6; 1.48.8; dependant -> dependent
1.47	10-Mar-2011	bsh	Preliminary ARM11 MPCore support. I have confirmed this commit doesn't affect existing evbarm kernels by comparing binaries.
1.46	15-Dec-2010	bsh	branches: 1.46.2; fix XP bit and U bit definitions of CP15 control register. These constants are not used in our source tree for now, so this won't change any kernel bianries.
1.45	02-Oct-2010	kiyohara	Add support Marvell Sheeva Core and SoC. (Orion/Kirkwood) Discovery Innovation not yet.
1.44	19-Jun-2010	matt	Fix cache probing on Cortex. Add missing CORTEX dependency in cpu.c
1.43	19-Jun-2010	matt	Cleanup the armv7 changes. Add ARM_ARCH_7. Use CPU_CORTEX instead of CPU_CORTEXA8 everywhere since there more types of Cortex than just the A8. CPU_CORTEXA8 still exists but causes CPU_CORTEX to be defined. Add CPU_CORTEXA9 as well. Use .arch armv7a to get us the isb/dsb instructions. Test booted to root device prompt on a Beagleboard. All ARM kernels successfully test built.
1.42	16-Jun-2010	jmcneill	PR port-arm/43299: Support added for igepv2/cortexa8/omap3530 Apply patch from PR, with build fixes. ok skrll, matt
1.41	27-Aug-2008	matt	branches: 1.41.12; 1.41.14; 1.41.16; Add new CPU Cache register definitions for Cortex-A8.
1.40	06-Aug-2008	matt	Define IF32_bits as the union of I32_bit\|F32_bit
1.39	22-Jul-2008	matt	Implement workaround for: arm11 Errata 364296:Possible Cache Data Corruption with Hit-Under-Miss Remove hack in userret which is redundant with workaround. workaround code from <imre.deak@teleca.com>
1.38	27-Apr-2008	matt	branches: 1.38.2; 1.38.4; 1.38.6; Merge kernel changes in matt-armv6 to HEAD.
1.37	06-Jan-2007	christos	branches: 1.37.26; 1.37.46; 1.37.48; 1.37.50; Scott Allan in http://mail-index.netbsd.org/port-arm/2006/07/31/0000.html Patch to add support for ARM9E
1.36	26-Nov-2006	bjh21	branches: 1.36.2; The ARM7500 ID is no longer a guess -- I've confirmed it on a real ARM7500.
1.35	14-Apr-2006	nonaka	branches: 1.35.8; 1.35.10; Added FARADAY FA526 ID.
1.34	11-Dec-2005	christos	branches: 1.34.4; 1.34.6; 1.34.8; 1.34.10; 1.34.12; merge ktrace-lwp.
1.33	20-Jul-2005	nonaka	Added i80219.
1.32	03-Jun-2005	rearnsha	branches: 1.32.2; Add CPU_ID_ARCH_V5TEJ and CPU_ID_ARCH_V6. Add CPU_IDs for ARM1136J-s and ARM1136J-S R1.
1.31	10-May-2005	rearnsha	Add CPU-id for arm1026ej-s.
1.30	21-Aug-2004	rearnsha	Define THUMB_INSN_SIZE.
1.29	13-Apr-2004	bsh	add CPU ID for Bulverde
1.28	31-Oct-2003	scw	Overhaul arm32's abort handlers: - Assume a permission fault is always the result of an attempted write, so no need to disassemble the opcode. (as discussed with Richard Earnshaw/Jason Thorpe a week or two ago) - Split out non-MMU data aborts into separate functions, and deal correctly with XScale imprecise aborts. Specifically, the old code made no attempt to handle the double abort faults which can occur as a result of two consecutive external (imprecise) aborts. This was easy to provoke by read(2)ing from a /dev/mem offset which caused an external abort. With the old code, this would bring the system down instantly, with little clue as to why. (hint: tf_spsr held PSR_ABT32_MODE...) - Re-write badaddr_read() to use pcb_onfault instead of adding extra overhead to data_abort_handler(). A side effect of this is that it now benefits from the XScale double abort recovery. - Invoke the cpu-specific prefetch/data abort fixup routines only if the host cpu actually needs it. On other cpus, the code is optimised away. - Sprinkle __predict_{false,true} in all the right places. - G/C some excess debugging baggage.
1.27	06-Sep-2003	rearnsha	Add arm1020E cpu id
1.26	03-Sep-2003	mycroft	Recognize some TI processors -- not that you'd want to use them.
1.25	13-May-2003	ichiro	branches: 1.25.2; add CPU types IXP425 xscale-core NetworkProcessor later, Ill commit codes for IXP425-evaluation board
1.24	04-May-2003	thorpej	Make the ARM_VECTORS_* unsigned.
1.23	18-Mar-2003	bsh	fix XScale core revision mask, and add masks for core generation and product number.
1.22	14-Feb-2003	rjs	Add CPU IDs for PXA B2 and C0 steppings.
1.21	22-Jul-2002	briggs	Handle i80200 step D0 and i80321 step B0
1.20	10-Jul-2002	ichiro	add cpu id for "PXA250/210 3rd version CPUcore". for using many PDA/xscale-core.
1.19	07-Jun-2002	thorpej	Add the CPU ID for the 600MHz i80321 part.
1.18	27-Apr-2002	ichiro	branches: 1.18.2; 1.18.4; add CPU ID of IXP1200 network processor
1.17	15-Apr-2002	thorpej	Fix a typo and an omission in last.
1.16	15-Apr-2002	thorpej	Add bits for the XScale Auxillary Control Register.
1.15	03-Apr-2002	thorpej	Define the two possible addresses for the ARM vector page.
1.14	03-Apr-2002	thorpej	Add a comment summarizing the post-ARM3 CP15 registers.
1.13	27-Mar-2002	thorpej	The 80321 manual lies; it does have a CPU ID distinct from the 80200. Add that CPU ID, and add a case for it.
1.12	26-Mar-2002	thorpej	Restructure a few things in order to support other XScale core I/O processors: * The i80200 and the i80321 have the same CPU ID, so split the CPU_XSCALE option into CPU_XSCALE_80200 and CPU_XSCALE_80321 options, and don't let them both be defined at the same time. XXX May want to revisit this in the future. * Split some registers common between the i80200 and i80321 into <arm/xscale/xscalereg.h>. * Rename a few existing functions.
1.11	16-Mar-2002	bjh21	Add CPU ID for the ARM1022ES. Also add a CPU class for ARM10E processors in general.
1.10	14-Feb-2002	rjs	Add Cotulla CPU IDs.
1.9	29-Nov-2001	thorpej	Fetch cache info from the Cache Type register on ARM7TDMI and "greater" processors. Report this when the processor is attached.
1.8	18-Jul-2001	rjs	branches: 1.8.6; Add Jazelle mode flag.
1.7	10-Mar-2001	bjh21	branches: 1.7.2; Correct CPU_ID_ISOLD() and CPU_ID_IS7().
1.6	04-Mar-2001	bjh21	branches: 1.6.2; Add CPU ID for ARM7500FE (determined empirically from two I've got here).
1.5	01-Mar-2001	bjh21	ARM7100 -> ARM710A, following information from reinoud.
1.4	25-Feb-2001	bjh21	Guess a CPU ID for the ARM700 as well.
1.3	25-Feb-2001	bjh21	Add possible CPU ID for ARM7500 (based on arm/cpu.h). Add macros to distinguish the three formats of CPU ID.
1.2	21-Feb-2001	bjh21	Add CPU_ID_CPU_MASK. Different, but (I hope) more useful definition than arm32 currently uses.
1.1	22-Jan-2001	bjh21	branches: 1.1.2; Initial potentially sharable <arm/armreg.h>. Used by all arm26 code.
1.1.2.3	12-Mar-2001	bouyer	Sync with HEAD.
1.1.2.2	11-Feb-2001	bouyer	Sync with HEAD.
1.1.2.1	22-Jan-2001	bouyer	file armreg.h was added on branch thorpej_scsipi on 2001-02-11 19:08:51 +0000
1.6.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.7.2.5	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.7.2.4	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.7.2.3	16-Mar-2002	jdolecek	Catch up with -current.
1.7.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.7.2.1	03-Aug-2001	lukem	update to -current
1.8.6.7	01-Aug-2002	nathanw	Catch up to -current.
1.8.6.6	20-Jun-2002	nathanw	Catch up to -current.
1.8.6.5	17-Apr-2002	nathanw	Catch up to -current.
1.8.6.4	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.8.6.3	28-Feb-2002	nathanw	Catch up to -current.
1.8.6.2	08-Jan-2002	nathanw	Catch up to -current.
1.8.6.1	18-Jul-2001	nathanw	file armreg.h was added on branch nathanw_sa on 2002-01-08 00:23:11 +0000
1.18.4.2	29-Jul-2002	lukem	Pull up revision 1.21 (requested by thorpej in ticket #549): Handle i80200 step D0 and i80321 step B0
1.18.4.1	07-Jun-2002	thorpej	pullup-1-6 ticket #208: syssrc/sys/arch/arm/arm/cpufunc.c 1.46 syssrc/sys/arch/arm/arm32/cpu.c 1.38 syssrc/sys/arch/arm/include/armreg.h 1.19 Original log message: Add the CPU ID for the 600MHz i80321 part.
1.18.2.3	30-Aug-2002	gehenna	catch up with -current.
1.18.2.2	16-Jul-2002	gehenna	catch up with -current.
1.18.2.1	14-Jul-2002	gehenna	catch up with -current.
1.25.2.5	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.25.2.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.25.2.3	18-Sep-2004	skrll	Sync with HEAD.
1.25.2.2	25-Aug-2004	skrll	Sync with HEAD.
1.25.2.1	03-Aug-2004	skrll	Sync with HEAD
1.32.2.3	26-Feb-2007	yamt	sync with head.
1.32.2.2	30-Dec-2006	yamt	sync with head.
1.32.2.1	21-Jun-2006	yamt	sync with head.
1.34.12.1	24-May-2006	tron	Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
1.34.10.1	19-Apr-2006	elad	sync with head - hopefully this will work
1.34.8.1	24-May-2006	yamt	sync with head.
1.34.6.1	22-Apr-2006	simonb	Sync with head.
1.34.4.1	09-Sep-2006	rpaulo	sync with head
1.35.10.1	10-Dec-2006	yamt	sync with head.
1.35.8.1	12-Jan-2007	ad	Sync with head.
1.36.2.1	21-Feb-2007	snj	branches: 1.36.2.1.4; Pull up following revision(s) (requested by matt in ticket #457): sys/arch/arm/include/cpufunc.h: revision 1.38 sys/arch/arm/arm/cpufunc.c: revision 1.78 sys/arch/arm/arm/cpufunc_asm_arm10.S: revision 1.6 sys/arch/arm/include/armreg.h: revision 1.37 sys/arch/arm/arm32/cpu.c: revision 1.64 sys/arch/arm/arm/cpufunc_asm_armv5.S: revision 1.3 sys/arch/arm/include/cpuconf.h: revision 1.13 sys/arch/arm/conf/files.arm: revision 1.82 sys/arch/arm/arm/cpufunc_asm_armv5_ec.S: revision 1.1 Scott Allan in http://mail-index.netbsd.org/port-arm/2006/07/31/0000.html Patch to add support for ARM9E
1.36.2.1.4.1	10-Nov-2007	matt	Add AT91 support from Sami Kantoluoto Add TI OMAP2430 support from Marty Fouts @ Danger Inc
1.37.50.4	09-Oct-2010	yamt	sync with head
1.37.50.3	11-Aug-2010	yamt	sync with head.
1.37.50.2	04-May-2009	yamt	sync with head.
1.37.50.1	16-May-2008	yamt	sync with head.
1.37.48.1	18-May-2008	yamt	sync with head.
1.37.46.2	28-Sep-2008	mjf	Sync with HEAD.
1.37.46.1	02-Jun-2008	mjf	Sync with HEAD.
1.37.26.1	28-Aug-2007	matt	Add ARM1176JS id. Add ARM11 PMC definition. Add cache P bit. Add cpuconf armv6 XP and UNAL enable bits.
1.38.6.1	19-Oct-2008	haad	Sync with HEAD.
1.38.4.1	28-Jul-2008	simonb	Sync with head.
1.38.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.41.16.3	21-Apr-2011	rmind	sync with head
1.41.16.2	05-Mar-2011	rmind	sync with head
1.41.16.1	03-Jul-2010	rmind	sync with head
1.41.14.2	22-Oct-2010	uebayasi	Sync with HEAD (-D20101022).
1.41.14.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.41.12.3	26-Mar-2014	matt	sync with HEAD
1.41.12.2	24-Mar-2014	matt	merge l2ctrl from head
1.41.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.46.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.48.8.1	09-Aug-2012	jdc	branches: 1.48.8.1.2; Pull up revisions: src/sys/arch/evbarm/dev/plcomreg.h revisions 1.2,1.3,1.4 src/sys/arch/evbarm/conf/INTEGRATOR revision 1.65 src/sys/arch/evbarm/dev/plcom.c revisions 1.34,1.35,1.36,1.37,1.38,1.39,1.40 src/sys/arch/evbarm/ifpga/plcom_ifpga.c revisions 1.12,1.13,1.14 src/sys/arch/evbarm/dev/plcomvar.h revisions 1.9,1.10,1.11 src/sys/arch/evbarm/ifpga/plcom_ifpgavar.h revision 1.2 src/sys/arch/arm/arm/cpufunc.c revisions 1.105,1.108 src/sys/arch/arm/arm32/cpu.c revision 1.79 src/sys/arch/arm/include/armreg.h revisions 1.49,1.54 src/sys/arch/arm/arm32/pmap.c revision 1.229 src/sys/arch/arm/arm32/arm32_machdep.c revision 1.77 src/sys/arch/arm/include/cpu.h revision 1.64 src/sys/arch/arm/arm/cpufunc_asm_arm1136.S revision 1.3 src/sys/arch/arm/arm/cpufunc_asm_arm11x6.S revision 1.1 src/sys/arch/arm/conf/files.arm revision 1.106 src/sys/arch/arm/include/cpufunc.h revision 1.57 src/sys/dev/sdmmc/sdhc.c revisions 1.14,1.24 src/sys/dev/sdmmc/sdhcvar.h revisions 1.7,1.8 src/sys/arch/evbarm/ifpga/ifpgareg.h revision 1.4 src/sys/arch/evbarm/integrator/integrator_machdep.c revision 1.69 src/sys/arch/arm/broadcom/bcm2835_dma.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_emmc.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_intr.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_intr.h revision 1.1 src/sys/arch/arm/broadcom/bcm2835_obio.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_plcom.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_pm.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_pmvar.h revision 1.1 src/sys/arch/arm/broadcom/bcm2835_space.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_tmr.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835reg.h revision 1.1 src/sys/arch/arm/broadcom/bcm2835var.h revision 1.1 src/sys/arch/arm/broadcom/bcm_amba.h revision 1.1 src/sys/arch/arm/broadcom/files.bcm2835 revision 1.1 src/sys/arch/evbarm/Makefile revision 1.9 src/sys/arch/evbarm/conf/RPI revision 1.1 src/sys/arch/evbarm/conf/files.rpi revision 1.1 src/sys/arch/evbarm/conf/mk.rpi revision 1.1 src/sys/arch/evbarm/conf/std.rpi revision 1.1 src/sys/arch/evbarm/rpi/genassym.cf revision 1.1 src/sys/arch/evbarm/rpi/rpi.h revision 1.1 src/sys/arch/evbarm/rpi/rpi_machdep.c revision 1.1 src/sys/arch/evbarm/rpi/rpi_start.S revision 1.1,1.2 src/etc/etc.evbarm/Makefile.inc revision 1.28 (requested by skrll in ticket #454). don't mix #define<TAB> and #define<SPACE> in a file. avoid warning with options PLCOM_DEBUG for INTEGRATOR. Rename register values. No functional change - same code before and after. Existing names are prefixed with PL01X_ where they're common between the PL010 and the PL011. The PL010_/PL011_ prefixes are added where they're found only on the respective chips. Replace the simple_lock with a kmutex_t. Update the locking to match com(4) in the few places it didn't already. DOH. Replace a line that got accidently deleted in the last commit. device_t/softc split struct device * -> device_t struct cfdata * -> cfdata_t Add the 'Z' to the 1176 cpu product name. ok matt@ Fix locking botch introduced in 1.36. Fix a KASSERT. From/OK'ed by matt@ Fix racy softint dispatch that lead to KASSERT(si->si_active) in softint_execute Discussed with matt@. "Looks good to me" Add the documented ARM11[37]6 Auxiliary control register defines. Add support for the ARM1176JZS Add a flag for the lack of LED_ON in HOST_CTL (ti omap3 doesn't do that). Provide a method for attachments to specify capabilites. Add support for the PL011 to plcom. Pull across a bunch of fixes from com(4) while I'm here and do some other tidyup. Tested on a RaspberryPi. PL010 not tested. Initial commit of support for the RaspberryPI (www.raspberrypi.org) This is enough for serial console via the gpio header pins and to get to multiuser. A huge thank you to Matt Thomas for all his help. Add RPI to KERNEL_SETS Remove #if 0 code.
1.48.8.1.2.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.48.6.1	02-Jun-2012	mrg	sync to latest -current.
1.48.2.5	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.48.2.4	23-Jan-2013	yamt	sync with head
1.48.2.3	16-Jan-2013	yamt	sync with (a bit old) head
1.48.2.2	30-Oct-2012	yamt	sync with head
1.48.2.1	23-May-2012	yamt	sync with head.
1.65.2.5	03-Dec-2017	jdolecek	update from HEAD
1.65.2.4	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.65.2.3	23-Jun-2013	tls	resync from head
1.65.2.2	25-Feb-2013	tls	resync with head
1.65.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.80.2.2	18-May-2014	rmind	sync with head
1.80.2.1	28-Aug-2013	rmind	sync with head
1.95.2.1	10-Aug-2014	tls	Rebase.
1.97.2.3	26-Jul-2017	snj	Pull up following revision(s) (requested by jmcneill in ticket #1435): sys/arch/arm/arm32/cpu.c: 1.113 via patch sys/arch/arm/broadcom/bcm2835_bsc.c: 1.6 via patch sys/arch/arm/broadcom/bcm2835_plcom.c: 1.4 via patch sys/arch/arm/cortex/gtmr.c: 1.18 via patch sys/arch/arm/include/armreg.h: 1.110 via patch sys/arch/arm/include/vfpreg.h: 1.15 via patch sys/arch/arm/vfp/vfp_init.c: 1.50 via patch sys/arch/evbarm/rpi/rpi_machdep.c: 1.59, 1.70-1.72 via patch sys/arch/evbarm/rpi/vcprop.h: 1.16 Get the RPI3 working (in aarch32 mode) by recognising Cortex A53 CPUs. While I'm here add some A57/A72 info as well. My RPI3 works with FB console - the uart needs some help with its clocks. -- Do invalidate the cache as RPI2 build with Clang can't fetch the memory config otherwise. -- Use the VC property mailbox to request the UART clock rate and use it appropriately Newer firmwares use 48MHz -- Disable BSC0 on Raspberry Pi 3 and Zero W boards. -- Interrupts are enabled before the timer is configured. Ensure that the timer is disabled when attaching so it doesn't go crazy between the time interrupts are enabled and clocks are initialized. My RPI3 makes it multi-user now. -- Enable UART0 (PL011) on GPIO header for Raspberry Pi 3 / Zero W
1.97.2.2	08-Dec-2016	snj	Pull up following revision(s) (requested by msaitoh in ticket #1287): sys/arch/arm/include/armreg.h: revision 1.111 Fix CORTEXA9Rx definitions.
1.97.2.1	09-Nov-2014	martin	branches: 1.97.2.1.4; Pull up following revision(s) (requested by skrll in ticket #188): sys/arch/arm/include/arm32/pmap.h: revision 1.136 sys/arch/arm/include/armreg.h: revision 1.100 sys/arch/arm/cortex/gic.c: revision 1.11 sys/arch/arm/arm32/db_interface.c: revision 1.54 sys/arch/arm/include/armreg.h: revision 1.101 sys/arch/arm/cortex/gic.c: revision 1.12 sys/arch/arm/arm32/arm32_machdep.c: revision 1.107 sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.19 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.20 sys/arch/evbarm/conf/BPI: revision 1.5 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.21 sys/arch/arm/arm32/pmap.c: revision 1.306 sys/arch/arm/arm32/db_machdep.c: revision 1.22 sys/arch/arm/arm32/arm32_tlb.c: revision 1.3 sys/arch/arm/arm/undefined.c: revision 1.55 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.22 sys/arch/arm/arm32/pmap.c: revision 1.307 sys/arch/arm/arm32/arm32_tlb.c: revision 1.4 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.23 sys/arch/arm/arm32/arm32_tlb.c: revision 1.5 sys/arch/evbarm/conf/BPI: revision 1.8 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.24 sys/arch/arm/arm32/arm32_tlb.c: revision 1.6 sys/arch/arm/arm32/arm32_tlb.c: revision 1.7 sys/arch/evbarm/conf/CUBIETRUCK: revision 1.5 sys/arch/arm/pic/pic.c: revision 1.23 sys/arch/arm/pic/pic.c: revision 1.24 sys/arch/arm/pic/picvar.h: revision 1.11 sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.20 sys/arch/arm/mainbus/cpu_mainbus.c: revision 1.16 sys/arch/arm/arm32/pmap.c: revision 1.298 sys/arch/arm/arm/cpufunc_asm_arm11.S: revision 1.17 sys/arch/arm/arm/cpufunc_asm_pj4b.S: revision 1.5 sys/arch/arm/arm32/pmap.c: revision 1.310 sys/arch/arm/arm32/pmap.c: revision 1.311 sys/arch/arm/arm32/arm32_kvminit.c: revision 1.32 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.19 sys/arch/arm/arm32/arm32_boot.c: revision 1.10 sys/arch/arm/arm/ast.c: revision 1.25 sys/arch/arm/include/armreg.h: revision 1.98 sys/uvm/pmap/pmap_tlb.c: revision 1.10 sys/arch/arm/arm32/arm32_boot.c: revision 1.8 sys/arch/arm/arm32/arm32_boot.c: revision 1.9 sys/arch/arm/arm/arm_machdep.c: revision 1.43 Various ARM MP fixes.
1.97.2.1.4.1	18-Jan-2017	skrll	Sync with netbsd-5
1.102.2.5	29-May-2016	skrll	Sync with HEAD
1.102.2.4	19-Mar-2016	skrll	Sync with HEAD
1.102.2.3	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.102.2.2	22-Sep-2015	skrll	Sync with HEAD
1.102.2.1	06-Jun-2015	skrll	Sync with HEAD
1.111.14.1	13-Dec-2017	matt	Add Cortex-A35 definitions
1.118.2.5	06-Sep-2018	pgoyette	Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
1.118.2.4	28-Jul-2018	pgoyette	Sync with HEAD
1.118.2.3	21-May-2018	pgoyette	Sync with HEAD
1.118.2.2	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.118.2.1	22-Mar-2018	pgoyette	Synch with HEAD, resolve conflicts
1.121.2.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.121.2.1	10-Jun-2019	christos	Sync with HEAD
1.127.2.1	13-Aug-2019	martin	Pull up following revision(s) (requested by jmcneill in ticket #54): sys/arch/aarch64/include/armreg.h: revision 1.26 sys/arch/arm/cortex/gtmr.c: revision 1.41 sys/arch/arm/include/armreg.h: revision 1.128 sys/arch/arm/cortex/gtmr_var.h: revision 1.12 Add support for physical timers and sprinkle isb where needed.
1.129.8.1	03-Apr-2021	thorpej	Sync with HEAD.
1.8	02-Apr-2022	skrll	Update to support EFI runtime outside the kernel virtual address space by creating an EFI RT pmap that can be activated / deactivated when required. Adds support for EFI RT to ARM_MMU_EXTENDED (ASID) 32-bit Arm machines. On Arm64 the usage of pmapboot_enter is reduced and the mappings are created much later in the boot process -- now in cpu_startup_hook. Backward compatiblity for KVA mapped RT from old bootaa64.efi is maintained. Adding support to other platforms should be easier as a result.
1.7	27-Jan-2021	skrll	Style. NFCI.
1.6	10-Sep-2020	maxv	branches: 1.6.2; kasan: fix the copyright notices
1.5	05-Sep-2020	riastradh	Round of uvm.h cleanup. The poorly named uvm.h is generally supposed to be for uvm-internal users only. - Narrow it to files that actually need it -- mostly files that need to query whether curlwp is the pagedaemon, which should maybe be exposed by an external header. - Use uvm_extern.h where feasible and uvm_*.h for things not exposed by it. We should split up uvm_extern.h but this will serve for now to reduce the uvm.h dependencies. - Use uvm_stat.h and #ifdef UVMHIST uvm.h for files that use UVMHIST(ubchist), since ubchist is declared in uvm.h but the reference evaporates if UVMHIST is not defined, so we reduce header file dependencies. - Make uvm_device.h and uvm_swap.h independently includable while here. ok chs@
1.4	28-Aug-2020	skrll	Some KASAN fixes and tweaks - don't access BSS variables when __md_early - centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new INIT_ARM_TOTAL_STACK - Only create L1PT entries in kasan_md_shadow_map_page if arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries) - Add some comments to explain what's going on
1.3	19-Jul-2020	skrll	Fix RPI boot which needs more early stack XXX centralise INIT_ARM_STACK_{SHIFT,SIZE} XXX how to protect against this breaking again?
1.2	10-Jul-2020	skrll	Oops... deal with a last minute #define name change. KASAN support now builds.
1.1	10-Jul-2020	skrll	Add support for KASAN on ARMv[67] Thanks to maxv for many pointers and reviews.
1.6.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.39	07-May-2025	uwe	arm: asm.h - change GOT_INIT to take the normal asm label Don't pass the label to use for the "current address" as the macro parameter. It obscures its purpose and makes the use of local labels extremely unobvious, so you are forced to invent a name that is mostly useless otherwise: GOT_INIT(r3, .Lgot.execsp_start, .Lpc.execsp_start) GOT_INITSYM(.Lgot.execsp_start, .Lpc.execsp_start) vs. 0: GOT_INIT(r3, .Lgot.execsp_start) GOT_INITSYM(.Lgot.execsp_start, 0b) Same object code is generated.
1.38	07-May-2025	uwe	arm: asm.h - no ## at token boundaries For the ## "if the result is not a valid preprocessing token, the behavior is undefined", so you 1) don't need to 2) must not use it to concatenate a token with a non-token, like .arg or arg() The point is kinda moot, as traditionally asm with cpp uses traditional cpp, not ANSI cpp (many assemblers use # for literals, which conflicts with the ANSI CPP # stringization and requires awkward workarounds), but don't set a bad example even if it never gets called out by the compiler.
1.37	06-May-2025	uwe	arm/asm.h: revert PCREL_GET &c in previous (ok riastradh) This change needs to be redone and re-verified. I have detailed some issues in the PR, and it also turns out that some of the changes were in the !_REENTRANT branch of #ifdef and thus not checked at all. riastradh asked to back out the changes for now. PR lib/59391: unnecessary __PIC__ conditionals clutter .S files
1.36	03-May-2025	riastradh	arm: Nix most __PIC__ conditionals in .S files. New macros PCREL_GET(rN,label,pclabel) and PCREL_SYM(label,pclabel) to enable this by the pattern: ldr rN, label #ifdef __PIC__ pclabel: add rN, rN, pc #endif ... label: #ifdef __PIC__ .word (label - (pclabel + 2*sizeof(instruction))) #else .word label #endif (sizeof(instruction) = 2 for thumb, 4 for non-thumb.) No binary change in libc with MKPIE=no (i.e., testing both for changes to the PIC build and changes to the non-PIC build). In principle, assembly routines could improve instruction scheduling by splitting up the ldr and add instructions. But in practice, the maintenance and auditing burden likely makes this worthwhile by improving legibility vs a tangle of in-line #ifdefs. brk.S does things a little differently making it harder to unify. Could redo it but I don't want to make changes without testing them first. PR lib/59391: unnecessary __PIC__ conditionals clutter .S files
1.35	09-Jun-2024	riastradh	branches: 1.35.2; arm/asm.h: Respect NETBSD_REVISIONID.
1.34	23-Apr-2020	jakllsch	Fix userland gprof profiling on aarch64. Adjusts _PROF_PROLOGUE to match OpenBSD; reworks our MCOUNT to retrieve frompc placed on stack by the prologue, and to streamline sp manipulation when preserving argument registers.
1.33	21-Apr-2020	joerg	LLVM is a bit stricter and wants the ARM variant of %progbits.
1.32	17-Apr-2020	joerg	Mark the .ident section as mergable string section to avoid redundant entries.
1.31	13-Apr-2020	maxv	Add support for Branch Target Identification (BTI). On the executable pages that have the GP (Guarded Page) bit, the semantic of the "br" and "blr" instructions is changed: the CPU expects the first instruction of the jump/call target to be "bti", and faults if it isn't. We add the GP bit on the kernel .text pages (and incidentally the .rodata pages, but we don't care). The compiler adds a "bti c" instruction at the beginning of each C function. We modify the ENTRY() macros to manually add "bti c" in the asm functions. cpuswitch.S needs a specific change: with "br x27" the CPU expects "bti j", which is bad because the functions begin with "bti c"; switch to "br x16", for the CPU to accept "bti c". BTI helps defend against JOP/COP. Tested on Qemu.
1.30	27-Jan-2019	dholland	branches: 1.30.10; fix duplicated chunk from merge
1.29	27-Jan-2019	pgoyette	Merge the [pgoyette-compat] branch
1.28	01-Apr-2018	ryo	branches: 1.28.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.27	04-Mar-2014	matt	branches: 1.27.28; Remove duplicate END(y) macro
1.26	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.25	30-Nov-2013	matt	arm doesn't need to use (PLT) anymore.
1.24	12-Sep-2013	joerg	Pass PICFLAGS down to cc-as-as and use __PIC__ to decide if it is small vs big PIC mode. Retire -DPIC and -DBIGPIC.
1.23	19-Aug-2013	matt	Do alternative text sections better, add a _TEXT_SECTION which defaults to .text but can be overridden before <arm/asm.h> gets included.
1.22	18-Aug-2013	matt	remove __thumb__ PIC specifics. no different from ARM except being pc+4 not pc+8
1.21	16-Aug-2013	matt	Don't define RETc if Thumb1 Add REL_SYM(a, b) Make GOT_INIT* thumb aware.
1.20	13-Aug-2013	matt	Add _THUMB_ENTRY and _ARM_ENTRY which do the appropriate things including switching instruction sets. Use __thumb__ to decide which _ENTRY gets defined as
1.19	11-Aug-2013	matt	Switch to unified syntax use it to get condition return on thumb
1.18	07-Aug-2013	matt	Add KMODTRAMPOLINE(name) There are 3 variations: one for armv7 using movw ip,#:lower16:func; movt ip,#:upper16:func; bx ip one for armv4t+ using ldr ip, pc; bx ip; .word func one for everything else using ldr pc, [pc, #-4]; .word func
1.17	28-Jan-2013	matt	branches: 1.17.2; Add a RETr(r) macro (indirect return through register r).
1.16	01-Sep-2012	matt	branches: 1.16.2; Add __BITS to asm.h (remove from imxuartreg.h) Add L1_S_AP_KR to genassym.h Use L1_S_AP_* in omap_start.S and don't include pmap.h
1.15	29-Aug-2012	matt	Add __BIT(n) macro
1.14	30-Jun-2011	wiz	branches: 1.14.2; 1.14.10; dependant -> dependent
1.13	20-Dec-2010	joerg	Consistently use .gnu.warning with .pushsectio and .popsection on all architectures instead of obsolete STABS frames for linker warnings.
1.12	29-Aug-2008	matt	branches: 1.12.12; 1.12.16; Remove non-__ELF__ support. Use .pushsection/.popsection for RCSID.
1.11	27-Apr-2008	matt	branches: 1.11.2; 1.11.6; Merge kernel changes in matt-armv6 to HEAD.
1.10	17-Oct-2007	garbled	branches: 1.10.16; 1.10.18; 1.10.20; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.9	26-Aug-2007	matt	branches: 1.9.2; Move _ARM_ARCH_* from asm.h to cdefs.h so everyone can use them. Add _END/END/ASEND which every port's asm.h should have. Add GET_CPUFINO(rX). Reserved for future use. :) Use %foo instead of #foo
1.8	20-Jan-2006	christos	branches: 1.8.28; 1.8.36; 1.8.42; 1.8.44; 1.8.46; 1.8.48; Add a STRONG_ALIAS macro
1.7	11-Dec-2005	christos	branches: 1.7.2; merge ktrace-lwp.
1.6	21-Aug-2004	rearnsha	branches: 1.6.12; Define _ARM_ARCH_6, _ARM_ARCH_5 and _ARM_ARCH_4T, based on architecture defines passed from the compiler. Define RET and RETc macros for return and conditional return. If BX is available in the current instruction set then make use of it. Note: these really are from the compiler's -march/-mcpu flags, not from the kernel config, so they can be relied on in user space.
1.5	07-Aug-2003	agc	Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.4	16-Jul-2001	matt	branches: 1.4.6; 1.4.24; Change way PIC stuff is emitted for ELF to be more flexible.
1.3	14-Jul-2001	matt	Add a GOTSYM which emits the right stuff to GOT symbols under ELF and/or a.out.
1.2	26-Apr-2001	bjh21	branches: 1.2.2; Add ELF version of _PROF_PROLOGUE.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.4; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.4.1	21-Jun-2001	nathanw	Catch up to -current.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file asm.h was added on branch thorpej_scsipi on 2001-01-10 19:02:06 +0000
1.2.2.1	03-Aug-2001	lukem	update to -current
1.4.24.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.24.3	18-Sep-2004	skrll	Sync with HEAD.
1.4.24.2	25-Aug-2004	skrll	Sync with HEAD.
1.4.24.1	03-Aug-2004	skrll	Sync with HEAD
1.4.6.2	16-Jul-2001	matt	Change way PIC stuff is emitted for ELF to be more flexible.
1.4.6.1	16-Jul-2001	matt	file asm.h was added on branch nathanw_sa on 2001-07-16 05:43:33 +0000
1.6.12.2	03-Sep-2007	yamt	sync with head.
1.6.12.1	21-Jun-2006	yamt	sync with head.
1.7.2.1	01-Feb-2006	yamt	sync with head.
1.8.48.1	01-Jan-2008	chris	Sync with HEAD.
1.8.46.1	03-Sep-2007	jmcneill	Sync with HEAD.
1.8.44.1	01-Nov-2007	rjs	Sync with HEAD.
1.8.42.1	03-Sep-2007	skrll	Sync with HEAD.
1.8.36.1	03-Oct-2007	garbled	Sync with HEAD
1.8.28.1	09-Oct-2007	ad	Sync with head.
1.9.2.1	28-Aug-2007	matt	Support thumb code. Add convience macros.
1.10.20.2	04-May-2009	yamt	sync with head.
1.10.20.1	16-May-2008	yamt	sync with head.
1.10.18.1	18-May-2008	yamt	sync with head.
1.10.16.2	28-Sep-2008	mjf	Sync with HEAD.
1.10.16.1	02-Jun-2008	mjf	Sync with HEAD.
1.11.6.1	19-Oct-2008	haad	Sync with HEAD.
1.11.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.12.16.1	05-Mar-2011	rmind	sync with head
1.12.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.14.10.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.14.2.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.14.2.1	30-Oct-2012	yamt	sync with head
1.16.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.16.2.1	25-Feb-2013	tls	resync with head
1.17.2.2	18-May-2014	rmind	sync with head
1.17.2.1	28-Aug-2013	rmind	sync with head
1.27.28.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.28.2.2	21-Apr-2020	martin	Sync with HEAD
1.28.2.1	10-Jun-2019	christos	Sync with HEAD
1.30.10.2	25-Apr-2020	bouyer	Sync with bouyer-xenpvh-base2 (HEAD)
1.30.10.1	20-Apr-2020	bouyer	Sync with HEAD
1.35.2.1	02-Aug-2025	perseant	Sync with HEAD
1.12	26-Sep-2020	skrll	G/C arm/atomic.h
1.11	19-Nov-2008	matt	This is not longer needed since atomic_{set\|clear}_bit are now dead. So temporarily this has no contents.
1.10	13-Jan-2008	chris	branches: 1.10.6; 1.10.10; 1.10.16; 1.10.18; When manipulating the interrupt status for atomic ops use cpsr_c rather than cpsr_all, this avoids updating unnecessary fields in the cpsr. As a side effect, the inline versions no longer clobber the condition codes.
1.9	04-Mar-2007	matt	branches: 1.9.8; 1.9.16; 1.9.20; 1.9.22; 1.9.28; 1.9.34; Don't export to userland functions that will only be used in the kernel.
1.8	28-Feb-2007	bjh21	PROG26 version of __with_interrupts_disabled(), and hence of the various functions in this file.
1.7	19-Feb-2007	he	Fix a typo, spotted by martin (I stared myself blind on that one...).
1.6	18-Feb-2007	matt	Add <arm/mutex.h> and <arm/rwlock.h> Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>
1.5	28-Dec-2005	perry	branches: 1.5.26; inline -> __inline
1.4	24-Dec-2005	perry	Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.3	11-Dec-2005	christos	merge ktrace-lwp.
1.2	26-Nov-2003	bsh	branches: 1.2.16; fix typo pointed out by Olivier Houchard. thanks.
1.1	19-Oct-2002	bsh	branches: 1.1.2; 1.1.4; 1.1.10; make atomic_{set,clear}_bit() inline for arm32 ports, and add <machine/atomic.h> for them.
1.1.10.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.1.10.2	18-Sep-2004	skrll	Sync with HEAD.
1.1.10.1	03-Aug-2004	skrll	Sync with HEAD
1.1.4.2	11-Nov-2002	nathanw	Catch up to -current
1.1.4.1	19-Oct-2002	nathanw	file atomic.h was added on branch nathanw_sa on 2002-11-11 21:56:46 +0000
1.1.2.2	24-Oct-2002	bjh21	Sync with trunk.
1.1.2.1	19-Oct-2002	bjh21	file atomic.h was added on branch bjh21-hydra on 2002-10-24 22:33:49 +0000
1.2.16.4	21-Jan-2008	yamt	sync with head
1.2.16.3	03-Sep-2007	yamt	sync with head.
1.2.16.2	26-Feb-2007	yamt	sync with head.
1.2.16.1	21-Jun-2006	yamt	sync with head.
1.5.26.2	12-Mar-2007	rmind	Sync with HEAD.
1.5.26.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.9.34.1	19-Jan-2008	bouyer	Sync with HEAD
1.9.28.1	18-Feb-2008	mjf	Sync with HEAD.
1.9.22.1	23-Mar-2008	matt	sync with HEAD
1.9.20.1	20-Jan-2008	chris	Sync to HEAD.
1.9.16.1	28-Feb-2008	rjs	Sync with HEAD.
1.9.8.1	19-Apr-2007	thorpej	Convert to the new atomic ops API.
1.10.18.1	19-Jan-2009	skrll	Sync with HEAD.
1.10.16.1	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.10.10.1	04-May-2009	yamt	sync with head.
1.10.6.1	17-Jan-2009	mjf	Sync with HEAD.
1.3	06-Oct-2021	skrll	More trailing whitespace
1.2	02-Jun-2001	bjh21	branches: 1.2.2; 1.2.10; Add write_multi_1().
1.1	30-May-2001	bjh21	Move the declarations of blockio.S functions from katelib.h to a new, exciting <arm/blockio.h>. katelib.h includes it for compatibility.
1.2.10.2	02-Jun-2001	bjh21	Add write_multi_1().
1.2.10.1	02-Jun-2001	bjh21	file blockio.h was added on branch nathanw_sa on 2001-06-02 10:44:57 +0000
1.2.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.10	18-Oct-2020	skrll	Trailing whitespace
1.9	03-Mar-2018	skrll	Multiple inclusion protection
1.8	28-May-2017	jmcneill	Add a few bootconfig helpers: - get_bootconf_string: returns a copy of the "value" part of a k=v pair as a string. - match_bootconf_option: returns true if the "value" part of a k=v pair exists and the supplied val param is present in the beginning of the k=v pair's value.
1.7	06-Jan-2015	jmcneill	add BOOTOPT_TYPE_MACADDR for parsing mac address parameters
1.6	31-Aug-2012	matt	branches: 1.6.2; 1.6.14; 1.6.16; Make cpu_reset, most of initarm and the kvm init code common. Add MP hooks for cpu_need_resced Add idlestck which is allocated in arm32_kvminit
1.5	14-Mar-2009	dsl	branches: 1.5.12; 1.5.20; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.4	26-Oct-2006	bjh21	branches: 1.4.58; 1.4.66; 1.4.72; 1.4.76; boot_file is not used by generic NetBSD/arm code, and its type varies by MACHINE. Thus, move it out of <arm/bootconfig.h> and put it into <machine/bootconfig.h> on those MACHINEs (cats, hpcarm, and shark) where it's used outside the file in which it's defined.
1.3	11-Dec-2005	christos	branches: 1.3.20; 1.3.22; merge ktrace-lwp.
1.2	02-Jun-2005	he	branches: 1.2.2; Adapt to shadowing and qualifier-cast warnings.
1.1	13-May-2001	bjh21	branches: 1.1.2; 1.1.10; 1.1.28; Add <machine/bootconfig.h> on arm26, and add an <arm/bootconfig.h> for it to include (since all the contents are MI).
1.1.28.1	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.1.10.2	13-May-2001	bjh21	Add <machine/bootconfig.h> on arm26, and add an <arm/bootconfig.h> for it to include (since all the contents are MI).
1.1.10.1	13-May-2001	bjh21	file bootconfig.h was added on branch nathanw_sa on 2001-05-13 13:46:24 +0000
1.1.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.2.2.1	30-Dec-2006	yamt	sync with head.
1.3.22.1	10-Dec-2006	yamt	sync with head.
1.3.20.1	18-Nov-2006	ad	Sync with head.
1.4.76.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.4.72.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.4.66.1	28-Apr-2009	skrll	Sync with HEAD.
1.4.58.1	04-May-2009	yamt	sync with head.
1.5.20.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.5.12.1	30-Oct-2012	yamt	sync with head
1.6.16.2	28-Aug-2017	skrll	Sync with HEAD
1.6.16.1	06-Apr-2015	skrll	Sync with HEAD
1.6.14.1	21-Mar-2015	snj	Pull up following revision(s) (requested by jmcneill in ticket #598): sys/arch/arm/amlogic/amlogic_board.c: up to revision 1.9 sys/arch/arm/amlogic/amlogic_canvasreg.h: revision 1.1 sys/arch/arm/amlogic/amlogic_com.c: up to revision 1.4 sys/arch/arm/amlogic/amlogic_comreg.h: up to revision 1.3 sys/arch/arm/amlogic/amlogic_comvar.h: revision 1.1 sys/arch/arm/amlogic/amlogic_cpufreq.c: up to revision 1.2 sys/arch/arm/amlogic/amlogic_crureg.h: up to revision 1.7 sys/arch/arm/amlogic/amlogic_dwctwo.c: up to revision 1.2 sys/arch/arm/amlogic/amlogic_genfb.c: revision 1.1 sys/arch/arm/amlogic/amlogic_gmac.c: up to revision 1.2 sys/arch/arm/amlogic/amlogic_hdmireg.h: revision 1.1 sys/arch/arm/amlogic/amlogic_intr.h: up to revision 1.5 sys/arch/arm/amlogic/amlogic_io.c: up to revision 1.7 sys/arch/arm/amlogic/amlogic_reg.h: up to revision 1.9 sys/arch/arm/amlogic/amlogic_rng.c: revision 1.1 sys/arch/arm/amlogic/amlogic_sdhc.c: up to revision 1.3 sys/arch/arm/amlogic/amlogic_sdhcreg.h: revision 1.1 sys/arch/arm/amlogic/amlogic_space.c: revision 1.1 sys/arch/arm/amlogic/amlogic_var.h: up to revision 1.8 sys/arch/arm/amlogic/amlogic_vpureg.h: revision 1.1 sys/arch/arm/arm/bootconfig.c: revisions 1.7-1.8 sys/arch/arm/conf/files.arm: revision 1.129 sys/arch/arm/cortex/pl310.c: revisions 1.16-1.17 sys/arch/arm/cortex/a9_mpsubr.S: revisions 1.25-1.29 sys/arch/arm/cortex/a9tmr.c: revisions 1.8-1.12 sys/arch/arm/cortex/a9tmr_var.h: revision 1.4 sys/arch/arm/cortex/a9wdt.c: revisions 1.3-1.4 sys/arch/arm/cortex/armperiph.c: revisions 1.5-1.7 sys/arch/arm/arm/cpufunc.c: revision 1.151 sys/arch/arm/include/bootconfig.h: revision 1.7 sys/arch/arm/include/locore.h: revision 1.19 sys/arch/evbarm/amlogic/amlogic_machdep.c: up to revision 1.17 sys/arch/evbarm/amlogic/amlogic_start.S: up to revision 1.2 sys/arch/evbarm/amlogic/genassym.cf: revision 1.1 sys/arch/evbarm/amlogic/platform.h: revision 1.1 sys/arch/evbarm/conf/files.amlogic: up to revision 1.8 sys/arch/evbarm/conf/std.amlogic: up to revision 1.2 sys/arch/evbarm/conf/mk.amlogic: revision 1.1 sys/arch/evbarm/conf/ODROID-C1: up to revision 1.12 sys/arch/evarm/conf/ODROID-C1_INSTALL: revision 1.1 Don't use not as a variable since it's reserved in C++. -- clean the a9 l2 cache before turning it on. -- Add Cortex-A17 support -- Fix CORTEXA17 support -- Let the "cbar" device property override the cbar value, to work around broken bootloaders -- add a helper to update a9tmr frequency -- detach and re-attach timecounter when updating freq, and reinit timer on each cpu -- fix typo -- add BOOTOPT_TYPE_MACADDR for parsing mac address parameters -- make sure we set ACTLR.SMP=1 for CPU_CORTEXA5 in !MP case, ok matt@ -- According to the Cortex-A5 TRM, the CBAR register is not implemented and always reads as 0x00000000. Add ARM_CBAR option to set this in kernel config. -- skip a TLBIALL on Cortex-A5 that stops my odroid-c1 from booting, ok matt -- match on Cortex-A5 -- match on Cortex-A5 -- allow arml2cc to be used on Cortex-A5 if the "offset" property is specified -- print "A5" instead of "A9" at attach time if running on a Cortex-A5 -- Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland -- Work-in-progress Odroid-C1 support. -- no need to override ARM_CBAR, remove unused COM_16750 option -- Add basic serial console support. -- add dwctwo and usb devices -- ODROID-C1 SMP support. -- auto-detect RAM size -- ODROID-C1 onboard ethernet support. -- add amlogicrng, add commented-out genfb placeholder -- enable amlogicsdhc -- add ODROID-C1 install kernel -- Add CPUFREQ option to set boot CPU frequency. ODROID-C1 is advertised as quad-core 1.5GHz but boots up at 1.2GHz; add CPUFREQ=1512 to config and make sure to set the correct speed before attaching CPUs. The speed can still be scaled down with machdep.cpu sysctls. -- disable DEBUG, LOCKDEBUG, VERBOSE_INIT_ARM -- Basic framebuffer console support. Work in progress.
1.6.2.1	03-Dec-2017	jdolecek	update from HEAD
1.6	29-Jan-2014	matt	Add latent AArch64 support.
1.5	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.4	31-Jan-2006	dsl	branches: 1.4.112; 1.4.122; 1.4.128; Change sys/arch/xxx/include/bswap.h to #include machine/byte_swap.h then sys/bswap.h in order to pick up the MD inline routines and the constant folding definitions in the right order. Code can include either sys/bswap.h or machine/bswap.h with the same effect.
1.3	14-Aug-2002	thorpej	branches: 1.3.24; 1.3.36; * Rename "word" -> 16, and "long" -> 32, as suggested by Ben Harris. * Replace __byte_swap_32_variable() with a C version from Richard Earnshaw that generates nearly identical assembly (and it would be exactly identical with the addition of another peephole to GCC ARM back-end).
1.2	13-Aug-2002	thorpej	Byte-swapping optimizations, enabled if compiling with GCC: * Byte-swap 16-bit and 32-bit constants at compile-time. * Inline 16-bit and 32-bit variable byte-swaps. These take 3 and 4 insns, respectively, and inlining saves the minimum 6 cycle penalty to call/return from the byte swap function.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.6; 1.1.10; 1.1.18; 1.1.20; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.20.2	18-Nov-2002	he	Pull up revision 1.3 (requested by thorpej in ticket #673): Rename ``word'' -> 16 and ``long'' -> 32. Replace __byte_swap_32_variable() with a C version that generates nearly identical assembly.
1.1.20.1	18-Nov-2002	he	Pull up revision 1.2 (requested by thorpej in ticket #667): Byte-swapping optimizations, enabled if compiling with GCC: o Byte-swap 16-bit and 32-bit constants at compile-time o Inline 16-bit and 32-bit variable byte-swaps
1.1.18.1	30-Aug-2002	gehenna	catch up with -current.
1.1.10.1	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.1.6.1	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file bswap.h was added on branch thorpej_scsipi on 2001-01-10 19:02:06 +0000
1.3.36.1	01-Feb-2006	yamt	sync with head.
1.3.24.1	21-Jun-2006	yamt	sync with head.
1.4.128.1	18-May-2014	rmind	sync with head
1.4.122.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.4.112.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.21	17-Jul-2011	dyoung	On ARM-ish ports having PCI support, use new-style <sys/bus.h>. Do not install <machine/bus.h>. Remove various <machine/bus.h> sources.
1.20	14-Mar-2009	dsl	branches: 1.20.2; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.19	28-Apr-2008	martin	branches: 1.19.8; 1.19.14; 1.19.18; Remove clause 3 and 4 from TNF licenses
1.18	04-Mar-2007	christos	branches: 1.18.42; 1.18.44; 1.18.46; Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
1.17	21-Feb-2007	mrg	add a pair of new bus_dma(9) functions: int _bus_dmatag_subregion(bus_dma_tag_t tag, bus_addr_t min_addr, bus_addr_t max_addr, bus_dma_tag_t *newtag, int flags) void _bus_dmatag_destroy(bus_dma_tag_t tag) that allow a (normally broken/limited) device to restrict the bus address range it can talk to. this is used by bce(4) to limit DMA addresses to 1GB range, the maximum the chip can address. all this is from Yorick Hardy <yhardy@uj.ac.za> with input from several people on tech-kern. XXX: bus_dma(9) needs an update still.
1.16	01-Mar-2006	yamt	branches: 1.16.20; merge yamt-uio_vmspace branch. - use vmspace rather than proc or lwp where appropriate. the latter is more natural to specify an address space. (and less likely to be abused for random purposes.) - fix a swdmover race.
1.15	11-Dec-2005	christos	branches: 1.15.2; 1.15.4; 1.15.6; merge ktrace-lwp.
1.14	09-Mar-2005	matt	branches: 1.14.4; Add a dm_maxsegsz public member to bus_dmamap_t. This allows a user of the API to select the maximum segment size for each bus_dmamap_load (up to the maxsegsz supplied to bus_dmamap_create). dm_maxsegsz is reset to the value supplied to bus_dmamap_create when the dmamap is unloaded.
1.13	09-Nov-2003	tsutsui	branches: 1.13.8; 1.13.10; Use #if defined(_KERNEL_OPT) to protect #include "opt_xxx.h" from building LKM etc. Suggested by mrg.
1.12	23-Oct-2003	scw	Add a defflag for __BUS_SPACE_HAS_STREAM_METHODS, and add the appropriate glue in bus.h, contingent on the option being defined. This allows stream methods to be available on a port-by-port basis.
1.11	28-Jul-2003	thorpej	Add an opaque cookie field to the bus dma tag.
1.10	15-Jun-2003	fvdl	branches: 1.10.2; Handle 64bit DMA addresses on PCI for platforms that can (currently only enabled on amd64). Add a dmat64 field to various PCI attach structures, and pass it down where needed. Implement a simple new function called pci_dma64_available(pa) to test if 64bit DMA addresses may be used. This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>, and there is more than 4G of memory.
1.9	28-Jan-2003	kent	Introduce BUS_DMA_NOCACHE, and bus_dmamem_map() of i386 supports it.
1.8	17-Aug-2002	thorpej	Use separate function pointers for dmamap_sync pre- vs post- operations. Change the bus_dmamap_sync() macro to test the ops argument against pre- and post- constants. The compiler will optimize out dead code because of the constants. Since post- operations are not needed on ARM (except for ISA bounce buffers), this eliminate a large number of function calls which are noops, each of which cost at least 6 cycles just in the call and return overhead (not to mention whatever other useless work the compiler decides to do in the callee).
1.7	14-Aug-2002	thorpej	* Add an ARM32_DMAMAP_COHERENT flag to indicate that a loaded DMA map contains "coherent" (non-cached in ARM-land) mappings. * Set ARM32_DMAMAP_COHERENT in the map at the start of a load operation, and clear it in _bus_dmamap_load_buffer() if we encounter any cacheable mappings. * In _bus_dmamap_sync(), if the map is marked COHERENT, skip any cache flushing.
1.6	31-Jul-2002	thorpej	Overhaul how DMA ranges work in the ARM bus_dma implementation. A new "arm32_dma_range" structure now describes a DMA window, with a system address base, bus address base, and length. In addition to providing info about which memory regions are legal for DMA, the new structure provides address translation support, as well. As before, if a tag does not list any ranges, then all addresses are considered valid, and no DMA address translation is performed. This allows us to remove a large chunk of code which was duplicated and tweaked slightly (to do the address translation) from the stock ARM bus_dma in the XScale IOP and ARM Integrator ports. Test compiled on all ARM platforms, test booted on Intel IQ80321 and Shark.
1.5	28-Jul-2002	thorpej	Change the way that DMA map syncs are done. Instead of remembering the virtual address for each DMA segment, just cache a pointer to the original buffer/buftype used to load the DMA map, and use that. This lets us shrink the bus_dma_segment_t down from 12 bytes to 8, and the cache flushing is also more efficient. Tested on an i80321 -- changes to others are mechanical.
1.4	25-Jan-2002	thorpej	branches: 1.4.8; 1.4.10; Overhaul bus_dmamap_sync for the ARM: * Track which process (XXX really, vmspace) owns the mapping. When we sync the map, if the mapping doesn't belong to the kernel or to the current process (XXX really, vmspace), then no cache fobbing is necessary, since the cache is Wb-Inv'd on context switch (XXX need to revisit this when we support FCSE). * Be smarter about which cache operation we do when sync'ing the map: - PREREAD -- Invalidate D$ (XXX right now, we actually do Wb-Inv) - PREWRITE -- Write-back D$ (note, we do NOT invalidate here) - PREREAD\|PREWRITE -- Wb-Inv D$ More work is needed here. In particular, a version for CPUs with write-through caches should be provided, to eliminate the write-back steps (which are noops on such CPUs, but skipping two branches would be nice).
1.3	10-Sep-2001	reinoud	branches: 1.3.4; Initial commitment of the bus_space_mmap() functions as proposed by Jason R Thorpe as an extension to the bus_space(9) API. Only the mainbus has a working mmap... iomd, podulebus and isa dont have one yet. Its trivial to add the iomd and isa's memory part but am a bit hessistant to add it without knowing its implications by heart. Podulebus might be implemented in 32 bits EASI but otherwise its not really transparent since there is AFAIK no function to explicitly read one byte or so .. or is this implemented in a higher level ? ARM26 and arch/arm32/dnard (Shark) kernels compile and RiscPC and Shark kernels are tested and function OK. Implications of other ARM systems like hpcarm and ebarm are propably minimal or solved trivially.
1.2	19-Jul-2001	thorpej	branches: 1.2.2; Add BUS_DMA_READ and BUS_DMA_WRITE flags, that hint the back-end at dmamap load time that the mapping will be used for a unidirectional transfer of the specified direction.
1.1	18-Jun-2001	bjh21	branches: 1.1.2; 1.1.4; Move <arm/arm32/bus.h> to <arm/bus.h>, since it looks like it's going to be necessary on arm26 as well.
1.1.4.4	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.1.4.3	11-Feb-2002	jdolecek	Sync w/ -current.
1.1.4.2	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.1.4.1	03-Aug-2001	lukem	update to -current
1.1.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.2.2.1	01-Oct-2001	fvdl	Catch up with -current.
1.3.4.4	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.3.4.3	01-Aug-2002	nathanw	Catch up to -current.
1.3.4.2	28-Feb-2002	nathanw	Catch up to -current.
1.3.4.1	10-Sep-2001	nathanw	file bus.h was added on branch nathanw_sa on 2002-02-28 04:07:32 +0000
1.4.10.1	07-Dec-2002	he	Pull up revision 1.5 (requested by thorpej in ticket #568): Remove warning from bus_dmamap_destroy(). Change the way DMA map syncs are done. Instead of remembering the virtual address for each DMA segment, just cache a pointer to the original buffer/buftype used to load the DMA map, and use that. Shrinks bus_dma_segment_t from 12 to 8 bytes, and the cache flushing is also more efficient.
1.4.8.1	30-Aug-2002	gehenna	catch up with -current.
1.10.2.4	01-Apr-2005	skrll	Sync with HEAD.
1.10.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.10.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.10.2.1	03-Aug-2004	skrll	Sync with HEAD
1.13.10.1	19-Mar-2005	yamt	sync with head. xen and whitespace. xen part is not finished.
1.13.8.1	29-Apr-2005	kent	sync with -current
1.14.4.3	03-Sep-2007	yamt	sync with head.
1.14.4.2	26-Feb-2007	yamt	sync with head.
1.14.4.1	21-Jun-2006	yamt	sync with head.
1.15.6.1	22-Apr-2006	simonb	Sync with head.
1.15.4.1	09-Sep-2006	rpaulo	sync with head
1.15.2.1	18-Feb-2006	yamt	keep vmspace rather than proc in bus_dmamap_t.
1.16.20.2	12-Mar-2007	rmind	Sync with HEAD.
1.16.20.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.18.46.2	04-May-2009	yamt	sync with head.
1.18.46.1	16-May-2008	yamt	sync with head.
1.18.44.1	18-May-2008	yamt	sync with head.
1.18.42.1	02-Jun-2008	mjf	Sync with HEAD.
1.19.18.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.19.14.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.19.8.1	28-Apr-2009	skrll	Sync with HEAD.
1.20.2.4	28-Jul-2010	uebayasi	Correct bus_space_physload(9) arguments to take "int freelist". A possible use case of bus_space_physload(9) would be some high-performance device with huge local memory, like InfiniBand HCA. We can register its local memory using bus_space_physload(..., VM_FREELIST_INFINIBAND0), then later map it to userspace via cdev_mmap(9) -> bus_dmamem_mmap(9). (bus_dma(9) needs changes too, of course.)
1.20.2.3	26-Jul-2010	uebayasi	After much consideration, rename bus_space_physload_direct(9) back to bus_space_physload_device(9). The latter registers a segment as "device pages". "Device pages" are managed, but not used for general purpose memory. Most typically XIP pages.
1.20.2.2	31-May-2010	uebayasi	Re-define the definition of "device page"; device pages are pages of device memory. Pages which don't have vm_page (== can't be used for generic use), but whose PV are tracked, are called "direct pages" from now.
1.20.2.1	28-Apr-2010	uebayasi	Initial implemention of bus_space_physload(9) for NetBSD/arm (only i.MX31 for now).
1.19	15-Oct-2022	jmcneill	Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings Rename the following defines: - _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED - PMAP_DEV_SO to PMAP_DEV_NP - LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP Rename the following option: - AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED
1.18	22-Jan-2022	skrll	Ensure bus_dmatag_subregion is called with an inclusive max_addr everywhere.
1.17	30-Aug-2021	jmcneill	Add storage for an iommu cookie in bus_dmamap_t and store untranslated CPU address in bus_dma_segment_t.
1.16	23-Apr-2021	skrll	Trialing whitespace
1.15	13-Apr-2020	maxv	Add KASAN-DMA support on aarch64, same as amd64. Discussed with skrll@.
1.14	28-Dec-2019	jmcneill	branches: 1.14.6; Do not use Early Write Acknowledge for PCIe I/O and config space.
1.13	19-Nov-2018	jmcneill	branches: 1.13.4; On second thought, get rid of "bs_base" from struct bus_space and use a custom bs_map for acpipchb instead.
1.12	18-Nov-2018	jmcneill	Add a "bs_base" field to struct bus_space. If present, use it to translate mappings by appending the value to the pa passed to bus_space_map.
1.11	01-Apr-2018	ryo	branches: 1.11.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.10	29-Jan-2014	matt	branches: 1.10.28; Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.9	16-Feb-2013	matt	branches: 1.9.2; Add PRIxBUSADDR, etal
1.8	27-Jan-2013	matt	Get rid of _BUS_DMAMAP_MEM_XLATE
1.7	27-Jan-2013	matt	Add a _BUS_DMAMAP_NOALLOC which tells bus_dmamem_alloc to skip that dmarange when allocating memory. Add a second dmarange to bcm23xx obio to allow it to map coherently mapped memory.
1.6	27-Jan-2013	matt	Add a flag to make bus_dmamem_map use the bus/sys transation table when mapping bus addresses. Make bcm2835 obio use it.
1.5	12-Nov-2012	skrll	C99 types
1.4	19-Oct-2012	matt	Make IS_BOUNCING a map flag and use it to simplify code and to avoid calling the sync routines if (COHERENT\|IS_BOUNCING) == COHERENT. (this eeks out a little bit more performance).
1.3	17-Oct-2012	matt	Add per-segment and per-ragne flag (to store _BUS_DMAMAP_COHERENT). Use the per-range flag to set the per-segment flag. This allows bus_dma to skip flushing for known coherent memory regions.
1.2	18-Sep-2012	matt	Add bounce buffer support for ARM bus_dma(9). Add macros to help initialize bus_dma_tag structures.
1.1	01-Jul-2011	dyoung	branches: 1.1.2; 1.1.10; 1.1.12; Per discussion at <http://mail-index.netbsd.org/tech-kern/2010/04/02/msg007941.html>, divide each machine's bus.h into bus_defs.h (constants & data types) and bus_funcs.h (macro implementations of bus_space(9) routines and MD prototypes). Note that some bus_space(9) routines' implementation will move to .c files from inline subroutines or macros in .h files. I've only made the split for machine architectures where there is PCI. All of the non-PCI-having architectures will require a similar split. These #include files are not referenced by any (committed) Makefiles or header files, yet. Changes to Makefiles, to <sys/bus.h>, and to some more machine-dependent files will dribble in before I throw the switch.
1.1.12.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.1.12.2	25-Feb-2013	tls	resync with head
1.1.12.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.1.10.2	13-Feb-2013	matt	Sync with HEAD
1.1.10.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.1.2.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.1.2.2	16-Jan-2013	yamt	sync with (a bit old) head
1.1.2.1	30-Oct-2012	yamt	sync with head
1.9.2.1	18-May-2014	rmind	sync with head
1.10.28.2	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.10.28.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.11.2.3	21-Apr-2020	martin	Sync with HEAD
1.11.2.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.11.2.1	10-Jun-2019	christos	Sync with HEAD
1.13.4.1	29-Dec-2019	martin	Pull up following revision(s) (requested by jmcneill in ticket #586): sys/arch/arm/nvidia/tegra_pcie.c: revision 1.27 sys/arch/aarch64/aarch64/pmap.c: revision 1.57 sys/arch/aarch64/aarch64/locore.S: revision 1.48 sys/arch/aarch64/include/armreg.h: revision 1.29 sys/arch/aarch64/aarch64/pmap.c: revision 1.58 sys/arch/aarch64/aarch64/locore.S: revision 1.49 sys/arch/arm/acpi/acpipchb.c: revision 1.14 sys/arch/aarch64/aarch64/genassym.cf: revision 1.16 sys/arch/arm/acpi/acpi_machdep.c: revision 1.13 sys/arch/aarch64/include/pmap.h: revision 1.27 sys/arch/aarch64/aarch64/genassym.cf: revision 1.17 sys/arch/aarch64/include/pmap.h: revision 1.28 sys/arch/arm/fdt/pcihost_fdtvar.h: revision 1.3 sys/arch/arm/include/bus_defs.h: revision 1.14 sys/arch/aarch64/aarch64/bus_space.c: revision 1.9 sys/arch/arm/fdt/pcihost_fdt.c: revision 1.12 sys/arch/aarch64/conf/files.aarch64: revision 1.15 sys/arch/aarch64/conf/files.aarch64: revision 1.16 sys/arch/arm/rockchip/rk3399_pcie.c: revision 1.9 Enable early write acknowledge for device memory mappings. Do not use Early Write Acknowledge for PCIe I/O and config space.
1.14.6.1	20-Apr-2020	bouyer	Sync with HEAD
1.13	18-Apr-2023	skrll	G/C unnecessary extern paddr_t physical_start, physical_end;
1.12	19-Nov-2022	skrll	Fix _bus_dmamem_alloc_range function declaration - low and high are paddr_t
1.11	24-Jan-2021	martin	Obey __HAVE_BUS_SPACE_8
1.10	05-Sep-2020	jakllsch	branches: 1.10.2; Add missing prototypes for __bs_c(f,_bs_sm_?_swap) (implementations of these already exist for aarch64)
1.9	13-Apr-2020	maxv	Add KASAN-DMA support on aarch64, same as amd64. Discussed with skrll@.
1.8	16-Jul-2019	skrll	branches: 1.8.8; Remove the _BUS_DMAMAP_COHERENT optimisation in the bus_dmamap_sync macro as the real function performs memory barriers now.
1.7	01-Apr-2018	ryo	branches: 1.7.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.6	29-Jan-2014	matt	branches: 1.6.28; Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.5	17-Jan-2013	matt	branches: 1.5.2; Cortex needs ._dmamap_sync_post for BUS_DMASYNC_POSTREAD
1.4	19-Oct-2012	matt	Make IS_BOUNCING a map flag and use it to simplify code and to avoid calling the sync routines if (COHERENT\|IS_BOUNCING) == COHERENT. (this eeks out a little bit more performance).
1.3	18-Sep-2012	matt	Add bounce buffer support for ARM bus_dma(9). Add macros to help initialize bus_dma_tag structures.
1.2	15-Jul-2012	matt	branches: 1.2.2; s/u_int_t/ -> uint__t Add swap variants for many accessors.
1.1	01-Jul-2011	dyoung	branches: 1.1.2; 1.1.10; Per discussion at <http://mail-index.netbsd.org/tech-kern/2010/04/02/msg007941.html>, divide each machine's bus.h into bus_defs.h (constants & data types) and bus_funcs.h (macro implementations of bus_space(9) routines and MD prototypes). Note that some bus_space(9) routines' implementation will move to .c files from inline subroutines or macros in .h files. I've only made the split for machine architectures where there is PCI. All of the non-PCI-having architectures will require a similar split. These #include files are not referenced by any (committed) Makefiles or header files, yet. Changes to Makefiles, to <sys/bus.h>, and to some more machine-dependent files will dribble in before I throw the switch.
1.1.10.2	17-Jan-2013	matt	Pullup from HEAD: Cortex needs ._dmamap_sync_post for BUS_DMASYNC_POSTREAD
1.1.10.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.1.2.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.1.2.2	23-Jan-2013	yamt	sync with head
1.1.2.1	30-Oct-2012	yamt	sync with head
1.2.2.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.2.2.2	25-Feb-2013	tls	resync with head
1.2.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.5.2.1	18-May-2014	rmind	sync with head
1.6.28.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.7.2.2	21-Apr-2020	martin	Sync with HEAD
1.7.2.1	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.8.8.1	20-Apr-2020	bouyer	Sync with HEAD
1.10.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.16	17-Jan-2017	rin	remove unnecessary cast, KNF
1.15	14-Jan-2017	martin	branches: 1.15.2; Avoid gcc warnings
1.14	13-Jan-2017	christos	elide conversion warning.
1.13	28-Jan-2013	matt	branches: 1.13.14; 1.13.18; Use uint32_t for __asm to appease clang.
1.12	05-Sep-2012	matt	branches: 1.12.2; Disable arm32 __asm for _byte_swap_u16_variable since gcc4.5 produces decent code for it. Fixes PR/46898.
1.11	20-Jul-2012	matt	Use defined(_ARM_ARCH_[67])
1.10	15-Jul-2012	matt	Add BSWAP16 and BSWAP32 macros for use in assembly.
1.9	12-Jul-2012	matt	Use __builtin_constant_p so that we only emit asm when the expression is not a constant.
1.8	28-Apr-2008	martin	branches: 1.8.18; 1.8.34; 1.8.40; 1.8.42; Remove clause 3 and 4 from TNF licenses
1.7	27-Apr-2008	matt	Merge kernel changes in matt-armv6 to HEAD.
1.6	30-Jan-2006	dsl	branches: 1.6.50; 1.6.74; 1.6.76; 1.6.78; Move all the stuff that detects bswapxx(constant) into the MI sys/bswap.h Put the minimum to define the required inline assembler or C into the MD files. NB: there may be some fallout from this!
1.5	28-Dec-2005	perry	branches: 1.5.2; inline -> __inline
1.4	24-Dec-2005	perry	Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.3	08-Nov-2002	thorpej	branches: 1.3.2; 1.3.24; Ensure that some integer constants are always unsigned.
1.2	14-Aug-2002	thorpej	branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; * Rename "word" -> 16, and "long" -> 32, as suggested by Ben Harris. * Replace __byte_swap_32_variable() with a C version from Richard Earnshaw that generates nearly identical assembly (and it would be exactly identical with the addition of another peephole to GCC ARM back-end).
1.1	13-Aug-2002	thorpej	Byte-swapping optimizations, enabled if compiling with GCC: * Byte-swap 16-bit and 32-bit constants at compile-time. * Inline 16-bit and 32-bit variable byte-swaps. These take 3 and 4 insns, respectively, and inlining saves the minimum 6 cycle penalty to call/return from the byte swap function.
1.2.8.1	09-Nov-2002	bjh21	Catch up with -current.
1.2.6.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.2.6.1	14-Aug-2002	jdolecek	file byte_swap.h was added on branch kqueue on 2002-09-06 08:32:35 +0000
1.2.4.2	30-Aug-2002	gehenna	catch up with -current.
1.2.4.1	14-Aug-2002	gehenna	file byte_swap.h was added on branch gehenna-devsw on 2002-08-30 00:19:11 +0000
1.2.2.3	11-Nov-2002	nathanw	Catch up to -current
1.2.2.2	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.2.2.1	14-Aug-2002	thorpej	file byte_swap.h was added on branch nathanw_sa on 2002-08-19 21:39:13 +0000
1.3.24.1	21-Jun-2006	yamt	sync with head.
1.3.2.3	18-Nov-2002	he	Pull up revision 1.2 (requested by thorpej in ticket #673): Rename ``word'' -> 16 and ``long'' -> 32. Replace __byte_swap_32_variable() with a C version that generates nearly identical assembly.
1.3.2.2	18-Nov-2002	he	Pull up revision 1.1 (new, requested by thorpej in ticket #667): Byte-swapping optimizations, enabled if compiling with GCC: o Byte-swap 16-bit and 32-bit constants at compile-time o Inline 16-bit and 32-bit variable byte-swaps
1.3.2.1	08-Nov-2002	he	file byte_swap.h was added on branch netbsd-1-6 on 2002-11-18 01:04:18 +0000
1.5.2.1	01-Feb-2006	yamt	sync with head.
1.6.78.1	16-May-2008	yamt	sync with head.
1.6.76.1	18-May-2008	yamt	sync with head.
1.6.74.1	02-Jun-2008	mjf	Sync with HEAD.
1.6.50.2	29-Feb-2008	matt	Rework establish_irq to take an intrsource. Enable an interrupt after establishing it.
1.6.50.1	28-Aug-2007	matt	On ARMv6, expand bswap32/bswap16 to a "rev" or "rev16" instructions.
1.8.42.2	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.8.42.1	01-Nov-2012	matt	sync with netbsd-6-0-RELEASE.
1.8.40.1	13-Sep-2012	riz	Pull up following revision(s) (requested by martin in ticket #542): sys/arch/arm/include/byte_swap.h: revision 1.12 Disable arm32 __asm for _byte_swap_u16_variable since gcc4.5 produces decent code for it. Fixes PR/46898.
1.8.34.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.8.34.1	30-Oct-2012	yamt	sync with head
1.8.18.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.12.2.2	03-Dec-2017	jdolecek	update from HEAD
1.12.2.1	25-Feb-2013	tls	resync with head
1.13.18.1	20-Mar-2017	pgoyette	Sync with HEAD
1.13.14.1	05-Feb-2017	skrll	Sync with HEAD
1.15.2.1	21-Apr-2017	bouyer	Sync with HEAD
1.19	01-Dec-2020	rin	Switch earmv6{,hf}eb to BE8 in kernel side. My strategy here is to define _ARM_ARCH_BE8 macro in arm/cdefs.h, if __ARMEB__ && _ARM_ARCH_6. Use this macro to determine whether system is compiled for and running on BE8 mode or not. Note that, for __ARMEB__, some conditions become compile-time constants determined by _ARM_ARCH_BE8 macro, e.g., whether BE8 or BE32 are accepted as a userland binary, or unaligned memory access is possible or not.
1.18	03-Nov-2020	skrll	The ARM C Language Extenstion document defines __ARCH_ARM as the integer macro indicating the current ARM instruction set. Let's use it. PR/55778: evbarm64 GENERIC64 kernel fails to build with clang XXX Handle the fact that for an ARM architecture ARMvX.Y then, XXX __ARM_ARCH= X * 100 + Y. E.g. for ARMv8.1 __ARM_ARCH = 801.
1.17	11-Oct-2020	skrll	branches: 1.17.2; Define _ARM_ARCH_8 when __ARM_ARCH_8A (no trailing double underscore) as it is defined by gcc. __ARM_ARCH_8A__ (with trailing double underscore) seems to be a typo (or maybe historical)
1.16	02-Aug-2019	joerg	ARMv6KZ has been misspelled by GCC since forever, but clang only provides the correct name. Support both.
1.15	23-Jun-2014	christos	branches: 1.15.28; unbreak lint
1.14	24-Mar-2014	matt	branches: 1.14.2; Use sizeof(__int128_t) for aarch64 and sizeof(long long) for ARM EABI
1.13	18-Mar-2014	christos	Make all __ALIGNBYTES macros return the same type (size_t)
1.12	29-Jan-2014	matt	Fix inverted GCC version test
1.11	29-Jan-2014	matt	Add a check for minimum compiler compatible with gcc 4.1 __ARM_PCS_AAPCS64 also requires __ALIGNBYTES to be 7
1.10	28-Jan-2014	matt	Deal with __ARM_ARCH_8A__
1.9	17-Aug-2013	matt	Add _ARM_ARCH_5T (needed for blx <reg> support)
1.8	15-Aug-2013	matt	Add _ARM_ARCH_T2 to indicate Thumb2 support Don't define _ARM_ARCH_DWORD_OK disappear if compiling for Thumb1
1.7	05-Aug-2012	matt	branches: 1.7.2; 1.7.4; Add a macro for determining whether we can use LDRD/STRD instructions
1.6	31-Jul-2012	matt	If we are using EABI (aapcs-linux), then ALIGNBYTES needs to deal with 8-byte long types.
1.5	12-Jul-2012	matt	Add more arm7 and arm6 variants.
1.4	20-Jan-2012	joerg	branches: 1.4.4; Change CMSG_SPACE and CMSG_LEN to provide Integer Constant Expressions again. This was changed in sys/socket.h r1.51 to work around fallout from the IPv6 aux data migration. It broke the historic ABI on some platforms. This commit restores compatibility for netbsd32 code on such platforms and provides a template for future changes to the CMSG_* alignment. Revert PCC/Clang workarounds in postfix and tmux.
1.3	17-Oct-2007	garbled	branches: 1.3.38; 1.3.54; 1.3.58; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.2	26-Aug-2007	matt	Move _ARM_ARCH_* from asm.h to cdefs.h so everyone can use them. Add _END/END/ASEND which every port's asm.h should have. Add GET_CPUFINO(rX). Reserved for future use. :) Use %foo instead of #foo
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.44; 1.1.86; 1.1.94; 1.1.100; 1.1.102; 1.1.104; 1.1.106; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.106.1	01-Jan-2008	chris	Sync with HEAD.
1.1.104.1	03-Sep-2007	jmcneill	Sync with HEAD.
1.1.102.1	01-Nov-2007	rjs	Sync with HEAD.
1.1.100.1	03-Sep-2007	skrll	Sync with HEAD.
1.1.94.1	03-Oct-2007	garbled	Sync with HEAD
1.1.86.1	09-Oct-2007	ad	Sync with head.
1.1.44.1	03-Sep-2007	yamt	sync with head.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file cdefs.h was added on branch thorpej_scsipi on 2001-01-10 19:02:06 +0000
1.3.58.1	18-Feb-2012	mrg	merge to -current.
1.3.54.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.3.54.2	30-Oct-2012	yamt	sync with head
1.3.54.1	17-Apr-2012	yamt	sync with head
1.3.38.2	26-Mar-2014	matt	Make the minimal alignment 8 if EABI or ldrd/strd are supported.
1.3.38.1	19-Dec-2013	matt	Pull from HEAD (for post armv6 defines).
1.4.4.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.7.4.2	18-May-2014	rmind	sync with head
1.7.4.1	28-Aug-2013	rmind	sync with head
1.7.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.14.2.1	10-Aug-2014	tls	Rebase.
1.15.28.1	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.17.2.1	14-Dec-2020	thorpej	Sync w/ HEAD.
1.9	06-Sep-2002	gehenna	Merge the gehenna-devsw branch into the trunk. This merge changes the device switch tables from static array to dynamically generated by config(8). - All device switches is defined as a constant structure in device drivers. - The new grammer ``device-major'' is introduced to ``files''. device-major <prefix> char <num> [block <num>] [<rules>] - All device major numbers must be listed up in port dependent majors.<arch> by using this grammer. - Added the new naming convention. The name of the device switch must be <prefix>_[bc]devsw for auto-generation of device switch tables. - The backward compatibility of loading block/character device switch by LKM framework is broken. This is necessary to convert from block/character device major to device name in runtime and vice versa. - The restriction to assign device major by LKM is completely removed. We don't need to reserve LKM entries for dynamic loading of device switch. - In compile time, device major numbers list is packed into the kernel and the LKM framework will refer it to assign device major number dynamically.
1.8	16-Jul-2002	ichiro	add ixpcom to cdevsw
1.7	19-Apr-2002	wiz	branches: 1.7.2; Complete renaming of opms to opms (was partly named pms, externally and internally). Move arm/iomd/pms* to arm/iomd/opms*. Mechanical change, tested by cross-compiling a kernel from i386. Approved by christos. XXX: What are arm/arm32/conf.c and arm/include/conf.h good for?
1.6	28-Feb-2002	simonb	Use "#define<tab>".
1.5	27-Feb-2002	christos	- define other DEV_ constants that the local port uses. - delete cdev_decl(mm) since <sys/conf.h> does it.
1.4	27-Oct-2001	rearnsha	branches: 1.4.2; Declare the plcom device.
1.3	16-Sep-2001	matt	branches: 1.3.2; Add cdev_decl for new devices in conf.c
1.2	09-Sep-2001	toshii	branches: 1.2.2; Readd sacom to cdevsw.
1.1	03-Sep-2001	matt	branches: 1.1.2; Switch netwinder to use a common conf.c for the arm ports.
1.1.2.1	01-Oct-2001	fvdl	Catch up with -current.
1.2.2.7	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.2.2.6	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.2.2.5	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.2.2.4	16-Mar-2002	jdolecek	Catch up with -current.
1.2.2.3	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.2.2.2	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.2.1	09-Sep-2001	thorpej	file conf.h was added on branch kqueue on 2001-09-13 01:13:09 +0000
1.3.2.1	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.4.2.6	17-Sep-2002	nathanw	Catch up to -current.
1.4.2.5	01-Aug-2002	nathanw	Catch up to -current.
1.4.2.4	20-Jun-2002	nathanw	Catch up to -current.
1.4.2.3	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.4.2.2	28-Feb-2002	nathanw	Catch up to -current.
1.4.2.1	27-Oct-2001	nathanw	file conf.h was added on branch nathanw_sa on 2002-02-28 04:07:32 +0000
1.7.2.1	19-May-2002	gehenna	Remove port-dependent conf.h.
1.125	11-Jul-2023	riastradh	arm/cpu.h: Need sys/param.h for COHERENCY_UNIT. Nix machine/param.h -- not meant to be used directly, pulled in by sys/param.h.
1.124	25-Jun-2023	skrll	G/C an unused struct cpu_info member
1.123	25-Jun-2022	jmcneill	branches: 1.123.4; pic: Update ci_cpl in pic_set_priority callback. Not all ICs need interrupts disabled to update the priority. DAIF accesses are not cheap, so push the update of ci_cpl from pic_set_priority to the IC's pic_set_priority callback, and let the IC driver determine whether or not it needs interrupts disabled.
1.122	18-Dec-2021	riastradh	arm: Forward-declare `struct proc' before using in prototype.
1.121	01-Nov-2021	skrll	Move arm_cache_info from cpufunc.h to cpu.h
1.120	31-Oct-2021	skrll	Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep. The AP initialisation code in cpu_init_secondary_processor will read and initialise the required system registers and state for the BP to attach and report. Rework the interrupt handler code for this new sequence. Thankfully, this removes a bunch of code for bcm2836mp. The VFP detection handler on <= armv7 relies on the global undefined handler being in place until the BP attaches vfp. That is, after the APs have been spun up. gicv3_its.c has a serialisation issue which is protected against in the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin lock. The serialisation issue needs addressing more completely. Tested on RPI3, Apple M1, QEMU, and lx2k Fixes PR port-arm/56264: diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3
1.119	14-Aug-2021	ryo	Improved the performance of kernel profiling on MULTIPROCESSOR, and possible to get profiling data for each CPU. In the current implementation, locks are acquired at the entrance of the mcount internal function, so the higher the number of cores, the more lock conflict occurs, making profiling performance in a MULTIPROCESSOR environment unusable and slow. Profiling buffers has been changed to be reserved for each CPU, improving profiling performance in MP by several to several dozen times. - Eliminated cpu_simple_lock in mcount internal function, using per-CPU buffers. - Add ci_gmon member to struct cpu_info of each MP arch. - Add kern.profiling.percpu node in sysctl tree. - Add new -c <cpuid> option to kgmon(8) to specify the cpuid, like openbsd. For compatibility, if the -c option is not specified, the entire system can be operated as before, and the -p option will get the total profiling data for all CPUs.
1.118	08-Aug-2021	skrll	Re-apply Move 'struct pic_pending' from percpu to struct cpu_info. Saves a few instructions in splx. There is(/was) no need to use atomic operations on the percpu / cpu_info members, so don't. Finally removng the use of percpu should help avoid problems with "late" attaching cpus.
1.117	27-Mar-2021	jmcneill	Revert recent pic optimizations until I have more time to work on this.
1.116	21-Feb-2021	jmcneill	branches: 1.116.2; Keep current hardware priority value in struct cpu_info and use it instead of reading icc_pmr_el1 in gicv3_set_priority.
1.115	20-Feb-2021	jmcneill	Move 'struct pic_pending' from percpu to struct cpu_info. Saves a few instructions in splx.
1.114	17-Aug-2020	mrg	branches: 1.114.2; swap sys/param.h for machine/param.h. this still obtains the wanted COHERENCY_UNIT, while avoiding have a cascade of failures where sys/mutex.h ends up including arm/cpu.h which ends up including sys/resourcevar.h and then sys/mutex.h, but as the first includer of sys/mutex.h has defined the idempotent header define, the second one is empty, and as kmutex_t isn't defined by the first attempt yet the kmutex_t used in resourcevar.h generates an error. should fix evbarm v5/v5eb, hpcarm, iyonix and zaurus builds. tested building iyonix, zaurus and evbarmv7hf.
1.113	16-Aug-2020	skrll	G/C MP_CPU_INFO_MEMBERS
1.112	14-Aug-2020	skrll	Mirror the changes to aarch64 and - Switch to TPIDRPRW_IS_CURLWP, because curlwp is accessed much more often by MI code. It also makes curlwp preemption safe, - Make ASTs operate per-LWP rather than per-CPU, otherwise sometimes LWPs can see spurious ASTs (which doesn't cause a problem, it just means some time may be wasted). - Make sure ASTs are always set on the same CPU as the target LWP, and delivered via IPI if posted from a remote CPU so that they are resolved quickly. - Add some cache line padding to struct cpu_info. - Add a memory barrier in a couple of places where ci_curlwp is set. This is needed whenever an LWP that is resuming on the CPU could hold an adaptive mutex. The barrier needs to drain the CPU's store buffer, so that the update to ci_curlwp becomes globally visible before the LWP can resume and call mutex_exit().
1.111	29-Jun-2020	riastradh	Implement fpu_kern_enter/leave for arm32.
1.110	29-Mar-2020	skrll	Provide a curpcb
1.109	09-Mar-2020	christos	Don't expose curproc/curlwp and other random kernel macros/functions/variables du-jour.
1.108	15-Feb-2020	skrll	Various updates and improvements to cpu start up on arm/aarch64 - start sharing more code around the AP startup messaging. - call arm_cpu_topology_set early so that ci_core_id is available for drivers, e.g. bcm2835_intr.c - both arm and aarch64 now have - a static cpu_info_store array - the same arm_cpu_{hatched,mbox}
1.107	22-Jan-2020	skrll	#ifdef whack-a-mole for the pmap_maxproc_set functionality
1.106	20-Jan-2020	skrll	s/_ARM_ARCH_6/ARM_MMU_EXTENDED/ in the #ifdef for the recent 4k pages change
1.105	18-Jan-2020	skrll	Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) by creating a new pool l1ttpl for the userland L1 translation table which needs to be 8KB and 8KB aligned. Limit the pool to maxproc and add hooks to allow the sysctl changing of maxproc to adjust the pool. This comes at a 5% performance penalty for build.sh -j8 kernel on a Tegra TK1.
1.104	15-Jan-2020	mrg	port the arm64 cpu topology setup for big.little to arm. rename arm64 cpu_do_topology() to arm_cpu_do_topology() and call it from both arm cpu_attach(). replace both aarch64_set_topology() inline code in arm cpu_attach() with new arm_cpu_do_topology(), which is called by the arm64 locore as well (possibly not needed, which would allow it to become static.) not yet tested on a real big.little armv7 system. tested on rockpro64 and pinebook pro.
1.103	01-Dec-2019	ad	branches: 1.103.2; Fix false sharing problems with cpu_info. Identified with tprof(8). This was a very nice win in my tests on a 48 CPU box. - Reorganise cpu_data slightly according to usage. - Put cpu_onproc into struct cpu_info alongside ci_curlwp (now is ci_onproc). - On x86, put some items in their own cache lines according to usage, like the IPI bitmask and ci_want_resched.
1.102	21-Nov-2019	ad	mi_userret(): take care of calling preempt(), set spc_curpriority directly, and remove MD code that does the same.
1.101	19-Oct-2019	jmcneill	Increase aarch64 MAXCPUS to 256.
1.100	03-Jan-2019	skrll	branches: 1.100.4; Start CPUs more like aarch64 by using a cpu_mpidr array (if populated) to map MPIDRs to an index for each CPU. Towards big.LITTLE support.
1.99	25-Oct-2018	skrll	Align struct cpu_info member names. NFC.
1.98	18-Oct-2018	skrll	Provide generic start code that assumes the MMU is off and caches are disabled as per the linux booting protocol for ARMv6 and ARMv7 boards. u-boot image type should be changed to 'linux' for correct behaviour. The new start code builds a minimal "bootstrap" L1PT with cached access disabled and uses the same table for all processors. AP startup is performed in less steps and more code is written in C. The bootstrap tables and stack are placed into an (orphaned) section "_init_memory" which is given to uvm when it is no longer used. Various kernels have been converted to use this code and tested. Some boards were provided by TNF. Thanks! The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS kernels. The GENERIC kernel will also work on RPI2 using u-boot. Thanks to martin@ and aymeric@ for testing on parallella and nanosoc respectively
1.97	22-Aug-2018	msaitoh	- Cleanup for dynamic sysctl: - Remove unused _NAMES macros for sysctl. - Remove unused _MAXID for sysctls. - Move CTL_MACHDEP sysctl definitions for m68k into m68k/include/cpu.h and use them on all m68k machines.
1.96	01-Apr-2018	ryo	branches: 1.96.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.95	24-Jan-2018	skrll	branches: 1.95.2; Remove port-acorn26 OK core@
1.94	16-Dec-2017	mrg	CPU_INFO_FOREACH() must always iterate at least the boot cpu. document this in sys/cpu.h and fix the arm and mips versions to check ncpu is non zero before using it as an iterator max. this should fix the new assert in init_main.c.
1.93	04-Apr-2017	sevan	branches: 1.93.6; Fix rcs tag.
1.92	27-Mar-2017	skrll	Expose correct cpu_number(), CPU_IS_PRIMARY() and CPU_INFO_FOREACH() for modules so that the dtrace module works on an MP system.
1.91	06-Mar-2017	skrll	Trailing whitespace
1.90	15-Apr-2015	matt	branches: 1.90.2; 1.90.4; Make setsoftast take a cpu_info *
1.89	14-Apr-2015	jmcneill	__HAVE_PREEEMPTION -> __HAVE_PREEMPTION
1.88	08-Apr-2015	matt	Make sure TPIDRPRw_IS_CURLWP is being used when __HAVE_PREEEMPTION is defined.
1.87	08-Apr-2015	matt	Add basic support for __HAVE_PREEMPTION. Use atomic ops for ci_astpending if __HAVE_PREEMPTION is defined.
1.86	08-Apr-2015	matt	Add an agnostic version of curlwp and curcpu() for modules since they won't know if the kernel was built with TPIDRPRW_IS_CUR{LWP,CPU} or not.
1.85	02-Apr-2015	matt	Allow TPIDRPRW_IS_CURLWP to be used with MULTIPROCESSOR kernels
1.84	23-Nov-2014	skrll	branches: 1.84.2; Fix TPIDRPRW_IS_CURLWP builds. A MULTIPROCESSOR kernel requires TPIDRPRW_IS_CURCPU.
1.83	28-Mar-2014	matt	branches: 1.83.4; Make ddb_regs, undefined & vfp evcnt's per cpu.
1.82	26-Feb-2014	matt	Move some static/global variables to here.
1.81	06-Nov-2013	christos	use cii
1.80	18-Aug-2013	matt	Fix CLKF_INTR for EABI to (void) its argument so it isn't mark unused by the optimizer.
1.79	18-Aug-2013	matt	<arm/locore.h> fallout (fixes some include ordering errors)
1.78	18-Aug-2013	matt	If _KMEMUSER, include <sys/intr.h>
1.77	18-Aug-2013	matt	There are only 16 faults.
1.76	18-Aug-2013	matt	Move parts of cpu.h that are not needed by MI code in <arm/locore.h> Don't include <machine/cpu.h> or <machine/frame.h>, use <arm/locore.h> Use <arm/asm.h> instead of <machine/arm.h>
1.75	28-Jan-2013	matt	branches: 1.75.2; Add a machdep.fpu_present sysctl for ld.elf_so to use in ld.so.conf to load libc_vfp.so.
1.74	26-Dec-2012	matt	Add vfp_kernel_acquire and vfp_kernel_release prototypes.
1.73	07-Sep-2012	matt	branches: 1.73.2; Switch cortex_a9 back to need_ptesync = 1 Add code to disable the L2 cache on cortex-a9 (for now). Add evcnt for all the fault types. Move cache info in a structure and have one for the pcache and one for scache. Probe L1/L2 caches properly for ARMv7
1.72	29-Aug-2012	matt	Don't use locations in .data to store exception temporaries, use decidicated space in cpu_info instead. This also moves undefined_handler_address into cpu_info as well. Use the new armreg* inlines for getting TPIDRPRW register. Add MULTIPROCESSOR version of CPU_INFO_FOREACH
1.71	29-Aug-2012	matt	Remove undeeded struct device;
1.70	29-Aug-2012	matt	Use new armv7 CP15 register to print out cache types. If the cpu_cc_freq is set, report it. Add macros to make inlines for reading/writing co-processor registers.
1.69	29-Aug-2012	matt	Rename ARM options PROCESS_ID_IS_CUR{CPU,LWP} to TPIDRPRW_IS_CUR{CPU,LWP} since TPIDRPRW is the cp15 register name. Initialize it early in start along with CI_ARM_CPUID. Remove other initializations. We alays have ci_curlwp. Enable TIPRPRW_IS_CURCPU in std.beagle. [tested on a beaglboard (cortex-a8)]
1.68	16-Aug-2012	matt	small rototill. pcb_flags is dead. PCB_NOALIGNFLT is now in stored l_md.md_flags as MDLWP_NOALIGNFLT. This avoids a few loads of the PCB in exception handling. pcb_tf has been moved to l_md.md_tf. Again this avoids a lot of pcb references just to access or set this. It also means that pcb doesn't need to accessed by MI code. Move pcb_onfault to after the pcb union. Add pcb_sp macro to make code prettier. Add lwp_settrapframe(l, tf) to set the l_md.md_tf field. Use lwp_trapframe to access it (was process_frame but that name was changed in a previous commit). Kill off curpcb in acorn26. Kill the checks for curlwp being NULL. Move TRAP_USERMODE from arm32/fault.c to frame.h and a __PROG26 version. Replace tests for usermode with that macro.
1.67	14-Aug-2012	matt	Kill curpcb/ci_curpcb. Use device_t in cpu_info. Add ci_softc (where ci_curpcb was so cpu_info doesn't change).
1.66	12-Aug-2012	matt	Rework VFP support to use PCU. Add emulation of instruction which save/restore the VFP FPSCR. Add a sysarch hook to VFP FPSCR manipulation. [The emulation will be used by libc to store/fetch exception modes and rounding mode on a per-thread basis.]
1.65	02-Aug-2012	skrll	Remove irqframe and replace with identical trapframe.
1.64	16-Jul-2012	skrll	Fix racy softint dispatch that lead to KASSERT(si->si_active) in softint_execute Discussed with matt@. "Looks good to me"
1.63	16-Feb-2012	christos	expose cpu structures to kmemuser and prevent opt_*.h from being included if kmemuser
1.62	13-Nov-2010	uebayasi	branches: 1.62.8; 1.62.12; 1.62.14; Include sys/device_if.h instead of sys/device.h. machine/cpu.h is one of the lower-most definitions. Relying on the huge sys/device.h is not a good idea.
1.61	13-Nov-2010	uebayasi	Include sys/evcnt.h for struct evcnt.
1.60	07-Jul-2010	chs	implement ucas_* for arm.
1.59	10-Dec-2009	rmind	branches: 1.59.2; 1.59.4; Rename L_ADDR to L_PCB and amend some comments accordingly.
1.58	21-Nov-2009	rmind	Use lwp_getpcb() on ARM (and acorn26/32), clean from struct user usage.
1.57	18-Jan-2009	bjh21	Define a version of GET_CURCPU, GET_CURLWP, and GET_CURPCB for use on old uniprocessor ARMs, and re-arrange the ifdefs so that it gets used on 26-bit systems as well. This allows us to uniformly use these macros everywhere.
1.56	07-Aug-2008	matt	branches: 1.56.2; 1.56.10; Only call dosoftints() is ci_intr_depth == 0
1.55	07-Aug-2008	matt	Do fast softint processing in DO_AST_AND_RESTORE_ALIGNMENT_FAULTS. Redo the softint mask so ci_softints >> ci_cpl != 0 becomes an easy test for work to be done.
1.54	27-Apr-2008	matt	branches: 1.54.2; 1.54.6; Merge kernel changes in matt-armv6 to HEAD.
1.53	15-Mar-2008	rearnsha	branches: 1.53.2; 1.53.4; VFP support.
1.52	27-Feb-2008	xtraeme	Remove CTL_MACHDEP_NAMES, it's not used anywhere. Ok by martin@.
1.51	19-Feb-2008	dogcow	branches: 1.51.2; 1.51.6; revert previous; as yamt pointed out, these bits are in <sys/cpu.h>.
1.50	19-Feb-2008	dogcow	cargo-cult CPU_INFOITERATOR and _FOREACH to make kern_prf.c build again. These should probably be abstracted out to sys/cpu.h at some point, since they don't really change from arch to arch.
1.49	06-Jan-2008	matt	current_intr_depth is dead. Make sure we don't use it anymore.
1.48	11-Dec-2007	ad	Add cpu_intr_p().
1.47	17-Oct-2007	garbled	branches: 1.47.2; 1.47.4; 1.47.6; 1.47.8; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.46	02-Oct-2007	ad	Make want_resched a member of cpu_info.
1.45	04-Aug-2007	ad	branches: 1.45.2; 1.45.4; 1.45.6; Add ci_cpuid where it's missing.
1.44	01-Jun-2007	skrll	branches: 1.44.2; 1.44.4; 1.44.6; 1.44.8; Another missed changed for acorn26 idlelwp. Provide IRQenable/IRQdisable macros.
1.43	17-May-2007	yamt	merge yamt-idlelwp branch. asked by core@. some ports still needs work. from doc/BRANCHES: idle lwp, and some changes depending on it. 1. separate context switching and thread scheduling. (cf. gmcgarry_ctxsw) 2. implement idle lwp. 3. clean up related MD/MI interfaces. 4. make scheduler(s) modular.
1.42	18-Feb-2007	matt	branches: 1.42.4; 1.42.6; 1.42.10; 1.42.12; Changes for newlock2.
1.41	16-Feb-2007	ad	branches: 1.41.2; Remove spllowersoftclock() and CLKF_BASEPRI(), and always dispatch callouts via a soft interrupt. In the near future, softclock will be run from process context.
1.40	05-Aug-2006	bjh21	Centralize the various checks for validity of a CPU context in one macro, so we don't have to get it right in lots of different places.
1.39	05-Apr-2006	uwe	Don't define, just declare want_resched here.
1.38	11-Dec-2005	christos	branches: 1.38.4; 1.38.6; 1.38.8; 1.38.10; 1.38.12; merge ktrace-lwp.
1.37	11-Aug-2005	cube	Change all archs that did: #define clockframe somethingelse to: struct clockframe { struct somethingelse cf_se; }; and change access macros accordingly. That means that, at least for that very issue, things will not go ka-boomy if you don't have the actual definition of struct clockframe before including systm.h.
1.36	22-Sep-2004	yamt	branches: 1.36.12; move some per-cpu data definitions to MI place so that they can be modified without touching all ports. discussed on tech-kern@.
1.35	04-Jan-2004	jdolecek	Rearrange process exit path to avoid need to free resources from different process context ('reaper'). From within the exiting process context: * deactivate pmap and free vmspace while we can still block * introduce MD cpu_lwp_free() - this cleans all MD-specific context (such as FPU state), and is the last potentially blocking operation; all of cpu_wait(), and most of cpu_exit(), is now folded into cpu_lwp_free() * process is now immediatelly marked as zombie and made available for pickup by parent; the remaining last lwp continues the exit as fully detached * MI (rather than MD) code bumps uvmexp.swtch, cpu_exit() is now same for both 'process' and 'lwp' exit uvm_lwp_exit() is modified to never block; the u-area memory is now always just linked to the list of available u-areas. Introduce (blocking) uvm_uarea_drain(), which is called to release the excessive u-area memory; this is called by parent within wait4(), or by pagedaemon on memory shortage. uvm_uarea_free() is now private function within uvm_glue.c. MD process/lwp exit code now always calls lwp_exit2() immediatelly after switching away from the exiting lwp. g/c now unneeded routines and variables, including the reaper kernel thread
1.34	23-Jun-2003	martin	branches: 1.34.2; Make sure to include opt_foo.h if a defflag option FOO is used.
1.33	17-Jan-2003	thorpej	Merge the nathanw_sa branch.
1.32	13-Oct-2002	bjh21	It appears that MI code requires ci_cpuid to be the CPU number of the CPU in question, whereas the ARM code was using it to hold the model identification. To fix this, rename: ci_cpuid -> ci_arm_cpuid ci_cputype -> ci_arm_cputype (for consistency) ci_cpurev -> ci_arm_cpurev (ditto) ci_cpunum -> ci_cpuid This makes top(1) give correct CPU numbers in its "STATE" column (all 0 for now).
1.31	12-Oct-2002	bjh21	Remember the location of each CPU's idle PCB in struct cpu_info. Move allocation of the idle PCB from hydra.c to cpu.c and add some extra initialisation from cpu_fork().
1.30	05-Oct-2002	bjh21	Minimal changes to allow a kernel with "options MULTIPROCESSOR" to compile and boot multi-user on a single-processor machine. Many of these changes are wildly inappropriate for actual multi-processor operation, and correcting this will be my next task.
1.29	16-Aug-2002	thorpej	* Add a new machdep.powersave sysctl, which controls the use of the CPU's "sleep" function in the idle loop. * Default all CPUs to not use powersave, except for the PDA processors (SA11x0 and PXA2x0). This significantly reduces inteterrupt latency in high-performance applications (and was good to squeeze another ~10% out of an XScale IOP on a Gig-E benchmark).
1.28	14-Aug-2002	briggs	Inline SetCPSR calls where it seems prudent to do so. This avoids two branches and allows the compiler to better utilize registers around calls to disable/enable/restore_interrupts().
1.27	08-May-2002	thorpej	branches: 1.27.2; Hard-wire CLKF_BASEPRI() to 0 on the ARM, since spllowersoftclock() might not actually be able to unblock the interrupt, which would cause us to run the softclock interrupts with hardclock blocked. Per discussion w/ Charles Hannum.
1.26	12-Apr-2002	thorpej	Centralize ARM CPU configuration information by adding a new header file, <arm/cpuconf.h>, which pulls in "opt_cputypes.h" and then defines the following: * CPU_NTYPES -- now many CPU types are configured into the kernel. What you really want to know is "== 1" or "> 1". * Defines ARM_ARCH_2, ARM_ARCH_3, ARM_ARCH_4, ARM_ARCH_5, depending on which ARM architecture versions are configured (based on CPU_* options). Also defines ARM_NARCH to determins how many architecture versions are configured. * Defines ARM_MMU_MEMC, ARM_MMU_GENERIC, ARM_MMU_XSCALE depending on which classes of ARM MMUs are configured into the kernel, and ARM_NMMUS to determine how many MMU classes are configured. Remove the needless inclusion of "opt_cputypes.h" in several places. Convert remaining users to <arm/cpuconf.h>.
1.25	03-Apr-2002	thorpej	Clean up handling of the vector page on 32-bit ARM systems: * Don't refer to VA 0, instead refer to a new variable: vector_page * Delete the old zero_page_() functions, replacing them with a new one: vector_page_setprot(). When manipulating vector page mappings in user pmaps, only do so if the vector page is below KERNEL_BASE (if it's above KERNEL_BASE, the vector page is mapped by the kernel pmap). * Add a new function, arm32_vector_init(), which takes the virtual address of the vector page (which MUST be valid when the function is called) and a bitmask of vectors the kernel is going to take over, and performs all vector page initialization, including setting the V bit in the CPU Control register ("relocate vectors to high address"), if necessary.
1.24	24-Mar-2002	thorpej	Cache the cpu type and cpu revision in cpu_info.
1.23	24-Mar-2002	bjh21	arm26->acorn26 transition.
1.22	10-Mar-2002	bjh21	Add a ci_dev element to struct cpu_info, pointing to the device that corresponds to the CPU.
1.21	09-Mar-2002	bjh21	Replace cpu_id and cpu_ctrl in struct _cpu with ci_cpuid and ci_ctrl in struct cpu_info. Also kill the cpuctrl global while we're here, and make identify_arm_cpu() take a struct cpu_info * as an argument alongside the CPU number.
1.20	09-Mar-2002	bjh21	Move arm700bugcount into stuct cpu_info, and attach it in identify_master_cpu().
1.19	20-Jan-2002	thorpej	Some prototype cleanup.
1.18	21-Dec-2001	bjh21	Merge ast() and userret() between arm32 and arm26. The implementation used is the arm32 one.
1.17	22-Nov-2001	thorpej	Add 26-bit and 32-bit types.h files, which indicate the programming model in use for a given platform (__PROG26 vs __PROG32), then pulls in <arm/types.h>. Change each ARM port to pull in <arm/arm26/types.h> or <arm/arm32/types.h> as appropriate. Change all references to PROG26 and PROG32 to __PROG26 and __PROG32. Eliminate the opt_progmode.h header file.
1.16	09-Nov-2001	thorpej	branches: 1.16.2; Implement a badaddr_read() routine which performs a load of the specified size for the caller, and returns true or false indicating whether or not a Data Abort occurred (i.e. the address was "bad").
1.15	10-Jul-2001	bjh21	branches: 1.15.4; Purge CPU_ARM7500. Thanks to Reinoud's work, it's no longer needed.
1.14	09-Jul-2001	reinoud	branches: 1.14.2; Initial commit for merging A7000/NC with the RISCPC in order to get _one_ bootable GENERAL kernel for the 3 machines. This is done by integrating the ARM7500 in a better way. In various places the IOMD ID is checked and action is taken at runtime compared to compiletime. The small piece of assembler that is changed now uses the flag `arm7500_ioc_found' that is set up by iomd.c at startup. When this chip isnt found at startup it will skip reading the ARM7500 extended IRQ registers and wont clear them either. The next step will be getting the mode-definition files to the bootloader. Currently they are compiled in.
1.13	14-Jun-2001	thorpej	Don't need to prototype child_return() here, it's in <sys/proc.h>.
1.12	13-May-2001	bjh21	strstr() is no longer used in the kernel. G/C it.
1.11	24-Apr-2001	bjh21	Rather large overhaul. Mostly cosmetic, but also: Provide PROC_PC on arm26. Provide working CLKF_INTR on arm26. Make setsoftast a macro everywhere.
1.10	20-Apr-2001	matt	Split cpu from mainbus so that cpu can attached to other buses (like ofbus).
1.9	28-Feb-2001	bjh21	branches: 1.9.2; 1.9.4; PCB convergence, part the first: Move the pointer to the current user trapframe from struct mdproc to struct pcb (as on arm26). Only tested by compiling kernels on arm32 and hpcarm (dnard seems to be incomplete anyway). Someone should try running one.
1.8	28-Feb-2001	bjh21	Large overhaul for arm26 compatibility. This file is now even more of a mess than it was.
1.7	27-Feb-2001	bjh21	Tidy up ARM7500 restrictions. Also insist on precisely one of PROG32 and PROG26's being turned on.
1.6	27-Feb-2001	reinoud	cpu_number() macro has no args
1.5	27-Feb-2001	reinoud	Rollback of patch ... there was a bug in the proc.h
1.4	27-Feb-2001	reinoud	Due to changes in ../sys/proc.h ``cpu_wait(p)'' is now a function due to the prototype defined it in ... added it to arm/vm_machdep.c since all ARM machines are still single processor anyway
1.3	25-Feb-2001	bjh21	Move arm32 ports over to using <arm/armreg.h>, so <cpu.h> mostly contains NetBSD-specific definitions. This also entails some changes to the way CPU identification is done. I hope I've got it right.
1.2	25-Feb-2001	bjh21	COPY_SIGCODE is never referenced in the kernel, and the comment attached to it is out of date. Assume it's obsolete and g/c it.
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.9.4.3	23-Apr-2001	bouyer	Sync with HEAD.
1.9.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.9.4.1	28-Feb-2001	bouyer	file cpu.h was added on branch thorpej_scsipi on 2001-03-12 13:27:21 +0000
1.9.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.14.2.6	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.14.2.5	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.14.2.4	16-Mar-2002	jdolecek	Catch up with -current.
1.14.2.3	11-Feb-2002	jdolecek	Sync w/ -current.
1.14.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.14.2.1	03-Aug-2001	lukem	update to -current
1.15.4.1	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.16.2.13	31-Dec-2002	thorpej	Copy/initialize PMC state in cpu_proc_fork().
1.16.2.12	18-Oct-2002	nathanw	Catch up to -current.
1.16.2.11	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.16.2.10	20-Jun-2002	nathanw	Catch up to -current.
1.16.2.9	17-Apr-2002	nathanw	Catch up to -current.
1.16.2.8	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.16.2.7	28-Feb-2002	nathanw	Catch up to -current.
1.16.2.6	08-Jan-2002	nathanw	Catch up to -current.
1.16.2.5	08-Dec-2001	thorpej	Add a cpu_proc_fork(), called from uvm_proc_fork(), which takes care of machine-dependent handling a fork() time (this is different from forking the actual context in an LWP world). #define it away on platforms which do not need it. Problem noted by Gregory McGarry.
1.16.2.4	15-Nov-2001	thorpej	Machine-dependent kernel mods for scheduler activations on 26-bit ARM processors. Kernel builds, but I have no 26-bit ARM with which I can test, at the moment.
1.16.2.3	15-Nov-2001	thorpej	PROC_PC -> LWP_PC
1.16.2.2	15-Nov-2001	thorpej	Machine-dependent kernel mods for scheduler activations on 32-bit ARM processors. Kernel boots multi-user on an XScale, but upcalls not yet tested.
1.16.2.1	09-Nov-2001	thorpej	file cpu.h was added on branch nathanw_sa on 2001-11-15 06:39:22 +0000
1.27.2.1	30-Aug-2002	gehenna	catch up with -current.
1.34.2.5	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.34.2.4	24-Sep-2004	skrll	Sync with HEAD.
1.34.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.34.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.34.2.1	03-Aug-2004	skrll	Sync with HEAD
1.36.12.7	17-Mar-2008	yamt	sync with head.
1.36.12.6	21-Jan-2008	yamt	sync with head
1.36.12.5	27-Oct-2007	yamt	sync with head.
1.36.12.4	03-Sep-2007	yamt	sync with head.
1.36.12.3	26-Feb-2007	yamt	sync with head.
1.36.12.2	30-Dec-2006	yamt	sync with head.
1.36.12.1	21-Jun-2006	yamt	sync with head.
1.38.12.1	24-May-2006	tron	Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
1.38.10.1	19-Apr-2006	elad	sync with head - hopefully this will work
1.38.8.2	11-Aug-2006	yamt	sync with head
1.38.8.1	11-Apr-2006	yamt	sync with head
1.38.6.1	22-Apr-2006	simonb	Sync with head.
1.38.4.1	09-Sep-2006	rpaulo	sync with head
1.41.2.3	08-Apr-2007	skrll	Set curlwp in cpu_switchto and provide a cpu_did_resched. Who is copying who now?
1.41.2.2	29-Mar-2007	skrll	Adapt arm32. Thanks to scw for helping out. Tested on my cats (SA1) XXX hydra should die. i've made some changes, but no guarantees.
1.41.2.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.42.12.3	03-Oct-2007	garbled	Sync with HEAD
1.42.12.2	26-Jun-2007	garbled	Sync with HEAD.
1.42.12.1	22-May-2007	matt	Update to HEAD.
1.42.10.1	19-Apr-2007	thorpej	Convert to the new atomic ops API.
1.42.6.1	11-Jul-2007	mjf	Sync with head.
1.42.4.4	09-Oct-2007	ad	Sync with head.
1.42.4.3	20-Aug-2007	ad	Sync with HEAD.
1.42.4.2	09-Jun-2007	ad	Sync with head.
1.42.4.1	27-May-2007	ad	Sync with head.
1.44.8.2	02-Oct-2007	joerg	Sync with HEAD.
1.44.8.1	04-Aug-2007	jmcneill	Sync with HEAD.
1.44.6.4	28-Feb-2008	rjs	Sync with HEAD.
1.44.6.3	26-Dec-2007	rjs	Sync with HEAD.
1.44.6.2	06-Oct-2007	rjs	Sync with HEAD.
1.44.6.1	02-Oct-2007	rjs	Sync with HEAD.
1.44.4.1	15-Aug-2007	skrll	Sync with HEAD.
1.44.2.1	07-Aug-2007	matt	Sync with HEAD.
1.45.6.1	06-Oct-2007	yamt	sync with head.
1.45.4.8	23-Mar-2008	matt	sync with HEAD
1.45.4.7	28-Jan-2008	matt	Add fast softint switching support.
1.45.4.6	09-Jan-2008	matt	sync with HEAD
1.45.4.5	09-Nov-2007	matt	Make all the evbarm kernels build again. Fix lossage from rebase.
1.45.4.4	06-Nov-2007	matt	sync with HEAD
1.45.4.3	09-Sep-2007	matt	Make sure we won't set NULL curlwp.
1.45.4.2	29-Aug-2007	matt	If we are doing PROCESS_ID_IS_CURLWP, we don't need a ci_curlwp.
1.45.4.1	28-Aug-2007	matt	Move curpcb, curlwp, astpending, want_resched, current_spl_level, and current_intr_depth to cpu_info. Add support for storing either curlwp or curcpu in the ARMv6 supervisor process/thread id coprocessor register. Add LWP0_CPU_INFO to store location of static cpu_info for lwp0 static initialization. Use cpsi[ed] on ARMv6.
1.45.2.6	21-Mar-2008	chris	Sync with head.
1.45.2.5	09-Feb-2008	chris	Fix acorn32 to boot. Also fix cpu.h, a change sneaked in that isn't currently being used.
1.45.2.4	09-Feb-2008	chris	Add initial reworking of acorn32 to use new interrupt code. Note that cats probably won't work currently as acorn32 changed the way that the pic is registered, it has to provide the irq lines as on acorn32 we attach the iomd after we need to register irqs for the pioc. So we setup the irqs for iomd before malloc etc are available. This needs to be fixed. More work is still needed to update most of the podulebus drivers. First I need to add podulebus wrapper for interrupts that handles the maskaddr and maskbits. Exposing them to the common irq code is wrong.
1.45.2.3	20-Jan-2008	chris	Sync to HEAD.
1.45.2.2	01-Jan-2008	chris	Sync with HEAD.
1.45.2.1	11-Aug-2007	chris	Initial check-in of reworked arm interrupt routines. Main things to note on this branch: * spl routines are inlined, less complex, and small (kernel drops in size) * interrupts are handled in priority order (for most things it doesn't matter, but pending ipls are used to determine if there is any work to do) * arm_irqhandler.c is derived from footbridge_irqhandler.c, which was based on work by thorpej. * The code tries to touch hardware as little as possible. * spl masks are no longer tracked, as the system is based on pending ipls The shared code uses global ipl lists to track which interrupt handlers are attached to which ipl (arm_iplq[]). Interrupt sources register with the common code to indicate: * how many irq lines they have * a function to set the hardware mask. * call arm_intr_claim and arm_intr_disestablish to setup handlers When an interrupt occurs the ipl is flagged as pending, in ipls_pending. If it can be handled at the current_ipl_level the code does so. If it can't be handled it's left until the current_ipl_level drops. As the ipl level changes down a quick test is made of the new ipl level against the ipls_pending value. If an ipl is pending arm_intr_splx_lifter is called to handle the pending ipls. It should be noted that all interrupts are left enabled at the hardware level, interrupts are only masked when they occur. They are only re-enabled after it's interrupt handler is called. Hardware masks are not changed at any other time. Soft interrupts are treated the same as hardware interrupts, they register as a provider, and do not get treated specially. All the soft interrupt handlers are placed onto the relevant global ipl queue, the same as hard interrupts handlers. At the moment only footbridge within a cats has been updated to use the new handling. Todo: * change the handling of interrupts, so that the hardware doesn't register a routine to fetch the hardware status. Instead is makes a call which provides the mask. This removes the primary flag when registering an interrupt provider. It also makes more sense with multiple interrupt sources. * Arm v5 has the clz asm, which could be used instead of the carefully hand rolled arm_intr_fls function. * switch cats isa support to use this framework. * switch iomd and acorn32 to use this framework. * switch shark to use this framework. * port any other arm platforms that are interested * examine overlaps between this code and ppcoea-renovation branch. * add support for different trigger types (Edge, level, pulse, etc) (note that iomd and shark currently touch hardware on every spl change, hence why they're targets to port)
1.47.8.2	08-Jan-2008	bouyer	Sync with HEAD
1.47.8.1	13-Dec-2007	bouyer	Sync with HEAD
1.47.6.1	13-Dec-2007	yamt	sync with head.
1.47.4.1	26-Dec-2007	ad	Sync with head.
1.47.2.1	18-Feb-2008	mjf	Sync with HEAD.
1.51.6.3	28-Sep-2008	mjf	Sync with HEAD.
1.51.6.2	02-Jun-2008	mjf	Sync with HEAD.
1.51.6.1	03-Apr-2008	mjf	Sync with HEAD.
1.51.2.1	24-Mar-2008	keiichi	sync with head.
1.53.4.4	11-Aug-2010	yamt	sync with head.
1.53.4.3	11-Mar-2010	yamt	sync with head
1.53.4.2	04-May-2009	yamt	sync with head.
1.53.4.1	16-May-2008	yamt	sync with head.
1.53.2.1	18-May-2008	yamt	sync with head.
1.54.6.1	19-Oct-2008	haad	Sync with HEAD.
1.54.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.56.10.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.56.2.1	19-Jan-2009	skrll	Sync with HEAD.
1.59.4.1	05-Mar-2011	rmind	sync with head
1.59.2.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.62.14.1	09-Aug-2012	jdc	branches: 1.62.14.1.2; Pull up revisions: src/sys/arch/evbarm/dev/plcomreg.h revisions 1.2,1.3,1.4 src/sys/arch/evbarm/conf/INTEGRATOR revision 1.65 src/sys/arch/evbarm/dev/plcom.c revisions 1.34,1.35,1.36,1.37,1.38,1.39,1.40 src/sys/arch/evbarm/ifpga/plcom_ifpga.c revisions 1.12,1.13,1.14 src/sys/arch/evbarm/dev/plcomvar.h revisions 1.9,1.10,1.11 src/sys/arch/evbarm/ifpga/plcom_ifpgavar.h revision 1.2 src/sys/arch/arm/arm/cpufunc.c revisions 1.105,1.108 src/sys/arch/arm/arm32/cpu.c revision 1.79 src/sys/arch/arm/include/armreg.h revisions 1.49,1.54 src/sys/arch/arm/arm32/pmap.c revision 1.229 src/sys/arch/arm/arm32/arm32_machdep.c revision 1.77 src/sys/arch/arm/include/cpu.h revision 1.64 src/sys/arch/arm/arm/cpufunc_asm_arm1136.S revision 1.3 src/sys/arch/arm/arm/cpufunc_asm_arm11x6.S revision 1.1 src/sys/arch/arm/conf/files.arm revision 1.106 src/sys/arch/arm/include/cpufunc.h revision 1.57 src/sys/dev/sdmmc/sdhc.c revisions 1.14,1.24 src/sys/dev/sdmmc/sdhcvar.h revisions 1.7,1.8 src/sys/arch/evbarm/ifpga/ifpgareg.h revision 1.4 src/sys/arch/evbarm/integrator/integrator_machdep.c revision 1.69 src/sys/arch/arm/broadcom/bcm2835_dma.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_emmc.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_intr.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_intr.h revision 1.1 src/sys/arch/arm/broadcom/bcm2835_obio.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_plcom.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_pm.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_pmvar.h revision 1.1 src/sys/arch/arm/broadcom/bcm2835_space.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_tmr.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835reg.h revision 1.1 src/sys/arch/arm/broadcom/bcm2835var.h revision 1.1 src/sys/arch/arm/broadcom/bcm_amba.h revision 1.1 src/sys/arch/arm/broadcom/files.bcm2835 revision 1.1 src/sys/arch/evbarm/Makefile revision 1.9 src/sys/arch/evbarm/conf/RPI revision 1.1 src/sys/arch/evbarm/conf/files.rpi revision 1.1 src/sys/arch/evbarm/conf/mk.rpi revision 1.1 src/sys/arch/evbarm/conf/std.rpi revision 1.1 src/sys/arch/evbarm/rpi/genassym.cf revision 1.1 src/sys/arch/evbarm/rpi/rpi.h revision 1.1 src/sys/arch/evbarm/rpi/rpi_machdep.c revision 1.1 src/sys/arch/evbarm/rpi/rpi_start.S revision 1.1,1.2 src/etc/etc.evbarm/Makefile.inc revision 1.28 (requested by skrll in ticket #454). don't mix #define<TAB> and #define<SPACE> in a file. avoid warning with options PLCOM_DEBUG for INTEGRATOR. Rename register values. No functional change - same code before and after. Existing names are prefixed with PL01X_ where they're common between the PL010 and the PL011. The PL010_/PL011_ prefixes are added where they're found only on the respective chips. Replace the simple_lock with a kmutex_t. Update the locking to match com(4) in the few places it didn't already. DOH. Replace a line that got accidently deleted in the last commit. device_t/softc split struct device * -> device_t struct cfdata * -> cfdata_t Add the 'Z' to the 1176 cpu product name. ok matt@ Fix locking botch introduced in 1.36. Fix a KASSERT. From/OK'ed by matt@ Fix racy softint dispatch that lead to KASSERT(si->si_active) in softint_execute Discussed with matt@. "Looks good to me" Add the documented ARM11[37]6 Auxiliary control register defines. Add support for the ARM1176JZS Add a flag for the lack of LED_ON in HOST_CTL (ti omap3 doesn't do that). Provide a method for attachments to specify capabilites. Add support for the PL011 to plcom. Pull across a bunch of fixes from com(4) while I'm here and do some other tidyup. Tested on a RaspberryPi. PL010 not tested. Initial commit of support for the RaspberryPI (www.raspberrypi.org) This is enough for serial console via the gpio header pins and to get to multiuser. A huge thank you to Matt Thomas for all his help. Add RPI to KERNEL_SETS Remove #if 0 code.
1.62.14.1.2.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.62.12.1	18-Feb-2012	mrg	merge to -current.
1.62.8.4	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.62.8.3	23-Jan-2013	yamt	sync with head
1.62.8.2	30-Oct-2012	yamt	sync with head
1.62.8.1	17-Apr-2012	yamt	sync with head
1.73.2.3	03-Dec-2017	jdolecek	update from HEAD
1.73.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.73.2.1	25-Feb-2013	tls	resync with head
1.75.2.2	18-May-2014	rmind	sync with head
1.75.2.1	28-Aug-2013	rmind	sync with head
1.83.4.1	11-Mar-2015	snj	Pull up following revision(s) (requested by skrll in ticket #582): distrib/utils/embedded/conf/rpi.conf: revision 1.27 etc/etc.evbarm/Makefile.inc: revision 1.70 sys/arch/arm/broadcom/bcm2835_intr.c: revision 1.5-1.7 sys/arch/arm/broadcom/bcm2835_obio.c: revision 1.23, 1.24 sys/arch/arm/broadcom/bcm2835_space.c: revision 1.8 sys/arch/arm/broadcom/bcm2835reg.h: revision 1.14 sys/arch/arm/broadcom/bcm2835var.h: revision 1.2 sys/arch/arm/broadcom/files.bcm2835: revision 1.24 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.30 sys/arch/arm/cortex/armperiph.c: revision 1.8, 1.9 sys/arch/arm/cortex/gtmr.c: revision 1.9 sys/arch/arm/cortex/gtmr_var.h: revision 1.5 sys/arch/arm/cortex/mpcore_var.h: revision 1.3 sys/arch/arm/include/cpu.h: revision 1.84 sys/arch/evbarm/conf/RPI2: revision 1.1, 1.2 sys/arch/evbarm/conf/RPI2_INSTALL: revision 1.1 sys/arch/evbarm/conf/RPI: revision 1.59, 1.60 sys/arch/evbarm/conf/mk.rpi: revision 1.4 sys/arch/evbarm/conf/std.rpi: revisions 1.16-1.19 via patch sys/arch/evbarm/rpi/genassym.cf: revision 1.2 sys/arch/evbarm/rpi/rpi.h: revision 1.4 sys/arch/evbarm/rpi/rpi2_start.S: revision 1.1 sys/arch/evbarm/rpi/rpi_machdep.c: revision 1.57, 1.58 via patch sys/arch/evbarm/rpi/rpi_start.S: revision 1.13 Move some options into std.rpi -- Add __HAVE_MM_MD_CACHE_ALIASING Pull up following revision(s) (requested by skrll in ticket #582): Fix TPIDRPRW_IS_CURLWP builds. -- A MULTIPROCESSOR kernel requires TPIDRPRW_IS_CURCPU. -- Use TPIDRPRW_IS_CURLWP as it's a slight code reduction and performance improvement. Initial RPI2 support - it doesn't work yet. The generic timer gets messed up somehow. This commit changes the KVA layout of the RPI. -- Make this compile where gtmr isn't used. -- Spin up the non-boot CPUs, but don't allow cpu_boot_secondary_processors to see them for now. RPI2 nows works well with only the boot cpu. -- Appease a KASSERT - will be remove when MULTIPROCESSOR RPI2 is fixed. -- Add RPI2 to kernels build for both earmv[67]. Use the earmv6 built kernels to create an image that can be used on both RPI and RPI2 -- Add an RPI2_INSTALL
1.84.2.3	28-Aug-2017	skrll	Sync with HEAD
1.84.2.2	06-Jun-2015	skrll	Sync with HEAD
1.84.2.1	06-Apr-2015	skrll	Sync with HEAD
1.90.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.90.2.2	26-Apr-2017	pgoyette	Sync with HEAD
1.90.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.93.6.1	26-Feb-2018	snj	Pull up following revision(s) (requested by skrll in ticket #566): sys/arch/arm/include/cpu.h: 1.94 sys/arch/mips/include/cpu.h: 1.122 sys/arch/powerpc/include/cpu.h: 1.103 sys/sys/cpu.h: 1.42 CPU_INFO_FOREACH() must always iterate at least the boot cpu. document this in sys/cpu.h and fix the arm and mips versions to check ncpu is non zero before using it as an iterator max. this should fix the new assert in init_main.c. -- apply the same change for powerpc as mrg did for arm and mips: CPU_INFO_FOREACH() must always iterate at least the boot cpu. document this in sys/cpu.h and fix the arm and mips versions to check ncpu is non zero before using it as an iterator max. this should fix the new assert in init_main.c.
1.95.2.5	18-Jan-2019	pgoyette	Synch with HEAD
1.95.2.4	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.95.2.3	20-Oct-2018	pgoyette	Sync with head
1.95.2.2	06-Sep-2018	pgoyette	Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
1.95.2.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.96.2.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.96.2.1	10-Jun-2019	christos	Sync with HEAD
1.100.4.1	23-Oct-2019	martin	Pull up following revision(s) (requested by jmcneill in ticket #359): sys/arch/aarch64/aarch64/locore.S: revision 1.42 sys/arch/aarch64/aarch64/locore.S: revision 1.43 sys/arch/aarch64/aarch64/locore.S: revision 1.44 sys/arch/arm/fdt/cpu_fdt.c: revision 1.28 sys/arch/aarch64/include/cpu.h: revision 1.14 sys/arch/aarch64/include/param.h: revision 1.12 sys/arch/arm/arm32/cpu.c: revision 1.133 sys/arch/arm/arm32/cpu.c: revision 1.134 sys/arch/arm/include/cpu.h: revision 1.101 sys/arch/arm/acpi/cpu_acpi.c: revision 1.7 sys/arch/aarch64/aarch64/cpu.c: revision 1.23 sys/arch/aarch64/aarch64/cpu.c: revision 1.24 sys/arch/aarch64/aarch64/cpu.c: revision 1.25 Increase aarch64 MAXCPUS to 256. - Invalidate dcache before polling AP hatched status - Avoid overlap between BP and last AP stack. AP stacks are now in order of increasing address order. Spotted by and idea from mlelstv. - Use separate cacheline aligned arrays for mbox and hatched as before. - cpu_hatched_p only for MULTIPROCESSOR
1.103.2.3	29-Feb-2020	ad	Sync with head.
1.103.2.2	25-Jan-2020	ad	Sync with head.
1.103.2.1	17-Jan-2020	ad	Sync with head.
1.114.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.116.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.123.4.1	09-Aug-2023	martin	Pull up following revision(s) (requested by maya in ticket #316): sys/arch/m68k/include/mutex.h: revision 1.13 sys/arch/arm/include/cpu.h: revision 1.125 sys/arch/sun68k/include/intr.h: revision 1.21 sys/arch/arm/include/mutex.h: revision 1.28 sys/sys/rwlock.h: revision 1.18 sys/arch/powerpc/include/mutex.h: revision 1.7 sys/arch/arm/include/mutex.h: revision 1.29 sys/arch/powerpc/include/mutex.h: revision 1.8 sys/uvm/uvm_param.h: revision 1.42 sys/sys/ksem.h: revision 1.16 sys/arch/x86/include/mutex.h: revision 1.10 sys/sys/proc.h: revision 1.372 sys/sys/ksem.h: revision 1.17 sys/arch/ia64/include/mutex.h: revision 1.8 sys/arch/evbarm/include/intr.h: revision 1.29 sys/sys/lua.h: revision 1.9 sys/arch/next68k/include/intr.h: revision 1.23 sys/arch/ia64/include/mutex.h: revision 1.9 sys/arch/hp300/include/intr.h: revision 1.35 sys/arch/hp300/include/intr.h: revision 1.36 sys/arch/sparc/include/cpu.h: revision 1.111 sys/arch/hppa/include/mutex.h: revision 1.16 sys/arch/vax/include/intr.h: revision 1.31 sys/arch/hppa/include/mutex.h: revision 1.17 sys/arch/news68k/include/intr.h: revision 1.28 sys/arch/hppa/include/mutex.h: revision 1.18 sys/arch/hppa/include/intr.h: revision 1.3 sys/arch/hppa/include/mutex.h: revision 1.19 sys/arch/hppa/include/intr.h: revision 1.4 sys/sys/sched.h: revision 1.92 sys/opencrypto/cryptodev.h: revision 1.51 sys/arch/vax/include/mutex.h: revision 1.20 sys/arch/sparc64/include/mutex.h: revision 1.10 sys/arch/ia64/include/sapicvar.h: revision 1.2 sys/arch/riscv/include/mutex.h: revision 1.5 sys/arch/amiga/dev/grfabs_cc.c: revision 1.39 sys/external/bsd/drm2/include/linux/idr.h: revision 1.11 sys/arch/riscv/include/mutex.h: revision 1.6 sys/ddb/files.ddb: revision 1.16 sys/arch/mac68k/include/intr.h: revision 1.32 share/man/man4/ddb.4: revision 1.203 sys/ddb/db_command.c: revision 1.183 sys/arch/mips/include/mutex.h: revision 1.10 sys/ddb/db_command.c: revision 1.184 sys/arch/x68k/include/intr.h: revision 1.22 sys/arch/sparc/include/psl.h: revision 1.51 sys/arch/or1k/include/mutex.h: revision 1.4 sys/arch/mips/include/mutex.h: revision 1.11 sys/arch/arm/xscale/pxa2x0_intr.h: revision 1.16 sys/arch/sparc64/include/cpu.h: revision 1.134 sys/arch/sparc/include/psl.h: revision 1.52 sys/arch/or1k/include/mutex.h: revision 1.5 sys/arch/mvme68k/include/intr.h: revision 1.22 sys/arch/luna68k/include/intr.h: revision 1.16 external/cddl/osnet/sys/sys/kcondvar.h: revision 1.6 sys/arch/sparc/include/mutex.h: revision 1.12 sys/arch/sparc/include/mutex.h: revision 1.13 sys/arch/usermode/include/mutex.h: revision 1.5 sys/arch/usermode/include/mutex.h: revision 1.6 sys/kern/kern_core.c: revision 1.38 usr.sbin/crash/Makefile: revision 1.49 sys/arch/amiga/include/intr.h: revision 1.23 sys/arch/alpha/include/mutex.h: revision 1.12 sys/arch/alpha/include/mutex.h: revision 1.13 sys/arch/evbarm/lubbock/sacc_obio.c: revision 1.16 sys/ddb/ddb.h: revision 1.6 sys/arch/sparc64/include/mutex.h: revision 1.8 sys/arch/sh3/include/mutex.h: revision 1.12 sys/arch/evbarm/lubbock/sacc_obio.c: revision 1.17 sys/ddb/db_syncobj.c: revision 1.1 sys/arch/vax/include/mutex.h: revision 1.18 sys/arch/sparc64/include/psl.h: revision 1.63 sys/arch/sparc64/include/mutex.h: revision 1.9 sys/arch/sh3/include/mutex.h: revision 1.13 sys/arch/evbarm/lubbock/obio.c: revision 1.13 sys/arch/atari/include/intr.h: revision 1.23 sys/ddb/db_syncobj.c: revision 1.2 sys/arch/vax/include/mutex.h: revision 1.19 sys/arch/evbarm/g42xxeb/obio.c: revision 1.14 sys/arch/evbarm/g42xxeb/obio.c: revision 1.15 sys/arch/cesfic/include/intr.h: revision 1.14 sys/ddb/db_syncobj.h: revision 1.1 sys/arch/x86/include/cpu.h: revision 1.134 sys/arch/evbarm/g42xxeb/obio.c: revision 1.16 sys/arch/cesfic/include/intr.h: revision 1.15 sys/arch/arm/xscale/pxa2x0_intr.c: revision 1.26 sys/sys/cpu_data.h: revision 1.54 sys/arch/m68k/include/mutex.h: revision 1.12 sys/arch/ia64/acpi/madt.c: revision 1.6 sys/rwlock.h: Make this more self-contained for bool. machine/mutex.h: Sprinkle includes so this can be used by crash(8). ddb: New `show all tstiles' command. Shows who's waiting for which locks and what the owner is up to. Include psl.h for ipl_cookie_t if __MUTEX_PRIVATE sys: Rip <sys/resourcevar.h> out of <uvm/uvm_param.h>. And thus out of <sys/param.h>, which is exceedingly overused and fragile and delenda est. Should fix (some) issues with the recent inclusion of machine/lock.h in various machine/mutex.h files. arm/mutex.h: Need machine/intr.h, machine/lock.h. For ipl_cookie_t and __cpu_simple_lock_t. evbarm/intr.h: Define ipl_cookie_t before including ARM_INTR_IMPL. Otherwise arm/mutex.h doesn't work, due to a cyclic dependency which should really be fixed. opencrypto/cryptodev.h: Fix includes. - Move sys/condvar.h under #ifdef _KERNEL. - Add some other necessary includes and forward declarations. - Sort. hp300/intr.h: Fix missing includes. linux/idr.h: Need <sys/mutex.h> for kmutex_t. amiga/intr.h: Don't define spl() functions if !_KERNEL. This is used by crash(8) now, and what's important is ipl_cookie_t. cesfic/intr.h: Expose ipl_cookie_t to userland for crash(8). cesfic/intr.h: Expose ipl_cookie_t to userland only with _KMEMUSER. Probably not necessary but let's be a little more cautious about this. atari/intr.h: Expose ipl_cookie_t with _KMEMUSER for crash(8). arm/cpu.h: Need sys/param.h for COHERENCY_UNIT. Nix machine/param.h -- not meant to be used directly, pulled in by sys/param.h. Move the definition of ipl_cookie_t out of the kernel-only sections, some _KMEMUSER applications need it. ddb: Cast pointer to uintptr_t first before db_expr_t. hppa/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). luna68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). mvme68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). news68k/intr.h: Fix includes. Put some definitions under _KERNEL. next68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). sys/ksem.h: Hack around fstat(8) abuse of _KERNEL. sun68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). vax/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). x68k/intr.h: Put functions under _KERNEL so crash(8) can use this. Make ipl_cookie_t visible for _KMEMUSER userland applications. fix editor mishap in previous Explicitly include <sys/mutex.h> for kmutex_t. Replace kmutex_t (which may be undefined here) with struct kmutex , suggested by Taylor. hp300/intr.h: Put most of this under #ifdef _KERNEL. Only ipl_cookie_t really needs to be exposed now, for crash(8). mac68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). Make inclusion of sys/intr.h explicit for spl. fix hppa and vax builds. machine/lock.h isn't necessary for __cpu_simple_lock_t, it's in sys/types.h. avoids cpu_data.h vs sched.h include order issues. move the hppa ipl_t typedef with the moved usage of it. machine/mutex.h: Sprinkle sys/types.h, omit machine/lock.h. Turns out machine/lock.h is not needed for __cpu_simple_lock_t, which always comes from sys/types.h. And, really, sys/types.h (or at least sys/stdint.h) is needed for uintN_t and uintptr_t. ddb: Cast pointer to uintptr_t, then to db_expr_t. Avoids warnings about conversion between pointer and integer of different size on some architectures. re-fix hppa builds. this file uses __cpu_simple_lock(), not just the underlying type, so it does need machine/lock.h. Break cycle by using `struct kmutex ' instead of `kmutex_t '. sys/sched.h included sys/mutex.h which includes sys/intr.h which includes machine/intr.h which on cats includes arm/footbridge/footbridge_intr.h which includes arm/cpu.h which includes sys/cpu_data.h which includes sys/sched.h But there was never any real need for sys/mutex.h in sys/sched.h, because it only uses pointers to the opaque struct kmutex. Cycle broken by using `struct kmutex *' instead of pulling in sys/mutex.h for the definition of kmutex_t. Side effect: This revealed that sys/cpu_data.h needed sys/intr.h (which was pulled in accidentally by sys/mutex.h via sys/sched.h) for SOFTINT_COUNT. Also revealed some other machine/cpu.h header files were missing includes of sys/mutex.h for kmutex_t. ia64: Need sys/types.h for u_int, vaddr_t; sys/mutex.h for kmutex_t. explicitly include no longer implicitly included sys/mutex.h. arm/xscale: Use sys/bitops.h fls32 - 1 instead of 31 - __builtin_clz. Sidesteps namespace collision with `#define bits ...' in net/zlib.c. complete the previous - there were two calls to find_first_bit() to fix. arm/xscale: Missed a spot with previous find_first_bit commit. evbarm/g42xxeb: Fix off-by-one in previous. The original find_first_bit(x) was 31 - __builtin_clz((uint32_t)x), which is equivalent to fls32(x) - 1, not to fls32(x). Note that fls32 is 1-based and returns 0 for x=0.
1.3	26-Feb-2014	matt	ci_cpu_id -> ci_arm_cpuid
1.2	29-Aug-2012	matt	branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; 1.2.16; Use ci->ci_data.cpu_cc_freq. Use new armreg_* macros.
1.1	14-Aug-2012	matt	Add __HAVE_CPU_COUNTER support for ARM11 and Cortex CPUs
1.2.16.2	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.2.16.1	29-Aug-2012	matt	file cpu_counter.h was added on branch matt-nb5-mips64 on 2014-02-15 16:18:36 +0000
1.2.8.1	18-May-2014	rmind	sync with head
1.2.6.2	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.2.6.1	29-Aug-2012	matt	file cpu_counter.h was added on branch matt-nb6-plus on 2012-11-28 22:40:28 +0000
1.2.4.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2.4.2	30-Oct-2012	yamt	sync with head
1.2.4.1	29-Aug-2012	yamt	file cpu_counter.h was added on branch yamt-pagecache on 2012-10-30 17:19:04 +0000
1.2.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.3	11-Dec-2021	mrg	remove clause 3 from all my licenses that aren't conflicting with another copyright claim line. again. (i did this in 2008 and then did not update all of my personal templates.)
1.2	15-Feb-2020	skrll	branches: 1.2.4; Various updates and improvements to cpu start up on arm/aarch64 - start sharing more code around the AP startup messaging. - call arm_cpu_topology_set early so that ci_core_id is available for drivers, e.g. bcm2835_intr.c - both arm and aarch64 now have - a static cpu_info_store array - the same arm_cpu_{hatched,mbox}
1.1	15-Jan-2020	mrg	branches: 1.1.2; port the arm64 cpu topology setup for big.little to arm. rename arm64 cpu_do_topology() to arm_cpu_do_topology() and call it from both arm cpu_attach(). replace both aarch64_set_topology() inline code in arm cpu_attach() with new arm_cpu_do_topology(), which is called by the arm64 locore as well (possibly not needed, which would allow it to become static.) not yet tested on a real big.little armv7 system. tested on rockpro64 and pinebook pro.
1.1.2.3	29-Feb-2020	ad	Sync with head.
1.1.2.2	17-Jan-2020	ad	Sync with head.
1.1.2.1	15-Jan-2020	ad	file cpu_topology.h was added on branch ad-namecache on 2020-01-17 21:47:24 +0000
1.2.4.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.2.4.1	15-Feb-2020	martin	file cpu_topology.h was added on branch phil-wifi on 2020-04-08 14:07:29 +0000
1.28	29-Sep-2020	jmcneill	Collapse all CPU_CORTEXA<n> options into CPU_CORTEX and do runtime detection instead of ifdefs where required.
1.27	10-Aug-2018	maxv	Retire CPU_ARM2, CPU_ARM250 and CPU_ARM3, they are all leftovers of acorn26. ok jmcneill@ skrll@
1.26	01-Apr-2018	ryo	branches: 1.26.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.25	08-Jul-2015	skrll	branches: 1.25.16; Remove CPU_CORTEXA8 from a conditional - it doesn't believe there.
1.24	14-Apr-2014	matt	branches: 1.24.4; Support (untested) SHEEVA_L2_CACHE and SHEEVA_L2_CACHE_WT options. Move prototypes out to <arm/cpufunc.h> to their own file. Add sdcache routines to cpufunc_asm_sheeva.S Add code sheeve_setup to init the sdcache and sdcache info.
1.23	30-Mar-2014	matt	branches: 1.23.2; Make the ARM pmap use ASIDs, split TTBRs, and MP safe. This only happens for ARMv6 or later CPUs. This means that on context switch that the TLBs and caches no longer to cleaned/flushed. Also, eXecute Never (XN) protection has been added so non-exec pages can not be run. Change the page size for ARMv6+ to be 8KB while allows a L1PT to be a normal page. This means that the L1PT is not special. Use the XN support to only sync pages that are executed from.
1.22	25-Feb-2014	matt	Default ARM11 to ARM_MMU_V6N
1.21	19-May-2013	rkujawa	branches: 1.21.2; Make PJ4B support code compilable. Obtained from Marvell, Semihalf.
1.20	10-Mar-2011	bsh	branches: 1.20.4; 1.20.14; Preliminary ARM11 MPCore support. I have confirmed this commit doesn't affect existing evbarm kernels by comparing binaries.
1.19	02-Oct-2010	kiyohara	branches: 1.19.2; Add support Marvell Sheeva Core and SoC. (Orion/Kirkwood) Discovery Innovation not yet.
1.18	19-Jun-2010	matt	Cleanup the armv7 changes. Add ARM_ARCH_7. Use CPU_CORTEX instead of CPU_CORTEXA8 everywhere since there more types of Cortex than just the A8. CPU_CORTEXA8 still exists but causes CPU_CORTEX to be defined. Add CPU_CORTEXA9 as well. Use .arch armv7a to get us the isb/dsb instructions. Test booted to root device prompt on a Beagleboard. All ARM kernels successfully test built.
1.17	16-Jun-2010	jmcneill	PR port-arm/43299: Support added for igepv2/cortexa8/omap3530 Apply patch from PR, with build fixes. ok skrll, matt
1.16	27-Feb-2009	msaitoh	branches: 1.16.2; 1.16.4; IXP425 is not ARM_ARCH_4 but ARM_ARCH_5
1.15	14-Oct-2008	matt	branches: 1.15.2; 1.15.8; 1.15.12; Add FA526 support (compile tested only)
1.14	27-Apr-2008	matt	branches: 1.14.6; Merge kernel changes in matt-armv6 to HEAD.
1.13	06-Jan-2007	christos	branches: 1.13.26; 1.13.46; 1.13.48; 1.13.50; Scott Allan in http://mail-index.netbsd.org/port-arm/2006/07/31/0000.html Patch to add support for ARM9E
1.12	11-Dec-2005	christos	branches: 1.12.20; 1.12.24; merge ktrace-lwp.
1.11	04-Jul-2005	bsh	branches: 1.11.2; The first step to support Intel PXA270. kernel config option CPU_XSCALE_PXA2X0 is now obsoleted by CPU_XSCALE_PXA250 and CPU_XSCALE_PXA270. If both of them are defined, CPU is determined run-time.
1.10	03-Jun-2005	rearnsha	Very basic support for the ARM1136. This code takes no advantage of any 'new' features provided by architecture 6 devices (such as physically tagged caches or new MMU features), and basically runs the chip in a 'legacy v5' mode.
1.9	21-Aug-2004	rearnsha	ARM10 is an architecture 5 device (not 4). If supporting architecture 5, enable Thumb code support. Note: we could probably enable this for 4T processors as well, but getting interworking right is much more tricky.
1.8	06-Sep-2003	rearnsha	Add support for ARM10 class devices.
1.7	23-May-2003	ichiro	branches: 1.7.2; support IXP425 Intel Network Processor running on BigEndian
1.6	22-Apr-2003	thorpej	Some ARM32_PMAP_NEW-related cleanup: * Define a new "MMU type", ARM_MMU_SA1. While the SA-1's MMU is basically compatible with the generic, the SA-1 cache does not have a write-through mode, and it is useful to know have an indication of this. * Add a new PMAP_NEEDS_PTE_SYNC indicator, and try to evaluate it at compile time. We evaluate it like so: - If SA-1-style MMU is the only type configured -> 1 - If SA-1-style MMU is not configured -> 0 - Otherwise, defer to a run-time variable. If PMAP_NEEDS_PTE_SYNC might evaluate to true (SA-1 only or run-time check), then we also define PMAP_INCLUDE_PTE_SYNC so that e.g. assembly code can include the necessary run-time support. PMAP_INCLUDE_PTE_SYNC largely replaces the ARM32_PMAP_NEEDS_PTE_SYNC manual setting Steve included with the original new pmap. * In the new pmap, make pmap_pte_init_generic() check to see if the CPU has a write-back cache. If so, init the PT cache mode to C=1,B=0 to get write-through mode. Otherwise, init the PT cache mode to C=1,B=1. * Add a new pmap_pte_init_arm8(). Old pmap, same as generic. New pmap, sets page table cacheability to 0 (ARM8 has a write-back cache, but flushing it is quite expensive). * In the new pmap, make pmap_pte_init_arm9() reset the PT cache mode to C=1,B=0, since the write-back check in generic gets it wrong for ARM9, since we use write-through mode all the time on ARM9 right now. (What this really tells me is that the test for write-through cache is less than perfect, but we can fix that later.) * Add a new pmap_pte_init_sa1(). Old pmap, same as generic. New pmap, does generic initialization, then resets page table cache mode to C=1,B=1, since C=1,B=0 does not produce write-through on the SA-1.
1.5	09-Apr-2003	thorpej	Fix a typo.
1.4	07-Aug-2002	briggs	Implement pmc(9) -- An interface to hardware performance monitoring counters. These counters do not exist on all CPUs, but where they do exist, can be used for counting events such as dcache misses that would otherwise be difficult or impossible to instrument by code inspection or hardware simulation. pmc(9) is meant to be a general interface. Initially, the Intel XScale counters are the only ones supported.
1.3	15-Jul-2002	ichiro	add support for ixp12x0
1.2	03-May-2002	thorpej	branches: 1.2.2; 1.2.6; Add support for the Intel PXA210 and PXA250. From Hiroyuki Bessho, PR 16617.
1.1	12-Apr-2002	thorpej	branches: 1.1.2; Centralize ARM CPU configuration information by adding a new header file, <arm/cpuconf.h>, which pulls in "opt_cputypes.h" and then defines the following: * CPU_NTYPES -- now many CPU types are configured into the kernel. What you really want to know is "== 1" or "> 1". * Defines ARM_ARCH_2, ARM_ARCH_3, ARM_ARCH_4, ARM_ARCH_5, depending on which ARM architecture versions are configured (based on CPU_* options). Also defines ARM_NARCH to determins how many architecture versions are configured. * Defines ARM_MMU_MEMC, ARM_MMU_GENERIC, ARM_MMU_XSCALE depending on which classes of ARM MMUs are configured into the kernel, and ARM_NMMUS to determine how many MMU classes are configured. Remove the needless inclusion of "opt_cputypes.h" in several places. Convert remaining users to <arm/cpuconf.h>.
1.1.2.5	13-Aug-2002	nathanw	Catch up to -current.
1.1.2.4	01-Aug-2002	nathanw	Catch up to -current.
1.1.2.3	20-Jun-2002	nathanw	Catch up to -current.
1.1.2.2	17-Apr-2002	nathanw	Catch up to -current.
1.1.2.1	12-Apr-2002	nathanw	file cpuconf.h was added on branch nathanw_sa on 2002-04-17 00:02:30 +0000
1.2.6.3	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.2.6.2	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.2.6.1	03-May-2002	jdolecek	file cpuconf.h was added on branch kqueue on 2002-06-23 17:34:51 +0000
1.2.2.2	30-Aug-2002	gehenna	catch up with -current.
1.2.2.1	21-Jul-2002	gehenna	catch up with -current.
1.7.2.5	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.7.2.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.7.2.3	18-Sep-2004	skrll	Sync with HEAD.
1.7.2.2	25-Aug-2004	skrll	Sync with HEAD.
1.7.2.1	03-Aug-2004	skrll	Sync with HEAD
1.11.2.1	26-Feb-2007	yamt	sync with head.
1.12.24.1	21-Feb-2007	snj	branches: 1.12.24.1.4; Pull up following revision(s) (requested by matt in ticket #457): sys/arch/arm/include/cpufunc.h: revision 1.38 sys/arch/arm/arm/cpufunc.c: revision 1.78 sys/arch/arm/arm/cpufunc_asm_arm10.S: revision 1.6 sys/arch/arm/include/armreg.h: revision 1.37 sys/arch/arm/arm32/cpu.c: revision 1.64 sys/arch/arm/arm/cpufunc_asm_armv5.S: revision 1.3 sys/arch/arm/include/cpuconf.h: revision 1.13 sys/arch/arm/conf/files.arm: revision 1.82 sys/arch/arm/arm/cpufunc_asm_armv5_ec.S: revision 1.1 Scott Allan in http://mail-index.netbsd.org/port-arm/2006/07/31/0000.html Patch to add support for ARM9E
1.12.24.1.4.1	10-Nov-2007	matt	Add AT91 support from Sami Kantoluoto Add TI OMAP2430 support from Marty Fouts @ Danger Inc
1.12.20.1	12-Jan-2007	ad	Sync with head.
1.13.50.4	09-Oct-2010	yamt	sync with head
1.13.50.3	11-Aug-2010	yamt	sync with head.
1.13.50.2	04-May-2009	yamt	sync with head.
1.13.50.1	16-May-2008	yamt	sync with head.
1.13.48.1	18-May-2008	yamt	sync with head.
1.13.46.2	17-Jan-2009	mjf	Sync with HEAD.
1.13.46.1	02-Jun-2008	mjf	Sync with HEAD.
1.13.26.1	12-Oct-2007	matt	Import TI OMAP 2430 and ARM11/ARMv6 support. Now on ARMv6, the cache is no longer purged on context switches.
1.14.6.1	19-Oct-2008	haad	Sync with HEAD.
1.15.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.15.8.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.15.2.1	03-Mar-2009	skrll	Sync with HEAD.
1.16.4.3	21-Apr-2011	rmind	sync with head
1.16.4.2	05-Mar-2011	rmind	sync with head
1.16.4.1	03-Jul-2010	rmind	sync with head
1.16.2.2	22-Oct-2010	uebayasi	Sync with HEAD (-D20101022).
1.16.2.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.19.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.20.14.3	03-Dec-2017	jdolecek	update from HEAD
1.20.14.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.20.14.1	23-Jun-2013	tls	resync from head
1.20.4.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.21.2.1	18-May-2014	rmind	sync with head
1.23.2.1	10-Aug-2014	tls	Rebase.
1.24.4.1	22-Sep-2015	skrll	Sync with HEAD
1.25.16.2	06-Sep-2018	pgoyette	Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
1.25.16.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.26.2.1	10-Jun-2019	christos	Sync with HEAD
1.93	09-Oct-2025	rin	arm/cpufunc.h: Fix RCSID, NFC
1.92	26-Sep-2025	skrll	arm: Adjust barriers issued in bus_dmamap_sync for the coherent case. PR/59654 This change adjusts the memory barriers issued by bus_dmamap_sync for the coherent case. In the non-coherent case the CPU cache operations are expected to provide any, and all required barriers. These barriers are emitted after bouncing for PREWRITE and before bouncing for POSTREAD. A new indrection is introduced to deal with the differencs in barrier (dsb) options between Arm V8 and V7, the lack of options in Arm V6, and the need to use cpu_drain_writebuf for all other earlier versions. The Arm V8 Net change is: op old new
1.91	25-Sep-2025	skrll	#define<tab> and other <tab> consistency
1.90	28-Apr-2022	skrll	branches: 1.90.4; 1.90.12; G/C
1.89	01-Nov-2021	skrll	Move arm_cache_info from cpufunc.h to cpu.h
1.88	01-Mar-2021	jmcneill	Add DISABLE_INTERRUPT_SAVE(), like DISABLE_INTERRUPT() but also returns the previous state. Use DISABLE_INTERRUPT_SAVE()/ENABLE_INTERRUPT() in pic_splfuncs instead of cpsid()/cpsie(). The difference here is the caller no longer specifies which bits to disable and enable; on arm32 we continue to use I32_bit and on aarch64 we now consistently toggle both IRQ and FIQ state.
1.87	07-Feb-2021	jmcneill	Add ENABLE_INTERRUPT() / DISABLE_INTERRUPT() macros for compatibility with aarch64.
1.86	03-Dec-2020	skrll	Provide and use a sev() macro for the sev instruction. While here use the correct barrier to ensure completion of memory accesses before a couple of the sev() calls.
1.85	31-Oct-2020	skrll	branches: 1.85.2; Fix armv6 builds by providing an armv6 is macro
1.84	29-Sep-2020	skrll	Fix RPI (armv6) build
1.83	26-Sep-2020	skrll	Define isb(), dsb(option), and dmb(option) Catch up with vchiq upstream to allow this.
1.82	11-Dec-2018	alnsn	Don't exclude code from rump kernel build.
1.81	20-Oct-2018	skrll	Clean up around cpu_ttb and fix a bunch of builds
1.80	29-Aug-2018	skrll	Whitespace
1.79	01-Apr-2018	ryo	branches: 1.79.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.78	24-Jan-2018	skrll	branches: 1.78.2; Remove port-acorn26 OK core@
1.77	16-Jul-2016	mrg	apply some #if (ARM_MMU_V6 + ARM_MMU_V7) != 0. now this builds on pre v6-only.
1.76	23-Jan-2016	christos	branches: 1.76.2; Rename the cpu_id() define to cpu_idnum() so that it does not conflict with dtrace and friends.
1.75	17-Oct-2015	jmcneill	remove tlb_flush define and change callers to use cpu_tlb_flushID directly, ok matt@
1.74	20-Apr-2014	christos	branches: 1.74.4; include cpufunc_proto.h since things need it.
1.73	19-Apr-2014	matt	Move xscale cpu_cpwait back from cpufunc_proto.ht to cpufunc.h
1.72	14-Apr-2014	matt	Support (untested) SHEEVA_L2_CACHE and SHEEVA_L2_CACHE_WT options. Move prototypes out to <arm/cpufunc.h> to their own file. Add sdcache routines to cpufunc_asm_sheeva.S Add code sheeve_setup to init the sdcache and sdcache info.
1.71	07-Apr-2014	matt	Declare armv7 routines if CPU_ARMV7 is defined. Rearrange in less random manner.
1.70	29-Mar-2014	matt	branches: 1.70.2; cortex doesn't need xscale_setup use arm11_setttb for arm11x6.
1.69	28-Mar-2014	matt	Use cpsie/cpsid if possible. change cache_type to uint8_t more ARM_MMU_EXTENDED support (ASID)
1.68	22-Feb-2014	matt	Add way_size to arm_cache_info Fix arm67_tlb_purge prototype
1.67	20-Feb-2014	matt	Keep track of what each cache is (VIVT/VIPT/PIPT). cpu0: 32KB/32B 2-way L1 VIPT Instruction cache cpu0: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache cpu0: 256KB/64B 8-way write-through L2 PIPT Unified cache
1.66	20-Feb-2014	matt	Make the tlb_flush*SE take a vaddr_t, not a u_int.
1.65	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.64	12-Jun-2013	matt	branches: 1.64.2; Nuke cpu_pfr, just use the armreg_pfr?_read inlines
1.63	19-May-2013	rkujawa	Make PJ4B support code compilable. Obtained from Marvell, Semihalf.
1.62	12-Nov-2012	skrll	C99 types
1.61	19-Oct-2012	matt	Add armv7_drain_writebuf (which is just a dsb).
1.60	22-Sep-2012	matt	Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead but add a second argument to it to indicate whether the TLB/caches need to be flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field to see if the fixed can be skipped. Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1) or enabeld (bit = 0). With these changes, the A9 MMU can use traverse caches to do MMU tablewalks Also, make sure all memory has the shareable bit for the A9.
1.59	11-Sep-2012	matt	branches: 1.59.2; Add secondary cache range ops
1.58	07-Sep-2012	matt	Switch cortex_a9 back to need_ptesync = 1 Add code to disable the L2 cache on cortex-a9 (for now). Add evcnt for all the fault types. Move cache info in a structure and have one for the pcache and one for scache. Probe L1/L2 caches properly for ARMv7
1.57	21-Jul-2012	skrll	Add support for the ARM1176JZS
1.56	14-Jul-2012	hans	Support cpu_sleep() on Sheeva CPUs.
1.55	16-Feb-2012	christos	expose functions needed to compute stack traces to kmemuser
1.54	11-Dec-2011	kiyohara	branches: 1.54.2; Require arm3_cache_flush for ARM2/ARM250.
1.53	10-Mar-2011	bsh	branches: 1.53.4; 1.53.8; Preliminary ARM11 MPCore support. I have confirmed this commit doesn't affect existing evbarm kernels by comparing binaries.
1.52	02-Oct-2010	kiyohara	branches: 1.52.2; Add support Marvell Sheeva Core and SoC. (Orion/Kirkwood) Discovery Innovation not yet.
1.51	19-Jun-2010	matt	Cleanup the armv7 changes. Add ARM_ARCH_7. Use CPU_CORTEX instead of CPU_CORTEXA8 everywhere since there more types of Cortex than just the A8. CPU_CORTEXA8 still exists but causes CPU_CORTEX to be defined. Add CPU_CORTEXA9 as well. Use .arch armv7a to get us the isb/dsb instructions. Test booted to root device prompt on a Beagleboard. All ARM kernels successfully test built.
1.50	16-Jun-2010	jmcneill	PR port-arm/43299: Support added for igepv2/cortexa8/omap3530 Apply patch from PR, with build fixes. ok skrll, matt
1.49	21-Oct-2008	matt	branches: 1.49.12; 1.49.14; 1.49.16; Use #ifdef, not #if
1.48	17-Oct-2008	cliff	use generic enable_interrupts() and disable_interrupts() instead of armv6-specific interrupt control ops when _ARM_ARCH_6 not defined
1.47	15-Oct-2008	matt	Add fa526_flush_prefetchbuf
1.46	14-Oct-2008	matt	Add FA526 support (compile tested only)
1.45	27-Apr-2008	matt	branches: 1.45.6; Merge kernel changes in matt-armv6 to HEAD.
1.44	25-Feb-2008	dogcow	branches: 1.44.2; 1.44.4; we need I32_bit, so #include <arm/armreg.h>
1.43	24-Feb-2008	chris	Micro-optimizations for arm. Make enable and disable interrupts one instruction shorter. Make cpu_cpwait() do nothing on anything other than an xscale, where it will still call via the cpufuncs table. This avoids loading a function from cpufuncs and then branching into it. On older hardware the function does nothing, so this is just a waste of CPU cycles.
1.42	17-Oct-2007	garbled	branches: 1.42.12; 1.42.16; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.41	15-Sep-2007	scw	ARM cpu_switchto() has been partially broken since yamt-idlelwp was merged as its cache/tlb management smarts relied too heavily on pre-merge context- switch behaviour. See PR kern/36548 for one manifestation of the breakage. To address this: - Ditch the shadow pmap variables in the PCB (pagedir, l1vec, dacr, cstate) as it was too easy for them to get out of sync with the pmap. - Re-write (and fix) the convoluted cpuswitch.S cache/tlb ASM code in C. It's only slightly less efficient, but is much more readable/maintainable. - Document cpufuncs.cf_context_switch() as being C-callable. - pmap_activate() becomes a no-op if the lwp's vmspace is already active. (Good performance win, since pmap_activate() is now invoked on every context-switch, even though ARM's cpu_switchto() already does all the grunt work) XXX: Some CPU-specific armXX_context_switch() implementations (arm67, arm7tdmi, arm8) always flush the I+D caches. This should not be necessary. Someone with access to hardware (acorn32?) needs to deal with this.
1.40	04-Mar-2007	bjh21	branches: 1.40.2; 1.40.10; 1.40.16; 1.40.18; 1.40.20; 1.40.22; Finally make cpufuncs work properly on acorn26, since something seems to be using it. This entailed adding support for ARM2 and ARM2as, and allowing for getting CPU IDs other than from CP15, since ARM2(as) doesn't have CP15.
1.39	04-Mar-2007	bjh21	Un-__P.
1.38	06-Jan-2007	christos	branches: 1.38.2; Scott Allan in http://mail-index.netbsd.org/port-arm/2006/07/31/0000.html Patch to add support for ARM9E
1.37	28-Dec-2005	perry	branches: 1.37.20; 1.37.24; inline -> __inline
1.36	24-Dec-2005	perry	Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.35	11-Dec-2005	christos	merge ktrace-lwp.
1.34	04-Jul-2005	bsh	branches: 1.34.2; The first step to support Intel PXA270. kernel config option CPU_XSCALE_PXA2X0 is now obsoleted by CPU_XSCALE_PXA250 and CPU_XSCALE_PXA270. If both of them are defined, CPU is determined run-time.
1.33	03-Jun-2005	rearnsha	Very basic support for the ARM1136. This code takes no advantage of any 'new' features provided by architecture 6 devices (such as physically tagged caches or new MMU features), and basically runs the chip in a 'legacy v5' mode.
1.32	02-Jun-2005	uwe	Drop parameter names from prototypes to avoid shadowing warnings.
1.31	07-Aug-2004	rearnsha	Changing the interrupt mask is a scheduling barrier.
1.30	26-Jan-2004	rearnsha	Switch the ARM9 to using the Dcache in write-back mode. Avoid an unknown problem with dcache_inv_range by using a wbinv for now (similarly for ARM10). When setting the ARM9 system control register, use the computed cpuctrlmask value (not 0xffffffff) so that the clocking-mode bits are not reset to FastBus mode (which isn't very fast).
1.29	06-Sep-2003	rearnsha	Add processor-specific declarations for ARM10 class processors.
1.28	06-Sep-2003	rearnsha	Fix declarations of primary cache variables, so that they are declarations, not definitions.
1.27	23-May-2003	ichiro	branches: 1.27.2; support IXP425 Intel Network Processor running on BigEndian
1.26	14-Aug-2002	thorpej	Garbage-collect some unused routines.
1.25	14-Aug-2002	briggs	Inline SetCPSR calls where it seems prudent to do so. This avoids two branches and allows the compiler to better utilize registers around calls to disable/enable/restore_interrupts().
1.24	15-Jul-2002	ichiro	add support for ixp12x0
1.23	03-May-2002	rjs	branches: 1.23.2; 1.23.4; Use processor specific versions of ARM cache control functions for SA1100 and SA1110 instead of using SA110 ones. Rename common StrongARM functions from sa110_* to sa1_*. Reviewed by Jason Thorpe.
1.22	03-May-2002	thorpej	Add support for the Intel PXA210 and PXA250. From Hiroyuki Bessho, PR 16617.
1.21	12-Apr-2002	thorpej	Centralize ARM CPU configuration information by adding a new header file, <arm/cpuconf.h>, which pulls in "opt_cputypes.h" and then defines the following: * CPU_NTYPES -- now many CPU types are configured into the kernel. What you really want to know is "== 1" or "> 1". * Defines ARM_ARCH_2, ARM_ARCH_3, ARM_ARCH_4, ARM_ARCH_5, depending on which ARM architecture versions are configured (based on CPU_* options). Also defines ARM_NARCH to determins how many architecture versions are configured. * Defines ARM_MMU_MEMC, ARM_MMU_GENERIC, ARM_MMU_XSCALE depending on which classes of ARM MMUs are configured into the kernel, and ARM_NMMUS to determine how many MMU classes are configured. Remove the needless inclusion of "opt_cputypes.h" in several places. Convert remaining users to <arm/cpuconf.h>.
1.20	09-Apr-2002	thorpej	* Move the code that cleans the XScale mini-data cache into its own function. * Add a new function which sets up the mini-data cache clean area properly.
1.19	26-Mar-2002	thorpej	Restructure a few things in order to support other XScale core I/O processors: * The i80200 and the i80321 have the same CPU ID, so split the CPU_XSCALE option into CPU_XSCALE_80200 and CPU_XSCALE_80321 options, and don't let them both be defined at the same time. XXX May want to revisit this in the future. * Split some registers common between the i80200 and i80321 into <arm/xscale/xscalereg.h>. * Rename a few existing functions.
1.18	30-Jan-2002	thorpej	Add prototype for sa11x0_cpu_sleep().
1.17	25-Jan-2002	thorpej	Overhaul of the ARM cache code. This is mostly a simplification pass. Rather than providing a whole slew of cache operations that aren't ever used, distill them down to some useful primitives: icache_sync_all Synchronize I-cache icache_sync_range Synchronize I-cache range dcache_wbinv_all Write-back and Invalidate D-cache dcache_wbinv_range Write-back and Invalidate D-cache range dcache_inv_range Invalidate D-cache range dcache_wb_range Write-back D-cache range idcache_wbinv_all Write-back and Invalidate D-cache, Invalidate I-cache idcache_wbinv_range Write-back and Invalidate D-cache, Invalidate I-cache range Note: This does not yet include an overhaul of the actual asm files that implement the primitives. Instead, we've provided a safe default for each CPU type, and the individual CPU types can now be optimized one at a time.
1.16	24-Jan-2002	briggs	Two changes for XScale: 1) Add defparam XSCALE_CCLKCFG to define a parameter for the CCLKCFG register. Default it to '9' on the IQ80310. 2) Add a sleep call to the xscale CPU function vector (replacing the nullop) which should drop the CPU into "idle" mode when cpu_switch finds nothing on the run queues.
1.15	20-Dec-2001	thorpej	* Share a common vector page between arm26 and arm32. * Use a common set of exception handlers for all arm32 platforms. * New FIQ framework based on discussions with Ben Harris, shared between arm26 and arm32.
1.14	29-Nov-2001	thorpej	Fetch cache info from the Cache Type register on ARM7TDMI and "greater" processors. Report this when the processor is attached.
1.13	28-Nov-2001	thorpej	Add prototypes for new XScale write-through cache routines.
1.12	19-Nov-2001	thorpej	Add a "cpwait" cpufunc, currently a nullop on all but XScale. "cpwait" ensures that all coprocessor operations have completed before returning.
1.11	14-Nov-2001	thorpej	branches: 1.11.2; * Give the XScale its own cpu_control() entry point; we have to flush the Branch Target Buffer of the BPRD bit changes. * Enable Branch Prediction on the XScale by default. * Don't invalidate the Branch Target Buffer explicitly. the i80200 manual (section 5.1, Branch Target Buffer Operation) notes that manual software management of the BTB is unnecessary; it is flushed implicitly when: * processor resets * FCSE process ID is written * I-cache is invalidated
1.10	18-Oct-2001	rearnsha	Add support calls for ARM9. Where ARM9, StrongARM and XScale share the same function, rename it as armv4_XXX.
1.9	14-Oct-2001	bjh21	Make the declaration of get_pc_str_offset() into a prototype.
1.8	26-Aug-2001	matt	Add xscale cpu functions
1.7	20-Aug-2001	wiz	Fix typo in comment (suceed).
1.6	05-Jun-2001	bjh21	branches: 1.6.2; Add get_pc_str_offset(), which returns the offset between the address of an instruction that stores the program counter and the value of PC that's stored. This can vary between ARM implementations, but is guaranteed to be constant on a given one.
1.5	03-Jun-2001	chris	Add support for ARM7TDMI, as provided in a patch from John Fremlin to port-arm32. Shouldn't effect any currently in tree ports.
1.4	02-Jun-2001	bjh21	Replace arm6_dataabt_fixup() and arm7_dataabt_fixup() with early_abort_fixup() and late_abort_fixup(), based on the abort model in use, rather than the CPU type. This cleans up the code and makes it smaller. Only tested on an ARM6 -- I can't find my ARM710a card right now.
1.3	02-Jun-2001	bjh21	Initial cpufunc operations for ARM3. Not actually used yet.
1.2	06-Mar-2001	bjh21	branches: 1.2.2; Create cpufunc_null_fixup() to replace all the CPU-specific abort-fixup routines that did nothing.
1.1	23-Feb-2001	reinoud	branches: 1.1.2; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.2.2	21-Jun-2001	nathanw	Catch up to -current.
1.1.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.2.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.2.2.1	06-Mar-2001	bouyer	file cpufunc.h was added on branch thorpej_scsipi on 2001-03-12 13:27:21 +0000
1.6.2.6	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.6.2.5	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.6.2.4	11-Feb-2002	jdolecek	Sync w/ -current.
1.6.2.3	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.6.2.2	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.6.2.1	25-Aug-2001	thorpej	Merge Aug 24 -current into the kqueue branch.
1.11.2.8	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.11.2.7	01-Aug-2002	nathanw	Catch up to -current.
1.11.2.6	20-Jun-2002	nathanw	Catch up to -current.
1.11.2.5	17-Apr-2002	nathanw	Catch up to -current.
1.11.2.4	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.11.2.3	28-Feb-2002	nathanw	Catch up to -current.
1.11.2.2	08-Jan-2002	nathanw	Catch up to -current.
1.11.2.1	14-Nov-2001	nathanw	file cpufunc.h was added on branch nathanw_sa on 2002-01-08 00:23:11 +0000
1.23.4.1	18-Nov-2002	he	Pull up revision 1.26 (requested by thorpej in ticket #682): Garbage-collect some unused routines.
1.23.2.2	30-Aug-2002	gehenna	catch up with -current.
1.23.2.1	21-Jul-2002	gehenna	catch up with -current.
1.27.2.5	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.27.2.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.27.2.3	18-Sep-2004	skrll	Sync with HEAD.
1.27.2.2	12-Aug-2004	skrll	Sync with HEAD.
1.27.2.1	03-Aug-2004	skrll	Sync with HEAD
1.34.2.5	27-Feb-2008	yamt	sync with head.
1.34.2.4	27-Oct-2007	yamt	sync with head.
1.34.2.3	03-Sep-2007	yamt	sync with head.
1.34.2.2	26-Feb-2007	yamt	sync with head.
1.34.2.1	21-Jun-2006	yamt	sync with head.
1.37.24.1	21-Feb-2007	snj	branches: 1.37.24.1.4; Pull up following revision(s) (requested by matt in ticket #457): sys/arch/arm/include/cpufunc.h: revision 1.38 sys/arch/arm/arm/cpufunc.c: revision 1.78 sys/arch/arm/arm/cpufunc_asm_arm10.S: revision 1.6 sys/arch/arm/include/armreg.h: revision 1.37 sys/arch/arm/arm32/cpu.c: revision 1.64 sys/arch/arm/arm/cpufunc_asm_armv5.S: revision 1.3 sys/arch/arm/include/cpuconf.h: revision 1.13 sys/arch/arm/conf/files.arm: revision 1.82 sys/arch/arm/arm/cpufunc_asm_armv5_ec.S: revision 1.1 Scott Allan in http://mail-index.netbsd.org/port-arm/2006/07/31/0000.html Patch to add support for ARM9E
1.37.24.1.4.1	10-Nov-2007	matt	Add AT91 support from Sami Kantoluoto Add TI OMAP2430 support from Marty Fouts @ Danger Inc
1.37.20.1	12-Jan-2007	ad	Sync with head.
1.38.2.1	12-Mar-2007	rmind	Sync with HEAD.
1.40.22.5	23-Mar-2008	matt	sync with HEAD
1.40.22.4	08-Nov-2007	matt	sync with -HEAD
1.40.22.3	06-Nov-2007	matt	sync with HEAD
1.40.22.2	12-Oct-2007	matt	Import TI OMAP 2430 and ARM11/ARMv6 support. Now on ARMv6, the cache is no longer purged on context switches.
1.40.22.1	29-Aug-2007	matt	Make arm11 use the armv6 cpufuncs.
1.40.20.3	21-Mar-2008	chris	Sync with head.
1.40.20.2	20-Jan-2008	chris	Sync to HEAD.
1.40.20.1	01-Jan-2008	chris	Sync with HEAD.
1.40.18.1	02-Oct-2007	joerg	Sync with HEAD.
1.40.16.2	28-Feb-2008	rjs	Sync with HEAD.
1.40.16.1	01-Nov-2007	rjs	Sync with HEAD.
1.40.10.1	03-Oct-2007	garbled	Sync with HEAD
1.40.2.1	09-Oct-2007	ad	Sync with head.
1.42.16.3	17-Jan-2009	mjf	Sync with HEAD.
1.42.16.2	02-Jun-2008	mjf	Sync with HEAD.
1.42.16.1	03-Apr-2008	mjf	Sync with HEAD.
1.42.12.1	24-Mar-2008	keiichi	sync with head.
1.44.4.4	09-Oct-2010	yamt	sync with head
1.44.4.3	11-Aug-2010	yamt	sync with head.
1.44.4.2	04-May-2009	yamt	sync with head.
1.44.4.1	16-May-2008	yamt	sync with head.
1.44.2.1	18-May-2008	yamt	sync with head.
1.45.6.2	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.45.6.1	19-Oct-2008	haad	Sync with HEAD.
1.49.16.3	21-Apr-2011	rmind	sync with head
1.49.16.2	05-Mar-2011	rmind	sync with head
1.49.16.1	03-Jul-2010	rmind	sync with head
1.49.14.2	22-Oct-2010	uebayasi	Sync with HEAD (-D20101022).
1.49.14.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.49.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.52.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.53.8.1	18-Feb-2012	mrg	merge to -current.
1.53.4.4	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.53.4.3	16-Jan-2013	yamt	sync with (a bit old) head
1.53.4.2	30-Oct-2012	yamt	sync with head
1.53.4.1	17-Apr-2012	yamt	sync with head
1.54.2.1	09-Aug-2012	jdc	branches: 1.54.2.1.2; Pull up revisions: src/sys/arch/evbarm/dev/plcomreg.h revisions 1.2,1.3,1.4 src/sys/arch/evbarm/conf/INTEGRATOR revision 1.65 src/sys/arch/evbarm/dev/plcom.c revisions 1.34,1.35,1.36,1.37,1.38,1.39,1.40 src/sys/arch/evbarm/ifpga/plcom_ifpga.c revisions 1.12,1.13,1.14 src/sys/arch/evbarm/dev/plcomvar.h revisions 1.9,1.10,1.11 src/sys/arch/evbarm/ifpga/plcom_ifpgavar.h revision 1.2 src/sys/arch/arm/arm/cpufunc.c revisions 1.105,1.108 src/sys/arch/arm/arm32/cpu.c revision 1.79 src/sys/arch/arm/include/armreg.h revisions 1.49,1.54 src/sys/arch/arm/arm32/pmap.c revision 1.229 src/sys/arch/arm/arm32/arm32_machdep.c revision 1.77 src/sys/arch/arm/include/cpu.h revision 1.64 src/sys/arch/arm/arm/cpufunc_asm_arm1136.S revision 1.3 src/sys/arch/arm/arm/cpufunc_asm_arm11x6.S revision 1.1 src/sys/arch/arm/conf/files.arm revision 1.106 src/sys/arch/arm/include/cpufunc.h revision 1.57 src/sys/dev/sdmmc/sdhc.c revisions 1.14,1.24 src/sys/dev/sdmmc/sdhcvar.h revisions 1.7,1.8 src/sys/arch/evbarm/ifpga/ifpgareg.h revision 1.4 src/sys/arch/evbarm/integrator/integrator_machdep.c revision 1.69 src/sys/arch/arm/broadcom/bcm2835_dma.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_emmc.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_intr.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_intr.h revision 1.1 src/sys/arch/arm/broadcom/bcm2835_obio.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_plcom.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_pm.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_pmvar.h revision 1.1 src/sys/arch/arm/broadcom/bcm2835_space.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835_tmr.c revision 1.1 src/sys/arch/arm/broadcom/bcm2835reg.h revision 1.1 src/sys/arch/arm/broadcom/bcm2835var.h revision 1.1 src/sys/arch/arm/broadcom/bcm_amba.h revision 1.1 src/sys/arch/arm/broadcom/files.bcm2835 revision 1.1 src/sys/arch/evbarm/Makefile revision 1.9 src/sys/arch/evbarm/conf/RPI revision 1.1 src/sys/arch/evbarm/conf/files.rpi revision 1.1 src/sys/arch/evbarm/conf/mk.rpi revision 1.1 src/sys/arch/evbarm/conf/std.rpi revision 1.1 src/sys/arch/evbarm/rpi/genassym.cf revision 1.1 src/sys/arch/evbarm/rpi/rpi.h revision 1.1 src/sys/arch/evbarm/rpi/rpi_machdep.c revision 1.1 src/sys/arch/evbarm/rpi/rpi_start.S revision 1.1,1.2 src/etc/etc.evbarm/Makefile.inc revision 1.28 (requested by skrll in ticket #454). don't mix #define<TAB> and #define<SPACE> in a file. avoid warning with options PLCOM_DEBUG for INTEGRATOR. Rename register values. No functional change - same code before and after. Existing names are prefixed with PL01X_ where they're common between the PL010 and the PL011. The PL010_/PL011_ prefixes are added where they're found only on the respective chips. Replace the simple_lock with a kmutex_t. Update the locking to match com(4) in the few places it didn't already. DOH. Replace a line that got accidently deleted in the last commit. device_t/softc split struct device * -> device_t struct cfdata * -> cfdata_t Add the 'Z' to the 1176 cpu product name. ok matt@ Fix locking botch introduced in 1.36. Fix a KASSERT. From/OK'ed by matt@ Fix racy softint dispatch that lead to KASSERT(si->si_active) in softint_execute Discussed with matt@. "Looks good to me" Add the documented ARM11[37]6 Auxiliary control register defines. Add support for the ARM1176JZS Add a flag for the lack of LED_ON in HOST_CTL (ti omap3 doesn't do that). Provide a method for attachments to specify capabilites. Add support for the PL011 to plcom. Pull across a bunch of fixes from com(4) while I'm here and do some other tidyup. Tested on a RaspberryPi. PL010 not tested. Initial commit of support for the RaspberryPI (www.raspberrypi.org) This is enough for serial console via the gpio header pins and to get to multiuser. A huge thank you to Matt Thomas for all his help. Add RPI to KERNEL_SETS Remove #if 0 code.
1.54.2.1.2.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.59.2.4	03-Dec-2017	jdolecek	update from HEAD
1.59.2.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.59.2.2	23-Jun-2013	tls	resync from head
1.59.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.64.2.1	18-May-2014	rmind	sync with head
1.70.2.1	10-Aug-2014	tls	Rebase.
1.74.4.3	05-Oct-2016	skrll	Sync with HEAD
1.74.4.2	19-Mar-2016	skrll	Sync with HEAD
1.74.4.1	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.76.2.1	26-Jul-2016	pgoyette	Sync with HEAD
1.78.2.4	26-Dec-2018	pgoyette	Sync with HEAD, resolve a few conflicts
1.78.2.3	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.78.2.2	06-Sep-2018	pgoyette	Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
1.78.2.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.79.2.1	10-Jun-2019	christos	Sync with HEAD
1.85.2.2	03-Apr-2021	thorpej	Sync with HEAD.
1.85.2.1	14-Dec-2020	thorpej	Sync w/ HEAD.
1.90.12.1	01-Oct-2025	martin	Pull up following revision(s) (requested by skrll in ticket #40): sys/arch/arm/include/cpufunc.h: revision 1.92 sys/arch/arm/arm32/bus_dma.c: revision 1.150 arm: Adjust barriers issued in bus_dmamap_sync for the coherent case. PR/59654 This change adjusts the memory barriers issued by bus_dmamap_sync for the coherent case. In the non-coherent case the CPU cache operations are expected to provide any, and all required barriers. These barriers are emitted after bouncing for PREWRITE and before bouncing for POSTREAD. A new indrection is introduced to deal with the differencs in barrier (dsb) options between Arm V8 and V7, the lack of options in Arm V6, and the need to use cpu_drain_writebuf for all other earlier versions. The Arm V8 Net change is: op old new
1.90.4.1	01-Oct-2025	martin	Pull up following revision(s) (requested by skrll in ticket #1166): sys/arch/arm/arm32/bus_dma.c: revision 1.142 sys/arch/arm/include/cpufunc.h: revision 1.92 sys/arch/arm/arm32/bus_dma.c: revision 1.150 More KNF arm: Adjust barriers issued in bus_dmamap_sync for the coherent case. PR/59654 This change adjusts the memory barriers issued by bus_dmamap_sync for the coherent case. In the non-coherent case the CPU cache operations are expected to provide any, and all required barriers. These barriers are emitted after bouncing for PREWRITE and before bouncing for POSTREAD. A new indrection is introduced to deal with the differencs in barrier (dsb) options between Arm V8 and V7, the lack of options in Arm V6, and the need to use cpu_drain_writebuf for all other earlier versions. The Arm V8 Net change is: op old new
1.8	10-Aug-2018	maxv	Retire CPU_ARM2, CPU_ARM250 and CPU_ARM3, they are all leftovers of acorn26. ok jmcneill@ skrll@
1.7	25-Aug-2017	christos	branches: 1.7.2; 1.7.4; fix the build (rump does not have opt_foo.h)
1.6	24-Aug-2017	jmcneill	Do runtime detection of MP extensions to allow using a MULTIPROCESSOR kernel on CPUs without the MP extensions feature (like Cortex-A8).
1.5	14-May-2015	hsuenaga	add synchronization barrier for AURORA_IO_CACHE_COHERENCY. cleanup MARVELL L2 cache code.
1.4	15-Apr-2015	hsuenaga	clean up cpufuncs of CPU_PJ4B. PJ4B is a ARMv7 compatible CPU, so most of cpufuncs are just redundant. we need funcs for: - Marvell specific registers - workaround of errata - and Marvell specific L2 cache maintainance if I/O coherency fabric is enabled(option AURORA_IO_CACHE_COHERENCY), probaly we don't need to maintain L2 cache by software.
1.3	13-Sep-2014	matt	branches: 1.3.2; vm_offset_t -> vaddr_t, vm_size_t -> vsize_t nuke vm_offset_t and vm_size_t
1.2	19-Apr-2014	matt	branches: 1.2.2; 1.2.4; 1.2.6; 1.2.10; Move xscale cpu_cpwait back from cpufunc_proto.ht to cpufunc.h
1.1	14-Apr-2014	matt	Support (untested) SHEEVA_L2_CACHE and SHEEVA_L2_CACHE_WT options. Move prototypes out to <arm/cpufunc.h> to their own file. Add sdcache routines to cpufunc_asm_sheeva.S Add code sheeve_setup to init the sdcache and sdcache info.
1.2.10.3	03-Dec-2017	jdolecek	update from HEAD
1.2.10.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.2.10.1	19-Apr-2014	tls	file cpufunc_proto.h was added on branch tls-maxphys on 2014-08-20 00:02:46 +0000
1.2.6.2	10-Aug-2014	tls	Rebase.
1.2.6.1	19-Apr-2014	tls	file cpufunc_proto.h was added on branch tls-earlyentropy on 2014-08-10 06:53:51 +0000
1.2.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2.4.1	19-Apr-2014	yamt	file cpufunc_proto.h was added on branch yamt-pagecache on 2014-05-22 11:39:32 +0000
1.2.2.2	18-May-2014	rmind	sync with head
1.2.2.1	19-Apr-2014	rmind	file cpufunc_proto.h was added on branch rmind-smpnet on 2014-05-18 17:44:58 +0000
1.3.2.2	28-Aug-2017	skrll	Sync with HEAD
1.3.2.1	06-Jun-2015	skrll	Sync with HEAD
1.7.4.1	10-Jun-2019	christos	Sync with HEAD
1.7.2.1	06-Sep-2018	pgoyette	Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
1.14	10-Mar-2002	bjh21	Re-work the way that FPAs are handled. If ARMFPE isn't configured, don't even bother probing for an FPA. If ARMFPE is configured, always use it, even if there's an FPA (since it provides the FPA support code). Move all printfs about FPAs into armfpe_init.c. This means I can delete the last two elements from struct _cpu, so that the structure, and the whole of <arm/cpus.h> is redundant and can be deleted.
1.13	10-Mar-2002	bjh21	Remove fpu_model from struct _cpu. Instead, have initialise_arm_fpe() printf() the FPE version number itself.
1.12	10-Mar-2002	bjh21	Kill the fpu_flags element from struct _cpu. It was only ever set to 0 anyway.
1.11	09-Mar-2002	bjh21	Remove the cpu_model member from struct _cpu, and just use the cpu_model variable directly. While we're at it, make cpu_model rather larger.
1.10	09-Mar-2002	bjh21	Remove the cpu_class element from struct _cpu, and make it a local variable in identify_arm_cpu(), since it's almost unused elsewhere. Change the detection of bugged StrongARMs to use the cpu ID rather than the class. This turns "almost" into "entirely".
1.9	09-Mar-2002	bjh21	Replace cpu_id and cpu_ctrl in struct _cpu with ci_cpuid and ci_ctrl in struct cpu_info. Also kill the cpuctrl global while we're here, and make identify_arm_cpu() take a struct cpu_info * as an argument alongside the CPU number.
1.8	11-Mar-2001	bjh21	branches: 1.8.2; 1.8.4; 1.8.10; G/C more unused elements of struct _cpu.
1.7	10-Mar-2001	bjh21	Change the meaning of cpu_class. It now has one value for each core we support, which corresponds to one for each CPU_* option, or one for each cpufunc structure. Also remove some more residual code for the support of multiple and non-ARM CPUs.
1.6	04-Mar-2001	bjh21	branches: 1.6.2; Make "options ARMFPE" work again. Mostly due to Richard Earnshaw.
1.5	03-Mar-2001	bjh21	Kill cpu_host and cpu_flags: they weren't having any practical effect.
1.4	26-Feb-2001	bjh21	Nothing in this file needs <sys/param.h>, so stop including it.
1.3	26-Feb-2001	bjh21	The cpu_local and cpu_cd elements of struct _cpu were utterly unused. Remove them.
1.2	25-Feb-2001	bjh21	The cpu_type element of struct _cpu was only used in identify_arm_cpu(). Make it a local variable.
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.6.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.8.10.2	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.8.10.1	11-Mar-2001	nathanw	file cpus.h was added on branch nathanw_sa on 2002-04-01 07:39:10 +0000
1.8.4.1	16-Mar-2002	jdolecek	Catch up with -current.
1.8.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.8.2.1	11-Mar-2001	bouyer	file cpus.h was added on branch thorpej_scsipi on 2001-03-12 13:27:21 +0000
1.20	31-Jan-2025	jmcneill	aarch64: Identify Cortex-A520, Cortex-A720 cores
1.19	09-Dec-2024	jmcneill	arm64: Identify Qualcomm Oryon CPUs
1.18	07-Oct-2024	jakllsch	CPU ID strings for Arm Cortex-A710, Neoverse V1, Neoverse N2, and Fujitsu A64FX
1.17	27-Sep-2024	jakllsch	Add Ampere 1 and 1A CPU IDs
1.16	13-Nov-2021	simonb	branches: 1.16.4; 1.16.10; Fix tyop in a comment.
1.15	12-Nov-2021	skrll	Print a big warning about trying to run on early ThunderX parts
1.14	30-Aug-2021	jmcneill	Identify Apple M1 "Icestorm" and "Firestorm" CPU types.
1.13	01-Jul-2020	ryo	add workaround for Neoverse N1 erratum 1542419
1.12	27-Jan-2020	skrll	Identify the Denver2 CPU in the Nvidia TX2
1.11	28-Dec-2019	jmcneill	branches: 1.11.2; Identify Arm Neoverse E1 and N1 CPUs.
1.10	08-Sep-2019	tnn	cpu identification macros for A17
1.9	07-Sep-2019	tnn	Cortex A12 is marketed as A17 but has a distinct part number observed on Rockchip RK3288
1.8	16-Jul-2019	jmcneill	branches: 1.8.2; Add Ampere eMAG 8180 cpuid
1.7	19-Jun-2019	mrg	add several cortex CPU implementations found in their TRMs: - A32 R1 (aarch32 only, not supported) - A35 R1 - A65 R0 - A76AE R1 - A77 add the aarch64 ones to cpu.c for identification.
1.6	09-May-2019	mrg	add cortex A-76 detection.
1.5	03-Jan-2019	jmcneill	Add CPU_ID_CORTEXA15R4
1.4	24-Nov-2018	skrll	Add some ThunderX CPU Ids
1.3	03-Oct-2018	skrll	Add some Cavium CPU_IDs (implementor and primary part number only aka CPU_PARTMASK)
1.2	01-May-2018	ryo	branches: 1.2.2; fix define of CPU IDs * fix incorrect CPU_ID of APM/APPLE * add CPU_ID of SAMSUNG * fix typo about BROADCOM
1.1	20-Mar-2018	ryo	branches: 1.1.2; separate cputypes.h for CPU_ID_* from armreg.h, and add some implementor IDs, CortexA55,73,75 IDs. (preliminary changes for merging aarch64)
1.1.2.6	18-Jan-2019	pgoyette	Synch with HEAD
1.1.2.5	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.1.2.4	20-Oct-2018	pgoyette	Sync with head
1.1.2.3	02-May-2018	pgoyette	Synch with HEAD
1.1.2.2	22-Mar-2018	pgoyette	Synch with HEAD, resolve conflicts
1.1.2.1	20-Mar-2018	pgoyette	file cputypes.h was added on branch pgoyette-compat on 2018-03-22 01:44:42 +0000
1.2.2.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.2.2.1	10-Jun-2019	christos	Sync with HEAD
1.8.2.1	29-Dec-2019	martin	Pull up following revision(s) (requested by jmcneill in ticket #589): sys/arch/arm/include/cputypes.h: revision 1.11 sys/arch/aarch64/aarch64/cpu.c: revision 1.31 Identify Arm Neoverse E1 and N1 CPUs.
1.11.2.1	29-Feb-2020	ad	Sync with head.
1.16.10.1	02-Aug-2025	perseant	Sync with HEAD
1.16.4.1	03-Oct-2024	martin	Pull up following revision(s) (requested by jakllsch in ticket #922): sys/arch/aarch64/aarch64/cpu.c: revision 1.79 sys/arch/arm/include/cputypes.h: revision 1.17 usr.sbin/cpuctl/arch/aarch64.c: revision 1.24 sys/arch/aarch64/aarch64/cpu.c: revision 1.80 Add Ampere 1 and 1A CPU IDs refine previous add Ampere 1 and 1A
1.2	09-May-2024	pho	kern/58195: arm: Support drvctl -d and -r for cpufeaturebus This is required for detaching and re-attaching the vmt(4) driver on aarch64.
1.1	15-Feb-2020	skrll	branches: 1.1.2; 1.1.6; Various updates and improvements to cpu start up on arm/aarch64 - start sharing more code around the AP startup messaging. - call arm_cpu_topology_set early so that ci_core_id is available for drivers, e.g. bcm2835_intr.c - both arm and aarch64 now have - a static cpu_info_store array - the same arm_cpu_{hatched,mbox}
1.1.6.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.1.6.1	15-Feb-2020	martin	file cpuvar.h was added on branch phil-wifi on 2020-04-08 14:07:29 +0000
1.1.2.2	29-Feb-2020	ad	Sync with head.
1.1.2.1	15-Feb-2020	ad	file cpuvar.h was added on branch ad-namecache on 2020-02-29 20:18:19 +0000
1.28	01-Dec-2020	rin	Fix confusions related to encoding of instructions. For __ARMEB__ in BE8 mode, instructions are encoded in little-endian. Therefore, we need to swap bytes against these in native byte order. In other cases, i.e., __ARMEL__ and __ARMEB__ in BE32 mode, instructions are in native byte order, and we don't need to swap them.
1.27	01-Apr-2018	ryo	branches: 1.27.14; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.26	24-Jan-2018	skrll	branches: 1.26.2; Remove port-acorn26 OK core@
1.25	06-Nov-2017	christos	Cleanup and clarify the ELFSIZE mess: We now have 2 variables automatically set in elf_machdep.h: ARCH_ELFSIZE: the size for userland binaries KERN_ELFSIZE: the size for the kernel binaries DB_ELFSIZE has been deleted and KERN_ELFSIZE should have always the same values DB_ELFSIZE used to have. In sys/exec_elf.h, if ELFSIZE is not set, it is set to KERN_ELFSIZE for the kernel and ARCH_ELFSIZE for userland. These defaults should eliminate the need for most manual ELFSIZE setting.
1.24	20-Feb-2017	skrll	Trailing whitespace.
1.23	20-Feb-2017	skrll	Whitespace
1.22	13-Sep-2014	matt	branches: 1.22.2; 1.22.4; 1.22.6; Replace more vm_offset_t, vm_size_t with vaddr_t, vsize_t Use paddr_t for msgbufphys
1.21	30-Mar-2014	skrll	Provide a DDB_REGS in the same way to others. Makes crash buildable.
1.20	28-Mar-2014	matt	Make ddb_registers per-cpu. All switching of CPUs (xxx doesn't work yet).
1.19	05-Mar-2014	matt	Define all the instruction conditions. Use __SHIFTOUT to get the condition. Add bool arm_cond_ok_p(uint32_t insn, uint32_t psr) inline Add tlbtr inline
1.18	16-Feb-2012	christos	branches: 1.18.2; 1.18.4; include <sys/types.h>; things included from here need it.
1.17	26-May-2011	joerg	branches: 1.17.4; 1.17.8; Introduce DDB_EXPR_FMT and replace the logic around DB_EXPR_T_IS_QUAD.
1.16	14-Mar-2009	dsl	branches: 1.16.4; 1.16.6; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.15	29-Aug-2008	matt	branches: 1.15.2; 1.15.8; Remove non-__ELF__ snippets.
1.14	06-Jan-2007	christos	branches: 1.14.46; 1.14.50; 1.14.52; 1.14.56; Fix branch handling in ddb. From Bucky Katz.
1.13	10-May-2006	skrll	branches: 1.13.8; Fix a bunch of cast lvalues.
1.12	08-May-2006	skrll	s/4/BKPT_SIZE/ in PC_ADVANCE
1.11	05-Apr-2006	uwe	Define ddb_regs in db_interface.c. Change its definion in db_machdep.h into a declaration.
1.10	01-Apr-2006	cherry	closes: PR kern/32359 modifies machine/db_machdep.h: BKPT_SET(inst) to BKPT_SET(inst, addr) for all archs ie; passess the breakpoint address as well. Patch from cherry@mahiti.org
1.9	11-Dec-2005	christos	branches: 1.9.4; 1.9.6; 1.9.8; 1.9.10; 1.9.12; merge ktrace-lwp.
1.8	09-Jul-2003	thorpej	branches: 1.8.16; Make faulting in DDB continue back in the top-level command loop properly.
1.7	29-Apr-2003	scw	branches: 1.7.2; Add a BKPT_ADDR() macro which gives MD code a chance to munge a breakpoint address before it's used. Currently a no-op on all but sh5. This is useful on sh5, for example, to mask off the instruction type encoding in the bottom two address bits, and makes it possible to do "db> break $rXX" instead of manually munging the address.
1.6	28-Apr-2003	briggs	Add arm32 machine-specific remote kgdb support. Largely from PR port-arm/15530 by bsh@, but with some updates from me, including a fresh arm32/kgdb_machdep.c--ported from pc532.
1.5	22-Nov-2001	thorpej	Add 26-bit and 32-bit types.h files, which indicate the programming model in use for a given platform (__PROG26 vs __PROG32), then pulls in <arm/types.h>. Change each ARM port to pull in <arm/arm26/types.h> or <arm/arm32/types.h> as appropriate. Change all references to PROG26 and PROG32 to __PROG26 and __PROG32. Eliminate the opt_progmode.h header file.
1.4	13-May-2001	bjh21	branches: 1.4.2; 1.4.8; Make use of a.out or ELF symbols dependent on the compile-time definition of __ELF__.
1.3	11-Mar-2001	bjh21	branches: 1.3.2; Make this suitable for use on arm26 as well.
1.2	04-Mar-2001	matt	branches: 1.2.2; s/vm_offset_t/vaddr_t/g
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.2.2	21-Jun-2001	nathanw	Catch up to -current.
1.2.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.3.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.3.2.1	11-Mar-2001	bouyer	file db_machdep.h was added on branch thorpej_scsipi on 2001-03-12 13:27:22 +0000
1.4.8.2	08-Jan-2002	nathanw	Catch up to -current.
1.4.8.1	13-May-2001	nathanw	file db_machdep.h was added on branch nathanw_sa on 2002-01-08 00:23:11 +0000
1.4.2.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.7.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.7.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.7.2.1	03-Aug-2004	skrll	Sync with HEAD
1.8.16.2	26-Feb-2007	yamt	sync with head.
1.8.16.1	21-Jun-2006	yamt	sync with head.
1.9.12.1	24-May-2006	tron	Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
1.9.10.2	11-May-2006	elad	sync with head
1.9.10.1	19-Apr-2006	elad	sync with head - hopefully this will work
1.9.8.2	24-May-2006	yamt	sync with head.
1.9.8.1	11-Apr-2006	yamt	sync with head
1.9.6.2	01-Jun-2006	kardel	Sync with head.
1.9.6.1	22-Apr-2006	simonb	Sync with head.
1.9.4.1	09-Sep-2006	rpaulo	sync with head
1.13.8.1	12-Jan-2007	ad	Sync with head.
1.14.56.1	19-Oct-2008	haad	Sync with HEAD.
1.14.52.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.14.50.1	04-May-2009	yamt	sync with head.
1.14.46.1	28-Sep-2008	mjf	Sync with HEAD.
1.15.8.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.15.2.1	28-Apr-2009	skrll	Sync with HEAD.
1.16.6.1	06-Jun-2011	jruoho	Sync with HEAD.
1.16.4.1	31-May-2011	rmind	sync with head
1.17.8.1	18-Feb-2012	mrg	merge to -current.
1.17.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.17.4.1	17-Apr-2012	yamt	sync with head
1.18.4.1	18-May-2014	rmind	sync with head
1.18.2.2	03-Dec-2017	jdolecek	update from HEAD
1.18.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.22.6.1	21-Apr-2017	bouyer	Sync with HEAD
1.22.4.1	20-Mar-2017	pgoyette	Sync with HEAD
1.22.2.1	28-Aug-2017	skrll	Sync with HEAD
1.26.2.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.27.14.1	14-Dec-2020	thorpej	Sync w/ HEAD.
1.14	24-May-2022	andvar	s/dosen't/doesn't/ in copy pasted comment.
1.13	01-Apr-2018	ryo	Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.12	27-May-2013	msaitoh	branches: 1.12.32; Fix comment. arm ports which don't explicitly set LABELUSESMBR use MBR partitioning.
1.11	07-May-2013	matt	Make all ports use a common disklabel.h with MAXPARTITIONS set to 16. Only RAW_PART varies between ports.
1.10	30-Aug-2011	bouyer	branches: 1.10.2; 1.10.12; Add getlabelusesmbr(), as proposed in http://mail-index.netbsd.org/tech-userlevel/2011/08/25/msg005404.html This is used by disk tools such as disklabel(8) to dynamically decide is the undelyling platform uses a disklabel-in-mbr-partition or not (instead of using a compile-time list of ports). getlabelusesmbr() reads the sysctl kern.labelusesmbr, takes its value from the machdep #define LABELUSESMBR. For evbmips, make LABELUSESMBR 1 if the platform uses pmon as bootloader, and 0 (the previous value) otherwise.
1.9	23-Nov-2009	pooka	If cpu_disklabel includes struct dkbad, define __HAVE_DISKLABEL_DKBAD. This allows use of subr_disk_mbr on all archs. Default to it for the rump disk component. No functional change for regular kernels. (The other option would've been to include dkbad in disklabels everywhere, but arguably this approach has less possible side-effects, especially given that wedges and related magic will take over the world any second now).
1.8	14-Mar-2009	dsl	Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.7	11-Dec-2005	christos	branches: 1.7.80; 1.7.88; 1.7.94; merge ktrace-lwp.
1.6	12-Jun-2005	dyoung	Make disklabel(8) and fdisk(8) into "host tools " last step: build and install ${TOOLDIR}/bin/${MACHINE_GNU_PLATFORM}-disklabel, ${TOOLDIR}/bin/${MACHINE_GNU_PLATFORM}-fdisk by "reaching over" to the sources in ${NETBSDSRCDIR}/sbin/{disklabel fdisk}/. To avoid clashes with a build-host's header files, especially on *BSD, the host-tools versions of fdisk and disklabel search for #includes such as disklabel.h, disklabel_acorn.h, disklabel_gpt.h, and bootinfo.h in a new #includes namespace, nbinclude/. That is, they #include <nbinclude/sys/disklabel.h>, <nbinclude/machine/disklabel.h>, <nbinclude/sparc64/disklabel.h>, instead of <sys/disklabel.h> and such. I have also updated the system headers to #include from nbinclude/-space when HAVE_NBTOOL_CONFIG_H is #defined.
1.5	02-Jun-2005	he	Adapt to shadowing and qualifier-cast warnings.
1.4	08-Oct-2003	lukem	Overhaul MBR handling (part 1): <sys/bootblock.h>: * Added definitions for the Master Boot Record (MBR) used by a variety of systems (primarily i386), including the format of the BIOS Parameter Block (BPB). This information was cribbed from a variety of sources including <sys/disklabel_mbr.h> which this is a superset of. As part of this, some data structure elements and #defines were renamed to be more "namespace friendly" and consistent with other bootblocks and MBR documentation. Update all uses of the old names to the new names. <sys/disklabel_mbr.h>: * Deprecated in favor of <sys/bootblock.h> (the latter is more "host tool" friendly). amd64 & i386: * Renamed /usr/mdec/bootxx_dosfs to /usr/mdec/bootxx_msdos, to be consistent with the naming convention of the msdosfs tools. * Removed /usr/mdec/bootxx_ufs, as it's equivalent to bootxx_ffsv1 and it's confusing to have two functionally equivalent bootblocks, especially given that "ufs" has multiple meanings (it could be a synonym for "ffs", or the group of ffs/lfs/ext2fs file systems). * Rework pbr.S (the first sector of bootxx_): + Ensure that BPB (bytes 11..89) and the partition table (bytes 446..509) do not contain code. + Add support for booting from FAT partitions if BOOT_FROM_FAT is defined. (Only set for bootxx_msdos). + Remove "dummy" partition 3; if people want to installboot(8) these to the start of the disk they can use fdisk(8) to create a real MBR partition table... + Compile with TERSE_ERROR so it fits because of the above. Whilst this is less user friendly, I feel it's important to have a valid partition table and BPB in the MBR/PBR. Renamed /usr/mdec/biosboot to /usr/mdec/boot, to be consistent with other platforms. * Enable SUPPORT_DOSFS in /usr/mdec/boot (stage2), so that we can boot off FAT partitions. * Crank version of /usr/mdec/boot to 3.1, and fix some of the other entries in the version file. installboot(8) (i386): * Read the existing MBR of the filesystem and retain the BIOS Parameter Block (BPB) in bytes 11..89 and the MBR partition table in bytes 446..509. (Previously installboot(8) would trash those two sections of the MBR.) mbrlabel(8): * Use sys/lib/libkern/xlat_mbr_fstype.c instead of homegrown code to map the MBR partition type to the NetBSD disklabel type. Test built "make release" for i386, and new bootblocks verified to work (even off FAT!).
1.3	10-May-2003	thorpej	branches: 1.3.2; Remove redundant bounds_check_with_label() prototype.
1.2	25-Nov-2001	thorpej	G/c the unused (and #if 0'd) bits of cpu_disklabel. Fetch disklabel_acorn.h from the correct place.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.10.1	08-Jan-2002	nathanw	Catch up to -current.
1.1.6.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.1	10-Oct-2001	fvdl	Convert all remaining devices.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file disklabel.h was added on branch thorpej_scsipi on 2001-01-10 19:02:06 +0000
1.3.2.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.3.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.3.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.3.2.1	03-Aug-2004	skrll	Sync with HEAD
1.7.94.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.7.88.1	28-Apr-2009	skrll	Sync with HEAD.
1.7.80.2	11-Mar-2010	yamt	sync with head
1.7.80.1	04-May-2009	yamt	sync with head.
1.10.12.1	23-Jun-2013	tls	resync from head
1.10.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.12.32.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.2	26-Nov-2001	thorpej	Moved to <sys/disklabel_acorn.h>
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.10.1	28-Feb-2002	nathanw	Catch up to -current.
1.1.6.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.1	10-Oct-2001	fvdl	Convert all remaining devices.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file disklabel_acorn.h was added on branch thorpej_scsipi on 2001-01-10 19:02:07 +0000
1.7	20-Aug-2022	riastradh	machine/efi.h: Migrate common definitions to dev/efi/efi.h.
1.6	20-Aug-2022	riastradh	arm/efi.h: Add explicit padding to efi_systbl.
1.5	20-Aug-2022	riastradh	arm/efi.h: Assert size of struct efi_systbl.
1.4	20-Aug-2022	riastradh	arm/efi.h, x86/efi.h: Fix whitespace around RCS id. No functional change intended.
1.3	20-Aug-2022	riastradh	arm/efi.h: Fix whitespace. No functional change intended.
1.2	20-Aug-2022	riastradh	machine/efi.h: Add more memory descriptor attributes.
1.1	28-Oct-2018	jmcneill	branches: 1.1.2; 1.1.6; Add support for EFI runtime services on aarch64.
1.1.6.2	10-Jun-2019	christos	Sync with HEAD
1.1.6.1	28-Oct-2018	christos	file efi.h was added on branch phil-wifi on 2019-06-10 22:05:54 +0000
1.1.2.2	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.1.2.1	28-Oct-2018	pgoyette	file efi.h was added on branch pgoyette-compat on 2018-11-26 01:52:19 +0000
1.1	10-Jul-2023	rin	Factor out some fdt(4) features from {,evb}arm into dev/fdt. Now, FDT-based support to efirt, initrd, rndseed, and efirng can be used from, e.g., riscv. Mostly from Nick Hudson. XXX As Nick comments, there can be some optimizations for fdt_map_range(). efiboot may also be modified to load these objects into aligned PAs.
1.1	12-Aug-2013	matt	branches: 1.1.2; 1.1.6; 1.1.10; Add EHABI unwind stubs to libkern so prevent errors in linking if unwind tables are present.
1.1.10.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.1.10.1	12-Aug-2013	tls	file ehabi.h was added on branch tls-maxphys on 2014-08-20 00:02:46 +0000
1.1.6.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.1.6.1	12-Aug-2013	yamt	file ehabi.h was added on branch yamt-pagecache on 2014-05-22 11:39:32 +0000
1.1.2.2	28-Aug-2013	rmind	sync with head
1.1.2.1	12-Aug-2013	rmind	file ehabi.h was added on branch rmind-smpnet on 2013-08-28 23:59:12 +0000
1.19	06-Nov-2017	christos	Cleanup and clarify the ELFSIZE mess: We now have 2 variables automatically set in elf_machdep.h: ARCH_ELFSIZE: the size for userland binaries KERN_ELFSIZE: the size for the kernel binaries DB_ELFSIZE has been deleted and KERN_ELFSIZE should have always the same values DB_ELFSIZE used to have. In sys/exec_elf.h, if ELFSIZE is not set, it is set to KERN_ELFSIZE for the kernel and ARCH_ELFSIZE for userland. These defaults should eliminate the need for most manual ELFSIZE setting.
1.18	10-Aug-2017	joerg	Add IRELATIVE support for ARM, X86 and PowerPC.
1.17	25-Feb-2014	matt	branches: 1.17.6; Fix thinko.
1.16	24-Feb-2014	matt	If we are dumping a EABI coredump, set the version to EABI5. If we are dumping a BE coredump on a BE8 system, set the BE8 flag.
1.15	29-Jan-2014	matt	Remove AArch64 stuff.
1.14	29-Oct-2013	matt	Add AARCH64 definitions
1.13	07-Aug-2013	matt	Add more relocs
1.12	05-Aug-2013	matt	Add EF_ARM_BE8 Make sure that running a program, that it right big-endian format for the processor. (BE8 for armv7, BE32 for all others).
1.11	24-Apr-2013	matt	branches: 1.11.4; Add PT_ARM_EXIDX
1.10	05-Aug-2012	matt	branches: 1.10.2; Add ABI version stuff.
1.9	03-Aug-2012	matt	COMPAT_NETBSD32 support for ARM. Which is strange since ARM is already 32-bits. But the newer ARM ABI AAPCS changes the alignment of 64-bit fields so structures need to copied in and out to deal with the alignment change. This is a kludge but makes debugging of AAPCS support much easier.
1.8	30-May-2009	skrll	branches: 1.8.12; 1.8.20; Add TLS relocation definitions.
1.7	08-Sep-2006	he	branches: 1.7.60; 1.7.78; Provide ELF64_MACHDEP_ID_CASES and ELF64_MACHDEP_ENDIANNESS patterned after the other 32-bit ports, so that the arm ports can build usr.sbin/lockstat/.
1.6	11-Dec-2005	christos	branches: 1.6.4; 1.6.8; 1.6.20; merge ktrace-lwp.
1.5	21-Aug-2004	rearnsha	branches: 1.5.12; Add STT_ARM_TFUNC (needed for the dynamic linker to handle Thumb symbols).
1.4	29-Sep-2003	scw	Define ELF32_MACHDEP_ENDIANNESS according to target byte order.
1.3	09-Dec-2001	thorpej	branches: 1.3.18; Add support for dumping ELF-cormat core files.
1.2	18-Jan-2001	bjh21	branches: 1.2.2; 1.2.6; 1.2.10; Add extra constants defined by ARM ELF revision B01.
1.1	11-Jan-2001	bjh21	Share <machine/elf_machdep.h> between arm26 and arm32.
1.2.10.1	08-Jan-2002	nathanw	Catch up to -current.
1.2.6.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.2.2.2	18-Jan-2001	bjh21	Add extra constants defined by ARM ELF revision B01.
1.2.2.1	18-Jan-2001	bjh21	file elf_machdep.h was added on branch thorpej_scsipi on 2001-01-18 23:50:51 +0000
1.3.18.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.3.18.3	18-Sep-2004	skrll	Sync with HEAD.
1.3.18.2	25-Aug-2004	skrll	Sync with HEAD.
1.3.18.1	03-Aug-2004	skrll	Sync with HEAD
1.5.12.1	30-Dec-2006	yamt	sync with head.
1.6.20.1	18-Nov-2006	ad	Sync with head.
1.6.8.1	14-Sep-2006	yamt	sync with head.
1.6.4.1	09-Sep-2006	rpaulo	sync with head
1.7.78.3	26-Feb-2014	matt	Use right name
1.7.78.2	25-Feb-2014	matt	Tag BE8 coredumps properly.
1.7.78.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.7.60.1	20-Jun-2009	yamt	sync with head
1.8.20.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.8.12.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.8.12.1	30-Oct-2012	yamt	sync with head
1.10.2.3	03-Dec-2017	jdolecek	update from HEAD
1.10.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.10.2.1	23-Jun-2013	tls	resync from head
1.11.4.2	18-May-2014	rmind	sync with head
1.11.4.1	28-Aug-2013	rmind	sync with head
1.17.6.1	28-Aug-2017	skrll	Sync with HEAD
1.3	23-Jun-2001	bjh21	branches: 1.3.8; Add <arm/endian.h> and remove the cats, dnard and netwinder versions, since they're all the same (a redirect to <sys/endian.h>).
1.2	10-Jan-2001	bjh21	... this one's utterly pointless though.
1.1	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.3.8.2	23-Jun-2001	bjh21	Add <arm/endian.h> and remove the cats, dnard and netwinder versions, since they're all the same (a redirect to <sys/endian.h>).
1.3.8.1	23-Jun-2001	bjh21	file endian.h was added on branch nathanw_sa on 2001-06-23 12:20:28 +0000
1.9	29-Jan-2014	matt	Also test for __AARCH64EB__ as well as __ARMEB__ for big-endian.
1.8	30-Jan-2006	dsl	branches: 1.8.112; 1.8.122; 1.8.128; Move the definitions of ntohl() and friends into sys/endian.h where they are defined in terms of bswap32() and bswap16(). This makes the definition be in the same place for all systems regardless of creed^Wendianness.
1.7	11-Dec-2005	christos	branches: 1.7.2; merge ktrace-lwp.
1.6	10-Jun-2004	kleink	branches: 1.6.12; Reflect <sys/endian.h> rev. 1.4: make htonl() et al. arguments and results uint{16,32}_t. Noted by Ian Zagorskih.
1.5	14-Aug-2002	thorpej	branches: 1.5.8; 1.5.10; * Rename "word" -> 16, and "long" -> 32, as suggested by Ben Harris. * Replace __byte_swap_32_variable() with a C version from Richard Earnshaw that generates nearly identical assembly (and it would be exactly identical with the addition of another peephole to GCC ARM back-end).
1.4	13-Aug-2002	thorpej	Byte-swapping optimizations, enabled if compiling with GCC: * Byte-swap 16-bit and 32-bit constants at compile-time. * Inline 16-bit and 32-bit variable byte-swaps. These take 3 and 4 insns, respectively, and inlining saves the minimum 6 cycle penalty to call/return from the byte swap function.
1.3	17-Feb-2001	bjh21	branches: 1.3.4; 1.3.6; 1.3.10; 1.3.18; 1.3.20; Re-introduce <arm/endian_machdep.h>, this time using GCC's idea of the target endianness.
1.2	11-Jan-2001	bjh21	Remove <arm/endian_machdep.h>, since we might get a big-endian ARM port some time.
1.1	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.3.20.2	18-Nov-2002	he	Pull up revision 1.5 (requested by thorpej in ticket #673): Rename ``word'' -> 16 and ``long'' -> 32. Replace __byte_swap_32_variable() with a C version that generates nearly identical assembly.
1.3.20.1	18-Nov-2002	he	Pull up revision 1.4 (requested by thoeprj in ticket #667): Byte-swapping optimizations, enabled if compiling with GCC: o Byte-swap 16-bit and 32-bit constants at compile-time o Inline 16-bit and 32-bit variable byte-swaps
1.3.18.1	30-Aug-2002	gehenna	catch up with -current.
1.3.10.1	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.3.6.1	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.3.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.3.4.1	17-Feb-2001	bouyer	file endian_machdep.h was added on branch thorpej_scsipi on 2001-03-12 13:27:22 +0000
1.5.10.1	14-Jun-2004	tron	Pull up revision 1.6 (requested by kleink in ticket #467): Reflect <sys/endian.h> rev. 1.4: make htonl() et al. arguments and results uint{16,32}_t. Noted by Ian Zagorskih.
1.5.8.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.5.8.2	18-Sep-2004	skrll	Sync with HEAD.
1.5.8.1	03-Aug-2004	skrll	Sync with HEAD
1.6.12.1	21-Jun-2006	yamt	sync with head.
1.7.2.1	01-Feb-2006	yamt	sync with head.
1.8.128.1	18-May-2014	rmind	sync with head
1.8.122.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.8.112.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.6	06-Oct-2021	skrll	More trailing whitespace
1.5	09-Apr-2017	christos	one typedef for fenv_t is enough.
1.4	22-Mar-2017	chs	provide a common softfloat fenv implemenation and use it for softfloat builds. restore ABI compatibility with previous releases for ieeefp.h on sh3. add namespace.h protection for all the fenv interfaces. use MKSOFTFLOAT on sh3 instead of assuming softfloat. standardize on comparing MKSOFTFLOAT with "no". remove the arm-specific softfloat fenv code (which also had several bugs). fix logic errors in the arm hardfloat feraiseexcept() and feupdateenv().
1.3	17-Mar-2015	joerg	branches: 1.3.2; 1.3.4; __BEGIN_DECLS and __END_DECLS only exist if sys/cdefs.h was included.
1.2	29-Jan-2014	matt	branches: 1.2.4; 1.2.6; 1.2.8; Add AAPCS64 fenv_t
1.1	23-Apr-2013	matt	branches: 1.1.4; 1.1.6; Move C99 fenv definitions to this file.
1.1.6.1	18-May-2014	rmind	sync with head
1.1.4.4	03-Dec-2017	jdolecek	update from HEAD
1.1.4.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.1.4.2	23-Jun-2013	tls	resync from head
1.1.4.1	23-Apr-2013	tls	file fenv.h was added on branch tls-maxphys on 2013-06-23 06:20:00 +0000
1.2.8.2	28-Aug-2017	skrll	Sync with HEAD
1.2.8.1	06-Apr-2015	skrll	Sync with HEAD
1.2.6.1	18-Mar-2015	snj	Pull up following revision(s) (requested by joerg in ticket #616): sys/arch/arm/include/fenv.h: revision 1.3 __BEGIN_DECLS and __END_DECLS only exist if sys/cdefs.h was included.
1.2.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2.4.1	29-Jan-2014	yamt	file fenv.h was added on branch yamt-pagecache on 2014-05-22 11:39:32 +0000
1.3.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.3.2.1	26-Apr-2017	pgoyette	Sync with HEAD
1.1	20-Dec-2001	thorpej	branches: 1.1.2; 1.1.4; * Share a common vector page between arm26 and arm32. * Use a common set of exception handlers for all arm32 platforms. * New FIQ framework based on discussions with Ben Harris, shared between arm26 and arm32.
1.1.4.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.1	20-Dec-2001	thorpej	file fiq.h was added on branch kqueue on 2002-01-10 19:37:53 +0000
1.1.2.2	08-Jan-2002	nathanw	Catch up to -current.
1.1.2.1	20-Dec-2001	nathanw	file fiq.h was added on branch nathanw_sa on 2002-01-08 00:23:11 +0000
1.9	30-Oct-2024	riastradh	Sprinkle <sys/featuretest.h> where __SOURCE macros are consulted. Otherwise, the feature tests might come out wrong. For example, header files that check for _NETBSD_SOURCE won't get the default when no other __SOURCE macros are defined; header files that check for _POSIX_C_SOURCE might miss _XOPEN_SOURCE, which is supposed to imply a corresponding _POSIX_C_SOURCE. PR lib/58752: various header files test _*_SOURCE macros but don't include sys/featuretest.h
1.8	29-Jan-2014	matt	branches: 1.8.66; if __ARM_PCS_AAPCS64 is defined, expose LDBL_* and DECIMAL_DIGIT
1.7	24-Jan-2013	matt	branches: 1.7.2; Kill more FPA leftovers.
1.6	11-Dec-2005	christos	branches: 1.6.114; 1.6.124; merge ktrace-lwp.
1.5	25-Oct-2003	kleink	Update for FPA long double being 80-bit extended-precision format.
1.4	23-Oct-2003	kleink	* Move the definitions for types other than single-precision and double- precision back to machine-dependent headers. C99 has no strict requirement which, if any, extended-precision type `long double' must match, and even between 80-bit formats there are differences in implementation (m68k vs. x86). * On arm, consider __VFP_FP__.
1.3	12-May-2003	kleink	branches: 1.3.2; Rename <sys/float_ieee.h> to <sys/float_ieee754.h>, following libc's convention for these.
1.2	19-Apr-2003	christos	PR/3012: Greg A. Woods: Write all float.h files [except the vax of course] in terms of float_ieee.h
1.1	10-Jan-2001	bjh21	branches: 1.1.2; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file float.h was added on branch thorpej_scsipi on 2001-01-10 19:02:07 +0000
1.3.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.3.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.3.2.1	03-Aug-2004	skrll	Sync with HEAD
1.6.124.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.6.124.1	25-Feb-2013	tls	resync with head
1.6.114.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.7.2.1	18-May-2014	rmind	sync with head
1.8.66.1	02-Aug-2025	perseant	Sync with HEAD
1.3	11-Jan-2013	matt	Remove FPA specific header.
1.2	12-Nov-2012	skrll	C99 types
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.170; 1.1.180; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.180.2	25-Feb-2013	tls	resync with head
1.1.180.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.1.170.2	23-Jan-2013	yamt	sync with head
1.1.170.1	16-Jan-2013	yamt	sync with (a bit old) head
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file fp.h was added on branch thorpej_scsipi on 2001-01-10 19:02:07 +0000
1.1	29-Jun-2020	riastradh	Move aarch64/fpu.h to arm/fpu.h.
1.23	02-Apr-2022	skrll	Update to support EFI runtime outside the kernel virtual address space by creating an EFI RT pmap that can be activated / deactivated when required. Adds support for EFI RT to ARM_MMU_EXTENDED (ASID) 32-bit Arm machines. On Arm64 the usage of pmapboot_enter is reduced and the mappings are created much later in the boot process -- now in cpu_startup_hook. Backward compatiblity for KVA mapped RT from old bootaa64.efi is maintained. Adding support to other platforms should be easier as a result.
1.22	06-Oct-2021	skrll	Trailing whitespace
1.21	24-Jan-2018	skrll	Remove references to arm26
1.20	24-Jan-2018	skrll	Remove port-acorn26 OK core@
1.19	25-Apr-2017	skrll	Expose lwp_trapframe for _KEMUSER, e.g. crash(8)
1.18	18-Aug-2013	matt	branches: 1.18.6; 1.18.10; fix comment.
1.17	16-Aug-2012	matt	branches: 1.17.2; 1.17.4; small rototill. pcb_flags is dead. PCB_NOALIGNFLT is now in stored l_md.md_flags as MDLWP_NOALIGNFLT. This avoids a few loads of the PCB in exception handling. pcb_tf has been moved to l_md.md_tf. Again this avoids a lot of pcb references just to access or set this. It also means that pcb doesn't need to accessed by MI code. Move pcb_onfault to after the pcb union. Add pcb_sp macro to make code prettier. Add lwp_settrapframe(l, tf) to set the l_md.md_tf field. Use lwp_trapframe to access it (was process_frame but that name was changed in a previous commit). Kill off curpcb in acorn26. Kill the checks for curlwp being NULL. Move TRAP_USERMODE from arm32/fault.c to frame.h and a __PROG26 version. Replace tests for usermode with that macro.
1.16	16-Aug-2012	matt	Rename process_frame to lwp_trapframe
1.15	01-Aug-2012	matt	Move fill to between spsr and r0 so that the registers will be dword aligned. Adjust PUSH/PULL macros accordingly.
1.14	31-Jul-2012	matt	Make trapframe/irqframe an even number of words (make adjustments for the filler word). Improve the comments in PUSH/PULL macros. Use the armv6+ CPS instruction if we can.
1.13	19-Feb-2012	rmind	Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3! Approved by core@.
1.12	21-Nov-2009	rmind	branches: 1.12.12; 1.12.16; 1.12.20; Use lwp_getpcb() on ARM (and acorn26/32), clean from struct user usage.
1.11	15-Oct-2008	wrstuden	branches: 1.11.12; Merge wrstuden-revivesa into HEAD.
1.10	27-Apr-2008	matt	branches: 1.10.2; 1.10.6; Merge kernel changes in matt-armv6 to HEAD.
1.9	09-Feb-2007	ad	branches: 1.9.26; 1.9.46; 1.9.48; 1.9.50; Merge newlock2 to head.
1.8	11-Dec-2005	christos	branches: 1.8.20; merge ktrace-lwp.
1.7	13-Sep-2005	christos	split compat_16 functions to their own file and make this compile again.
1.6	05-Oct-2003	matt	branches: 1.6.16; Add SA_SIGINFO support for ARM (from Chris Gilbert).
1.5	17-Jan-2003	thorpej	branches: 1.5.2; Merge the nathanw_sa branch.
1.4	23-Jun-2002	thorpej	When delivering a signal, there is no need to push the signal number, code, context pointer, or handler onto the stack, so don't do so.
1.3	31-Aug-2001	simonb	branches: 1.3.6; 1.3.14; Use comments around the token after a #endif.
1.2	20-Jan-2001	bjh21	branches: 1.2.2; 1.2.6; Unify arm26 and arm32 trapframe structures. The unified trapframe is the same shape as the old arm32 one, but there are a few #defines to keep arm26 code happy. Anything that depends on the precise shape of the trapframe, and especially on being able to treat it as an array of registers, has been updated.
1.1	18-Jan-2001	bjh21	Add <arm/frame.h>, for shared stack frame structures. Currently, only sigframes are common.
1.2.6.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.2.6.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.2.2	11-Feb-2001	bouyer	Sync with HEAD.
1.2.2.1	20-Jan-2001	bouyer	file frame.h was added on branch thorpej_scsipi on 2001-02-11 19:08:51 +0000
1.3.14.1	16-Jul-2002	gehenna	catch up with -current.
1.3.6.5	01-Aug-2002	nathanw	Catch up to -current.
1.3.6.4	05-Jul-2002	thorpej	When delivering an upcall, arrange to have the kernel return to the upcall directly, and use the upcall trampoline only to exit if the upcall returns.
1.3.6.3	17-Nov-2001	thorpej	Adapt to latest MI changes. Update copyright in arm_machdep.c
1.3.6.2	15-Nov-2001	thorpej	Machine-dependent kernel mods for scheduler activations on 32-bit ARM processors. Kernel boots multi-user on an XScale, but upcalls not yet tested.
1.3.6.1	31-Aug-2001	thorpej	file frame.h was added on branch nathanw_sa on 2001-11-15 06:39:22 +0000
1.5.2.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.5.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.5.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.5.2.1	03-Aug-2004	skrll	Sync with HEAD
1.6.16.2	26-Feb-2007	yamt	sync with head.
1.6.16.1	21-Jun-2006	yamt	sync with head.
1.8.20.1	30-Jan-2007	ad	Remove support for SA. Ok core@.
1.9.50.3	11-Mar-2010	yamt	sync with head
1.9.50.2	04-May-2009	yamt	sync with head.
1.9.50.1	16-May-2008	yamt	sync with head.
1.9.48.1	18-May-2008	yamt	sync with head.
1.9.46.2	17-Jan-2009	mjf	Sync with HEAD.
1.9.46.1	02-Jun-2008	mjf	Sync with HEAD.
1.9.26.1	29-Aug-2007	matt	Add define for tf_ip (tf_r12)
1.10.6.1	19-Oct-2008	haad	Sync with HEAD.
1.10.2.3	22-Jun-2008	wrstuden	Re-add cpu_upcall() and page fault code. i386 kernels now compile. They don't boot, but that seems to be a consequence of current from the day this branch was started.
1.10.2.2	14-May-2008	wrstuden	Per discussion with ad, remove most of the #include <sys/sa.h> lines as they were including sa.h just for the type(s) needed for syscallargs.h. Instead, create a new file, sys/satypes.h, which contains just the types needed for syscallargs.h. Yes, there's only one now, but that may change and it's probably more likely to change if it'd be difficult to handle. :-) Per discussion with matt at n dot o, add an include of satypes.h to sigtypes.h. Upcall handlers are kinda signal handlers, and signalling is the header file that's already included for syscallargs.h that closest matches SA. This shaves about 3000 lines off of the diff of the branch relative to the base. That also represents about 18% of the total before this checkin. I think this reduction is very good thing.
1.10.2.1	10-May-2008	wrstuden	Initial checkin of re-adding SA. Everything except kern_sa.c compiles in GENERIC for i386. This is still a work-in-progress, but this checkin covers most of the mechanical work (changing signalling to be able to accomidate SA's process-wide signalling and re-adding includes of sys/sa.h and savar.h). Subsequent changes will be much more interesting. Also, kern_sa.c has received partial cleanup. There's still more to do, though.
1.11.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.12.20.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.12.16.1	24-Feb-2012	mrg	sync to -current.
1.12.12.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.12.12.2	30-Oct-2012	yamt	sync with head
1.12.12.1	17-Apr-2012	yamt	sync with head
1.17.4.1	28-Aug-2013	rmind	sync with head
1.17.2.2	03-Dec-2017	jdolecek	update from HEAD
1.17.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.18.10.1	26-Apr-2017	pgoyette	Sync with HEAD
1.18.6.1	28-Aug-2017	skrll	Sync with HEAD
1.11	31-Jan-2014	matt	Consolidate the 128-bit long double defintions to <sys/ieee754.h> Each arch that uses it now defines __HAVE_LONG_DOUBLE to 128. <machine/ieee.h> is now just include the machine's math.h followed by <sys/ieee754.h>
1.10	29-Jan-2014	matt	If __ARM_PCS_AAPCS64 is defined, define struct ieee_ext and union ieee_ext_u. Use uint64_t so we can just have ext_frach and ext_fracl.
1.9	11-Dec-2005	christos	branches: 1.9.114; 1.9.124; 1.9.130; merge ktrace-lwp.
1.8	15-Apr-2005	kleink	Push back the descriptions of NaN formats, and descriptions of the distinction between signalling NaNs and quiet NaNs back into the machine-dependent headers; treat the implementation of __nanf in the same spirit. IEEE 754 leaves the distinction between signalling NaNs and quiet NANs to the implementation, and unlike our headers used to suggest they're not identical in the interpretation of the fraction's MSb; in due course, make those of hppa, mips, sh3, and sh5 reflect reality.
1.7	28-Oct-2003	kleink	branches: 1.7.8; 1.7.14; Retire FPA support from this file at last; suggested by Richard Earnshaw and not objected to by port-arm.
1.6	27-Oct-2003	kleink	For convenient use in libc, add unions of the C floating types and their corresponding structure definitions.
1.5	26-Oct-2003	kleink	Remove the FPA extended-precision format entirely; according to Richard Earnshaw it was never supported by the toolchain.
1.4	25-Oct-2003	kleink	G/c the 128-bit extended-precision format, which is not applicable to this platform. Name the 80-bit version the extended format, which it is for the FPA case according to the ARM7500FE manual.
1.3	07-Aug-2003	agc	Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.2	21-Feb-2001	bjh21	branches: 1.2.26; Update to support VFP formats. Also a half-hearted attempt at armeb support. Note that I'm using __VFP_FP__ to indicate compilation with VFP-format floating-point data. There doesn't (currently) seem to be a standard define for this purpose. __VFP_FP__ was suggested by Richard Earnshaw.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.2.1	10-Jan-2001	bouyer	file ieee.h was added on branch thorpej_scsipi on 2001-03-12 13:27:22 +0000
1.2.26.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.2.26.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.26.2	18-Sep-2004	skrll	Sync with HEAD.
1.2.26.1	03-Aug-2004	skrll	Sync with HEAD
1.7.14.1	19-Apr-2005	tron	Pull up revision 1.8 (requested by kleink in ticket #163): Push back the descriptions of NaN formats, and descriptions of the distinction between signalling NaNs and quiet NaNs back into the machine-dependent headers; treat the implementation of __nanf in the same spirit. IEEE 754 leaves the distinction between signalling NaNs and quiet NANs to the implementation, and unlike our headers used to suggest they're not identical in the interpretation of the fraction's MSb; in due course, make those of hppa, mips, sh3, and sh5 reflect reality.
1.7.8.1	29-Apr-2005	kent	sync with -current
1.9.130.1	18-May-2014	rmind	sync with head
1.9.124.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.9.114.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.5	06-Oct-2021	skrll	More trailing whitespace
1.4	22-Mar-2017	chs	provide a common softfloat fenv implemenation and use it for softfloat builds. restore ABI compatibility with previous releases for ieeefp.h on sh3. add namespace.h protection for all the fenv interfaces. use MKSOFTFLOAT on sh3 instead of assuming softfloat. standardize on comparing MKSOFTFLOAT with "no". remove the arm-specific softfloat fenv code (which also had several bugs). fix logic errors in the arm hardfloat feraiseexcept() and feupdateenv().
1.3	23-Apr-2013	matt	branches: 1.3.12; 1.3.16; 1.3.20; Install fenv.h
1.2	05-Aug-2008	matt	branches: 1.2.28; 1.2.38; Update <machine/ieeefp.h> to use the C99 FE_* definitions instead of the NetBSD defined ones. Redefine the NetBSD ones in terms of the C99 ones. Step 1 to having <fenv.h>
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.132; 1.1.136; 1.1.138; 1.1.142; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.142.1	19-Oct-2008	haad	Sync with HEAD.
1.1.138.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.1.136.1	04-May-2009	yamt	sync with head.
1.1.132.1	28-Sep-2008	mjf	Sync with HEAD.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file ieeefp.h was added on branch thorpej_scsipi on 2001-01-10 19:02:07 +0000
1.2.38.2	03-Dec-2017	jdolecek	update from HEAD
1.2.38.1	23-Jun-2013	tls	resync from head
1.2.28.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.3.20.1	21-Apr-2017	bouyer	Sync with HEAD
1.3.16.1	26-Apr-2017	pgoyette	Sync with HEAD
1.3.12.1	28-Aug-2017	skrll	Sync with HEAD
1.5	10-Aug-2018	jakllsch	fix arm int_const.h for aarch64
1.4	25-Jul-2014	joerg	branches: 1.4.26; 1.4.28; Add generic versions of machine/int_*.h for compilers providing appropiate macros for all necessary types.
1.3	29-May-2010	tnozaki	branches: 1.3.18; 1.3.32; fix wrong integer promotion rule(removed U suffix from UINT{8,16}_C). see ISO/IEC 9899:1999 7.18.4.3.
1.2	28-Apr-2008	martin	branches: 1.2.20; 1.2.22; Remove clause 3 and 4 from TNF licenses
1.1	14-Apr-2001	kleink	branches: 1.1.2; 1.1.4; 1.1.12; 1.1.134; 1.1.136; 1.1.138; Add definitions of C99 integer constant macros.
1.1.138.2	11-Aug-2010	yamt	sync with head.
1.1.138.1	16-May-2008	yamt	sync with head.
1.1.136.1	18-May-2008	yamt	sync with head.
1.1.134.1	02-Jun-2008	mjf	Sync with HEAD.
1.1.12.2	14-Apr-2001	kleink	Add definitions of C99 integer constant macros.
1.1.12.1	14-Apr-2001	kleink	file int_const.h was added on branch nathanw_sa on 2001-04-14 22:38:36 +0000
1.1.4.1	21-Jun-2001	nathanw	Catch up to -current.
1.1.2.2	21-Apr-2001	bouyer	Sync with HEAD
1.1.2.1	14-Apr-2001	bouyer	file int_const.h was added on branch thorpej_scsipi on 2001-04-21 17:53:10 +0000
1.2.22.1	30-May-2010	rmind	sync with head
1.2.20.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.3.32.1	10-Aug-2014	tls	Rebase.
1.3.18.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.4.28.1	10-Jun-2019	christos	Sync with HEAD
1.4.26.1	06-Sep-2018	pgoyette	Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
1.10	15-Jul-2018	christos	Fix formats for gcc where int64 is long not long long (like clang which should be changed).
1.9	13-Aug-2014	matt	branches: 1.9.18; 1.9.20; include <sys/common_int_fmtio.h> if __INTPTR_FMTd__ is defined
1.8	25-Jul-2014	joerg	Add generic versions of machine/int_*.h for compilers providing appropiate macros for all necessary types.
1.7	29-Jan-2014	matt	branches: 1.7.2; Make {,u}int{8,16,32} be of type int.
1.6	29-Jan-2014	matt	Take advantage of compiler predefines for types. Add _LP64 support.
1.5	29-Aug-2008	matt	branches: 1.5.38; Remove non-__ELF__ snippets.
1.4	28-Apr-2008	martin	branches: 1.4.2; 1.4.6; Remove clause 3 and 4 from TNF licenses
1.3	03-Sep-2001	matt	branches: 1.3.6; 1.3.128; 1.3.130; 1.3.132; Add __ELF__ stuff for resized types under ELF.
1.2	26-Apr-2001	kleink	branches: 1.2.2; 1.2.4; Add definitions for C99 fastest minimum-width integer types.
1.1	15-Apr-2001	kleink	branches: 1.1.2; Add definitions of C99 integer format conversion macros. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.1.2.2	21-Apr-2001	bouyer	Sync with HEAD
1.1.2.1	15-Apr-2001	bouyer	file int_fmtio.h was added on branch thorpej_scsipi on 2001-04-21 17:53:10 +0000
1.2.4.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.3.132.2	04-May-2009	yamt	sync with head.
1.3.132.1	16-May-2008	yamt	sync with head.
1.3.130.1	18-May-2008	yamt	sync with head.
1.3.128.2	28-Sep-2008	mjf	Sync with HEAD.
1.3.128.1	02-Jun-2008	mjf	Sync with HEAD.
1.3.6.2	03-Sep-2001	matt	Add __ELF__ stuff for resized types under ELF.
1.3.6.1	03-Sep-2001	matt	file int_fmtio.h was added on branch nathanw_sa on 2001-09-03 01:51:40 +0000
1.4.6.1	19-Oct-2008	haad	Sync with HEAD.
1.4.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.5.38.2	03-Dec-2017	jdolecek	update from HEAD
1.5.38.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.7.2.1	10-Aug-2014	tls	Rebase.
1.9.20.1	10-Jun-2019	christos	Sync with HEAD
1.9.18.1	28-Jul-2018	pgoyette	Sync with HEAD
1.12	06-Oct-2021	skrll	More trailing whitespace
1.11	25-Jul-2014	joerg	Add generic versions of machine/int_*.h for compilers providing appropiate macros for all necessary types.
1.10	29-Jan-2014	matt	branches: 1.10.2; Take advantage of compiler predefines for types. Add _LP64 support.
1.9	29-Aug-2008	matt	branches: 1.9.28; 1.9.38; 1.9.44; Remove non-__ELF__ snippets.
1.8	28-Apr-2008	martin	branches: 1.8.2; 1.8.6; Remove clause 3 and 4 from TNF licenses
1.7	17-Oct-2007	garbled	branches: 1.7.16; 1.7.18; 1.7.20; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.6	31-Aug-2007	drochner	Fix definitions of UCHAR_MAX/USHRT_MAX and related types. C99 requires that these definitions promote to (signed/unsigned) integer the same way as the types the definition is for. And since unsigned char/short fit into an "int" on all our archs and thus promote to signed int, the definitions must not be unsigned. Fixes PR lib/31306 by Neil Booth.
1.5	11-Dec-2005	christos	branches: 1.5.30; 1.5.38; 1.5.44; 1.5.46; 1.5.48; 1.5.50; 1.5.52; merge ktrace-lwp.
1.4	08-May-2004	kleink	branches: 1.4.12; Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
1.3	03-Sep-2001	matt	branches: 1.3.6; 1.3.24; Add __ELF__ stuff for resized types under ELF.
1.2	26-Apr-2001	kleink	branches: 1.2.2; 1.2.4; Add definitions for C99 fastest minimum-width integer types.
1.1	15-Apr-2001	kleink	branches: 1.1.2; Add definitions of C99 specified-width integer type limits. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.1.2.2	21-Apr-2001	bouyer	Sync with HEAD
1.1.2.1	15-Apr-2001	bouyer	file int_limits.h was added on branch thorpej_scsipi on 2001-04-21 17:53:10 +0000
1.2.4.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.3.24.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.3.24.2	18-Sep-2004	skrll	Sync with HEAD.
1.3.24.1	03-Aug-2004	skrll	Sync with HEAD
1.3.6.2	03-Sep-2001	matt	Add __ELF__ stuff for resized types under ELF.
1.3.6.1	03-Sep-2001	matt	file int_limits.h was added on branch nathanw_sa on 2001-09-03 01:51:40 +0000
1.4.12.1	03-Sep-2007	yamt	sync with head.
1.5.52.1	06-Nov-2007	matt	sync with HEAD
1.5.50.1	01-Jan-2008	chris	Sync with HEAD.
1.5.48.1	03-Sep-2007	jmcneill	Sync with HEAD.
1.5.46.1	01-Nov-2007	rjs	Sync with HEAD.
1.5.44.1	03-Sep-2007	skrll	Sync with HEAD.
1.5.38.1	03-Oct-2007	garbled	Sync with HEAD
1.5.30.1	09-Oct-2007	ad	Sync with head.
1.7.20.2	04-May-2009	yamt	sync with head.
1.7.20.1	16-May-2008	yamt	sync with head.
1.7.18.1	18-May-2008	yamt	sync with head.
1.7.16.2	28-Sep-2008	mjf	Sync with HEAD.
1.7.16.1	02-Jun-2008	mjf	Sync with HEAD.
1.8.6.1	19-Oct-2008	haad	Sync with HEAD.
1.8.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.9.44.1	18-May-2014	rmind	sync with head
1.9.38.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.9.28.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.10.2.1	10-Aug-2014	tls	Rebase.
1.7	25-Jul-2014	joerg	Add generic versions of machine/int_*.h for compilers providing appropiate macros for all necessary types.
1.6	29-Jan-2014	matt	branches: 1.6.2; Make {,u}int{8,16,32} be of type int.
1.5	29-Jan-2014	matt	Take advantage of compiler predefines for types. Add _LP64 support.
1.4	28-Apr-2008	martin	branches: 1.4.34; 1.4.44; 1.4.50; Remove clause 3 and 4 from TNF licenses
1.3	24-Dec-2005	perry	branches: 1.3.76; 1.3.78; 1.3.80; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.2	26-Apr-2001	kleink	branches: 1.2.2; 1.2.10; 1.2.44; Add definitions for C99 fastest minimum-width integer types.
1.1	14-Apr-2001	kleink	branches: 1.1.2; Add definitions of C99 minimum-width and greatest-width integer types. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.1.2.2	21-Apr-2001	bouyer	Sync with HEAD
1.1.2.1	14-Apr-2001	bouyer	file int_mwgwtypes.h was added on branch thorpej_scsipi on 2001-04-21 17:53:10 +0000
1.2.44.1	21-Jun-2006	yamt	sync with head.
1.2.10.2	26-Apr-2001	kleink	Add definitions for C99 fastest minimum-width integer types.
1.2.10.1	26-Apr-2001	kleink	file int_mwgwtypes.h was added on branch nathanw_sa on 2001-04-26 16:25:22 +0000
1.2.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.3.80.1	16-May-2008	yamt	sync with head.
1.3.78.1	18-May-2008	yamt	sync with head.
1.3.76.1	02-Jun-2008	mjf	Sync with HEAD.
1.4.50.1	18-May-2014	rmind	sync with head
1.4.44.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.4.34.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.6.2.1	10-Aug-2014	tls	Rebase.
1.17	25-Jul-2014	joerg	Add generic versions of machine/int_*.h for compilers providing appropiate macros for all necessary types.
1.16	14-Jul-2014	joerg	Do not explicitly undef __INT8_TYPE__, clang is handled specially below.
1.15	13-Jul-2014	joerg	Clang expects __INTx_TYPE__ to be used with signed/unsigned modifier when defining (u)intx_t, GCC has a separate __UINTx_TYPE__. Newer Clang will also provide the latter, but expects the behavior of the former to remain. As ARM uses unsigned char by default, distinguish between Clang and non-Clang here to the right type for int8_t.
1.14	24-Feb-2014	christos	branches: 1.14.2; consistency in include protection
1.13	31-Jan-2014	matt	Fix the naked char __INT8_TYPE__ and unsigned char case.
1.12	29-Jan-2014	matt	Deal with the case when __UINT<N>_TYPE__ is defined as well __INT<N>_TYPE__ is defined. We make the assumption that if the former is defined, the latter is also defined.
1.11	29-Jan-2014	matt	Take advantage of compiler predefines for types. Add _LP64 support.
1.10	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.9	29-Aug-2008	matt	branches: 1.9.28; 1.9.38; 1.9.44; Remove non-__ELF__ snippets.
1.8	24-Dec-2005	perry	branches: 1.8.76; 1.8.80; 1.8.82; 1.8.86; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.7	11-Dec-2005	christos	merge ktrace-lwp.
1.6	25-May-2005	kleink	branches: 1.6.2; Include <sys/cdefs.h> for __signed; related to lib/30072.
1.5	07-Aug-2003	agc	branches: 1.5.6; 1.5.14; Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.4	16-Oct-2001	bjh21	branches: 1.4.4; 1.4.22; On ELF systems, make intptr_t and uintptr_t long, because Matt says so. This makes regress/lib/libc/int_fmtio compile.
1.3	28-Apr-2001	kleink	branches: 1.3.2; * Move definitions of exact-width integer types from <machine/types.h> to <sys/types.h> and <sys/stdint.h>. * Add a new C99 <stdint.h> header, which provides integer types of explicit width, related limits and integer constant macros. * Extend <inttypes.h> to provide <stdint.h> definitions and format macros for printf() and scanf(). * Add C99 strtoimax() and strtoumax() functions. * Use the latter within scanf(). * Add C99 %j, %t and %z printf()/scanf() conversions for intmax_t, pointer-type and size_t arguments.
1.2	12-Apr-2001	kleink	Replace the 'unsigned __COMPILER_INT64__' construct with a new name, __COMPILER_UINT64__, to be supplied - if such a case is made, it shouldn't be assumed that the unsigned type-specifier may be applied to it.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.4; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.4.1	21-Jun-2001	nathanw	Catch up to -current.
1.1.2.2	21-Apr-2001	bouyer	Sync with HEAD
1.1.2.1	10-Jan-2001	bouyer	file int_types.h was added on branch thorpej_scsipi on 2001-04-21 17:53:10 +0000
1.3.2.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.4.22.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.4.22.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.22.2	18-Sep-2004	skrll	Sync with HEAD.
1.4.22.1	03-Aug-2004	skrll	Sync with HEAD
1.4.4.2	16-Oct-2001	bjh21	On ELF systems, make intptr_t and uintptr_t long, because Matt says so. This makes regress/lib/libc/int_fmtio compile.
1.4.4.1	16-Oct-2001	bjh21	file int_types.h was added on branch nathanw_sa on 2001-10-16 20:40:46 +0000
1.5.14.1	28-May-2005	tron	Pull up revision 1.6 (requested by klein in ticket #346): Include <sys/cdefs.h> for __signed; related to lib/30072.
1.5.6.1	29-May-2005	riz	Pull up revision 1.6 (requested by kleink in ticket #1555): Include <sys/cdefs.h> for __signed; related to lib/30072.
1.6.2.1	21-Jun-2006	yamt	sync with head.
1.8.86.1	19-Oct-2008	haad	Sync with HEAD.
1.8.82.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.8.80.1	04-May-2009	yamt	sync with head.
1.8.76.1	28-Sep-2008	mjf	Sync with HEAD.
1.9.44.1	18-May-2014	rmind	sync with head
1.9.38.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.9.28.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.14.2.1	10-Aug-2014	tls	Rebase.
1.2	19-Jan-2008	chris	Remove arm support for IPKDB. It hasn't worked since arm was broken out from arm32 in Jan 2001, and no-one has noticed or cared to fix it.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.44; 1.1.102; 1.1.106; 1.1.108; 1.1.114; 1.1.122; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.122.1	20-Jan-2008	bouyer	Sync with HEAD
1.1.114.1	18-Feb-2008	mjf	Sync with HEAD.
1.1.108.1	23-Mar-2008	matt	sync with HEAD
1.1.106.1	20-Jan-2008	chris	Sync to HEAD.
1.1.102.1	28-Feb-2008	rjs	Sync with HEAD.
1.1.44.1	21-Jan-2008	yamt	sync with head
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file ipkdb.h was added on branch thorpej_scsipi on 2001-03-12 13:27:22 +0000
1.13	12-Dec-2021	andvar	s/Miscellanous/Miscellaneous/ in copypasta comments.
1.12	18-Oct-2016	jdolecek	add isa_intr_establish_xname() to MD isa headers so that it can be used by MI drivers
1.11	29-Jan-2014	matt	branches: 1.11.6; 1.11.10; Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.10	27-Oct-2012	chs	branches: 1.10.2; split device_t/softc for all remaining drivers. replace "struct device *" with "device_t". use device_xname(), device_unit(), etc.
1.9	21-Sep-2012	matt	Switch to the generic bounce buffer support.
1.8	01-Jul-2011	dyoung	branches: 1.8.2; 1.8.10; 1.8.12; #include <sys/bus.h> instead of <machine/bus.h>.
1.7	19-Aug-2009	dyoung	isa_detach_hook() needs two arguments, the first an isa_chipset_tag_t.
1.6	19-Aug-2009	dyoung	Define isa_dmadestroy(). Declare isa_detach_hook().
1.5	28-Apr-2008	martin	Remove clause 3 and 4 from TNF licenses
1.4	09-May-2003	fvdl	branches: 1.4.80; 1.4.106; 1.4.108; 1.4.110; A few ISA sound drivers like to share dma channels, and hence deferred isa_dmamap_create() calls to their open/close entrypoints. This worked with some luck, but broke on i386 when _bus_dmamap_create started to allocate bounce buffers upfront, since memory below 16M may well not be available when the sound devices is opened for the Nth time. To fix this, create a new simple interface, isa_drq_alloc/isa_drq_free, wrappers around already existing bitmask macros. These are expected to be used before an isa_dmamap_create call, and after an isa_dmamap_destroy call, respectively. For the sb and ad1848 drivers, they're deferred until open/close. All isa_dmamap_create calls can now use BUS_DMA_ALLOCNOW and be done at attach time.
1.3	07-Jan-2002	chris	Finish up the changes to get LOOSE_PROTOTYPES working for cats. Note that this leaves a few inconsistencies (no more than we already had though) eg initarm is now prototyped in arm32/machdep.h, however only cats currently makes use of that header.
1.2	04-Mar-2001	matt	branches: 1.2.4; 1.2.6; 1.2.10; s/vm_offset_t/vaddr_t/g
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.10.2	28-Feb-2002	nathanw	Catch up to -current.
1.2.10.1	11-Jan-2002	nathanw	More catchup.
1.2.6.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.2.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.2.4.1	04-Mar-2001	bouyer	file isa_machdep.h was added on branch thorpej_scsipi on 2001-03-12 13:27:22 +0000
1.4.110.2	19-Aug-2009	yamt	sync with head.
1.4.110.1	16-May-2008	yamt	sync with head.
1.4.108.1	18-May-2008	yamt	sync with head.
1.4.106.1	02-Jun-2008	mjf	Sync with HEAD.
1.4.80.2	09-Feb-2008	chris	Add initial reworking of acorn32 to use new interrupt code. Note that cats probably won't work currently as acorn32 changed the way that the pic is registered, it has to provide the irq lines as on acorn32 we attach the iomd after we need to register irqs for the pioc. So we setup the irqs for iomd before malloc etc are available. This needs to be fixed. More work is still needed to update most of the podulebus drivers. First I need to add podulebus wrapper for interrupts that handles the maskaddr and maskbits. Exposing them to the common irq code is wrong.
1.4.80.1	11-Aug-2007	chris	Initial check-in of reworked arm interrupt routines. Main things to note on this branch: * spl routines are inlined, less complex, and small (kernel drops in size) * interrupts are handled in priority order (for most things it doesn't matter, but pending ipls are used to determine if there is any work to do) * arm_irqhandler.c is derived from footbridge_irqhandler.c, which was based on work by thorpej. * The code tries to touch hardware as little as possible. * spl masks are no longer tracked, as the system is based on pending ipls The shared code uses global ipl lists to track which interrupt handlers are attached to which ipl (arm_iplq[]). Interrupt sources register with the common code to indicate: * how many irq lines they have * a function to set the hardware mask. * call arm_intr_claim and arm_intr_disestablish to setup handlers When an interrupt occurs the ipl is flagged as pending, in ipls_pending. If it can be handled at the current_ipl_level the code does so. If it can't be handled it's left until the current_ipl_level drops. As the ipl level changes down a quick test is made of the new ipl level against the ipls_pending value. If an ipl is pending arm_intr_splx_lifter is called to handle the pending ipls. It should be noted that all interrupts are left enabled at the hardware level, interrupts are only masked when they occur. They are only re-enabled after it's interrupt handler is called. Hardware masks are not changed at any other time. Soft interrupts are treated the same as hardware interrupts, they register as a provider, and do not get treated specially. All the soft interrupt handlers are placed onto the relevant global ipl queue, the same as hard interrupts handlers. At the moment only footbridge within a cats has been updated to use the new handling. Todo: * change the handling of interrupts, so that the hardware doesn't register a routine to fetch the hardware status. Instead is makes a call which provides the mask. This removes the primary flag when registering an interrupt provider. It also makes more sense with multiple interrupt sources. * Arm v5 has the clz asm, which could be used instead of the carefully hand rolled arm_intr_fls function. * switch cats isa support to use this framework. * switch iomd and acorn32 to use this framework. * switch shark to use this framework. * port any other arm platforms that are interested * examine overlaps between this code and ppcoea-renovation branch. * add support for different trigger types (Edge, level, pulse, etc) (note that iomd and shark currently touch hardware on every spl change, hence why they're targets to port)
1.8.12.3	03-Dec-2017	jdolecek	update from HEAD
1.8.12.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.8.12.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.8.10.1	06-Dec-2012	matt	Merge changes from -current.
1.8.2.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.8.2.1	30-Oct-2012	yamt	sync with head
1.10.2.1	18-May-2014	rmind	sync with head
1.11.10.1	04-Nov-2016	pgoyette	Sync with HEAD
1.11.6.1	05-Dec-2016	skrll	Sync with HEAD
1.2	28-Apr-2008	martin	Remove clause 3 and 4 from TNF licenses
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.132; 1.1.134; 1.1.136; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.136.1	16-May-2008	yamt	sync with head.
1.1.134.1	18-May-2008	yamt	sync with head.
1.1.132.1	02-Jun-2008	mjf	Sync with HEAD.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file isapnp_machdep.h was added on branch thorpej_scsipi on 2001-03-12 13:27:22 +0000
1.1	02-May-2013	matt	branches: 1.1.4; 1.1.12; This change arm, armeb, earm, earmeb, earmhf, earmhfeb so all builds that share a MACHINE_ARCH for userland so that except for etc, will produce identical sets. usr/include/machine now points to usr/include/arm
1.1.12.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.1.12.1	02-May-2013	yamt	file joystick.h was added on branch yamt-pagecache on 2014-05-22 11:39:32 +0000
1.1.4.2	23-Jun-2013	tls	resync from head
1.1.4.1	02-May-2013	tls	file joystick.h was added on branch tls-maxphys on 2013-06-23 06:20:00 +0000
1.1	01-Jan-2008	chris	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; 1.1.18; Add support for kcore headers to arm32 kernel core dumps. The kcore code is based on i386's kcore header handling. Having an asm stub for dumpsys, to dump the registers onto the stack, and then call the C code to do the memory dump is based on amd64's core dump code. This allows a successful core dump on cats. Part of fixing PR cats/18026.
1.1.18.2	28-Feb-2008	rjs	Sync with HEAD.
1.1.18.1	01-Jan-2008	rjs	file kcore.h was added on branch hpcarm-cleanup on 2008-02-28 21:58:52 +0000
1.1.10.2	18-Feb-2008	mjf	Sync with HEAD.
1.1.10.1	01-Jan-2008	mjf	file kcore.h was added on branch mjf-devfs on 2008-02-18 21:04:23 +0000
1.1.8.2	21-Jan-2008	yamt	sync with head
1.1.8.1	01-Jan-2008	yamt	file kcore.h was added on branch yamt-lazymbuf on 2008-01-21 09:35:41 +0000
1.1.6.2	09-Jan-2008	matt	sync with HEAD
1.1.6.1	01-Jan-2008	matt	file kcore.h was added on branch matt-armv6 on 2008-01-09 01:45:17 +0000
1.1.4.2	02-Jan-2008	bouyer	Sync with HEAD
1.1.4.1	01-Jan-2008	bouyer	file kcore.h was added on branch bouyer-xeni386 on 2008-01-02 21:47:24 +0000
1.1.2.2	01-Jan-2008	chris	Sync with HEAD.
1.1.2.1	01-Jan-2008	chris	file kcore.h was added on branch chris-arm-intr-rework on 2008-01-01 15:39:30 +0000
1.19	21-Jan-2019	dholland	Fix wrong scoping of {U,}LLONG_MAX. More cases, not just amd64. PR 53298 from Roberto E. Vargas Caballero.
1.18	24-Feb-2014	christos	branches: 1.18.28; 1.18.30; consistency in include protection
1.17	29-Jan-2014	matt	Take advantage of compiler predefines for types. Add _LP64 support.
1.16	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.15	29-Jan-2014	matt	replace spaces in SHRT_MIN definition with tabs
1.14	29-Jan-2014	matt	SIZE_T is unsigned so SIZE_T_MAX needs to be ULONG_MAX
1.13	11-Apr-2013	christos	branches: 1.13.4; add missing SSIZE_MIN
1.12	28-Mar-2012	christos	branches: 1.12.2; - Normalize inclusion protection (remove) - Move CHAR_{MIN,MAX} to a common file. - Fix broken comments
1.11	22-Mar-2012	he	Make sure that the UQUAD_MAX constant is marked as unsigned, to avoid "ANSI C treats constant as unsigned" warning from lint.
1.10	07-Jun-2010	tnozaki	branches: 1.10.8; 1.10.12; 1. MB_LEN_MAX switch MD to MI. 2. unfortunately hppa's MB_LEN_MAX is defined incorrectly 6 instead of 32 so we have to add more setlocale(3) __RENAME func, __setlocale50. 3. move setlocale1.c and setlocale32.c to lib/libc/compat/locale/* prepareing for next libc major crunk. 4. bump libc minor version.
1.9	29-Aug-2008	matt	branches: 1.9.14; 1.9.16; Remove non-__ELF__ snippets.
1.8	17-Oct-2007	garbled	branches: 1.8.16; 1.8.20; 1.8.22; 1.8.26; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.7	31-Aug-2007	drochner	Fix definitions of UCHAR_MAX/USHRT_MAX and related types. C99 requires that these definitions promote to (signed/unsigned) integer the same way as the types the definition is for. And since unsigned char/short fit into an "int" on all our archs and thus promote to signed int, the definitions must not be unsigned. Fixes PR lib/31306 by Neil Booth.
1.6	11-Dec-2005	christos	branches: 1.6.30; 1.6.38; 1.6.44; 1.6.46; 1.6.48; 1.6.50; 1.6.52; merge ktrace-lwp.
1.5	07-Aug-2003	agc	branches: 1.5.16; Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.4	28-Apr-2003	bjh21	branches: 1.4.2; Add a new feature-test macro, _NETBSD_SOURCE. If this is defined by the application, all NetBSD interfaces are made visible, even if some other feature-test macro (like _POSIX_C_SOURCE) is defined. <sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE, _POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve existing behaviour. This has two major advantages: + Programs that require non-POSIX facilities but define _POSIX_C_SOURCE can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS. + It makes most of the #ifs simpler, in that they're all now ORs of the various macros, rather than having checks for (!defined(_ANSI_SOURCE) \|\| !defined(_POSIX_C_SOURCE) \|\| !defined(_XOPEN_SOURCE)) all over the place. I've tried not to change the semantics of the headers in any case where _NETBSD_SOURCE wasn't defined, but there were some places where the current semantics were clearly mad, and retaining them was harder than correcting them. In particular, I've mostly normalised things so that _ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE, _XOPEN_SOURCE and _NETBSD_SOURCE in that order. Tested by building for vax, encouraged by thorpej, and uncontested in tech-userlevel for a week.
1.3	03-Sep-2001	matt	branches: 1.3.6; Add __ELF__ stuff for resized types under ELF.
1.2	04-May-2001	simonb	branches: 1.2.2; Be consistent with limit constants: - use "U" suffix for unsigned constants - use "L" suffix for long constants - use "UL" suffix for unsigned long constants - use hexadecimal instead of decimal Fixes build problems with vi (now that warnings/errors are enabled) on mips, powerpc and arm platforms.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.4; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.4.1	21-Jun-2001	nathanw	Catch up to -current.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file limits.h was added on branch thorpej_scsipi on 2001-01-10 19:02:07 +0000
1.2.2.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.3.6.2	03-Sep-2001	matt	Add __ELF__ stuff for resized types under ELF.
1.3.6.1	03-Sep-2001	matt	file limits.h was added on branch nathanw_sa on 2001-09-03 01:51:40 +0000
1.4.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.4.2.1	03-Aug-2004	skrll	Sync with HEAD
1.5.16.1	03-Sep-2007	yamt	sync with head.
1.6.52.1	06-Nov-2007	matt	sync with HEAD
1.6.50.1	01-Jan-2008	chris	Sync with HEAD.
1.6.48.1	03-Sep-2007	jmcneill	Sync with HEAD.
1.6.46.1	01-Nov-2007	rjs	Sync with HEAD.
1.6.44.1	03-Sep-2007	skrll	Sync with HEAD.
1.6.38.1	03-Oct-2007	garbled	Sync with HEAD
1.6.30.1	09-Oct-2007	ad	Sync with head.
1.8.26.1	19-Oct-2008	haad	Sync with HEAD.
1.8.22.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.8.20.2	11-Aug-2010	yamt	sync with head.
1.8.20.1	04-May-2009	yamt	sync with head.
1.8.16.1	28-Sep-2008	mjf	Sync with HEAD.
1.9.16.1	03-Jul-2010	rmind	sync with head
1.9.14.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.10.12.1	05-Apr-2012	mrg	sync to latest -current.
1.10.8.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.10.8.1	17-Apr-2012	yamt	sync with head
1.12.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.12.2.1	23-Jun-2013	tls	resync from head
1.13.4.1	18-May-2014	rmind	sync with head
1.18.30.1	10-Jun-2019	christos	Sync with HEAD
1.18.28.1	26-Jan-2019	pgoyette	Sync with HEAD
1.39	30-May-2021	joerg	Don't use V8 atomic instruction for AA32 mode.
1.38	27-Apr-2021	skrll	branches: 1.38.2; Fix the barrier confusion. From Riastradh - thanks!.
1.37	26-Apr-2021	skrll	Change #ifdef FOO to #if defined(FOO). NFCI.
1.36	24-Apr-2021	skrll	branches: 1.36.2; Fix ARMv8 instructions
1.35	24-Apr-2021	skrll	G/C
1.34	29-Nov-2019	riastradh	Nix mb_* on arm.
1.33	17-Sep-2017	christos	branches: 1.33.4; 1.33.8; more const.
1.32	25-Feb-2015	joerg	branches: 1.32.10; Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.31	23-Feb-2015	joerg	Indentation.
1.30	19-Feb-2015	joerg	Don't use plain inline in that might end up compiled with -ansi.
1.29	02-Jan-2015	christos	add constcond.
1.28	10-Aug-2014	matt	branches: 1.28.2; 1.28.4; Correct _ARM_ARCH_8 instructions
1.27	13-Mar-2014	matt	Fix non-armv6 case.
1.26	12-Mar-2014	matt	Rather than having long complicated asm statements, use inlines for ldrex/strex and let the compiler arrange the code how it wants.
1.25	18-Aug-2013	matt	Support thumb1 indirectly and thumb2 directly
1.24	28-Jan-2013	matt	branches: 1.24.2; Use uint32_t for __asm to appease clang.
1.23	24-Jan-2013	matt	Shut up clang but returning the result to a uint32_t variable.
1.22	25-Nov-2012	pgoyette	For consistency, define the _KERNEL version of __swp() using a non-volatile type, similar to how it is defined in non-KERNEL Fixes the 'build.sh release' for evbarm-{eb,el}
1.21	31-Aug-2012	matt	branches: 1.21.2; The arm11 barriers are mcr (write), not mrc (read)
1.20	29-Aug-2012	matt	Add required dsb/dmb instructions (or placeholders for them) required for the weak memory ordering of the ARMV7-A architecture.
1.19	23-Jul-2012	matt	Change cmpeq to cmp and add "cc" to clobber in the ldrex/strex asm.
1.18	15-Jul-2012	matt	Use ldrexb/strexb for ARMv6 and above platforms since "swp{b} use is deprecated" for them.
1.17	28-Apr-2008	martin	branches: 1.17.18; 1.17.34; 1.17.42; Remove clause 3 and 4 from TNF licenses
1.16	27-Apr-2008	matt	Merge kernel changes in matt-armv6 to HEAD.
1.15	17-Oct-2007	garbled	branches: 1.15.16; 1.15.18; 1.15.20; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.14	10-Sep-2007	skrll	Merge nick-csl-alignment.
1.13	09-Mar-2007	thorpej	branches: 1.13.2; 1.13.10; 1.13.14; 1.13.16; 1.13.18; 1.13.20; 1.13.22; Make __cpu_simple_lock_t an unsigned char if _KERNEL, and operate on it using SWPB. Approved by Matt Thomas.
1.12	20-Feb-2007	matt	Protect MB_* and <arm/cpufunc.h> by _KERNEL
1.11	19-Feb-2007	he	Since drain_writebuf() is #defined in <arm/cpufunc.h>, we need to include it here.
1.10	18-Feb-2007	ad	+ mb_memory()
1.9	18-Feb-2007	matt	Equate mb_write and mb_read to drain_writebuf (from cpu.h)
1.8	18-Feb-2007	matt	Add <arm/mutex.h> and <arm/rwlock.h> Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>
1.7	28-Dec-2005	perry	branches: 1.7.26; inline -> __inline
1.6	24-Dec-2005	perry	Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.5	11-Dec-2005	christos	merge ktrace-lwp.
1.4	26-Sep-2003	nathanw	branches: 1.4.16; Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h so that they can be used in a namespace-friendly way.
1.3	07-Oct-2002	bjh21	branches: 1.3.8; Minor tidy-up, mostly to improve readability. The SWP instruction is now in its own little inline function, and this allows us to get rid of all the automatic variables elsewhere. This subtly changes the semantics of __cpu_simple_lock() such that the loop ends up one instruction longer, but I'm not sure that's a particularly bad thing.
1.2	15-Nov-2001	thorpej	Implement __cpu_simple_lock*() primitives using the SWP insn. Note this insn is available only on ARM arch v3 and later (and 2a). We don't expect to be using these ops in the kernel on processors too old to have SWP, and for userland uses (in e.g. a pthread library), the kernel will simply have to trap and emulate the insn (it needs to be "atomic", so a kernel trap of some sort will be necessary on such platforms anyway).
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.6; 1.1.10; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.10.2	18-Oct-2002	nathanw	Catch up to -current.
1.1.10.1	15-Nov-2001	thorpej	Merge from -current; locking primitives implemented.
1.1.6.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file lock.h was added on branch thorpej_scsipi on 2001-01-10 19:02:08 +0000
1.3.8.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.3.8.2	18-Sep-2004	skrll	Sync with HEAD.
1.3.8.1	03-Aug-2004	skrll	Sync with HEAD
1.4.16.4	27-Oct-2007	yamt	sync with head.
1.4.16.3	03-Sep-2007	yamt	sync with head.
1.4.16.2	26-Feb-2007	yamt	sync with head.
1.4.16.1	21-Jun-2006	yamt	sync with head.
1.7.26.2	12-Mar-2007	rmind	Sync with HEAD.
1.7.26.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.13.22.2	06-Nov-2007	matt	sync with HEAD
1.13.22.1	09-Sep-2007	matt	Use & constraint to avoid swpb/swp compile bug.
1.13.20.1	01-Jan-2008	chris	Sync with HEAD.
1.13.18.1	02-Oct-2007	joerg	Sync with HEAD.
1.13.16.1	02-Oct-2007	rjs	Sync with HEAD.
1.13.14.1	15-Aug-2007	skrll	Provide __SIMPLELOCK_{UN,}LOCKED_P and __cpu_simple_lock_{set,clear} for all architectures.
1.13.10.1	03-Oct-2007	garbled	Sync with HEAD
1.13.2.1	09-Oct-2007	ad	Sync with head.
1.15.20.1	16-May-2008	yamt	sync with head.
1.15.18.1	18-May-2008	yamt	sync with head.
1.15.16.1	02-Jun-2008	mjf	Sync with HEAD.
1.17.42.2	28-Nov-2012	matt	Make __swp for the kernel return unsigned char and restore __cpu_simple_lock_t (match what -HEAD has).
1.17.42.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.17.34.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.17.34.2	16-Jan-2013	yamt	sync with (a bit old) head
1.17.34.1	30-Oct-2012	yamt	sync with head
1.17.18.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.21.2.3	03-Dec-2017	jdolecek	update from HEAD
1.21.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.21.2.1	25-Feb-2013	tls	resync with head
1.24.2.2	18-May-2014	rmind	sync with head
1.24.2.1	28-Aug-2013	rmind	sync with head
1.28.4.1	06-Apr-2015	skrll	Sync with HEAD
1.28.2.2	27-May-2015	msaitoh	Pull up following revision(s) (requested by skrll in ticket #805): sys/arch/arm/include/arm32/pmap.h: revision 1.138 sys/arch/arm/arm/cpufunc.c: revision 1.151 sys/arch/arm/arm32/bus_dma.c: revision 1.90 sys/arch/arm/broadcom/bcm53xx_pax.c: revision 1.14 sys/arch/arm/arm32/bus_dma.c: revision 1.91 sys/arch/arm/samsung/exynos_space.c: revision 1.2 sys/arch/arm/arm32/db_machdep.c: revision 1.23 sys/arch/arm/allwinner/awin_space.c: revision 1.4 sys/arch/arm/include/rwlock.h: revision 1.9 sys/arch/arm/amlogic/amlogic_space.c: revision 1.2 sys/arch/arm/zynq/zynq_space.c: revision 1.2 sys/arch/arm/broadcom/bcm2835_space.c: revision 1.7 sys/arch/arm/arm32/pmap.c: revision 1.317 sys/arch/arm/include/locore.h: revision 1.19 sys/arch/arm/include/mutex.h: revision 1.20 sys/arch/arm/include/lock.h: revision 1.31 sys/arch/arm/include/lock.h: revision 1.32 sys/arch/arm/broadcom/bcmgen_space.c: revision 1.5 - Kill redundant semicolons. - Indentation. - Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.28.2.1	21-Feb-2015	martin	Pull up following revision(s) (requested by joerg in ticket #536): sys/arch/arm/include/lock.h: revision 1.30 Don't use plain inline in that might end up compiled with -ansi.
1.32.10.1	26-Apr-2021	martin	Pull up following revision(s) (requested by skrll in ticket #1672): sys/arch/arm/include/lock.h: revision 1.37 common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.11 common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.15 common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.16 sys/arch/arm/include/lock.h: revision 1.36 Fix ARMv8 instructions Fix __sync_lock_release_4 to actually zeroise the whole 4bytes/32bits. Trailing whitespace Change #ifdef FOO to #if defined(FOO). NFCI.
1.33.8.2	30-Apr-2021	martin	Pull up following revision(s) (requested by skrll in ticket #1261): sys/arch/arm/include/lock.h: revision 1.38 common/lib/libc/arch/arm/atomic/membar_ops.S: revision 1.7 common/lib/libc/arch/arm/atomic/atomic_swap_16.S: revision 1.5 common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.12 common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.17 Add the appropriate memory barrier before the lock is cleared in __sync_lock_release_{1,2,4,8}. That is, all reads and write for the inner shareability domain before the lock clear store. Improve the membar_ops barriers - no need to use dsb and wait for completion. Also, we only to act on the inner shareability domain. Fix the barrier confusion. From Riastradh - thanks!.
1.33.8.1	26-Apr-2021	martin	Pull up following revision(s) (requested by skrll in ticket #1254): sys/arch/arm/include/lock.h: revision 1.37 common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.11 common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.15 common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.16 sys/arch/arm/include/lock.h: revision 1.36 Fix ARMv8 instructions Fix __sync_lock_release_4 to actually zeroise the whole 4bytes/32bits. Trailing whitespace Change #ifdef FOO to #if defined(FOO). NFCI.
1.33.4.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.36.2.2	17-Jun-2021	thorpej	Sync w/ HEAD.
1.36.2.1	13-May-2021	thorpej	Sync with HEAD.
1.38.2.1	31-May-2021	cjep	sync with head
1.40	07-Oct-2025	skrll	Provide new assembly macros INTERRUPT_{DISABLE,ENABLE} which mask/unmask both IRQs and FIQs
1.39	07-Oct-2025	skrll	Retire the locore.h assembly versions of IRQ{enable,disable} in favour of the "experimental" cpuswitch.S versions, but rename them IRQ_{DISABLE,ENABLE} and have them take a temporary register which is only used for < armv6.
1.38	06-Oct-2025	skrll	#define<tab> consistency
1.37	31-Oct-2021	skrll	Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep. The AP initialisation code in cpu_init_secondary_processor will read and initialise the required system registers and state for the BP to attach and report. Rework the interrupt handler code for this new sequence. Thankfully, this removes a bunch of code for bcm2836mp. The VFP detection handler on <= armv7 relies on the global undefined handler being in place until the BP attaches vfp. That is, after the APs have been spun up. gicv3_its.c has a serialisation issue which is protected against in the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin lock. The serialisation issue needs addressing more completely. Tested on RPI3, Apple M1, QEMU, and lx2k Fixes PR port-arm/56264: diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3
1.36	01-Feb-2021	skrll	G/C some old code that was for acorn26
1.35	01-Dec-2020	rin	Fix confusions related to encoding of instructions. For __ARMEB__ in BE8 mode, instructions are encoded in little-endian. Therefore, we need to swap bytes against these in native byte order. In other cases, i.e., __ARMEL__ and __ARMEB__ in BE32 mode, instructions are in native byte order, and we don't need to swap them.
1.34	30-Oct-2020	skrll	branches: 1.34.2; Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.
1.33	14-Aug-2020	skrll	Mirror the changes to aarch64 and - Switch to TPIDRPRW_IS_CURLWP, because curlwp is accessed much more often by MI code. It also makes curlwp preemption safe, - Make ASTs operate per-LWP rather than per-CPU, otherwise sometimes LWPs can see spurious ASTs (which doesn't cause a problem, it just means some time may be wasted). - Make sure ASTs are always set on the same CPU as the target LWP, and delivered via IPI if posted from a remote CPU so that they are resolved quickly. - Add some cache line padding to struct cpu_info. - Add a memory barrier in a couple of places where ci_curlwp is set. This is needed whenever an LWP that is resuming on the CPU could hold an adaptive mutex. The barrier needs to drain the CPU's store buffer, so that the update to ci_curlwp becomes globally visible before the LWP can resume and call mutex_exit().
1.32	15-Feb-2020	skrll	Various updates and improvements to cpu start up on arm/aarch64 - start sharing more code around the AP startup messaging. - call arm_cpu_topology_set early so that ci_core_id is available for drivers, e.g. bcm2835_intr.c - both arm and aarch64 now have - a static cpu_info_store array - the same arm_cpu_{hatched,mbox}
1.31	06-Apr-2019	thorpej	branches: 1.31.6; Overhaul the API used to fetch and store individual memory cells in userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(), subyte(), suword(), etc.) are retired and replaced with new ufetch(9) and ustore(9) APIs that can return proper error codes, etc. and are implemented consistently across all platforms. The interrupt-safe variants are no longer supported (and several of the existing attempts at fuswintr(), etc. were buggy and not actually interrupt-safe). Also augmement the ucas(9) API, making it consistently available on all plaforms, supporting uniprocessor and multiprocessor systems, even those that do not have CAS or LL/SC primitives. Welcome to NetBSD 8.99.37.
1.30	01-Apr-2018	ryo	branches: 1.30.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.29	24-Jan-2018	skrll	branches: 1.29.2; Remove port-acorn26 OK core@
1.28	24-Aug-2017	jmcneill	Do runtime detection of MP extensions to allow using a MULTIPROCESSOR kernel on CPUs without the MP extensions feature (like Cortex-A8).
1.27	16-Mar-2017	chs	allow pcu_save() and pcu_discard() to be called on other threads, ptrace needs to use it that way.
1.26	09-Jun-2015	skrll	branches: 1.26.2; 1.26.4; KNF a comment
1.25	09-Jun-2015	skrll	Trailing whitespace.
1.24	09-Jun-2015	skrll	Use TTBR_[UM]PATTR in a9_mpsubr.S as well as cpufunc_asm_armv7 Prompted by matt@
1.23	28-May-2015	matt	Appease clang's integrated assembler and have separate thumb2 and arm asm's for ldrht
1.22	28-May-2015	matt	Fix ldrht
1.21	30-Mar-2015	matt	#include <sys/pcu.h>
1.20	29-Mar-2015	matt	If using TPIDRPRW_IS_CURLWP and !MP and ARMV7, use movw/movt to load address of cpu_info_store
1.19	25-Feb-2015	joerg	Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.18	07-Nov-2014	martin	branches: 1.18.2; Guard a few inline functions by #ifndef _RUMPKERNEL, to allow including this file in rump builds.
1.17	13-Aug-2014	matt	branches: 1.17.2; Add __NO_FIQ to prevent testing of the PSR FIQ bit Use VALID_R15_PSR(pc, spsr) instead of testing explicitly
1.16	28-Mar-2014	matt	branches: 1.16.4; 1.16.6; Various MP changes.
1.15	18-Mar-2014	matt	defflag VERBOSE_INIT_ARM
1.14	03-Mar-2014	matt	Add most of the cpu_* variables to <arm/locore.h> Add and initialize cpu_synchprim_present
1.13	26-Feb-2014	matt	Add arm_cpu_max
1.12	01-Feb-2014	joerg	branches: 1.12.2; Typos.
1.11	01-Feb-2014	joerg	Fix RCS ID.
1.10	01-Feb-2014	joerg	Be nice to LLVM and use an explicit immediate.
1.9	30-Jan-2014	matt	ldrht is v6t2 or later so use ldrt and extract the right halfword.
1.8	29-Jan-2014	matt	Add read_insn and read_thumb_insn inlines to hide the endianness of instructions and use them as appropriate.
1.7	11-Jan-2014	matt	Add hw.printfataltraps sysctl. Always print fatal traps for init. For all other processes, only do so if cpu_printfataltraps is true.
1.6	20-Dec-2013	matt	Add CPU_IS_ARMV6_P() macro
1.5	07-Sep-2013	matt	Add a machdep.hwdiv_present sysctl (cortex A7 and A15 have hwdiv instructions)
1.4	23-Aug-2013	matt	branches: 1.4.2; Reap LWP_VFPUSED and use PCU internal tracking. Add bool vfp_used_p(void);
1.3	18-Aug-2013	matt	Include <arm/cpufunc.h> if !_LOCORE
1.2	18-Aug-2013	matt	Add a CPU_IS_ARMV7_P() macro (nonv7 evals to false, v7 only true, otherwise cpu_armv7_p is checked (and is set by cpuconf for cortex and pj4b).
1.1	18-Aug-2013	matt	Move the MD parts of <arm/cpu.h> to here.
1.4.2.3	18-May-2014	rmind	sync with head
1.4.2.2	28-Aug-2013	rmind	sync with head
1.4.2.1	23-Aug-2013	rmind	file locore.h was added on branch rmind-smpnet on 2013-08-28 23:59:12 +0000
1.12.2.2	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.12.2.1	01-Feb-2014	matt	file locore.h was added on branch matt-nb5-mips64 on 2014-02-15 16:18:36 +0000
1.16.6.2	27-May-2015	msaitoh	Pull up following revision(s) (requested by skrll in ticket #805): sys/arch/arm/include/arm32/pmap.h: revision 1.138 sys/arch/arm/arm/cpufunc.c: revision 1.151 sys/arch/arm/arm32/bus_dma.c: revision 1.90 sys/arch/arm/broadcom/bcm53xx_pax.c: revision 1.14 sys/arch/arm/arm32/bus_dma.c: revision 1.91 sys/arch/arm/samsung/exynos_space.c: revision 1.2 sys/arch/arm/arm32/db_machdep.c: revision 1.23 sys/arch/arm/allwinner/awin_space.c: revision 1.4 sys/arch/arm/include/rwlock.h: revision 1.9 sys/arch/arm/amlogic/amlogic_space.c: revision 1.2 sys/arch/arm/zynq/zynq_space.c: revision 1.2 sys/arch/arm/broadcom/bcm2835_space.c: revision 1.7 sys/arch/arm/arm32/pmap.c: revision 1.317 sys/arch/arm/include/locore.h: revision 1.19 sys/arch/arm/include/mutex.h: revision 1.20 sys/arch/arm/include/lock.h: revision 1.31 sys/arch/arm/include/lock.h: revision 1.32 sys/arch/arm/broadcom/bcmgen_space.c: revision 1.5 - Kill redundant semicolons. - Indentation. - Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.16.6.1	15-Nov-2014	martin	Pull up following revision(s) (requested by skrll in ticket #240): sys/arch/arm/include/locore.h: revision 1.18 Guard a few inline functions by #ifndef _RUMPKERNEL, to allow including this file in rump builds.
1.16.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.16.4.1	28-Mar-2014	yamt	file locore.h was added on branch yamt-pagecache on 2014-05-22 11:39:32 +0000
1.17.2.3	03-Dec-2017	jdolecek	update from HEAD
1.17.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.17.2.1	13-Aug-2014	tls	file locore.h was added on branch tls-maxphys on 2014-08-20 00:02:46 +0000
1.18.2.4	28-Aug-2017	skrll	Sync with HEAD
1.18.2.3	22-Sep-2015	skrll	Sync with HEAD
1.18.2.2	06-Jun-2015	skrll	Sync with HEAD
1.18.2.1	06-Apr-2015	skrll	Sync with HEAD
1.26.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.26.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.29.2.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.30.2.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.30.2.1	10-Jun-2019	christos	Sync with HEAD
1.31.6.1	29-Feb-2020	ad	Sync with head.
1.34.2.2	03-Apr-2021	thorpej	Sync with HEAD.
1.34.2.1	14-Dec-2020	thorpej	Sync w/ HEAD.
1.2	04-Nov-2024	christos	Undo previous lwp.h change.
1.1	03-Nov-2024	christos	Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate lwp.h file.
1.1	30-Nov-2024	christos	branches: 1.1.4; Create a new header lwp_private.h to contain _lwp_getprivate_fast, _lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that: 1. we don't need special hacks to hide them 2. we can include <lwp.h> where needed to get the necessary prototypes without redefining them locally.
1.1.4.2	02-Aug-2025	perseant	Sync with HEAD
1.1.4.1	30-Nov-2024	perseant	file lwp_private.h was added on branch perseant-exfatfs on 2025-08-02 05:55:28 +0000
1.4	31-Jan-2014	matt	Consolidate the 128-bit long double defintions to <sys/ieee754.h> Each arch that uses it now defines __HAVE_LONG_DOUBLE to 128. <machine/ieee.h> is now just include the machine's math.h followed by <sys/ieee754.h>
1.3	29-Jan-2014	matt	AAPCS64 supports 16-byte long doubles
1.2	19-Feb-2002	simonb	branches: 1.2.160; 1.2.170; 1.2.176; Clean up some rampant code duplication wrt ieee number handling: - Add alignment-safe double and float unions. - Use the above for the __infinity and __nan constants on all architectures that use the standard ieee754 representation of those constants. - Add a single copy of various ieee754 math functions (frexp, isinf, isnan, ldexp and modf) that had numerous duplicates among the arch-specific directories. - Use the above functions on all architectures where the generic C versions where used. Architectures that had local assembly routines are untouched (for those functions only).
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.6; 1.1.10; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.10.1	28-Feb-2002	nathanw	Catch up to -current.
1.1.6.1	16-Mar-2002	jdolecek	Catch up with -current.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file math.h was added on branch thorpej_scsipi on 2001-01-10 19:02:08 +0000
1.2.176.1	18-May-2014	rmind	sync with head
1.2.170.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.2.160.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.27	30-Nov-2024	christos	Create a new header lwp_private.h to contain _lwp_getprivate_fast, _lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that: 1. we don't need special hacks to hide them 2. we can include <lwp.h> where needed to get the necessary prototypes without redefining them locally.
1.26	04-Nov-2024	christos	Undo previous lwp.h change.
1.25	03-Nov-2024	christos	Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate lwp.h file.
1.24	18-May-2024	thorpej	branches: 1.24.2; Clean up the <sys/ucontext.h> <-> <machine/mcontext.h> interface up a little: - Define _UC_MD_BIT* constants for the available machine-dependent bits, and use those constants to define the machine-dependent bits as well as the machine-independent bits that have machine-dependent values. - Explicitly generate an error if _UC_TLSBASE, _UC_SETSTACK, or _UC_CLRSTACK are not defined by <machine/mcontext.h>.
1.23	06-Oct-2021	skrll	More trailing whitespace
1.22	22-Sep-2021	ryo	fix typo in comment
1.21	12-Oct-2018	ryo	add initial support of COMPAT_NETBSD32 on AArch64. arm ELF32 EABI binaries could be execute in AArch32 state on AArch64. A32 THUMB mode is not supported yet.
1.20	01-Apr-2018	ryo	branches: 1.20.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.19	15-Feb-2018	kamil	branches: 1.19.2; Introduce _UC_MACHINE_FP() as a macro _UC_MACHINE_FP() is a helper macro to extract from mcontext a frame pointer. Don't rely on this interface as a compiler might strip frame pointer or optimize it making this interface unreliable. For hppa assume a small frame context, for larger frames FP might be located in a different register (4 instead of 3). For ia64 there is no strict frame pointer, and registers might rotate. Reuse 79 following: ./gcc/config/ia64/ia64.h:#define HARD_FRAME_POINTER_REGNUM LOC_REG (79) Once ia64 will mature, this should be revisited. A macro can encapsulate a real function for extracting Frame Pointer on more complex CPUs / ABIs. For the remaining CPUs, reuse standard register as defined in appropriate ABI. The direct users of this macro are LLVM and GCC with Sanitizers. Proposed on tech-userlevel@. Sponsored by <The NetBSD Foundation>
1.18	24-Mar-2015	matt	branches: 1.18.10; Preserve/restore user r/w tpid in mcontext.
1.17	18-Mar-2015	joerg	Ensure _lwp_setcontext gets consistent language binding.
1.16	15-Aug-2013	matt	branches: 1.16.4; 1.16.6; If compiling for Thumb1, make __lwp_getprivate_fast call __aeabi_read_tp.
1.15	08-Dec-2012	matt	branches: 1.15.2; Define the correct __UCONTEXT_SIZE for EABI.
1.14	08-Dec-2012	christos	need stdint.h for uint64_t and it is messy to do it open-coded.
1.13	07-Dec-2012	matt	Extend vfpreg to include all 32 64-bit FP registers. For __ARM_EABI__, define __vfp_fstmx to have space for all 32 32-bit FP registers (It's a newly supported ABI so we can "break" binary compatibility.
1.12	05-Dec-2012	matt	ARMFPE hasn't compiled since NetBSD 4. Remove it. Complete support for FPU_VFP. fpregs now contains vfpreg. XXX vfpreg only has space for 16 64-bit FP registers though VFPv3 and later have 32 64-bit FP registers.
1.11	03-Aug-2012	matt	branches: 1.11.2; COMPAT_NETBSD32 support for ARM. Which is strange since ARM is already 32-bits. But the newer ARM ABI AAPCS changes the alignment of 64-bit fields so structures need to copied in and out to deal with the alignment change. This is a kludge but makes debugging of AAPCS support much easier.
1.10	13-Feb-2012	matt	Modify __lwp_getprivate_fast to call _lwp_getprivate if the mrc instruction returns 0 (some ARM cores are broken and don't raise an undefined exception when encountering an unknown or privileged mrc instruction in user mode).
1.9	07-Apr-2011	matt	branches: 1.9.4; 1.9.8; Add __lwp_getprivate_fast
1.8	24-Feb-2011	joerg	Allow storing and receiving the LWP private pointer via ucontext_t on all platforms except VAX and IA64. Add fast access via register for AMD64, i386 and SH3 ports. Use this fast access in libpthread to replace the stack based pthread_self(). Implement skeleton support for Alpha, HPPA, PowerPC, SPARC and SPARC64, but leave it disabled. Ports that support this feature provide __HAVE____LWP_GETPRIVATE_FAST in machine/types.h and a corresponding __lwp_getprivate_fast in machine/mcontext.h. This material is based upon work partially supported by The NetBSD Foundation under a contract with Joerg Sonnenberger.
1.7	23-Feb-2011	joerg	Fix ucontext32_t on AMD64. Add optional compile time assertions for ucontext_t and ucontext32_t to ensure that they don't change. Provide the constants for AMD64, ARM, i386, and M68K.
1.6	28-Apr-2008	martin	branches: 1.6.22; 1.6.28; 1.6.30; Remove clause 3 and 4 from TNF licenses
1.5	11-Dec-2005	christos	branches: 1.5.76; 1.5.78; 1.5.80; merge ktrace-lwp.
1.4	08-Oct-2003	thorpej	Add some accessor macros for the ucontext: * _UC_MACHINE_PC() - access the program counter * _UC_MACHINE_INTRV() - access the integer return value register * _UC_MACHINE_SET_PC() - set the program counter (this requires special handling on some platforms).
1.3	05-Oct-2003	matt	Add SA_SIGINFO support for ARM (from Chris Gilbert).
1.2	17-Jan-2003	thorpej	branches: 1.2.2; Merge the nathanw_sa branch.
1.1	14-Nov-2001	thorpej	branches: 1.1.2; file mcontext.h was initially added on branch nathanw_sa.
1.1.2.3	17-Dec-2002	thorpej	Add VFP context to mcontext_t.
1.1.2.2	28-Dec-2001	nathanw	Add a macro, _UC_MACHINE_SP(), to fetch the user stack pointer from a ucontext_t.
1.1.2.1	14-Nov-2001	thorpej	ARM-specific mcontext support. From Klaus Klein <kleink@netbsd.org>.
1.2.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.2.2.1	03-Aug-2004	skrll	Sync with HEAD
1.5.80.1	16-May-2008	yamt	sync with head.
1.5.78.1	18-May-2008	yamt	sync with head.
1.5.76.1	02-Jun-2008	mjf	Sync with HEAD.
1.6.30.1	05-Mar-2011	bouyer	Sync with HEAD
1.6.28.1	06-Jun-2011	jruoho	Sync with HEAD.
1.6.22.2	21-Apr-2011	rmind	sync with head
1.6.22.1	05-Mar-2011	rmind	sync with head
1.9.8.1	18-Feb-2012	mrg	merge to -current.
1.9.4.4	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.9.4.3	16-Jan-2013	yamt	sync with (a bit old) head
1.9.4.2	30-Oct-2012	yamt	sync with head
1.9.4.1	17-Apr-2012	yamt	sync with head
1.11.2.3	03-Dec-2017	jdolecek	update from HEAD
1.11.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.11.2.1	25-Feb-2013	tls	resync with head
1.15.2.1	28-Aug-2013	rmind	sync with head
1.16.6.1	06-Apr-2015	skrll	Sync with HEAD
1.16.4.1	21-Mar-2015	snj	Pull up following revision(s) (requested by joerg in ticket #633): sys/arch/arm/include/mcontext.h: revision 1.17 Ensure _lwp_setcontext gets consistent language binding.
1.18.10.3	21-Mar-2018	martin	Pull up the following, requested by kamil in ticket #552: external/gpl3/gcc{.old}/dist/libsanitizer/asan/asan_linux.cc 1.4 sys/arch/aarch64/include/mcontext.h 1.2 sys/arch/alpha/include/mcontext.h 1.9 sys/arch/amd64/include/mcontext.h 1.19 sys/arch/arm/include/mcontext.h 1.19 sys/arch/hppa/include/mcontext.h 1.9 sys/arch/i386/include/mcontext.h 1.14 sys/arch/ia64/include/mcontext.h 1.6 sys/arch/m68k/include/mcontext.h 1.10 sys/arch/mips/include/mcontext.h 1.22 sys/arch/or1k/include/mcontext.h 1.2 sys/arch/powerpc/include/mcontext.h 1.18 sys/arch/riscv/include/mcontext.h 1.5 sys/arch/sh3/include/mcontext.h 1.11 sys/arch/sparc/include/mcontext.h 1.14-1.17 sys/arch/sparc64/include/mcontext.h 1.10 sys/arch/vax/include/mcontext.h 1.9 tests/lib/libc/sys/Makefile 1.50 tests/lib/libc/sys/t_ucontext.c 1.2-1.5 sys/arch/hppa/include/mcontext.h 1.10 sys/arch/ia64/include/mcontext.h 1.7 - Introduce _UC_MACHINE_FP(). _UC_MACHINE_FP() is a helper macro to extract from mcontext a frame pointer. - Add new tests in lib/libc/sys/t_ucontext: * ucontext_sp (testing _UC_MACHINE_SP) * ucontext_fp (testing _UC_MACHINE_FP) * ucontext_pc (testing _UC_MACHINE_PC) * ucontext_intrv (testing _UC_MACHINE_INTRV) Add a dummy implementation of _UC_MACHINE_INTRV() for ia64. Implement _UC_MACHINE_INTRV() for hppa. Make the t_ucontext.c test more portable. We now have _UC_MACHINE_FP.
1.18.10.2	26-Feb-2018	snj	revert ticket 552, which broke the build
1.18.10.1	25-Feb-2018	snj	Pull up following revision(s) (requested by kamil in ticket #552): sys/arch/aarch64/include/mcontext.h: 1.2 sys/arch/alpha/include/mcontext.h: 1.9 sys/arch/amd64/include/mcontext.h: 1.19 sys/arch/arm/include/mcontext.h: 1.19 sys/arch/hppa/include/mcontext.h: 1.9 sys/arch/i386/include/mcontext.h: 1.14 sys/arch/ia64/include/mcontext.h: 1.6 sys/arch/m68k/include/mcontext.h: 1.10 sys/arch/mips/include/mcontext.h: 1.22 sys/arch/or1k/include/mcontext.h: 1.2 sys/arch/powerpc/include/mcontext.h: 1.18 sys/arch/riscv/include/mcontext.h: 1.5 sys/arch/sh3/include/mcontext.h: 1.11 sys/arch/sparc/include/mcontext.h: 1.14-1.17 sys/arch/sparc64/include/mcontext.h: 1.10 sys/arch/vax/include/mcontext.h: 1.9 tests/lib/libc/sys/Makefile: 1.50 tests/lib/libc/sys/t_ucontext.c: 1.2 Introduce _UC_MACHINE_FP() as a macro _UC_MACHINE_FP() is a helper macro to extract from mcontext a frame pointer. Don't rely on this interface as a compiler might strip frame pointer or optimize it making this interface unreliable. For hppa assume a small frame context, for larger frames FP might be located in a different register (4 instead of 3). For ia64 there is no strict frame pointer, and registers might rotate. Reuse 79 following: ./gcc/config/ia64/ia64.h:#define HARD_FRAME_POINTER_REGNUM LOC_REG (79) Once ia64 will mature, this should be revisited. A macro can encapsulate a real function for extracting Frame Pointer on more complex CPUs / ABIs. For the remaining CPUs, reuse standard register as defined in appropriate ABI. The direct users of this macro are LLVM and GCC with Sanitizers. Proposed on tech-userlevel@. Sponsored by <The NetBSD Foundation> -- Improve _UC_MACHINE_FP() for SPARC/SPARC64 Introduce a static inline function _uc_machine_fp() that contains improved caluclation of a frame pointer. Algorithm: uptr stk_ptr; # if defined (__arch64__) stk_ptr = (uptr ) (sp + 2047); # else stk_ptr = (uptr ) sp; # endif bp = stk_ptr[15]; Noted by <mrg> -- Make _UC_MACHINE_FP() compile again and fix it so that it does not add the offset twice. -- fix _UC_MACHINE32_FP() -- use 32 bit pointer value so that [15] is the right offset. do this by using __greg32_t, which is only in the sparc64 version, and these are only useful there, so move them. -- Add new tests in lib/libc/sys/t_ucontext New tests: - ucontext_sp - ucontext_fp - ucontext_pc - ucontext_intrv They test respectively: - _UC_MACHINE_SP - _UC_MACHINE_FP - _UC_MACHINE_PC - _UC_MACHINE_INTRV These tests attempt to access and print the values from ucontext, without interpreting the values. This is a follow up of the _UC_MACHINE_FP() introduction. These tests use PRIxREGISTER, and require to be built with -D_KERNTYPES. Sponsored by <The NetBSD Foundation>
1.19.2.2	20-Oct-2018	pgoyette	Sync with head
1.19.2.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.20.2.1	10-Jun-2019	christos	Sync with HEAD
1.24.2.1	02-Aug-2025	perseant	Sync with HEAD
1.29	12-Jul-2023	riastradh	machine/mutex.h: Sprinkle sys/types.h, omit machine/lock.h. Turns out machine/lock.h is not needed for __cpu_simple_lock_t, which always comes from sys/types.h. And, really, sys/types.h (or at least sys/stdint.h) is needed for uintN_t and uintptr_t.
1.28	11-Jul-2023	riastradh	arm/mutex.h: Need machine/intr.h, machine/lock.h. For ipl_cookie_t and __cpu_simple_lock_t.
1.27	26-Dec-2021	skrll	branches: 1.27.4; port-arm/50563: pool allocator corruption due to __MUTEX_PRIVATE This file has moved on somewhat since the PR was raised, but nevertheless let's add the CTASSERT "just in case".
1.26	25-Aug-2021	thorpej	- In kern_mutex.c, if MUTEX_CAS() is not defined, define it in terms of atomic_cas_ulong(). - For arm, ia64, m68k, mips, or1k, riscv, vax: don't define our own MUTEX_CAS(), as they either use atomic_cas_ulong() or equivalent (atomic_cas_uint() on m68k). - For alpha and sparc64, don't define MUTEX_CAS() in terms of their own _lock_cas(), which has its own memory barriers; the call sites in kern_mutex.c already have the appropriate memory barrier calls. Thus, alpha and sparc64 can use default definition. - For sh3, don't define MUTEX_CAS() in terms of its own _lock_cas(); atomic_cas_ulong() is strong-aliased to _lock_cas(), therefore defining our own MUTEX_CAS() is redundant. Per thread: https://mail-index.netbsd.org/tech-kern/2021/07/25/msg027562.html
1.25	01-Dec-2020	skrll	G/C MUTEX_PAUSE_{PAUSE,WAKE}
1.24	01-Dec-2020	skrll	Trailing whitespace
1.23	05-Mar-2020	riastradh	branches: 1.23.4; Fix userland build by surrounding stuff with #ifdef _KERNEL. (...Why does this header file get exposed to userland at all?)
1.22	05-Mar-2020	riastradh	Remove __MUTEX_PRIVATE conditional in definition of struct kmutex. This doesn't buy us anything but the need to hack around it in ctfmerge to avoid massive duplication of kernel types -- which only worked for the x86 definition. This changes only x86 and arm for now, pending compile-testing the remaining architectures.
1.21	29-Nov-2019	riastradh	Nix now-unused definitions of MUTEX_GIVE/MUTEX_RECEIVE.
1.20	25-Feb-2015	joerg	branches: 1.20.18; 1.20.22; Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.19	08-Nov-2014	skrll	branches: 1.19.2; Clarify/merge two comments
1.18	12-Oct-2014	skrll	Typo in comment.
1.17	08-Aug-2014	skrll	branches: 1.17.2; Update a comment. Probably still needs tweaking further.
1.16	12-Jun-2014	ozaki-r	Fix ARMv7 checks _ARM_ARCH_7 && !_ARM_ARCH_6 never be true.
1.15	12-Jun-2014	ozaki-r	Fix macro name; MUTEX_RECEIVE => MUTEX_GIVE
1.14	28-Mar-2014	matt	branches: 1.14.2; Use dmb/dsb
1.13	25-Sep-2012	matt	branches: 1.13.2; Back out 1.12 and include a comment as to why.
1.12	31-Aug-2012	matt	branches: 1.12.2; Move the __cpu_simple_lock to the last byte so it's easier to read in dumps
1.11	16-Aug-2012	matt	Actually use the assembly version of the atomic function if compiling for armv6 or armv7 cpus. Use atomic_cas_ptr instead of _lock_cas so we pick up the assembly version when it's used.
1.10	28-Apr-2008	martin	branches: 1.10.18; 1.10.34; 1.10.42; Remove clause 3 and 4 from TNF licenses
1.9	29-Nov-2007	ad	branches: 1.9.14; 1.9.16; 1.9.18; - Change _lock_cas() to do compare-and-swap instead of compare-and-set. - Add aliases for atomic_cas_ulong() and friends.
1.8	21-Nov-2007	yamt	make kmutex_t and krwlock_t smaller by killing lock id. ok'ed by Andrew Doran.
1.7	09-Mar-2007	thorpej	branches: 1.7.2; 1.7.8; 1.7.16; 1.7.18; 1.7.20; 1.7.22; 1.7.26; 1.7.28; Rewrite the ARM mutex implementation to be of the simple-mutex variety. Because pre-v6 ARM lacks support for an atomic compare-and-swap, we implement _lock_cas() as a restartable atomic squence that is checked in the IRQ handler right before AST processing. (This is safe because, for all practical purposes, there are no SMP pre-v6 ARM systems.) This can serve as a model for other non-MP platforms that lack the necessary atomic operations for mutexes (SuperH, for example). Upshots of this change: - kmutex_t is now down to 8 bytes on ARM; about as good as we can get. - ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes. The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK. That is left as an exercise for the port maintainer. Reviewed and tested by Matt Thomas.
1.6	09-Mar-2007	skrll	Typo in comment.
1.5	09-Mar-2007	thorpej	Elaborate a bit more in the first paragraph.
1.4	09-Mar-2007	thorpej	Update the theory statement for the ARM mutex implementation. There is still work to be done here.
1.3	09-Mar-2007	thorpej	Make ipl_t and ipl_cookie_t 8-bit values. kmutex is now down to 12 bytes (from 20) on ARM. Approved by Matt Thomas.
1.2	09-Mar-2007	thorpej	Make __cpu_simple_lock_t an unsigned char if _KERNEL, and operate on it using SWPB. Approved by Matt Thomas.
1.1	18-Feb-2007	matt	branches: 1.1.2; 1.1.6; Add <arm/mutex.h> and <arm/rwlock.h> Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>
1.1.6.3	12-Mar-2007	rmind	Sync with HEAD.
1.1.6.2	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.1.6.1	18-Feb-2007	yamt	file mutex.h was added on branch yamt-idlelwp on 2007-02-27 16:49:36 +0000
1.1.2.4	07-Dec-2007	yamt	sync with head
1.1.2.3	03-Sep-2007	yamt	sync with head.
1.1.2.2	26-Feb-2007	yamt	sync with head.
1.1.2.1	18-Feb-2007	yamt	file mutex.h was added on branch yamt-lazymbuf on 2007-02-26 09:05:59 +0000
1.7.28.1	08-Dec-2007	mjf	Sync with HEAD.
1.7.26.1	21-Nov-2007	bouyer	Sync with HEAD
1.7.22.1	09-Jan-2008	matt	sync with HEAD
1.7.20.1	01-Jan-2008	chris	Sync with HEAD.
1.7.18.2	03-Dec-2007	joerg	Sync with HEAD.
1.7.18.1	21-Nov-2007	joerg	Sync with HEAD.
1.7.16.1	26-Dec-2007	rjs	Sync with HEAD.
1.7.8.1	18-Apr-2007	thorpej	Remove _lock_cas() in favor of atomic_cas_32().
1.7.2.1	03-Dec-2007	ad	Sync with HEAD.
1.9.18.1	16-May-2008	yamt	sync with head.
1.9.16.1	18-May-2008	yamt	sync with head.
1.9.14.1	02-Jun-2008	mjf	Sync with HEAD.
1.10.42.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.10.34.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.10.34.1	30-Oct-2012	yamt	sync with head
1.10.18.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.12.2.3	03-Dec-2017	jdolecek	update from HEAD
1.12.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.12.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.13.2.1	18-May-2014	rmind	sync with head
1.14.2.1	10-Aug-2014	tls	Rebase.
1.17.2.1	27-May-2015	msaitoh	Pull up following revision(s) (requested by skrll in ticket #805): sys/arch/arm/include/arm32/pmap.h: revision 1.138 sys/arch/arm/arm/cpufunc.c: revision 1.151 sys/arch/arm/arm32/bus_dma.c: revision 1.90 sys/arch/arm/broadcom/bcm53xx_pax.c: revision 1.14 sys/arch/arm/arm32/bus_dma.c: revision 1.91 sys/arch/arm/samsung/exynos_space.c: revision 1.2 sys/arch/arm/arm32/db_machdep.c: revision 1.23 sys/arch/arm/allwinner/awin_space.c: revision 1.4 sys/arch/arm/include/rwlock.h: revision 1.9 sys/arch/arm/amlogic/amlogic_space.c: revision 1.2 sys/arch/arm/zynq/zynq_space.c: revision 1.2 sys/arch/arm/broadcom/bcm2835_space.c: revision 1.7 sys/arch/arm/arm32/pmap.c: revision 1.317 sys/arch/arm/include/locore.h: revision 1.19 sys/arch/arm/include/mutex.h: revision 1.20 sys/arch/arm/include/lock.h: revision 1.31 sys/arch/arm/include/lock.h: revision 1.32 sys/arch/arm/broadcom/bcmgen_space.c: revision 1.5 - Kill redundant semicolons. - Indentation. - Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.19.2.1	06-Apr-2015	skrll	Sync with HEAD
1.20.22.1	13-May-2020	martin	Pull up following revision(s) (requested by chs in ticket #904): sys/arch/x86/include/mutex.h: revision 1.8 sys/arch/x86/include/mutex.h: revision 1.9 sys/arch/arm/include/mutex.h: revision 1.22 sys/arch/arm/include/mutex.h: revision 1.23 Remove __MUTEX_PRIVATE conditional in definition of struct kmutex. This doesn't buy us anything but the need to hack around it in ctfmerge to avoid massive duplication of kernel types -- which only worked for the x86 definition. This changes only x86 and arm for now, pending compile-testing the remaining architectures. Fix userland build by surrounding stuff with #ifdef _KERNEL. (...Why does this header file get exposed to userland at all?)
1.20.18.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.23.4.1	14-Dec-2020	thorpej	Sync w/ HEAD.
1.27.4.1	09-Aug-2023	martin	Pull up following revision(s) (requested by maya in ticket #316): sys/arch/m68k/include/mutex.h: revision 1.13 sys/arch/arm/include/cpu.h: revision 1.125 sys/arch/sun68k/include/intr.h: revision 1.21 sys/arch/arm/include/mutex.h: revision 1.28 sys/sys/rwlock.h: revision 1.18 sys/arch/powerpc/include/mutex.h: revision 1.7 sys/arch/arm/include/mutex.h: revision 1.29 sys/arch/powerpc/include/mutex.h: revision 1.8 sys/uvm/uvm_param.h: revision 1.42 sys/sys/ksem.h: revision 1.16 sys/arch/x86/include/mutex.h: revision 1.10 sys/sys/proc.h: revision 1.372 sys/sys/ksem.h: revision 1.17 sys/arch/ia64/include/mutex.h: revision 1.8 sys/arch/evbarm/include/intr.h: revision 1.29 sys/sys/lua.h: revision 1.9 sys/arch/next68k/include/intr.h: revision 1.23 sys/arch/ia64/include/mutex.h: revision 1.9 sys/arch/hp300/include/intr.h: revision 1.35 sys/arch/hp300/include/intr.h: revision 1.36 sys/arch/sparc/include/cpu.h: revision 1.111 sys/arch/hppa/include/mutex.h: revision 1.16 sys/arch/vax/include/intr.h: revision 1.31 sys/arch/hppa/include/mutex.h: revision 1.17 sys/arch/news68k/include/intr.h: revision 1.28 sys/arch/hppa/include/mutex.h: revision 1.18 sys/arch/hppa/include/intr.h: revision 1.3 sys/arch/hppa/include/mutex.h: revision 1.19 sys/arch/hppa/include/intr.h: revision 1.4 sys/sys/sched.h: revision 1.92 sys/opencrypto/cryptodev.h: revision 1.51 sys/arch/vax/include/mutex.h: revision 1.20 sys/arch/sparc64/include/mutex.h: revision 1.10 sys/arch/ia64/include/sapicvar.h: revision 1.2 sys/arch/riscv/include/mutex.h: revision 1.5 sys/arch/amiga/dev/grfabs_cc.c: revision 1.39 sys/external/bsd/drm2/include/linux/idr.h: revision 1.11 sys/arch/riscv/include/mutex.h: revision 1.6 sys/ddb/files.ddb: revision 1.16 sys/arch/mac68k/include/intr.h: revision 1.32 share/man/man4/ddb.4: revision 1.203 sys/ddb/db_command.c: revision 1.183 sys/arch/mips/include/mutex.h: revision 1.10 sys/ddb/db_command.c: revision 1.184 sys/arch/x68k/include/intr.h: revision 1.22 sys/arch/sparc/include/psl.h: revision 1.51 sys/arch/or1k/include/mutex.h: revision 1.4 sys/arch/mips/include/mutex.h: revision 1.11 sys/arch/arm/xscale/pxa2x0_intr.h: revision 1.16 sys/arch/sparc64/include/cpu.h: revision 1.134 sys/arch/sparc/include/psl.h: revision 1.52 sys/arch/or1k/include/mutex.h: revision 1.5 sys/arch/mvme68k/include/intr.h: revision 1.22 sys/arch/luna68k/include/intr.h: revision 1.16 external/cddl/osnet/sys/sys/kcondvar.h: revision 1.6 sys/arch/sparc/include/mutex.h: revision 1.12 sys/arch/sparc/include/mutex.h: revision 1.13 sys/arch/usermode/include/mutex.h: revision 1.5 sys/arch/usermode/include/mutex.h: revision 1.6 sys/kern/kern_core.c: revision 1.38 usr.sbin/crash/Makefile: revision 1.49 sys/arch/amiga/include/intr.h: revision 1.23 sys/arch/alpha/include/mutex.h: revision 1.12 sys/arch/alpha/include/mutex.h: revision 1.13 sys/arch/evbarm/lubbock/sacc_obio.c: revision 1.16 sys/ddb/ddb.h: revision 1.6 sys/arch/sparc64/include/mutex.h: revision 1.8 sys/arch/sh3/include/mutex.h: revision 1.12 sys/arch/evbarm/lubbock/sacc_obio.c: revision 1.17 sys/ddb/db_syncobj.c: revision 1.1 sys/arch/vax/include/mutex.h: revision 1.18 sys/arch/sparc64/include/psl.h: revision 1.63 sys/arch/sparc64/include/mutex.h: revision 1.9 sys/arch/sh3/include/mutex.h: revision 1.13 sys/arch/evbarm/lubbock/obio.c: revision 1.13 sys/arch/atari/include/intr.h: revision 1.23 sys/ddb/db_syncobj.c: revision 1.2 sys/arch/vax/include/mutex.h: revision 1.19 sys/arch/evbarm/g42xxeb/obio.c: revision 1.14 sys/arch/evbarm/g42xxeb/obio.c: revision 1.15 sys/arch/cesfic/include/intr.h: revision 1.14 sys/ddb/db_syncobj.h: revision 1.1 sys/arch/x86/include/cpu.h: revision 1.134 sys/arch/evbarm/g42xxeb/obio.c: revision 1.16 sys/arch/cesfic/include/intr.h: revision 1.15 sys/arch/arm/xscale/pxa2x0_intr.c: revision 1.26 sys/sys/cpu_data.h: revision 1.54 sys/arch/m68k/include/mutex.h: revision 1.12 sys/arch/ia64/acpi/madt.c: revision 1.6 sys/rwlock.h: Make this more self-contained for bool. machine/mutex.h: Sprinkle includes so this can be used by crash(8). ddb: New `show all tstiles' command. Shows who's waiting for which locks and what the owner is up to. Include psl.h for ipl_cookie_t if __MUTEX_PRIVATE sys: Rip <sys/resourcevar.h> out of <uvm/uvm_param.h>. And thus out of <sys/param.h>, which is exceedingly overused and fragile and delenda est. Should fix (some) issues with the recent inclusion of machine/lock.h in various machine/mutex.h files. arm/mutex.h: Need machine/intr.h, machine/lock.h. For ipl_cookie_t and __cpu_simple_lock_t. evbarm/intr.h: Define ipl_cookie_t before including ARM_INTR_IMPL. Otherwise arm/mutex.h doesn't work, due to a cyclic dependency which should really be fixed. opencrypto/cryptodev.h: Fix includes. - Move sys/condvar.h under #ifdef _KERNEL. - Add some other necessary includes and forward declarations. - Sort. hp300/intr.h: Fix missing includes. linux/idr.h: Need <sys/mutex.h> for kmutex_t. amiga/intr.h: Don't define spl() functions if !_KERNEL. This is used by crash(8) now, and what's important is ipl_cookie_t. cesfic/intr.h: Expose ipl_cookie_t to userland for crash(8). cesfic/intr.h: Expose ipl_cookie_t to userland only with _KMEMUSER. Probably not necessary but let's be a little more cautious about this. atari/intr.h: Expose ipl_cookie_t with _KMEMUSER for crash(8). arm/cpu.h: Need sys/param.h for COHERENCY_UNIT. Nix machine/param.h -- not meant to be used directly, pulled in by sys/param.h. Move the definition of ipl_cookie_t out of the kernel-only sections, some _KMEMUSER applications need it. ddb: Cast pointer to uintptr_t first before db_expr_t. hppa/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). luna68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). mvme68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). news68k/intr.h: Fix includes. Put some definitions under _KERNEL. next68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). sys/ksem.h: Hack around fstat(8) abuse of _KERNEL. sun68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). vax/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). x68k/intr.h: Put functions under _KERNEL so crash(8) can use this. Make ipl_cookie_t visible for _KMEMUSER userland applications. fix editor mishap in previous Explicitly include <sys/mutex.h> for kmutex_t. Replace kmutex_t (which may be undefined here) with struct kmutex , suggested by Taylor. hp300/intr.h: Put most of this under #ifdef _KERNEL. Only ipl_cookie_t really needs to be exposed now, for crash(8). mac68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). Make inclusion of sys/intr.h explicit for spl. fix hppa and vax builds. machine/lock.h isn't necessary for __cpu_simple_lock_t, it's in sys/types.h. avoids cpu_data.h vs sched.h include order issues. move the hppa ipl_t typedef with the moved usage of it. machine/mutex.h: Sprinkle sys/types.h, omit machine/lock.h. Turns out machine/lock.h is not needed for __cpu_simple_lock_t, which always comes from sys/types.h. And, really, sys/types.h (or at least sys/stdint.h) is needed for uintN_t and uintptr_t. ddb: Cast pointer to uintptr_t, then to db_expr_t. Avoids warnings about conversion between pointer and integer of different size on some architectures. re-fix hppa builds. this file uses __cpu_simple_lock(), not just the underlying type, so it does need machine/lock.h. Break cycle by using `struct kmutex ' instead of `kmutex_t '. sys/sched.h included sys/mutex.h which includes sys/intr.h which includes machine/intr.h which on cats includes arm/footbridge/footbridge_intr.h which includes arm/cpu.h which includes sys/cpu_data.h which includes sys/sched.h But there was never any real need for sys/mutex.h in sys/sched.h, because it only uses pointers to the opaque struct kmutex. Cycle broken by using `struct kmutex *' instead of pulling in sys/mutex.h for the definition of kmutex_t. Side effect: This revealed that sys/cpu_data.h needed sys/intr.h (which was pulled in accidentally by sys/mutex.h via sys/sched.h) for SOFTINT_COUNT. Also revealed some other machine/cpu.h header files were missing includes of sys/mutex.h for kmutex_t. ia64: Need sys/types.h for u_int, vaddr_t; sys/mutex.h for kmutex_t. explicitly include no longer implicitly included sys/mutex.h. arm/xscale: Use sys/bitops.h fls32 - 1 instead of 31 - __builtin_clz. Sidesteps namespace collision with `#define bits ...' in net/zlib.c. complete the previous - there were two calls to find_first_bit() to fix. arm/xscale: Missed a spot with previous find_first_bit commit. evbarm/g42xxeb: Fix off-by-one in previous. The original find_first_bit(x) was 31 - __builtin_clz((uint32_t)x), which is equivalent to fls32(x) - 1, not to fls32(x). Note that fls32 is 1-based and returns 0 for x=0.
1.4	06-Nov-2021	thorpej	COMPAT_NETBSD32 is all about running the 32-bit flavor of native binaries on a 64-bit platform[], as such: - Make the logic about which "sendsig" flavor to call MI (as it is in the native 64-bit environment) and follow the same rules as the native 32-bit environment. - Make COMPAT_NETBSD32 x COMPAT_16 work the same as it would in the native 32-bit environment by providing a netbsd32_sendsig_sigcontext_16_hook, rather than overriding the entire sendsig logic with a netbsd32_sendsig_hook. - In netbsd32___sigaction_sigtramp(), make sure the compat_netbsd32_16 module is loaded if the trampoline version specifies a sigcontext style handler, otherwise return EINVAL so that libc can try again with siginfo style. [] ...except for arm32, which uses it to mean "run 32-bit OABI binaries from the 32-bit EABI environment". Doing it this way was arguably a mistake, but we are stuck with it for now, so support it by providing a machine- dependent override for netbsd32_sendsig() that also disables the corresponding logic in netbsd32___sigaction_sigtramp(). Fixes PR kern/56487.
1.3	06-Oct-2021	skrll	More trailing whitespace
1.2	31-Oct-2017	martin	Allow architectures to define a macro PROC_MACHINE_ARCH(P) and PROC_MACHINE_ARCH32(P) to override the value for sysctl hw.machine_arch (native and netbsd32 commpat resp.). Use these for arm and mips instead of the (not working, noisy, in case of arm) sysctl override and #ifdef __mips__ in architecture neutral code.
1.1	03-Aug-2012	matt	branches: 1.1.2; 1.1.4; 1.1.6; COMPAT_NETBSD32 support for ARM. Which is strange since ARM is already 32-bits. But the newer ARM ABI AAPCS changes the alignment of 64-bit fields so structures need to copied in and out to deal with the alignment change. This is a kludge but makes debugging of AAPCS support much easier.
1.1.6.2	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.1.6.1	03-Aug-2012	matt	file netbsd32_machdep.h was added on branch matt-nb6-plus on 2012-11-28 22:40:29 +0000
1.1.4.2	30-Oct-2012	yamt	sync with head
1.1.4.1	03-Aug-2012	yamt	file netbsd32_machdep.h was added on branch yamt-pagecache on 2012-10-30 17:19:04 +0000
1.1.2.1	03-Dec-2017	jdolecek	update from HEAD
1.3	27-Oct-2012	chs	split device_t/softc for all remaining drivers. replace "struct device *" with "device_t". use device_xname(), device_unit(), etc.
1.2	30-May-2001	mrg	branches: 1.2.8; 1.2.168; 1.2.178; use _KERNEL_OPT
1.1	23-Feb-2001	reinoud	branches: 1.1.2; 1.1.4; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file ofisa_machdep.h was added on branch thorpej_scsipi on 2001-03-12 13:27:22 +0000
1.1.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.2.178.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.2.168.1	30-Oct-2012	yamt	sync with head
1.2.8.2	30-May-2001	mrg	use _KERNEL_OPT
1.2.8.1	30-May-2001	mrg	file ofisa_machdep.h was added on branch nathanw_sa on 2001-05-30 12:28:41 +0000
1.5	13-Sep-2014	matt	vm_offset_t -> vaddr_t, vm_size_t -> vsize_t nuke vm_offset_t and vm_size_t
1.4	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.3	14-Mar-2009	dsl	branches: 1.3.12; 1.3.22; 1.3.26; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.2	26-Oct-2006	bjh21	branches: 1.2.58; 1.2.66; 1.2.72; Change the type of initarm() on OFW-based ARM systems to match other non-hpcarm ports. This seems sensible since all of them call it from the same locore.S. This makes NetBSD/shark GENERIC compile.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.44; 1.1.74; 1.1.76; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.76.1	10-Dec-2006	yamt	sync with head.
1.1.74.1	18-Nov-2006	ad	Sync with head.
1.1.44.1	30-Dec-2006	yamt	sync with head.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file ofw.h was added on branch thorpej_scsipi on 2001-03-12 13:27:23 +0000
1.2.72.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.2.66.1	28-Apr-2009	skrll	Sync with HEAD.
1.2.58.1	04-May-2009	yamt	sync with head.
1.3.26.1	18-May-2014	rmind	sync with head
1.3.22.2	03-Dec-2017	jdolecek	update from HEAD
1.3.22.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.3.12.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.24	19-Jul-2021	christos	Remove definitions for CACHE_LINE_SIZE and COHERENCY_UNIT which are the same as the default.
1.23	16-Aug-2020	skrll	branches: 1.23.6; Define COHERENCY_UNIT and CACHE_LINE_SIZE to fix arm builds. The recent change to cpu.h and struct cpu_info needs an early definition for the ARM_INTR_IMPLs that want to inline the spl functions and get {,set_}curcpl() from cpu.h
1.22	07-Jan-2019	jdolecek	move DEV_BSIZE, DEV_BSHIFT out of MD param.h, they are same on all ports also move BLKDEV_IOSIZE, MAXPHYS, but allow override since some ports have different value (powerpc uses NBPG for BLKDEV_IOSIZE, sun2/sun3 have lower MAXPHYS)
1.21	18-Oct-2018	skrll	Provide generic start code that assumes the MMU is off and caches are disabled as per the linux booting protocol for ARMv6 and ARMv7 boards. u-boot image type should be changed to 'linux' for correct behaviour. The new start code builds a minimal "bootstrap" L1PT with cached access disabled and uses the same table for all processors. AP startup is performed in less steps and more code is written in C. The bootstrap tables and stack are placed into an (orphaned) section "_init_memory" which is given to uvm when it is no longer used. Various kernels have been converted to use this code and tested. Some boards were provided by TNF. Thanks! The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS kernels. The GENERIC kernel will also work on RPI2 using u-boot. Thanks to martin@ and aymeric@ for testing on parallella and nanosoc respectively
1.20	26-Aug-2016	mlelstv	branches: 1.20.14; 1.20.16; The 64MB was intended.
1.19	26-Oct-2013	matt	branches: 1.19.6; Use CPP symbols to determine the right MACHINE_ARCH
1.18	22-Apr-2013	matt	branches: 1.18.4; Add earm MACHINE_ARCH for __ARM_EABI__
1.17	03-Aug-2012	matt	branches: 1.17.2; Adjust ALIGNBYTES32 depending on __ARM_EABI__
1.16	03-Aug-2012	matt	COMPAT_NETBSD32 support for ARM. Which is strange since ARM is already 32-bits. But the newer ARM ABI AAPCS changes the alignment of 64-bit fields so structures need to copied in and out to deal with the alignment change. This is a kludge but makes debugging of AAPCS support much easier.
1.15	24-Jan-2012	christos	branches: 1.15.4; Use and define ALIGN() ALIGN_POINTER() and STACK_ALIGN() consistently, and avoid definining them in 10 different places if not needed.
1.14	20-Jan-2012	joerg	Change CMSG_SPACE and CMSG_LEN to provide Integer Constant Expressions again. This was changed in sys/socket.h r1.51 to work around fallout from the IPv6 aux data migration. It broke the historic ABI on some platforms. This commit restores compatibility for netbsd32 code on such platforms and provides a template for future changes to the CMSG_* alignment. Revert PCC/Clang workarounds in postfix and tmux.
1.13	06-May-2010	joerg	branches: 1.13.8; 1.13.12; Limit mbuf clusters to 64MB. Forgotten part of the February commit.
1.12	29-Aug-2008	matt	branches: 1.12.12; 1.12.14; 1.12.16; Remove non-__ELF__ snippets.
1.11	28-Aug-2006	yamt	branches: 1.11.58; 1.11.62; 1.11.64; 1.11.68; - remove unused bdbtofsb. - move the following macros from MD headers to sys/param.h. ctod dtoc ctob btoc dbtob btodb
1.10	11-Dec-2005	christos	branches: 1.10.4; 1.10.8; merge ktrace-lwp.
1.9	14-Feb-2004	jdolecek	branches: 1.9.16; add compat hook in check for zerodev; use this hook to recognize the old ARM /dev/zero minor mapping #ifdef COMPAT_16 fixes second part of PR kern/23581 by Richard Earnshaw
1.8	11-Nov-2003	scw	The previous commit had a #endif in the wrong place.
1.7	09-Nov-2003	scw	Pick the right value for {,_}MACHINE_ARCH according to endianness. Spotted by mrg@.
1.6	26-Feb-2002	simonb	branches: 1.6.18; Purge CLSIZE, CLSIZELOG2 and MCLOFSET. Be consistant in the way that MSIZE, MCLSHIFT, MCLBYTES and NMBCLUSTERS are defined. Remove old VM constants from cesfic port. Bump MSIZE to 256 on mipsco (the only one that wasn't already 256).
1.5	12-Feb-2002	thorpej	* For platforms which are already ELF, remove the definition of MACHINE_ARCH since <arm/param.h> already sets it correctly to "arm". * For platforms which are not yet ELF, defined MACHINE_ARCH to "arm32" if __ELF__ is not defined by the C preprocessor. * In <arm/param.h>, clarify the rules about when MACHINE and MACHINE_ARCH are defined, and to what. Also, for ELF platforms, int the non-_KERNEL case, force both MACHINE and MACHINE_ARCH to "arm", rather than allowing platform-specifc code to define either.
1.4	07-Aug-2001	bjh21	branches: 1.4.6; Add macros to hide the details of stack-pointer alignment.
1.3	14-Jul-2001	matt	Clarify when/where MACHINE & MACHINE_ARCH are defined. Add default user-visible definitions.
1.2	13-Jul-2001	matt	Move user-visible MBUF constant here. Define MAXPHYS. Include DEV_BSIZE
1.1	23-Jun-2001	bjh21	branches: 1.1.2; Add a common <arm/param.h>, containing those few things that are obviously common across all ARM systems.
1.1.2.3	16-Mar-2002	jdolecek	Catch up with -current.
1.1.2.2	25-Aug-2001	thorpej	Merge Aug 24 -current into the kqueue branch.
1.1.2.1	03-Aug-2001	lukem	update to -current
1.4.6.2	28-Feb-2002	nathanw	Catch up to -current.
1.4.6.1	07-Aug-2001	nathanw	file param.h was added on branch nathanw_sa on 2002-02-28 04:07:33 +0000
1.6.18.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.6.18.2	18-Sep-2004	skrll	Sync with HEAD.
1.6.18.1	03-Aug-2004	skrll	Sync with HEAD
1.9.16.1	30-Dec-2006	yamt	sync with head.
1.10.8.1	03-Sep-2006	yamt	sync with head.
1.10.4.1	09-Sep-2006	rpaulo	sync with head
1.11.68.1	19-Oct-2008	haad	Sync with HEAD.
1.11.64.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.11.62.2	11-Aug-2010	yamt	sync with head.
1.11.62.1	04-May-2009	yamt	sync with head.
1.11.58.1	28-Sep-2008	mjf	Sync with HEAD.
1.12.16.1	30-May-2010	rmind	sync with head
1.12.14.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.12.12.4	27-Mar-2014	matt	#define ALIGNBYTES __ALIGNBYTES
1.12.12.3	27-Mar-2014	matt	Make ALIGNBYTES use __ALIGNBYTES
1.12.12.2	15-Feb-2014	matt	Fix typo STACK_ALIGNBYTES -> STACKALIGNBYTES
1.12.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.13.12.1	18-Feb-2012	mrg	merge to -current.
1.13.8.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.13.8.2	30-Oct-2012	yamt	sync with head
1.13.8.1	17-Apr-2012	yamt	sync with head
1.15.4.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.17.2.3	03-Dec-2017	jdolecek	update from HEAD
1.17.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.17.2.1	23-Jun-2013	tls	resync from head
1.18.4.1	18-May-2014	rmind	sync with head
1.19.6.1	05-Oct-2016	skrll	Sync with HEAD
1.20.16.1	10-Jun-2019	christos	Sync with HEAD
1.20.14.2	18-Jan-2019	pgoyette	Synch with HEAD
1.20.14.1	20-Oct-2018	pgoyette	Sync with head
1.23.6.1	01-Aug-2021	thorpej	Sync with HEAD.
1.29	29-Mar-2020	skrll	Support PMAP_FAULTINFO on arm
1.28	24-Jan-2018	skrll	branches: 1.28.4; Remove port-acorn26 OK core@
1.27	11-Jan-2013	matt	Don't include <machine/fp.h> since it no longer exists
1.26	26-Dec-2012	matt	Remove pcb_fpstate. Add pcb_kernel_vfp.
1.25	10-Dec-2012	matt	Rename pcb_sp/PCB_SP to pcb_ksp/PCB_KSP so that ipsec.c will compile.
1.24	16-Aug-2012	matt	branches: 1.24.2; small rototill. pcb_flags is dead. PCB_NOALIGNFLT is now in stored l_md.md_flags as MDLWP_NOALIGNFLT. This avoids a few loads of the PCB in exception handling. pcb_tf has been moved to l_md.md_tf. Again this avoids a lot of pcb references just to access or set this. It also means that pcb doesn't need to accessed by MI code. Move pcb_onfault to after the pcb union. Add pcb_sp macro to make code prettier. Add lwp_settrapframe(l, tf) to set the l_md.md_tf field. Use lwp_trapframe to access it (was process_frame but that name was changed in a previous commit). Kill off curpcb in acorn26. Kill the checks for curlwp being NULL. Move TRAP_USERMODE from arm32/fault.c to frame.h and a __PROG26 version. Replace tests for usermode with that macro.
1.23	14-Aug-2012	matt	Kill curpcb/ci_curpcb. Use device_t in cpu_info. Add ci_softc (where ci_curpcb was so cpu_info doesn't change).
1.22	12-Aug-2012	matt	Rework VFP support to use PCU. Add emulation of instruction which save/restore the VFP FPSCR. Add a sysarch hook to VFP FPSCR manipulation. [The emulation will be used by libc to store/fetch exception modes and rounding mode on a per-thread basis.]
1.21	08-Aug-2012	skrll	Update comment.
1.20	07-Apr-2011	matt	branches: 1.20.4; 1.20.12; Add a define for pcb_user_pid_rw
1.19	27-Apr-2008	matt	branches: 1.19.18; 1.19.22; 1.19.28; Merge kernel changes in matt-armv6 to HEAD.
1.18	15-Mar-2008	rearnsha	branches: 1.18.2; 1.18.4; VFP support.
1.17	19-Jan-2008	chris	branches: 1.17.2; 1.17.6; With the removal of IPKDB on arm, the undefined stack is only used to bounce into SVC32 mode, there is no per-process data stored on it. We can therefore use the undefined stack setup by the platform machdep.c as a system wide undefined stack. This removes the need for a per-process undefined stack, and the processor mode switching overhead it causes in cpu_switchto. The space freed in the USPACE is used to increase the per process kernel stack size.
1.16	17-Oct-2007	garbled	branches: 1.16.2; 1.16.8; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.15	15-Sep-2007	scw	ARM cpu_switchto() has been partially broken since yamt-idlelwp was merged as its cache/tlb management smarts relied too heavily on pre-merge context- switch behaviour. See PR kern/36548 for one manifestation of the breakage. To address this: - Ditch the shadow pmap variables in the PCB (pagedir, l1vec, dacr, cstate) as it was too easy for them to get out of sync with the pmap. - Re-write (and fix) the convoluted cpuswitch.S cache/tlb ASM code in C. It's only slightly less efficient, but is much more readable/maintainable. - Document cpufuncs.cf_context_switch() as being C-callable. - pmap_activate() becomes a no-op if the lwp's vmspace is already active. (Good performance win, since pmap_activate() is now invoked on every context-switch, even though ARM's cpu_switchto() already does all the grunt work) XXX: Some CPU-specific armXX_context_switch() implementations (arm67, arm7tdmi, arm8) always flush the I+D caches. This should not be necessary. Someone with access to hardware (acorn32?) needs to deal with this.
1.14	04-Mar-2007	christos	branches: 1.14.2; 1.14.10; 1.14.16; 1.14.18; 1.14.20; 1.14.22; Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
1.13	27-Sep-2006	manu	branches: 1.13.4; - Document COMPAT_15 as doing nothing - Add COMPAT_15 to all the kernel that had COMPAT_14, for the sake of coherency - Remove the only occurences of #ifdef COMPAT_15 in the tree: for the ARM ports, COMPAT_15 was always used in conjunction with EXEC_AOUT. Only EXEC_AOUT matters here. This address kern/18407
1.12	11-Dec-2005	christos	branches: 1.12.20; 1.12.22; merge ktrace-lwp.
1.11	25-Oct-2003	scw	branches: 1.11.16; Enable alignment faults on arm32 for both kernel and userland. If COMPAT_15 and EXEC_AOUT are defined, support per-process alignment checking where AFLTs are always enabled when running kernel code and userland ELF binaries, and dynamically disabled/ enabled when switching to/from a.out binaries. This is necessary in order to execute older a.out binaries, where gcc made deliberate use of misaligned loads under certain circumstances.
1.10	13-Oct-2003	scw	Document the need for pcb32_r8 to be quad-aligned, now that cpuswitch() uses Xscale's "strd" instruction.
1.9	21-May-2003	thorpej	branches: 1.9.2; Remove #ifdefs supporting the old pmap, switching fully to the new.
1.8	18-Apr-2003	scw	Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems. Some features of the new pmap are: - It allows L1 descriptor tables to be shared efficiently between multiple processes. A typical "maxusers 32" kernel, where NPROC is set to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily with just 4 L1s. This completely solves the problem of running out of contiguous physical memory for allocating new L1s at runtime on a busy system. - Much improved cache/TLB management "smarts". This change ripples out to encompass the low-level context switch code, which is also much smarter about when to flush the cache/TLB, and when not to. - Faster allocation of L2 page tables and associated metadata thanks, in part, to the pool_cache enhancements recently contributed to NetBSD by Wasabi Systems. - Faster VM space teardown due to accurate referenced tracking of L2 page tables. - Better/faster cache-alias tracking. The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel config file, and making the necessary changes to the port-specific initarm() function. Several ports have already been converted and will be committed shortly.
1.7	23-Feb-2003	thorpej	Change pcb32_pagedir to a paddr_t (after all, it's used as a paddr_t everywhere in the code).
1.6	19-Oct-2002	bjh21	branches: 1.6.2; Undo recent cpu_switch register usage changes in order to decrease nathanw_sa merge pain.
1.5	18-Oct-2002	bjh21	In cpu_switch(), stack more registers at the start of the function, and hence save fewer into the PCB. This should give me enough free registers in cpu_switch to tidy things up and support MULTIPROCESSOR properly. While we're here, make the stacked registers into an APCS stack frame, so that DDB backtraces through cpu_switch() will work. This also affects cpu_fork(), which has to fabricate a switchframe and PCB for the new process.
1.4	12-Oct-2002	bjh21	Move curpcb into struct cpu_info in MULTIPROCESSOR kernels.
1.3	23-Nov-2001	thorpej	- Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.2	09-Sep-2001	toshii	branches: 1.2.2; 1.2.6; Don't define pcb_* register macros. pcb_sp macro conflicts with sys/netinet6/ipsec.c.
1.1	03-Sep-2001	matt	branches: 1.1.2; Add a merged <pcb.h> for arm26/arm32.
1.1.2.1	01-Oct-2001	fvdl	Catch up with -current.
1.2.6.3	18-Oct-2002	nathanw	Catch up to -current.
1.2.6.2	08-Jan-2002	nathanw	Catch up to -current.
1.2.6.1	09-Sep-2001	nathanw	file pcb.h was added on branch nathanw_sa on 2002-01-08 00:23:11 +0000
1.2.2.3	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.2.2.2	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.2.1	09-Sep-2001	thorpej	file pcb.h was added on branch kqueue on 2001-09-13 01:13:10 +0000
1.6.2.2	19-Oct-2002	bjh21	Re-do the following revisions, this time on a branch where they won't interfere with the nathanw_sa merge: syssrc/sys/arch/arm/arm32/cpuswitch.S 1.26 syssrc/sys/arch/arm/arm32/genassym.cf 1.18 syssrc/sys/arch/arm/arm32/vm_machdep.c 1.21 syssrc/sys/arch/arm/include/pcb.h 1.5 Original commit message: In cpu_switch(), stack more registers at the start of the function, and hence save fewer into the PCB. This should give me enough free registers in cpu_switch to tidy things up and support MULTIPROCESSOR properly. While we're here, make the stacked registers into an APCS stack frame, so that DDB backtraces through cpu_switch() will work. This also affects cpu_fork(), which has to fabricate a switchframe and PCB for the new process.
1.6.2.1	19-Oct-2002	bjh21	file pcb.h was added on branch bjh21-hydra on 2002-10-19 11:59:37 +0000
1.9.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.9.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.9.2.1	03-Aug-2004	skrll	Sync with HEAD
1.11.16.5	17-Mar-2008	yamt	sync with head.
1.11.16.4	21-Jan-2008	yamt	sync with head
1.11.16.3	27-Oct-2007	yamt	sync with head.
1.11.16.2	03-Sep-2007	yamt	sync with head.
1.11.16.1	30-Dec-2006	yamt	sync with head.
1.12.22.1	22-Oct-2006	yamt	sync with head
1.12.20.1	18-Nov-2006	ad	Sync with head.
1.13.4.1	12-Mar-2007	rmind	Sync with HEAD.
1.14.22.3	23-Mar-2008	matt	sync with HEAD
1.14.22.2	06-Nov-2007	matt	sync with HEAD
1.14.22.1	28-Aug-2007	matt	Add space in pcb32 for the armv6 coprocessor registers which store the two user thread/process ids (one is read-only, one is read-write by user).
1.14.20.3	21-Mar-2008	chris	Sync with head.
1.14.20.2	20-Jan-2008	chris	Sync to HEAD.
1.14.20.1	01-Jan-2008	chris	Sync with HEAD.
1.14.18.1	02-Oct-2007	joerg	Sync with HEAD.
1.14.16.2	28-Feb-2008	rjs	Sync with HEAD.
1.14.16.1	01-Nov-2007	rjs	Sync with HEAD.
1.14.10.1	03-Oct-2007	garbled	Sync with HEAD
1.14.2.1	09-Oct-2007	ad	Sync with head.
1.16.8.1	20-Jan-2008	bouyer	Sync with HEAD
1.16.2.1	18-Feb-2008	mjf	Sync with HEAD.
1.17.6.2	02-Jun-2008	mjf	Sync with HEAD.
1.17.6.1	03-Apr-2008	mjf	Sync with HEAD.
1.17.2.1	24-Mar-2008	keiichi	sync with head.
1.18.4.1	16-May-2008	yamt	sync with head.
1.18.2.1	18-May-2008	yamt	sync with head.
1.19.28.1	06-Jun-2011	jruoho	Sync with HEAD.
1.19.22.1	21-Apr-2011	rmind	sync with head
1.19.18.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.20.12.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.20.4.3	23-Jan-2013	yamt	sync with head
1.20.4.2	16-Jan-2013	yamt	sync with (a bit old) head
1.20.4.1	30-Oct-2012	yamt	sync with head
1.24.2.1	25-Feb-2013	tls	resync with head
1.28.4.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.18	13-Feb-2020	jmcneill	Add support for multiple GICv3 ITS domains.
1.17	08-Dec-2018	jmcneill	branches: 1.17.6; Add support for decoding PCI ID mappings using IO remapping tables (IORT).
1.16	16-Nov-2018	jmcneill	Add intr_establish_xname support to arm and expose it to intrctl
1.15	02-Nov-2018	jmcneill	Add support for multiple PCI segments.
1.14	21-Oct-2018	jmcneill	Add support for PCI MSI using ARM GICv2m.
1.13	06-Sep-2018	jmcneill	Define _PCI_HAVE_DMA64 for aarch64
1.12	19-Apr-2017	jmcneill	branches: 1.12.10; 1.12.12; Provide a pci_intr_setattr implementation. For chipset tags that don't implement pc_intr_setattr, simply return ENODEV.
1.11	16-Apr-2017	jmcneill	Add function ptr for pci_intr_setattr to struct arm32_pci_chipset
1.10	29-Mar-2014	christos	branches: 1.10.6; 1.10.10; 1.10.14; make pci_intr_string and eisa_intr_string take a buffer and a length instead of relying in local static storage.
1.9	06-Sep-2012	matt	branches: 1.9.2; 1.9.4; Change pci_conf_hook to pass pc->conf_v Add pci_conf_interrupt
1.8	02-Sep-2012	matt	Use device_t
1.7	04-Apr-2011	dyoung	branches: 1.7.4; 1.7.12; Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9), pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match predicate passed to pciide_compat_intr_establish() should ever modify their pci_attach_args argument, so make their pci_attach_args arguments const and deal with the fallout throughout the kernel. For the most part, these changes add a 'const' where there was no 'const' before, however, some drivers and MD code used to modify pci_attach_args. Now those drivers either copy their pci_attach_args and modify the copy, or refrain from modifying pci_attach_args: Xen: according to Manuel Bouyer, writing to pci_attach_args in pci_intr_map() was a leftover from Xen 2. Probably a bug. I stopped writing it. I have not tested this change. siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args. Probably a bug. I use a temporary variable. I have not tested this change. slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args. Probably a bug. Use a local pci_attach_args. I have not tested this change. viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the caller's pci_attach_args. Probably a bug. Make a local copy of the caller's pci_attach_args and modify the copy. I have not tested this change. While I'm here, make pci_mapreg_submap() static. With these changes in place, I have tested the compilation of these kernels: alpha GENERIC amd64 GENERIC XEN3_DOM0 arc GENERIC atari HADES MILAN-PCIIDE bebox GENERIC cats GENERIC cobalt GENERIC evbarm-eb NSLU2 evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200 KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425 evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3 evbmips64-el XLSATX evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266 OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT hp700 GENERIC i386 ALL XEN3_DOM0 XEN3_DOMU ibmnws GENERIC macppc GENERIC mvmeppc GENERIC netwinder GENERIC ofppc GENERIC prep GENERIC sandpoint GENERIC sgimips GENERIC32_IP2x sparc GENERIC_SUN4U KRUPS sparc64 GENERIC As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels with or without my patches in place: ### evbmips-el GDIUM nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop ### evbarm-el MPCSA_GENERIC src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc' ### ia64 GENERIC /tmp/genassym.28085/assym.c: In function 'f111': /tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb' /tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type ### sgimips GENERIC32_IP3x crmfb.o: In function `crmfb_attach': crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid' crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid' crmfb.c:(.text+0x234c): undefined reference to `edid_parse' crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse' crmfb.c:(.text+0x2354): undefined reference to `edid_print' crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
1.6	24-Oct-2008	matt	branches: 1.6.12; 1.6.16; 1.6.22; Add pci_conf_hook entry. Add pc_cfg_cmd cell for pci_conf_write optimization.
1.5	17-Mar-2008	kiyohara	branches: 1.5.4; 1.5.10; Enclose "#ifndef _ARM_PCI_MACHIDEP_H_".
1.4	11-Dec-2005	christos	branches: 1.4.50; 1.4.52; 1.4.72; 1.4.76; merge ktrace-lwp.
1.3	29-Jul-2004	drochner	branches: 1.3.12; remove now unnecessary "pci_enumerate_bus" definitions
1.2	15-May-2002	thorpej	branches: 1.2.12; Let machine-dependent code specify how to enumerate the bus. Currently, everyone uses pci_enumerate_bus_generic().
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.6; 1.1.10; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.10.1	20-Jun-2002	nathanw	Catch up to -current.
1.1.6.1	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file pci_machdep.h was added on branch thorpej_scsipi on 2001-03-12 13:27:23 +0000
1.2.12.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.12.2	18-Sep-2004	skrll	Sync with HEAD.
1.2.12.1	03-Aug-2004	skrll	Sync with HEAD
1.3.12.1	24-Mar-2008	yamt	sync with head.
1.4.76.2	17-Jan-2009	mjf	Sync with HEAD.
1.4.76.1	03-Apr-2008	mjf	Sync with HEAD.
1.4.72.1	24-Mar-2008	keiichi	sync with head.
1.4.52.1	23-Mar-2008	matt	sync with HEAD
1.4.50.1	21-Mar-2008	chris	Sync with head.
1.5.10.1	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.5.4.1	04-May-2009	yamt	sync with head.
1.6.22.1	06-Jun-2011	jruoho	Sync with HEAD.
1.6.16.1	21-Apr-2011	rmind	sync with head
1.6.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.7.12.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.7.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.7.4.1	30-Oct-2012	yamt	sync with head
1.9.4.1	18-May-2014	rmind	sync with head
1.9.2.2	03-Dec-2017	jdolecek	update from HEAD
1.9.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.10.14.1	21-Apr-2017	bouyer	Sync with HEAD
1.10.10.1	26-Apr-2017	pgoyette	Sync with HEAD
1.10.6.1	28-Aug-2017	skrll	Sync with HEAD
1.12.12.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.12.12.1	10-Jun-2019	christos	Sync with HEAD
1.12.10.3	26-Dec-2018	pgoyette	Sync with HEAD, resolve a few conflicts
1.12.10.2	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.12.10.1	30-Sep-2018	pgoyette	Ssync with HEAD
1.17.6.1	29-Feb-2020	ad	Sync with head.
1.3	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.2	01-Jul-2011	dyoung	branches: 1.2.2; 1.2.12; 1.2.16; #include <sys/bus.h> instead of <machine/bus.h>.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file pio.h was added on branch thorpej_scsipi on 2001-03-12 13:27:23 +0000
1.2.16.1	18-May-2014	rmind	sync with head
1.2.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.2.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2	26-Nov-2001	thorpej	Remove dummy includes.
1.1	29-Jul-2001	chris	branches: 1.1.2; 1.1.8; PR 13581 Add empty pmap.h and vmparam.h to make userland happier.
1.1.8.2	28-Feb-2002	nathanw	Catch up to -current.
1.1.8.1	29-Jul-2001	nathanw	file pmap.h was added on branch nathanw_sa on 2002-02-28 04:07:34 +0000
1.1.2.3	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.2.2	03-Aug-2001	lukem	update to -current
1.1.2.1	29-Jul-2001	lukem	file pmap.h was added on branch kqueue on 2001-08-03 04:11:01 +0000
1.4	12-Jul-2018	maxv	Remove the kernel PMC code. Sent yesterday on tech-kern@. This change: * Removes "options PERFCTRS", the associated includes, and the associated ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is good. * Removes the PMC code of ARM XSCALE. * Removes all the pmc.h files. They were all empty, except for ARM XSCALE. * Reorders the x86 PMC code not to rely on the legacy pmc.h file. The definitions are put in sysarch.h. * Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control and sys_pmc_get_info syscalls. They are marked as OBSOL in kern, netbsd32 and rump. * Removes the pmc_evid_t and pmc_ctr_t types. * Removes all the associated man pages. The sets are marked as obsolete.
1.3	09-Aug-2002	thorpej	branches: 1.3.2; 1.3.4; 1.3.6; 1.3.206; 1.3.208; * PMC_TYPE_I80200 -> PMC_CLASS_I80200 to reflect the terminology used in pmc(3). * Some minor namespace cleanup.
1.2	07-Aug-2002	thorpej	* XSCALE_PMC_TYPE_I80200 -> PMC_TYPE_I80200 * XSCALE_PMC_TYPE_CCNT -> PMC_TYPE_I80200_CCNT * XSCALE_PMC_TYPE_PMCx -> PMC_TYPE_I80200_PMCx Per discussion with Allen Briggs.
1.1	07-Aug-2002	briggs	Implement pmc(9) -- An interface to hardware performance monitoring counters. These counters do not exist on all CPUs, but where they do exist, can be used for counting events such as dcache misses that would otherwise be difficult or impossible to instrument by code inspection or hardware simulation. pmc(9) is meant to be a general interface. Initially, the Intel XScale counters are the only ones supported.
1.3.208.1	10-Jun-2019	christos	Sync with HEAD
1.3.206.1	28-Jul-2018	pgoyette	Sync with HEAD
1.3.6.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.3.6.1	09-Aug-2002	jdolecek	file pmc.h was added on branch kqueue on 2002-09-06 08:32:39 +0000
1.3.4.2	30-Aug-2002	gehenna	catch up with -current.
1.3.4.1	09-Aug-2002	gehenna	file pmc.h was added on branch gehenna-devsw on 2002-08-30 00:19:12 +0000
1.3.2.2	13-Aug-2002	nathanw	Catch up to -current.
1.3.2.1	09-Aug-2002	nathanw	file pmc.h was added on branch nathanw_sa on 2002-08-13 02:17:53 +0000
1.20	10-Feb-2024	andvar	Fix various typos in comments, log messages and documentation.
1.19	14-Aug-2020	skrll	Mirror the changes to aarch64 and - Switch to TPIDRPRW_IS_CURLWP, because curlwp is accessed much more often by MI code. It also makes curlwp preemption safe, - Make ASTs operate per-LWP rather than per-CPU, otherwise sometimes LWPs can see spurious ASTs (which doesn't cause a problem, it just means some time may be wasted). - Make sure ASTs are always set on the same CPU as the target LWP, and delivered via IPI if posted from a remote CPU so that they are resolved quickly. - Add some cache line padding to struct cpu_info. - Add a memory barrier in a couple of places where ci_curlwp is set. This is needed whenever an LWP that is resuming on the CPU could hold an adaptive mutex. The barrier needs to drain the CPU's store buffer, so that the update to ci_curlwp becomes globally visible before the LWP can resume and call mutex_exit().
1.18	31-Oct-2017	martin	Allow architectures to define a macro PROC_MACHINE_ARCH(P) and PROC_MACHINE_ARCH32(P) to override the value for sysctl hw.machine_arch (native and netbsd32 commpat resp.). Use these for arm and mips instead of the (not working, noisy, in case of arm) sysctl override and #ifdef __mips__ in architecture neutral code.
1.17	24-Feb-2014	christos	consistency in include protection
1.16	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.15	11-Sep-2013	matt	Add md_march and PROC0_MD_INITIALIZERS
1.14	23-Aug-2013	matt	Reap LWP_VFPUSED and use PCU internal tracking. Add bool vfp_used_p(void);
1.13	25-Dec-2012	matt	branches: 1.13.2; Fix comment. Add MDLWP_VFPINTR
1.12	16-Aug-2012	matt	branches: 1.12.2; small rototill. pcb_flags is dead. PCB_NOALIGNFLT is now in stored l_md.md_flags as MDLWP_NOALIGNFLT. This avoids a few loads of the PCB in exception handling. pcb_tf has been moved to l_md.md_tf. Again this avoids a lot of pcb references just to access or set this. It also means that pcb doesn't need to accessed by MI code. Move pcb_onfault to after the pcb union. Add pcb_sp macro to make code prettier. Add lwp_settrapframe(l, tf) to set the l_md.md_tf field. Use lwp_trapframe to access it (was process_frame but that name was changed in a previous commit). Kill off curpcb in acorn26. Kill the checks for curlwp being NULL. Move TRAP_USERMODE from arm32/fault.c to frame.h and a __PROG26 version. Replace tests for usermode with that macro.
1.11	12-Aug-2012	matt	Rework VFP support to use PCU. Add emulation of instruction which save/restore the VFP FPSCR. Add a sysarch hook to VFP FPSCR manipulation. [The emulation will be used by libc to store/fetch exception modes and rounding mode on a per-thread basis.]
1.10	14-Jan-2011	rmind	branches: 1.10.8; 1.10.16; Retire struct user, remove sys/user.h inclusions. Note sys/user.h header as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros. Various #include fixes and review by matt@.
1.9	21-Nov-2009	rmind	branches: 1.9.4; Use lwp_getpcb() on ARM (and acorn26/32), clean from struct user usage.
1.8	29-Aug-2008	matt	branches: 1.8.12; use uint32_t.
1.7	15-Mar-2008	rearnsha	branches: 1.7.4; 1.7.6; 1.7.10; VFP support.
1.6	05-Mar-2003	agc	branches: 1.6.18; 1.6.80; 1.6.82; 1.6.102; 1.6.106; Forward declare struct lwp as well as struct trapframe.
1.5	01-Mar-2003	thorpej	Do the syscall_plain/syscall_fancy dance on ARM. Shaves a fair number of cycles off the syscall overhead. Since all COMPAT_LINUX platforms now support __HAVE_SYSCALL_INTERN, garbage-collect the LINUX_SYSCALL_FUNCTION stuff.
1.4	17-Jan-2003	thorpej	Merge the nathanw_sa branch.
1.3	07-Aug-2002	briggs	Implement pmc(9) -- An interface to hardware performance monitoring counters. These counters do not exist on all CPUs, but where they do exist, can be used for counting events such as dcache misses that would otherwise be difficult or impossible to instrument by code inspection or hardware simulation. pmc(9) is meant to be a general interface. Initially, the Intel XScale counters are the only ones supported.
1.2	28-Feb-2001	bjh21	branches: 1.2.4; 1.2.6; 1.2.10; 1.2.18; PCB convergence, part the first: Move the pointer to the current user trapframe from struct mdproc to struct pcb (as on arm26). Only tested by compiling kernels on arm32 and hpcarm (dnard seems to be incomplete anyway). Someone should try running one.
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.18.1	30-Aug-2002	gehenna	catch up with -current.
1.2.10.3	31-Dec-2002	thorpej	Put PMC state into mdproc, not mdlwp; the PMC state should be per-proc. Per discussion with Allen Briggs.
1.2.10.2	13-Aug-2002	nathanw	Catch up to -current.
1.2.10.1	14-Nov-2001	thorpej	Garbage-collect the __spare0 and __spare1 fields from mdproc; they're not used (obivously), and the space doesn't really need to be reserved. This leaves us with an empty mdproc. Add an empty mdlwp.
1.2.6.1	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.2.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.2.4.1	28-Feb-2001	bouyer	file proc.h was added on branch thorpej_scsipi on 2001-03-12 13:27:23 +0000
1.6.106.2	28-Sep-2008	mjf	Sync with HEAD.
1.6.106.1	03-Apr-2008	mjf	Sync with HEAD.
1.6.102.1	24-Mar-2008	keiichi	sync with head.
1.6.82.1	23-Mar-2008	matt	sync with HEAD
1.6.80.1	21-Mar-2008	chris	Sync with head.
1.6.18.1	17-Mar-2008	yamt	sync with head.
1.7.10.1	19-Oct-2008	haad	Sync with HEAD.
1.7.6.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.7.4.2	11-Mar-2010	yamt	sync with head
1.7.4.1	04-May-2009	yamt	sync with head.
1.8.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.9.4.1	05-Mar-2011	rmind	sync with head
1.10.16.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.10.8.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.10.8.2	23-Jan-2013	yamt	sync with head
1.10.8.1	30-Oct-2012	yamt	sync with head
1.12.2.3	03-Dec-2017	jdolecek	update from HEAD
1.12.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.12.2.1	25-Feb-2013	tls	resync with head
1.13.2.2	18-May-2014	rmind	sync with head
1.13.2.1	28-Aug-2013	rmind	sync with head
1.18	24-Jan-2018	skrll	Remove port-acorn26 OK core@
1.17	11-Jan-2015	joerg	ARM has deprecated using both PC and LR in the register list of pop with ARMv6T2, so split the instructions up.
1.16	28-Nov-2014	skrll	branches: 1.16.2; Fix __mcount in the !(__ARM_EABI__) case by popping the right number of registers on exit.
1.15	13-Aug-2014	matt	Don't save r4 since we don't use it.
1.14	11-May-2014	joerg	branches: 1.14.2; Provide a non-EHABI version of the mcount glue.
1.13	30-Nov-2013	joerg	branches: 1.13.2; Like asm.h r1.25, don't use (PLT) anymore.
1.12	12-Sep-2013	joerg	Pass PICFLAGS down to cc-as-as and use __PIC__ to decide if it is small vs big PIC mode. Retire -DPIC and -DBIGPIC.
1.11	18-Aug-2013	matt	Don't use cfi ops in non EABI MCOUNT
1.10	16-Aug-2013	matt	__mcount is always arm code (even if compiled -mthumb). Add .cfi for unwind tables
1.9	15-Aug-2013	matt	Add an EABI ARM version of MCOUNT that doesn't do ARM26 compat. Add an EABI Thumb version of MCOUNT (doesn't do ARM26 compat either). Add .size to all MCOUNT
1.8	29-Aug-2008	matt	branches: 1.8.28; 1.8.38; 1.8.44; Remove non-__ELF__ snippets.
1.7	24-Dec-2005	perry	branches: 1.7.76; 1.7.80; 1.7.82; 1.7.86; __asm__ -> __asm __const__ -> const __inline__ -> inline __volatile__ -> volatile
1.6	14-Aug-2002	briggs	branches: 1.6.24; Inline SetCPSR calls where it seems prudent to do so. This avoids two branches and allows the compiler to better utilize registers around calls to disable/enable/restore_interrupts().
1.5	24-Mar-2002	bjh21	branches: 1.5.2; arm26->acorn26 transition.
1.4	23-Nov-2001	thorpej	Use <arm/cpufunc.h>, not <machine/cpufunc.h>.
1.3	16-Jul-2001	matt	branches: 1.3.6; Need to emit PLT magic for PIC ELF files.
1.2	04-May-2001	bjh21	branches: 1.2.2; Make the common <arm/profile.h> work on arm26 and arm32, choosing whether to munge R15 or not at runtime. Also make it work with both ELF and a.out.
1.1	23-Feb-2001	reinoud	branches: 1.1.2; 1.1.4; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file profile.h was added on branch thorpej_scsipi on 2001-03-12 13:27:23 +0000
1.1.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.2.2.4	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.2.2.3	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.2.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.2.2.1	03-Aug-2001	lukem	update to -current
1.3.6.4	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.3.6.3	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.3.6.2	08-Jan-2002	nathanw	Catch up to -current.
1.3.6.1	16-Jul-2001	nathanw	file profile.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.5.2.1	30-Aug-2002	gehenna	catch up with -current.
1.6.24.1	21-Jun-2006	yamt	sync with head.
1.7.86.1	19-Oct-2008	haad	Sync with HEAD.
1.7.82.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.7.80.1	04-May-2009	yamt	sync with head.
1.7.76.1	28-Sep-2008	mjf	Sync with HEAD.
1.8.44.2	18-May-2014	rmind	sync with head
1.8.44.1	28-Aug-2013	rmind	sync with head
1.8.38.2	03-Dec-2017	jdolecek	update from HEAD
1.8.38.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.8.28.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.13.2.1	10-Aug-2014	tls	Rebase.
1.14.2.2	02-Jun-2015	snj	Pull up following revision(s) (requested by joerg in ticket #813): sys/arch/arm/include/profile.h: revision 1.17 via patch ARM has deprecated using both PC and LR in the register list of pop with ARMv6T2, so split the instructions up.
1.14.2.1	01-Dec-2014	martin	Pull up following revision(s) (requested by skrll in ticket #273): sys/arch/arm/include/profile.h: revision 1.16 Fix __mcount in the !(__ARM_EABI__) case by popping the right number of registers on exit.
1.16.2.1	06-Apr-2015	skrll	Sync with HEAD
1.2	26-Nov-2001	thorpej	Remove Shark-specific header file.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.6; 1.1.10; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.10.1	28-Feb-2002	nathanw	Catch up to -current.
1.1.6.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file profileio.h was added on branch thorpej_scsipi on 2001-03-12 13:27:23 +0000
1.5	23-Nov-2001	thorpej	- Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.4	02-Nov-2001	rearnsha	branches: 1.4.2; Define L1_FPAGE for fine page entries in L1 page table.
1.3	27-Oct-2001	rearnsha	Export pte_cache_mode. Define PT_CACHEABLE in terms of it.
1.2	25-Jun-2001	chris	branches: 1.2.2; 1.2.6; Improve the vac_me_harder function, it is now slightly faster, however pmap_enter_pv is also now slightly slower, so they appear to balance out. Note that I've some ideas in the works on how to improve the pv handling, so the slow down is short term only. Also added non-advertising licence and copyright to myself and richard.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file pte.h was added on branch thorpej_scsipi on 2001-03-12 13:27:23 +0000
1.2.6.1	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.2.2.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.4.2.2	28-Feb-2002	nathanw	Catch up to -current.
1.4.2.1	02-Nov-2001	nathanw	file pte.h was added on branch nathanw_sa on 2002-02-28 04:07:34 +0000
1.17	14-Dec-2020	rin	Obsolete PT_STEP and friends, that have never been implemented. PT_STEP was exposed to userland for NetBSD 1.6 to 9, and PT_SETSTEP and PT_CLEARSTEP was for 8 to 9. Therefore, they cannot be reused for other purposes. PT_STEP was introduced to arm/ptrace.h rev 1.2: http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/arm/include/ptrace.h#rev1.2 This was for workaround against GDB, which assumes PT_STEP is 9 (even today!!), if it is undefined. But, this should have been dealt with differently...
1.16	01-Dec-2020	rin	Fix confusions related to encoding of instructions. For __ARMEB__ in BE8 mode, instructions are encoded in little-endian. Therefore, we need to swap bytes against these in native byte order. In other cases, i.e., __ARMEL__ and __ARMEB__ in BE32 mode, instructions are in native byte order, and we don't need to swap them.
1.15	18-Jun-2019	kamil	branches: 1.15.10; Introduce PTRACE_REG_FP() a helper macro to retrieve the frame pointer The macro is dummy for ia64 (the FP register is unknown and can change freely) and sparc/sparc64 (not stored in struct reg).
1.14	18-Jun-2019	skrll	Use UAL syntax for udf. NFCI.
1.13	17-Jun-2019	kamil	Define PTRACE_ILLEGAL_ASM for arm (32-bit) udf $0 is expected to raise SIGILL for all ARM 32-bit targets.
1.12	27-Dec-2017	christos	branches: 1.12.4; PR/52867: Martin Husemann: arm sofware breakpoint asm is slightly off ARM uses an undefined instruction to emulate a software breakpoint. However, the ptrace.h instruction on the one hand, and gdb/the kernel disagree on the exact value. This causes PTRACE_BREAKPOINT_ASM to generate a SIGILL instead of a SIGTRAP.
1.11	12-Apr-2017	kamil	Add new macro PTRACE_BREAKPOINT_ASM in <sys/ptrace.h> MD part This macro ships with a MD-specific assembly instruction triggering a software breakpoint. Missing instruction for powerpc targets. This code is used in ATF tests (lib/libc/sys/t_ptrace_wait). Original patch by Nick Hudson, thanks!
1.10	08-Apr-2017	kamil	Add new ptrace(2) API: PT_SETSTEP & PT_CLEARSTEP These operations allow to mark thread as a single-stepping one. This allows to i.a.: - single step and emit a signal (PT_SETSTEP & PT_CONTINUE) - single step and trace syscall entry and exit (PT_SETSTEP & PT_SYSCALL) The former is useful for debuggers like GDB or LLDB. The latter can be used to singlestep a usermode kernel. These examples don't limit use-cases of this interface. Define PT_*STEP only for platforms defining PT_STEP. Add new ATF tests setstep[1234]. These ptrace(2) operations first appeared in FreeBSD. Sponsored by <The NetBSD Foundation>
1.9	25-Nov-2016	christos	branches: 1.9.2; avoid macro confusion
1.8	25-Sep-2015	christos	branches: 1.8.2; For processors that have memory breakpoints, add macros for them to help libproc
1.7	15-Sep-2015	christos	Provide access to pc/sp/syscall-return registers like we have for mcontext
1.6	05-Dec-2012	matt	branches: 1.6.14; ARMFPE hasn't compiled since NetBSD 4. Remove it. Complete support for FPU_VFP. fpregs now contains vfpreg. XXX vfpreg only has space for 16 64-bit FP registers though VFPv3 and later have 32 64-bit FP registers.
1.5	25-Jan-2008	skrll	branches: 1.5.44; 1.5.54; Define PT_MACHDEP_STRINGS
1.4	11-Dec-2005	christos	branches: 1.4.46; 1.4.50; 1.4.52; 1.4.58; merge ktrace-lwp.
1.3	24-Mar-2004	ws	branches: 1.3.16; Fix Frank Lancaster's long standing broken license (after consulting with him).
1.2	19-Oct-2001	bjh21	branches: 1.2.4; 1.2.22; Make sure that PT_STEP is defined for userland, even though we don't support it in the kernel yet. If we don't do this, GDB arbitrarily assumes we wanted it to be 9, which is silly. In the kernel, leave it undefined so that sys_process.c doesn't generate code for it.
1.1	11-Feb-2001	bjh21	branches: 1.1.4; 1.1.6; Shared ARM ptrace(2) implementation. Mostly the same as the arm32 version, but with some #ifdefs for arm26. Also, don't define PT_STEP, since we don't implement it. This should reduce code size a little.
1.1.6.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	11-Feb-2001	bouyer	file ptrace.h was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000
1.2.22.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.22.2	18-Sep-2004	skrll	Sync with HEAD.
1.2.22.1	03-Aug-2004	skrll	Sync with HEAD
1.2.4.2	19-Oct-2001	bjh21	Make sure that PT_STEP is defined for userland, even though we don't support it in the kernel yet. If we don't do this, GDB arbitrarily assumes we wanted it to be 9, which is silly. In the kernel, leave it undefined so that sys_process.c doesn't generate code for it.
1.2.4.1	19-Oct-2001	bjh21	file ptrace.h was added on branch nathanw_sa on 2001-10-19 00:18:21 +0000
1.3.16.1	04-Feb-2008	yamt	sync with head.
1.4.58.1	18-Feb-2008	mjf	Sync with HEAD.
1.4.52.1	23-Mar-2008	matt	sync with HEAD
1.4.50.1	27-Jan-2008	chris	Sync to HEAD.
1.4.46.1	28-Feb-2008	rjs	Sync with HEAD.
1.5.54.2	03-Dec-2017	jdolecek	update from HEAD
1.5.54.1	25-Feb-2013	tls	resync with head
1.5.44.1	16-Jan-2013	yamt	sync with (a bit old) head
1.6.14.4	28-Aug-2017	skrll	Sync with HEAD
1.6.14.3	05-Dec-2016	skrll	Sync with HEAD
1.6.14.2	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.6.14.1	22-Sep-2015	skrll	Sync with HEAD
1.8.2.2	26-Apr-2017	pgoyette	Sync with HEAD
1.8.2.1	07-Jan-2017	pgoyette	Sync with HEAD. (Note that most of these changes are simply $NetBSD$ tag issues.)
1.9.2.1	21-Apr-2017	bouyer	Sync with HEAD
1.12.4.1	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.15.10.1	14-Dec-2020	thorpej	Sync w/ HEAD.
1.6	29-Jan-2014	matt	Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.5	11-Jan-2013	matt	branches: 1.5.2; Don't include <machine/fp.h> since it no longer exists
1.4	07-Dec-2012	matt	Extend vfpreg to include all 32 64-bit FP registers. For __ARM_EABI__, define __vfp_fstmx to have space for all 32 32-bit FP registers (It's a newly supported ABI so we can "break" binary compatibility.
1.3	05-Dec-2012	matt	ARMFPE hasn't compiled since NetBSD 4. Remove it. Complete support for FPU_VFP. fpregs now contains vfpreg. XXX vfpreg only has space for 16 64-bit FP registers though VFPv3 and later have 32 64-bit FP registers.
1.2	15-Mar-2008	rearnsha	branches: 1.2.38; 1.2.48; VFP support.
1.1	11-Feb-2001	bjh21	branches: 1.1.2; 1.1.44; 1.1.106; 1.1.108; 1.1.128; 1.1.132; Common <arm/reg.h> (and hence common struct reg) for ARM. This is theoretically backward-incompatible on arm26, but GDB doesn't work there yet anyway.
1.1.132.1	03-Apr-2008	mjf	Sync with HEAD.
1.1.128.1	24-Mar-2008	keiichi	sync with head.
1.1.108.1	23-Mar-2008	matt	sync with HEAD
1.1.106.1	21-Mar-2008	chris	Sync with head.
1.1.44.1	17-Mar-2008	yamt	sync with head.
1.1.2.2	11-Feb-2001	bouyer	Sync with HEAD.
1.1.2.1	11-Feb-2001	bouyer	file reg.h was added on branch thorpej_scsipi on 2001-02-11 19:08:51 +0000
1.2.48.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.2.48.1	25-Feb-2013	tls	resync with head
1.2.38.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2.38.2	23-Jan-2013	yamt	sync with head
1.2.38.1	16-Jan-2013	yamt	sync with (a bit old) head
1.5.2.1	18-May-2014	rmind	sync with head
1.10	29-Nov-2019	riastradh	Largely eliminate the MD rwlock.h header file. This was full of definitions that have been obsolete for over a decade. The file still remains for __HAVE_RW_STUBS but that's all. Used only internally in kern_rwlock.c now, not by <sys/rwlock.h>.
1.9	25-Feb-2015	joerg	branches: 1.9.18; Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.8	12-Jun-2014	ozaki-r	branches: 1.8.2; 1.8.4; Fix ARMv7 checks _ARM_ARCH_7 && !_ARM_ARCH_6 never be true.
1.7	28-Mar-2014	matt	branches: 1.7.2; Use dmb/dsb
1.6	29-Jan-2014	matt	Don't use _lock_cas explicitly, use atomic_cas_ulong which could be one its aliases.
1.5	28-Apr-2008	martin	branches: 1.5.34; 1.5.44; 1.5.50; Remove clause 3 and 4 from TNF licenses
1.4	29-Nov-2007	ad	branches: 1.4.14; 1.4.16; 1.4.18; - Change _lock_cas() to do compare-and-swap instead of compare-and-set. - Add aliases for atomic_cas_ulong() and friends.
1.3	21-Nov-2007	yamt	make kmutex_t and krwlock_t smaller by killing lock id. ok'ed by Andrew Doran.
1.2	09-Mar-2007	thorpej	branches: 1.2.2; 1.2.8; 1.2.16; 1.2.18; 1.2.20; 1.2.22; 1.2.26; 1.2.28; Use _lock_cas() instead of the interrupt-blocking atomic_cas().
1.1	18-Feb-2007	matt	branches: 1.1.2; 1.1.6; Add <arm/mutex.h> and <arm/rwlock.h> Add atomic_cas to <arm/atomic.h> for use by <rwlock.h>
1.1.6.3	12-Mar-2007	rmind	Sync with HEAD.
1.1.6.2	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.1.6.1	18-Feb-2007	yamt	file rwlock.h was added on branch yamt-idlelwp on 2007-02-27 16:49:36 +0000
1.1.2.4	07-Dec-2007	yamt	sync with head
1.1.2.3	03-Sep-2007	yamt	sync with head.
1.1.2.2	26-Feb-2007	yamt	sync with head.
1.1.2.1	18-Feb-2007	yamt	file rwlock.h was added on branch yamt-lazymbuf on 2007-02-26 09:05:59 +0000
1.2.28.1	08-Dec-2007	mjf	Sync with HEAD.
1.2.26.1	21-Nov-2007	bouyer	Sync with HEAD
1.2.22.1	09-Jan-2008	matt	sync with HEAD
1.2.20.1	01-Jan-2008	chris	Sync with HEAD.
1.2.18.2	03-Dec-2007	joerg	Sync with HEAD.
1.2.18.1	21-Nov-2007	joerg	Sync with HEAD.
1.2.16.1	26-Dec-2007	rjs	Sync with HEAD.
1.2.8.1	18-Apr-2007	thorpej	Remove _lock_cas() in favor of atomic_cas_32().
1.2.2.1	03-Dec-2007	ad	Sync with HEAD.
1.4.18.1	16-May-2008	yamt	sync with head.
1.4.16.1	18-May-2008	yamt	sync with head.
1.4.14.1	02-Jun-2008	mjf	Sync with HEAD.
1.5.50.1	18-May-2014	rmind	sync with head
1.5.44.2	03-Dec-2017	jdolecek	update from HEAD
1.5.44.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.5.34.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.7.2.1	10-Aug-2014	tls	Rebase.
1.8.4.1	06-Apr-2015	skrll	Sync with HEAD
1.8.2.1	27-May-2015	msaitoh	Pull up following revision(s) (requested by skrll in ticket #805): sys/arch/arm/include/arm32/pmap.h: revision 1.138 sys/arch/arm/arm/cpufunc.c: revision 1.151 sys/arch/arm/arm32/bus_dma.c: revision 1.90 sys/arch/arm/broadcom/bcm53xx_pax.c: revision 1.14 sys/arch/arm/arm32/bus_dma.c: revision 1.91 sys/arch/arm/samsung/exynos_space.c: revision 1.2 sys/arch/arm/arm32/db_machdep.c: revision 1.23 sys/arch/arm/allwinner/awin_space.c: revision 1.4 sys/arch/arm/include/rwlock.h: revision 1.9 sys/arch/arm/amlogic/amlogic_space.c: revision 1.2 sys/arch/arm/zynq/zynq_space.c: revision 1.2 sys/arch/arm/broadcom/bcm2835_space.c: revision 1.7 sys/arch/arm/arm32/pmap.c: revision 1.317 sys/arch/arm/include/locore.h: revision 1.19 sys/arch/arm/include/mutex.h: revision 1.20 sys/arch/arm/include/lock.h: revision 1.31 sys/arch/arm/include/lock.h: revision 1.32 sys/arch/arm/broadcom/bcmgen_space.c: revision 1.5 - Kill redundant semicolons. - Indentation. - Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.9.18.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.6	06-May-2024	skrll	Improve the comment.
1.5	11-Jan-2013	matt	Remove FPA support and replace with VFP. (happily jmp_buf is large enough to store the needed VFP16 registers)
1.4	30-Jun-2011	wiz	branches: 1.4.2; 1.4.12; dependant -> dependent
1.3	29-Aug-2008	matt	Remove non-__ELF__ snippets.
1.2	25-Aug-2001	bjh21	branches: 1.2.6; 1.2.128; 1.2.132; 1.2.134; 1.2.138; Increase the size of a jmp_buf when using ELF, since this will be our last chance to do so for a while. We don't use the extra space yet, but VFP support is likely to need it.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.6; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.6.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file setjmp.h was added on branch thorpej_scsipi on 2001-01-10 19:02:08 +0000
1.2.138.1	19-Oct-2008	haad	Sync with HEAD.
1.2.134.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.2.132.1	04-May-2009	yamt	sync with head.
1.2.128.1	28-Sep-2008	mjf	Sync with HEAD.
1.2.6.2	25-Aug-2001	bjh21	Increase the size of a jmp_buf when using ELF, since this will be our last chance to do so for a while. We don't use the extra space yet, but VFP support is likely to need it.
1.2.6.1	25-Aug-2001	bjh21	file setjmp.h was added on branch nathanw_sa on 2001-08-25 14:46:00 +0000
1.4.12.1	25-Feb-2013	tls	resync with head
1.4.2.1	23-Jan-2013	yamt	sync with head
1.20	30-Oct-2021	thorpej	Fix the previous to only apply to the non-AArch64 case.
1.19	30-Oct-2021	thorpej	Define __HAVE_STRUCT_SIGCONTEXT regardless of its current visibility.
1.18	27-Oct-2021	thorpej	Make sigcontext13 visible only to _KERNEL. Make sigcontext visible only to _LIBC and _KERNEL.
1.17	26-Oct-2021	christos	Merge all MD __sigaction14_sigtramp.c copies into one: - sparc and sparc64 were not using version 0 sigcontext when there were no arguments in the signal version. This was probably a bug. - vax is using +1 the version numbers of the other archs. - Only hppa was defining __LIBC12_SOURCE__ so it was getting a working sigcontext before. all the other ports that supported sigcontext had the compat code disabled. [pointed out by thorpej, thanks!] If we want to remove sigcontext support from userland at least now there is less work to do so.
1.16	06-Oct-2021	skrll	More trailing whitespace
1.15	01-Apr-2018	ryo	Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.14	07-Jan-2017	christos	branches: 1.14.14; include <sys/sigtypes.h> for sigset_t
1.13	29-Jan-2014	matt	branches: 1.13.6; 1.13.10; Make multiple inclusion symbols always start with _ARM_ (not _ARM32_ or _MACHINE_).
1.12	30-Jun-2011	wiz	branches: 1.12.2; 1.12.12; 1.12.16; dependant -> dependent
1.11	19-Nov-2008	ad	Make the emulations, exec formats, coredump, NFS, and the NFS server into modules. By and large this commit: - shuffles header files and ifdefs - splits code out where necessary to be modular - adds module glue for each of the components - adds/replaces hooks for things that can be installed at runtime
1.10	11-Dec-2005	christos	branches: 1.10.76; 1.10.80; 1.10.86; 1.10.88; merge ktrace-lwp.
1.9	30-Dec-2004	joff	Always expose struct sigcontext instead of just #ifdef COMPAT_16.
1.8	10-May-2004	drochner	SIGTRAMP_VALID() should not pollute the user namespace
1.7	26-Mar-2004	drochner	nothing cares about __HAVE_SIGINFO anymore, so nuke it
1.6	25-Nov-2003	christos	bye, bye _MCONTEXT_TO_SIGCONTEXT and vice versa.
1.5	18-Oct-2003	briggs	Define SIGTRAMP_VALID(v).
1.4	05-Oct-2003	matt	Add SA_SIGINFO support for ARM (from Chris Gilbert).
1.3	28-Apr-2003	bjh21	branches: 1.3.2; Add a new feature-test macro, _NETBSD_SOURCE. If this is defined by the application, all NetBSD interfaces are made visible, even if some other feature-test macro (like _POSIX_C_SOURCE) is defined. <sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE, _POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve existing behaviour. This has two major advantages: + Programs that require non-POSIX facilities but define _POSIX_C_SOURCE can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS. + It makes most of the #ifs simpler, in that they're all now ORs of the various macros, rather than having checks for (!defined(_ANSI_SOURCE) \|\| !defined(_POSIX_C_SOURCE) \|\| !defined(_XOPEN_SOURCE)) all over the place. I've tried not to change the semantics of the headers in any case where _NETBSD_SOURCE wasn't defined, but there were some places where the current semantics were clearly mad, and retaining them was harder than correcting them. In particular, I've mostly normalised things so that _ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE, _XOPEN_SOURCE and _NETBSD_SOURCE in that order. Tested by building for vax, encouraged by thorpej, and uncontested in tech-userlevel for a week.
1.2	17-Jan-2003	thorpej	Merge the nathanw_sa branch.
1.1	13-Jan-2001	bjh21	branches: 1.1.2; 1.1.10; Move <machine/signal.h> into shared directory.
1.1.10.1	16-Jan-2003	thorpej	* Include <sys/sigtypes.h> rather than <sys/signal.h> in <sys/ucontext.h>. * Define _UCONTEXT_TO_SIGCONTEXT() and _SIGCONTEXT_TO_UCONTEXT() macros for converting a ucontext -> sigcontext and back again. These macros in turn use machine-dependent macros _MCONTEXT_TO_SIGCONTEXT() and _SIGCONTEXT_TO_MCONTEXT() provided by <machine/signal.h>. The conversion process is not 100% accurate, but should be close enough. Also note that the mcontext conversion may not be enough for all platforms (m68k is a good example of this). These macros should be used only if you really know what you're doing.
1.1.2.2	13-Jan-2001	bjh21	Move <machine/signal.h> into shared directory.
1.1.2.1	13-Jan-2001	bjh21	file signal.h was added on branch thorpej_scsipi on 2001-01-13 17:02:38 +0000
1.3.2.4	17-Jan-2005	skrll	Sync with HEAD.
1.3.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.3.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.3.2.1	03-Aug-2004	skrll	Sync with HEAD
1.10.88.1	19-Jan-2009	skrll	Sync with HEAD.
1.10.86.1	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.10.80.1	04-May-2009	yamt	sync with head.
1.10.76.1	17-Jan-2009	mjf	Sync with HEAD.
1.12.16.1	18-May-2014	rmind	sync with head
1.12.12.2	03-Dec-2017	jdolecek	update from HEAD
1.12.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.12.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.13.10.1	20-Mar-2017	pgoyette	Sync with HEAD
1.13.6.1	05-Feb-2017	skrll	Sync with HEAD
1.14.14.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.1	23-Jul-2014	alnsn	branches: 1.1.2; 1.1.6; Rename sljitarch.h to sljit_machdep.h.
1.1.6.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.1.6.1	23-Jul-2014	tls	file sljit_machdep.h was added on branch tls-maxphys on 2014-08-20 00:02:46 +0000
1.1.2.2	10-Aug-2014	tls	Rebase.
1.1.2.1	23-Jul-2014	tls	file sljit_machdep.h was added on branch tls-earlyentropy on 2014-08-10 06:53:51 +0000
1.3	23-Jul-2014	alnsn	Rename sljitarch.h to sljit_machdep.h.
1.2	22-Jul-2014	alnsn	Add parentheses around macro arguments.
1.1	17-Jun-2014	alnsn	Add sljit support to arm.
1.5	27-Apr-2008	matt	Merge kernel changes in matt-armv6 to HEAD.
1.4	03-Dec-2007	ad	branches: 1.4.14; 1.4.16; 1.4.18; Interrupt handling changes, in discussion since February: - Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
1.3	22-Feb-2007	matt	branches: 1.3.4; 1.3.18; 1.3.20; 1.3.22; 1.3.24; 1.3.30; Fix lossage from boolean_t -> bool and updated x86 bus_dma.
1.2	18-Feb-2007	matt	Add __HAVE_GENERIC_SOFT_INTERRUPTS support for shark. This was done by extenting the current arm generic intrs to support softintrs. Add IPL_SOFTCLOCK, IPL_SOFTNET, IPL_SOFTSERIAL.
1.1	29-Jan-2002	thorpej	branches: 1.1.2; 1.1.4; 1.1.38; 1.1.76; Move the generic ARM soft interrupt code into a generic place.
1.1.76.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.1.38.2	07-Dec-2007	yamt	sync with head
1.1.38.1	26-Feb-2007	yamt	sync with head.
1.1.4.2	28-Feb-2002	nathanw	Catch up to -current.
1.1.4.1	29-Jan-2002	nathanw	file softintr.h was added on branch nathanw_sa on 2002-02-28 04:07:34 +0000
1.1.2.2	11-Feb-2002	jdolecek	Sync w/ -current.
1.1.2.1	29-Jan-2002	jdolecek	file softintr.h was added on branch kqueue on 2002-02-11 20:07:20 +0000
1.3.30.1	08-Dec-2007	mjf	Sync with HEAD.
1.3.24.2	28-Jan-2008	matt	Since softints are mainly MI, this file isn't needed anymore.
1.3.24.1	09-Jan-2008	matt	sync with HEAD
1.3.22.2	01-Jan-2008	chris	Sync with HEAD.
1.3.22.1	11-Aug-2007	chris	Initial check-in of reworked arm interrupt routines. Main things to note on this branch: * spl routines are inlined, less complex, and small (kernel drops in size) * interrupts are handled in priority order (for most things it doesn't matter, but pending ipls are used to determine if there is any work to do) * arm_irqhandler.c is derived from footbridge_irqhandler.c, which was based on work by thorpej. * The code tries to touch hardware as little as possible. * spl masks are no longer tracked, as the system is based on pending ipls The shared code uses global ipl lists to track which interrupt handlers are attached to which ipl (arm_iplq[]). Interrupt sources register with the common code to indicate: * how many irq lines they have * a function to set the hardware mask. * call arm_intr_claim and arm_intr_disestablish to setup handlers When an interrupt occurs the ipl is flagged as pending, in ipls_pending. If it can be handled at the current_ipl_level the code does so. If it can't be handled it's left until the current_ipl_level drops. As the ipl level changes down a quick test is made of the new ipl level against the ipls_pending value. If an ipl is pending arm_intr_splx_lifter is called to handle the pending ipls. It should be noted that all interrupts are left enabled at the hardware level, interrupts are only masked when they occur. They are only re-enabled after it's interrupt handler is called. Hardware masks are not changed at any other time. Soft interrupts are treated the same as hardware interrupts, they register as a provider, and do not get treated specially. All the soft interrupt handlers are placed onto the relevant global ipl queue, the same as hard interrupts handlers. At the moment only footbridge within a cats has been updated to use the new handling. Todo: * change the handling of interrupts, so that the hardware doesn't register a routine to fetch the hardware status. Instead is makes a call which provides the mask. This removes the primary flag when registering an interrupt provider. It also makes more sense with multiple interrupt sources. * Arm v5 has the clz asm, which could be used instead of the carefully hand rolled arm_intr_fls function. * switch cats isa support to use this framework. * switch iomd and acorn32 to use this framework. * switch shark to use this framework. * port any other arm platforms that are interested * examine overlaps between this code and ppcoea-renovation branch. * add support for different trigger types (Edge, level, pulse, etc) (note that iomd and shark currently touch hardware on every spl change, hence why they're targets to port)
1.3.20.1	09-Dec-2007	jmcneill	Sync with HEAD.
1.3.18.1	26-Dec-2007	rjs	Sync with HEAD.
1.3.4.1	03-Dec-2007	ad	Sync with HEAD.
1.4.18.1	16-May-2008	yamt	sync with head.
1.4.16.1	17-Jun-2008	yamt	fix merge botches
1.4.14.1	02-Jun-2008	mjf	Sync with HEAD.
1.12	17-Jul-2011	joerg	Retire varargs.h support. Move machine/stdarg.h logic into MI sys/stdarg.h and expect compiler to provide proper builtins, defaulting to the GCC interface. lint still has a special fallback. Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and derive va_list as required by standards.
1.11	01-Jul-2011	mrg	add GCC 4.5 support
1.10	21-Jun-2008	gmcgarry	Add stdargs support for pcc.
1.9	11-Dec-2005	christos	branches: 1.9.76; 1.9.80; 1.9.82; 1.9.84; merge ktrace-lwp.
1.8	17-Feb-2005	he	In the __lint__ version of __builtin_va_arg(), apply the cast the user specified. Fixes build problem.
1.7	07-Aug-2003	agc	branches: 1.7.8; 1.7.10; Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.6	28-Apr-2003	bjh21	branches: 1.6.2; Add a new feature-test macro, _NETBSD_SOURCE. If this is defined by the application, all NetBSD interfaces are made visible, even if some other feature-test macro (like _POSIX_C_SOURCE) is defined. <sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE, _POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve existing behaviour. This has two major advantages: + Programs that require non-POSIX facilities but define _POSIX_C_SOURCE can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS. + It makes most of the #ifs simpler, in that they're all now ORs of the various macros, rather than having checks for (!defined(_ANSI_SOURCE) \|\| !defined(_POSIX_C_SOURCE) \|\| !defined(_XOPEN_SOURCE)) all over the place. I've tried not to change the semantics of the headers in any case where _NETBSD_SOURCE wasn't defined, but there were some places where the current semantics were clearly mad, and retaining them was harder than correcting them. In particular, I've mostly normalised things so that _ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE, _XOPEN_SOURCE and _NETBSD_SOURCE in that order. Tested by building for vax, encouraged by thorpej, and uncontested in tech-userlevel for a week.
1.5	08-Nov-2002	thorpej	Fix goof-ups in last (compiler used to test previously used a different file).
1.4	08-Nov-2002	thorpej	Adjust stdargs/varargs for GCC 3.x.
1.3	01-Jan-2002	thorpej	branches: 1.3.10; 1.3.12; Remove the call to abort(). We don't pull in a prototype for it, and there's no sane way to do so.
1.2	20-Dec-2001	thorpej	Use the correct version of va_arg() for _STANDALONE.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.6; 1.1.10; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.10.2	11-Nov-2002	nathanw	Catch up to -current
1.1.10.1	08-Jan-2002	nathanw	Catch up to -current.
1.1.6.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file stdarg.h was added on branch thorpej_scsipi on 2001-01-10 19:02:08 +0000
1.3.12.1	09-Nov-2002	bjh21	Catch up with -current.
1.3.10.2	11-Dec-2002	he	Pull up revision 1.5 (requested by thorpej in ticket #974): Fix error in previous.
1.3.10.1	11-Dec-2002	he	Pull up revision 1.4 (requested by thorpej in ticket #973): Adjust stdargs/varargs for GCC 3.x.
1.6.2.4	04-Mar-2005	skrll	Sync with HEAD. Hi Perry!
1.6.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.6.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.6.2.1	03-Aug-2004	skrll	Sync with HEAD
1.7.10.1	19-Mar-2005	yamt	sync with head. xen and whitespace. xen part is not finished.
1.7.8.1	29-Apr-2005	kent	sync with -current
1.9.84.1	27-Jun-2008	simonb	Sync with head.
1.9.82.1	23-Jun-2008	wrstuden	Sync w/ -current. 34 merge conflicts to follow.
1.9.80.1	04-May-2009	yamt	sync with head.
1.9.76.1	29-Jun-2008	mjf	Sync with HEAD.
1.1	13-Jan-2002	bjh21	branches: 1.1.2; 1.1.4; Add an <arm/swi.h>, containing symbolic names for SWI ranges.
1.1.4.2	28-Feb-2002	nathanw	Catch up to -current.
1.1.4.1	13-Jan-2002	nathanw	file swi.h was added on branch nathanw_sa on 2002-02-28 04:07:34 +0000
1.1.2.2	11-Feb-2002	jdolecek	Sync w/ -current.
1.1.2.1	13-Jan-2002	jdolecek	file swi.h was added on branch kqueue on 2002-02-11 20:07:21 +0000
1.15	06-Oct-2021	skrll	More trailing whitespace
1.14	13-Jan-2017	christos	this was fine before...
1.13	13-Jan-2017	maya	replace old style declaration
1.12	09-Mar-2015	joerg	branches: 1.12.2; Provide size_t.
1.11	16-Jan-2014	matt	branches: 1.11.6; Use uintptr_t & size_t instead of u_int and int for arm_sync_icache.
1.10	01-Feb-2013	matt	branches: 1.10.2; include stdbool.h if !_KERNEL
1.9	31-Jan-2013	matt	add a fpu_used sysarch
1.8	12-Aug-2012	matt	branches: 1.8.2; Rework VFP support to use PCU. Add emulation of instruction which save/restore the VFP FPSCR. Add a sysarch hook to VFP FPSCR manipulation. [The emulation will be used by libc to store/fetch exception modes and rounding mode on a per-thread basis.]
1.7	14-Mar-2009	dsl	branches: 1.7.12; 1.7.20; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.6	11-Dec-2005	christos	branches: 1.6.80; 1.6.88; 1.6.94; 1.6.98; merge ktrace-lwp.
1.5	11-Sep-2003	kleink	__{BEGIN,END}_DECLS-wrap prototypes.
1.4	30-Mar-2002	thorpej	branches: 1.4.12; Rename the ARM sysarch calls from arm32* -> arm*
1.3	29-Jul-2001	chris	branches: 1.3.2; 1.3.8; Fix for PR 13580. Make sysarch include sys/stdint.h so it picks up the a definition of uintptr_t.
1.2	23-Jul-2001	matt	Make sync_icache_args use more standard types.
1.1	14-Jul-2001	matt	Make <sysarch.h> valid for all arm platforms. Adjust/remove port-specific includes as required.
1.3.8.2	17-Apr-2002	nathanw	Catch up to -current.
1.3.8.1	29-Jul-2001	nathanw	file sysarch.h was added on branch nathanw_sa on 2002-04-17 00:02:30 +0000
1.3.2.3	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.3.2.2	03-Aug-2001	lukem	update to -current
1.3.2.1	29-Jul-2001	lukem	file sysarch.h was added on branch kqueue on 2001-08-03 04:11:01 +0000
1.4.12.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.12.2	18-Sep-2004	skrll	Sync with HEAD.
1.4.12.1	03-Aug-2004	skrll	Sync with HEAD
1.6.98.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.6.94.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.6.88.1	28-Apr-2009	skrll	Sync with HEAD.
1.6.80.1	04-May-2009	yamt	sync with head.
1.7.20.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.7.12.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.7.12.1	30-Oct-2012	yamt	sync with head
1.8.2.3	03-Dec-2017	jdolecek	update from HEAD
1.8.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.8.2.1	25-Feb-2013	tls	resync with head
1.10.2.1	18-May-2014	rmind	sync with head
1.11.6.1	06-Apr-2015	skrll	Sync with HEAD
1.12.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.10	01-Dec-2020	rin	Fix confusions related to encoding of instructions. For __ARMEB__ in BE8 mode, instructions are encoded in little-endian. Therefore, we need to swap bytes against these in native byte order. In other cases, i.e., __ARMEL__ and __ARMEB__ in BE32 mode, instructions are in native byte order, and we don't need to swap them.
1.9	15-Mar-2014	ozaki-r	branches: 1.9.42; Add breakpoint definitions for DTrace
1.8	19-Jan-2008	chris	branches: 1.8.44; 1.8.54; 1.8.60; Remove arm support for IPKDB. It hasn't worked since arm was broken out from arm32 in Jan 2001, and no-one has noticed or cared to fix it.
1.7	11-Dec-2005	christos	branches: 1.7.46; 1.7.50; 1.7.52; 1.7.58; 1.7.66; merge ktrace-lwp.
1.6	21-Aug-2004	rearnsha	branches: 1.6.12; Add a breakpoint instruction for Thumb.
1.5	21-May-2003	briggs	branches: 1.5.2; Use the GDB5 breakpoint value for the kernel breakpoint assembly statement since this value will be properly recognized by gdb_trapper(). Pointed out by bsh. Thanks!
1.4	28-Apr-2003	briggs	Add arm32 machine-specific remote kgdb support. Largely from PR port-arm/15530 by bsh@, but with some updates from me, including a fresh arm32/kgdb_machdep.c--ported from pc532.
1.3	18-Oct-2001	bjh21	branches: 1.3.4; Recognize GDB's default breakpoint instruction (as of GDB 5.0), in addition to the instruction we used with GDB 4.x. The new instruction has the advantage of fitting the pattern that ARM recommend using for instructions that need to stay undefined.
1.2	18-Jan-2001	bjh21	branches: 1.2.2; 1.2.6; A bit of extra discussion based on the latest ARM ARM.
1.1	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.2.6.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.2.2.2	18-Jan-2001	bjh21	A bit of extra discussion based on the latest ARM ARM.
1.2.2.1	18-Jan-2001	bjh21	file trap.h was added on branch thorpej_scsipi on 2001-01-18 20:42:04 +0000
1.3.4.2	18-Oct-2001	bjh21	Recognize GDB's default breakpoint instruction (as of GDB 5.0), in addition to the instruction we used with GDB 4.x. The new instruction has the advantage of fitting the pattern that ARM recommend using for instructions that need to stay undefined.
1.3.4.1	18-Oct-2001	bjh21	file trap.h was added on branch nathanw_sa on 2001-10-18 21:26:24 +0000
1.5.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.5.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.5.2.1	25-Aug-2004	skrll	Sync with HEAD.
1.6.12.1	21-Jan-2008	yamt	sync with head
1.7.66.1	20-Jan-2008	bouyer	Sync with HEAD
1.7.58.1	18-Feb-2008	mjf	Sync with HEAD.
1.7.52.1	23-Mar-2008	matt	sync with HEAD
1.7.50.1	20-Jan-2008	chris	Sync to HEAD.
1.7.46.1	28-Feb-2008	rjs	Sync with HEAD.
1.8.60.1	18-May-2014	rmind	sync with head
1.8.54.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.8.44.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.9.42.1	14-Dec-2020	thorpej	Sync w/ HEAD.
1.40	18-Jan-2020	skrll	Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) by creating a new pool l1ttpl for the userland L1 translation table which needs to be 8KB and 8KB aligned. Limit the pool to maxproc and add hooks to allow the sysctl changing of maxproc to adjust the pool. This comes at a 5% performance penalty for build.sh -j8 kernel on a Tegra TK1.
1.39	17-Jan-2020	skrll	Sort __HAVE_* defines
1.38	06-Apr-2019	thorpej	branches: 1.38.6; Overhaul the API used to fetch and store individual memory cells in userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(), subyte(), suword(), etc.) are retired and replaced with new ufetch(9) and ustore(9) APIs that can return proper error codes, etc. and are implemented consistently across all platforms. The interrupt-safe variants are no longer supported (and several of the existing attempts at fuswintr(), etc. were buggy and not actually interrupt-safe). Also augmement the ucas(9) API, making it consistently available on all plaforms, supporting uniprocessor and multiprocessor systems, even those that do not have CAS or LL/SC primitives. Welcome to NetBSD 8.99.37.
1.37	18-Oct-2018	skrll	Provide generic start code that assumes the MMU is off and caches are disabled as per the linux booting protocol for ARMv6 and ARMv7 boards. u-boot image type should be changed to 'linux' for correct behaviour. The new start code builds a minimal "bootstrap" L1PT with cached access disabled and uses the same table for all processors. AP startup is performed in less steps and more code is written in C. The bootstrap tables and stack are placed into an (orphaned) section "_init_memory" which is given to uvm when it is no longer used. Various kernels have been converted to use this code and tested. Some boards were provided by TNF. Thanks! The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS kernels. The GENERIC kernel will also work on RPI2 using u-boot. Thanks to martin@ and aymeric@ for testing on parallella and nanosoc respectively
1.36	10-Oct-2018	skrll	Trailing whitespace
1.35	12-Jul-2018	maxv	Remove the kernel PMC code. Sent yesterday on tech-kern@. This change: * Removes "options PERFCTRS", the associated includes, and the associated ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is good. * Removes the PMC code of ARM XSCALE. * Removes all the pmc.h files. They were all empty, except for ARM XSCALE. * Reorders the x86 PMC code not to rely on the legacy pmc.h file. The definitions are put in sysarch.h. * Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control and sys_pmc_get_info syscalls. They are marked as OBSOL in kern, netbsd32 and rump. * Removes the pmc_evid_t and pmc_ctr_t types. * Removes all the associated man pages. The sets are marked as obsolete.
1.34	27-Jan-2017	christos	branches: 1.34.12; 1.34.14; remove __HAVE_COMPAT_NETBSD32
1.33	26-Jan-2017	christos	provide __HAVE_COMPAT_NETBSD32 and fix multiple include protection consistently.
1.32	23-Jan-2016	christos	branches: 1.32.2; 1.32.4; expose the kernel types for standalone code.
1.31	23-Jan-2016	christos	Hide {p,v}{addr,size}_t and register_t (and a couple more types that are machine-specific) from userland unless _KERNEL/_KMEMUSER and a new _KERNTYPES variables is defined. The _KERNTYPES should be fixed for many subsystems that should not be using it (rump)...
1.30	27-Aug-2015	pooka	Fix PTHREAD_FOO_INITIALIZER for C++ by not using volatile in the relevant pthread types in C++ builds, attempt 2. The problem with attempt 1 was making assumptions of what the MD __cpu_simple_lock_t (declared volatile) looks like. To get a same type except non-volatile, we change the MD type to __cpu_simple_lock_nv_t and typedef __cpu_simple_lock_t as a volatile __cpu_simple_lock_nv_t. IMO, __cpu_simple_lock_t should not be volatile at all, but changing it now is too risky. Fixes at least Rumprun w/ gcc 5.1/5.2. Furthermore, the mpd application (and possibly others) will no longer require NetBSD-specific patches. Tested: build.sh for i386, Rumprun for x86_64 w/ gcc 5.2. Based on the patch from Christos in lib/49989.
1.29	13-Sep-2014	matt	branches: 1.29.2; vm_offset_t -> vaddr_t, vm_size_t -> vsize_t nuke vm_offset_t and vm_size_t
1.28	05-Aug-2014	skrll	Don't set __NO_STRICT_ALIGNMENT as armv[67] ldm/stm have alignment restrictions. PR/49020: Writing to tap device may cause panic on RPI Discussed with matt@
1.27	18-Apr-2014	matt	ARMv6+ platforms no longer have strict alignment requirements.
1.26	22-Feb-2014	matt	branches: 1.26.2; Define __HAVE_ATOMIC64_OPS if EABI && ARMv6 or later.
1.25	02-Jul-2013	matt	Add a tlb_asid_t.
1.24	07-May-2013	matt	branches: 1.24.2; Move #define __HAVE_OLD_DISKLABEL to <arm/types.h>
1.23	12-Aug-2012	matt	branches: 1.23.2; Rework VFP support to use PCU. Add emulation of instruction which save/restore the VFP FPSCR. Add a sysarch hook to VFP FPSCR manipulation. [The emulation will be used by libc to store/fetch exception modes and rounding mode on a per-thread basis.]
1.22	03-Aug-2012	matt	COMPAT_NETBSD32 support for ARM. Which is strange since ARM is already 32-bits. But the newer ARM ABI AAPCS changes the alignment of 64-bit fields so structures need to copied in and out to deal with the alignment change. This is a kludge but makes debugging of AAPCS support much easier.
1.21	18-Nov-2011	joerg	branches: 1.21.8; Hook up TLS support on ARM. Tested by martin@, kernel support from matt@
1.20	17-Jul-2011	dyoung	branches: 1.20.2; On ARM-ish ports having PCI support, use new-style <sys/bus.h>. Do not install <machine/bus.h>. Remove various <machine/bus.h> sources.
1.19	07-Apr-2011	matt	Add __lwp_getprivate_fast
1.18	22-Dec-2010	matt	branches: 1.18.2; Add a define __HAVE_CPU_DATA_FIRST which means that cpu_data is the first member in struct cpu_info.
1.17	11-Dec-2009	matt	branches: 1.17.4; Add PRIx{P,V}{ADDR,SIZE}, PRIu{P,V}SIZE, and PRIxREGISTER{,32,64} for all (except where they will be added via merge). These should be used to print {p,v}{addr,size}_t and register*_t as appropriate.
1.16	20-Jan-2008	joerg	branches: 1.16.10; 1.16.28; Now that __HAVE_TIMECOUNTER and __HAVE_GENERIC_TODR are invariants, remove the conditionals and the code associated with the undef case.
1.15	20-Jan-2008	joerg	Convert evbarm to timecounter. Only one of the systems was tested, the rest of the patch is compile-time tested only.
1.14	09-Mar-2007	thorpej	branches: 1.14.20; 1.14.28; 1.14.34; Make __cpu_simple_lock_t an unsigned char if _KERNEL, and operate on it using SWPB. Approved by Matt Thomas.
1.13	24-Dec-2005	perry	branches: 1.13.26; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.12	11-Dec-2005	christos	merge ktrace-lwp.
1.11	18-Jan-2004	martin	branches: 1.11.16; Do not export __HAVE_RAS to userland. Applications are supposed to try rasctl() and detect failure with EOPNOTSUPP.
1.10	26-Sep-2003	nathanw	Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h so that they can be used in a namespace-friendly way.
1.9	07-Aug-2003	agc	Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.8	28-Apr-2003	bjh21	branches: 1.8.2; Add a new feature-test macro, _NETBSD_SOURCE. If this is defined by the application, all NetBSD interfaces are made visible, even if some other feature-test macro (like _POSIX_C_SOURCE) is defined. <sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE, _POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve existing behaviour. This has two major advantages: + Programs that require non-POSIX facilities but define _POSIX_C_SOURCE can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS. + It makes most of the #ifs simpler, in that they're all now ORs of the various macros, rather than having checks for (!defined(_ANSI_SOURCE) \|\| !defined(_POSIX_C_SOURCE) \|\| !defined(_XOPEN_SOURCE)) all over the place. I've tried not to change the semantics of the headers in any case where _NETBSD_SOURCE wasn't defined, but there were some places where the current semantics were clearly mad, and retaining them was harder than correcting them. In particular, I've mostly normalised things so that _ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE, _XOPEN_SOURCE and _NETBSD_SOURCE in that order. Tested by building for vax, encouraged by thorpej, and uncontested in tech-userlevel for a week.
1.7	01-Mar-2003	thorpej	Do the syscall_plain/syscall_fancy dance on ARM. Shaves a fair number of cycles off the syscall overhead. Since all COMPAT_LINUX platforms now support __HAVE_SYSCALL_INTERN, garbage-collect the LINUX_SYSCALL_FUNCTION stuff.
1.6	07-Oct-2002	thorpej	Add support for restartable atomic sequences on 26-bit ARM. Compile tested only. Now that all ARM systems have RAS, move __HAVE_RAS from arm/arm32/types.h to arm/types.h.
1.5	07-Aug-2002	briggs	Implement pmc(9) -- An interface to hardware performance monitoring counters. These counters do not exist on all CPUs, but where they do exist, can be used for counting events such as dcache misses that would otherwise be difficult or impossible to instrument by code inspection or hardware simulation. pmc(9) is meant to be a general interface. Initially, the Intel XScale counters are the only ones supported.
1.4	28-Feb-2002	simonb	branches: 1.4.8; Use "#define<tab>".
1.3	28-Apr-2001	kleink	branches: 1.3.2; 1.3.8; * Move definitions of exact-width integer types from <machine/types.h> to <sys/types.h> and <sys/stdint.h>. * Add a new C99 <stdint.h> header, which provides integer types of explicit width, related limits and integer constant macros. * Extend <inttypes.h> to provide <stdint.h> definitions and format macros for printf() and scanf(). * Add C99 strtoimax() and strtoumax() functions. * Use the latter within scanf(). * Add C99 %j, %t and %z printf()/scanf() conversions for intmax_t, pointer-type and size_t arguments.
1.2	23-Feb-2001	bjh21	branches: 1.2.2; 1.2.4; __HAVE_NWSCONS and __HAVE_DEVICE_REGISTER are MACHINE-dependent.
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.2.4.1	23-Feb-2001	bouyer	file types.h was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000
1.2.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.3.8.4	18-Oct-2002	nathanw	Catch up to -current.
1.3.8.3	13-Aug-2002	nathanw	Catch up to -current.
1.3.8.2	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.3.8.1	28-Apr-2001	nathanw	file types.h was added on branch nathanw_sa on 2002-04-01 07:39:10 +0000
1.3.2.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.3.2.1	16-Mar-2002	jdolecek	Catch up with -current.
1.4.8.1	30-Aug-2002	gehenna	catch up with -current.
1.8.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.8.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.8.2.1	03-Aug-2004	skrll	Sync with HEAD
1.11.16.2	03-Sep-2007	yamt	sync with head.
1.11.16.1	21-Jun-2006	yamt	sync with head.
1.13.26.1	12-Mar-2007	rmind	Sync with HEAD.
1.14.34.2	23-Jan-2008	bouyer	Sync with HEAD.
1.14.34.1	20-Jan-2008	bouyer	Sync with HEAD
1.14.28.1	18-Feb-2008	mjf	Sync with HEAD.
1.14.20.1	27-Jan-2008	chris	Sync to HEAD.
1.16.28.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.16.10.1	11-Mar-2010	yamt	sync with head
1.17.4.2	21-Apr-2011	rmind	sync with head
1.17.4.1	05-Mar-2011	rmind	sync with head
1.18.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.20.2.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.20.2.2	30-Oct-2012	yamt	sync with head
1.20.2.1	17-Apr-2012	yamt	sync with head
1.21.8.2	28-Nov-2012	matt	Make __swp for the kernel return unsigned char and restore __cpu_simple_lock_t (match what -HEAD has).
1.21.8.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.23.2.3	03-Dec-2017	jdolecek	update from HEAD
1.23.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.23.2.1	23-Jun-2013	tls	resync from head
1.24.2.2	18-May-2014	rmind	sync with head
1.24.2.1	28-Aug-2013	rmind	sync with head
1.26.2.1	10-Aug-2014	tls	Rebase.
1.29.2.3	05-Feb-2017	skrll	Sync with HEAD
1.29.2.2	19-Mar-2016	skrll	Sync with HEAD
1.29.2.1	22-Sep-2015	skrll	Sync with HEAD
1.32.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.32.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.34.14.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.34.14.1	10-Jun-2019	christos	Sync with HEAD
1.34.12.2	20-Oct-2018	pgoyette	Sync with head
1.34.12.1	28-Jul-2018	pgoyette	Sync with HEAD
1.38.6.2	25-Jan-2020	ad	Sync with head.
1.38.6.1	17-Jan-2020	ad	Sync with head.
1.16	05-Dec-2021	msaitoh	s/existance/existence/ in comment.
1.15	31-Oct-2021	skrll	Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep. The AP initialisation code in cpu_init_secondary_processor will read and initialise the required system registers and state for the BP to attach and report. Rework the interrupt handler code for this new sequence. Thankfully, this removes a bunch of code for bcm2836mp. The VFP detection handler on <= armv7 relies on the global undefined handler being in place until the BP attaches vfp. That is, after the APs have been spun up. gicv3_its.c has a serialisation issue which is protected against in the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin lock. The serialisation issue needs addressing more completely. Tested on RPI3, Apple M1, QEMU, and lx2k Fixes PR port-arm/56264: diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3
1.14	27-Aug-2021	skrll	KNF a comment
1.13	17-Mar-2019	skrll	Trailing whitespace
1.12	14-Mar-2009	dsl	branches: 1.12.64; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.11	15-Mar-2008	rearnsha	branches: 1.11.4; 1.11.12; 1.11.18; VFP support.
1.10	11-Dec-2005	christos	branches: 1.10.50; 1.10.52; 1.10.72; 1.10.76; merge ktrace-lwp.
1.9	21-Aug-2004	rearnsha	branches: 1.9.12; Convert the coprocessor defines into an enum to avoid excessive preprocessor hackery. If supporting Thumb add an 18th undefined handler for undefined instruction traps taken in Thumb state. Kill MAX_COPROCS and use NUM_UNKNOWN_HANDLERS instead. Add support for breakpoints set in Thumb code and hand them off to GDB as required.
1.8	07-Aug-2004	rearnsha	Bah! Fix tyop CORE_UNKOWN_HANDLER -> CORE_UNKNOWN_HANDLER
1.7	07-Aug-2004	rearnsha	Add SYSTEM_COPROC (cp15).
1.6	07-Aug-2004	rearnsha	FP_COPROC* ->FPA_COPROC*
1.5	07-Aug-2004	rearnsha	Don't overload the unknown instruction handling for the core onto CP0. Instead, add a seventeenth 'co-processor' specifically for the core. Add support for ARMv5 unknown instructions in the 'NV' space.
1.4	20-Dec-2001	thorpej	branches: 1.4.18; * Share a common vector page between arm26 and arm32. * Use a common set of exception handlers for all arm32 platforms. * New FIQ framework based on discussions with Ben Harris, shared between arm26 and arm32.
1.3	16-Nov-2001	bjh21	Add prototypes for undefinedinstruction() and resethandler().
1.2	11-Mar-2001	bjh21	branches: 1.2.2; 1.2.4; 1.2.10; Change undefined instruction handler to use a linked list for each co-processor. This is necessary so we can have several handlers for CP0 (used as a catch-all for non-CP instructions). Handlers are now removed using remove_coproc_handler(), rather than by calling install_coproc_handler() with a NULL handler. Because install_coproc_handler() can now allocate memory, there's a version for use at boot time that doesn't.
1.1	23-Feb-2001	reinoud	branches: 1.1.2; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.2.10.2	08-Jan-2002	nathanw	Catch up to -current.
1.2.10.1	11-Mar-2001	nathanw	file undefined.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.2.4.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.2.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.2.2.1	11-Mar-2001	bouyer	file undefined.h was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000
1.4.18.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.18.3	18-Sep-2004	skrll	Sync with HEAD.
1.4.18.2	25-Aug-2004	skrll	Sync with HEAD.
1.4.18.1	12-Aug-2004	skrll	Sync with HEAD.
1.9.12.1	17-Mar-2008	yamt	sync with head.
1.10.76.1	03-Apr-2008	mjf	Sync with HEAD.
1.10.72.1	24-Mar-2008	keiichi	sync with head.
1.10.52.1	23-Mar-2008	matt	sync with HEAD
1.10.50.1	21-Mar-2008	chris	Sync with head.
1.11.18.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.11.12.1	28-Apr-2009	skrll	Sync with HEAD.
1.11.4.1	04-May-2009	yamt	sync with head.
1.12.64.1	10-Jun-2019	christos	Sync with HEAD
1.6	17-Jul-2011	joerg	Retire varargs.h support. Move machine/stdarg.h logic into MI sys/stdarg.h and expect compiler to provide proper builtins, defaulting to the GCC interface. lint still has a special fallback. Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and derive va_list as required by standards.
1.5	11-Dec-2005	christos	merge ktrace-lwp.
1.4	07-Aug-2003	agc	Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.3	08-Nov-2002	thorpej	branches: 1.3.6; Fix pasto. (Man, it's not my day today, is it...)
1.2	08-Nov-2002	thorpej	Adjust stdargs/varargs for GCC 3.x.
1.1	10-Jan-2001	bjh21	branches: 1.1.2; 1.1.10; 1.1.20; 1.1.22; Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.22.1	09-Nov-2002	bjh21	Catch up with -current.
1.1.20.2	14-Dec-2002	he	Pull up revision 1.3 (requested by he in ticket #1034): Fix pasto which caused compile problem.
1.1.20.1	11-Dec-2002	he	Pull up revision 1.2 (requested by thorpej in ticket #973): Adjust stdargs/varargs for GCC 3.x.
1.1.10.1	11-Nov-2002	nathanw	Catch up to -current
1.1.2.2	10-Jan-2001	bjh21	Header files which don't differ between arm32 and arm26 and can thus be shared.
1.1.2.1	10-Jan-2001	bjh21	file varargs.h was added on branch thorpej_scsipi on 2001-01-10 19:02:09 +0000
1.3.6.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.3.6.2	18-Sep-2004	skrll	Sync with HEAD.
1.3.6.1	03-Aug-2004	skrll	Sync with HEAD
1.17	07-Sep-2019	tnn	Cortex A12 is marketed as A17 but has a distinct part number observed on Rockchip RK3288
1.16	26-May-2017	jmcneill	branches: 1.16.10; Recognize Cortex-A57 FPU, GIC, and Generic Timer.
1.15	03-Mar-2016	skrll	Get the RPI3 working (in aarch32 mode) by recognising Cortex A53 CPUs. While I'm here add some A57/A72 info as well. My RPI3 works with FB console - the uart needs some help with its clocks.
1.14	09-Feb-2015	slp	Add VFP IDs for QEMU's emulated Cortex-A15.
1.13	18-Mar-2014	matt	branches: 1.13.4; 1.13.6; Enable VFP on MV88SV58XX
1.12	24-Feb-2014	christos	consistency in include protection
1.11	23-Jan-2014	skrll	Fix typo in #define name
1.10	02-Aug-2013	matt	Add VFP_FPSCR_{QC,AHP} bits
1.9	20-Jun-2013	matt	branches: 1.9.2; Add support for the Cortex-A15 Neon/VFP unit
1.8	12-Feb-2013	matt	More fully document FPEXC register
1.7	12-Feb-2013	matt	Fix some FPEXC bit definitions
1.6	22-Sep-2012	matt	Only use CPACR register for ARM11 and CORTEX cores. Add VFP ids for other CORTEX CPUs.
1.5	22-Sep-2012	matt	Before testing for VFP, make sure CP10 is enabled. (And CP11 for Neon too).
1.4	16-Aug-2012	matt	branches: 1.4.2; Already uses _C someplace, use _CSUM instead
1.3	15-Aug-2012	matt	Add macros for all of the E and C flags in the FPSCR.
1.2	11-Aug-2012	matt	Full expand FPEXC and FPSCR definitions
1.1	15-Mar-2008	rearnsha	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; 1.1.48; 1.1.56; VFP support.
1.1.56.1	21-Nov-2012	matt	Add aeabi.h, cpuconf.h, and vfpreg.h
1.1.48.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.1.48.1	30-Oct-2012	yamt	sync with head
1.1.10.2	03-Apr-2008	mjf	Sync with HEAD.
1.1.10.1	15-Mar-2008	mjf	file vfpreg.h was added on branch mjf-devfs2 on 2008-04-03 12:42:12 +0000
1.1.8.2	24-Mar-2008	keiichi	sync with head.
1.1.8.1	15-Mar-2008	keiichi	file vfpreg.h was added on branch keiichi-mipv6 on 2008-03-24 07:14:54 +0000
1.1.6.2	23-Mar-2008	matt	sync with HEAD
1.1.6.1	15-Mar-2008	matt	file vfpreg.h was added on branch matt-armv6 on 2008-03-23 02:03:55 +0000
1.1.4.2	21-Mar-2008	chris	Sync with head.
1.1.4.1	15-Mar-2008	chris	file vfpreg.h was added on branch chris-arm-intr-rework on 2008-03-21 13:34:41 +0000
1.1.2.2	17-Mar-2008	yamt	sync with head.
1.1.2.1	15-Mar-2008	yamt	file vfpreg.h was added on branch yamt-lazymbuf on 2008-03-17 09:14:15 +0000
1.4.2.5	03-Dec-2017	jdolecek	update from HEAD
1.4.2.4	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.4.2.3	23-Jun-2013	tls	resync from head
1.4.2.2	25-Feb-2013	tls	resync with head
1.4.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.9.2.2	18-May-2014	rmind	sync with head
1.9.2.1	28-Aug-2013	rmind	sync with head
1.13.6.3	28-Aug-2017	skrll	Sync with HEAD
1.13.6.2	19-Mar-2016	skrll	Sync with HEAD
1.13.6.1	06-Apr-2015	skrll	Sync with HEAD
1.13.4.1	26-Jul-2017	snj	Pull up following revision(s) (requested by jmcneill in ticket #1435): sys/arch/arm/arm32/cpu.c: 1.113 via patch sys/arch/arm/broadcom/bcm2835_bsc.c: 1.6 via patch sys/arch/arm/broadcom/bcm2835_plcom.c: 1.4 via patch sys/arch/arm/cortex/gtmr.c: 1.18 via patch sys/arch/arm/include/armreg.h: 1.110 via patch sys/arch/arm/include/vfpreg.h: 1.15 via patch sys/arch/arm/vfp/vfp_init.c: 1.50 via patch sys/arch/evbarm/rpi/rpi_machdep.c: 1.59, 1.70-1.72 via patch sys/arch/evbarm/rpi/vcprop.h: 1.16 Get the RPI3 working (in aarch32 mode) by recognising Cortex A53 CPUs. While I'm here add some A57/A72 info as well. My RPI3 works with FB console - the uart needs some help with its clocks. -- Do invalidate the cache as RPI2 build with Clang can't fetch the memory config otherwise. -- Use the VC property mailbox to request the UART clock rate and use it appropriately Newer firmwares use 48MHz -- Disable BSC0 on Raspberry Pi 3 and Zero W boards. -- Interrupts are enabled before the timer is configured. Ensure that the timer is disabled when attaching so it doesn't go crazy between the time interrupts are enabled and clocks are initialized. My RPI3 makes it multi-user now. -- Enable UART0 (PL011) on GPIO header for Raspberry Pi 3 / Zero W
1.16.10.1	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.2	12-Aug-2012	matt	Rework VFP support to use PCU. Add emulation of instruction which save/restore the VFP FPSCR. Add a sysarch hook to VFP FPSCR manipulation. [The emulation will be used by libc to store/fetch exception modes and rounding mode on a per-thread basis.]
1.1	15-Mar-2008	rearnsha	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; 1.1.48; 1.1.56; VFP support.
1.1.56.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.1.48.1	30-Oct-2012	yamt	sync with head
1.1.10.2	03-Apr-2008	mjf	Sync with HEAD.
1.1.10.1	15-Mar-2008	mjf	file vfpvar.h was added on branch mjf-devfs2 on 2008-04-03 12:42:12 +0000
1.1.8.2	24-Mar-2008	keiichi	sync with head.
1.1.8.1	15-Mar-2008	keiichi	file vfpvar.h was added on branch keiichi-mipv6 on 2008-03-24 07:14:54 +0000
1.1.6.2	23-Mar-2008	matt	sync with HEAD
1.1.6.1	15-Mar-2008	matt	file vfpvar.h was added on branch matt-armv6 on 2008-03-23 02:03:55 +0000
1.1.4.2	21-Mar-2008	chris	Sync with head.
1.1.4.1	15-Mar-2008	chris	file vfpvar.h was added on branch chris-arm-intr-rework on 2008-03-21 13:34:41 +0000
1.1.2.2	17-Mar-2008	yamt	sync with head.
1.1.2.1	15-Mar-2008	yamt	file vfpvar.h was added on branch yamt-lazymbuf on 2008-03-17 09:14:15 +0000
1.3	01-May-2013	matt	branches: 1.3.4; Add a default arm32 vmparam.h
1.2	26-Nov-2001	thorpej	branches: 1.2.102; Remove dummy includes.
1.1	29-Jul-2001	chris	branches: 1.1.2; 1.1.8; PR 13581 Add empty pmap.h and vmparam.h to make userland happier.
1.1.8.2	28-Feb-2002	nathanw	Catch up to -current.
1.1.8.1	29-Jul-2001	nathanw	file vmparam.h was added on branch nathanw_sa on 2002-02-28 04:07:34 +0000
1.1.2.3	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.2.2	03-Aug-2001	lukem	update to -current
1.1.2.1	29-Jul-2001	lukem	file vmparam.h was added on branch kqueue on 2001-08-03 04:11:01 +0000
1.2.102.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.3.4.2	23-Jun-2013	tls	resync from head
1.3.4.1	01-May-2013	tls	file vmparam.h was added on branch tls-maxphys on 2013-06-23 06:20:00 +0000
1.4	24-Jan-2013	matt	Use __W{CHAR,INT}_{MIN,MAX}__ if they are defined as well as __W{CHAR,INT}_UNSIGNED__ to determine W{CHAR,INT}_{MIN,MAX} values.
1.3	28-Apr-2008	martin	branches: 1.3.34; 1.3.44; Remove clause 3 and 4 from TNF licenses
1.2	11-Dec-2005	christos	branches: 1.2.76; 1.2.78; 1.2.80; merge ktrace-lwp.
1.1	08-May-2004	kleink	branches: 1.1.2; Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
1.1.2.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.1.2.3	18-Sep-2004	skrll	Sync with HEAD.
1.1.2.2	03-Aug-2004	skrll	Sync with HEAD
1.1.2.1	08-May-2004	skrll	file wchar_limits.h was added on branch ktrace-lwp on 2004-08-03 10:32:37 +0000
1.2.80.1	16-May-2008	yamt	sync with head.
1.2.78.1	18-May-2008	yamt	sync with head.
1.2.76.1	02-Jun-2008	mjf	Sync with HEAD.
1.3.44.1	25-Feb-2013	tls	resync with head
1.3.34.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.10	25-Oct-2014	skrll	Remove katelib.h and references to it. {Read,Write}{Word,Byte} macros are provided in the files that still use them. Someone(tm) should convert them to bus_space(9)
1.9	26-Nov-2002	lukem	branches: 1.9.158; Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.
1.8	23-Nov-2001	thorpej	- Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.7	22-Nov-2001	thorpej	Add 26-bit and 32-bit types.h files, which indicate the programming model in use for a given platform (__PROG26 vs __PROG32), then pulls in <arm/types.h>. Change each ARM port to pull in <arm/arm26/types.h> or <arm/arm32/types.h> as appropriate. Change all references to PROG26 and PROG32 to __PROG26 and __PROG32. Eliminate the opt_progmode.h header file.
1.6	03-Sep-2001	matt	branches: 1.6.6; Add a merged <pcb.h> for arm26/arm32.
1.5	14-Jul-2001	matt	Make <sysarch.h> valid for all arm platforms. Adjust/remove port-specific includes as required.
1.4	18-Jun-2001	bjh21	branches: 1.4.2; Move <arm/arm32/bus.h> to <arm/bus.h>, since it looks like it's going to be necessary on arm26 as well.
1.3	10-Mar-2001	rearnsha	branches: 1.3.2; Add param.h to INCS.
1.2	26-Feb-2001	reinoud	branches: 1.2.2; Putting the param.h back into the arm32 resp. hpcarm include directories
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.2.2	21-Jun-2001	nathanw	Catch up to -current.
1.2.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.3.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.3.2.1	10-Mar-2001	bouyer	file Makefile was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000
1.4.2.3	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.4.2.2	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.4.2.1	03-Aug-2001	lukem	update to -current
1.6.6.3	11-Dec-2002	thorpej	Sync with HEAD.
1.6.6.2	08-Jan-2002	nathanw	Catch up to -current.
1.6.6.1	03-Sep-2001	nathanw	file Makefile was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.9.158.1	03-Dec-2017	jdolecek	update from HEAD
1.1	10-Nov-2007	matt	branches: 1.1.2; file arm1136_pmc.h was initially added on branch matt-nb4-arm.
1.1.2.1	10-Nov-2007	matt	Add AT91 support from Sami Kantoluoto Add TI OMAP2430 support from Marty Fouts @ Danger Inc
1.4	18-Jun-2001	bjh21	branches: 1.4.8; Move <arm/arm32/bus.h> to <arm/bus.h>, since it looks like it's going to be necessary on arm26 as well.
1.3	07-Mar-2001	thorpej	branches: 1.3.2; Add the BUS_DMA_STREAMING flag.
1.2	04-Mar-2001	matt	branches: 1.2.2; s/vm_offset_t/vaddr_t/g
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.3.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.3.2.1	07-Mar-2001	bouyer	file bus.h was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000
1.4.8.2	18-Jun-2001	bjh21	Move <arm/arm32/bus.h> to <arm/bus.h>, since it looks like it's going to be necessary on arm26 as well.
1.4.8.1	18-Jun-2001	bjh21	file bus.h was added on branch nathanw_sa on 2001-06-18 21:37:34 +0000
1.10	03-Jul-2020	jmcneill	Move db_reset_cmd prototype to db_machdep.h (forgot to commit this file)
1.9	28-Mar-2014	matt	Make ddb_registers per-cpu. All switching of CPUs (xxx doesn't work yet).
1.8	01-Mar-2014	matt	Add db_show_tlb_cmd prototype
1.7	05-Jan-2013	christos	branches: 1.7.2; remove show panic cmd
1.6	21-Sep-2012	matt	Add a 'mach fault' command to print DFAR/DFSR/IFAR/IFSR/TTBR
1.5	14-Mar-2009	dsl	branches: 1.5.12; 1.5.20; 1.5.22; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.4	22-Feb-2007	matt	branches: 1.4.48; 1.4.56; 1.4.62; 1.4.66; Fix lossage from boolean_t -> bool and updated x86 bus_dma.
1.3	11-Dec-2005	christos	branches: 1.3.26; merge ktrace-lwp.
1.2	02-Jun-2005	uwe	branches: 1.2.2; Catch up with constification.
1.1	05-Jan-2002	chris	branches: 1.1.2; 1.1.4; 1.1.22; Make some of the arm32 files build with LOOSE_PROTOTYPES not set in the makefile. Turned up a few mismatched functions. Note that this isn't all of the arm32 files. Aim will be to get arm32 kernels built with LOOSE_PROTOTYPES not set.
1.1.22.1	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.1.4.2	11-Jan-2002	nathanw	More catchup.
1.1.4.1	05-Jan-2002	nathanw	file db_machdep.h was added on branch nathanw_sa on 2002-01-11 23:38:04 +0000
1.1.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.2.1	05-Jan-2002	thorpej	file db_machdep.h was added on branch kqueue on 2002-01-10 19:37:55 +0000
1.2.2.1	26-Feb-2007	yamt	sync with head.
1.3.26.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.4.66.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.4.62.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.4.56.1	28-Apr-2009	skrll	Sync with HEAD.
1.4.48.1	04-May-2009	yamt	sync with head.
1.5.22.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.5.22.2	25-Feb-2013	tls	resync with head
1.5.22.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.5.20.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.5.12.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.5.12.2	23-Jan-2013	yamt	sync with head
1.5.12.1	30-Oct-2012	yamt	sync with head
1.7.2.1	18-May-2014	rmind	sync with head
1.48	14-Aug-2020	skrll	Mirror the changes to aarch64 and - Switch to TPIDRPRW_IS_CURLWP, because curlwp is accessed much more often by MI code. It also makes curlwp preemption safe, - Make ASTs operate per-LWP rather than per-CPU, otherwise sometimes LWPs can see spurious ASTs (which doesn't cause a problem, it just means some time may be wasted). - Make sure ASTs are always set on the same CPU as the target LWP, and delivered via IPI if posted from a remote CPU so that they are resolved quickly. - Add some cache line padding to struct cpu_info. - Add a memory barrier in a couple of places where ci_curlwp is set. This is needed whenever an LWP that is resuming on the CPU could hold an adaptive mutex. The barrier needs to drain the CPU's store buffer, so that the update to ci_curlwp becomes globally visible before the LWP can resume and call mutex_exit().
1.47	28-Oct-2018	skrll	Consistency - NFC
1.46	28-Oct-2018	skrll	Remove magic number
1.45	07-Jul-2017	skrll	branches: 1.45.4; 1.45.6; Fixup the non-KDTRACE_HOOKS case of PUSHDTRACEGAP - we need to copy the stack pointer to r2.
1.44	07-Jul-2017	chs	split PUSHFRAMEINSVC into two pieces so that we can insert some additional instructions in the middle in undefinedinstruction_bounce, namely to add some additional space on the stack before the trapframe for undefineds from SVC mode. this extra space allows dtrace to emulate a "push" instruction. the initial version was from me and some improvements were from nick.
1.43	22-Jun-2017	skrll	Trailing whitespace
1.42	17-Apr-2015	matt	Put the clearing of ci_astpending back in frame.h while interrupts are disabled.
1.41	08-Apr-2015	matt	Don't clear CI_ASTPENDING in exception return, do it in ast() instead. Add basic support for __HAVE_PREEMPTION. Use atomic ops for ci_astpending if __HAVE_PREEMPTION is defined. Use kpreempt_disable/kpreempt_enable
1.40	08-Apr-2015	matt	CI_ASTPENDING is now a bitfield and low bit is for user ASTs.
1.39	26-Feb-2014	matt	branches: 1.39.6; Remove KERNEL_LOCK/KERNEL_UNLOCK
1.38	20-Dec-2013	matt	When restoring SPRSR, use spsr_fsxc not spsr_all so bits[23-8] are restored. This should fix use of simd instructions that rely on the GE bits.
1.37	02-Dec-2013	joerg	Don't use cpsr_all/spsr_all with mrs, it doesn't take a mask.
1.36	18-Aug-2013	matt	Use blx ip if _ARM_ARCH_5 prepare to get of switchframe
1.35	21-Oct-2012	matt	branches: 1.35.2; Change to use symbolic constants from assym.h and fix a typo in a comment.
1.34	21-Oct-2012	matt	Implement a "fast" path for IRQ handling out of the idle loop. Since we are in SVC32 already we only need to save a few registers. Processing is also simplified since we know we can't return to user-mode.
1.33	29-Aug-2012	matt	branches: 1.33.2; Use ARMV6+ cpsi{d,f} instructions whenever possible. Use r7 to hold previous mode and avoid recomputing it. Add support for obtaining kernel_lock on exception entry and exit.
1.32	25-Aug-2012	matt	Fix typo.
1.31	16-Aug-2012	matt	small rototill. pcb_flags is dead. PCB_NOALIGNFLT is now in stored l_md.md_flags as MDLWP_NOALIGNFLT. This avoids a few loads of the PCB in exception handling. pcb_tf has been moved to l_md.md_tf. Again this avoids a lot of pcb references just to access or set this. It also means that pcb doesn't need to accessed by MI code. Move pcb_onfault to after the pcb union. Add pcb_sp macro to make code prettier. Add lwp_settrapframe(l, tf) to set the l_md.md_tf field. Use lwp_trapframe to access it (was process_frame but that name was changed in a previous commit). Kill off curpcb in acorn26. Kill the checks for curlwp being NULL. Move TRAP_USERMODE from arm32/fault.c to frame.h and a __PROG26 version. Replace tests for usermode with that macro.
1.30	02-Aug-2012	skrll	Remove irqframe and replace with identical trapframe.
1.29	01-Aug-2012	matt	Move fill to between spsr and r0 so that the registers will be dword aligned. Adjust PUSH/PULL macros accordingly.
1.28	01-Aug-2012	matt	Shrink PUSHFRAMEINSVC by 4 more instructions.
1.27	31-Jul-2012	matt	Add code to make sure the trapframe is aligned to a doubleword boundary.
1.26	31-Jul-2012	matt	Only do the SA110 user register save workaround on kernel using SA110s.
1.25	31-Jul-2012	matt	Make trapframe/irqframe an even number of words (make adjustments for the filler word). Improve the comments in PUSH/PULL macros. Use the armv6+ CPS instruction if we can.
1.24	31-Jul-2012	matt	whitespace cleanup
1.23	18-Jan-2009	bjh21	branches: 1.23.14; 1.23.22; Now that GET_CURPCB and GET_CURCPU are generally available, use them unconditionally rather than rolling our own (often badly) all over the place.
1.22	17-Jan-2009	bjh21	Clear out the vestigial support for the Simtec Hydra board. Now that we're getting support for proper SMP ARMs, keeping non-functional support for a seriously crippled not-really-SMP system is likely to cause more problems than it's worth, even if it was fun for a while.
1.21	19-Nov-2008	matt	Fix __HAVE_FAST_SOFTINTS (boolean dyslexia strikes again). Add some KASSERTS to make sure assumptions are valid.
1.20	26-Oct-2008	matt	branches: 1.20.2; 1.20.8; Fix DO_PENDING_SOFTINTS (remove pasto, remove a branch, use movs) pasto spotted by mjf
1.19	07-Aug-2008	matt	Only call dosoftints() is ci_intr_depth == 0
1.18	07-Aug-2008	matt	Do fast softint processing in DO_AST_AND_RESTORE_ALIGNMENT_FAULTS. Redo the softint mask so ci_softints >> ci_cpl != 0 becomes an easy test for work to be done.
1.17	27-Apr-2008	matt	branches: 1.17.2; 1.17.6; Merge kernel changes in matt-armv6 to HEAD.
1.16	12-Jan-2008	skrll	branches: 1.16.6; 1.16.8; 1.16.10; Push a switchframe in dumpsys and cpu_switchto, but as dumpsys calls other funcs a switchframe needs to be a multiple of 8 bytes. Stash sp as well in the switchframe to bump it to 24bytes. Setup the switchframe appropriately in cpu_lwp_fork. Remove savectx - nothing uses it. All of this make gdb's life much easier when dealing with crash dumps and live kernels. Reviewd by chris.
1.15	09-Mar-2007	thorpej	branches: 1.15.8; 1.15.16; 1.15.20; 1.15.22; 1.15.28; 1.15.34; Rewrite the ARM mutex implementation to be of the simple-mutex variety. Because pre-v6 ARM lacks support for an atomic compare-and-swap, we implement _lock_cas() as a restartable atomic squence that is checked in the IRQ handler right before AST processing. (This is safe because, for all practical purposes, there are no SMP pre-v6 ARM systems.) This can serve as a model for other non-MP platforms that lack the necessary atomic operations for mutexes (SuperH, for example). Upshots of this change: - kmutex_t is now down to 8 bytes on ARM; about as good as we can get. - ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes. The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK. That is left as an exercise for the port maintainer. Reviewed and tested by Matt Thomas.
1.14	27-Sep-2006	manu	branches: 1.14.4; - Document COMPAT_15 as doing nothing - Add COMPAT_15 to all the kernel that had COMPAT_14, for the sake of coherency - Remove the only occurences of #ifdef COMPAT_15 in the tree: for the ARM ports, COMPAT_15 was always used in conjunction with EXEC_AOUT. Only EXEC_AOUT matters here. This address kern/18407
1.13	11-Dec-2005	christos	branches: 1.13.20; 1.13.22; merge ktrace-lwp.
1.12	11-Aug-2005	cube	Change all archs that did: #define clockframe somethingelse to: struct clockframe { struct somethingelse cf_se; }; and change access macros accordingly. That means that, at least for that very issue, things will not go ka-boomy if you don't have the actual definition of struct clockframe before including systm.h.
1.11	27-Apr-2004	scw	branches: 1.11.12; Always disable interrupts at the start of DO_AST_AND_RESTORE_ALIGNMENT_FAULTS. This addresses #2 of port-arm/23581 by Richard Earnshaw. Many thanks to Richard for spotting the cause of this problem.
1.10	15-Dec-2003	scw	branches: 1.10.2; The last cpsr_all change was misguided. Just use cpsr_c wherever possible.
1.9	01-Dec-2003	scw	- For consistency, use cpsr_all instead of cpsr. - Make sure IRQs are enabled before handling ASTs.
1.8	14-Nov-2003	scw	Slight re-org of the alignment/ast exit macro to better mimic the original behaviour WRT cpsr/I32_bit handling.
1.7	30-Oct-2003	scw	Move the alignment fault enable/disable code into macroes to avoid needless duplication. Additionally, merge AST handling into the same code. exception.S and the generic irq_dispatch.S routines have been updated to use the macroes. XXX: I have patches for the non-generic IRQ dispatch routines, but they need testing by someone with hardware.
1.6	23-Oct-2003	scw	Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop instead. With this change, we no longer need to save the current interrupt level in the switchframe. This is no great loss since both cpu_switch and cpu_switchto are always called at splsched, so the process' spl is effectively saved somewhere in the callstack. This fixes an evbarm problem reported by Allen Briggs: lwp gets into sa_switch -> mi_switch with newl != NULL when it's the last element on the runqueue, so it hits the second bit of: if (newl == NULL) { retval = cpu_switch(l, NULL); } else { remrunqueue(newl); cpu_switchto(l, newl); retval = 0; } mi_switch calls remrunqueue() and cpu_switchto() cpu_switchto unlocks the sched lock cpu_switchto drops CPU priority softclock is received schedcpu is called from softclock schedcpu hits the first if () {} block here: if (l->l_priority >= PUSER) { if (l->l_stat == LSRUN && (l->l_flag & L_INMEM) && (l->l_priority / PPQ) != (l->l_usrpri / PPQ)) { remrunqueue(l); l->l_priority = l->l_usrpri; setrunqueue(l); } else l->l_priority = l->l_usrpri; } Since mi_switch has already run remrunqueue, the LWP has been removed, but it's not been put back on any queue, so the remrunqueue panics.
1.5	19-Oct-2002	bjh21	branches: 1.5.2; 1.5.8; Undo recent cpu_switch register usage changes in order to decrease nathanw_sa merge pain.
1.4	18-Oct-2002	bjh21	In cpu_switch(), stack more registers at the start of the function, and hence save fewer into the PCB. This should give me enough free registers in cpu_switch to tidy things up and support MULTIPROCESSOR properly. While we're here, make the stacked registers into an APCS stack frame, so that DDB backtraces through cpu_switch() will work. This also affects cpu_fork(), which has to fabricate a switchframe and PCB for the new process.
1.3	14-Aug-2002	thorpej	Use cpsr_c rather then cpsr_all where appropriate.
1.2	31-Aug-2001	simonb	branches: 1.2.6; 1.2.14; Use comments around the token after a #endif.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.6; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.6.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.1.6.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file frame.h was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000
1.2.14.1	30-Aug-2002	gehenna	catch up with -current.
1.2.6.2	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.2.6.1	31-Aug-2001	thorpej	file frame.h was added on branch nathanw_sa on 2002-08-19 21:39:17 +0000
1.5.8.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.5.8.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.5.8.2	18-Sep-2004	skrll	Sync with HEAD.
1.5.8.1	03-Aug-2004	skrll	Sync with HEAD
1.5.2.2	19-Oct-2002	bjh21	Re-do the following revisions, this time on a branch where they won't interfere with the nathanw_sa merge: syssrc/sys/arch/arm/arm32/cpuswitch.S 1.26 syssrc/sys/arch/arm/arm32/genassym.cf 1.18 syssrc/sys/arch/arm/arm32/vm_machdep.c 1.21 syssrc/sys/arch/arm/include/pcb.h 1.5 Original commit message: In cpu_switch(), stack more registers at the start of the function, and hence save fewer into the PCB. This should give me enough free registers in cpu_switch to tidy things up and support MULTIPROCESSOR properly. While we're here, make the stacked registers into an APCS stack frame, so that DDB backtraces through cpu_switch() will work. This also affects cpu_fork(), which has to fabricate a switchframe and PCB for the new process.
1.5.2.1	19-Oct-2002	bjh21	file frame.h was added on branch bjh21-hydra on 2002-10-19 11:59:37 +0000
1.10.2.1	29-Apr-2004	jmc	Pullup rev 1.11 (requested by scw in ticket #209) Always disable interrupts at the start of DO_AST_AND_RESTORE_ALIGNMENT_FAULTS. PR#23581
1.11.12.4	21-Jan-2008	yamt	sync with head
1.11.12.3	03-Sep-2007	yamt	sync with head.
1.11.12.2	30-Dec-2006	yamt	sync with head.
1.11.12.1	21-Jun-2006	yamt	sync with head.
1.13.22.1	22-Oct-2006	yamt	sync with head
1.13.20.1	18-Nov-2006	ad	Sync with head.
1.14.4.1	12-Mar-2007	rmind	Sync with HEAD.
1.15.34.1	19-Jan-2008	bouyer	Sync with HEAD
1.15.28.1	18-Feb-2008	mjf	Sync with HEAD.
1.15.22.3	23-Mar-2008	matt	sync with HEAD
1.15.22.2	30-Aug-2007	matt	Move GET_CURCPU before the branch in ENABLE_ALIGNMENT_FAULTS.
1.15.22.1	28-Aug-2007	matt	Rototill to deal with curpcb/astpending/etc moves to cpu_info. Make ENABLE_ALIGNMENTS_FAULT leave cpu_info in r4. DO_AST_AND_RESTORE_ALIGNMENT_FAULTS takes advantage of r4 being cpu_info.
1.15.20.1	20-Jan-2008	chris	Sync to HEAD.
1.15.16.1	28-Feb-2008	rjs	Sync with HEAD.
1.15.8.1	18-Apr-2007	thorpej	Remove _lock_cas() in favor of atomic_cas_32().
1.16.10.2	04-May-2009	yamt	sync with head.
1.16.10.1	16-May-2008	yamt	sync with head.
1.16.8.1	18-May-2008	yamt	sync with head.
1.16.6.3	17-Jan-2009	mjf	Sync with HEAD.
1.16.6.2	28-Sep-2008	mjf	Sync with HEAD.
1.16.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.17.6.2	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.17.6.1	19-Oct-2008	haad	Sync with HEAD.
1.17.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.20.8.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.20.2.1	19-Jan-2009	skrll	Sync with HEAD.
1.23.22.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.23.14.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.23.14.1	30-Oct-2012	yamt	sync with head
1.33.2.3	03-Dec-2017	jdolecek	update from HEAD
1.33.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.33.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.35.2.2	18-May-2014	rmind	sync with head
1.35.2.1	28-Aug-2013	rmind	sync with head
1.39.6.2	28-Aug-2017	skrll	Sync with HEAD
1.39.6.1	06-Jun-2015	skrll	Sync with HEAD
1.45.6.1	10-Jun-2019	christos	Sync with HEAD
1.45.4.1	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.4	25-Oct-2014	skrll	Remove katelib.h and references to it. {Read,Write}{Word,Byte} macros are provided in the files that still use them. Someone(tm) should convert them to bus_space(9)
1.3	23-Nov-2001	thorpej	branches: 1.3.170; Use <arm/cpufunc.h>, not <machine/cpufunc.h>.
1.2	30-May-2001	bjh21	branches: 1.2.2; 1.2.8; Move the declarations of blockio.S functions from katelib.h to a new, exciting <arm/blockio.h>. katelib.h includes it for compatibility.
1.1	23-Feb-2001	reinoud	branches: 1.1.2; 1.1.4; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file katelib.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.1.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.2.8.2	08-Jan-2002	nathanw	Catch up to -current.
1.2.8.1	30-May-2001	nathanw	file katelib.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.2.2.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.3.170.1	03-Dec-2017	jdolecek	update from HEAD
1.36	02-Apr-2022	skrll	Update to support EFI runtime outside the kernel virtual address space by creating an EFI RT pmap that can be activated / deactivated when required. Adds support for EFI RT to ARM_MMU_EXTENDED (ASID) 32-bit Arm machines. On Arm64 the usage of pmapboot_enter is reduced and the mappings are created much later in the boot process -- now in cpu_startup_hook. Backward compatiblity for KVA mapped RT from old bootaa64.efi is maintained. Adding support to other platforms should be easier as a result.
1.35	28-Aug-2020	skrll	Some KASAN fixes and tweaks - don't access BSS variables when __md_early - centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new INIT_ARM_TOTAL_STACK - Only create L1PT entries in kasan_md_shadow_map_page if arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries) - Add some comments to explain what's going on
1.34	04-Jul-2020	skrll	Protect with #ifdef _KERNEL
1.33	05-Mar-2020	riastradh	Revert "Include opt_diagnostic.h for DIAGNOSTIC." This did not do what I thought it did. opt_diagnostic.h is only for the unused _DIAGNOSTIC, which seems like an abortive attempt to incrementally convert DIAGNOSTIC to an opt_*.h option rather than a command-line option.
1.32	05-Mar-2020	riastradh	Include opt_diagnostic.h for DIAGNOSTIC. ...at least, in header files, which may not have already included libkern.h.
1.31	15-Feb-2020	skrll	Various updates and improvements to cpu start up on arm/aarch64 - start sharing more code around the AP startup messaging. - call arm_cpu_topology_set early so that ci_core_id is available for drivers, e.g. bcm2835_intr.c - both arm and aarch64 now have - a static cpu_info_store array - the same arm_cpu_{hatched,mbox}
1.30	18-Dec-2019	riastradh	branches: 1.30.2; New function cpu_startup_hook on arm. Called at end of cpu_startup. Can be defined in, e.g., evbarm to do additional stuff after cpu_startup. Defined as a weak alias to a function that does nothing, so optional. ok jmcneill
1.29	16-Jul-2019	skrll	branches: 1.29.2; Consistently use vaddr_t as initarm and friends return type. Makes no difference to binaries except for aarch64 where it's required
1.28	03-Jan-2019	skrll	Start CPUs more like aarch64 by using a cpu_mpidr array (if populated) to map MPIDRs to an index for each CPU. Towards big.LITTLE support.
1.27	18-Oct-2018	skrll	Provide generic start code that assumes the MMU is off and caches are disabled as per the linux booting protocol for ARMv6 and ARMv7 boards. u-boot image type should be changed to 'linux' for correct behaviour. The new start code builds a minimal "bootstrap" L1PT with cached access disabled and uses the same table for all processors. AP startup is performed in less steps and more code is written in C. The bootstrap tables and stack are placed into an (orphaned) section "_init_memory" which is given to uvm when it is no longer used. Various kernels have been converted to use this code and tested. Some boards were provided by TNF. Thanks! The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS kernels. The GENERIC kernel will also work on RPI2 using u-boot. Thanks to martin@ and aymeric@ for testing on parallella and nanosoc respectively
1.26	05-Aug-2018	skrll	Refactor code to split aarch{32,64} kernel page tables and VM setup. This will help re-build the kernel page tables on aarch64 with correct section mappings.
1.25	05-Aug-2018	skrll	Expose kern_vtopdiff
1.24	03-Aug-2018	skrll	Provide and use kern_vtopdiff in KERN_{VTOPHYS,PHYSTOV}. A step towards generic arm.
1.23	01-Aug-2018	skrll	s/_ARM32_BOOT_MACHDEP_H_/_ARM32_MACHDEP_H_/ in multiple inclusion protection.
1.22	15-Jul-2018	maxv	Retire ipkdb entirely. The option was removed from the config files yesterday. ok kamil christos
1.21	20-Feb-2017	skrll	branches: 1.21.12; 1.21.14; Whitespace in comment
1.20	20-Feb-2017	skrll	Trailing whitespace
1.19	11-Nov-2015	jmcneill	branches: 1.19.2; 1.19.4; add support for optional RB_POWERDOWN handler
1.18	28-Mar-2014	matt	branches: 1.18.6; Change arm_cpu_mbox to volatile
1.17	20-Oct-2012	matt	branches: 1.17.2; Increase l2pts to accomodate large memory disks.
1.16	01-Sep-2012	martin	branches: 1.16.2; Backout previous, Matt fixed it differently
1.15	01-Sep-2012	martin	Move struct pv_addr next to struct bootmem_info into machdep.h and have pmap.h include that. Seems to be the least intrusive build fix; Matt: feel free to revamp.
1.14	31-Aug-2012	matt	Make cpu_reset, most of initarm and the kvm init code common. Add MP hooks for cpu_need_resced Add idlestck which is allocated in arm32_kvminit
1.13	29-Aug-2012	matt	Don't use locations in .data to store exception temporaries, use decidicated space in cpu_info instead. This also moves undefined_handler_address into cpu_info as well. Use the new armreg* inlines for getting TPIDRPRW register. Add MULTIPROCESSOR version of CPU_INFO_FOREACH
1.12	29-Aug-2012	matt	Since the PMC cycle counter is started in cpufunc no reason to do so here. Use curcpu()->ci_data.cpu_cc_freq and new armreg* inlines.
1.11	16-Aug-2012	matt	Move the standard definitions of the {UND,IRQ,FIQ,ABT}_STACK_SIZE to <arm32/machdep.h> Move the extern for cpu_reset_address to the same file. Add cpu_reset_address_paddr. Kill cpu_reset_v4_MMU_disable. if cpu_reset_address is NULL, then the MMU will be disabled.
1.10	29-Jul-2012	matt	Fix more -fno-common fallout. Move more variables to common locations.
1.9	14-Mar-2009	dsl	branches: 1.9.12; 1.9.20; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.8	04-Mar-2007	christos	branches: 1.8.46; 1.8.54; 1.8.60; 1.8.64; Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
1.7	21-Feb-2002	thorpej	branches: 1.7.34; 1.7.72; map_chunk() -> pmap_map_chunk(), and move it to pmap.c
1.6	20-Feb-2002	thorpej	map_pagetable() -> pmap_link_l2pt(), and move it to pmap.c
1.5	20-Feb-2002	thorpej	Collapse map_entry{,ro,nc}() into a single pmap_map_entry() that takes a prot and a "cacheable" indicator.
1.4	20-Feb-2002	thorpej	Rename map_section() to pmap_map_section(), move it to pmap.c, and give it an extra argument (prot - specifies protection of the mapping).
1.3	20-Jan-2002	thorpej	Some prototype cleanup.
1.2	07-Jan-2002	chris	branches: 1.2.2; 1.2.4; Finish up the changes to get LOOSE_PROTOTYPES working for cats. Note that this leaves a few inconsistencies (no more than we already had though) eg initarm is now prototyped in arm32/machdep.h, however only cats currently makes use of that header.
1.1	05-Jan-2002	chris	Make some of the arm32 files build with LOOSE_PROTOTYPES not set in the makefile. Turned up a few mismatched functions. Note that this isn't all of the arm32 files. Aim will be to get arm32 kernels built with LOOSE_PROTOTYPES not set.
1.2.4.3	17-Apr-2002	nathanw	Catch up to -current.
1.2.4.2	11-Jan-2002	nathanw	More catchup.
1.2.4.1	07-Jan-2002	nathanw	file machdep.h was added on branch nathanw_sa on 2002-01-11 23:38:04 +0000
1.2.2.4	16-Mar-2002	jdolecek	Catch up with -current.
1.2.2.3	11-Feb-2002	jdolecek	Sync w/ -current.
1.2.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.2.2.1	07-Jan-2002	thorpej	file machdep.h was added on branch kqueue on 2002-01-10 19:37:55 +0000
1.7.72.1	12-Mar-2007	rmind	Sync with HEAD.
1.7.34.1	03-Sep-2007	yamt	sync with head.
1.8.64.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.8.60.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.8.54.1	28-Apr-2009	skrll	Sync with HEAD.
1.8.46.1	04-May-2009	yamt	sync with head.
1.9.20.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.9.12.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.9.12.1	30-Oct-2012	yamt	sync with head
1.16.2.3	03-Dec-2017	jdolecek	update from HEAD
1.16.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.16.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.17.2.1	18-May-2014	rmind	sync with head
1.18.6.2	28-Aug-2017	skrll	Sync with HEAD
1.18.6.1	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.19.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.19.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.21.14.3	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.21.14.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.21.14.1	10-Jun-2019	christos	Sync with HEAD
1.21.12.4	18-Jan-2019	pgoyette	Synch with HEAD
1.21.12.3	20-Oct-2018	pgoyette	Sync with head
1.21.12.2	06-Sep-2018	pgoyette	Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
1.21.12.1	28-Jul-2018	pgoyette	Sync with HEAD
1.29.2.1	12-Feb-2020	martin	Pull up following revision(s) (requested by riastradh in ticket #705): sys/arch/aarch64/aarch64/aarch64_machdep.c: revision 1.35 sys/stand/efiboot/efifdt.c: revision 1.20 sys/stand/efiboot/efifdt.h: revision 1.7 sys/arch/aarch64/include/machdep.h: revision 1.9 sys/stand/efiboot/efiboot.h: revision 1.11 sys/arch/arm/arm32/arm32_machdep.c: revision 1.129 sys/arch/arm/include/arm32/machdep.h: revision 1.30 sys/stand/efiboot/exec.c: revision 1.12 sys/arch/evbarm/fdt/fdt_machdep.c: revision 1.65 sys/stand/efiboot/version: revision 1.14 sys/stand/efiboot/boot.c: revision 1.19 New function cpu_startup_hook on arm. Called at end of cpu_startup. Can be defined in, e.g., evbarm to do additional stuff after cpu_startup. Defined as a weak alias to a function that does nothing, so optional. ok jmcneill Implement rndseed support in efiboot and fdt arm. The EFI environment variable `rndseed' specifies the path to the random seed. It is loaded only for fdt platforms at the moment. Since the rndseed (an rndsave_t object as defined in <sys/rndio.h>) is 536 bytes long (for hysterical raisins), and to avoid having to erase parts of the fdt tree, we load it into a physical page whose address is passed in the fdt tree, rather than passing the content of the file as an fdt node directly; the kernel then reserves the page from uvm, and maps it into kva to call rnd_seed. For now, the only kernel that does use efiboot with fdt is evbarm, which knows to handle the rndseed. Any new kernels that use efiboot with fdt must do the same; otherwise uvm may hand out the page with the secret key on it for a normal page allocation in the kernel -- which should be OK if there are no kernel memory disclosure bugs, but would lead to worse consequences than simply loading the seed late in userland with /etc/rc.d/random_seed otherwise. ok jmcneill
1.30.2.1	29-Feb-2020	ad	Sync with head.
1.34	30-May-2021	rin	Include opt_param.h for MSGBUFSIZE ifdef _KERNEL_OPT.
1.33	10-Jul-2020	skrll	branches: 1.33.6; 1.33.8; Add support for KASAN on ARMv[67] Thanks to maxv for many pointers and reviews.
1.32	08-Jul-2020	skrll	Define USPACE in terms of UPAGES (not the other way around) now that NBPG is fixed at 4K
1.31	08-Jul-2020	skrll	Whitespace
1.30	13-Feb-2020	skrll	Bump the amount of KMEM allowed to 1/3rd of KVM. _ARCH_ARM_6 has a split of 2:2 and others have a split of 3:1. Tested by martin@ Thanks
1.29	01-Feb-2020	skrll	G/C
1.28	18-Jan-2020	skrll	Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) by creating a new pool l1ttpl for the userland L1 translation table which needs to be 8KB and 8KB aligned. Limit the pool to maxproc and add hooks to allow the sysctl changing of maxproc to adjust the pool. This comes at a 5% performance penalty for build.sh -j8 kernel on a Tegra TK1.
1.27	19-Jun-2019	skrll	branches: 1.27.2; 1.27.4; KNF and add a comment
1.26	04-Feb-2019	skrll	Trailing whitespace
1.25	09-Jun-2017	chs	branches: 1.25.6; if __HIDE_DELAY is defined, do not define delay() or DELAY(). needed by dtrace and ZFS.
1.24	02-Apr-2015	matt	Don't include <machine/cpu.h>
1.23	05-Apr-2014	skrll	branches: 1.23.6; On second thoughts don't do the RPI hack for everyone.
1.22	05-Apr-2014	skrll	Drop down to 4KB pages on armv6 for now.
1.21	30-Mar-2014	matt	Make the ARM pmap use ASIDs, split TTBRs, and MP safe. This only happens for ARMv6 or later CPUs. This means that on context switch that the TLBs and caches no longer to cleaned/flushed. Also, eXecute Never (XN) protection has been added so non-exec pages can not be run. Change the page size for ARMv6+ to be 8KB while allows a L1PT to be a normal page. This means that the L1PT is not special. Use the XN support to only sync pages that are executed from.
1.20	29-May-2013	rkujawa	branches: 1.20.2; Explicitely cast to unsigned. Avoid bugs caused by misintepreting the result as signed. riastradh@ suggested to change these macros into static inline functions. But I'm still not convinced... Obtained from Marvell, Semihalf.
1.19	20-Mar-2013	skrll	Bump MSGBUFSIZE on arm ports to 16KB. OK matt@
1.18	07-Dec-2012	matt	FPCONTEXTSIZE is dead.
1.17	04-Feb-2012	para	branches: 1.17.6; improve sizing of kmem_arena now that more allocations are made from it don't enforce limits if not required ok: riz@
1.16	14-Jan-2011	rmind	branches: 1.16.8; 1.16.12; Retire struct user, remove sys/user.h inclusions. Note sys/user.h header as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros. Various #include fixes and review by matt@.
1.15	08-Feb-2010	joerg	branches: 1.15.2; Remove separate mb_map. The nmbclusters is computed at boot time based on the amount of physical memory and limited by NMBCLUSTERS if present. Architectures without direct mapping also limit it based on the kmem_map size, which is used as backing store. On i386 and ARM, the maximum KVA used for mbuf clusters is limited to 64MB by default. The old default limits and limits based on GATEWAY have been removed. key_registered_sb_max is hard-wired to a value derived from 2048 clusters.
1.14	14-Mar-2009	dsl	branches: 1.14.2; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.13	19-Jan-2008	chris	branches: 1.13.10; 1.13.18; 1.13.24; With the removal of IPKDB on arm, the undefined stack is only used to bounce into SVC32 mode, there is no per-process data stored on it. We can therefore use the undefined stack setup by the platform machdep.c as a system wide undefined stack. This removes the need for a per-process undefined stack, and the processor mode switching overhead it causes in cpu_switchto. The space freed in the USPACE is used to increase the per process kernel stack size.
1.12	11-Dec-2005	christos	branches: 1.12.46; 1.12.50; 1.12.52; 1.12.58; 1.12.66; merge ktrace-lwp.
1.11	29-Dec-2004	joff	branches: 1.11.10; Bump UPAGES back down to 8KB now that real issue was found with ep93xx intr handling
1.10	23-Dec-2004	joff	bump default U-area size from 8KB to 64KB, 8KB is too little to even successfully boot a tsarm SBC
1.9	24-Mar-2002	thorpej	branches: 1.9.12; * arm_byte_to_page() -> arm_btop() * arm_page_to_byte() -> arm_ptob()
1.8	26-Feb-2002	simonb	Purge CLSIZE, CLSIZELOG2 and MCLOFSET. Be consistant in the way that MSIZE, MCLSHIFT, MCLBYTES and NMBCLUSTERS are defined. Remove old VM constants from cesfic port. Bump MSIZE to 256 on mipsco (the only one that wasn't already 256).
1.7	22-Feb-2002	briggs	Bumb NMBCLUSTER defaults to 2048 for GATEWAY and 1024 otherwise. These match current powerpc defaults and are more reasonable for the current era.
1.6	11-Aug-2001	chris	branches: 1.6.6; Add arm_trunc_page, similair to trunc_page but using a hardcoded PGOFSET.
1.5	07-Aug-2001	bjh21	Use <arm/param.h> to get shared definitions.
1.4	30-May-2001	mrg	branches: 1.4.2; use _KERNEL_OPT
1.3	04-Mar-2001	matt	branches: 1.3.2; 1.3.4; Only define MACHINE & MACHINE_ARCH in port-dependent param.h. Everything else (since it's common) is from <arm/arm32/param.h>
1.2	24-Feb-2001	toshii	Make hpcarm kernel compile again.
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.3.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.3.4.1	04-Mar-2001	bouyer	file param.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.3.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.4.2.3	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.4.2.2	16-Mar-2002	jdolecek	Catch up with -current.
1.4.2.1	25-Aug-2001	thorpej	Merge Aug 24 -current into the kqueue branch.
1.6.6.3	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.6.6.2	28-Feb-2002	nathanw	Catch up to -current.
1.6.6.1	11-Aug-2001	nathanw	file param.h was added on branch nathanw_sa on 2002-02-28 04:07:34 +0000
1.9.12.1	17-Jan-2005	skrll	Sync with HEAD.
1.11.10.1	21-Jan-2008	yamt	sync with head
1.12.66.1	20-Jan-2008	bouyer	Sync with HEAD
1.12.58.1	18-Feb-2008	mjf	Sync with HEAD.
1.12.52.1	23-Mar-2008	matt	sync with HEAD
1.12.50.1	20-Jan-2008	chris	Sync to HEAD.
1.12.46.1	28-Feb-2008	rjs	Sync with HEAD.
1.13.24.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.13.18.1	28-Apr-2009	skrll	Sync with HEAD.
1.13.10.2	11-Mar-2010	yamt	sync with head
1.13.10.1	04-May-2009	yamt	sync with head.
1.14.2.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.15.2.1	05-Mar-2011	rmind	sync with head
1.16.12.1	18-Feb-2012	mrg	merge to -current.
1.16.8.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.16.8.2	16-Jan-2013	yamt	sync with (a bit old) head
1.16.8.1	17-Apr-2012	yamt	sync with head
1.17.6.4	03-Dec-2017	jdolecek	update from HEAD
1.17.6.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.17.6.2	23-Jun-2013	tls	resync from head
1.17.6.1	25-Feb-2013	tls	resync with head
1.20.2.1	18-May-2014	rmind	sync with head
1.23.6.2	28-Aug-2017	skrll	Sync with HEAD
1.23.6.1	06-Apr-2015	skrll	Sync with HEAD
1.25.6.3	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.25.6.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.25.6.1	10-Jun-2019	christos	Sync with HEAD
1.27.4.2	29-Feb-2020	ad	Sync with head.
1.27.4.1	25-Jan-2020	ad	Sync with head.
1.27.2.1	07-Jun-2020	martin	Pull up following revision(s) (requested by skrll in ticket #951): sys/arch/arm/include/arm32/param.h: revision 1.30 Bump the amount of KMEM allowed to 1/3rd of KVM. _ARCH_ARM_6 has a split of 2:2 and others have a split of 3:1. Tested by martin@ Thanks
1.33.8.1	31-May-2021	cjep	sync with head
1.33.6.1	17-Jun-2021	thorpej	Sync w/ HEAD.
1.4	03-Sep-2001	matt	branches: 1.4.6; Add a merged <pcb.h> for arm26/arm32.
1.3	27-Aug-2001	chris	Remove unused entries from the pcb. This is with a long term view of merging the arm26 and arm32 pcb's.
1.2	28-Feb-2001	bjh21	branches: 1.2.4; 1.2.6; PCB convergence, part the first: Move the pointer to the current user trapframe from struct mdproc to struct pcb (as on arm26). Only tested by compiling kernels on arm32 and hpcarm (dnard seems to be incomplete anyway). Someone should try running one.
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.6.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.2.4.1	28-Feb-2001	bouyer	file pcb.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.4.6.2	03-Sep-2001	matt	Add a merged <pcb.h> for arm26/arm32.
1.4.6.1	03-Sep-2001	matt	file pcb.h was added on branch nathanw_sa on 2001-09-03 19:20:29 +0000
1.178	09-Oct-2025	skrll	Add the beginnings of a GENERIC_V5 kernel that targets armv5 boards and uses FDT. In this first iteration some support is added for OLinuXino boards. Thanks to Yuri Honegger for doing the vast majority of the work.
1.177	12-Oct-2023	skrll	Fix non-DIAGNOSTIC builds
1.176	02-Aug-2023	skrll	No need to define cpu_{,set}_tlb_info here - just use the sys/uvm/pmap/pmap_tlb.h versions.
1.175	24-Apr-2023	martin	Fix DEVMAP_FLAGS, patch from Nick.
1.174	20-Apr-2023	skrll	Provide a shared pmap_devmap implementation and convert all pmap_devmap arrays to use DEVMAP_ENTRY{,_END}
1.173	02-Apr-2022	skrll	branches: 1.173.4; Update to support EFI runtime outside the kernel virtual address space by creating an EFI RT pmap that can be activated / deactivated when required. Adds support for EFI RT to ARM_MMU_EXTENDED (ASID) 32-bit Arm machines. On Arm64 the usage of pmapboot_enter is reduced and the mappings are created much later in the boot process -- now in cpu_startup_hook. Backward compatiblity for KVA mapped RT from old bootaa64.efi is maintained. Adding support to other platforms should be easier as a result.
1.172	15-Jan-2022	skrll	Remove unnecessary brackets
1.171	16-Oct-2021	skrll	pm_remove_all is a shared field so move it out the #ifdefs
1.170	04-May-2021	skrll	Provide pte_{value,valid_p}
1.169	30-Oct-2020	skrll	branches: 1.169.6; Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.
1.168	03-Jul-2020	skrll	Consistency...#define<tab>
1.167	18-Apr-2020	skrll	PMAP_DEBUG has been deleted on arm
1.166	29-Mar-2020	skrll	branches: 1.166.2; Don't define pt_entry_t if _LOCORE Reported by Patrick Welche
1.165	29-Mar-2020	skrll	Provide a pt_entry_t and PRIxPTE
1.164	14-Mar-2020	ad	pmap_remove_all(): Return a boolean value to indicate the behaviour. If true, all mappings have been removed, the pmap is totally cleared out, and UVM can then avoid doing the work to call pmap_remove() for each map entry. If false, either nothing has been done, or some helpful arch-specific voodoo has taken place.
1.163	24-Feb-2020	ad	Adjust for UVM locking changes
1.162	23-Feb-2020	skrll	G/C l1pte_pgindex
1.161	05-Feb-2020	skrll	Fix the armv[67] memory attributes for uncached memory. Previously it was mapped as strongly-ordered which meant that unaligned accesses would fault. armv7_generic_bs_map now maps pages with PMAP_DEV which is treated as SO bus_dma continues to use PMAP_NOCACHE as appropriate, but this now get mapped to the correct memory attribute bits for armv[67] DEVMAP_ENTRY usees a new flag PTE_DEV. The workaround for the unaligned access faults is now removed. XXX Other armv[67] boards bus_space implementations should be checked. XXX There is scope to reduce the difference to aarch64
1.160	20-Jan-2020	skrll	s/_ARM_ARCH_6/ARM_MMU_EXTENDED/ in the #ifdef for the recent 4k pages change
1.159	18-Jan-2020	skrll	Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) by creating a new pool l1ttpl for the userland L1 translation table which needs to be 8KB and 8KB aligned. Limit the pool to maxproc and add hooks to allow the sysctl changing of maxproc to adjust the pool. This comes at a 5% performance penalty for build.sh -j8 kernel on a Tegra TK1.
1.158	12-Jan-2020	christos	fix -Wsign-compare because module tests trigger it.
1.157	10-Dec-2019	ad	branches: 1.157.2; pg->phys_addr -> VM_PAGE_TO_PHYS(pg)
1.156	18-Oct-2018	skrll	branches: 1.156.4; Provide generic start code that assumes the MMU is off and caches are disabled as per the linux booting protocol for ARMv6 and ARMv7 boards. u-boot image type should be changed to 'linux' for correct behaviour. The new start code builds a minimal "bootstrap" L1PT with cached access disabled and uses the same table for all processors. AP startup is performed in less steps and more code is written in C. The bootstrap tables and stack are placed into an (orphaned) section "_init_memory" which is given to uvm when it is no longer used. Various kernels have been converted to use this code and tested. Some boards were provided by TNF. Thanks! The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS kernels. The GENERIC kernel will also work on RPI2 using u-boot. Thanks to martin@ and aymeric@ for testing on parallella and nanosoc respectively
1.155	01-Apr-2018	ryo	branches: 1.155.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.154	24-Jan-2018	skrll	branches: 1.154.2; Remove port-acorn26 OK core@
1.153	22-Oct-2017	skrll	Centralise defines for DEVMAP_{ALIGN,SIZE,ENTRY,ENTRY_END}
1.152	29-Aug-2017	skrll	Revert the _PROT_RO_ define changes and do all the work in the *_PROT() macros for RO kernel pages. cats boots again - no idea how it slipped through my testing previously
1.151	11-Jul-2017	skrll	Fix up L{1_S,2_L,2_S}_PROT for recent changes to the L{1_S,2_L,2_S}_PROT_RO* values.
1.150	06-Jul-2017	skrll	KNF two comments
1.149	06-Jul-2017	skrll	Re-define the L*_PROT_RO for MMUs that don't really support RO mapping and adjust l2pte_set_{writeable,readony} to the new values. This allows RO mappings for MMUs that actually support them.
1.148	06-Jul-2017	skrll	Trailing whitespace
1.147	25-May-2017	skrll	Use the define name PMAP_HWPAGEWALKER and not PMAP_TLB_HWPAGEWALKER
1.146	25-May-2017	skrll	Spell ARM_MMU_EXTENDED correctly
1.145	23-Feb-2017	skrll	Fixup the compile time decisions around PMAP_{INCLUDE,NEEDS}_PTE_SYNC and fix the options for xscale boards which require the code in pmap_l2ptp_ctor marked as #ifndef PMAP_INCLUDE_PTE_SYNC. Fix the typo (pte -> opte) in this code block and consistently use opte elsewhere. PR/51990: Regression data_abort_handler: data_aborts fsr=0x406 far=0xbfffeff5 on copyout in init
1.144	14-Jul-2016	skrll	branches: 1.144.2; 1.144.4; Spell PMAP_TLB_NEED_SHOOTDOWN correctly
1.143	11-Nov-2015	skrll	Support pmap_pv_track and friends
1.142	09-Sep-2015	skrll	Make L2_S_CACHE_MASK_armv6n consistent with other *_CACHE_MASK_armv6n
1.141	01-Jun-2015	matt	pmap_directbase is a failed experiment, nuke it.
1.140	30-May-2015	matt	Support directmapped systems with >1GB that start memory at 0x80000000.
1.139	12-May-2015	skrll	Add some KASSERTs to catch similar bugs to the cnptes/nptes one
1.138	25-Feb-2015	joerg	Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.137	08-Nov-2014	skrll	branches: 1.137.2; Whitespace
1.136	29-Oct-2014	skrll	Sprinkle #include "opt_multiprocessor.h"
1.135	31-Jul-2014	skrll	branches: 1.135.2; Trailing whitespace
1.134	27-Jul-2014	skrll	More fixes as a step towards ARM_MMU_EXTENDED on RPI. - don't set CPU_CONTROL_SYST_ENABLE in arm11x6_setup for ARM_MMU_EXTENDED - Use the new MMU defines for V6N - pull in arm/cpuconf.h in vmparam s that VM_MAXUSER_ADDRESS gets set correctly.
1.133	15-Jun-2014	ozaki-r	Fix macro name; PMAP_TLB_NEED_SHOOTDOWN => PMAP_NEED_TLB_SHOOTDOWN
1.132	16-Apr-2014	matt	Make to flush the secondary cache when syncing PTEs when the Sheeva L2 cache is used.
1.131	11-Apr-2014	matt	Add a kernel for the CUBIETRUCK (CUBIEBOARD3). Allow direct mapping of all memory (but for now allow the memory mapped above KERNEL_BASE to used for poolpages).
1.130	04-Apr-2014	matt	branches: 1.130.2; For ARM_MMU_V6C enable supersections
1.129	31-Mar-2014	skrll	Deal with large page mappings in l2pte_set. Now the RPI can get passed setting the new TTB. ok matt@
1.128	31-Mar-2014	matt	For ARM_MMU_EXTENDED, a KERNEL_BASE >= 0x80000000 is ok but a VM_USER_MAXADDRESS can not be more than 0x80000000 - PAGE_SIZE.
1.127	31-Mar-2014	matt	Add a missing 0 to an #error
1.126	30-Mar-2014	matt	Make the ARM pmap use ASIDs, split TTBRs, and MP safe. This only happens for ARMv6 or later CPUs. This means that on context switch that the TLBs and caches no longer to cleaned/flushed. Also, eXecute Never (XN) protection has been added so non-exec pages can not be run. Change the page size for ARMv6+ to be 8KB while allows a L1PT to be a normal page. This means that the L1PT is not special. Use the XN support to only sync pages that are executed from.
1.125	26-Feb-2014	matt	Remove duplicate PMAP_PTE
1.124	26-Feb-2014	matt	Replace 1000 with PAGE_SIZE
1.123	26-Feb-2014	matt	Add PMAP_PTE flag. (map page so it can be used as a PDE or PTE page)
1.122	18-Aug-2013	matt	struct pcb; for a function prototype.
1.121	03-Jul-2013	matt	Add l2pte_set and l2pte_reset inlines to set/reset a pte. These will be used to support > 4KB pages sizes. Don't use >> L1_S_SHIFT, use L1_IDX() instead.
1.120	12-Jun-2013	matt	branches: 1.120.2; Add a ARM_HAS_VBAR option which forces the use of the VBAR register. This allows much code to deal with vector_page mappings to be eliminated. On a BEAGLEBONE kernel, this saves 8KB of text and instructions that never have to be executed. (The PJ4B has VBAR but doesn't implement the security extensions it is part of so a method was needed to allow it use VBAR with relying on the default test for the security extensions.)
1.119	12-Dec-2012	matt	Protect more definitions with #ifndef _LOCORE
1.118	12-Dec-2012	matt	Enable direct-mapped poolpages if __HAVE_MM_MD_DIRECT_MAPPED_PHYS is defined.
1.117	10-Dec-2012	matt	Add b{zero,copy}_page{,_vfp} and physical_end
1.116	10-Dec-2012	matt	Add pmap_{copy,zero}_page_vfp
1.115	12-Nov-2012	skrll	C99 types
1.114	17-Oct-2012	matt	Add PMAP_MAP_POOLPAGE / PMAP_UNMAP_POOLPAGE if PMAP_NEED_ALLOC_POOLPAGE is defined.
1.113	17-Oct-2012	matt	Add a PMAP_NEEDS_ALLOC_POOLPAGE / PMAP_ALLOC_POOLPAGE hook so systems can allocate pool pages from a specific VM freelist.
1.112	22-Sep-2012	matt	Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead but add a second argument to it to indicate whether the TLB/caches need to be flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field to see if the fixed can be skipped. Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1) or enabeld (bit = 0). With these changes, the A9 MMU can use traverse caches to do MMU tablewalks Also, make sure all memory has the shareable bit for the A9.
1.111	11-Sep-2012	matt	branches: 1.111.2; Fix the CACHE_MASKs for armv6 to include TEX and S bits. Fix a comment in pte.h
1.110	07-Sep-2012	matt	Switch cortex_a9 back to need_ptesync = 1 Add code to disable the L2 cache on cortex-a9 (for now). Add evcnt for all the fault types. Move cache info in a structure and have one for the pcache and one for scache. Probe L1/L2 caches properly for ARMv7
1.109	06-Sep-2012	matt	Alas, Cortex-A8 can't TLB walk out of their caches so they need to sync each PTE.
1.108	06-Sep-2012	matt	Enable "shareable" access to the page table for armv7. PTE_SYNC only does a DSB now on an armv7 cpu and no longer needs to flush the cache line to ram.
1.107	02-Sep-2012	matt	Make bus_dma understand supersections.
1.106	01-Sep-2012	martin	Backout previous, Matt fixed it differently
1.105	01-Sep-2012	martin	Move struct pv_addr next to struct bootmem_info into machdep.h and have pmap.h include that. Seems to be the least intrusive build fix; Matt: feel free to revamp.
1.104	30-Aug-2012	matt	Add a l1pte_supersection_p macro.
1.103	20-Aug-2012	matt	Add support for mapping SuperSection on armv6 and armv7. These always a domain of 0 so move the kernel from domain 15 to domain 0.
1.102	29-Jul-2012	matt	Fix more -fno-common fallout. Move more variables to common locations.
1.101	28-Jan-2012	matt	branches: 1.101.4; Nuke the simplelock from vm_page_md
1.100	12-Jun-2011	rmind	branches: 1.100.2; 1.100.6; Welcome to 5.99.53! Merge rmind-uvmplock branch: - Reorganize locking in UVM and provide extra serialisation for pmap(9). New lock order: [vmpage-owner-lock] -> pmap-lock. - Simplify locking in some pmap(9) modules by removing P->V locking. - Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs). - Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner. Add TLBSTATS option for x86 to collect statistics about TLB shootdowns. - Unify /dev/mem et al in MI code and provide required locking (removes kernel-lock on some ports). Also, avoid cache-aliasing issues. Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches formed the core changes of this branch.
1.99	10-Mar-2011	bsh	branches: 1.99.2; Preliminary ARM11 MPCore support. I have confirmed this commit doesn't affect existing evbarm kernels by comparing binaries.
1.98	28-Feb-2011	macallan	implement arm32_pmap_flags() to allow mappings with write buffering enabled, mostly for video memory Tested on shark
1.97	14-Nov-2010	uebayasi	branches: 1.97.2; 1.97.4; Move struct vm_page_md definition from vmparam.h to pmap.h, because it's used only by pmap. vmparam.h has definitions for wider audience. All GENERIC kernels build tested, except ia64. powerpc/include/booke/vmparam.h has one too, but it has no pmap.h, so it's left as is.
1.96	02-Nov-2010	uebayasi	Fix build of evbarm.
1.95	16-Jun-2010	jmcneill	PR port-arm/43299: Support added for igepv2/cortexa8/omap3530 Apply patch from PR, with build fixes. ok skrll, matt
1.94	27-Dec-2009	uebayasi	branches: 1.94.2; 1.94.4; Add write-through cache work-around for ARM11 as well as ARM9/ARM10. Analyzed & tested on i.MX35 with help from Tsubai Masanari.
1.93	22-Oct-2009	rmind	Simplify pmap_remove() a little by avoiding pmap_do_remove() layer, since possibility to skip wired mappings is not needed anymore. Apart from that, no functional differences are intended.
1.92	19-Aug-2009	thorpej	Use PMAP_ENABLE_PMAP_KMPAGE to enable PMAP_KMPAGE. We still want the bit defined in the MI space, not in an MD header.
1.91	19-Aug-2009	thorpej	Rationalize the definition of PMAP_KMPAGE.
1.90	30-Dec-2008	matt	Reclaim PVF_KNC in VIPT to be PVF_MULTCLR (page has multiple colors). Track when a page is mapping in multiple colors and deal with the ramifications. When a page's MOD attribute is cleared, clean it from the cache. Fix a logic inversion. With these changes, the TI SDP2420 H4 board can successfully natively build a TISDP2420 kernel.
1.89	09-Dec-2008	pooka	Make pmap_kernel() a MI macro for struct pmap *kernel_pmap_ptr, which is now the "API" provided by the pmap module. pmap_kernel() remains as the syntactic sugar. Bonus cosmetics round: move all the pmap_t pointer typedefs into uvm_pmap.h. Thanks to Greg Oster for providing cpu muscle for doing test builds.
1.88	13-Aug-2008	matt	branches: 1.88.2; 1.88.10; Fix a few more corner cases. Always KMPAGE or pages with unmanaged writeable kernel mappings as modified. Only ever set DIRTY bit is DMOD is true and NC is false. Don't modify unmanaged mappings in pmap_clearbit.
1.87	21-Jul-2008	matt	Add PMAP_KMPAGE defintion (forgotten commit). Also add PVF_DIRTY which will be used by an update pmap.c shortly (to note what pages may have dirty cache lines).
1.86	16-Jul-2008	matt	Revamp bookkeeping for pages entered by pmap_kenter_pa. Keep track of them on pvlists so that the cacheability can be properly tracked.
1.85	27-Apr-2008	matt	branches: 1.85.2; 1.85.4; 1.85.6; Merge kernel changes in matt-armv6 to HEAD.
1.84	01-Jan-2008	chris	branches: 1.84.6; 1.84.8; 1.84.10; Add support for kcore headers to arm32 kernel core dumps. The kcore code is based on i386's kcore header handling. Having an asm stub for dumpsys, to dump the registers onto the stack, and then call the C code to do the memory dump is based on amd64's core dump code. This allows a successful core dump on cats. Part of fixing PR cats/18026.
1.83	17-Oct-2007	garbled	branches: 1.83.2; 1.83.8; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.82	15-Sep-2007	scw	ARM cpu_switchto() has been partially broken since yamt-idlelwp was merged as its cache/tlb management smarts relied too heavily on pre-merge context- switch behaviour. See PR kern/36548 for one manifestation of the breakage. To address this: - Ditch the shadow pmap variables in the PCB (pagedir, l1vec, dacr, cstate) as it was too easy for them to get out of sync with the pmap. - Re-write (and fix) the convoluted cpuswitch.S cache/tlb ASM code in C. It's only slightly less efficient, but is much more readable/maintainable. - Document cpufuncs.cf_context_switch() as being C-callable. - pmap_activate() becomes a no-op if the lwp's vmspace is already active. (Good performance win, since pmap_activate() is now invoked on every context-switch, even though ARM's cpu_switchto() already does all the grunt work) XXX: Some CPU-specific armXX_context_switch() implementations (arm67, arm7tdmi, arm8) always flush the I+D caches. This should not be necessary. Someone with access to hardware (acorn32?) needs to deal with this.
1.81	22-Feb-2007	thorpej	branches: 1.81.4; 1.81.12; 1.81.18; 1.81.20; 1.81.22; 1.81.24; TRUE -> true, FALSE -> false
1.80	21-Feb-2007	thorpej	Replace the Mach-derived boolean_t type with the C99 bool type. A future commit will replace use of TRUE and FALSE with true and false.
1.79	24-Dec-2005	perry	branches: 1.79.26; 1.79.30; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.78	10-Dec-2005	scw	Implement pmap_collect() for arm32.
1.77	13-Oct-2003	scw	branches: 1.77.16; On Xscale, define PMAP_UAREA() and use it to tweak uarea mappings so they use the mini D$. This results in a small performance boost on xscale platforms, since flushing the main cache on a context switch won't affect the kernel stack/pcb.
1.76	06-Sep-2003	rearnsha	Add support for ARM10 class processors.
1.75	18-Jun-2003	bsh	branches: 1.75.2; protect with #ifndef _LOCORE so that assembler codes can share definitions in this file such as PMAP_DOMAIN_KERNEL.
1.74	15-Jun-2003	thorpej	Add another devmap routine that allows bootstrap code to register a devmap reflecting mappings that are created by really early bootstrap code before pmap_devmap_bootstrap() is called.
1.73	15-Jun-2003	thorpej	Replace the ad-hoc "section mapping table" for static device mappings with a more generic "devmap" structure that can also handle mappings made with large and small pages. Add new pmap routines to enter these mappings during bootstrap (and "remember" the devmap), and routines to look up the static mappings once the kernel is running.
1.72	21-May-2003	thorpej	Remove #ifdefs supporting the old pmap, switching fully to the new.
1.71	03-May-2003	thorpej	Reduce differences between ARM32_NEW_VM_LAYOUT and not; always pass the start and end of the kernel managed virtual address space to pmap_bootstrap() in the new pmap.
1.70	28-Apr-2003	scw	Fix the bug reported by Richard Earnshaw in port-arm32/21349. Make sure to check the access permissions before doing ref/mod/domain fixups. This is particularly important on machines with ARM_VECTORS_LOW.
1.69	22-Apr-2003	thorpej	Some ARM32_PMAP_NEW-related cleanup: * Define a new "MMU type", ARM_MMU_SA1. While the SA-1's MMU is basically compatible with the generic, the SA-1 cache does not have a write-through mode, and it is useful to know have an indication of this. * Add a new PMAP_NEEDS_PTE_SYNC indicator, and try to evaluate it at compile time. We evaluate it like so: - If SA-1-style MMU is the only type configured -> 1 - If SA-1-style MMU is not configured -> 0 - Otherwise, defer to a run-time variable. If PMAP_NEEDS_PTE_SYNC might evaluate to true (SA-1 only or run-time check), then we also define PMAP_INCLUDE_PTE_SYNC so that e.g. assembly code can include the necessary run-time support. PMAP_INCLUDE_PTE_SYNC largely replaces the ARM32_PMAP_NEEDS_PTE_SYNC manual setting Steve included with the original new pmap. * In the new pmap, make pmap_pte_init_generic() check to see if the CPU has a write-back cache. If so, init the PT cache mode to C=1,B=0 to get write-through mode. Otherwise, init the PT cache mode to C=1,B=1. * Add a new pmap_pte_init_arm8(). Old pmap, same as generic. New pmap, sets page table cacheability to 0 (ARM8 has a write-back cache, but flushing it is quite expensive). * In the new pmap, make pmap_pte_init_arm9() reset the PT cache mode to C=1,B=0, since the write-back check in generic gets it wrong for ARM9, since we use write-through mode all the time on ARM9 right now. (What this really tells me is that the test for write-through cache is less than perfect, but we can fix that later.) * Add a new pmap_pte_init_sa1(). Old pmap, same as generic. New pmap, does generic initialization, then resets page table cache mode to C=1,B=1, since C=1,B=0 does not produce write-through on the SA-1.
1.68	18-Apr-2003	thorpej	Gah, fix another typo.
1.67	18-Apr-2003	thorpej	Oops, fix typo.
1.66	18-Apr-2003	thorpej	Define two new macros to test if a mapping is mappable with an L1 Section mapping or an L2 Large Page mapping.
1.65	18-Apr-2003	scw	Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems. Some features of the new pmap are: - It allows L1 descriptor tables to be shared efficiently between multiple processes. A typical "maxusers 32" kernel, where NPROC is set to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily with just 4 L1s. This completely solves the problem of running out of contiguous physical memory for allocating new L1s at runtime on a busy system. - Much improved cache/TLB management "smarts". This change ripples out to encompass the low-level context switch code, which is also much smarter about when to flush the cache/TLB, and when not to. - Faster allocation of L2 page tables and associated metadata thanks, in part, to the pool_cache enhancements recently contributed to NetBSD by Wasabi Systems. - Faster VM space teardown due to accurate referenced tracking of L2 page tables. - Better/faster cache-alias tracking. The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel config file, and making the necessary changes to the port-specific initarm() function. Several ports have already been converted and will be committed shortly.
1.64	09-Apr-2003	thorpej	Add the ability for pool caches to cache the physical address of objects. Clients of the pool_cache API must consistently use the "paddr" variants or not, otherwise behavior is undefined. Enable this on Alpha, ARM, MIPS, and x86. Other platforms must define POOL_VTOPHYS() in the appropriate manner in order to enable the feature. Part 1 of a series of simple patches contributed by Wasabi Systems to improve network performance.
1.63	23-Mar-2003	chris	Garbage collect pmap_map, the last (and only?) use has been removed.
1.62	12-Nov-2002	chris	Fix PTE_FLUSH_RANGE macro, it should have had a cnt parameter.
1.61	22-Sep-2002	chs	it really helps to get the stub right before cutting + pasting it 27 times. alas, I did not. doh.
1.60	22-Sep-2002	chs	add pmap_remove_all() hook (empty on most platforms so far).
1.59	24-Aug-2002	thorpej	Define macros describing the 4M super-sections that our pmap actually uses (since we allocate PT pages in 4K chunks, rather than 1K chunks).
1.58	24-Aug-2002	thorpej	Enable caching on kernel and user page tables. This saves having to do uncached memory access during VM operations (which can be quite expensive on some CPUs). We currently write-back PTEs as soon as they're modified; there is some room for optimization (to write them back in larger chunks). For PTEs in the APTE space (i.e. PTEs for pmaps that describe another process's address space), PTEs must also be evicted from the cache complete (PTEs in PTE space will be evicted durint a context switch).
1.57	22-Aug-2002	thorpej	* Add PTE_SYNC() and PTE_SYNC_RANGE() macros. These don't actually do anything yet. * Use PTE_SYNC() and PTE_SYNC_RANGE() in some obvious places, i.e. where vtopte() is used.
1.56	09-Aug-2002	thorpej	Add a PVF_EXEC -- we don't use it yet, though.
1.55	31-Jul-2002	thorpej	Overhaul how DMA ranges work in the ARM bus_dma implementation. A new "arm32_dma_range" structure now describes a DMA window, with a system address base, bus address base, and length. In addition to providing info about which memory regions are legal for DMA, the new structure provides address translation support, as well. As before, if a tag does not list any ranges, then all addresses are considered valid, and no DMA address translation is performed. This allows us to remove a large chunk of code which was duplicated and tweaked slightly (to do the address translation) from the stock ARM bus_dma in the XScale IOP and ARM Integrator ports. Test compiled on all ARM platforms, test booted on Intel IQ80321 and Shark.
1.54	31-Jul-2002	thorpej	Move the calls to uvm_page_physload() out of pmap_bootstrap() and into platform-specific initialization code, giving platform-specific code control over which free list a given chunk of memory gets put onto. Changes are essentially mechanical. Test compiled for all ARM platforms, test booted on Intel IQ80321 and Shark. Discussed some time ago on port-arm.
1.53	12-Apr-2002	thorpej	branches: 1.53.2; Default all XScale core processors to the read/write-allocate write-back cache mode. Add a new XSCALE_CACHE_WRITE_THROUGH option for people who are paranoid about the cache-related errata (you do have to line up the planets correctly to trip them, but having the option is useful).
1.52	12-Apr-2002	thorpej	Centralize ARM CPU configuration information by adding a new header file, <arm/cpuconf.h>, which pulls in "opt_cputypes.h" and then defines the following: * CPU_NTYPES -- now many CPU types are configured into the kernel. What you really want to know is "== 1" or "> 1". * Defines ARM_ARCH_2, ARM_ARCH_3, ARM_ARCH_4, ARM_ARCH_5, depending on which ARM architecture versions are configured (based on CPU_* options). Also defines ARM_NARCH to determins how many architecture versions are configured. * Defines ARM_MMU_MEMC, ARM_MMU_GENERIC, ARM_MMU_XSCALE depending on which classes of ARM MMUs are configured into the kernel, and ARM_NMMUS to determine how many MMU classes are configured. Remove the needless inclusion of "opt_cputypes.h" in several places. Convert remaining users to <arm/cpuconf.h>.
1.51	10-Apr-2002	thorpej	Add separate pmap_{zero,copy}_page() functions for generic ARM vs. XScale. Use the mini-data cache for the destination on XScale, thus saving tossing out 4K of possible-useful data from the main data cache each time. This significantly improves every test in lmbench.
1.50	09-Apr-2002	thorpej	* Move the code that cleans the XScale mini-data cache into its own function. * Add a new function which sets up the mini-data cache clean area properly.
1.49	09-Apr-2002	thorpej	* Split pte_cache_mode into pte_l1_s_cache_mode, pte_l2_l_cache_mode, and pte_l2_s_cache_mode. The cache-meaningful bits are different for these descriptor types on some processor models. * Add pte_*_cache_mask, corresponding to each above, which has a mask of the cache-meangful bits, and define those for generic and XScale MMU classes. Note, the L2_S_CACHE_MASK_xscale definition requires use of the Extended Small Page L2 descriptor (the "X" bit overlaps with AP bits otherwise).
1.48	09-Apr-2002	thorpej	Use the "Extended Small Page" L2 descriptor type on XScale (note this means that there are no 1K sub-pages on XScale, but we don't use them anyway).
1.47	09-Apr-2002	thorpej	Remove the implementation-defined bits from L1_S_PROTO_xscale and L1_C_PROTO_xscale; while they are supposed to be set to 1 on generic ARM MMUs (according to the SA-110 and ARM920T manuals), they are listed as "should be zero" in the i80200 manual.
1.46	09-Apr-2002	thorpej	Define 2 classes of ARM MMUs: 1. Generic (compatible with ARM6) 1. XScale (can be used as generic, but also has certainly nifty extensions). Define abstract PTE bit defintions for each MMU class. If only one MMU class is configured into the kernel (based on CPU_* options), then we get the constants for that MMU class. Otherwise we indirect through varaibles set up via set_cpufuncs(). XXX The XScale bits are currently the same as the generic bits. Baby steps.
1.45	09-Apr-2002	thorpej	Use abstract names for the protection and PTE type bits in L1 and L2 descriptors. This will allow us to support different PTE layouts that enable the use of extensions on different processor models.
1.44	05-Apr-2002	thorpej	* Rewrite the 32-bit ARM pte.h based on the ARM architecture manual. Significant cleanup, here, including better PTE bit names. * Add XScale PTE extensions (ECC enable, write-allocate cache mode). * Mechanical changes everywhere else to update for new pte.h. While doing this, two bugs (as a result of typos) were fixed in arm/arm32/bus_dma.c evbarm/integrator/int_bus_dma.c
1.43	04-Apr-2002	thorpej	Rename flags that are really part of the pv_entry/mdpage into pmap.h and give them more descriptive names and better comments: * PT_M -> PVF_MOD (page is modified) * PT_H -> PVF_REF (page is referenced) * PT_W -> PVF_WIRED (mapping is wired) * PT_Wr -> PVF_WRITE (mapping is writable) * PT_NC -> PVF_NC (mapping is non-cacheable; multiple mappings)
1.42	03-Apr-2002	thorpej	Clean up handling of the vector page on 32-bit ARM systems: * Don't refer to VA 0, instead refer to a new variable: vector_page * Delete the old zero_page_() functions, replacing them with a new one: vector_page_setprot(). When manipulating vector page mappings in user pmaps, only do so if the vector page is below KERNEL_BASE (if it's above KERNEL_BASE, the vector page is mapped by the kernel pmap). * Add a new function, arm32_vector_init(), which takes the virtual address of the vector page (which MUST be valid when the function is called) and a bitmask of vectors the kernel is going to take over, and performs all vector page initialization, including setting the V bit in the CPU Control register ("relocate vectors to high address"), if necessary.
1.41	25-Mar-2002	thorpej	* Some cleanup. * Delete the call to pmap_copy() in pmap.h
1.40	25-Mar-2002	thorpej	Move some private pmap data structures into pmap.c
1.39	25-Mar-2002	thorpej	Tidy a few things up.
1.38	25-Mar-2002	thorpej	Correct the comment describing the layout of the VM space. In particular, don't describe a recursive PTE mapping, since the ARM port doesn't (and can't) use one.
1.37	24-Mar-2002	thorpej	Remove exported pmap_pte() prototype.
1.36	24-Mar-2002	thorpej	Clean up PTE access macros a bit.
1.35	24-Mar-2002	thorpej	* arm_byte_to_page() -> arm_btop() * arm_page_to_byte() -> arm_ptob()
1.34	23-Mar-2002	thorpej	Garbage-collect the "pagehook" stuff.
1.33	23-Mar-2002	thorpej	* Rename PROCESS_PAGE_TBLS_BASE -> PTE_BASE * Rename ALT_PAGE_TBLS_BASE -> APTE_BASE * Garbage-collect PAGE_TABLE_SPACE_START
1.32	23-Mar-2002	thorpej	Remove redundant #ifdef _KERNEL
1.31	05-Mar-2002	thorpej	* Make pmap_is_{modified,referenced}() macros in pmap.h that just test the attributes in the vm_page_md directly. * Clean up pmap_clear_{modified,referenced}(). * Delete now-unused pmap_testbit().
1.30	05-Mar-2002	thorpej	Switch back to using vm_page_md (thanks chuq for finding the bug in the code that made it unstable before!)
1.29	03-Mar-2002	chris	Implement pmap_growkernel for arm32 based ports. Note that this has been compiled on some systems, cats, IQ80310, IPAQ, netwinder and shark (note that shark's build is currently broken due to other reasons), but only actually run on cats. Shark doesn't make use of the functionality as I believe there has to be a correlation between OFW and the kernel tables so that calls into OFW work.
1.28	21-Feb-2002	thorpej	Keep track of which kernel PTs are available during bootstrap, and let pmap_map_chunk() lookup the correct one to use for the current VA. Eliminate the "l2table" argument to pmap_map_chunk(). Add a second L2 table for mapping kernel text/data/bss on the IQ80310 (fixes booting kernels with ramdisks).
1.27	21-Feb-2002	thorpej	map_chunk() -> pmap_map_chunk(), and move it to pmap.c
1.26	20-Feb-2002	thorpej	map_pagetable() -> pmap_link_l2pt(), and move it to pmap.c
1.25	20-Feb-2002	thorpej	Collapse map_entry{,ro,nc}() into a single pmap_map_entry() that takes a prot and a "cacheable" indicator.
1.24	20-Feb-2002	thorpej	Rename map_section() to pmap_map_section(), move it to pmap.c, and give it an extra argument (prot - specifies protection of the mapping).
1.23	06-Feb-2002	thorpej	Back out all the vm_page_md changes. They are causing some mysterious problems (a similar change to the i386 pmap causes mysterious problems there, as well), and the issue needs to be investigated more.
1.22	06-Feb-2002	thorpej	Efficiency tweaks, some made possible by vm_page_md.
1.21	05-Feb-2002	thorpej	Use vm_page_md rather than pmap_physseg. Saves lots of cycles in common operations.
1.20	19-Jan-2002	chs	add a new flag PMAP_CACHE_VIVT for the pmap to inform the MI code that that the cache is virtually-indexed and virtually-tagged (such as on the ARM), and use this flag in the UBC code to be more friendly to those caches.
1.19	23-Nov-2001	thorpej	Use <arm/cpufunc.h>, not <machine/cpufunc.h>.
1.18	23-Nov-2001	thorpej	- Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.17	19-Nov-2001	thorpej	Implement pmap_update(). Currently it just calls cpu_cpwait(), which ensures that TLB/cache operations have completed.
1.16	03-Nov-2001	rearnsha	branches: 1.16.2; Define boolean predicates pmap_pde_page, pmap_pde_section & pmap_pde_fpage, which return true if their pde argument is a coarse page, section or fine page respectively.
1.15	13-Sep-2001	chris	branches: 1.15.2; Sprinkle some static and inline into a couple of functions. Remove dead entries from pmap.h.
1.14	10-Sep-2001	chris	Update pmap_update to now take the updated pmap as an argument. This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment. Currently this is a no-op on most platforms, so they should see no difference. Reviewed by Jason.
1.13	11-Aug-2001	chris	branches: 1.13.2; Checking a whole host of pmap changes: Improved locking (not that we actually use it on a uniprocessor, but one day :) Removed unneeded splvm's tweaked pmap_clean_page code to only flush the cache if the page is mapped in the current pmap (based on diff from richard E) Adopted pv entry allocation mechanism from i386. Laid framework for returning ptp's when we've finished with them rather than holding onto them till the process exits. ptp's are now allocated with a uvm object for the pmap, means that we can walk a list to free them off in pmap_release, until they get freed off by pmap_remove. Also implemented a page zeroing function when the processor is idling. Note that hpcarm may wish to disable this. I believe this code to be stable, if anyone has any problems please shout up.
1.12	29-Jul-2001	chris	Rework the pmap_release code to not have to walk the ptpt, it now uses a uvm_object to track the allocated vm_pages, this means it can free off the entries in the uvm_object. Testing shows that it's about 5% faster on the make configure step for gmake.
1.11	28-Jul-2001	chris	A couple of tidy ups to pmap: pmap_t -> struct pmap * in pmap.c and pmap.h kernel_pmap -> pmap_kernel() everywhere. Compiled and booted on riscpc and cats.
1.10	22-Jun-2001	chris	branches: 1.10.2; GC a couple of unused entries in the pmap struct
1.9	26-May-2001	chs	replace vm_page_t with struct vm_page *.
1.8	26-May-2001	chs	replace {simple_,}lock{_data,}_t with struct {simple,}lock {,*}.
1.7	22-Apr-2001	thorpej	Undo a misguided previous change to the pmap_update() API.
1.6	22-Apr-2001	thorpej	Give pmap_update() an argument (a pmap_t) so that it knows which pmap it should be updating.
1.5	21-Apr-2001	thorpej	Update the comment for pmap_update().
1.4	04-Mar-2001	matt	branches: 1.4.2; 1.4.4; more vm_offset_t/vm_size_t -> {p,v}{addr,size}_t changes move pmap_* declarations to pmap.h. fix conflicts this exposed (e.g different definitions for pmap_bootstrap).
1.3	04-Mar-2001	matt	Convert some vm_size_t to vsize_t/psize_t. Change vaddr_t to paddr_t where appropriate.
1.2	04-Mar-2001	matt	s/vm_offset_t/vaddr_t/g
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.4.4.3	23-Apr-2001	bouyer	Sync with HEAD.
1.4.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.4.4.1	04-Mar-2001	bouyer	file pmap.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.4.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.10.2.9	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.10.2.8	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.10.2.7	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.10.2.6	16-Mar-2002	jdolecek	Catch up with -current.
1.10.2.5	11-Feb-2002	jdolecek	Sync w/ -current.
1.10.2.4	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.10.2.3	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.10.2.2	25-Aug-2001	thorpej	Merge Aug 24 -current into the kqueue branch.
1.10.2.1	03-Aug-2001	lukem	update to -current
1.13.2.1	01-Oct-2001	fvdl	Catch up with -current.
1.15.2.1	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.16.2.9	11-Dec-2002	thorpej	Sync with HEAD.
1.16.2.8	18-Oct-2002	nathanw	Catch up to -current.
1.16.2.7	27-Aug-2002	thorpej	Sync with -current.
1.16.2.6	13-Aug-2002	nathanw	Catch up to -current.
1.16.2.5	17-Apr-2002	nathanw	Catch up to -current.
1.16.2.4	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.16.2.3	28-Feb-2002	nathanw	Catch up to -current.
1.16.2.2	08-Jan-2002	nathanw	Catch up to -current.
1.16.2.1	03-Nov-2001	nathanw	file pmap.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.53.2.1	30-Aug-2002	gehenna	catch up with -current.
1.75.2.4	11-Dec-2005	christos	Sync with head.
1.75.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.75.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.75.2.1	03-Aug-2004	skrll	Sync with HEAD
1.77.16.4	21-Jan-2008	yamt	sync with head
1.77.16.3	27-Oct-2007	yamt	sync with head.
1.77.16.2	26-Feb-2007	yamt	sync with head.
1.77.16.1	21-Jun-2006	yamt	sync with head.
1.79.30.1	10-Nov-2007	matt	Add AT91 support from Sami Kantoluoto Add TI OMAP2430 support from Marty Fouts @ Danger Inc
1.79.26.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.81.24.5	09-Jan-2008	matt	sync with HEAD
1.81.24.4	09-Nov-2007	matt	Add pmap_icache_sync_range and change arm32_sync_icache to use it. This will only invalidate va that have valid PTEs. This avoids cleaning unneeded cache lines.
1.81.24.3	09-Nov-2007	matt	Make all the evbarm kernels build again. Fix lossage from rebase.
1.81.24.2	06-Nov-2007	matt	sync with HEAD
1.81.24.1	12-Oct-2007	matt	Import TI OMAP 2430 and ARM11/ARMv6 support. Now on ARMv6, the cache is no longer purged on context switches.
1.81.22.1	01-Jan-2008	chris	Sync with HEAD.
1.81.20.1	02-Oct-2007	joerg	Sync with HEAD.
1.81.18.2	28-Feb-2008	rjs	Sync with HEAD.
1.81.18.1	01-Nov-2007	rjs	Sync with HEAD.
1.81.12.1	03-Oct-2007	garbled	Sync with HEAD
1.81.4.1	09-Oct-2007	ad	Sync with head.
1.83.8.1	02-Jan-2008	bouyer	Sync with HEAD
1.83.2.1	18-Feb-2008	mjf	Sync with HEAD.
1.84.10.6	11-Aug-2010	yamt	sync with head.
1.84.10.5	11-Mar-2010	yamt	sync with head
1.84.10.4	16-Sep-2009	yamt	sync with head
1.84.10.3	19-Aug-2009	yamt	sync with head.
1.84.10.2	04-May-2009	yamt	sync with head.
1.84.10.1	16-May-2008	yamt	sync with head.
1.84.8.1	18-May-2008	yamt	sync with head.
1.84.6.3	17-Jan-2009	mjf	Sync with HEAD.
1.84.6.2	28-Sep-2008	mjf	Sync with HEAD.
1.84.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.85.6.2	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.85.6.1	19-Oct-2008	haad	Sync with HEAD.
1.85.4.2	28-Jul-2008	simonb	Sync with head.
1.85.4.1	18-Jul-2008	simonb	Sync with head.
1.85.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.88.10.2	24-Mar-2014	matt	Define PMAP_KMPAGE
1.88.10.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.88.2.1	19-Jan-2009	skrll	Sync with HEAD.
1.94.4.4	21-Apr-2011	rmind	sync with head
1.94.4.3	05-Mar-2011	rmind	sync with head
1.94.4.2	03-Jul-2010	rmind	sync with head
1.94.4.1	16-Mar-2010	rmind	Change struct uvm_object::vmobjlock to be dynamically allocated with mutex_obj_alloc(). It allows us to share the locks among UVM objects.
1.94.2.4	15-Nov-2010	uebayasi	Sync with HEAD.
1.94.2.3	17-Aug-2010	uebayasi	Sync with HEAD.
1.94.2.2	25-Feb-2010	uebayasi	A few more VM_PAGE_TO_MD().
1.94.2.1	10-Feb-2010	uebayasi	Missing bits of pmap_is_page_colored_p() conversion.
1.97.4.1	05-Mar-2011	bouyer	Sync with HEAD
1.97.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.99.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.100.6.1	18-Feb-2012	mrg	merge to -current.
1.100.2.4	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.100.2.3	16-Jan-2013	yamt	sync with (a bit old) head
1.100.2.2	30-Oct-2012	yamt	sync with head
1.100.2.1	17-Apr-2012	yamt	sync with head
1.101.4.2	07-Feb-2013	matt	pullup pmap changes from HEAD
1.101.4.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.111.2.5	03-Dec-2017	jdolecek	update from HEAD
1.111.2.4	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.111.2.3	23-Jun-2013	tls	resync from head
1.111.2.2	25-Feb-2013	tls	resync with head
1.111.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.120.2.2	18-May-2014	rmind	sync with head
1.120.2.1	28-Aug-2013	rmind	sync with head
1.130.2.1	10-Aug-2014	tls	Rebase.
1.135.2.3	11-Mar-2017	snj	Pull up following revision(s) (requested by skrll in ticket #1366): sys/arch/arm/include/arm32/pmap.h: 1.145 sys/arch/arm/arm32/pmap.c: 1.343, 1.344 sys/arch/evbarm/gumstix/gumstix_machdep.c: 1.58 via patch Fixup the compile time decisions around PMAP_{INCLUDE,NEEDS}_PTE_SYNC and fix the options for xscale boards which require the code in pmap_l2ptp_ctor marked as #ifndef PMAP_INCLUDE_PTE_SYNC. Fix the typo (pte -> opte) in this code block and consistently use opte elsewhere. PR/51990: Regression data_abort_handler: data_aborts fsr=0x406 far=0xbfffeff5 on copyout in init -- fix unused. -- Set xscale_cache_clean_addr appropriately and re-arrange default KVA layout to allow direct map for all boards. OVERO/DUOVERO/PEPPER aren't tested. PR/52010: Regression: Gumstix Verdex is hanging in enabling cache + KASSERT ram_size
1.135.2.2	27-May-2015	msaitoh	branches: 1.135.2.2.4; Pull up following revision(s) (requested by skrll in ticket #805): sys/arch/arm/include/arm32/pmap.h: revision 1.138 sys/arch/arm/arm/cpufunc.c: revision 1.151 sys/arch/arm/arm32/bus_dma.c: revision 1.90 sys/arch/arm/broadcom/bcm53xx_pax.c: revision 1.14 sys/arch/arm/arm32/bus_dma.c: revision 1.91 sys/arch/arm/samsung/exynos_space.c: revision 1.2 sys/arch/arm/arm32/db_machdep.c: revision 1.23 sys/arch/arm/allwinner/awin_space.c: revision 1.4 sys/arch/arm/include/rwlock.h: revision 1.9 sys/arch/arm/amlogic/amlogic_space.c: revision 1.2 sys/arch/arm/zynq/zynq_space.c: revision 1.2 sys/arch/arm/broadcom/bcm2835_space.c: revision 1.7 sys/arch/arm/arm32/pmap.c: revision 1.317 sys/arch/arm/include/locore.h: revision 1.19 sys/arch/arm/include/mutex.h: revision 1.20 sys/arch/arm/include/lock.h: revision 1.31 sys/arch/arm/include/lock.h: revision 1.32 sys/arch/arm/broadcom/bcmgen_space.c: revision 1.5 - Kill redundant semicolons. - Indentation. - Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.135.2.1	09-Nov-2014	martin	Pull up following revision(s) (requested by skrll in ticket #188): sys/arch/arm/include/arm32/pmap.h: revision 1.136 sys/arch/arm/include/armreg.h: revision 1.100 sys/arch/arm/cortex/gic.c: revision 1.11 sys/arch/arm/arm32/db_interface.c: revision 1.54 sys/arch/arm/include/armreg.h: revision 1.101 sys/arch/arm/cortex/gic.c: revision 1.12 sys/arch/arm/arm32/arm32_machdep.c: revision 1.107 sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.19 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.20 sys/arch/evbarm/conf/BPI: revision 1.5 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.21 sys/arch/arm/arm32/pmap.c: revision 1.306 sys/arch/arm/arm32/db_machdep.c: revision 1.22 sys/arch/arm/arm32/arm32_tlb.c: revision 1.3 sys/arch/arm/arm/undefined.c: revision 1.55 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.22 sys/arch/arm/arm32/pmap.c: revision 1.307 sys/arch/arm/arm32/arm32_tlb.c: revision 1.4 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.23 sys/arch/arm/arm32/arm32_tlb.c: revision 1.5 sys/arch/evbarm/conf/BPI: revision 1.8 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.24 sys/arch/arm/arm32/arm32_tlb.c: revision 1.6 sys/arch/arm/arm32/arm32_tlb.c: revision 1.7 sys/arch/evbarm/conf/CUBIETRUCK: revision 1.5 sys/arch/arm/pic/pic.c: revision 1.23 sys/arch/arm/pic/pic.c: revision 1.24 sys/arch/arm/pic/picvar.h: revision 1.11 sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.20 sys/arch/arm/mainbus/cpu_mainbus.c: revision 1.16 sys/arch/arm/arm32/pmap.c: revision 1.298 sys/arch/arm/arm/cpufunc_asm_arm11.S: revision 1.17 sys/arch/arm/arm/cpufunc_asm_pj4b.S: revision 1.5 sys/arch/arm/arm32/pmap.c: revision 1.310 sys/arch/arm/arm32/pmap.c: revision 1.311 sys/arch/arm/arm32/arm32_kvminit.c: revision 1.32 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.19 sys/arch/arm/arm32/arm32_boot.c: revision 1.10 sys/arch/arm/arm/ast.c: revision 1.25 sys/arch/arm/include/armreg.h: revision 1.98 sys/uvm/pmap/pmap_tlb.c: revision 1.10 sys/arch/arm/arm32/arm32_boot.c: revision 1.8 sys/arch/arm/arm32/arm32_boot.c: revision 1.9 sys/arch/arm/arm/arm_machdep.c: revision 1.43 Various ARM MP fixes.
1.135.2.2.4.1	13-Mar-2017	skrll	Sync with netbsd-7-1-RELEASE
1.137.2.6	28-Aug-2017	skrll	Sync with HEAD
1.137.2.5	05-Oct-2016	skrll	Sync with HEAD
1.137.2.4	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.137.2.3	22-Sep-2015	skrll	Sync with HEAD
1.137.2.2	06-Jun-2015	skrll	Sync with HEAD
1.137.2.1	06-Apr-2015	skrll	Sync with HEAD
1.144.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.144.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.154.2.2	20-Oct-2018	pgoyette	Sync with head
1.154.2.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.155.2.3	21-Apr-2020	martin	Sync with HEAD
1.155.2.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.155.2.1	10-Jun-2019	christos	Sync with HEAD
1.156.4.1	27-Feb-2020	martin	Pull up following revision(s) (requested by skrll in ticket #742): sys/arch/arm/arm32/pmap.c: revision 1.388 sys/arch/arm/arm32/armv7_generic_space.c: revision 1.11 sys/arch/arm/arm/cpufunc.c: revision 1.176 sys/arch/arm/conf/Makefile.arm: revision 1.54 (via patch) sys/arch/arm/include/arm32/pmap.h: revision 1.161 Fix the armv[67] memory attributes for uncached memory. Previously it was mapped as strongly-ordered which meant that unaligned accesses would fault. armv7_generic_bs_map now maps pages with PMAP_DEV which is treated as SO bus_dma continues to use PMAP_NOCACHE as appropriate, but this now get mapped to the correct memory attribute bits for armv[67] DEVMAP_ENTRY usees a new flag PTE_DEV. The workaround for the unaligned access faults is now removed. XXX Other armv[67] boards bus_space implementations should be checked. XXX There is scope to reduce the difference to aarch64
1.157.2.3	29-Feb-2020	ad	Sync with head.
1.157.2.2	25-Jan-2020	ad	Sync with head.
1.157.2.1	17-Jan-2020	ad	Sync with head.
1.166.2.1	20-Apr-2020	bouyer	Sync with HEAD
1.169.6.1	13-May-2021	thorpej	Sync with HEAD.
1.173.4.1	14-Oct-2023	martin	Pull up following revision(s) (requested by skrll in ticket #411): sys/arch/evbarm/nslu2/nslu2_machdep.c: revision 1.41 sys/arch/evbarm/gumstix/gumstix_machdep.c: revision 1.75 sys/arch/evbarm/iq80321/iq80321_machdep.c: revision 1.66 sys/arch/iyonix/iyonix/iyonix_machdep.c: revision 1.34 sys/arch/zaurus/zaurus/machdep.c: revision 1.52 sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c: revision 1.41 sys/arch/hpcarm/hpcarm/pxa2x0_hpc_machdep.c: revision 1.33 sys/arch/evbarm/iq80310/iq80310_machdep.c: revision 1.96 sys/arch/evbarm/adi_brh/brh_machdep.c: revision 1.53 sys/arch/arm/include/arm32/pmap.h: revision 1.177 sys/arch/evbarm/viper/viper_machdep.c: revision 1.34 sys/arch/evbarm/iyonix/iyonix_machdep.c: revision 1.5 sys/arch/evbarm/npwr_fc/npwr_fc_machdep.c: revision 1.30 sys/arch/evbarm/hdl_g/hdlg_machdep.c: revision 1.35 sys/arch/arm/arm32/pmap.c: revision 1.440 sys/arch/evbarm/lubbock/lubbock_machdep.c: revision 1.45 sys/arch/evbarm/ixdp425/ixdp425_machdep.c: revision 1.47 Fix non-DIAGNOSTIC builds
1.21	23-Jan-2016	christos	Rename the cpu_id() define to cpu_idnum() so that it does not conflict with dtrace and friends.
1.20	04-Feb-2014	matt	branches: 1.20.6; _setsoftintr is long dead. reap any leftovers from arm.
1.19	27-Jul-2012	matt	branches: 1.19.2; 1.19.4; Remove safepri and use IPL_SAFEPRI instead. This may be defined in a MD header file (if not, a value of 0 is assmued).
1.18	29-Jan-2009	nonaka	branches: 1.18.14; 1.18.22; fix splx() function prototype.
1.17	11-Jun-2008	rafal	branches: 1.17.4; 1.17.12; Let the shark boot again. Fixes port-shark/38929. While I'm here fix the splsoft... macros to always raise the IPL (oops!).
1.16	27-Apr-2008	matt	branches: 1.16.2; 1.16.4; Merge kernel changes in matt-armv6 to HEAD.
1.15	06-Jan-2008	matt	branches: 1.15.6; 1.15.8; 1.15.10; Cleanup softint lossage.
1.14	03-Dec-2007	ad	branches: 1.14.6; Interrupt handling changes, in discussion since February: - Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
1.13	17-Oct-2007	garbled	branches: 1.13.2; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.12	08-Aug-2007	tsutsui	branches: 1.12.2; 1.12.4; Remove obsolete spllowersoftclock(9).
1.11	01-Jul-2007	toshii	branches: 1.11.4; 1.11.6; 1.11.8; Quick and dirty fix for hpcarm build failure, using hpcarm specific softintr code for now.
1.10	09-Mar-2007	thorpej	branches: 1.10.2; 1.10.4; 1.10.10; Make ipl_t and ipl_cookie_t 8-bit values. kmutex is now down to 12 bytes (from 20) on ARM. Approved by Matt Thomas.
1.9	18-Feb-2007	matt	Don't export spl_smasks or soft_interrupts. They are local to intr.c Make sure that softintr_init() is called when needed. Assume __HAVE_GENERIC_SOFT_INTERRUPTS is defined (since newlock2 requires it).
1.8	18-Feb-2007	matt	Add __HAVE_GENERIC_SOFT_INTERRUPTS support for shark. This was done by extenting the current arm generic intrs to support softintrs. Add IPL_SOFTCLOCK, IPL_SOFTNET, IPL_SOFTSERIAL.
1.7	21-Dec-2006	yamt	branches: 1.7.2; merge yamt-splraiseipl branch. - finish implementing splraiseipl (and makeiplcookie). http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html - complete workqueue(9) and fix its ipl problem, which is reported to cause audio skipping. - fix netbt (at least compilation problems) for some ports. - fix PR/33218.
1.6	16-Jun-2003	thorpej	branches: 1.6.18; 1.6.48; 1.6.50; Rename IPL_IMP -> IPL_VM.
1.5	27-Oct-2001	rearnsha	branches: 1.5.2; Add new spl level -- _SPL_STATCLOCK.
1.4	21-Apr-2001	bjh21	branches: 1.4.2; 1.4.6; Multiple-inclusion protection.
1.3	13-Apr-2001	thorpej	Remove the use of splimp() from the NetBSD kernel. splnet() and only splnet() is allowed for the protection of data structures used by network devices.
1.2	31-Mar-2001	toshii	Increase spl_masks[] size by one and set the extra element to 0. irq_entry accesses here.
1.1	23-Feb-2001	reinoud	branches: 1.1.2; 1.1.4; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.4.4	23-Apr-2001	bouyer	Sync with HEAD.
1.1.4.3	21-Apr-2001	bouyer	Sync with HEAD
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file psl.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.1.2.2	21-Jun-2001	nathanw	Catch up to -current.
1.1.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.4.6.1	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.4.2.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.5.2.2	27-Oct-2001	rearnsha	Add new spl level -- _SPL_STATCLOCK.
1.5.2.1	27-Oct-2001	rearnsha	file psl.h was added on branch nathanw_sa on 2001-10-27 16:37:25 +0000
1.6.50.3	21-Sep-2006	yamt	implement splraiseipl for hpcarm, shark, and acorn32.
1.6.50.2	21-Sep-2006	yamt	revert the previous which was committed unintentionally.
1.6.50.1	21-Sep-2006	yamt	* empty log message *
1.6.48.1	12-Jan-2007	ad	Sync with head.
1.6.18.5	21-Jan-2008	yamt	sync with head
1.6.18.4	07-Dec-2007	yamt	sync with head
1.6.18.3	03-Sep-2007	yamt	sync with head.
1.6.18.2	26-Feb-2007	yamt	sync with head.
1.6.18.1	30-Dec-2006	yamt	sync with head.
1.7.2.2	12-Mar-2007	rmind	Sync with HEAD.
1.7.2.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.10.10.1	03-Oct-2007	garbled	Sync with HEAD
1.10.4.1	11-Jul-2007	mjf	Sync with head.
1.10.2.3	03-Dec-2007	ad	Sync with HEAD.
1.10.2.2	20-Aug-2007	ad	Sync with HEAD.
1.10.2.1	15-Jul-2007	ad	Sync with head.
1.11.8.2	09-Dec-2007	jmcneill	Sync with HEAD.
1.11.8.1	09-Aug-2007	jmcneill	Sync with HEAD.
1.11.6.4	28-Feb-2008	rjs	Sync with HEAD.
1.11.6.3	26-Dec-2007	rjs	Sync with HEAD.
1.11.6.2	01-Nov-2007	rjs	Sync with HEAD.
1.11.6.1	31-Jul-2007	rjs	Don't include softintr.h. Remove _P() usage.
1.11.4.1	15-Aug-2007	skrll	Sync with HEAD.
1.12.4.2	28-Jan-2008	matt	Given the that there are only 4 IPLs (ignoring soft IPLs), a number of cleanups can be done: Remove _SPL_* aliases. Don't store irqmasks in ci_cpl, just make it an ipl level. Add fast softint switching support.
1.12.4.1	09-Jan-2008	matt	sync with HEAD
1.12.2.2	20-Jan-2008	chris	Sync to HEAD.
1.12.2.1	01-Jan-2008	chris	Sync with HEAD.
1.13.2.2	18-Feb-2008	mjf	Sync with HEAD.
1.13.2.1	08-Dec-2007	mjf	Sync with HEAD.
1.14.6.1	08-Jan-2008	bouyer	Sync with HEAD
1.15.10.2	04-May-2009	yamt	sync with head.
1.15.10.1	16-May-2008	yamt	sync with head.
1.15.8.2	17-Jun-2008	yamt	sync with head.
1.15.8.1	18-May-2008	yamt	sync with head.
1.15.6.2	29-Jun-2008	mjf	Sync with HEAD.
1.15.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.16.4.1	18-Jun-2008	simonb	Sync with head.
1.16.2.1	23-Jun-2008	wrstuden	Sync w/ -current. 34 merge conflicts to follow.
1.17.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.17.4.1	03-Mar-2009	skrll	Sync with HEAD.
1.18.22.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.18.14.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.18.14.1	30-Oct-2012	yamt	sync with head
1.19.4.1	18-May-2014	rmind	sync with head
1.19.2.2	03-Dec-2017	jdolecek	update from HEAD
1.19.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.20.6.1	19-Mar-2016	skrll	Sync with HEAD
1.23	04-May-2020	joerg	Prevent double definition of pt_entry_t from machine/param.h
1.22	02-Feb-2020	skrll	G/C L1_TABLE_SIZE_REAL
1.21	18-Jan-2020	skrll	Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) by creating a new pool l1ttpl for the userland L1 translation table which needs to be 8KB and 8KB aligned. Limit the pool to maxproc and add hooks to allow the sysctl changing of maxproc to adjust the pool. This comes at a 5% performance penalty for build.sh -j8 kernel on a Tegra TK1.
1.20	19-Jun-2019	skrll	branches: 1.20.4; Whitespace
1.19	29-Oct-2014	skrll	branches: 1.19.20; Update a comment to reflect ARM ARMv7
1.18	08-Aug-2014	skrll	Comment whitespace.
1.17	08-Aug-2014	skrll	Spell user with an e.
1.16	31-Jul-2014	skrll	Trailing whitespace
1.15	26-Feb-2014	matt	branches: 1.15.2; Add XN bit L2 large pages.
1.14	22-Feb-2014	matt	Add L1_TABLE_SIZE_REAL
1.13	11-Sep-2012	matt	branches: 1.13.2; 1.13.4; Fix the CACHE_MASKs for armv6 to include TEX and S bits. Fix a comment in pte.h
1.12	20-Aug-2012	matt	Add support for mapping SuperSection on armv6 and armv7. These always a domain of 0 so move the kernel from domain 15 to domain 0.
1.11	16-Aug-2012	matt	Add L2_S_SEGSIZE which is the number of bytes that a L2 page table will map.
1.10	10-Mar-2011	bsh	branches: 1.10.4; 1.10.10; 1.10.12; Preliminary ARM11 MPCore support. I have confirmed this commit doesn't affect existing evbarm kernels by comparing binaries.
1.9	16-Jun-2010	jmcneill	branches: 1.9.2; PR port-arm/43299: Support added for igepv2/cortexa8/omap3530 Apply patch from PR, with build fixes. ok skrll, matt
1.8	27-Apr-2008	matt	branches: 1.8.18; 1.8.20; 1.8.22; Merge kernel changes in matt-armv6 to HEAD.
1.7	21-May-2003	thorpej	branches: 1.7.82; 1.7.106; 1.7.108; 1.7.110; Remove #ifdefs supporting the old pmap, switching fully to the new.
1.6	18-Apr-2003	scw	Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems. Some features of the new pmap are: - It allows L1 descriptor tables to be shared efficiently between multiple processes. A typical "maxusers 32" kernel, where NPROC is set to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily with just 4 L1s. This completely solves the problem of running out of contiguous physical memory for allocating new L1s at runtime on a busy system. - Much improved cache/TLB management "smarts". This change ripples out to encompass the low-level context switch code, which is also much smarter about when to flush the cache/TLB, and when not to. - Faster allocation of L2 page tables and associated metadata thanks, in part, to the pool_cache enhancements recently contributed to NetBSD by Wasabi Systems. - Faster VM space teardown due to accurate referenced tracking of L2 page tables. - Better/faster cache-alias tracking. The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel config file, and making the necessary changes to the port-specific initarm() function. Several ports have already been converted and will be committed shortly.
1.5	05-Apr-2002	thorpej	* Rewrite the 32-bit ARM pte.h based on the ARM architecture manual. Significant cleanup, here, including better PTE bit names. * Add XScale PTE extensions (ECC enable, write-allocate cache mode). * Mechanical changes everywhere else to update for new pte.h. While doing this, two bugs (as a result of typos) were fixed in arm/arm32/bus_dma.c evbarm/integrator/int_bus_dma.c
1.4	04-Apr-2002	thorpej	Rename flags that are really part of the pv_entry/mdpage into pmap.h and give them more descriptive names and better comments: * PT_M -> PVF_MOD (page is modified) * PT_H -> PVF_REF (page is referenced) * PT_W -> PVF_WIRED (mapping is wired) * PT_Wr -> PVF_WRITE (mapping is writable) * PT_NC -> PVF_NC (mapping is non-cacheable; multiple mappings)
1.3	03-Apr-2002	reinoud	In analogy to L2_LPAGE_SIZE add L2_SPAGE_SIZE ....
1.2	02-Mar-2002	chris	Update the types, pt_entry and pd_entry should be unsigned, and fixed at 32 bits.
1.1	23-Nov-2001	thorpej	branches: 1.1.2; 1.1.4; - Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.1.4.4	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.1.4.3	16-Mar-2002	jdolecek	Catch up with -current.
1.1.4.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.1	23-Nov-2001	thorpej	file pte.h was added on branch kqueue on 2002-01-10 19:37:56 +0000
1.1.2.4	17-Apr-2002	nathanw	Catch up to -current.
1.1.2.3	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.1.2.2	08-Jan-2002	nathanw	Catch up to -current.
1.1.2.1	23-Nov-2001	nathanw	file pte.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.7.110.2	11-Aug-2010	yamt	sync with head.
1.7.110.1	16-May-2008	yamt	sync with head.
1.7.108.1	18-May-2008	yamt	sync with head.
1.7.106.1	02-Jun-2008	mjf	Sync with HEAD.
1.7.82.2	09-Nov-2007	matt	Make all the evbarm kernels build again. Fix lossage from rebase.
1.7.82.1	28-Aug-2007	matt	Add ArmV6 pte/pde extensions.
1.8.22.2	21-Apr-2011	rmind	sync with head
1.8.22.1	03-Jul-2010	rmind	sync with head
1.8.20.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.8.18.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.9.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.10.12.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.10.10.1	08-Feb-2013	riz	sys/arch/arm/include/arm32/pte.h 1.11 sys/arch/evbarm/marvell/marvell_machdep.c 1.19 via patch Switch to ARM_VECTORS_HIGH for Sheeva CPU. [msaitoh, ticket #785]
1.10.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.10.4.1	30-Oct-2012	yamt	sync with head
1.13.4.1	18-May-2014	rmind	sync with head
1.13.2.2	03-Dec-2017	jdolecek	update from HEAD
1.13.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.15.2.1	10-Aug-2014	tls	Rebase.
1.19.20.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.19.20.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.20.4.2	29-Feb-2020	ad	Sync with head.
1.20.4.1	25-Jan-2020	ad	Sync with head.
1.2	14-Mar-2009	dsl	Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.136; 1.1.144; 1.1.150; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.150.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.1.144.1	28-Apr-2009	skrll	Sync with HEAD.
1.1.136.1	04-May-2009	yamt	sync with head.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file rtc.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.2	14-Jul-2001	matt	branches: 1.2.6; Make <sysarch.h> valid for all arm platforms. Adjust/remove port-specific includes as required.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.6; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.6.1	03-Aug-2001	lukem	update to -current
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file sysarch.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.2.6.2	14-Jul-2001	matt	Make <sysarch.h> valid for all arm platforms. Adjust/remove port-specific includes as required.
1.2.6.1	14-Jul-2001	matt	file sysarch.h was added on branch nathanw_sa on 2001-07-14 00:23:11 +0000
1.13	11-Feb-2020	skrll	G/C
1.12	24-Jan-2018	skrll	branches: 1.12.4; 1.12.10; Remove port-acorn26 OK core@
1.11	07-May-2013	matt	Move #define __HAVE_OLD_DISKLABEL to <arm/types.h>
1.10	07-May-2013	matt	Make all ports use a common disklabel.h with MAXPARTITIONS set to 16. Only RAW_PART varies between ports.
1.9	07-Jul-2010	chs	implement cpu_lwp_setprivate() on several platforms.
1.8	21-May-2003	thorpej	branches: 1.8.110; 1.8.130; 1.8.132; Remove #ifdefs supporting the old pmap, switching fully to the new.
1.7	18-Apr-2003	scw	Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems. Some features of the new pmap are: - It allows L1 descriptor tables to be shared efficiently between multiple processes. A typical "maxusers 32" kernel, where NPROC is set to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily with just 4 L1s. This completely solves the problem of running out of contiguous physical memory for allocating new L1s at runtime on a busy system. - Much improved cache/TLB management "smarts". This change ripples out to encompass the low-level context switch code, which is also much smarter about when to flush the cache/TLB, and when not to. - Faster allocation of L2 page tables and associated metadata thanks, in part, to the pool_cache enhancements recently contributed to NetBSD by Wasabi Systems. - Faster VM space teardown due to accurate referenced tracking of L2 page tables. - Better/faster cache-alias tracking. The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel config file, and making the necessary changes to the port-specific initarm() function. Several ports have already been converted and will be committed shortly.
1.6	15-Oct-2002	bjh21	Switch to using the MI C versions of setrunqueue() and remrunqueue(). GCC produces almost exactly the same instructions as the hand-assembled versions, albeit in a different order. It even found one place where it could shave one off. Its insistence on creating a stack frame might slow things down marginally, but not, I think, enough to matter.
1.5	07-Oct-2002	thorpej	Add support for restartable atomic sequences on 26-bit ARM. Compile tested only. Now that all ARM systems have RAS, move __HAVE_RAS from arm/arm32/types.h to arm/types.h.
1.4	22-Sep-2002	simonb	Only need to define __HAVE_MD_RUNQUEUE once here...
1.3	22-Sep-2002	gmcgarry	Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives.
1.2	31-Aug-2002	thorpej	Add machine-dependent bits of RAS for arm32.
1.1	22-Nov-2001	thorpej	branches: 1.1.2; 1.1.4; 1.1.12; Add 26-bit and 32-bit types.h files, which indicate the programming model in use for a given platform (__PROG26 vs __PROG32), then pulls in <arm/types.h>. Change each ARM port to pull in <arm/arm26/types.h> or <arm/arm32/types.h> as appropriate. Change all references to PROG26 and PROG32 to __PROG26 and __PROG32. Eliminate the opt_progmode.h header file.
1.1.12.1	31-Aug-2002	gehenna	catch up with -current.
1.1.4.4	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.1.4.3	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.1.4.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.1	22-Nov-2001	thorpej	file types.h was added on branch kqueue on 2002-01-10 19:37:56 +0000
1.1.2.4	18-Oct-2002	nathanw	Catch up to -current.
1.1.2.3	17-Sep-2002	nathanw	Catch up to -current.
1.1.2.2	08-Jan-2002	nathanw	Catch up to -current.
1.1.2.1	22-Nov-2001	nathanw	file types.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.8.132.1	05-Mar-2011	rmind	sync with head
1.8.130.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.8.110.1	11-Aug-2010	yamt	sync with head.
1.12.10.1	29-Feb-2020	ad	Sync with head.
1.12.4.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.1	15-Feb-2014	matt	branches: 1.1.2; file vmpagemd.h was initially added on branch matt-nb5-mips64.
1.1.2.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.58	07-Sep-2024	andvar	spelling and grammar fixes, mainly in comments.
1.57	16-Apr-2023	skrll	branches: 1.57.6; Rename VM_KERNEL_IO_ADDRESS to VM_KERNEL_IO_BASE to match RISC-V It's less letters, matches other similar variables and will help with sharing code between the two architectures. NFCI.
1.56	08-Oct-2020	he	Bump MAXDSIZ from 1536 to 1836. 1836 is 2048-128(MAXTSIZ)-64(MAXSSIZ). Gives us a fighting chance to build rust natively. OK'ed by skrll@
1.55	29-Aug-2020	skrll	Cover the full kernel address range in KASAN
1.54	11-Jul-2020	skrll	Fix ARM builds
1.53	10-Jul-2020	skrll	Remove stray #else / #endif block in KASAN support commit
1.52	10-Jul-2020	skrll	Oops... deal with a last minute #define name change. KASAN support now builds.
1.51	10-Jul-2020	skrll	Add support for KASAN on ARMv[67] Thanks to maxv for many pointers and reviews.
1.50	10-Jul-2020	skrll	Do previous differently for now
1.49	08-Jul-2020	skrll	Provide some KVA layout #defines in arm32/vmparam.h and simplify fdt/platform.h as a nice side effect
1.48	08-Jul-2020	skrll	Remove an unnecessary #ifdef
1.47	13-Jan-2020	christos	Revert previous; we don't want arm to have variable page size. Instead nick@ is fixing the cache pages issue to use a separate pool.
1.46	11-Jan-2020	christos	Define the min and max page size supported for the benefit of jemalloc
1.45	19-Jun-2019	skrll	branches: 1.45.2; 1.45.4; Update a comment
1.44	30-Mar-2019	christos	Need to include <sys/cdefs.h> so that the _ARM_CPU* macros get defined so that we always select the correct page size (8K for armv6+).
1.43	27-Mar-2019	christos	- expose vmparams to userland on arm, like other archs do. - remove unneeded includes
1.42	27-Oct-2018	skrll	Trailing whitespace
1.41	13-Feb-2017	skrll	branches: 1.41.12; 1.41.14; G/C VM_MAX_KERNEL_BUF
1.40	18-Oct-2015	jmcneill	branches: 1.40.2; 1.40.4; pull in arm/arm32/param.h
1.39	20-Jun-2015	skrll	__USE_TOPDOWN_VM Fixes PR/49974: mmap(2) of large anonymous regions is broken "go for it" from matt@
1.38	02-Jun-2015	matt	Back off MAXDSIZ to 1.5GB to avoid some virtual memory exhausted messages.
1.37	28-May-2015	matt	ARM systems are no longer small, increase MAXTSIZ/MAXDSIZ/MAXSSIZ.
1.36	24-Feb-2015	joerg	Restore PAGER_MAP_DEFAULT_SIZE for ARMv4, they typically have only 256MB KVA.
1.35	27-Jul-2014	skrll	branches: 1.35.4; More fixes as a step towards ARM_MMU_EXTENDED on RPI. - don't set CPU_CONTROL_SYST_ENABLE in arm11x6_setup for ARM_MMU_EXTENDED - Use the new MMU defines for V6N - pull in arm/cpuconf.h in vmparam s that VM_MAXUSER_ADDRESS gets set correctly.
1.34	31-Mar-2014	matt	branches: 1.34.2; For ARM_MMU_EXTENDED, a KERNEL_BASE >= 0x80000000 is ok but a VM_USER_MAXADDRESS can not be more than 0x80000000 - PAGE_SIZE.
1.33	26-Feb-2014	martin	Revert previous - will fix userland with new sysctls for VM_MIN_ADDRESS/ VM_MAXADDESS.
1.32	26-Feb-2014	martin	Include param.h here - userland expects VM_* defines to work with just this include, but PAGE_SIZE relies on PGSHIFT now, which is not defined here. Matt: please rearrange/cleanup differently if you prefer (but test build src/tests/lib/libc/sys/t_mlock for example.)
1.31	26-Feb-2014	matt	Use PAGE_SIZE instead of 1000
1.30	21-Feb-2014	skrll	Remove unnecessary include of sys/simplelock.h
1.29	27-Feb-2013	matt	branches: 1.29.6; Define PAGESHIFT using PGSHIFT
1.28	25-Feb-2013	matt	Bump max text/data/stack sizes to more reasonable values.
1.27	16-Aug-2012	matt	branches: 1.27.2; Tweak max addresses a bit so that [r1, #off] can't overflow them.
1.26	16-Feb-2012	christos	expose stuff that crash needs to kmemuser
1.25	14-Nov-2010	uebayasi	branches: 1.25.8; 1.25.12; 1.25.16; Move struct vm_page_md definition from vmparam.h to pmap.h, because it's used only by pmap. vmparam.h has definitions for wider audience. All GENERIC kernels build tested, except ia64. powerpc/include/booke/vmparam.h has one too, but it has no pmap.h, so it's left as is.
1.24	06-Mar-2009	joerg	branches: 1.24.2; 1.24.4; Remove SHMMAXPGS from all kernel configs. Dynamically compute the initial limit as 1/4 of the physical memory. Ensure the limit is at least 1024 pages, the old default on most platforms.
1.23	06-Aug-2008	matt	branches: 1.23.2; 1.23.8; 1.23.12; Change pv_entries to use SLIST. For VIPT caches, keep track of when pages are dirty so that their content can be flushed back to main memory. This is done when the page is read-only mapped by more than 1 color. Pages become when either their modified bit gets set or an unmanaged writeable page is mapped. When a page in unmapped or changed to read-only, run pmap_vac_me_harder in case the page can be mapped read-only. Thanks are given to Imre Deak for giving me the idea to assert for PVF_DIRTY.
1.22	27-Apr-2008	matt	branches: 1.22.2; 1.22.6; Merge kernel changes in matt-armv6 to HEAD.
1.21	04-Jan-2008	ad	branches: 1.21.6; 1.21.8; 1.21.10; Header cleanup.
1.20	06-Jan-2007	christos	branches: 1.20.20; 1.20.24; 1.20.26; 1.20.32; 1.20.38; From Scott Alan in http://mail-index.netbsd.org/port-arm/2006/07/26/0000.html This one is really simple. I wanted to use KERNEL_BASE in an assembly source, but arch/arm/include/arm32/vmparam.h wasn't protected by #ifndef __ASSEMBLER__. The patch adds the protection.
1.19	22-May-2003	thorpej	branches: 1.19.18; 1.19.48; 1.19.54; Use virtual_avail and virtual_end to compute the size of the available kernel VM space for VM_MAX_KERNEL_BUF, and move the definition into generic ARM code.
1.18	21-May-2003	thorpej	Remove #ifdefs supporting the old pmap, switching fully to the new.
1.17	04-May-2003	thorpej	VM_{MIN,MAX}* are now the same for ARM32_PMAP_NEW with both new and old VM layout, so merge the two cases.
1.16	03-May-2003	thorpej	Don't expose KERNEL_TEXT_BASE outside of board-specific code. This gives individual board start-up code more flexibility about where the kernel starts in the kernel address space.
1.15	02-May-2003	thorpej	Don't need to reserve a page of space before KERNEL_BASE in the ARM32_NEW_VM_LAYOUT case.
1.14	02-May-2003	thorpej	Eliminate PTE_BASE and the PT-PT completely in the ARM32_PMAP_NEW case. Also in the ARM32_PMAP_NEW case, reclaim the USPACE-bytes of wasted space at the top of the user address that hasn't been needed for a very very long time.
1.13	18-Apr-2003	scw	Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems. Some features of the new pmap are: - It allows L1 descriptor tables to be shared efficiently between multiple processes. A typical "maxusers 32" kernel, where NPROC is set to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily with just 4 L1s. This completely solves the problem of running out of contiguous physical memory for allocating new L1s at runtime on a busy system. - Much improved cache/TLB management "smarts". This change ripples out to encompass the low-level context switch code, which is also much smarter about when to flush the cache/TLB, and when not to. - Faster allocation of L2 page tables and associated metadata thanks, in part, to the pool_cache enhancements recently contributed to NetBSD by Wasabi Systems. - Faster VM space teardown due to accurate referenced tracking of L2 page tables. - Better/faster cache-alias tracking. The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel config file, and making the necessary changes to the port-specific initarm() function. Several ports have already been converted and will be committed shortly.
1.12	02-Apr-2003	thorpej	Use PAGE_SIZE rather than NBPG.
1.11	10-Dec-2002	thorpej	Use __LDPGSZ (which must be == USRTEXT) as the text address for a.out executables, and eliminate the USRTEXT constant, which was only used by the a.out exec code.
1.10	09-Aug-2002	thorpej	Add some code, conditional on PMAP_ALIAS_DEBUG, that can be used to hunt for virtual aliases between managed (pmap_enter) and non-managed (pmap_kenter_pa) mappings.
1.9	23-Mar-2002	thorpej	branches: 1.9.2; 1.9.4; KERNEL_SPACE_START -> KERNEL_BASE
1.8	23-Mar-2002	thorpej	* Rename PROCESS_PAGE_TBLS_BASE -> PTE_BASE * Rename ALT_PAGE_TBLS_BASE -> APTE_BASE * Garbage-collect PAGE_TABLE_SPACE_START
1.7	05-Mar-2002	thorpej	Switch back to using vm_page_md (thanks chuq for finding the bug in the code that made it unstable before!)
1.6	03-Mar-2002	chris	Implement pmap_growkernel for arm32 based ports. Note that this has been compiled on some systems, cats, IQ80310, IPAQ, netwinder and shark (note that shark's build is currently broken due to other reasons), but only actually run on cats. Shark doesn't make use of the functionality as I believe there has to be a correlation between OFW and the kernel tables so that calls into OFW work.
1.5	06-Feb-2002	thorpej	Back out all the vm_page_md changes. They are causing some mysterious problems (a similar change to the i386 pmap causes mysterious problems there, as well), and the issue needs to be investigated more.
1.4	05-Feb-2002	thorpej	Use vm_page_md rather than pmap_physseg. Saves lots of cycles in common operations.
1.3	23-Nov-2001	thorpej	branches: 1.3.2; Move even more constants into the shared 32-bit vmparam.h header. Cleanup elsewhere will have to be done before we can sanitize this header any further.
1.2	23-Nov-2001	thorpej	- Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.1	11-Nov-2001	thorpej	branches: 1.1.2; 1.1.4; Even though the ARM architecture defines large, standard, and small pages, we use the standard (4K) page size as PAGE_SIZE. Make the PAGE_SIZE related variables compile-time constants that reflect this. Results in a bit over 2K worth of .text savings, and visibly better code in the places that use PAGE_SIZE, etc.
1.1.4.6	11-Dec-2002	thorpej	Sync with HEAD.
1.1.4.5	13-Aug-2002	nathanw	Catch up to -current.
1.1.4.4	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.1.4.3	28-Feb-2002	nathanw	Catch up to -current.
1.1.4.2	08-Jan-2002	nathanw	Catch up to -current.
1.1.4.1	11-Nov-2001	nathanw	file vmparam.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.1.2.2	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.1.2.1	11-Nov-2001	thorpej	file vmparam.h was added on branch thorpej-mips-cache on 2001-11-12 21:16:33 +0000
1.3.2.6	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.3.2.5	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.3.2.4	16-Mar-2002	jdolecek	Catch up with -current.
1.3.2.3	11-Feb-2002	jdolecek	Sync w/ -current.
1.3.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.3.2.1	23-Nov-2001	thorpej	file vmparam.h was added on branch kqueue on 2002-01-10 19:37:57 +0000
1.9.4.1	07-Dec-2002	he	Pull up revision 1.10 (requested by thorpej in ticket #714): Add code, conditional on PMAP_ALIAS_DEBUG, which can be used to hunt for virtual aliases between managed (pmap_enter) and unmanaged (pmap_kenter_pa) mappings.
1.9.2.1	30-Aug-2002	gehenna	catch up with -current.
1.19.54.1	21-Feb-2007	snj	branches: 1.19.54.1.4; Pull up following revision(s) (requested by matt in ticket #457): sys/arch/arm/include/arm32/vmparam.h: revision 1.20 From Scott Allan in http://mail-index.netbsd.org/port-arm/2006/07/26/0000.html This one is really simple. I wanted to use KERNEL_BASE in an assembly source, but arch/arm/include/arm32/vmparam.h wasn't protected by #ifndef __ASSEMBLER__. The patch adds the protection.
1.19.54.1.4.1	10-Nov-2007	matt	Add AT91 support from Sami Kantoluoto Add TI OMAP2430 support from Marty Fouts @ Danger Inc
1.19.48.1	12-Jan-2007	ad	Sync with head.
1.19.18.2	21-Jan-2008	yamt	sync with head
1.19.18.1	26-Feb-2007	yamt	sync with head.
1.20.38.1	08-Jan-2008	bouyer	Sync with HEAD
1.20.32.1	18-Feb-2008	mjf	Sync with HEAD.
1.20.26.2	09-Jan-2008	matt	sync with HEAD
1.20.26.1	12-Oct-2007	matt	Import TI OMAP 2430 and ARM11/ARMv6 support. Now on ARMv6, the cache is no longer purged on context switches.
1.20.24.1	20-Jan-2008	chris	Sync to HEAD.
1.20.20.1	28-Feb-2008	rjs	Sync with HEAD.
1.21.10.2	04-May-2009	yamt	sync with head.
1.21.10.1	16-May-2008	yamt	sync with head.
1.21.8.1	18-May-2008	yamt	sync with head.
1.21.6.2	28-Sep-2008	mjf	Sync with HEAD.
1.21.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.22.6.1	19-Oct-2008	haad	Sync with HEAD.
1.22.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.23.12.2	24-Mar-2014	matt	Deal with those arms who only need one type of freelist.
1.23.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.23.8.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.23.2.1	28-Apr-2009	skrll	Sync with HEAD.
1.24.4.1	05-Mar-2011	rmind	sync with head
1.24.2.3	15-Nov-2010	uebayasi	Sync with HEAD.
1.24.2.2	23-Feb-2010	uebayasi	Pass struct vm_page_md * to VM_MDPAGE_INIT(), not struct vm_page *.
1.24.2.1	09-Feb-2010	uebayasi	Kill vm_page::phys_addr.
1.25.16.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.25.12.1	18-Feb-2012	mrg	merge to -current.
1.25.8.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.25.8.2	30-Oct-2012	yamt	sync with head
1.25.8.1	17-Apr-2012	yamt	sync with head
1.27.2.3	03-Dec-2017	jdolecek	update from HEAD
1.27.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.27.2.1	23-Jun-2013	tls	resync from head
1.29.6.1	18-May-2014	rmind	sync with head
1.34.2.1	10-Aug-2014	tls	Rebase.
1.35.4.5	28-Aug-2017	skrll	Sync with HEAD
1.35.4.4	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.35.4.3	22-Sep-2015	skrll	Sync with HEAD
1.35.4.2	06-Jun-2015	skrll	Sync with HEAD
1.35.4.1	06-Apr-2015	skrll	Sync with HEAD
1.40.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.40.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.41.14.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.41.14.1	10-Jun-2019	christos	Sync with HEAD
1.41.12.1	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.45.4.1	17-Jan-2020	ad	Sync with head.
1.45.2.1	08-Oct-2020	martin	Pull up following revision(s) (requested by he in ticket #1105): sys/arch/arm/include/arm32/vmparam.h: revision 1.56 Bump MAXDSIZ from 1536 to 1836. 1836 is 2048-128(MAXTSIZ)-64(MAXSSIZ). Gives us a fighting chance to build rust natively. OK'ed by skrll@
1.57.6.1	02-Aug-2025	perseant	Sync with HEAD
1.1	01-May-2013	matt	branches: 1.1.4; 1.1.12; Pickup fenv.h from a common location since it's only used from userland and the kernel will never include it.
1.1.12.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.1.12.1	01-May-2013	yamt	file fenv.h was added on branch yamt-pagecache on 2014-05-22 11:39:33 +0000
1.1.4.2	23-Jun-2013	tls	resync from head
1.1.4.1	01-May-2013	tls	file fenv.h was added on branch tls-maxphys on 2013-06-23 06:20:00 +0000

OpenGrok