Cross Reference: /src/sys/arch/arm/include/arm32

History log of /src/sys/arch/arm/include/arm32
Revision	Date	Author	Comments
1.10	25-Oct-2014	skrll	Remove katelib.h and references to it. {Read,Write}{Word,Byte} macros are provided in the files that still use them. Someone(tm) should convert them to bus_space(9)
1.9	26-Nov-2002	lukem	branches: 1.9.158; Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.
1.8	23-Nov-2001	thorpej	- Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.7	22-Nov-2001	thorpej	Add 26-bit and 32-bit types.h files, which indicate the programming model in use for a given platform (__PROG26 vs __PROG32), then pulls in <arm/types.h>. Change each ARM port to pull in <arm/arm26/types.h> or <arm/arm32/types.h> as appropriate. Change all references to PROG26 and PROG32 to __PROG26 and __PROG32. Eliminate the opt_progmode.h header file.
1.6	03-Sep-2001	matt	branches: 1.6.6; Add a merged <pcb.h> for arm26/arm32.
1.5	14-Jul-2001	matt	Make <sysarch.h> valid for all arm platforms. Adjust/remove port-specific includes as required.
1.4	18-Jun-2001	bjh21	branches: 1.4.2; Move <arm/arm32/bus.h> to <arm/bus.h>, since it looks like it's going to be necessary on arm26 as well.
1.3	10-Mar-2001	rearnsha	branches: 1.3.2; Add param.h to INCS.
1.2	26-Feb-2001	reinoud	branches: 1.2.2; Putting the param.h back into the arm32 resp. hpcarm include directories
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.2.2	21-Jun-2001	nathanw	Catch up to -current.
1.2.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.3.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.3.2.1	10-Mar-2001	bouyer	file Makefile was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000
1.4.2.3	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.4.2.2	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.4.2.1	03-Aug-2001	lukem	update to -current
1.6.6.3	11-Dec-2002	thorpej	Sync with HEAD.
1.6.6.2	08-Jan-2002	nathanw	Catch up to -current.
1.6.6.1	03-Sep-2001	nathanw	file Makefile was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.9.158.1	03-Dec-2017	jdolecek	update from HEAD
1.1	10-Nov-2007	matt	branches: 1.1.2; file arm1136_pmc.h was initially added on branch matt-nb4-arm.
1.1.2.1	10-Nov-2007	matt	Add AT91 support from Sami Kantoluoto Add TI OMAP2430 support from Marty Fouts @ Danger Inc
1.4	18-Jun-2001	bjh21	branches: 1.4.8; Move <arm/arm32/bus.h> to <arm/bus.h>, since it looks like it's going to be necessary on arm26 as well.
1.3	07-Mar-2001	thorpej	branches: 1.3.2; Add the BUS_DMA_STREAMING flag.
1.2	04-Mar-2001	matt	branches: 1.2.2; s/vm_offset_t/vaddr_t/g
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.3.2.2	12-Mar-2001	bouyer	Sync with HEAD.
1.3.2.1	07-Mar-2001	bouyer	file bus.h was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000
1.4.8.2	18-Jun-2001	bjh21	Move <arm/arm32/bus.h> to <arm/bus.h>, since it looks like it's going to be necessary on arm26 as well.
1.4.8.1	18-Jun-2001	bjh21	file bus.h was added on branch nathanw_sa on 2001-06-18 21:37:34 +0000
1.10	03-Jul-2020	jmcneill	Move db_reset_cmd prototype to db_machdep.h (forgot to commit this file)
1.9	28-Mar-2014	matt	Make ddb_registers per-cpu. All switching of CPUs (xxx doesn't work yet).
1.8	01-Mar-2014	matt	Add db_show_tlb_cmd prototype
1.7	05-Jan-2013	christos	branches: 1.7.2; remove show panic cmd
1.6	21-Sep-2012	matt	Add a 'mach fault' command to print DFAR/DFSR/IFAR/IFSR/TTBR
1.5	14-Mar-2009	dsl	branches: 1.5.12; 1.5.20; 1.5.22; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.4	22-Feb-2007	matt	branches: 1.4.48; 1.4.56; 1.4.62; 1.4.66; Fix lossage from boolean_t -> bool and updated x86 bus_dma.
1.3	11-Dec-2005	christos	branches: 1.3.26; merge ktrace-lwp.
1.2	02-Jun-2005	uwe	branches: 1.2.2; Catch up with constification.
1.1	05-Jan-2002	chris	branches: 1.1.2; 1.1.4; 1.1.22; Make some of the arm32 files build with LOOSE_PROTOTYPES not set in the makefile. Turned up a few mismatched functions. Note that this isn't all of the arm32 files. Aim will be to get arm32 kernels built with LOOSE_PROTOTYPES not set.
1.1.22.1	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.1.4.2	11-Jan-2002	nathanw	More catchup.
1.1.4.1	05-Jan-2002	nathanw	file db_machdep.h was added on branch nathanw_sa on 2002-01-11 23:38:04 +0000
1.1.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.2.1	05-Jan-2002	thorpej	file db_machdep.h was added on branch kqueue on 2002-01-10 19:37:55 +0000
1.2.2.1	26-Feb-2007	yamt	sync with head.
1.3.26.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.4.66.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.4.62.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.4.56.1	28-Apr-2009	skrll	Sync with HEAD.
1.4.48.1	04-May-2009	yamt	sync with head.
1.5.22.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.5.22.2	25-Feb-2013	tls	resync with head
1.5.22.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.5.20.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.5.12.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.5.12.2	23-Jan-2013	yamt	sync with head
1.5.12.1	30-Oct-2012	yamt	sync with head
1.7.2.1	18-May-2014	rmind	sync with head
1.48	14-Aug-2020	skrll	Mirror the changes to aarch64 and - Switch to TPIDRPRW_IS_CURLWP, because curlwp is accessed much more often by MI code. It also makes curlwp preemption safe, - Make ASTs operate per-LWP rather than per-CPU, otherwise sometimes LWPs can see spurious ASTs (which doesn't cause a problem, it just means some time may be wasted). - Make sure ASTs are always set on the same CPU as the target LWP, and delivered via IPI if posted from a remote CPU so that they are resolved quickly. - Add some cache line padding to struct cpu_info. - Add a memory barrier in a couple of places where ci_curlwp is set. This is needed whenever an LWP that is resuming on the CPU could hold an adaptive mutex. The barrier needs to drain the CPU's store buffer, so that the update to ci_curlwp becomes globally visible before the LWP can resume and call mutex_exit().
1.47	28-Oct-2018	skrll	Consistency - NFC
1.46	28-Oct-2018	skrll	Remove magic number
1.45	07-Jul-2017	skrll	branches: 1.45.4; 1.45.6; Fixup the non-KDTRACE_HOOKS case of PUSHDTRACEGAP - we need to copy the stack pointer to r2.
1.44	07-Jul-2017	chs	split PUSHFRAMEINSVC into two pieces so that we can insert some additional instructions in the middle in undefinedinstruction_bounce, namely to add some additional space on the stack before the trapframe for undefineds from SVC mode. this extra space allows dtrace to emulate a "push" instruction. the initial version was from me and some improvements were from nick.
1.43	22-Jun-2017	skrll	Trailing whitespace
1.42	17-Apr-2015	matt	Put the clearing of ci_astpending back in frame.h while interrupts are disabled.
1.41	08-Apr-2015	matt	Don't clear CI_ASTPENDING in exception return, do it in ast() instead. Add basic support for __HAVE_PREEMPTION. Use atomic ops for ci_astpending if __HAVE_PREEMPTION is defined. Use kpreempt_disable/kpreempt_enable
1.40	08-Apr-2015	matt	CI_ASTPENDING is now a bitfield and low bit is for user ASTs.
1.39	26-Feb-2014	matt	branches: 1.39.6; Remove KERNEL_LOCK/KERNEL_UNLOCK
1.38	20-Dec-2013	matt	When restoring SPRSR, use spsr_fsxc not spsr_all so bits[23-8] are restored. This should fix use of simd instructions that rely on the GE bits.
1.37	02-Dec-2013	joerg	Don't use cpsr_all/spsr_all with mrs, it doesn't take a mask.
1.36	18-Aug-2013	matt	Use blx ip if _ARM_ARCH_5 prepare to get of switchframe
1.35	21-Oct-2012	matt	branches: 1.35.2; Change to use symbolic constants from assym.h and fix a typo in a comment.
1.34	21-Oct-2012	matt	Implement a "fast" path for IRQ handling out of the idle loop. Since we are in SVC32 already we only need to save a few registers. Processing is also simplified since we know we can't return to user-mode.
1.33	29-Aug-2012	matt	branches: 1.33.2; Use ARMV6+ cpsi{d,f} instructions whenever possible. Use r7 to hold previous mode and avoid recomputing it. Add support for obtaining kernel_lock on exception entry and exit.
1.32	25-Aug-2012	matt	Fix typo.
1.31	16-Aug-2012	matt	small rototill. pcb_flags is dead. PCB_NOALIGNFLT is now in stored l_md.md_flags as MDLWP_NOALIGNFLT. This avoids a few loads of the PCB in exception handling. pcb_tf has been moved to l_md.md_tf. Again this avoids a lot of pcb references just to access or set this. It also means that pcb doesn't need to accessed by MI code. Move pcb_onfault to after the pcb union. Add pcb_sp macro to make code prettier. Add lwp_settrapframe(l, tf) to set the l_md.md_tf field. Use lwp_trapframe to access it (was process_frame but that name was changed in a previous commit). Kill off curpcb in acorn26. Kill the checks for curlwp being NULL. Move TRAP_USERMODE from arm32/fault.c to frame.h and a __PROG26 version. Replace tests for usermode with that macro.
1.30	02-Aug-2012	skrll	Remove irqframe and replace with identical trapframe.
1.29	01-Aug-2012	matt	Move fill to between spsr and r0 so that the registers will be dword aligned. Adjust PUSH/PULL macros accordingly.
1.28	01-Aug-2012	matt	Shrink PUSHFRAMEINSVC by 4 more instructions.
1.27	31-Jul-2012	matt	Add code to make sure the trapframe is aligned to a doubleword boundary.
1.26	31-Jul-2012	matt	Only do the SA110 user register save workaround on kernel using SA110s.
1.25	31-Jul-2012	matt	Make trapframe/irqframe an even number of words (make adjustments for the filler word). Improve the comments in PUSH/PULL macros. Use the armv6+ CPS instruction if we can.
1.24	31-Jul-2012	matt	whitespace cleanup
1.23	18-Jan-2009	bjh21	branches: 1.23.14; 1.23.22; Now that GET_CURPCB and GET_CURCPU are generally available, use them unconditionally rather than rolling our own (often badly) all over the place.
1.22	17-Jan-2009	bjh21	Clear out the vestigial support for the Simtec Hydra board. Now that we're getting support for proper SMP ARMs, keeping non-functional support for a seriously crippled not-really-SMP system is likely to cause more problems than it's worth, even if it was fun for a while.
1.21	19-Nov-2008	matt	Fix __HAVE_FAST_SOFTINTS (boolean dyslexia strikes again). Add some KASSERTS to make sure assumptions are valid.
1.20	26-Oct-2008	matt	branches: 1.20.2; 1.20.8; Fix DO_PENDING_SOFTINTS (remove pasto, remove a branch, use movs) pasto spotted by mjf
1.19	07-Aug-2008	matt	Only call dosoftints() is ci_intr_depth == 0
1.18	07-Aug-2008	matt	Do fast softint processing in DO_AST_AND_RESTORE_ALIGNMENT_FAULTS. Redo the softint mask so ci_softints >> ci_cpl != 0 becomes an easy test for work to be done.
1.17	27-Apr-2008	matt	branches: 1.17.2; 1.17.6; Merge kernel changes in matt-armv6 to HEAD.
1.16	12-Jan-2008	skrll	branches: 1.16.6; 1.16.8; 1.16.10; Push a switchframe in dumpsys and cpu_switchto, but as dumpsys calls other funcs a switchframe needs to be a multiple of 8 bytes. Stash sp as well in the switchframe to bump it to 24bytes. Setup the switchframe appropriately in cpu_lwp_fork. Remove savectx - nothing uses it. All of this make gdb's life much easier when dealing with crash dumps and live kernels. Reviewd by chris.
1.15	09-Mar-2007	thorpej	branches: 1.15.8; 1.15.16; 1.15.20; 1.15.22; 1.15.28; 1.15.34; Rewrite the ARM mutex implementation to be of the simple-mutex variety. Because pre-v6 ARM lacks support for an atomic compare-and-swap, we implement _lock_cas() as a restartable atomic squence that is checked in the IRQ handler right before AST processing. (This is safe because, for all practical purposes, there are no SMP pre-v6 ARM systems.) This can serve as a model for other non-MP platforms that lack the necessary atomic operations for mutexes (SuperH, for example). Upshots of this change: - kmutex_t is now down to 8 bytes on ARM; about as good as we can get. - ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes. The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK. That is left as an exercise for the port maintainer. Reviewed and tested by Matt Thomas.
1.14	27-Sep-2006	manu	branches: 1.14.4; - Document COMPAT_15 as doing nothing - Add COMPAT_15 to all the kernel that had COMPAT_14, for the sake of coherency - Remove the only occurences of #ifdef COMPAT_15 in the tree: for the ARM ports, COMPAT_15 was always used in conjunction with EXEC_AOUT. Only EXEC_AOUT matters here. This address kern/18407
1.13	11-Dec-2005	christos	branches: 1.13.20; 1.13.22; merge ktrace-lwp.
1.12	11-Aug-2005	cube	Change all archs that did: #define clockframe somethingelse to: struct clockframe { struct somethingelse cf_se; }; and change access macros accordingly. That means that, at least for that very issue, things will not go ka-boomy if you don't have the actual definition of struct clockframe before including systm.h.
1.11	27-Apr-2004	scw	branches: 1.11.12; Always disable interrupts at the start of DO_AST_AND_RESTORE_ALIGNMENT_FAULTS. This addresses #2 of port-arm/23581 by Richard Earnshaw. Many thanks to Richard for spotting the cause of this problem.
1.10	15-Dec-2003	scw	branches: 1.10.2; The last cpsr_all change was misguided. Just use cpsr_c wherever possible.
1.9	01-Dec-2003	scw	- For consistency, use cpsr_all instead of cpsr. - Make sure IRQs are enabled before handling ASTs.
1.8	14-Nov-2003	scw	Slight re-org of the alignment/ast exit macro to better mimic the original behaviour WRT cpsr/I32_bit handling.
1.7	30-Oct-2003	scw	Move the alignment fault enable/disable code into macroes to avoid needless duplication. Additionally, merge AST handling into the same code. exception.S and the generic irq_dispatch.S routines have been updated to use the macroes. XXX: I have patches for the non-generic IRQ dispatch routines, but they need testing by someone with hardware.
1.6	23-Oct-2003	scw	Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop instead. With this change, we no longer need to save the current interrupt level in the switchframe. This is no great loss since both cpu_switch and cpu_switchto are always called at splsched, so the process' spl is effectively saved somewhere in the callstack. This fixes an evbarm problem reported by Allen Briggs: lwp gets into sa_switch -> mi_switch with newl != NULL when it's the last element on the runqueue, so it hits the second bit of: if (newl == NULL) { retval = cpu_switch(l, NULL); } else { remrunqueue(newl); cpu_switchto(l, newl); retval = 0; } mi_switch calls remrunqueue() and cpu_switchto() cpu_switchto unlocks the sched lock cpu_switchto drops CPU priority softclock is received schedcpu is called from softclock schedcpu hits the first if () {} block here: if (l->l_priority >= PUSER) { if (l->l_stat == LSRUN && (l->l_flag & L_INMEM) && (l->l_priority / PPQ) != (l->l_usrpri / PPQ)) { remrunqueue(l); l->l_priority = l->l_usrpri; setrunqueue(l); } else l->l_priority = l->l_usrpri; } Since mi_switch has already run remrunqueue, the LWP has been removed, but it's not been put back on any queue, so the remrunqueue panics.
1.5	19-Oct-2002	bjh21	branches: 1.5.2; 1.5.8; Undo recent cpu_switch register usage changes in order to decrease nathanw_sa merge pain.
1.4	18-Oct-2002	bjh21	In cpu_switch(), stack more registers at the start of the function, and hence save fewer into the PCB. This should give me enough free registers in cpu_switch to tidy things up and support MULTIPROCESSOR properly. While we're here, make the stacked registers into an APCS stack frame, so that DDB backtraces through cpu_switch() will work. This also affects cpu_fork(), which has to fabricate a switchframe and PCB for the new process.
1.3	14-Aug-2002	thorpej	Use cpsr_c rather then cpsr_all where appropriate.
1.2	31-Aug-2001	simonb	branches: 1.2.6; 1.2.14; Use comments around the token after a #endif.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.6; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.6.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.1.6.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file frame.h was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000
1.2.14.1	30-Aug-2002	gehenna	catch up with -current.
1.2.6.2	19-Aug-2002	thorpej	Partial (ARM only) sync with trunk -- significant performance improvements for XScale-based systems.
1.2.6.1	31-Aug-2001	thorpej	file frame.h was added on branch nathanw_sa on 2002-08-19 21:39:17 +0000
1.5.8.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.5.8.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.5.8.2	18-Sep-2004	skrll	Sync with HEAD.
1.5.8.1	03-Aug-2004	skrll	Sync with HEAD
1.5.2.2	19-Oct-2002	bjh21	Re-do the following revisions, this time on a branch where they won't interfere with the nathanw_sa merge: syssrc/sys/arch/arm/arm32/cpuswitch.S 1.26 syssrc/sys/arch/arm/arm32/genassym.cf 1.18 syssrc/sys/arch/arm/arm32/vm_machdep.c 1.21 syssrc/sys/arch/arm/include/pcb.h 1.5 Original commit message: In cpu_switch(), stack more registers at the start of the function, and hence save fewer into the PCB. This should give me enough free registers in cpu_switch to tidy things up and support MULTIPROCESSOR properly. While we're here, make the stacked registers into an APCS stack frame, so that DDB backtraces through cpu_switch() will work. This also affects cpu_fork(), which has to fabricate a switchframe and PCB for the new process.
1.5.2.1	19-Oct-2002	bjh21	file frame.h was added on branch bjh21-hydra on 2002-10-19 11:59:37 +0000
1.10.2.1	29-Apr-2004	jmc	Pullup rev 1.11 (requested by scw in ticket #209) Always disable interrupts at the start of DO_AST_AND_RESTORE_ALIGNMENT_FAULTS. PR#23581
1.11.12.4	21-Jan-2008	yamt	sync with head
1.11.12.3	03-Sep-2007	yamt	sync with head.
1.11.12.2	30-Dec-2006	yamt	sync with head.
1.11.12.1	21-Jun-2006	yamt	sync with head.
1.13.22.1	22-Oct-2006	yamt	sync with head
1.13.20.1	18-Nov-2006	ad	Sync with head.
1.14.4.1	12-Mar-2007	rmind	Sync with HEAD.
1.15.34.1	19-Jan-2008	bouyer	Sync with HEAD
1.15.28.1	18-Feb-2008	mjf	Sync with HEAD.
1.15.22.3	23-Mar-2008	matt	sync with HEAD
1.15.22.2	30-Aug-2007	matt	Move GET_CURCPU before the branch in ENABLE_ALIGNMENT_FAULTS.
1.15.22.1	28-Aug-2007	matt	Rototill to deal with curpcb/astpending/etc moves to cpu_info. Make ENABLE_ALIGNMENTS_FAULT leave cpu_info in r4. DO_AST_AND_RESTORE_ALIGNMENT_FAULTS takes advantage of r4 being cpu_info.
1.15.20.1	20-Jan-2008	chris	Sync to HEAD.
1.15.16.1	28-Feb-2008	rjs	Sync with HEAD.
1.15.8.1	18-Apr-2007	thorpej	Remove _lock_cas() in favor of atomic_cas_32().
1.16.10.2	04-May-2009	yamt	sync with head.
1.16.10.1	16-May-2008	yamt	sync with head.
1.16.8.1	18-May-2008	yamt	sync with head.
1.16.6.3	17-Jan-2009	mjf	Sync with HEAD.
1.16.6.2	28-Sep-2008	mjf	Sync with HEAD.
1.16.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.17.6.2	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.17.6.1	19-Oct-2008	haad	Sync with HEAD.
1.17.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.20.8.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.20.2.1	19-Jan-2009	skrll	Sync with HEAD.
1.23.22.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.23.14.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.23.14.1	30-Oct-2012	yamt	sync with head
1.33.2.3	03-Dec-2017	jdolecek	update from HEAD
1.33.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.33.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.35.2.2	18-May-2014	rmind	sync with head
1.35.2.1	28-Aug-2013	rmind	sync with head
1.39.6.2	28-Aug-2017	skrll	Sync with HEAD
1.39.6.1	06-Jun-2015	skrll	Sync with HEAD
1.45.6.1	10-Jun-2019	christos	Sync with HEAD
1.45.4.1	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.4	25-Oct-2014	skrll	Remove katelib.h and references to it. {Read,Write}{Word,Byte} macros are provided in the files that still use them. Someone(tm) should convert them to bus_space(9)
1.3	23-Nov-2001	thorpej	branches: 1.3.170; Use <arm/cpufunc.h>, not <machine/cpufunc.h>.
1.2	30-May-2001	bjh21	branches: 1.2.2; 1.2.8; Move the declarations of blockio.S functions from katelib.h to a new, exciting <arm/blockio.h>. katelib.h includes it for compatibility.
1.1	23-Feb-2001	reinoud	branches: 1.1.2; 1.1.4; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file katelib.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.1.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.2.8.2	08-Jan-2002	nathanw	Catch up to -current.
1.2.8.1	30-May-2001	nathanw	file katelib.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.2.2.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.3.170.1	03-Dec-2017	jdolecek	update from HEAD
1.36	02-Apr-2022	skrll	Update to support EFI runtime outside the kernel virtual address space by creating an EFI RT pmap that can be activated / deactivated when required. Adds support for EFI RT to ARM_MMU_EXTENDED (ASID) 32-bit Arm machines. On Arm64 the usage of pmapboot_enter is reduced and the mappings are created much later in the boot process -- now in cpu_startup_hook. Backward compatiblity for KVA mapped RT from old bootaa64.efi is maintained. Adding support to other platforms should be easier as a result.
1.35	28-Aug-2020	skrll	Some KASAN fixes and tweaks - don't access BSS variables when __md_early - centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new INIT_ARM_TOTAL_STACK - Only create L1PT entries in kasan_md_shadow_map_page if arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries) - Add some comments to explain what's going on
1.34	04-Jul-2020	skrll	Protect with #ifdef _KERNEL
1.33	05-Mar-2020	riastradh	Revert "Include opt_diagnostic.h for DIAGNOSTIC." This did not do what I thought it did. opt_diagnostic.h is only for the unused _DIAGNOSTIC, which seems like an abortive attempt to incrementally convert DIAGNOSTIC to an opt_*.h option rather than a command-line option.
1.32	05-Mar-2020	riastradh	Include opt_diagnostic.h for DIAGNOSTIC. ...at least, in header files, which may not have already included libkern.h.
1.31	15-Feb-2020	skrll	Various updates and improvements to cpu start up on arm/aarch64 - start sharing more code around the AP startup messaging. - call arm_cpu_topology_set early so that ci_core_id is available for drivers, e.g. bcm2835_intr.c - both arm and aarch64 now have - a static cpu_info_store array - the same arm_cpu_{hatched,mbox}
1.30	18-Dec-2019	riastradh	branches: 1.30.2; New function cpu_startup_hook on arm. Called at end of cpu_startup. Can be defined in, e.g., evbarm to do additional stuff after cpu_startup. Defined as a weak alias to a function that does nothing, so optional. ok jmcneill
1.29	16-Jul-2019	skrll	branches: 1.29.2; Consistently use vaddr_t as initarm and friends return type. Makes no difference to binaries except for aarch64 where it's required
1.28	03-Jan-2019	skrll	Start CPUs more like aarch64 by using a cpu_mpidr array (if populated) to map MPIDRs to an index for each CPU. Towards big.LITTLE support.
1.27	18-Oct-2018	skrll	Provide generic start code that assumes the MMU is off and caches are disabled as per the linux booting protocol for ARMv6 and ARMv7 boards. u-boot image type should be changed to 'linux' for correct behaviour. The new start code builds a minimal "bootstrap" L1PT with cached access disabled and uses the same table for all processors. AP startup is performed in less steps and more code is written in C. The bootstrap tables and stack are placed into an (orphaned) section "_init_memory" which is given to uvm when it is no longer used. Various kernels have been converted to use this code and tested. Some boards were provided by TNF. Thanks! The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS kernels. The GENERIC kernel will also work on RPI2 using u-boot. Thanks to martin@ and aymeric@ for testing on parallella and nanosoc respectively
1.26	05-Aug-2018	skrll	Refactor code to split aarch{32,64} kernel page tables and VM setup. This will help re-build the kernel page tables on aarch64 with correct section mappings.
1.25	05-Aug-2018	skrll	Expose kern_vtopdiff
1.24	03-Aug-2018	skrll	Provide and use kern_vtopdiff in KERN_{VTOPHYS,PHYSTOV}. A step towards generic arm.
1.23	01-Aug-2018	skrll	s/_ARM32_BOOT_MACHDEP_H_/_ARM32_MACHDEP_H_/ in multiple inclusion protection.
1.22	15-Jul-2018	maxv	Retire ipkdb entirely. The option was removed from the config files yesterday. ok kamil christos
1.21	20-Feb-2017	skrll	branches: 1.21.12; 1.21.14; Whitespace in comment
1.20	20-Feb-2017	skrll	Trailing whitespace
1.19	11-Nov-2015	jmcneill	branches: 1.19.2; 1.19.4; add support for optional RB_POWERDOWN handler
1.18	28-Mar-2014	matt	branches: 1.18.6; Change arm_cpu_mbox to volatile
1.17	20-Oct-2012	matt	branches: 1.17.2; Increase l2pts to accomodate large memory disks.
1.16	01-Sep-2012	martin	branches: 1.16.2; Backout previous, Matt fixed it differently
1.15	01-Sep-2012	martin	Move struct pv_addr next to struct bootmem_info into machdep.h and have pmap.h include that. Seems to be the least intrusive build fix; Matt: feel free to revamp.
1.14	31-Aug-2012	matt	Make cpu_reset, most of initarm and the kvm init code common. Add MP hooks for cpu_need_resced Add idlestck which is allocated in arm32_kvminit
1.13	29-Aug-2012	matt	Don't use locations in .data to store exception temporaries, use decidicated space in cpu_info instead. This also moves undefined_handler_address into cpu_info as well. Use the new armreg* inlines for getting TPIDRPRW register. Add MULTIPROCESSOR version of CPU_INFO_FOREACH
1.12	29-Aug-2012	matt	Since the PMC cycle counter is started in cpufunc no reason to do so here. Use curcpu()->ci_data.cpu_cc_freq and new armreg* inlines.
1.11	16-Aug-2012	matt	Move the standard definitions of the {UND,IRQ,FIQ,ABT}_STACK_SIZE to <arm32/machdep.h> Move the extern for cpu_reset_address to the same file. Add cpu_reset_address_paddr. Kill cpu_reset_v4_MMU_disable. if cpu_reset_address is NULL, then the MMU will be disabled.
1.10	29-Jul-2012	matt	Fix more -fno-common fallout. Move more variables to common locations.
1.9	14-Mar-2009	dsl	branches: 1.9.12; 1.9.20; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.8	04-Mar-2007	christos	branches: 1.8.46; 1.8.54; 1.8.60; 1.8.64; Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
1.7	21-Feb-2002	thorpej	branches: 1.7.34; 1.7.72; map_chunk() -> pmap_map_chunk(), and move it to pmap.c
1.6	20-Feb-2002	thorpej	map_pagetable() -> pmap_link_l2pt(), and move it to pmap.c
1.5	20-Feb-2002	thorpej	Collapse map_entry{,ro,nc}() into a single pmap_map_entry() that takes a prot and a "cacheable" indicator.
1.4	20-Feb-2002	thorpej	Rename map_section() to pmap_map_section(), move it to pmap.c, and give it an extra argument (prot - specifies protection of the mapping).
1.3	20-Jan-2002	thorpej	Some prototype cleanup.
1.2	07-Jan-2002	chris	branches: 1.2.2; 1.2.4; Finish up the changes to get LOOSE_PROTOTYPES working for cats. Note that this leaves a few inconsistencies (no more than we already had though) eg initarm is now prototyped in arm32/machdep.h, however only cats currently makes use of that header.
1.1	05-Jan-2002	chris	Make some of the arm32 files build with LOOSE_PROTOTYPES not set in the makefile. Turned up a few mismatched functions. Note that this isn't all of the arm32 files. Aim will be to get arm32 kernels built with LOOSE_PROTOTYPES not set.
1.2.4.3	17-Apr-2002	nathanw	Catch up to -current.
1.2.4.2	11-Jan-2002	nathanw	More catchup.
1.2.4.1	07-Jan-2002	nathanw	file machdep.h was added on branch nathanw_sa on 2002-01-11 23:38:04 +0000
1.2.2.4	16-Mar-2002	jdolecek	Catch up with -current.
1.2.2.3	11-Feb-2002	jdolecek	Sync w/ -current.
1.2.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.2.2.1	07-Jan-2002	thorpej	file machdep.h was added on branch kqueue on 2002-01-10 19:37:55 +0000
1.7.72.1	12-Mar-2007	rmind	Sync with HEAD.
1.7.34.1	03-Sep-2007	yamt	sync with head.
1.8.64.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.8.60.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.8.54.1	28-Apr-2009	skrll	Sync with HEAD.
1.8.46.1	04-May-2009	yamt	sync with head.
1.9.20.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.9.12.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.9.12.1	30-Oct-2012	yamt	sync with head
1.16.2.3	03-Dec-2017	jdolecek	update from HEAD
1.16.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.16.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.17.2.1	18-May-2014	rmind	sync with head
1.18.6.2	28-Aug-2017	skrll	Sync with HEAD
1.18.6.1	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.19.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.19.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.21.14.3	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.21.14.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.21.14.1	10-Jun-2019	christos	Sync with HEAD
1.21.12.4	18-Jan-2019	pgoyette	Synch with HEAD
1.21.12.3	20-Oct-2018	pgoyette	Sync with head
1.21.12.2	06-Sep-2018	pgoyette	Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
1.21.12.1	28-Jul-2018	pgoyette	Sync with HEAD
1.29.2.1	12-Feb-2020	martin	Pull up following revision(s) (requested by riastradh in ticket #705): sys/arch/aarch64/aarch64/aarch64_machdep.c: revision 1.35 sys/stand/efiboot/efifdt.c: revision 1.20 sys/stand/efiboot/efifdt.h: revision 1.7 sys/arch/aarch64/include/machdep.h: revision 1.9 sys/stand/efiboot/efiboot.h: revision 1.11 sys/arch/arm/arm32/arm32_machdep.c: revision 1.129 sys/arch/arm/include/arm32/machdep.h: revision 1.30 sys/stand/efiboot/exec.c: revision 1.12 sys/arch/evbarm/fdt/fdt_machdep.c: revision 1.65 sys/stand/efiboot/version: revision 1.14 sys/stand/efiboot/boot.c: revision 1.19 New function cpu_startup_hook on arm. Called at end of cpu_startup. Can be defined in, e.g., evbarm to do additional stuff after cpu_startup. Defined as a weak alias to a function that does nothing, so optional. ok jmcneill Implement rndseed support in efiboot and fdt arm. The EFI environment variable `rndseed' specifies the path to the random seed. It is loaded only for fdt platforms at the moment. Since the rndseed (an rndsave_t object as defined in <sys/rndio.h>) is 536 bytes long (for hysterical raisins), and to avoid having to erase parts of the fdt tree, we load it into a physical page whose address is passed in the fdt tree, rather than passing the content of the file as an fdt node directly; the kernel then reserves the page from uvm, and maps it into kva to call rnd_seed. For now, the only kernel that does use efiboot with fdt is evbarm, which knows to handle the rndseed. Any new kernels that use efiboot with fdt must do the same; otherwise uvm may hand out the page with the secret key on it for a normal page allocation in the kernel -- which should be OK if there are no kernel memory disclosure bugs, but would lead to worse consequences than simply loading the seed late in userland with /etc/rc.d/random_seed otherwise. ok jmcneill
1.30.2.1	29-Feb-2020	ad	Sync with head.
1.34	30-May-2021	rin	Include opt_param.h for MSGBUFSIZE ifdef _KERNEL_OPT.
1.33	10-Jul-2020	skrll	branches: 1.33.6; 1.33.8; Add support for KASAN on ARMv[67] Thanks to maxv for many pointers and reviews.
1.32	08-Jul-2020	skrll	Define USPACE in terms of UPAGES (not the other way around) now that NBPG is fixed at 4K
1.31	08-Jul-2020	skrll	Whitespace
1.30	13-Feb-2020	skrll	Bump the amount of KMEM allowed to 1/3rd of KVM. _ARCH_ARM_6 has a split of 2:2 and others have a split of 3:1. Tested by martin@ Thanks
1.29	01-Feb-2020	skrll	G/C
1.28	18-Jan-2020	skrll	Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) by creating a new pool l1ttpl for the userland L1 translation table which needs to be 8KB and 8KB aligned. Limit the pool to maxproc and add hooks to allow the sysctl changing of maxproc to adjust the pool. This comes at a 5% performance penalty for build.sh -j8 kernel on a Tegra TK1.
1.27	19-Jun-2019	skrll	branches: 1.27.2; 1.27.4; KNF and add a comment
1.26	04-Feb-2019	skrll	Trailing whitespace
1.25	09-Jun-2017	chs	branches: 1.25.6; if __HIDE_DELAY is defined, do not define delay() or DELAY(). needed by dtrace and ZFS.
1.24	02-Apr-2015	matt	Don't include <machine/cpu.h>
1.23	05-Apr-2014	skrll	branches: 1.23.6; On second thoughts don't do the RPI hack for everyone.
1.22	05-Apr-2014	skrll	Drop down to 4KB pages on armv6 for now.
1.21	30-Mar-2014	matt	Make the ARM pmap use ASIDs, split TTBRs, and MP safe. This only happens for ARMv6 or later CPUs. This means that on context switch that the TLBs and caches no longer to cleaned/flushed. Also, eXecute Never (XN) protection has been added so non-exec pages can not be run. Change the page size for ARMv6+ to be 8KB while allows a L1PT to be a normal page. This means that the L1PT is not special. Use the XN support to only sync pages that are executed from.
1.20	29-May-2013	rkujawa	branches: 1.20.2; Explicitely cast to unsigned. Avoid bugs caused by misintepreting the result as signed. riastradh@ suggested to change these macros into static inline functions. But I'm still not convinced... Obtained from Marvell, Semihalf.
1.19	20-Mar-2013	skrll	Bump MSGBUFSIZE on arm ports to 16KB. OK matt@
1.18	07-Dec-2012	matt	FPCONTEXTSIZE is dead.
1.17	04-Feb-2012	para	branches: 1.17.6; improve sizing of kmem_arena now that more allocations are made from it don't enforce limits if not required ok: riz@
1.16	14-Jan-2011	rmind	branches: 1.16.8; 1.16.12; Retire struct user, remove sys/user.h inclusions. Note sys/user.h header as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros. Various #include fixes and review by matt@.
1.15	08-Feb-2010	joerg	branches: 1.15.2; Remove separate mb_map. The nmbclusters is computed at boot time based on the amount of physical memory and limited by NMBCLUSTERS if present. Architectures without direct mapping also limit it based on the kmem_map size, which is used as backing store. On i386 and ARM, the maximum KVA used for mbuf clusters is limited to 64MB by default. The old default limits and limits based on GATEWAY have been removed. key_registered_sb_max is hard-wired to a value derived from 2048 clusters.
1.14	14-Mar-2009	dsl	branches: 1.14.2; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.13	19-Jan-2008	chris	branches: 1.13.10; 1.13.18; 1.13.24; With the removal of IPKDB on arm, the undefined stack is only used to bounce into SVC32 mode, there is no per-process data stored on it. We can therefore use the undefined stack setup by the platform machdep.c as a system wide undefined stack. This removes the need for a per-process undefined stack, and the processor mode switching overhead it causes in cpu_switchto. The space freed in the USPACE is used to increase the per process kernel stack size.
1.12	11-Dec-2005	christos	branches: 1.12.46; 1.12.50; 1.12.52; 1.12.58; 1.12.66; merge ktrace-lwp.
1.11	29-Dec-2004	joff	branches: 1.11.10; Bump UPAGES back down to 8KB now that real issue was found with ep93xx intr handling
1.10	23-Dec-2004	joff	bump default U-area size from 8KB to 64KB, 8KB is too little to even successfully boot a tsarm SBC
1.9	24-Mar-2002	thorpej	branches: 1.9.12; * arm_byte_to_page() -> arm_btop() * arm_page_to_byte() -> arm_ptob()
1.8	26-Feb-2002	simonb	Purge CLSIZE, CLSIZELOG2 and MCLOFSET. Be consistant in the way that MSIZE, MCLSHIFT, MCLBYTES and NMBCLUSTERS are defined. Remove old VM constants from cesfic port. Bump MSIZE to 256 on mipsco (the only one that wasn't already 256).
1.7	22-Feb-2002	briggs	Bumb NMBCLUSTER defaults to 2048 for GATEWAY and 1024 otherwise. These match current powerpc defaults and are more reasonable for the current era.
1.6	11-Aug-2001	chris	branches: 1.6.6; Add arm_trunc_page, similair to trunc_page but using a hardcoded PGOFSET.
1.5	07-Aug-2001	bjh21	Use <arm/param.h> to get shared definitions.
1.4	30-May-2001	mrg	branches: 1.4.2; use _KERNEL_OPT
1.3	04-Mar-2001	matt	branches: 1.3.2; 1.3.4; Only define MACHINE & MACHINE_ARCH in port-dependent param.h. Everything else (since it's common) is from <arm/arm32/param.h>
1.2	24-Feb-2001	toshii	Make hpcarm kernel compile again.
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.3.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.3.4.1	04-Mar-2001	bouyer	file param.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.3.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.4.2.3	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.4.2.2	16-Mar-2002	jdolecek	Catch up with -current.
1.4.2.1	25-Aug-2001	thorpej	Merge Aug 24 -current into the kqueue branch.
1.6.6.3	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.6.6.2	28-Feb-2002	nathanw	Catch up to -current.
1.6.6.1	11-Aug-2001	nathanw	file param.h was added on branch nathanw_sa on 2002-02-28 04:07:34 +0000
1.9.12.1	17-Jan-2005	skrll	Sync with HEAD.
1.11.10.1	21-Jan-2008	yamt	sync with head
1.12.66.1	20-Jan-2008	bouyer	Sync with HEAD
1.12.58.1	18-Feb-2008	mjf	Sync with HEAD.
1.12.52.1	23-Mar-2008	matt	sync with HEAD
1.12.50.1	20-Jan-2008	chris	Sync to HEAD.
1.12.46.1	28-Feb-2008	rjs	Sync with HEAD.
1.13.24.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.13.18.1	28-Apr-2009	skrll	Sync with HEAD.
1.13.10.2	11-Mar-2010	yamt	sync with head
1.13.10.1	04-May-2009	yamt	sync with head.
1.14.2.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.15.2.1	05-Mar-2011	rmind	sync with head
1.16.12.1	18-Feb-2012	mrg	merge to -current.
1.16.8.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.16.8.2	16-Jan-2013	yamt	sync with (a bit old) head
1.16.8.1	17-Apr-2012	yamt	sync with head
1.17.6.4	03-Dec-2017	jdolecek	update from HEAD
1.17.6.3	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.17.6.2	23-Jun-2013	tls	resync from head
1.17.6.1	25-Feb-2013	tls	resync with head
1.20.2.1	18-May-2014	rmind	sync with head
1.23.6.2	28-Aug-2017	skrll	Sync with HEAD
1.23.6.1	06-Apr-2015	skrll	Sync with HEAD
1.25.6.3	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.25.6.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.25.6.1	10-Jun-2019	christos	Sync with HEAD
1.27.4.2	29-Feb-2020	ad	Sync with head.
1.27.4.1	25-Jan-2020	ad	Sync with head.
1.27.2.1	07-Jun-2020	martin	Pull up following revision(s) (requested by skrll in ticket #951): sys/arch/arm/include/arm32/param.h: revision 1.30 Bump the amount of KMEM allowed to 1/3rd of KVM. _ARCH_ARM_6 has a split of 2:2 and others have a split of 3:1. Tested by martin@ Thanks
1.33.8.1	31-May-2021	cjep	sync with head
1.33.6.1	17-Jun-2021	thorpej	Sync w/ HEAD.
1.4	03-Sep-2001	matt	branches: 1.4.6; Add a merged <pcb.h> for arm26/arm32.
1.3	27-Aug-2001	chris	Remove unused entries from the pcb. This is with a long term view of merging the arm26 and arm32 pcb's.
1.2	28-Feb-2001	bjh21	branches: 1.2.4; 1.2.6; PCB convergence, part the first: Move the pointer to the current user trapframe from struct mdproc to struct pcb (as on arm26). Only tested by compiling kernels on arm32 and hpcarm (dnard seems to be incomplete anyway). Someone should try running one.
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.2.6.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.2.4.1	28-Feb-2001	bouyer	file pcb.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.4.6.2	03-Sep-2001	matt	Add a merged <pcb.h> for arm26/arm32.
1.4.6.1	03-Sep-2001	matt	file pcb.h was added on branch nathanw_sa on 2001-09-03 19:20:29 +0000
1.178	09-Oct-2025	skrll	Add the beginnings of a GENERIC_V5 kernel that targets armv5 boards and uses FDT. In this first iteration some support is added for OLinuXino boards. Thanks to Yuri Honegger for doing the vast majority of the work.
1.177	12-Oct-2023	skrll	Fix non-DIAGNOSTIC builds
1.176	02-Aug-2023	skrll	No need to define cpu_{,set}_tlb_info here - just use the sys/uvm/pmap/pmap_tlb.h versions.
1.175	24-Apr-2023	martin	Fix DEVMAP_FLAGS, patch from Nick.
1.174	20-Apr-2023	skrll	Provide a shared pmap_devmap implementation and convert all pmap_devmap arrays to use DEVMAP_ENTRY{,_END}
1.173	02-Apr-2022	skrll	branches: 1.173.4; Update to support EFI runtime outside the kernel virtual address space by creating an EFI RT pmap that can be activated / deactivated when required. Adds support for EFI RT to ARM_MMU_EXTENDED (ASID) 32-bit Arm machines. On Arm64 the usage of pmapboot_enter is reduced and the mappings are created much later in the boot process -- now in cpu_startup_hook. Backward compatiblity for KVA mapped RT from old bootaa64.efi is maintained. Adding support to other platforms should be easier as a result.
1.172	15-Jan-2022	skrll	Remove unnecessary brackets
1.171	16-Oct-2021	skrll	pm_remove_all is a shared field so move it out the #ifdefs
1.170	04-May-2021	skrll	Provide pte_{value,valid_p}
1.169	30-Oct-2020	skrll	branches: 1.169.6; Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.
1.168	03-Jul-2020	skrll	Consistency...#define<tab>
1.167	18-Apr-2020	skrll	PMAP_DEBUG has been deleted on arm
1.166	29-Mar-2020	skrll	branches: 1.166.2; Don't define pt_entry_t if _LOCORE Reported by Patrick Welche
1.165	29-Mar-2020	skrll	Provide a pt_entry_t and PRIxPTE
1.164	14-Mar-2020	ad	pmap_remove_all(): Return a boolean value to indicate the behaviour. If true, all mappings have been removed, the pmap is totally cleared out, and UVM can then avoid doing the work to call pmap_remove() for each map entry. If false, either nothing has been done, or some helpful arch-specific voodoo has taken place.
1.163	24-Feb-2020	ad	Adjust for UVM locking changes
1.162	23-Feb-2020	skrll	G/C l1pte_pgindex
1.161	05-Feb-2020	skrll	Fix the armv[67] memory attributes for uncached memory. Previously it was mapped as strongly-ordered which meant that unaligned accesses would fault. armv7_generic_bs_map now maps pages with PMAP_DEV which is treated as SO bus_dma continues to use PMAP_NOCACHE as appropriate, but this now get mapped to the correct memory attribute bits for armv[67] DEVMAP_ENTRY usees a new flag PTE_DEV. The workaround for the unaligned access faults is now removed. XXX Other armv[67] boards bus_space implementations should be checked. XXX There is scope to reduce the difference to aarch64
1.160	20-Jan-2020	skrll	s/_ARM_ARCH_6/ARM_MMU_EXTENDED/ in the #ifdef for the recent 4k pages change
1.159	18-Jan-2020	skrll	Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) by creating a new pool l1ttpl for the userland L1 translation table which needs to be 8KB and 8KB aligned. Limit the pool to maxproc and add hooks to allow the sysctl changing of maxproc to adjust the pool. This comes at a 5% performance penalty for build.sh -j8 kernel on a Tegra TK1.
1.158	12-Jan-2020	christos	fix -Wsign-compare because module tests trigger it.
1.157	10-Dec-2019	ad	branches: 1.157.2; pg->phys_addr -> VM_PAGE_TO_PHYS(pg)
1.156	18-Oct-2018	skrll	branches: 1.156.4; Provide generic start code that assumes the MMU is off and caches are disabled as per the linux booting protocol for ARMv6 and ARMv7 boards. u-boot image type should be changed to 'linux' for correct behaviour. The new start code builds a minimal "bootstrap" L1PT with cached access disabled and uses the same table for all processors. AP startup is performed in less steps and more code is written in C. The bootstrap tables and stack are placed into an (orphaned) section "_init_memory" which is given to uvm when it is no longer used. Various kernels have been converted to use this code and tested. Some boards were provided by TNF. Thanks! The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS kernels. The GENERIC kernel will also work on RPI2 using u-boot. Thanks to martin@ and aymeric@ for testing on parallella and nanosoc respectively
1.155	01-Apr-2018	ryo	branches: 1.155.2; Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@) - sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
1.154	24-Jan-2018	skrll	branches: 1.154.2; Remove port-acorn26 OK core@
1.153	22-Oct-2017	skrll	Centralise defines for DEVMAP_{ALIGN,SIZE,ENTRY,ENTRY_END}
1.152	29-Aug-2017	skrll	Revert the _PROT_RO_ define changes and do all the work in the *_PROT() macros for RO kernel pages. cats boots again - no idea how it slipped through my testing previously
1.151	11-Jul-2017	skrll	Fix up L{1_S,2_L,2_S}_PROT for recent changes to the L{1_S,2_L,2_S}_PROT_RO* values.
1.150	06-Jul-2017	skrll	KNF two comments
1.149	06-Jul-2017	skrll	Re-define the L*_PROT_RO for MMUs that don't really support RO mapping and adjust l2pte_set_{writeable,readony} to the new values. This allows RO mappings for MMUs that actually support them.
1.148	06-Jul-2017	skrll	Trailing whitespace
1.147	25-May-2017	skrll	Use the define name PMAP_HWPAGEWALKER and not PMAP_TLB_HWPAGEWALKER
1.146	25-May-2017	skrll	Spell ARM_MMU_EXTENDED correctly
1.145	23-Feb-2017	skrll	Fixup the compile time decisions around PMAP_{INCLUDE,NEEDS}_PTE_SYNC and fix the options for xscale boards which require the code in pmap_l2ptp_ctor marked as #ifndef PMAP_INCLUDE_PTE_SYNC. Fix the typo (pte -> opte) in this code block and consistently use opte elsewhere. PR/51990: Regression data_abort_handler: data_aborts fsr=0x406 far=0xbfffeff5 on copyout in init
1.144	14-Jul-2016	skrll	branches: 1.144.2; 1.144.4; Spell PMAP_TLB_NEED_SHOOTDOWN correctly
1.143	11-Nov-2015	skrll	Support pmap_pv_track and friends
1.142	09-Sep-2015	skrll	Make L2_S_CACHE_MASK_armv6n consistent with other *_CACHE_MASK_armv6n
1.141	01-Jun-2015	matt	pmap_directbase is a failed experiment, nuke it.
1.140	30-May-2015	matt	Support directmapped systems with >1GB that start memory at 0x80000000.
1.139	12-May-2015	skrll	Add some KASSERTs to catch similar bugs to the cnptes/nptes one
1.138	25-Feb-2015	joerg	Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.137	08-Nov-2014	skrll	branches: 1.137.2; Whitespace
1.136	29-Oct-2014	skrll	Sprinkle #include "opt_multiprocessor.h"
1.135	31-Jul-2014	skrll	branches: 1.135.2; Trailing whitespace
1.134	27-Jul-2014	skrll	More fixes as a step towards ARM_MMU_EXTENDED on RPI. - don't set CPU_CONTROL_SYST_ENABLE in arm11x6_setup for ARM_MMU_EXTENDED - Use the new MMU defines for V6N - pull in arm/cpuconf.h in vmparam s that VM_MAXUSER_ADDRESS gets set correctly.
1.133	15-Jun-2014	ozaki-r	Fix macro name; PMAP_TLB_NEED_SHOOTDOWN => PMAP_NEED_TLB_SHOOTDOWN
1.132	16-Apr-2014	matt	Make to flush the secondary cache when syncing PTEs when the Sheeva L2 cache is used.
1.131	11-Apr-2014	matt	Add a kernel for the CUBIETRUCK (CUBIEBOARD3). Allow direct mapping of all memory (but for now allow the memory mapped above KERNEL_BASE to used for poolpages).
1.130	04-Apr-2014	matt	branches: 1.130.2; For ARM_MMU_V6C enable supersections
1.129	31-Mar-2014	skrll	Deal with large page mappings in l2pte_set. Now the RPI can get passed setting the new TTB. ok matt@
1.128	31-Mar-2014	matt	For ARM_MMU_EXTENDED, a KERNEL_BASE >= 0x80000000 is ok but a VM_USER_MAXADDRESS can not be more than 0x80000000 - PAGE_SIZE.
1.127	31-Mar-2014	matt	Add a missing 0 to an #error
1.126	30-Mar-2014	matt	Make the ARM pmap use ASIDs, split TTBRs, and MP safe. This only happens for ARMv6 or later CPUs. This means that on context switch that the TLBs and caches no longer to cleaned/flushed. Also, eXecute Never (XN) protection has been added so non-exec pages can not be run. Change the page size for ARMv6+ to be 8KB while allows a L1PT to be a normal page. This means that the L1PT is not special. Use the XN support to only sync pages that are executed from.
1.125	26-Feb-2014	matt	Remove duplicate PMAP_PTE
1.124	26-Feb-2014	matt	Replace 1000 with PAGE_SIZE
1.123	26-Feb-2014	matt	Add PMAP_PTE flag. (map page so it can be used as a PDE or PTE page)
1.122	18-Aug-2013	matt	struct pcb; for a function prototype.
1.121	03-Jul-2013	matt	Add l2pte_set and l2pte_reset inlines to set/reset a pte. These will be used to support > 4KB pages sizes. Don't use >> L1_S_SHIFT, use L1_IDX() instead.
1.120	12-Jun-2013	matt	branches: 1.120.2; Add a ARM_HAS_VBAR option which forces the use of the VBAR register. This allows much code to deal with vector_page mappings to be eliminated. On a BEAGLEBONE kernel, this saves 8KB of text and instructions that never have to be executed. (The PJ4B has VBAR but doesn't implement the security extensions it is part of so a method was needed to allow it use VBAR with relying on the default test for the security extensions.)
1.119	12-Dec-2012	matt	Protect more definitions with #ifndef _LOCORE
1.118	12-Dec-2012	matt	Enable direct-mapped poolpages if __HAVE_MM_MD_DIRECT_MAPPED_PHYS is defined.
1.117	10-Dec-2012	matt	Add b{zero,copy}_page{,_vfp} and physical_end
1.116	10-Dec-2012	matt	Add pmap_{copy,zero}_page_vfp
1.115	12-Nov-2012	skrll	C99 types
1.114	17-Oct-2012	matt	Add PMAP_MAP_POOLPAGE / PMAP_UNMAP_POOLPAGE if PMAP_NEED_ALLOC_POOLPAGE is defined.
1.113	17-Oct-2012	matt	Add a PMAP_NEEDS_ALLOC_POOLPAGE / PMAP_ALLOC_POOLPAGE hook so systems can allocate pool pages from a specific VM freelist.
1.112	22-Sep-2012	matt	Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead but add a second argument to it to indicate whether the TLB/caches need to be flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field to see if the fixed can be skipped. Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1) or enabeld (bit = 0). With these changes, the A9 MMU can use traverse caches to do MMU tablewalks Also, make sure all memory has the shareable bit for the A9.
1.111	11-Sep-2012	matt	branches: 1.111.2; Fix the CACHE_MASKs for armv6 to include TEX and S bits. Fix a comment in pte.h
1.110	07-Sep-2012	matt	Switch cortex_a9 back to need_ptesync = 1 Add code to disable the L2 cache on cortex-a9 (for now). Add evcnt for all the fault types. Move cache info in a structure and have one for the pcache and one for scache. Probe L1/L2 caches properly for ARMv7
1.109	06-Sep-2012	matt	Alas, Cortex-A8 can't TLB walk out of their caches so they need to sync each PTE.
1.108	06-Sep-2012	matt	Enable "shareable" access to the page table for armv7. PTE_SYNC only does a DSB now on an armv7 cpu and no longer needs to flush the cache line to ram.
1.107	02-Sep-2012	matt	Make bus_dma understand supersections.
1.106	01-Sep-2012	martin	Backout previous, Matt fixed it differently
1.105	01-Sep-2012	martin	Move struct pv_addr next to struct bootmem_info into machdep.h and have pmap.h include that. Seems to be the least intrusive build fix; Matt: feel free to revamp.
1.104	30-Aug-2012	matt	Add a l1pte_supersection_p macro.
1.103	20-Aug-2012	matt	Add support for mapping SuperSection on armv6 and armv7. These always a domain of 0 so move the kernel from domain 15 to domain 0.
1.102	29-Jul-2012	matt	Fix more -fno-common fallout. Move more variables to common locations.
1.101	28-Jan-2012	matt	branches: 1.101.4; Nuke the simplelock from vm_page_md
1.100	12-Jun-2011	rmind	branches: 1.100.2; 1.100.6; Welcome to 5.99.53! Merge rmind-uvmplock branch: - Reorganize locking in UVM and provide extra serialisation for pmap(9). New lock order: [vmpage-owner-lock] -> pmap-lock. - Simplify locking in some pmap(9) modules by removing P->V locking. - Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs). - Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner. Add TLBSTATS option for x86 to collect statistics about TLB shootdowns. - Unify /dev/mem et al in MI code and provide required locking (removes kernel-lock on some ports). Also, avoid cache-aliasing issues. Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches formed the core changes of this branch.
1.99	10-Mar-2011	bsh	branches: 1.99.2; Preliminary ARM11 MPCore support. I have confirmed this commit doesn't affect existing evbarm kernels by comparing binaries.
1.98	28-Feb-2011	macallan	implement arm32_pmap_flags() to allow mappings with write buffering enabled, mostly for video memory Tested on shark
1.97	14-Nov-2010	uebayasi	branches: 1.97.2; 1.97.4; Move struct vm_page_md definition from vmparam.h to pmap.h, because it's used only by pmap. vmparam.h has definitions for wider audience. All GENERIC kernels build tested, except ia64. powerpc/include/booke/vmparam.h has one too, but it has no pmap.h, so it's left as is.
1.96	02-Nov-2010	uebayasi	Fix build of evbarm.
1.95	16-Jun-2010	jmcneill	PR port-arm/43299: Support added for igepv2/cortexa8/omap3530 Apply patch from PR, with build fixes. ok skrll, matt
1.94	27-Dec-2009	uebayasi	branches: 1.94.2; 1.94.4; Add write-through cache work-around for ARM11 as well as ARM9/ARM10. Analyzed & tested on i.MX35 with help from Tsubai Masanari.
1.93	22-Oct-2009	rmind	Simplify pmap_remove() a little by avoiding pmap_do_remove() layer, since possibility to skip wired mappings is not needed anymore. Apart from that, no functional differences are intended.
1.92	19-Aug-2009	thorpej	Use PMAP_ENABLE_PMAP_KMPAGE to enable PMAP_KMPAGE. We still want the bit defined in the MI space, not in an MD header.
1.91	19-Aug-2009	thorpej	Rationalize the definition of PMAP_KMPAGE.
1.90	30-Dec-2008	matt	Reclaim PVF_KNC in VIPT to be PVF_MULTCLR (page has multiple colors). Track when a page is mapping in multiple colors and deal with the ramifications. When a page's MOD attribute is cleared, clean it from the cache. Fix a logic inversion. With these changes, the TI SDP2420 H4 board can successfully natively build a TISDP2420 kernel.
1.89	09-Dec-2008	pooka	Make pmap_kernel() a MI macro for struct pmap *kernel_pmap_ptr, which is now the "API" provided by the pmap module. pmap_kernel() remains as the syntactic sugar. Bonus cosmetics round: move all the pmap_t pointer typedefs into uvm_pmap.h. Thanks to Greg Oster for providing cpu muscle for doing test builds.
1.88	13-Aug-2008	matt	branches: 1.88.2; 1.88.10; Fix a few more corner cases. Always KMPAGE or pages with unmanaged writeable kernel mappings as modified. Only ever set DIRTY bit is DMOD is true and NC is false. Don't modify unmanaged mappings in pmap_clearbit.
1.87	21-Jul-2008	matt	Add PMAP_KMPAGE defintion (forgotten commit). Also add PVF_DIRTY which will be used by an update pmap.c shortly (to note what pages may have dirty cache lines).
1.86	16-Jul-2008	matt	Revamp bookkeeping for pages entered by pmap_kenter_pa. Keep track of them on pvlists so that the cacheability can be properly tracked.
1.85	27-Apr-2008	matt	branches: 1.85.2; 1.85.4; 1.85.6; Merge kernel changes in matt-armv6 to HEAD.
1.84	01-Jan-2008	chris	branches: 1.84.6; 1.84.8; 1.84.10; Add support for kcore headers to arm32 kernel core dumps. The kcore code is based on i386's kcore header handling. Having an asm stub for dumpsys, to dump the registers onto the stack, and then call the C code to do the memory dump is based on amd64's core dump code. This allows a successful core dump on cats. Part of fixing PR cats/18026.
1.83	17-Oct-2007	garbled	branches: 1.83.2; 1.83.8; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.82	15-Sep-2007	scw	ARM cpu_switchto() has been partially broken since yamt-idlelwp was merged as its cache/tlb management smarts relied too heavily on pre-merge context- switch behaviour. See PR kern/36548 for one manifestation of the breakage. To address this: - Ditch the shadow pmap variables in the PCB (pagedir, l1vec, dacr, cstate) as it was too easy for them to get out of sync with the pmap. - Re-write (and fix) the convoluted cpuswitch.S cache/tlb ASM code in C. It's only slightly less efficient, but is much more readable/maintainable. - Document cpufuncs.cf_context_switch() as being C-callable. - pmap_activate() becomes a no-op if the lwp's vmspace is already active. (Good performance win, since pmap_activate() is now invoked on every context-switch, even though ARM's cpu_switchto() already does all the grunt work) XXX: Some CPU-specific armXX_context_switch() implementations (arm67, arm7tdmi, arm8) always flush the I+D caches. This should not be necessary. Someone with access to hardware (acorn32?) needs to deal with this.
1.81	22-Feb-2007	thorpej	branches: 1.81.4; 1.81.12; 1.81.18; 1.81.20; 1.81.22; 1.81.24; TRUE -> true, FALSE -> false
1.80	21-Feb-2007	thorpej	Replace the Mach-derived boolean_t type with the C99 bool type. A future commit will replace use of TRUE and FALSE with true and false.
1.79	24-Dec-2005	perry	branches: 1.79.26; 1.79.30; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.78	10-Dec-2005	scw	Implement pmap_collect() for arm32.
1.77	13-Oct-2003	scw	branches: 1.77.16; On Xscale, define PMAP_UAREA() and use it to tweak uarea mappings so they use the mini D$. This results in a small performance boost on xscale platforms, since flushing the main cache on a context switch won't affect the kernel stack/pcb.
1.76	06-Sep-2003	rearnsha	Add support for ARM10 class processors.
1.75	18-Jun-2003	bsh	branches: 1.75.2; protect with #ifndef _LOCORE so that assembler codes can share definitions in this file such as PMAP_DOMAIN_KERNEL.
1.74	15-Jun-2003	thorpej	Add another devmap routine that allows bootstrap code to register a devmap reflecting mappings that are created by really early bootstrap code before pmap_devmap_bootstrap() is called.
1.73	15-Jun-2003	thorpej	Replace the ad-hoc "section mapping table" for static device mappings with a more generic "devmap" structure that can also handle mappings made with large and small pages. Add new pmap routines to enter these mappings during bootstrap (and "remember" the devmap), and routines to look up the static mappings once the kernel is running.
1.72	21-May-2003	thorpej	Remove #ifdefs supporting the old pmap, switching fully to the new.
1.71	03-May-2003	thorpej	Reduce differences between ARM32_NEW_VM_LAYOUT and not; always pass the start and end of the kernel managed virtual address space to pmap_bootstrap() in the new pmap.
1.70	28-Apr-2003	scw	Fix the bug reported by Richard Earnshaw in port-arm32/21349. Make sure to check the access permissions before doing ref/mod/domain fixups. This is particularly important on machines with ARM_VECTORS_LOW.
1.69	22-Apr-2003	thorpej	Some ARM32_PMAP_NEW-related cleanup: * Define a new "MMU type", ARM_MMU_SA1. While the SA-1's MMU is basically compatible with the generic, the SA-1 cache does not have a write-through mode, and it is useful to know have an indication of this. * Add a new PMAP_NEEDS_PTE_SYNC indicator, and try to evaluate it at compile time. We evaluate it like so: - If SA-1-style MMU is the only type configured -> 1 - If SA-1-style MMU is not configured -> 0 - Otherwise, defer to a run-time variable. If PMAP_NEEDS_PTE_SYNC might evaluate to true (SA-1 only or run-time check), then we also define PMAP_INCLUDE_PTE_SYNC so that e.g. assembly code can include the necessary run-time support. PMAP_INCLUDE_PTE_SYNC largely replaces the ARM32_PMAP_NEEDS_PTE_SYNC manual setting Steve included with the original new pmap. * In the new pmap, make pmap_pte_init_generic() check to see if the CPU has a write-back cache. If so, init the PT cache mode to C=1,B=0 to get write-through mode. Otherwise, init the PT cache mode to C=1,B=1. * Add a new pmap_pte_init_arm8(). Old pmap, same as generic. New pmap, sets page table cacheability to 0 (ARM8 has a write-back cache, but flushing it is quite expensive). * In the new pmap, make pmap_pte_init_arm9() reset the PT cache mode to C=1,B=0, since the write-back check in generic gets it wrong for ARM9, since we use write-through mode all the time on ARM9 right now. (What this really tells me is that the test for write-through cache is less than perfect, but we can fix that later.) * Add a new pmap_pte_init_sa1(). Old pmap, same as generic. New pmap, does generic initialization, then resets page table cache mode to C=1,B=1, since C=1,B=0 does not produce write-through on the SA-1.
1.68	18-Apr-2003	thorpej	Gah, fix another typo.
1.67	18-Apr-2003	thorpej	Oops, fix typo.
1.66	18-Apr-2003	thorpej	Define two new macros to test if a mapping is mappable with an L1 Section mapping or an L2 Large Page mapping.
1.65	18-Apr-2003	scw	Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems. Some features of the new pmap are: - It allows L1 descriptor tables to be shared efficiently between multiple processes. A typical "maxusers 32" kernel, where NPROC is set to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily with just 4 L1s. This completely solves the problem of running out of contiguous physical memory for allocating new L1s at runtime on a busy system. - Much improved cache/TLB management "smarts". This change ripples out to encompass the low-level context switch code, which is also much smarter about when to flush the cache/TLB, and when not to. - Faster allocation of L2 page tables and associated metadata thanks, in part, to the pool_cache enhancements recently contributed to NetBSD by Wasabi Systems. - Faster VM space teardown due to accurate referenced tracking of L2 page tables. - Better/faster cache-alias tracking. The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel config file, and making the necessary changes to the port-specific initarm() function. Several ports have already been converted and will be committed shortly.
1.64	09-Apr-2003	thorpej	Add the ability for pool caches to cache the physical address of objects. Clients of the pool_cache API must consistently use the "paddr" variants or not, otherwise behavior is undefined. Enable this on Alpha, ARM, MIPS, and x86. Other platforms must define POOL_VTOPHYS() in the appropriate manner in order to enable the feature. Part 1 of a series of simple patches contributed by Wasabi Systems to improve network performance.
1.63	23-Mar-2003	chris	Garbage collect pmap_map, the last (and only?) use has been removed.
1.62	12-Nov-2002	chris	Fix PTE_FLUSH_RANGE macro, it should have had a cnt parameter.
1.61	22-Sep-2002	chs	it really helps to get the stub right before cutting + pasting it 27 times. alas, I did not. doh.
1.60	22-Sep-2002	chs	add pmap_remove_all() hook (empty on most platforms so far).
1.59	24-Aug-2002	thorpej	Define macros describing the 4M super-sections that our pmap actually uses (since we allocate PT pages in 4K chunks, rather than 1K chunks).
1.58	24-Aug-2002	thorpej	Enable caching on kernel and user page tables. This saves having to do uncached memory access during VM operations (which can be quite expensive on some CPUs). We currently write-back PTEs as soon as they're modified; there is some room for optimization (to write them back in larger chunks). For PTEs in the APTE space (i.e. PTEs for pmaps that describe another process's address space), PTEs must also be evicted from the cache complete (PTEs in PTE space will be evicted durint a context switch).
1.57	22-Aug-2002	thorpej	* Add PTE_SYNC() and PTE_SYNC_RANGE() macros. These don't actually do anything yet. * Use PTE_SYNC() and PTE_SYNC_RANGE() in some obvious places, i.e. where vtopte() is used.
1.56	09-Aug-2002	thorpej	Add a PVF_EXEC -- we don't use it yet, though.
1.55	31-Jul-2002	thorpej	Overhaul how DMA ranges work in the ARM bus_dma implementation. A new "arm32_dma_range" structure now describes a DMA window, with a system address base, bus address base, and length. In addition to providing info about which memory regions are legal for DMA, the new structure provides address translation support, as well. As before, if a tag does not list any ranges, then all addresses are considered valid, and no DMA address translation is performed. This allows us to remove a large chunk of code which was duplicated and tweaked slightly (to do the address translation) from the stock ARM bus_dma in the XScale IOP and ARM Integrator ports. Test compiled on all ARM platforms, test booted on Intel IQ80321 and Shark.
1.54	31-Jul-2002	thorpej	Move the calls to uvm_page_physload() out of pmap_bootstrap() and into platform-specific initialization code, giving platform-specific code control over which free list a given chunk of memory gets put onto. Changes are essentially mechanical. Test compiled for all ARM platforms, test booted on Intel IQ80321 and Shark. Discussed some time ago on port-arm.
1.53	12-Apr-2002	thorpej	branches: 1.53.2; Default all XScale core processors to the read/write-allocate write-back cache mode. Add a new XSCALE_CACHE_WRITE_THROUGH option for people who are paranoid about the cache-related errata (you do have to line up the planets correctly to trip them, but having the option is useful).
1.52	12-Apr-2002	thorpej	Centralize ARM CPU configuration information by adding a new header file, <arm/cpuconf.h>, which pulls in "opt_cputypes.h" and then defines the following: * CPU_NTYPES -- now many CPU types are configured into the kernel. What you really want to know is "== 1" or "> 1". * Defines ARM_ARCH_2, ARM_ARCH_3, ARM_ARCH_4, ARM_ARCH_5, depending on which ARM architecture versions are configured (based on CPU_* options). Also defines ARM_NARCH to determins how many architecture versions are configured. * Defines ARM_MMU_MEMC, ARM_MMU_GENERIC, ARM_MMU_XSCALE depending on which classes of ARM MMUs are configured into the kernel, and ARM_NMMUS to determine how many MMU classes are configured. Remove the needless inclusion of "opt_cputypes.h" in several places. Convert remaining users to <arm/cpuconf.h>.
1.51	10-Apr-2002	thorpej	Add separate pmap_{zero,copy}_page() functions for generic ARM vs. XScale. Use the mini-data cache for the destination on XScale, thus saving tossing out 4K of possible-useful data from the main data cache each time. This significantly improves every test in lmbench.
1.50	09-Apr-2002	thorpej	* Move the code that cleans the XScale mini-data cache into its own function. * Add a new function which sets up the mini-data cache clean area properly.
1.49	09-Apr-2002	thorpej	* Split pte_cache_mode into pte_l1_s_cache_mode, pte_l2_l_cache_mode, and pte_l2_s_cache_mode. The cache-meaningful bits are different for these descriptor types on some processor models. * Add pte_*_cache_mask, corresponding to each above, which has a mask of the cache-meangful bits, and define those for generic and XScale MMU classes. Note, the L2_S_CACHE_MASK_xscale definition requires use of the Extended Small Page L2 descriptor (the "X" bit overlaps with AP bits otherwise).
1.48	09-Apr-2002	thorpej	Use the "Extended Small Page" L2 descriptor type on XScale (note this means that there are no 1K sub-pages on XScale, but we don't use them anyway).
1.47	09-Apr-2002	thorpej	Remove the implementation-defined bits from L1_S_PROTO_xscale and L1_C_PROTO_xscale; while they are supposed to be set to 1 on generic ARM MMUs (according to the SA-110 and ARM920T manuals), they are listed as "should be zero" in the i80200 manual.
1.46	09-Apr-2002	thorpej	Define 2 classes of ARM MMUs: 1. Generic (compatible with ARM6) 1. XScale (can be used as generic, but also has certainly nifty extensions). Define abstract PTE bit defintions for each MMU class. If only one MMU class is configured into the kernel (based on CPU_* options), then we get the constants for that MMU class. Otherwise we indirect through varaibles set up via set_cpufuncs(). XXX The XScale bits are currently the same as the generic bits. Baby steps.
1.45	09-Apr-2002	thorpej	Use abstract names for the protection and PTE type bits in L1 and L2 descriptors. This will allow us to support different PTE layouts that enable the use of extensions on different processor models.
1.44	05-Apr-2002	thorpej	* Rewrite the 32-bit ARM pte.h based on the ARM architecture manual. Significant cleanup, here, including better PTE bit names. * Add XScale PTE extensions (ECC enable, write-allocate cache mode). * Mechanical changes everywhere else to update for new pte.h. While doing this, two bugs (as a result of typos) were fixed in arm/arm32/bus_dma.c evbarm/integrator/int_bus_dma.c
1.43	04-Apr-2002	thorpej	Rename flags that are really part of the pv_entry/mdpage into pmap.h and give them more descriptive names and better comments: * PT_M -> PVF_MOD (page is modified) * PT_H -> PVF_REF (page is referenced) * PT_W -> PVF_WIRED (mapping is wired) * PT_Wr -> PVF_WRITE (mapping is writable) * PT_NC -> PVF_NC (mapping is non-cacheable; multiple mappings)
1.42	03-Apr-2002	thorpej	Clean up handling of the vector page on 32-bit ARM systems: * Don't refer to VA 0, instead refer to a new variable: vector_page * Delete the old zero_page_() functions, replacing them with a new one: vector_page_setprot(). When manipulating vector page mappings in user pmaps, only do so if the vector page is below KERNEL_BASE (if it's above KERNEL_BASE, the vector page is mapped by the kernel pmap). * Add a new function, arm32_vector_init(), which takes the virtual address of the vector page (which MUST be valid when the function is called) and a bitmask of vectors the kernel is going to take over, and performs all vector page initialization, including setting the V bit in the CPU Control register ("relocate vectors to high address"), if necessary.
1.41	25-Mar-2002	thorpej	* Some cleanup. * Delete the call to pmap_copy() in pmap.h
1.40	25-Mar-2002	thorpej	Move some private pmap data structures into pmap.c
1.39	25-Mar-2002	thorpej	Tidy a few things up.
1.38	25-Mar-2002	thorpej	Correct the comment describing the layout of the VM space. In particular, don't describe a recursive PTE mapping, since the ARM port doesn't (and can't) use one.
1.37	24-Mar-2002	thorpej	Remove exported pmap_pte() prototype.
1.36	24-Mar-2002	thorpej	Clean up PTE access macros a bit.
1.35	24-Mar-2002	thorpej	* arm_byte_to_page() -> arm_btop() * arm_page_to_byte() -> arm_ptob()
1.34	23-Mar-2002	thorpej	Garbage-collect the "pagehook" stuff.
1.33	23-Mar-2002	thorpej	* Rename PROCESS_PAGE_TBLS_BASE -> PTE_BASE * Rename ALT_PAGE_TBLS_BASE -> APTE_BASE * Garbage-collect PAGE_TABLE_SPACE_START
1.32	23-Mar-2002	thorpej	Remove redundant #ifdef _KERNEL
1.31	05-Mar-2002	thorpej	* Make pmap_is_{modified,referenced}() macros in pmap.h that just test the attributes in the vm_page_md directly. * Clean up pmap_clear_{modified,referenced}(). * Delete now-unused pmap_testbit().
1.30	05-Mar-2002	thorpej	Switch back to using vm_page_md (thanks chuq for finding the bug in the code that made it unstable before!)
1.29	03-Mar-2002	chris	Implement pmap_growkernel for arm32 based ports. Note that this has been compiled on some systems, cats, IQ80310, IPAQ, netwinder and shark (note that shark's build is currently broken due to other reasons), but only actually run on cats. Shark doesn't make use of the functionality as I believe there has to be a correlation between OFW and the kernel tables so that calls into OFW work.
1.28	21-Feb-2002	thorpej	Keep track of which kernel PTs are available during bootstrap, and let pmap_map_chunk() lookup the correct one to use for the current VA. Eliminate the "l2table" argument to pmap_map_chunk(). Add a second L2 table for mapping kernel text/data/bss on the IQ80310 (fixes booting kernels with ramdisks).
1.27	21-Feb-2002	thorpej	map_chunk() -> pmap_map_chunk(), and move it to pmap.c
1.26	20-Feb-2002	thorpej	map_pagetable() -> pmap_link_l2pt(), and move it to pmap.c
1.25	20-Feb-2002	thorpej	Collapse map_entry{,ro,nc}() into a single pmap_map_entry() that takes a prot and a "cacheable" indicator.
1.24	20-Feb-2002	thorpej	Rename map_section() to pmap_map_section(), move it to pmap.c, and give it an extra argument (prot - specifies protection of the mapping).
1.23	06-Feb-2002	thorpej	Back out all the vm_page_md changes. They are causing some mysterious problems (a similar change to the i386 pmap causes mysterious problems there, as well), and the issue needs to be investigated more.
1.22	06-Feb-2002	thorpej	Efficiency tweaks, some made possible by vm_page_md.
1.21	05-Feb-2002	thorpej	Use vm_page_md rather than pmap_physseg. Saves lots of cycles in common operations.
1.20	19-Jan-2002	chs	add a new flag PMAP_CACHE_VIVT for the pmap to inform the MI code that that the cache is virtually-indexed and virtually-tagged (such as on the ARM), and use this flag in the UBC code to be more friendly to those caches.
1.19	23-Nov-2001	thorpej	Use <arm/cpufunc.h>, not <machine/cpufunc.h>.
1.18	23-Nov-2001	thorpej	- Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.17	19-Nov-2001	thorpej	Implement pmap_update(). Currently it just calls cpu_cpwait(), which ensures that TLB/cache operations have completed.
1.16	03-Nov-2001	rearnsha	branches: 1.16.2; Define boolean predicates pmap_pde_page, pmap_pde_section & pmap_pde_fpage, which return true if their pde argument is a coarse page, section or fine page respectively.
1.15	13-Sep-2001	chris	branches: 1.15.2; Sprinkle some static and inline into a couple of functions. Remove dead entries from pmap.h.
1.14	10-Sep-2001	chris	Update pmap_update to now take the updated pmap as an argument. This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment. Currently this is a no-op on most platforms, so they should see no difference. Reviewed by Jason.
1.13	11-Aug-2001	chris	branches: 1.13.2; Checking a whole host of pmap changes: Improved locking (not that we actually use it on a uniprocessor, but one day :) Removed unneeded splvm's tweaked pmap_clean_page code to only flush the cache if the page is mapped in the current pmap (based on diff from richard E) Adopted pv entry allocation mechanism from i386. Laid framework for returning ptp's when we've finished with them rather than holding onto them till the process exits. ptp's are now allocated with a uvm object for the pmap, means that we can walk a list to free them off in pmap_release, until they get freed off by pmap_remove. Also implemented a page zeroing function when the processor is idling. Note that hpcarm may wish to disable this. I believe this code to be stable, if anyone has any problems please shout up.
1.12	29-Jul-2001	chris	Rework the pmap_release code to not have to walk the ptpt, it now uses a uvm_object to track the allocated vm_pages, this means it can free off the entries in the uvm_object. Testing shows that it's about 5% faster on the make configure step for gmake.
1.11	28-Jul-2001	chris	A couple of tidy ups to pmap: pmap_t -> struct pmap * in pmap.c and pmap.h kernel_pmap -> pmap_kernel() everywhere. Compiled and booted on riscpc and cats.
1.10	22-Jun-2001	chris	branches: 1.10.2; GC a couple of unused entries in the pmap struct
1.9	26-May-2001	chs	replace vm_page_t with struct vm_page *.
1.8	26-May-2001	chs	replace {simple_,}lock{_data,}_t with struct {simple,}lock {,*}.
1.7	22-Apr-2001	thorpej	Undo a misguided previous change to the pmap_update() API.
1.6	22-Apr-2001	thorpej	Give pmap_update() an argument (a pmap_t) so that it knows which pmap it should be updating.
1.5	21-Apr-2001	thorpej	Update the comment for pmap_update().
1.4	04-Mar-2001	matt	branches: 1.4.2; 1.4.4; more vm_offset_t/vm_size_t -> {p,v}{addr,size}_t changes move pmap_* declarations to pmap.h. fix conflicts this exposed (e.g different definitions for pmap_bootstrap).
1.3	04-Mar-2001	matt	Convert some vm_size_t to vsize_t/psize_t. Change vaddr_t to paddr_t where appropriate.
1.2	04-Mar-2001	matt	s/vm_offset_t/vaddr_t/g
1.1	23-Feb-2001	reinoud	Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.4.4.3	23-Apr-2001	bouyer	Sync with HEAD.
1.4.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.4.4.1	04-Mar-2001	bouyer	file pmap.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.4.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.10.2.9	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.10.2.8	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.10.2.7	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.10.2.6	16-Mar-2002	jdolecek	Catch up with -current.
1.10.2.5	11-Feb-2002	jdolecek	Sync w/ -current.
1.10.2.4	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.10.2.3	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.10.2.2	25-Aug-2001	thorpej	Merge Aug 24 -current into the kqueue branch.
1.10.2.1	03-Aug-2001	lukem	update to -current
1.13.2.1	01-Oct-2001	fvdl	Catch up with -current.
1.15.2.1	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.16.2.9	11-Dec-2002	thorpej	Sync with HEAD.
1.16.2.8	18-Oct-2002	nathanw	Catch up to -current.
1.16.2.7	27-Aug-2002	thorpej	Sync with -current.
1.16.2.6	13-Aug-2002	nathanw	Catch up to -current.
1.16.2.5	17-Apr-2002	nathanw	Catch up to -current.
1.16.2.4	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.16.2.3	28-Feb-2002	nathanw	Catch up to -current.
1.16.2.2	08-Jan-2002	nathanw	Catch up to -current.
1.16.2.1	03-Nov-2001	nathanw	file pmap.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.53.2.1	30-Aug-2002	gehenna	catch up with -current.
1.75.2.4	11-Dec-2005	christos	Sync with head.
1.75.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.75.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.75.2.1	03-Aug-2004	skrll	Sync with HEAD
1.77.16.4	21-Jan-2008	yamt	sync with head
1.77.16.3	27-Oct-2007	yamt	sync with head.
1.77.16.2	26-Feb-2007	yamt	sync with head.
1.77.16.1	21-Jun-2006	yamt	sync with head.
1.79.30.1	10-Nov-2007	matt	Add AT91 support from Sami Kantoluoto Add TI OMAP2430 support from Marty Fouts @ Danger Inc
1.79.26.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.81.24.5	09-Jan-2008	matt	sync with HEAD
1.81.24.4	09-Nov-2007	matt	Add pmap_icache_sync_range and change arm32_sync_icache to use it. This will only invalidate va that have valid PTEs. This avoids cleaning unneeded cache lines.
1.81.24.3	09-Nov-2007	matt	Make all the evbarm kernels build again. Fix lossage from rebase.
1.81.24.2	06-Nov-2007	matt	sync with HEAD
1.81.24.1	12-Oct-2007	matt	Import TI OMAP 2430 and ARM11/ARMv6 support. Now on ARMv6, the cache is no longer purged on context switches.
1.81.22.1	01-Jan-2008	chris	Sync with HEAD.
1.81.20.1	02-Oct-2007	joerg	Sync with HEAD.
1.81.18.2	28-Feb-2008	rjs	Sync with HEAD.
1.81.18.1	01-Nov-2007	rjs	Sync with HEAD.
1.81.12.1	03-Oct-2007	garbled	Sync with HEAD
1.81.4.1	09-Oct-2007	ad	Sync with head.
1.83.8.1	02-Jan-2008	bouyer	Sync with HEAD
1.83.2.1	18-Feb-2008	mjf	Sync with HEAD.
1.84.10.6	11-Aug-2010	yamt	sync with head.
1.84.10.5	11-Mar-2010	yamt	sync with head
1.84.10.4	16-Sep-2009	yamt	sync with head
1.84.10.3	19-Aug-2009	yamt	sync with head.
1.84.10.2	04-May-2009	yamt	sync with head.
1.84.10.1	16-May-2008	yamt	sync with head.
1.84.8.1	18-May-2008	yamt	sync with head.
1.84.6.3	17-Jan-2009	mjf	Sync with HEAD.
1.84.6.2	28-Sep-2008	mjf	Sync with HEAD.
1.84.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.85.6.2	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.85.6.1	19-Oct-2008	haad	Sync with HEAD.
1.85.4.2	28-Jul-2008	simonb	Sync with head.
1.85.4.1	18-Jul-2008	simonb	Sync with head.
1.85.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.88.10.2	24-Mar-2014	matt	Define PMAP_KMPAGE
1.88.10.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.88.2.1	19-Jan-2009	skrll	Sync with HEAD.
1.94.4.4	21-Apr-2011	rmind	sync with head
1.94.4.3	05-Mar-2011	rmind	sync with head
1.94.4.2	03-Jul-2010	rmind	sync with head
1.94.4.1	16-Mar-2010	rmind	Change struct uvm_object::vmobjlock to be dynamically allocated with mutex_obj_alloc(). It allows us to share the locks among UVM objects.
1.94.2.4	15-Nov-2010	uebayasi	Sync with HEAD.
1.94.2.3	17-Aug-2010	uebayasi	Sync with HEAD.
1.94.2.2	25-Feb-2010	uebayasi	A few more VM_PAGE_TO_MD().
1.94.2.1	10-Feb-2010	uebayasi	Missing bits of pmap_is_page_colored_p() conversion.
1.97.4.1	05-Mar-2011	bouyer	Sync with HEAD
1.97.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.99.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.100.6.1	18-Feb-2012	mrg	merge to -current.
1.100.2.4	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.100.2.3	16-Jan-2013	yamt	sync with (a bit old) head
1.100.2.2	30-Oct-2012	yamt	sync with head
1.100.2.1	17-Apr-2012	yamt	sync with head
1.101.4.2	07-Feb-2013	matt	pullup pmap changes from HEAD
1.101.4.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.111.2.5	03-Dec-2017	jdolecek	update from HEAD
1.111.2.4	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.111.2.3	23-Jun-2013	tls	resync from head
1.111.2.2	25-Feb-2013	tls	resync with head
1.111.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.120.2.2	18-May-2014	rmind	sync with head
1.120.2.1	28-Aug-2013	rmind	sync with head
1.130.2.1	10-Aug-2014	tls	Rebase.
1.135.2.3	11-Mar-2017	snj	Pull up following revision(s) (requested by skrll in ticket #1366): sys/arch/arm/include/arm32/pmap.h: 1.145 sys/arch/arm/arm32/pmap.c: 1.343, 1.344 sys/arch/evbarm/gumstix/gumstix_machdep.c: 1.58 via patch Fixup the compile time decisions around PMAP_{INCLUDE,NEEDS}_PTE_SYNC and fix the options for xscale boards which require the code in pmap_l2ptp_ctor marked as #ifndef PMAP_INCLUDE_PTE_SYNC. Fix the typo (pte -> opte) in this code block and consistently use opte elsewhere. PR/51990: Regression data_abort_handler: data_aborts fsr=0x406 far=0xbfffeff5 on copyout in init -- fix unused. -- Set xscale_cache_clean_addr appropriately and re-arrange default KVA layout to allow direct map for all boards. OVERO/DUOVERO/PEPPER aren't tested. PR/52010: Regression: Gumstix Verdex is hanging in enabling cache + KASSERT ram_size
1.135.2.2	27-May-2015	msaitoh	branches: 1.135.2.2.4; Pull up following revision(s) (requested by skrll in ticket #805): sys/arch/arm/include/arm32/pmap.h: revision 1.138 sys/arch/arm/arm/cpufunc.c: revision 1.151 sys/arch/arm/arm32/bus_dma.c: revision 1.90 sys/arch/arm/broadcom/bcm53xx_pax.c: revision 1.14 sys/arch/arm/arm32/bus_dma.c: revision 1.91 sys/arch/arm/samsung/exynos_space.c: revision 1.2 sys/arch/arm/arm32/db_machdep.c: revision 1.23 sys/arch/arm/allwinner/awin_space.c: revision 1.4 sys/arch/arm/include/rwlock.h: revision 1.9 sys/arch/arm/amlogic/amlogic_space.c: revision 1.2 sys/arch/arm/zynq/zynq_space.c: revision 1.2 sys/arch/arm/broadcom/bcm2835_space.c: revision 1.7 sys/arch/arm/arm32/pmap.c: revision 1.317 sys/arch/arm/include/locore.h: revision 1.19 sys/arch/arm/include/mutex.h: revision 1.20 sys/arch/arm/include/lock.h: revision 1.31 sys/arch/arm/include/lock.h: revision 1.32 sys/arch/arm/broadcom/bcmgen_space.c: revision 1.5 - Kill redundant semicolons. - Indentation. - Improve inline asm around dsb/dmb/isb: - always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
1.135.2.1	09-Nov-2014	martin	Pull up following revision(s) (requested by skrll in ticket #188): sys/arch/arm/include/arm32/pmap.h: revision 1.136 sys/arch/arm/include/armreg.h: revision 1.100 sys/arch/arm/cortex/gic.c: revision 1.11 sys/arch/arm/arm32/db_interface.c: revision 1.54 sys/arch/arm/include/armreg.h: revision 1.101 sys/arch/arm/cortex/gic.c: revision 1.12 sys/arch/arm/arm32/arm32_machdep.c: revision 1.107 sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.19 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.20 sys/arch/evbarm/conf/BPI: revision 1.5 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.21 sys/arch/arm/arm32/pmap.c: revision 1.306 sys/arch/arm/arm32/db_machdep.c: revision 1.22 sys/arch/arm/arm32/arm32_tlb.c: revision 1.3 sys/arch/arm/arm/undefined.c: revision 1.55 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.22 sys/arch/arm/arm32/pmap.c: revision 1.307 sys/arch/arm/arm32/arm32_tlb.c: revision 1.4 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.23 sys/arch/arm/arm32/arm32_tlb.c: revision 1.5 sys/arch/evbarm/conf/BPI: revision 1.8 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.24 sys/arch/arm/arm32/arm32_tlb.c: revision 1.6 sys/arch/arm/arm32/arm32_tlb.c: revision 1.7 sys/arch/evbarm/conf/CUBIETRUCK: revision 1.5 sys/arch/arm/pic/pic.c: revision 1.23 sys/arch/arm/pic/pic.c: revision 1.24 sys/arch/arm/pic/picvar.h: revision 1.11 sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.20 sys/arch/arm/mainbus/cpu_mainbus.c: revision 1.16 sys/arch/arm/arm32/pmap.c: revision 1.298 sys/arch/arm/arm/cpufunc_asm_arm11.S: revision 1.17 sys/arch/arm/arm/cpufunc_asm_pj4b.S: revision 1.5 sys/arch/arm/arm32/pmap.c: revision 1.310 sys/arch/arm/arm32/pmap.c: revision 1.311 sys/arch/arm/arm32/arm32_kvminit.c: revision 1.32 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.19 sys/arch/arm/arm32/arm32_boot.c: revision 1.10 sys/arch/arm/arm/ast.c: revision 1.25 sys/arch/arm/include/armreg.h: revision 1.98 sys/uvm/pmap/pmap_tlb.c: revision 1.10 sys/arch/arm/arm32/arm32_boot.c: revision 1.8 sys/arch/arm/arm32/arm32_boot.c: revision 1.9 sys/arch/arm/arm/arm_machdep.c: revision 1.43 Various ARM MP fixes.
1.135.2.2.4.1	13-Mar-2017	skrll	Sync with netbsd-7-1-RELEASE
1.137.2.6	28-Aug-2017	skrll	Sync with HEAD
1.137.2.5	05-Oct-2016	skrll	Sync with HEAD
1.137.2.4	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.137.2.3	22-Sep-2015	skrll	Sync with HEAD
1.137.2.2	06-Jun-2015	skrll	Sync with HEAD
1.137.2.1	06-Apr-2015	skrll	Sync with HEAD
1.144.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.144.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.154.2.2	20-Oct-2018	pgoyette	Sync with head
1.154.2.1	07-Apr-2018	pgoyette	Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
1.155.2.3	21-Apr-2020	martin	Sync with HEAD
1.155.2.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.155.2.1	10-Jun-2019	christos	Sync with HEAD
1.156.4.1	27-Feb-2020	martin	Pull up following revision(s) (requested by skrll in ticket #742): sys/arch/arm/arm32/pmap.c: revision 1.388 sys/arch/arm/arm32/armv7_generic_space.c: revision 1.11 sys/arch/arm/arm/cpufunc.c: revision 1.176 sys/arch/arm/conf/Makefile.arm: revision 1.54 (via patch) sys/arch/arm/include/arm32/pmap.h: revision 1.161 Fix the armv[67] memory attributes for uncached memory. Previously it was mapped as strongly-ordered which meant that unaligned accesses would fault. armv7_generic_bs_map now maps pages with PMAP_DEV which is treated as SO bus_dma continues to use PMAP_NOCACHE as appropriate, but this now get mapped to the correct memory attribute bits for armv[67] DEVMAP_ENTRY usees a new flag PTE_DEV. The workaround for the unaligned access faults is now removed. XXX Other armv[67] boards bus_space implementations should be checked. XXX There is scope to reduce the difference to aarch64
1.157.2.3	29-Feb-2020	ad	Sync with head.
1.157.2.2	25-Jan-2020	ad	Sync with head.
1.157.2.1	17-Jan-2020	ad	Sync with head.
1.166.2.1	20-Apr-2020	bouyer	Sync with HEAD
1.169.6.1	13-May-2021	thorpej	Sync with HEAD.
1.173.4.1	14-Oct-2023	martin	Pull up following revision(s) (requested by skrll in ticket #411): sys/arch/evbarm/nslu2/nslu2_machdep.c: revision 1.41 sys/arch/evbarm/gumstix/gumstix_machdep.c: revision 1.75 sys/arch/evbarm/iq80321/iq80321_machdep.c: revision 1.66 sys/arch/iyonix/iyonix/iyonix_machdep.c: revision 1.34 sys/arch/zaurus/zaurus/machdep.c: revision 1.52 sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c: revision 1.41 sys/arch/hpcarm/hpcarm/pxa2x0_hpc_machdep.c: revision 1.33 sys/arch/evbarm/iq80310/iq80310_machdep.c: revision 1.96 sys/arch/evbarm/adi_brh/brh_machdep.c: revision 1.53 sys/arch/arm/include/arm32/pmap.h: revision 1.177 sys/arch/evbarm/viper/viper_machdep.c: revision 1.34 sys/arch/evbarm/iyonix/iyonix_machdep.c: revision 1.5 sys/arch/evbarm/npwr_fc/npwr_fc_machdep.c: revision 1.30 sys/arch/evbarm/hdl_g/hdlg_machdep.c: revision 1.35 sys/arch/arm/arm32/pmap.c: revision 1.440 sys/arch/evbarm/lubbock/lubbock_machdep.c: revision 1.45 sys/arch/evbarm/ixdp425/ixdp425_machdep.c: revision 1.47 Fix non-DIAGNOSTIC builds
1.21	23-Jan-2016	christos	Rename the cpu_id() define to cpu_idnum() so that it does not conflict with dtrace and friends.
1.20	04-Feb-2014	matt	branches: 1.20.6; _setsoftintr is long dead. reap any leftovers from arm.
1.19	27-Jul-2012	matt	branches: 1.19.2; 1.19.4; Remove safepri and use IPL_SAFEPRI instead. This may be defined in a MD header file (if not, a value of 0 is assmued).
1.18	29-Jan-2009	nonaka	branches: 1.18.14; 1.18.22; fix splx() function prototype.
1.17	11-Jun-2008	rafal	branches: 1.17.4; 1.17.12; Let the shark boot again. Fixes port-shark/38929. While I'm here fix the splsoft... macros to always raise the IPL (oops!).
1.16	27-Apr-2008	matt	branches: 1.16.2; 1.16.4; Merge kernel changes in matt-armv6 to HEAD.
1.15	06-Jan-2008	matt	branches: 1.15.6; 1.15.8; 1.15.10; Cleanup softint lossage.
1.14	03-Dec-2007	ad	branches: 1.14.6; Interrupt handling changes, in discussion since February: - Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
1.13	17-Oct-2007	garbled	branches: 1.13.2; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.12	08-Aug-2007	tsutsui	branches: 1.12.2; 1.12.4; Remove obsolete spllowersoftclock(9).
1.11	01-Jul-2007	toshii	branches: 1.11.4; 1.11.6; 1.11.8; Quick and dirty fix for hpcarm build failure, using hpcarm specific softintr code for now.
1.10	09-Mar-2007	thorpej	branches: 1.10.2; 1.10.4; 1.10.10; Make ipl_t and ipl_cookie_t 8-bit values. kmutex is now down to 12 bytes (from 20) on ARM. Approved by Matt Thomas.
1.9	18-Feb-2007	matt	Don't export spl_smasks or soft_interrupts. They are local to intr.c Make sure that softintr_init() is called when needed. Assume __HAVE_GENERIC_SOFT_INTERRUPTS is defined (since newlock2 requires it).
1.8	18-Feb-2007	matt	Add __HAVE_GENERIC_SOFT_INTERRUPTS support for shark. This was done by extenting the current arm generic intrs to support softintrs. Add IPL_SOFTCLOCK, IPL_SOFTNET, IPL_SOFTSERIAL.
1.7	21-Dec-2006	yamt	branches: 1.7.2; merge yamt-splraiseipl branch. - finish implementing splraiseipl (and makeiplcookie). http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html - complete workqueue(9) and fix its ipl problem, which is reported to cause audio skipping. - fix netbt (at least compilation problems) for some ports. - fix PR/33218.
1.6	16-Jun-2003	thorpej	branches: 1.6.18; 1.6.48; 1.6.50; Rename IPL_IMP -> IPL_VM.
1.5	27-Oct-2001	rearnsha	branches: 1.5.2; Add new spl level -- _SPL_STATCLOCK.
1.4	21-Apr-2001	bjh21	branches: 1.4.2; 1.4.6; Multiple-inclusion protection.
1.3	13-Apr-2001	thorpej	Remove the use of splimp() from the NetBSD kernel. splnet() and only splnet() is allowed for the protection of data structures used by network devices.
1.2	31-Mar-2001	toshii	Increase spl_masks[] size by one and set the extra element to 0. irq_entry accesses here.
1.1	23-Feb-2001	reinoud	branches: 1.1.2; 1.1.4; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.4.4	23-Apr-2001	bouyer	Sync with HEAD.
1.1.4.3	21-Apr-2001	bouyer	Sync with HEAD
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file psl.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.1.2.2	21-Jun-2001	nathanw	Catch up to -current.
1.1.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.4.6.1	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.4.2.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.5.2.2	27-Oct-2001	rearnsha	Add new spl level -- _SPL_STATCLOCK.
1.5.2.1	27-Oct-2001	rearnsha	file psl.h was added on branch nathanw_sa on 2001-10-27 16:37:25 +0000
1.6.50.3	21-Sep-2006	yamt	implement splraiseipl for hpcarm, shark, and acorn32.
1.6.50.2	21-Sep-2006	yamt	revert the previous which was committed unintentionally.
1.6.50.1	21-Sep-2006	yamt	* empty log message *
1.6.48.1	12-Jan-2007	ad	Sync with head.
1.6.18.5	21-Jan-2008	yamt	sync with head
1.6.18.4	07-Dec-2007	yamt	sync with head
1.6.18.3	03-Sep-2007	yamt	sync with head.
1.6.18.2	26-Feb-2007	yamt	sync with head.
1.6.18.1	30-Dec-2006	yamt	sync with head.
1.7.2.2	12-Mar-2007	rmind	Sync with HEAD.
1.7.2.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.10.10.1	03-Oct-2007	garbled	Sync with HEAD
1.10.4.1	11-Jul-2007	mjf	Sync with head.
1.10.2.3	03-Dec-2007	ad	Sync with HEAD.
1.10.2.2	20-Aug-2007	ad	Sync with HEAD.
1.10.2.1	15-Jul-2007	ad	Sync with head.
1.11.8.2	09-Dec-2007	jmcneill	Sync with HEAD.
1.11.8.1	09-Aug-2007	jmcneill	Sync with HEAD.
1.11.6.4	28-Feb-2008	rjs	Sync with HEAD.
1.11.6.3	26-Dec-2007	rjs	Sync with HEAD.
1.11.6.2	01-Nov-2007	rjs	Sync with HEAD.
1.11.6.1	31-Jul-2007	rjs	Don't include softintr.h. Remove _P() usage.
1.11.4.1	15-Aug-2007	skrll	Sync with HEAD.
1.12.4.2	28-Jan-2008	matt	Given the that there are only 4 IPLs (ignoring soft IPLs), a number of cleanups can be done: Remove _SPL_* aliases. Don't store irqmasks in ci_cpl, just make it an ipl level. Add fast softint switching support.
1.12.4.1	09-Jan-2008	matt	sync with HEAD
1.12.2.2	20-Jan-2008	chris	Sync to HEAD.
1.12.2.1	01-Jan-2008	chris	Sync with HEAD.
1.13.2.2	18-Feb-2008	mjf	Sync with HEAD.
1.13.2.1	08-Dec-2007	mjf	Sync with HEAD.
1.14.6.1	08-Jan-2008	bouyer	Sync with HEAD
1.15.10.2	04-May-2009	yamt	sync with head.
1.15.10.1	16-May-2008	yamt	sync with head.
1.15.8.2	17-Jun-2008	yamt	sync with head.
1.15.8.1	18-May-2008	yamt	sync with head.
1.15.6.2	29-Jun-2008	mjf	Sync with HEAD.
1.15.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.16.4.1	18-Jun-2008	simonb	Sync with head.
1.16.2.1	23-Jun-2008	wrstuden	Sync w/ -current. 34 merge conflicts to follow.
1.17.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.17.4.1	03-Mar-2009	skrll	Sync with HEAD.
1.18.22.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.18.14.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.18.14.1	30-Oct-2012	yamt	sync with head
1.19.4.1	18-May-2014	rmind	sync with head
1.19.2.2	03-Dec-2017	jdolecek	update from HEAD
1.19.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.20.6.1	19-Mar-2016	skrll	Sync with HEAD
1.23	04-May-2020	joerg	Prevent double definition of pt_entry_t from machine/param.h
1.22	02-Feb-2020	skrll	G/C L1_TABLE_SIZE_REAL
1.21	18-Jan-2020	skrll	Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) by creating a new pool l1ttpl for the userland L1 translation table which needs to be 8KB and 8KB aligned. Limit the pool to maxproc and add hooks to allow the sysctl changing of maxproc to adjust the pool. This comes at a 5% performance penalty for build.sh -j8 kernel on a Tegra TK1.
1.20	19-Jun-2019	skrll	branches: 1.20.4; Whitespace
1.19	29-Oct-2014	skrll	branches: 1.19.20; Update a comment to reflect ARM ARMv7
1.18	08-Aug-2014	skrll	Comment whitespace.
1.17	08-Aug-2014	skrll	Spell user with an e.
1.16	31-Jul-2014	skrll	Trailing whitespace
1.15	26-Feb-2014	matt	branches: 1.15.2; Add XN bit L2 large pages.
1.14	22-Feb-2014	matt	Add L1_TABLE_SIZE_REAL
1.13	11-Sep-2012	matt	branches: 1.13.2; 1.13.4; Fix the CACHE_MASKs for armv6 to include TEX and S bits. Fix a comment in pte.h
1.12	20-Aug-2012	matt	Add support for mapping SuperSection on armv6 and armv7. These always a domain of 0 so move the kernel from domain 15 to domain 0.
1.11	16-Aug-2012	matt	Add L2_S_SEGSIZE which is the number of bytes that a L2 page table will map.
1.10	10-Mar-2011	bsh	branches: 1.10.4; 1.10.10; 1.10.12; Preliminary ARM11 MPCore support. I have confirmed this commit doesn't affect existing evbarm kernels by comparing binaries.
1.9	16-Jun-2010	jmcneill	branches: 1.9.2; PR port-arm/43299: Support added for igepv2/cortexa8/omap3530 Apply patch from PR, with build fixes. ok skrll, matt
1.8	27-Apr-2008	matt	branches: 1.8.18; 1.8.20; 1.8.22; Merge kernel changes in matt-armv6 to HEAD.
1.7	21-May-2003	thorpej	branches: 1.7.82; 1.7.106; 1.7.108; 1.7.110; Remove #ifdefs supporting the old pmap, switching fully to the new.
1.6	18-Apr-2003	scw	Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems. Some features of the new pmap are: - It allows L1 descriptor tables to be shared efficiently between multiple processes. A typical "maxusers 32" kernel, where NPROC is set to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily with just 4 L1s. This completely solves the problem of running out of contiguous physical memory for allocating new L1s at runtime on a busy system. - Much improved cache/TLB management "smarts". This change ripples out to encompass the low-level context switch code, which is also much smarter about when to flush the cache/TLB, and when not to. - Faster allocation of L2 page tables and associated metadata thanks, in part, to the pool_cache enhancements recently contributed to NetBSD by Wasabi Systems. - Faster VM space teardown due to accurate referenced tracking of L2 page tables. - Better/faster cache-alias tracking. The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel config file, and making the necessary changes to the port-specific initarm() function. Several ports have already been converted and will be committed shortly.
1.5	05-Apr-2002	thorpej	* Rewrite the 32-bit ARM pte.h based on the ARM architecture manual. Significant cleanup, here, including better PTE bit names. * Add XScale PTE extensions (ECC enable, write-allocate cache mode). * Mechanical changes everywhere else to update for new pte.h. While doing this, two bugs (as a result of typos) were fixed in arm/arm32/bus_dma.c evbarm/integrator/int_bus_dma.c
1.4	04-Apr-2002	thorpej	Rename flags that are really part of the pv_entry/mdpage into pmap.h and give them more descriptive names and better comments: * PT_M -> PVF_MOD (page is modified) * PT_H -> PVF_REF (page is referenced) * PT_W -> PVF_WIRED (mapping is wired) * PT_Wr -> PVF_WRITE (mapping is writable) * PT_NC -> PVF_NC (mapping is non-cacheable; multiple mappings)
1.3	03-Apr-2002	reinoud	In analogy to L2_LPAGE_SIZE add L2_SPAGE_SIZE ....
1.2	02-Mar-2002	chris	Update the types, pt_entry and pd_entry should be unsigned, and fixed at 32 bits.
1.1	23-Nov-2001	thorpej	branches: 1.1.2; 1.1.4; - Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.1.4.4	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.1.4.3	16-Mar-2002	jdolecek	Catch up with -current.
1.1.4.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.1	23-Nov-2001	thorpej	file pte.h was added on branch kqueue on 2002-01-10 19:37:56 +0000
1.1.2.4	17-Apr-2002	nathanw	Catch up to -current.
1.1.2.3	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.1.2.2	08-Jan-2002	nathanw	Catch up to -current.
1.1.2.1	23-Nov-2001	nathanw	file pte.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.7.110.2	11-Aug-2010	yamt	sync with head.
1.7.110.1	16-May-2008	yamt	sync with head.
1.7.108.1	18-May-2008	yamt	sync with head.
1.7.106.1	02-Jun-2008	mjf	Sync with HEAD.
1.7.82.2	09-Nov-2007	matt	Make all the evbarm kernels build again. Fix lossage from rebase.
1.7.82.1	28-Aug-2007	matt	Add ArmV6 pte/pde extensions.
1.8.22.2	21-Apr-2011	rmind	sync with head
1.8.22.1	03-Jul-2010	rmind	sync with head
1.8.20.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.8.18.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.9.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.10.12.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.10.10.1	08-Feb-2013	riz	sys/arch/arm/include/arm32/pte.h 1.11 sys/arch/evbarm/marvell/marvell_machdep.c 1.19 via patch Switch to ARM_VECTORS_HIGH for Sheeva CPU. [msaitoh, ticket #785]
1.10.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.10.4.1	30-Oct-2012	yamt	sync with head
1.13.4.1	18-May-2014	rmind	sync with head
1.13.2.2	03-Dec-2017	jdolecek	update from HEAD
1.13.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.15.2.1	10-Aug-2014	tls	Rebase.
1.19.20.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.19.20.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.20.4.2	29-Feb-2020	ad	Sync with head.
1.20.4.1	25-Jan-2020	ad	Sync with head.
1.2	14-Mar-2009	dsl	Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.136; 1.1.144; 1.1.150; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.150.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.1.144.1	28-Apr-2009	skrll	Sync with HEAD.
1.1.136.1	04-May-2009	yamt	sync with head.
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file rtc.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.2	14-Jul-2001	matt	branches: 1.2.6; Make <sysarch.h> valid for all arm platforms. Adjust/remove port-specific includes as required.
1.1	23-Feb-2001	reinoud	branches: 1.1.4; 1.1.6; Big patch for merging common include files of the new hpcarm tree and the old arm32 tree into the new arm substree. All moved files are relinked with a stub that included the file from the new location; this might be done better later.
1.1.6.1	03-Aug-2001	lukem	update to -current
1.1.4.2	12-Mar-2001	bouyer	Sync with HEAD.
1.1.4.1	23-Feb-2001	bouyer	file sysarch.h was added on branch thorpej_scsipi on 2001-03-12 13:27:25 +0000
1.2.6.2	14-Jul-2001	matt	Make <sysarch.h> valid for all arm platforms. Adjust/remove port-specific includes as required.
1.2.6.1	14-Jul-2001	matt	file sysarch.h was added on branch nathanw_sa on 2001-07-14 00:23:11 +0000
1.13	11-Feb-2020	skrll	G/C
1.12	24-Jan-2018	skrll	branches: 1.12.4; 1.12.10; Remove port-acorn26 OK core@
1.11	07-May-2013	matt	Move #define __HAVE_OLD_DISKLABEL to <arm/types.h>
1.10	07-May-2013	matt	Make all ports use a common disklabel.h with MAXPARTITIONS set to 16. Only RAW_PART varies between ports.
1.9	07-Jul-2010	chs	implement cpu_lwp_setprivate() on several platforms.
1.8	21-May-2003	thorpej	branches: 1.8.110; 1.8.130; 1.8.132; Remove #ifdefs supporting the old pmap, switching fully to the new.
1.7	18-Apr-2003	scw	Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems. Some features of the new pmap are: - It allows L1 descriptor tables to be shared efficiently between multiple processes. A typical "maxusers 32" kernel, where NPROC is set to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily with just 4 L1s. This completely solves the problem of running out of contiguous physical memory for allocating new L1s at runtime on a busy system. - Much improved cache/TLB management "smarts". This change ripples out to encompass the low-level context switch code, which is also much smarter about when to flush the cache/TLB, and when not to. - Faster allocation of L2 page tables and associated metadata thanks, in part, to the pool_cache enhancements recently contributed to NetBSD by Wasabi Systems. - Faster VM space teardown due to accurate referenced tracking of L2 page tables. - Better/faster cache-alias tracking. The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel config file, and making the necessary changes to the port-specific initarm() function. Several ports have already been converted and will be committed shortly.
1.6	15-Oct-2002	bjh21	Switch to using the MI C versions of setrunqueue() and remrunqueue(). GCC produces almost exactly the same instructions as the hand-assembled versions, albeit in a different order. It even found one place where it could shave one off. Its insistence on creating a stack frame might slow things down marginally, but not, I think, enough to matter.
1.5	07-Oct-2002	thorpej	Add support for restartable atomic sequences on 26-bit ARM. Compile tested only. Now that all ARM systems have RAS, move __HAVE_RAS from arm/arm32/types.h to arm/types.h.
1.4	22-Sep-2002	simonb	Only need to define __HAVE_MD_RUNQUEUE once here...
1.3	22-Sep-2002	gmcgarry	Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives.
1.2	31-Aug-2002	thorpej	Add machine-dependent bits of RAS for arm32.
1.1	22-Nov-2001	thorpej	branches: 1.1.2; 1.1.4; 1.1.12; Add 26-bit and 32-bit types.h files, which indicate the programming model in use for a given platform (__PROG26 vs __PROG32), then pulls in <arm/types.h>. Change each ARM port to pull in <arm/arm26/types.h> or <arm/arm32/types.h> as appropriate. Change all references to PROG26 and PROG32 to __PROG26 and __PROG32. Eliminate the opt_progmode.h header file.
1.1.12.1	31-Aug-2002	gehenna	catch up with -current.
1.1.4.4	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.1.4.3	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.1.4.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.1	22-Nov-2001	thorpej	file types.h was added on branch kqueue on 2002-01-10 19:37:56 +0000
1.1.2.4	18-Oct-2002	nathanw	Catch up to -current.
1.1.2.3	17-Sep-2002	nathanw	Catch up to -current.
1.1.2.2	08-Jan-2002	nathanw	Catch up to -current.
1.1.2.1	22-Nov-2001	nathanw	file types.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.8.132.1	05-Mar-2011	rmind	sync with head
1.8.130.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.8.110.1	11-Aug-2010	yamt	sync with head.
1.12.10.1	29-Feb-2020	ad	Sync with head.
1.12.4.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.1	15-Feb-2014	matt	branches: 1.1.2; file vmpagemd.h was initially added on branch matt-nb5-mips64.
1.1.2.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.58	07-Sep-2024	andvar	spelling and grammar fixes, mainly in comments.
1.57	16-Apr-2023	skrll	branches: 1.57.6; Rename VM_KERNEL_IO_ADDRESS to VM_KERNEL_IO_BASE to match RISC-V It's less letters, matches other similar variables and will help with sharing code between the two architectures. NFCI.
1.56	08-Oct-2020	he	Bump MAXDSIZ from 1536 to 1836. 1836 is 2048-128(MAXTSIZ)-64(MAXSSIZ). Gives us a fighting chance to build rust natively. OK'ed by skrll@
1.55	29-Aug-2020	skrll	Cover the full kernel address range in KASAN
1.54	11-Jul-2020	skrll	Fix ARM builds
1.53	10-Jul-2020	skrll	Remove stray #else / #endif block in KASAN support commit
1.52	10-Jul-2020	skrll	Oops... deal with a last minute #define name change. KASAN support now builds.
1.51	10-Jul-2020	skrll	Add support for KASAN on ARMv[67] Thanks to maxv for many pointers and reviews.
1.50	10-Jul-2020	skrll	Do previous differently for now
1.49	08-Jul-2020	skrll	Provide some KVA layout #defines in arm32/vmparam.h and simplify fdt/platform.h as a nice side effect
1.48	08-Jul-2020	skrll	Remove an unnecessary #ifdef
1.47	13-Jan-2020	christos	Revert previous; we don't want arm to have variable page size. Instead nick@ is fixing the cache pages issue to use a separate pool.
1.46	11-Jan-2020	christos	Define the min and max page size supported for the benefit of jemalloc
1.45	19-Jun-2019	skrll	branches: 1.45.2; 1.45.4; Update a comment
1.44	30-Mar-2019	christos	Need to include <sys/cdefs.h> so that the _ARM_CPU* macros get defined so that we always select the correct page size (8K for armv6+).
1.43	27-Mar-2019	christos	- expose vmparams to userland on arm, like other archs do. - remove unneeded includes
1.42	27-Oct-2018	skrll	Trailing whitespace
1.41	13-Feb-2017	skrll	branches: 1.41.12; 1.41.14; G/C VM_MAX_KERNEL_BUF
1.40	18-Oct-2015	jmcneill	branches: 1.40.2; 1.40.4; pull in arm/arm32/param.h
1.39	20-Jun-2015	skrll	__USE_TOPDOWN_VM Fixes PR/49974: mmap(2) of large anonymous regions is broken "go for it" from matt@
1.38	02-Jun-2015	matt	Back off MAXDSIZ to 1.5GB to avoid some virtual memory exhausted messages.
1.37	28-May-2015	matt	ARM systems are no longer small, increase MAXTSIZ/MAXDSIZ/MAXSSIZ.
1.36	24-Feb-2015	joerg	Restore PAGER_MAP_DEFAULT_SIZE for ARMv4, they typically have only 256MB KVA.
1.35	27-Jul-2014	skrll	branches: 1.35.4; More fixes as a step towards ARM_MMU_EXTENDED on RPI. - don't set CPU_CONTROL_SYST_ENABLE in arm11x6_setup for ARM_MMU_EXTENDED - Use the new MMU defines for V6N - pull in arm/cpuconf.h in vmparam s that VM_MAXUSER_ADDRESS gets set correctly.
1.34	31-Mar-2014	matt	branches: 1.34.2; For ARM_MMU_EXTENDED, a KERNEL_BASE >= 0x80000000 is ok but a VM_USER_MAXADDRESS can not be more than 0x80000000 - PAGE_SIZE.
1.33	26-Feb-2014	martin	Revert previous - will fix userland with new sysctls for VM_MIN_ADDRESS/ VM_MAXADDESS.
1.32	26-Feb-2014	martin	Include param.h here - userland expects VM_* defines to work with just this include, but PAGE_SIZE relies on PGSHIFT now, which is not defined here. Matt: please rearrange/cleanup differently if you prefer (but test build src/tests/lib/libc/sys/t_mlock for example.)
1.31	26-Feb-2014	matt	Use PAGE_SIZE instead of 1000
1.30	21-Feb-2014	skrll	Remove unnecessary include of sys/simplelock.h
1.29	27-Feb-2013	matt	branches: 1.29.6; Define PAGESHIFT using PGSHIFT
1.28	25-Feb-2013	matt	Bump max text/data/stack sizes to more reasonable values.
1.27	16-Aug-2012	matt	branches: 1.27.2; Tweak max addresses a bit so that [r1, #off] can't overflow them.
1.26	16-Feb-2012	christos	expose stuff that crash needs to kmemuser
1.25	14-Nov-2010	uebayasi	branches: 1.25.8; 1.25.12; 1.25.16; Move struct vm_page_md definition from vmparam.h to pmap.h, because it's used only by pmap. vmparam.h has definitions for wider audience. All GENERIC kernels build tested, except ia64. powerpc/include/booke/vmparam.h has one too, but it has no pmap.h, so it's left as is.
1.24	06-Mar-2009	joerg	branches: 1.24.2; 1.24.4; Remove SHMMAXPGS from all kernel configs. Dynamically compute the initial limit as 1/4 of the physical memory. Ensure the limit is at least 1024 pages, the old default on most platforms.
1.23	06-Aug-2008	matt	branches: 1.23.2; 1.23.8; 1.23.12; Change pv_entries to use SLIST. For VIPT caches, keep track of when pages are dirty so that their content can be flushed back to main memory. This is done when the page is read-only mapped by more than 1 color. Pages become when either their modified bit gets set or an unmanaged writeable page is mapped. When a page in unmapped or changed to read-only, run pmap_vac_me_harder in case the page can be mapped read-only. Thanks are given to Imre Deak for giving me the idea to assert for PVF_DIRTY.
1.22	27-Apr-2008	matt	branches: 1.22.2; 1.22.6; Merge kernel changes in matt-armv6 to HEAD.
1.21	04-Jan-2008	ad	branches: 1.21.6; 1.21.8; 1.21.10; Header cleanup.
1.20	06-Jan-2007	christos	branches: 1.20.20; 1.20.24; 1.20.26; 1.20.32; 1.20.38; From Scott Alan in http://mail-index.netbsd.org/port-arm/2006/07/26/0000.html This one is really simple. I wanted to use KERNEL_BASE in an assembly source, but arch/arm/include/arm32/vmparam.h wasn't protected by #ifndef __ASSEMBLER__. The patch adds the protection.
1.19	22-May-2003	thorpej	branches: 1.19.18; 1.19.48; 1.19.54; Use virtual_avail and virtual_end to compute the size of the available kernel VM space for VM_MAX_KERNEL_BUF, and move the definition into generic ARM code.
1.18	21-May-2003	thorpej	Remove #ifdefs supporting the old pmap, switching fully to the new.
1.17	04-May-2003	thorpej	VM_{MIN,MAX}* are now the same for ARM32_PMAP_NEW with both new and old VM layout, so merge the two cases.
1.16	03-May-2003	thorpej	Don't expose KERNEL_TEXT_BASE outside of board-specific code. This gives individual board start-up code more flexibility about where the kernel starts in the kernel address space.
1.15	02-May-2003	thorpej	Don't need to reserve a page of space before KERNEL_BASE in the ARM32_NEW_VM_LAYOUT case.
1.14	02-May-2003	thorpej	Eliminate PTE_BASE and the PT-PT completely in the ARM32_PMAP_NEW case. Also in the ARM32_PMAP_NEW case, reclaim the USPACE-bytes of wasted space at the top of the user address that hasn't been needed for a very very long time.
1.13	18-Apr-2003	scw	Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems. Some features of the new pmap are: - It allows L1 descriptor tables to be shared efficiently between multiple processes. A typical "maxusers 32" kernel, where NPROC is set to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily with just 4 L1s. This completely solves the problem of running out of contiguous physical memory for allocating new L1s at runtime on a busy system. - Much improved cache/TLB management "smarts". This change ripples out to encompass the low-level context switch code, which is also much smarter about when to flush the cache/TLB, and when not to. - Faster allocation of L2 page tables and associated metadata thanks, in part, to the pool_cache enhancements recently contributed to NetBSD by Wasabi Systems. - Faster VM space teardown due to accurate referenced tracking of L2 page tables. - Better/faster cache-alias tracking. The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel config file, and making the necessary changes to the port-specific initarm() function. Several ports have already been converted and will be committed shortly.
1.12	02-Apr-2003	thorpej	Use PAGE_SIZE rather than NBPG.
1.11	10-Dec-2002	thorpej	Use __LDPGSZ (which must be == USRTEXT) as the text address for a.out executables, and eliminate the USRTEXT constant, which was only used by the a.out exec code.
1.10	09-Aug-2002	thorpej	Add some code, conditional on PMAP_ALIAS_DEBUG, that can be used to hunt for virtual aliases between managed (pmap_enter) and non-managed (pmap_kenter_pa) mappings.
1.9	23-Mar-2002	thorpej	branches: 1.9.2; 1.9.4; KERNEL_SPACE_START -> KERNEL_BASE
1.8	23-Mar-2002	thorpej	* Rename PROCESS_PAGE_TBLS_BASE -> PTE_BASE * Rename ALT_PAGE_TBLS_BASE -> APTE_BASE * Garbage-collect PAGE_TABLE_SPACE_START
1.7	05-Mar-2002	thorpej	Switch back to using vm_page_md (thanks chuq for finding the bug in the code that made it unstable before!)
1.6	03-Mar-2002	chris	Implement pmap_growkernel for arm32 based ports. Note that this has been compiled on some systems, cats, IQ80310, IPAQ, netwinder and shark (note that shark's build is currently broken due to other reasons), but only actually run on cats. Shark doesn't make use of the functionality as I believe there has to be a correlation between OFW and the kernel tables so that calls into OFW work.
1.5	06-Feb-2002	thorpej	Back out all the vm_page_md changes. They are causing some mysterious problems (a similar change to the i386 pmap causes mysterious problems there, as well), and the issue needs to be investigated more.
1.4	05-Feb-2002	thorpej	Use vm_page_md rather than pmap_physseg. Saves lots of cycles in common operations.
1.3	23-Nov-2001	thorpej	branches: 1.3.2; Move even more constants into the shared 32-bit vmparam.h header. Cleanup elsewhere will have to be done before we can sanitize this header any further.
1.2	23-Nov-2001	thorpej	- Move more contents of various <machine/vmparam.h> files into <arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap implementation). - Since the MMU definitions in pte.h are specific to ARM processors that support 32-bit mode, move pte.h to <arm/arm32/pte.h>. - Make the Netwinder startup file build again (use PT_B\|PT_C, rather than PT_CACHEABLE, since the latter expands to a variable these days).
1.1	11-Nov-2001	thorpej	branches: 1.1.2; 1.1.4; Even though the ARM architecture defines large, standard, and small pages, we use the standard (4K) page size as PAGE_SIZE. Make the PAGE_SIZE related variables compile-time constants that reflect this. Results in a bit over 2K worth of .text savings, and visibly better code in the places that use PAGE_SIZE, etc.
1.1.4.6	11-Dec-2002	thorpej	Sync with HEAD.
1.1.4.5	13-Aug-2002	nathanw	Catch up to -current.
1.1.4.4	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.1.4.3	28-Feb-2002	nathanw	Catch up to -current.
1.1.4.2	08-Jan-2002	nathanw	Catch up to -current.
1.1.4.1	11-Nov-2001	nathanw	file vmparam.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
1.1.2.2	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.1.2.1	11-Nov-2001	thorpej	file vmparam.h was added on branch thorpej-mips-cache on 2001-11-12 21:16:33 +0000
1.3.2.6	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.3.2.5	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.3.2.4	16-Mar-2002	jdolecek	Catch up with -current.
1.3.2.3	11-Feb-2002	jdolecek	Sync w/ -current.
1.3.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.3.2.1	23-Nov-2001	thorpej	file vmparam.h was added on branch kqueue on 2002-01-10 19:37:57 +0000
1.9.4.1	07-Dec-2002	he	Pull up revision 1.10 (requested by thorpej in ticket #714): Add code, conditional on PMAP_ALIAS_DEBUG, which can be used to hunt for virtual aliases between managed (pmap_enter) and unmanaged (pmap_kenter_pa) mappings.
1.9.2.1	30-Aug-2002	gehenna	catch up with -current.
1.19.54.1	21-Feb-2007	snj	branches: 1.19.54.1.4; Pull up following revision(s) (requested by matt in ticket #457): sys/arch/arm/include/arm32/vmparam.h: revision 1.20 From Scott Allan in http://mail-index.netbsd.org/port-arm/2006/07/26/0000.html This one is really simple. I wanted to use KERNEL_BASE in an assembly source, but arch/arm/include/arm32/vmparam.h wasn't protected by #ifndef __ASSEMBLER__. The patch adds the protection.
1.19.54.1.4.1	10-Nov-2007	matt	Add AT91 support from Sami Kantoluoto Add TI OMAP2430 support from Marty Fouts @ Danger Inc
1.19.48.1	12-Jan-2007	ad	Sync with head.
1.19.18.2	21-Jan-2008	yamt	sync with head
1.19.18.1	26-Feb-2007	yamt	sync with head.
1.20.38.1	08-Jan-2008	bouyer	Sync with HEAD
1.20.32.1	18-Feb-2008	mjf	Sync with HEAD.
1.20.26.2	09-Jan-2008	matt	sync with HEAD
1.20.26.1	12-Oct-2007	matt	Import TI OMAP 2430 and ARM11/ARMv6 support. Now on ARMv6, the cache is no longer purged on context switches.
1.20.24.1	20-Jan-2008	chris	Sync to HEAD.
1.20.20.1	28-Feb-2008	rjs	Sync with HEAD.
1.21.10.2	04-May-2009	yamt	sync with head.
1.21.10.1	16-May-2008	yamt	sync with head.
1.21.8.1	18-May-2008	yamt	sync with head.
1.21.6.2	28-Sep-2008	mjf	Sync with HEAD.
1.21.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.22.6.1	19-Oct-2008	haad	Sync with HEAD.
1.22.2.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.23.12.2	24-Mar-2014	matt	Deal with those arms who only need one type of freelist.
1.23.12.1	15-Feb-2014	matt	Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
1.23.8.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.23.2.1	28-Apr-2009	skrll	Sync with HEAD.
1.24.4.1	05-Mar-2011	rmind	sync with head
1.24.2.3	15-Nov-2010	uebayasi	Sync with HEAD.
1.24.2.2	23-Feb-2010	uebayasi	Pass struct vm_page_md * to VM_MDPAGE_INIT(), not struct vm_page *.
1.24.2.1	09-Feb-2010	uebayasi	Kill vm_page::phys_addr.
1.25.16.1	28-Nov-2012	matt	Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
1.25.12.1	18-Feb-2012	mrg	merge to -current.
1.25.8.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.25.8.2	30-Oct-2012	yamt	sync with head
1.25.8.1	17-Apr-2012	yamt	sync with head
1.27.2.3	03-Dec-2017	jdolecek	update from HEAD
1.27.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.27.2.1	23-Jun-2013	tls	resync from head
1.29.6.1	18-May-2014	rmind	sync with head
1.34.2.1	10-Aug-2014	tls	Rebase.
1.35.4.5	28-Aug-2017	skrll	Sync with HEAD
1.35.4.4	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.35.4.3	22-Sep-2015	skrll	Sync with HEAD
1.35.4.2	06-Jun-2015	skrll	Sync with HEAD
1.35.4.1	06-Apr-2015	skrll	Sync with HEAD
1.40.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.40.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.41.14.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.41.14.1	10-Jun-2019	christos	Sync with HEAD
1.41.12.1	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.45.4.1	17-Jan-2020	ad	Sync with head.
1.45.2.1	08-Oct-2020	martin	Pull up following revision(s) (requested by he in ticket #1105): sys/arch/arm/include/arm32/vmparam.h: revision 1.56 Bump MAXDSIZ from 1536 to 1836. 1836 is 2048-128(MAXTSIZ)-64(MAXSSIZ). Gives us a fighting chance to build rust natively. OK'ed by skrll@
1.57.6.1	02-Aug-2025	perseant	Sync with HEAD

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