History log of /src/sys/arch/arm/include/cputypes.h |
Revision | | Date | Author | Comments |
1.20 |
| 31-Jan-2025 |
jmcneill | aarch64: Identify Cortex-A520, Cortex-A720 cores
|
1.19 |
| 09-Dec-2024 |
jmcneill | arm64: Identify Qualcomm Oryon CPUs
|
1.18 |
| 07-Oct-2024 |
jakllsch | CPU ID strings for Arm Cortex-A710, Neoverse V1, Neoverse N2, and Fujitsu A64FX
|
1.17 |
| 27-Sep-2024 |
jakllsch | Add Ampere 1 and 1A CPU IDs
|
1.16 |
| 13-Nov-2021 |
simonb | branches: 1.16.4; 1.16.10; Fix tyop in a comment.
|
1.15 |
| 12-Nov-2021 |
skrll | Print a big warning about trying to run on early ThunderX parts
|
1.14 |
| 30-Aug-2021 |
jmcneill | Identify Apple M1 "Icestorm" and "Firestorm" CPU types.
|
1.13 |
| 01-Jul-2020 |
ryo | add workaround for Neoverse N1 erratum 1542419
|
1.12 |
| 27-Jan-2020 |
skrll | Identify the Denver2 CPU in the Nvidia TX2
|
1.11 |
| 28-Dec-2019 |
jmcneill | branches: 1.11.2; Identify Arm Neoverse E1 and N1 CPUs.
|
1.10 |
| 08-Sep-2019 |
tnn | cpu identification macros for A17
|
1.9 |
| 07-Sep-2019 |
tnn | Cortex A12 is marketed as A17 but has a distinct part number
observed on Rockchip RK3288
|
1.8 |
| 16-Jul-2019 |
jmcneill | branches: 1.8.2; Add Ampere eMAG 8180 cpuid
|
1.7 |
| 19-Jun-2019 |
mrg | add several cortex CPU implementations found in their TRMs: - A32 R1 (aarch32 only, not supported) - A35 R1 - A65 R0 - A76AE R1 - A77
add the aarch64 ones to cpu.c for identification.
|
1.6 |
| 09-May-2019 |
mrg | add cortex A-76 detection.
|
1.5 |
| 03-Jan-2019 |
jmcneill | Add CPU_ID_CORTEXA15R4
|
1.4 |
| 24-Nov-2018 |
skrll | Add some ThunderX CPU Ids
|
1.3 |
| 03-Oct-2018 |
skrll | Add some Cavium CPU_IDs (implementor and primary part number only aka CPU_PARTMASK)
|
1.2 |
| 01-May-2018 |
ryo | branches: 1.2.2; fix define of CPU IDs * fix incorrect CPU_ID of APM/APPLE * add CPU_ID of SAMSUNG * fix typo about BROADCOM
|
1.1 |
| 20-Mar-2018 |
ryo | branches: 1.1.2; separate cputypes.h for CPU_ID_* from armreg.h, and add some implementor IDs, CortexA55,73,75 IDs.
(preliminary changes for merging aarch64)
|
1.1.2.6 |
| 18-Jan-2019 |
pgoyette | Synch with HEAD
|
1.1.2.5 |
| 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
1.1.2.4 |
| 20-Oct-2018 |
pgoyette | Sync with head
|
1.1.2.3 |
| 02-May-2018 |
pgoyette | Synch with HEAD
|
1.1.2.2 |
| 22-Mar-2018 |
pgoyette | Synch with HEAD, resolve conflicts
|
1.1.2.1 |
| 20-Mar-2018 |
pgoyette | file cputypes.h was added on branch pgoyette-compat on 2018-03-22 01:44:42 +0000
|
1.2.2.2 |
| 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
1.2.2.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
1.8.2.1 |
| 29-Dec-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #589):
sys/arch/arm/include/cputypes.h: revision 1.11 sys/arch/aarch64/aarch64/cpu.c: revision 1.31
Identify Arm Neoverse E1 and N1 CPUs.
|
1.11.2.1 |
| 29-Feb-2020 |
ad | Sync with head.
|
1.16.10.1 |
| 02-Aug-2025 |
perseant | Sync with HEAD
|
1.16.4.1 |
| 03-Oct-2024 |
martin | Pull up following revision(s) (requested by jakllsch in ticket #922):
sys/arch/aarch64/aarch64/cpu.c: revision 1.79 sys/arch/arm/include/cputypes.h: revision 1.17 usr.sbin/cpuctl/arch/aarch64.c: revision 1.24 sys/arch/aarch64/aarch64/cpu.c: revision 1.80
Add Ampere 1 and 1A CPU IDs
refine previous add Ampere 1 and 1A
|