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History log of /src/sys/arch/arm/nvidia
RevisionDateAuthorComments
 1.53 06-Sep-2025  thorpej Step towards modularizing the Flattened Device Tree code.

Define attributes for each of the specific device bindings: clock,
dai, dma, gpio, i2c, iommu, mbox, mmc_pwrseq, phy, power, power domain,
pwm, regulator, reset controller, spi, system controller, pin
controller. Include these support files only if either a provider
or consumer with one of these attributes is present in the kernel
config.

Add the necessary attributes to the device / attach declarations for
each provider and consumer.

There are some bindings that are consumed by generic code (iommu, pinctrl,
power, power domain). Provide weak stubs for these routines to handle
situations where there is no provider.

No actual code changed; NFCI.
 1.52 29-Aug-2020  jakllsch tegra_xusb: fix xusb static firmware build

To work around objcopy and ld now being unable to create a EABI5 object
from a binary, use the assembler directive .incbin in inline assembly
to pull in the firmware blob.

This also probably makes TEGRA210_XUSB_BIN_STATIC actually work.
 1.51 08-Jul-2020  uwe tegra_xusb depends on firmload.

Make the dependency explicit, do not rely on some random USB device to
pull it in.
 1.50 27-Jul-2019  skrll Remove unused needs-flag
 1.49 08-Jul-2018  jmcneill Use psci_fdt_bootstrap for MP spinup on Tegra210.
 1.48 01-Apr-2018  ryo branches: 1.48.2;
Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.47 17-Mar-2018  ryo move from sys/arch/arm/arm32/armv7_generic_dma.c to sys/arch/arm/arm/arm_generic_dma.c,
and change variable name from armv7_generic_dma_tag to arm_generic_dma_tag

no functional change. (preliminary changes for merging aarch64)
 1.46 26-Dec-2017  jmcneill branches: 1.46.2;
Use DRM GEM/CMA helper.
 1.45 26-Sep-2017  jmcneill branches: 1.45.2;
More PCIe / XUSBPAD initialization goo for Tegra210.
 1.44 22-Sep-2017  jmcneill Replace unused mpio driver with a more generic interface for pinmux, and
add Tegra210 pinmux support.
 1.43 19-Sep-2017  jmcneill Add basic tegra210 xusbpad driver, shorten tegra*xusbpad driver names to
tegra*xpad to fit in dv_xname
 1.42 19-Sep-2017  jmcneill The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.41 21-Jul-2017  jmcneill Add support for NVIDIA Tegra X1.
 1.40 02-Jun-2017  jmcneill Attach Tegra124 DVFS to /cpus/cpu0 now that another driver is claiming the
/cpus node.
 1.39 30-May-2017  jmcneill Fix VERBOSE_INIT_ARM build with TEGRA kernel.
 1.38 28-May-2017  jmcneill Add a facility for platform-specific callbacks and use it to remove most
of the Tegra-specific code from tegra_machdep.c.

Platform code matches on the compatible property of the root ("/") DT node
and allows for chip-specific implementations of the following:

- devmap: Return a 0-terminated list of static device map entries.
- bootstrap: Early initialization of platform-specific facilities.
- early_putchar: Provides an implementation of putchar for use in early
debug messages.
- device_register: Platform-specific device register callback.
- reset: Platform-specific CPU reset implementation.
- consinit: Platform-specific console init implementation.
 1.37 28-May-2017  jmcneill Enumerate CPUs, GIC, and generic timer using FDT data instead of relying
on hard-coded tables in mainbus.
 1.36 25-May-2017  jmcneill Chip detection and MP spinup code for Tegra210
 1.35 29-Apr-2017  jmcneill Add Tegra124 APB-DMA controller driver.
 1.34 28-Apr-2017  jmcneill Hide the debug output unless either TEGRA_XUSB_DEBUG is defined or
tegra_xusb_debug is set to 1.
 1.33 23-Apr-2017  jmcneill branches: 1.33.2;
Split cpufreq driver out into a separate module.
 1.32 22-Apr-2017  jmcneill Get rid of tegra_cpuinit after scanning fdt and attach the cpufreq support
to the /cpus node. Use regulator API instead of poking directly at the I2C
controller to set voltages.
 1.31 21-Apr-2017  jmcneill Fix defparam name (CONADDR -> CONSADDR)
 1.30 11-Apr-2017  jmcneill Hide debug messages with TEGRA_XUSBPAD_DEBUG
 1.29 26-Sep-2016  jakllsch branches: 1.29.2;
Add xhci(4) attachment glue and firmware handler for Tegra K1 "XUSB"
xHCI controller. Adjustments to tegraxusbpad(4) will be needed
to connect the controller to actual USB ports.
 1.28 22-Dec-2015  jmcneill branches: 1.28.2;
Switch Tegra over to fdt based clocks and reset controls.
 1.27 13-Dec-2015  jmcneill Get rid of board-specific options.
 1.26 13-Dec-2015  jmcneill remove tegraio
 1.25 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.24 21-Nov-2015  jmcneill Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.23 21-Nov-2015  jmcneill Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.
 1.22 19-Nov-2015  jmcneill Remove HOST1X and AHB_A2 from pmap_devmap
 1.21 12-Nov-2015  jmcneill Use GEM for memory management. Fixes a couple issues while here:
- No longer needs to allocate 35MB (!) for framebuffer console.
- Allows xrandr to switch to modes larger than the framebuffer console.
- Removes hack that redirected mmap calls to wsdisplay0
 1.20 09-Nov-2015  jmcneill Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.
 1.19 21-Oct-2015  jmcneill Split out USB PHY support out of the ehci glue and into a separate driver.
 1.18 19-Oct-2015  jmcneill defflag TEGRA_HDMI_DEBUG
 1.17 17-Oct-2015  jmcneill Add bus glue for attaching nouveau DRM
 1.16 22-Aug-2015  jmcneill Add kernel config for Tegra K1 "Nyan Big" board, as found in the Acer
Chromebook 13 (CB5-311).
 1.15 01-Aug-2015  jmcneill Add driver for Tegra HDMI CEC controller.
 1.14 30-May-2015  jmcneill Tegra K1 Watchdog support.
 1.13 18-May-2015  jmcneill Power-on Host1x subsystem
 1.12 18-May-2015  jmcneill Work in progress HDMI / framebuffer support for Tegra K1.
 1.11 15-May-2015  jmcneill Tegra XUSB PADCTL driver
 1.10 13-May-2015  jmcneill Tegra K1 CPU frequency scaling support.

jetsontk1# sysctl machdep.cpu
machdep.cpu.frequency.target = 2292
machdep.cpu.frequency.current = 2292
machdep.cpu.frequency.available = 2292 2100 1896 1692 1500 1296 1092 900 696
 1.9 10-May-2015  jmcneill Tegra I2C driver
 1.8 07-May-2015  jmcneill add Tegra MPIO / Pinmux driver
 1.7 05-May-2015  jmcneill Tegra K1 RTC driver.
 1.6 03-May-2015  jmcneill Add Tegra K1 PCIE support.
 1.5 02-May-2015  jmcneill jetsontk1 specific gpio setup for sdhc
 1.4 02-May-2015  jmcneill hook in gpio driver
 1.3 28-Apr-2015  jmcneill Add a basic driver for the Clock and Reset controller, use it to determine
CPU frequency.
 1.2 29-Mar-2015  jmcneill branches: 1.2.2;
Use shared armv7_generic_space
 1.1 29-Mar-2015  jmcneill NVIDIA Tegra K1 support, work in progress.
 1.2.2.7 28-Aug-2017  skrll Sync with HEAD
 1.2.2.6 05-Oct-2016  skrll Sync with HEAD
 1.2.2.5 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.4 22-Sep-2015  skrll Sync with HEAD
 1.2.2.3 06-Jun-2015  skrll Sync with HEAD
 1.2.2.2 06-Apr-2015  skrll Sync with HEAD
 1.2.2.1 29-Mar-2015  skrll file files.tegra was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.28.2.2 26-Apr-2017  pgoyette Sync with HEAD
 1.28.2.1 04-Nov-2016  pgoyette Sync with HEAD
 1.29.2.1 21-Apr-2017  bouyer Sync with HEAD
 1.33.2.1 02-May-2017  pgoyette Sync with HEAD - tag prg-localcount2-base1
 1.45.2.2 03-Dec-2017  jdolecek update from HEAD
 1.45.2.1 26-Sep-2017  jdolecek file files.tegra was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.46.2.3 28-Jul-2018  pgoyette Sync with HEAD
 1.46.2.2 07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.46.2.1 22-Mar-2018  pgoyette Synch with HEAD, resolve conflicts
 1.48.2.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.48.2.1 10-Jun-2019  christos Sync with HEAD
 1.22 15-Feb-2020  skrll Various updates and improvements to cpu start up on arm/aarch64

- start sharing more code around the AP startup messaging.
- call arm_cpu_topology_set early so that ci_core_id is available for
drivers, e.g. bcm2835_intr.c
- both arm and aarch64 now have
- a static cpu_info_store array
- the same arm_cpu_{hatched,mbox}
 1.21 31-Jan-2019  skrll branches: 1.21.6;
Fix another build
 1.20 31-Jan-2019  skrll Change ap_mpstart to return non-zero value if any/all APs don't start.
 1.19 18-Oct-2018  skrll Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively
 1.18 07-Jul-2018  jmcneill Use arm_generic_bs_tag instead of armv7_generic_bs_tag and conditionally
define SOC platform support (so we don't try to build 32-bit support into
64-bit kernels).
 1.17 23-Apr-2017  jmcneill branches: 1.17.10; 1.17.12; 1.17.14;
Split cpufreq driver out into a separate module.
 1.16 22-Apr-2017  jmcneill Get rid of tegra_cpuinit after scanning fdt and attach the cpufreq support
to the /cpus node. Use regulator API instead of poking directly at the I2C
controller to set voltages.
 1.15 17-Apr-2017  jmcneill Set cpu_cc_freq when changing frequencies.
 1.14 16-Apr-2017  jmcneill get cpu pll clock from devicetree
 1.13 13-Apr-2017  jmcneill DT ode path to i2c controller with ams3722 has changed from /i2c@0,7000d000
to /i2c@7000d000 in newer dts files. Support both paths for cpufreq
scaling.
 1.12 22-Dec-2015  jmcneill branches: 1.12.2; 1.12.4;
Switch Tegra over to fdt based clocks and reset controls.
 1.11 01-Dec-2015  jmcneill replace 2292MHz entry with 2316MHz
 1.10 21-Nov-2015  jmcneill Apply initial fuse offset in tegra_fuse_read instead of in each reg def
 1.9 21-Nov-2015  jmcneill Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.
 1.8 12-Nov-2015  jmcneill Standard mode for I2C needs a source divider of 20, not 2.
 1.7 11-Nov-2015  jmcneill make VDD_CPU programming a bit easier to understand, and while here, actually program it to 1.4V as intended instead of 1.39V
 1.6 03-Jun-2015  skrll Use arm_dmb. No functional change
 1.5 31-May-2015  jmcneill set VDD_CPU to 1.4V
 1.4 17-May-2015  matt Restructure a bit to make spinning a subset of cores easier.
 1.3 13-May-2015  jmcneill Tegra K1 CPU frequency scaling support.

jetsontk1# sysctl machdep.cpu
machdep.cpu.frequency.target = 2292
machdep.cpu.frequency.current = 2292
machdep.cpu.frequency.available = 2292 2100 1896 1692 1500 1296 1092 900 696
 1.2 26-Apr-2015  jmcneill add Tegra124 MP support
 1.1 29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.5 28-Aug-2017  skrll Sync with HEAD
 1.1.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.3 06-Jun-2015  skrll Sync with HEAD
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file soc_tegra124.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.12.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.12.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.17.14.2 08-Apr-2020  martin Merge changes from current as of 20200406
 1.17.14.1 10-Jun-2019  christos Sync with HEAD
 1.17.12.2 20-Oct-2018  pgoyette Sync with head
 1.17.12.1 28-Jul-2018  pgoyette Sync with HEAD
 1.17.10.2 03-Dec-2017  jdolecek update from HEAD
 1.17.10.1 23-Apr-2017  jdolecek file soc_tegra124.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.21.6.1 29-Feb-2020  ad Sync with head.
 1.3 08-Jul-2018  jmcneill Use psci_fdt_bootstrap for MP spinup on Tegra210.
 1.2 07-Jul-2018  jmcneill Use arm_generic_bs_tag instead of armv7_generic_bs_tag and conditionally
define SOC platform support (so we don't try to build 32-bit support into
64-bit kernels).
 1.1 25-May-2017  jmcneill branches: 1.1.6; 1.1.10; 1.1.12; 1.1.14;
Chip detection and MP spinup code for Tegra210
 1.1.14.1 10-Jun-2019  christos Sync with HEAD
 1.1.12.1 28-Jul-2018  pgoyette Sync with HEAD
 1.1.10.2 03-Dec-2017  jdolecek update from HEAD
 1.1.10.1 25-May-2017  jdolecek file soc_tegra210.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.6.2 28-Aug-2017  skrll Sync with HEAD
 1.1.6.1 25-May-2017  skrll file soc_tegra210.c was added on branch nick-nhusb on 2017-08-28 17:51:31 +0000
 1.24 19-Mar-2022  riastradh tegra124_car(4): Attach rndsource synchronously.

It looks like the original motivation for deferring to
config_interrupts was to wait until softint_establish worked. But
this no longer needs to use softints to deliver the entropy, so
that's moot.

Doing this synchronously gives us a better chance for more entropy
earlier.
 1.23 19-Mar-2022  riastradh tegra124_car(4): No need for rnd lock -- delete it.

This only ever reads from a single device register, so no need to
serialize access.

XXX This should really have a hardware-specific health test, but I
can't find any documentation on the underlying physical entropy
source.
 1.22 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.21 12-Aug-2020  jmcneill branches: 1.21.2;
Add CEC clock
 1.20 30-Apr-2020  riastradh rnd_attach_source calls the callback itself now.

No need for every driver to explicitly call it to prime the pool.

Eliminate now-unused <sys/rndpool.h>.
 1.19 13-Oct-2019  skrll Restore %# for PRIxBUSADDR
 1.18 13-Oct-2019  skrll Use PRIxBUSADDR
 1.17 09-Mar-2019  jakllsch Add Tegra124 "mselect" clock and two PCIe-related clocks it sources.

With mainline u-boot (not starting the pci subsystem in the firmware):
Gets to a root prompt instead of hanging during tegrapcie attach, but
PCIe remains non-functional without a modern "xusbpad" phy driver for
Tegra124 (needed to configure the lane map).
 1.16 26-Sep-2018  jmcneill Register clocks with clk_attach
 1.15 09-Sep-2018  aymeric Pass clock provider's phandle to fdtbus_clock_controller_func.decode()
and update callers.

This allows to accomodate clock managers whose clocks are identified
directly by a clock instead of a pair (clock provider, index).

ok jmcneill@ on port-arm
 1.14 21-Jul-2017  jmcneill branches: 1.14.2; 1.14.4; 1.14.6;
Add support for NVIDIA Tegra X1.
 1.13 29-Apr-2017  jmcneill add APB-DMA clock gate
 1.12 26-Apr-2017  jmcneill branches: 1.12.2;
Set host1x parent to pll_p_out0
 1.11 22-Apr-2017  jmcneill Fix fractional divider calculations and round down for sdmmc clocks.
 1.10 16-Apr-2017  jmcneill Add support for multiple clock domains in clk API.
 1.9 14-Apr-2017  jmcneill Add GPU gating clock
 1.8 12-Jan-2017  maya branches: 1.8.2;
fix off by one.

ok riastradh
 1.7 17-Dec-2016  riastradh Simplify bcm2835, tegra, and am335x hardware RNG drivers.

Tested by nick@.
 1.6 08-Sep-2016  jakllsch Add Tegra124 CAR bits to support the XUSB xHCI core.
 1.5 02-Sep-2016  jakllsch Source of pll_p_out5 is not div_pllp_out5 but div_pll_p_out5.
 1.4 17-Aug-2016  jakllsch Complete implementation of clocks for SPI controllers in tegra124_car.
 1.3 17-Aug-2016  jakllsch Fix I2C clock calculations. Previously I2C clocks were half what was
requested. The I2C clock registers have a LSB of one-half rather than
one-whole like the rest of them.
 1.2 23-Dec-2015  jmcneill branches: 1.2.2; 1.2.4;
fix divider calculations for hdmi, and treat clock ID 211 as pll_p_out0 instead of directly pll_p
 1.1 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.2.4.3 26-Apr-2017  pgoyette Sync with HEAD
 1.2.4.2 20-Mar-2017  pgoyette Sync with HEAD
 1.2.4.1 07-Jan-2017  pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
 1.2.2.5 28-Aug-2017  skrll Sync with HEAD
 1.2.2.4 05-Feb-2017  skrll Sync with HEAD
 1.2.2.3 05-Oct-2016  skrll Sync with HEAD
 1.2.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.1 23-Dec-2015  skrll file tegra124_car.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.8.2.1 21-Apr-2017  bouyer Sync with HEAD
 1.12.2.1 02-May-2017  pgoyette Sync with HEAD - tag prg-localcount2-base1
 1.14.6.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.14.6.1 10-Jun-2019  christos Sync with HEAD
 1.14.4.1 30-Sep-2018  pgoyette Ssync with HEAD
 1.14.2.2 03-Dec-2017  jdolecek update from HEAD
 1.14.2.1 21-Jul-2017  jdolecek file tegra124_car.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.21.2.1 03-Apr-2021  thorpej Sync with HEAD.
 1.7 09-Mar-2019  jakllsch Add Tegra124 "mselect" clock and two PCIe-related clocks it sources.

With mainline u-boot (not starting the pci subsystem in the firmware):
Gets to a root prompt instead of hanging during tegrapcie attach, but
PCIe remains non-functional without a modern "xusbpad" phy driver for
Tegra124 (needed to configure the lane map).
 1.6 21-Jul-2017  jmcneill branches: 1.6.2; 1.6.6;
Add support for NVIDIA Tegra X1.
 1.5 22-Jan-2017  jakllsch Whitespace adjustment.
 1.4 22-Jan-2017  jakllsch Define bits in CAR_PLLP_OUTA_REG.
 1.3 08-Sep-2016  jakllsch branches: 1.3.2;
Add Tegra124 CAR bits to support the XUSB xHCI core.
 1.2 17-Aug-2016  jakllsch Complete implementation of clocks for SPI controllers in tegra124_car.
 1.1 22-Dec-2015  jmcneill branches: 1.1.2; 1.1.4;
Switch Tegra over to fdt based clocks and reset controls.
 1.1.4.1 20-Mar-2017  pgoyette Sync with HEAD
 1.1.2.5 28-Aug-2017  skrll Sync with HEAD
 1.1.2.4 05-Feb-2017  skrll Sync with HEAD
 1.1.2.3 05-Oct-2016  skrll Sync with HEAD
 1.1.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.1 22-Dec-2015  skrll file tegra124_carreg.h was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.3.2.1 21-Apr-2017  bouyer Sync with HEAD
 1.6.6.1 10-Jun-2019  christos Sync with HEAD
 1.6.2.2 03-Dec-2017  jdolecek update from HEAD
 1.6.2.1 21-Jul-2017  jdolecek file tegra124_carreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.6 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.5 25-Aug-2020  skrll branches: 1.5.2;
Protect tegra124_cpu_init_cpufreq against being run more than once.

config_finalize will call all config_finalize_register functions until
all registered functions return 0. rf_autoconfig currently returns 1
which means tegra124_cpu_init_cpufreq would get called multiple times.
 1.4 02-Jun-2017  jmcneill branches: 1.4.6; 1.4.10;
Attach Tegra124 DVFS to /cpus/cpu0 now that another driver is claiming the
/cpus node.
 1.3 29-Apr-2017  jmcneill Adjust voltage when changing CPU frequency.
 1.2 29-Apr-2017  jakllsch - Recognize the AS3722 sd0_v_minus_200mV bit, which is 1 on my Jetson TK1.
- Reduce intended core voltage for Tegra K1 124 by 200mV to 1.2V.

The actual value programmed into the SD0 regulator remains the same (0x50),
a value corresponding to 1.20V.
 1.1 23-Apr-2017  jmcneill branches: 1.1.2; 1.1.4;
Split cpufreq driver out into a separate module.
 1.1.4.1 02-May-2017  pgoyette Sync with HEAD - tag prg-localcount2-base1
 1.1.2.2 26-Apr-2017  pgoyette Sync with HEAD
 1.1.2.1 23-Apr-2017  pgoyette file tegra124_cpu.c was added on branch pgoyette-localcount on 2017-04-26 02:53:00 +0000
 1.4.10.2 03-Dec-2017  jdolecek update from HEAD
 1.4.10.1 02-Jun-2017  jdolecek file tegra124_cpu.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.4.6.2 28-Aug-2017  skrll Sync with HEAD
 1.4.6.1 02-Jun-2017  skrll file tegra124_cpu.c was added on branch nick-nhusb on 2017-08-28 17:51:31 +0000
 1.5.2.1 03-Apr-2021  thorpej Sync with HEAD.
 1.5 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.4 13-Oct-2019  skrll branches: 1.4.8;
Restore %# for PRIxBUSADDR
 1.3 13-Oct-2019  skrll Use PRIxBUSADDR
 1.2 22-Sep-2017  jakllsch branches: 1.2.2; 1.2.6;
use more symbolic register bits
 1.1 19-Sep-2017  jmcneill The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.2.6.1 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.2.2.2 03-Dec-2017  jdolecek update from HEAD
 1.2.2.1 22-Sep-2017  jdolecek file tegra124_xusbpad.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.4.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.3 22-Sep-2017  jakllsch branches: 1.3.2;
Add more Tegra124 XUSB PADCTL register bits.
 1.2 22-Sep-2017  jakllsch Update #include guard #define after move.
 1.1 19-Sep-2017  jmcneill The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.3.2.2 03-Dec-2017  jdolecek update from HEAD
 1.3.2.1 22-Sep-2017  jdolecek file tegra124_xusbpadreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.27 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.26 30-Apr-2020  riastradh branches: 1.26.2;
rnd_attach_source calls the callback itself now.

No need for every driver to explicitly call it to prime the pool.

Eliminate now-unused <sys/rndpool.h>.
 1.25 13-Oct-2019  skrll Restore %# for PRIxBUSADDR
 1.24 13-Oct-2019  skrll Use PRIxBUSADDR
 1.23 14-Dec-2018  skrll Support SATA on TEGRA210

Thanks to jmcneill for help with this.
 1.22 12-Dec-2018  skrll Trailing whitespace
 1.21 26-Sep-2018  jmcneill Initialize CML1 clock
 1.20 26-Sep-2018  jmcneill Register clocks with clk_attach
 1.19 09-Sep-2018  aymeric Pass clock provider's phandle to fdtbus_clock_controller_func.decode()
and update callers.

This allows to accomodate clock managers whose clocks are identified
directly by a clock instead of a pair (clock provider, index).

ok jmcneill@ on port-arm
 1.18 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.17 28-Sep-2017  jmcneill branches: 1.17.2; 1.17.4; 1.17.6;
use CLK_GATE_SIMPLE
 1.16 27-Sep-2017  jmcneill Tegra210 HDA support.
 1.15 27-Sep-2017  jmcneill add SOC_THERM and TSENSOR clocks
 1.14 26-Sep-2017  jmcneill More PCIe / XUSBPAD initialization goo for Tegra210.
 1.13 25-Sep-2017  jmcneill Add clocks used by pcie
 1.12 25-Sep-2017  jmcneill Disable debug again
 1.11 25-Sep-2017  jmcneill USB works on Tegra X1 now.
 1.10 24-Sep-2017  jmcneill More XUSB init. A USB3 memory stick seems to work now.
 1.9 23-Sep-2017  jmcneill Disable debug
 1.8 23-Sep-2017  jmcneill Add APBDMA clock
 1.7 23-Sep-2017  jmcneill More XUSB init stuff.
 1.6 22-Sep-2017  jmcneill add USB2_TRK and HSIC_TRK clocks
 1.5 22-Sep-2017  jmcneill Initialize PLLE
 1.4 21-Sep-2017  jmcneill Setup PLLU
 1.3 21-Sep-2017  jmcneill Fix div calculation and utmip init params
 1.2 19-Sep-2017  jmcneill Add some xusb clocks (not working yet)
 1.1 21-Jul-2017  jmcneill branches: 1.1.2;
Add support for NVIDIA Tegra X1.
 1.1.2.2 28-Aug-2017  skrll Sync with HEAD
 1.1.2.1 21-Jul-2017  skrll file tegra210_car.c was added on branch nick-nhusb on 2017-08-28 17:51:31 +0000
 1.17.6.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.17.6.1 10-Jun-2019  christos Sync with HEAD
 1.17.4.3 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.17.4.2 30-Sep-2018  pgoyette Ssync with HEAD
 1.17.4.1 28-Jul-2018  pgoyette Sync with HEAD
 1.17.2.2 03-Dec-2017  jdolecek update from HEAD
 1.17.2.1 28-Sep-2017  jdolecek file tegra210_car.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.26.2.1 03-Apr-2021  thorpej Sync with HEAD.
 1.9 14-Dec-2018  skrll Support SATA on TEGRA210

Thanks to jmcneill for help with this.
 1.8 25-Sep-2017  jmcneill branches: 1.8.2; 1.8.4; 1.8.6;
Add clocks used by pcie
 1.7 24-Sep-2017  jmcneill More XUSB init. A USB3 memory stick seems to work now.
 1.6 23-Sep-2017  jmcneill More XUSB init stuff.
 1.5 22-Sep-2017  jmcneill #define<tab>
 1.4 22-Sep-2017  jmcneill add USB2_TRK and HSIC_TRK clocks
 1.3 22-Sep-2017  jmcneill More USB3 port init stuff
 1.2 21-Sep-2017  jmcneill Setup PLLU
 1.1 21-Jul-2017  jmcneill branches: 1.1.2;
Add support for NVIDIA Tegra X1.
 1.1.2.2 28-Aug-2017  skrll Sync with HEAD
 1.1.2.1 21-Jul-2017  skrll file tegra210_carreg.h was added on branch nick-nhusb on 2017-08-28 17:51:31 +0000
 1.8.6.1 10-Jun-2019  christos Sync with HEAD
 1.8.4.1 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.8.2.2 03-Dec-2017  jdolecek update from HEAD
 1.8.2.1 25-Sep-2017  jdolecek file tegra210_carreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.2 28-Sep-2019  skrll Update tegra_pinmux to support all bindings (pins and pin groups)

Update tegra210_pinmux.c with all defined pins and groups.
 1.1 22-Sep-2017  jmcneill branches: 1.1.2; 1.1.6; 1.1.10;
Replace unused mpio driver with a more generic interface for pinmux, and
add Tegra210 pinmux support.
 1.1.10.1 28-Sep-2019  martin Pull up following revision(s) (requested by skrll in ticket #263):

sys/arch/arm/nvidia/tegra_pinmux.h: revision 1.2
sys/arch/arm/nvidia/tegra_pinmux.c: revision 1.3
sys/arch/arm/nvidia/tegra210_pinmux.c: revision 1.2

Update tegra_pinmux to support all bindings (pins and pin groups)
Update tegra210_pinmux.c with all defined pins and groups.
 1.1.6.1 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.1.2.2 03-Dec-2017  jdolecek update from HEAD
 1.1.2.1 22-Sep-2017  jdolecek file tegra210_pinmux.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.16 07-Aug-2021  thorpej Merge thorpej-cfargs2.
 1.15 24-Apr-2021  thorpej branches: 1.15.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
 1.14 27-Jan-2021  thorpej branches: 1.14.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.13 13-Oct-2019  skrll branches: 1.13.8;
Restore %# for PRIxBUSADDR
 1.12 13-Oct-2019  skrll Use PRIxBUSADDR
 1.11 14-Dec-2018  skrll Support SATA on TEGRA210

Thanks to jmcneill for help with this.
 1.10 12-Dec-2018  skrll Trailing whitespace
 1.9 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.8 26-Sep-2017  jmcneill branches: 1.8.2; 1.8.4; 1.8.6;
More PCIe / XUSBPAD initialization goo for Tegra210.
 1.7 25-Sep-2017  jmcneill USB works on Tegra X1 now.
 1.6 24-Sep-2017  jmcneill More XUSB init. A USB3 memory stick seems to work now.
 1.5 23-Sep-2017  jmcneill More XUSB init stuff.
 1.4 22-Sep-2017  jmcneill Print an error if we can't acquire a clock or reset
 1.3 22-Sep-2017  jmcneill More USB3 port init stuff
 1.2 20-Sep-2017  jmcneill parse ports node and configure usb2/usb3/hsic ports
 1.1 19-Sep-2017  jmcneill Add basic tegra210 xusbpad driver, shorten tegra*xusbpad driver names to
tegra*xpad to fit in dv_xname
 1.8.6.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.8.6.1 10-Jun-2019  christos Sync with HEAD
 1.8.4.2 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.8.4.1 28-Jul-2018  pgoyette Sync with HEAD
 1.8.2.2 03-Dec-2017  jdolecek update from HEAD
 1.8.2.1 26-Sep-2017  jdolecek file tegra210_xusbpad.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.13.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.14.2.1 21-Mar-2021  thorpej Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
 1.15.8.1 04-Aug-2021  thorpej Adapt to CFARGS().
 1.18 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.17 27-Jan-2021  thorpej Use DEVICE_COMPAT_EOL.
 1.16 25-Jan-2021  thorpej Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
 1.15 18-Jan-2021  thorpej Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.
 1.14 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.13 28-Dec-2020  jmcneill Remove the AHCI_QUIRK_SKIP_RESET quirk now that the underlying issue is
fixed.
 1.12 14-Dec-2018  skrll branches: 1.12.4; 1.12.12;
Support SATA on TEGRA210

Thanks to jmcneill for help with this.
 1.11 19-Sep-2017  jmcneill branches: 1.11.2; 1.11.4; 1.11.6;
The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.10 16-Apr-2017  jmcneill Add support for multiple clock domains in clk API.
 1.9 22-Dec-2015  jmcneill branches: 1.9.2; 1.9.4;
Switch Tegra over to fdt based clocks and reset controls.
 1.8 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.7 15-Oct-2015  jmcneill disable SATA sleep feature
 1.6 24-May-2015  jmcneill set AHCI_QUIRK_SKIP_RESET quirk
 1.5 15-May-2015  jmcneill more Tegra SATA init
 1.4 14-May-2015  jmcneill fix SATA controller init
 1.3 10-May-2015  jmcneill Tegra SATA ungating support
 1.2 26-Apr-2015  jmcneill fix bus space handle for ahcisata
 1.1 29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.5 28-Aug-2017  skrll Sync with HEAD
 1.1.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.3 06-Jun-2015  skrll Sync with HEAD
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file tegra_ahcisata.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.9.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.9.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.11.6.1 10-Jun-2019  christos Sync with HEAD
 1.11.4.1 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.11.2.2 03-Dec-2017  jdolecek update from HEAD
 1.11.2.1 19-Sep-2017  jdolecek file tegra_ahcisata.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.12.12.2 03-Apr-2021  thorpej Sync with HEAD.
 1.12.12.1 03-Jan-2021  thorpej Sync w/ HEAD.
 1.12.4.1 30-Dec-2020  martin Pull up following revision(s) (requested by jmcneill in ticket #1167):

sys/dev/ic/ahcisata_core.c: revision 1.84
sys/dev/ic/ahcisata_core.c: revision 1.85
sys/dev/ic/ahcisata_core.c: revision 1.88
sys/dev/ic/ahcisata_core.c: revision 1.89
sys/arch/arm/nvidia/tegra_ahcisata.c: revision 1.13
sys/dev/ic/ahcisatavar.h: revision 1.26
sys/dev/ic/ahcisata_core.c: revision 1.90
sys/dev/ic/ahcisata_core.c: revision 1.91
sys/dev/ic/ahcisata_core.c: revision 1.92
sys/dev/ata/satareg.h: revision 1.6

ahci_exec_fis: wait for the correct amount of time when AT_WAIT is set

Retry clearing WDCTL_RST a few times before giving up. Makes SATA work in
Solidrun Honeycomb LX2K.

AHCI 1.3.1 specification says that it is good practice for system software
to 'zero-out' the memory allocated and referenced by PxCLB and PxFB.

ahci_intr: use ffs in the port bitmask instead of looping over all 32 bits

AHCI 1.3.1 section 5.5.3 "Processing Completed Commands" says that we
should clear PxIS before IS.IPS.

Add G3 and DevSleep definitions. This changes the mask used by
SControl_IPM_NONE from 0x3 to 0x7.

Make sure to ack IS after PxIS when polling and when using multiple MSI-X
messages.

Remove the AHCI_QUIRK_SKIP_RESET quirk now that the underlying issue is
fixed.
 1.3 14-Dec-2018  skrll Support SATA on TEGRA210

Thanks to jmcneill for help with this.
 1.2 15-Oct-2015  jmcneill branches: 1.2.16; 1.2.18; 1.2.20;
disable SATA sleep feature
 1.1 15-May-2015  jmcneill branches: 1.1.2;
Tegra SATA registers
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 15-May-2015  skrll file tegra_ahcisatareg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.2.20.1 10-Jun-2019  christos Sync with HEAD
 1.2.18.1 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.2.16.2 03-Dec-2017  jdolecek update from HEAD
 1.2.16.1 15-Oct-2015  jdolecek file tegra_ahcisatareg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.9 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.8 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.7 13-Oct-2019  skrll branches: 1.7.8;
Restore %# for PRIxBUSADDR
 1.6 13-Oct-2019  skrll Use PRIxBUSADDR
 1.5 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.4 23-Sep-2017  jmcneill branches: 1.4.2; 1.4.4; 1.4.6;
Match nvidia,tegra210-apbdma
 1.3 03-May-2017  jakllsch branches: 1.3.6;
The DMA Request number is seperate from the DMA Channel number, treat as such.
 1.2 03-May-2017  jmcneill tegra_apbdma_acquire: length param is in bytes not cells
 1.1 29-Apr-2017  jmcneill branches: 1.1.2;
Add Tegra124 APB-DMA controller driver.
 1.1.2.3 11-May-2017  pgoyette Sync with HEAD
 1.1.2.2 02-May-2017  pgoyette Sync with HEAD - tag prg-localcount2-base1
 1.1.2.1 29-Apr-2017  pgoyette file tegra_apbdma.c was added on branch prg-localcount2 on 2017-05-02 03:19:16 +0000
 1.3.6.2 28-Aug-2017  skrll Sync with HEAD
 1.3.6.1 03-May-2017  skrll file tegra_apbdma.c was added on branch nick-nhusb on 2017-08-28 17:51:31 +0000
 1.4.6.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.4.6.1 10-Jun-2019  christos Sync with HEAD
 1.4.4.1 28-Jul-2018  pgoyette Sync with HEAD
 1.4.2.2 03-Dec-2017  jdolecek update from HEAD
 1.4.2.1 23-Sep-2017  jdolecek file tegra_apbdma.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.7.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.2 29-Apr-2017  jmcneill branches: 1.2.2; 1.2.8; 1.2.12;
APB-DMA channel registers start at offset 1000h relative to the APB-DMA
controller registers.
 1.1 29-Apr-2017  jmcneill Add Tegra124 APB-DMA controller driver.
 1.2.12.2 03-Dec-2017  jdolecek update from HEAD
 1.2.12.1 29-Apr-2017  jdolecek file tegra_apbdmareg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.2.8.2 28-Aug-2017  skrll Sync with HEAD
 1.2.8.1 29-Apr-2017  skrll file tegra_apbdmareg.h was added on branch nick-nhusb on 2017-08-28 17:51:31 +0000
 1.2.2.2 02-May-2017  pgoyette Sync with HEAD - tag prg-localcount2-base1
 1.2.2.1 29-Apr-2017  pgoyette file tegra_apbdmareg.h was added on branch prg-localcount2 on 2017-05-02 03:19:16 +0000
 1.1 29-Mar-2015  jmcneill branches: 1.1.2; 1.1.18;
NVIDIA Tegra K1 support, work in progress.
 1.1.18.2 03-Dec-2017  jdolecek update from HEAD
 1.1.18.1 29-Mar-2015  jdolecek file tegra_apbreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file tegra_apbreg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.32 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.31 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.30 21-Nov-2015  jmcneill Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.29 21-Nov-2015  jmcneill Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.
 1.28 19-Nov-2015  jmcneill aprint_verbose_dev -> aprint_debug_dev
 1.27 17-Oct-2015  jmcneill add support for enabling the GPU
 1.26 01-Aug-2015  jmcneill Add driver for Tegra HDMI CEC controller.
 1.25 29-Jul-2015  jmcneill use utmip settings for 12MHz ref clk, not 13MHz
 1.24 25-Jul-2015  jmcneill Add HDMI audio support
 1.23 23-Jul-2015  jmcneill Support fractional dividers. This lets us use 48MHz for SDMMC HS mode
instead of 45.333MHz.
 1.22 23-Jul-2015  jmcneill fix some clocks; many periph dividers are in units of 0.5x not 1x, use PLLD2 for DC, use correct pldiv value for PLLD2
 1.21 30-May-2015  jmcneill branches: 1.21.2;
Tegra K1 Watchdog support.
 1.20 30-May-2015  jmcneill Use PLL LFSR as rnd source.
 1.19 20-May-2015  jmcneill wait for PLLD2 lock
 1.18 18-May-2015  jmcneill make sure the display controllar partition is powered on
 1.17 18-May-2015  jmcneill Power-on Host1x subsystem
 1.16 18-May-2015  jmcneill Work in progress HDMI / framebuffer support for Tegra K1.
 1.15 16-May-2015  jmcneill use correct enable reg for I2C5
 1.14 15-May-2015  jmcneill more Tegra SATA init
 1.13 14-May-2015  jmcneill enable SATA OOB clock
 1.12 14-May-2015  jmcneill fix SATA controller init
 1.11 13-May-2015  jmcneill Tegra K1 CPU frequency scaling support.

jetsontk1# sysctl machdep.cpu
machdep.cpu.frequency.target = 2292
machdep.cpu.frequency.current = 2292
machdep.cpu.frequency.available = 2292 2100 1896 1692 1500 1296 1092 900 696
 1.10 10-May-2015  jmcneill remove debug printf
 1.9 10-May-2015  jmcneill Tegra I2C driver
 1.8 10-May-2015  jmcneill Tegra SATA ungating support
 1.7 10-May-2015  jmcneill Tegra HD audio support (untested as it is for HDMI output)
 1.6 09-May-2015  jmcneill Tegra USB PHY support
 1.5 09-May-2015  jmcneill add tegra_car_pllu_rate
 1.4 03-May-2015  jmcneill add pllc and uart rate funcs
 1.3 03-May-2015  jmcneill when setting sdmmc divisor, do a full reset / enable sequence
 1.2 02-May-2015  jmcneill SDMMC clock input is PLLP (408 MHz). Set input divisor to 2 to get a
204 MHz input for the SDHC, which is just below the maximum supported
frequency for SDR104.
 1.1 28-Apr-2015  jmcneill Add a basic driver for the Clock and Reset controller, use it to determine
CPU frequency.
 1.21.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.21.2.3 22-Sep-2015  skrll Sync with HEAD
 1.21.2.2 06-Jun-2015  skrll Sync with HEAD
 1.21.2.1 30-May-2015  skrll file tegra_car.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.23 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.22 21-Nov-2015  jmcneill Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.21 17-Oct-2015  jmcneill add support for enabling the GPU
 1.20 25-Jul-2015  jmcneill Add HDMI audio support
 1.19 23-Jul-2015  skrll CAR_PLLD_BASE_REG defines
 1.18 30-May-2015  jmcneill branches: 1.18.2;
Tegra K1 Watchdog support.
 1.17 30-May-2015  jmcneill Use PLL LFSR as rnd source.
 1.16 18-May-2015  jmcneill Power-on Host1x subsystem
 1.15 18-May-2015  jmcneill Work in progress HDMI / framebuffer support for Tegra K1.
 1.14 14-May-2015  jmcneill enable SATA OOB clock
 1.13 14-May-2015  jmcneill fix SATA controller init
 1.12 13-May-2015  jmcneill Tegra K1 CPU frequency scaling support.

jetsontk1# sysctl machdep.cpu
machdep.cpu.frequency.target = 2292
machdep.cpu.frequency.current = 2292
machdep.cpu.frequency.available = 2292 2100 1896 1692 1500 1296 1092 900 696
 1.11 10-May-2015  jmcneill Tegra I2C driver
 1.10 10-May-2015  jmcneill Tegra SATA ungating support
 1.9 10-May-2015  jmcneill correct CAR_PLLX_MISC_REG value
 1.8 10-May-2015  jmcneill Tegra HD audio support (untested as it is for HDMI output)
 1.7 09-May-2015  jmcneill Tegra USB PHY support
 1.6 09-May-2015  jmcneill add tegra_car_pllu_rate
 1.5 06-May-2015  skrll More device bit definitions.
 1.4 03-May-2015  jmcneill add pllc and uart rate funcs
 1.3 03-May-2015  jmcneill when setting sdmmc divisor, do a full reset / enable sequence
 1.2 02-May-2015  jmcneill SDMMC clock input is PLLP (408 MHz). Set input divisor to 2 to get a
204 MHz input for the SDHC, which is just below the maximum supported
frequency for SDR104.
 1.1 28-Apr-2015  jmcneill Add a basic driver for the Clock and Reset controller, use it to determine
CPU frequency.
 1.18.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.18.2.3 22-Sep-2015  skrll Sync with HEAD
 1.18.2.2 06-Jun-2015  skrll Sync with HEAD
 1.18.2.1 30-May-2015  skrll file tegra_carreg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.11 07-Aug-2021  thorpej Merge thorpej-cfargs2.
 1.10 21-Jun-2021  christos branches: 1.10.2;
fix proplib deprecation
 1.9 24-Apr-2021  thorpej branches: 1.9.2;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
 1.8 27-Jan-2021  thorpej branches: 1.8.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.7 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.6 13-Oct-2019  skrll branches: 1.6.8;
Restore %# for PRIxBUSADDR
 1.5 13-Oct-2019  skrll Use PRIxBUSADDR
 1.4 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.3 22-Dec-2015  jmcneill branches: 1.3.16; 1.3.18; 1.3.20;
Switch Tegra over to fdt based clocks and reset controls.
 1.2 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.1 01-Aug-2015  jmcneill branches: 1.1.2;
Add driver for Tegra HDMI CEC controller.
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 22-Sep-2015  skrll Sync with HEAD
 1.1.2.1 01-Aug-2015  skrll file tegra_cec.c was added on branch nick-nhusb on 2015-09-22 12:05:38 +0000
 1.3.20.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.3.20.1 10-Jun-2019  christos Sync with HEAD
 1.3.18.1 28-Jul-2018  pgoyette Sync with HEAD
 1.3.16.2 03-Dec-2017  jdolecek update from HEAD
 1.3.16.1 22-Dec-2015  jdolecek file tegra_cec.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.6.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.8.2.1 21-Mar-2021  thorpej Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
 1.9.2.1 01-Aug-2021  thorpej Sync with HEAD.
 1.10.2.1 04-Aug-2021  thorpej Adapt to CFARGS().
 1.1 01-Aug-2015  jmcneill branches: 1.1.2; 1.1.18;
Add driver for Tegra HDMI CEC controller.
 1.1.18.2 03-Dec-2017  jdolecek update from HEAD
 1.1.18.1 01-Aug-2015  jdolecek file tegra_cecreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.2.2 22-Sep-2015  skrll Sync with HEAD
 1.1.2.1 01-Aug-2015  skrll file tegra_cecreg.h was added on branch nick-nhusb on 2015-09-22 12:05:38 +0000
 1.1 22-Dec-2015  jmcneill branches: 1.1.2; 1.1.18;
Switch Tegra over to fdt based clocks and reset controls.
 1.1.18.2 03-Dec-2017  jdolecek update from HEAD
 1.1.18.1 22-Dec-2015  jdolecek file tegra_clock.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.1 22-Dec-2015  skrll file tegra_clock.h was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.16 06-Sep-2025  thorpej Re-factor the console-related code into fdt_console.[ch]
 1.15 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.14 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.13 28-Sep-2020  jmcneill branches: 1.13.2;
Get rid of a4x bus_space tag from fdtbus_attach_args. The only consumer
of this was various com(4) glue so modify all of that to use the new
com_init_regs_stride instead.
 1.12 13-Oct-2019  skrll Restore %# for PRIxBUSADDR
 1.11 13-Oct-2019  skrll Use PRIxBUSADDR
 1.10 08-Dec-2018  thorpej Clean up initialization of com_regs structure, in preparation for
some additional changers.
 1.9 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.8 02-Jun-2017  jmcneill branches: 1.8.8; 1.8.10; 1.8.12;
Allow platform code to specify the UART frequency for consinit
 1.7 29-May-2017  jmcneill Move console initialization out of platform code into the console drivers
themselves.
 1.6 25-May-2017  jmcneill Match nvidia,tegra210-uart and nvidia,tegra20-uart compat strings.
 1.5 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.4 16-Dec-2015  jmcneill use of_getprop_uint32
 1.3 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.2 03-May-2015  jmcneill UART clock source is PLLP. Set com type to COM_TYPE_TEGRA.
 1.1 29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.5 28-Aug-2017  skrll Sync with HEAD
 1.1.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.3 06-Jun-2015  skrll Sync with HEAD
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file tegra_com.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.8.12.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.8.12.1 10-Jun-2019  christos Sync with HEAD
 1.8.10.2 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.8.10.1 28-Jul-2018  pgoyette Sync with HEAD
 1.8.8.2 03-Dec-2017  jdolecek update from HEAD
 1.8.8.1 02-Jun-2017  jdolecek file tegra_com.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.13.2.1 03-Apr-2021  thorpej Sync with HEAD.
 1.5 22-Apr-2017  jmcneill branches: 1.5.10;
Get rid of tegra_cpuinit after scanning fdt and attach the cpufreq support
to the /cpus node. Use regulator API instead of poking directly at the I2C
controller to set voltages.
 1.4 21-Nov-2016  ozaki-r Sweep unnecessary xcall.h inclusions
 1.3 22-Dec-2015  jmcneill branches: 1.3.2;
Switch Tegra over to fdt based clocks and reset controls.
 1.2 21-Nov-2015  jmcneill Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.
 1.1 13-May-2015  jmcneill branches: 1.1.2;
Tegra K1 CPU frequency scaling support.

jetsontk1# sysctl machdep.cpu
machdep.cpu.frequency.target = 2292
machdep.cpu.frequency.current = 2292
machdep.cpu.frequency.available = 2292 2100 1896 1692 1500 1296 1092 900 696
 1.1.2.5 28-Aug-2017  skrll Sync with HEAD
 1.1.2.4 05-Dec-2016  skrll Sync with HEAD
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 13-May-2015  skrll file tegra_cpufreq.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.3.2.2 26-Apr-2017  pgoyette Sync with HEAD
 1.3.2.1 07-Jan-2017  pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
 1.5.10.2 03-Dec-2017  jdolecek update from HEAD
 1.5.10.1 22-Apr-2017  jdolecek file tegra_cpufreq.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.4 09-Nov-2015  jmcneill Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.
 1.3 23-Jul-2015  jmcneill add Tegra124 HDMI support
 1.2 08-Jul-2015  jmcneill expose EDID to userland
 1.1 18-May-2015  jmcneill branches: 1.1.2;
Work in progress HDMI / framebuffer support for Tegra K1.
 1.1.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.3 22-Sep-2015  skrll Sync with HEAD
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 18-May-2015  skrll file tegra_dc.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.5 14-Nov-2015  jmcneill branches: 1.5.16;
Hardware cursor support.
 1.4 10-Nov-2015  jmcneill Add vblank support
 1.3 23-Jul-2015  skrll More defines
 1.2 23-Jul-2015  jmcneill add Tegra124 HDMI support
 1.1 18-May-2015  jmcneill branches: 1.1.2;
Work in progress HDMI / framebuffer support for Tegra K1.
 1.1.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.3 22-Sep-2015  skrll Sync with HEAD
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 18-May-2015  skrll file tegra_dcreg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.5.16.2 03-Dec-2017  jdolecek update from HEAD
 1.5.16.1 14-Nov-2015  jdolecek file tegra_dcreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.16 21-Apr-2022  andvar s/subesquent/subsequent/ in copy pasted comments.
 1.15 23-Feb-2022  skrll API naming consistency. NFC.
 1.14 19-Dec-2021  riastradh drm: Do the attach task dance for tegra drm.
 1.13 19-Dec-2021  riastradh drm: Make tegra drm build again.
 1.12 19-Dec-2021  riastradh drm_dev_alloc now returns ERR_PTR, check for that.


Author: Maya Rashish <maya@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
 1.11 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.10 27-Aug-2018  riastradh branches: 1.10.12;
Update tegra drm and nouveau to compile with new drmkms.

Compile-tested only.
 1.9 28-Dec-2017  jmcneill branches: 1.9.2; 1.9.4;
Initialize drm_device bus and dma space tags
 1.8 26-Dec-2017  jmcneill Use DRM GEM/CMA helper.
 1.7 16-Apr-2017  jmcneill branches: 1.7.10;
Add support for multiple clock domains in clk API.
 1.6 30-Jan-2016  riastradh branches: 1.6.2; 1.6.4;
Always initialize error.

Found by joerg.
 1.5 22-Dec-2015  jmcneill branches: 1.5.2;
Switch Tegra over to fdt based clocks and reset controls.
 1.4 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.3 12-Nov-2015  jmcneill Use GEM for memory management. Fixes a couple issues while here:
- No longer needs to allocate 35MB (!) for framebuffer console.
- Allows xrandr to switch to modes larger than the framebuffer console.
- Removes hack that redirected mmap calls to wsdisplay0
 1.2 10-Nov-2015  jmcneill Add vblank support
 1.1 09-Nov-2015  jmcneill Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.
 1.5.2.4 28-Aug-2017  skrll Sync with HEAD
 1.5.2.3 19-Mar-2016  skrll Sync with HEAD
 1.5.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.5.2.1 22-Dec-2015  skrll file tegra_drm.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.6.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.6.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.7.10.2 03-Dec-2017  jdolecek update from HEAD
 1.7.10.1 16-Apr-2017  jdolecek file tegra_drm.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.9.4.1 10-Jun-2019  christos Sync with HEAD
 1.9.2.1 06-Sep-2018  pgoyette Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)
 1.10.12.1 03-Apr-2021  thorpej Sync with HEAD.
 1.11 19-Dec-2021  riastradh drm: Do the attach task dance for tegra drm.
 1.10 19-Dec-2021  riastradh drm: Make tegra drm build again.
 1.9 27-Aug-2018  riastradh Update tegra drm and nouveau to compile with new drmkms.

Compile-tested only.
 1.8 26-Dec-2017  jmcneill branches: 1.8.2; 1.8.4;
Use DRM GEM/CMA helper.
 1.7 17-Dec-2016  maya branches: 1.7.14;
Fix regression introduced by myself with the addition of da_fb_linebytes

tegra_fb was not adjusted so da_fb_linebytes was used uninitialized

add tfa_fb_linebytes and match radeonfb/nouveaufb code in how we set it
switch to using an initializer to hopefully avoid future errors

this change doesn't need to be pulled up, as tegra_fb.c is absent
in netbsd-7
 1.6 22-Dec-2015  jmcneill branches: 1.6.2; 1.6.4;
Switch Tegra over to fdt based clocks and reset controls.
 1.5 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.4 14-Nov-2015  jmcneill Hardware cursor support.
 1.3 12-Nov-2015  jmcneill Use GEM for memory management. Fixes a couple issues while here:
- No longer needs to allocate 35MB (!) for framebuffer console.
- Allows xrandr to switch to modes larger than the framebuffer console.
- Removes hack that redirected mmap calls to wsdisplay0
 1.2 10-Nov-2015  jmcneill Add vblank support
 1.1 09-Nov-2015  jmcneill Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.
 1.6.4.1 07-Jan-2017  pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
 1.6.2.3 05-Feb-2017  skrll Sync with HEAD
 1.6.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.6.2.1 22-Dec-2015  skrll file tegra_drm.h was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.7.14.2 03-Dec-2017  jdolecek update from HEAD
 1.7.14.1 17-Dec-2016  jdolecek file tegra_drm.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.8.4.1 10-Jun-2019  christos Sync with HEAD
 1.8.2.1 06-Sep-2018  pgoyette Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)
 1.10 19-Dec-2021  riastradh drm: Make tegra drm build again.
 1.9 07-Aug-2021  thorpej Merge thorpej-cfargs2.
 1.8 24-Apr-2021  thorpej branches: 1.8.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
 1.7 24-Sep-2018  skrll branches: 1.7.14;
Call drm_fb_helper_prepare in tegra_drm_fb_init as required.

I can boot a kernel with this

jetsontk1# dmesg | grep fb
[ 1.0000580] tegrafb0 at tegradrm0
[ 1.0000580] tegrafb0: framebuffer at 0x9bc00000, size 1024x768, depth 32, stride 4096
[ 1.0000580] wsdisplay0 at tegrafb0 kbdmux 1
jetsontk1#
 1.6 26-Dec-2017  jmcneill branches: 1.6.2; 1.6.4;
Use DRM GEM/CMA helper.
 1.5 01-Jun-2017  chs branches: 1.5.8;
remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.
 1.4 17-Dec-2016  maya Fix regression introduced by myself with the addition of da_fb_linebytes

tegra_fb was not adjusted so da_fb_linebytes was used uninitialized

add tfa_fb_linebytes and match radeonfb/nouveaufb code in how we set it
switch to using an initializer to hopefully avoid future errors

this change doesn't need to be pulled up, as tegra_fb.c is absent
in netbsd-7
 1.3 16-Nov-2015  jmcneill branches: 1.3.2; 1.3.4;
use XRGB8888 for framebuffer
 1.2 12-Nov-2015  jmcneill Use GEM for memory management. Fixes a couple issues while here:
- No longer needs to allocate 35MB (!) for framebuffer console.
- Allows xrandr to switch to modes larger than the framebuffer console.
- Removes hack that redirected mmap calls to wsdisplay0
 1.1 09-Nov-2015  jmcneill Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.
 1.3.4.1 07-Jan-2017  pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
 1.3.2.4 28-Aug-2017  skrll Sync with HEAD
 1.3.2.3 05-Feb-2017  skrll Sync with HEAD
 1.3.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.3.2.1 16-Nov-2015  skrll file tegra_drm_fb.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.5.8.2 03-Dec-2017  jdolecek update from HEAD
 1.5.8.1 01-Jun-2017  jdolecek file tegra_drm_fb.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.6.4.1 10-Jun-2019  christos Sync with HEAD
 1.6.2.1 30-Sep-2018  pgoyette Ssync with HEAD
 1.7.14.1 02-Apr-2021  thorpej config_found_ia() -> config_found() w/ CFARG_IATTR.
 1.8.8.1 04-Aug-2021  thorpej Adapt to CFARGS().
 1.4 26-Dec-2017  jmcneill Use DRM GEM/CMA helper.
 1.3 01-Jun-2017  chs branches: 1.3.8;
remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.
 1.2 16-Nov-2015  jmcneill branches: 1.2.2;
initialize allocated gem object memory to 0
 1.1 12-Nov-2015  jmcneill Use GEM for memory management. Fixes a couple issues while here:
- No longer needs to allocate 35MB (!) for framebuffer console.
- Allows xrandr to switch to modes larger than the framebuffer console.
- Removes hack that redirected mmap calls to wsdisplay0
 1.2.2.3 28-Aug-2017  skrll Sync with HEAD
 1.2.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.1 16-Nov-2015  skrll file tegra_drm_gem.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.3.8.2 03-Dec-2017  jdolecek update from HEAD
 1.3.8.1 01-Jun-2017  jdolecek file tegra_drm_gem.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.21 19-Dec-2021  riastradh drm: Make tegra drm build again.
 1.20 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.19 13-Oct-2019  skrll branches: 1.19.8;
Trailing whitespace
 1.18 07-Jul-2019  jmcneill Register userspace interfaces for our connector
 1.17 27-Aug-2018  riastradh Update tegra drm and nouveau to compile with new drmkms.

Compile-tested only.
 1.16 26-Dec-2017  jmcneill branches: 1.16.2; 1.16.4;
Use DRM GEM/CMA helper.
 1.15 01-Jun-2017  chs branches: 1.15.8;
remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.
 1.14 26-Apr-2017  jmcneill Ignore dc parent clock from devicetree and use hdmi parent for dc.
 1.13 16-Apr-2017  jmcneill Get DC clock parent from devicetree
 1.12 23-Dec-2015  jmcneill branches: 1.12.2; 1.12.4; 1.12.6;
explicitly set high cursor/winbuf address bits when setting modes
 1.11 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.10 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.9 16-Nov-2015  jmcneill commit window changes when updating base
 1.8 15-Nov-2015  jmcneill If we are going to be doing read/modify/write in triple-buffered mode, make sure we don't read back the buffered values and not the active ones
 1.7 14-Nov-2015  jmcneill expose HDMI from HDMI VSDB as physical-address device property when available
 1.6 14-Nov-2015  jmcneill Hardware cursor support.
 1.5 12-Nov-2015  jmcneill Use GEM for memory management. Fixes a couple issues while here:
- No longer needs to allocate 35MB (!) for framebuffer console.
- Allows xrandr to switch to modes larger than the framebuffer console.
- Removes hack that redirected mmap calls to wsdisplay0
 1.4 10-Nov-2015  jmcneill Add vblank support
 1.3 10-Nov-2015  jmcneill support disabling the HDMI output
 1.2 10-Nov-2015  jmcneill allow either crtc to be used with hdmi encoder
 1.1 09-Nov-2015  jmcneill Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.
 1.12.6.1 21-Apr-2017  bouyer Sync with HEAD
 1.12.4.1 26-Apr-2017  pgoyette Sync with HEAD
 1.12.2.3 28-Aug-2017  skrll Sync with HEAD
 1.12.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.12.2.1 23-Dec-2015  skrll file tegra_drm_mode.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.15.8.2 03-Dec-2017  jdolecek update from HEAD
 1.15.8.1 01-Jun-2017  jdolecek file tegra_drm_mode.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.16.4.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.16.4.1 10-Jun-2019  christos Sync with HEAD
 1.16.2.1 06-Sep-2018  pgoyette Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)
 1.19.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.20 07-Aug-2021  thorpej Merge thorpej-cfargs2.
 1.19 24-Apr-2021  thorpej branches: 1.19.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
 1.18 27-Jan-2021  thorpej branches: 1.18.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.17 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.16 09-Apr-2018  jakllsch branches: 1.16.14;
Stop potential misuse of vendor names and USB vendor IDs in root hub
device and string descriptors.

Firstly: Few vendors have identical PCI-SIG vendor IDs and USB-IF vendor
IDs. As such, using the PCI vendor ID as a USB vendor ID may trample
on whomever is allocated that USB vendor ID.

Secondly: The vendor of the host controller hardware implementation has
little to nothing to do with our usbroothub implementation. Thus we
should not potentially associate any problems therewith to such third
party.

This change will result in root hubs being identified by USB Vendor ID
0x0000. Root hub vendor string will now be "NetBSD" (or, specifically:
ostype). Product ID (0x0000) and product strings remain unchanged.
 1.15 25-May-2017  jmcneill branches: 1.15.8; 1.15.10;
Match nvidia,tegra210-ehci and nvidia,tegra30-ehci compat strings.
 1.14 23-May-2016  jmcneill IST_MPSAFE is not a valid flag for fdtbus_intr_establish; use
FDT_INTR_MPSAFE instead.
 1.13 23-Apr-2016  skrll Merge nick-nhusb

- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
 1.12 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.11 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.10 19-Nov-2015  jmcneill Remove HOST1X and AHB_A2 from pmap_devmap
 1.9 21-Oct-2015  jmcneill Split out USB PHY support out of the ehci glue and into a separate driver.
 1.8 21-Oct-2015  jmcneill reduce the number of magic numbers in phy setup, pull settings from device properties instead.
 1.7 22-May-2015  skrll Whitespace.
 1.6 18-May-2015  skrll Use the right IO handle to get HOSTPC. Also, mask out LS and HS from
reported status just-in-case and misc tidyup.

HS, FS and LS now all probe correctly.
 1.5 18-May-2015  skrll Re-enable EHCIF_ETTF and provide a sc_vendor_port_status to get port
speed from HOSTSC1

My FS usb stick works with this change.
 1.4 09-May-2015  jmcneill Tegra USB PHY support
 1.3 09-May-2015  jmcneill if vbus gpio pin is provided, use it to enable vdd
 1.2 26-Apr-2015  jmcneill ehci registers start at +0x100 from USB base address
 1.1 29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.7 28-Aug-2017  skrll Sync with HEAD
 1.1.2.6 29-May-2016  skrll Sync with HEAD
 1.1.2.5 16-Feb-2016  skrll ehci_intr is MPSAFE now
 1.1.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.3 06-Jun-2015  skrll Sync with HEAD
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file tegra_ehci.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.15.10.1 16-Apr-2018  pgoyette Sync with HEAD, resolve some conflicts
 1.15.8.2 03-Dec-2017  jdolecek update from HEAD
 1.15.8.1 25-May-2017  jdolecek file tegra_ehci.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.16.14.1 03-Apr-2021  thorpej Sync with HEAD.
 1.18.2.1 21-Mar-2021  thorpej Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
 1.19.8.1 04-Aug-2021  thorpej Adapt to CFARGS().
 1.3 21-Oct-2015  jmcneill Split out USB PHY support out of the ehci glue and into a separate driver.
 1.2 18-May-2015  skrll branches: 1.2.2;
Re-enable EHCIF_ETTF and provide a sc_vendor_port_status to get port
speed from HOSTSC1

My FS usb stick works with this change.
 1.1 09-May-2015  jmcneill Tegra USB PHY support
 1.2.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.2 06-Jun-2015  skrll Sync with HEAD
 1.2.2.1 18-May-2015  skrll file tegra_ehcireg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.6 19-Dec-2021  riastradh drm: Do the attach task dance for tegra drm.
 1.5 19-Dec-2021  riastradh drm: Make tegra drm build again.
 1.4 26-Dec-2017  jmcneill Use DRM GEM/CMA helper.
 1.3 17-Dec-2016  maya branches: 1.3.14;
Fix regression introduced by myself with the addition of da_fb_linebytes

tegra_fb was not adjusted so da_fb_linebytes was used uninitialized

add tfa_fb_linebytes and match radeonfb/nouveaufb code in how we set it
switch to using an initializer to hopefully avoid future errors

this change doesn't need to be pulled up, as tegra_fb.c is absent
in netbsd-7
 1.2 12-Nov-2015  jmcneill branches: 1.2.2; 1.2.4;
Use GEM for memory management. Fixes a couple issues while here:
- No longer needs to allocate 35MB (!) for framebuffer console.
- Allows xrandr to switch to modes larger than the framebuffer console.
- Removes hack that redirected mmap calls to wsdisplay0
 1.1 09-Nov-2015  jmcneill Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.
 1.2.4.1 07-Jan-2017  pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
 1.2.2.3 05-Feb-2017  skrll Sync with HEAD
 1.2.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.1 12-Nov-2015  skrll file tegra_fb.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.3.14.2 03-Dec-2017  jdolecek update from HEAD
 1.3.14.1 17-Dec-2016  jdolecek file tegra_fb.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.6 28-May-2017  jmcneill Enumerate CPUs, GIC, and generic timer using FDT data instead of relying
on hard-coded tables in mainbus.
 1.5 22-Apr-2017  jmcneill Get rid of tegra_cpuinit after scanning fdt and attach the cpufreq support
to the /cpus node. Use regulator API instead of poking directly at the I2C
controller to set voltages.
 1.4 16-Apr-2017  jmcneill Remove list of init devices
 1.3 15-Apr-2017  jmcneill Replace early init node name list with a list of compatible strings.
 1.2 22-Dec-2015  jmcneill branches: 1.2.2; 1.2.4; 1.2.6;
Switch Tegra over to fdt based clocks and reset controls.
 1.1 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.2.6.1 21-Apr-2017  bouyer Sync with HEAD
 1.2.4.1 26-Apr-2017  pgoyette Sync with HEAD
 1.2.2.3 28-Aug-2017  skrll Sync with HEAD
 1.2.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.1 22-Dec-2015  skrll file tegra_fdt.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.9 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.8 13-Oct-2019  skrll branches: 1.8.8;
Restore %# for PRIxBUSADDR
 1.7 13-Oct-2019  skrll Use PRIxBUSADDR
 1.6 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.5 25-May-2017  jmcneill branches: 1.5.8; 1.5.10; 1.5.12;
Match nvidia,tegra210-efuse compat string.
 1.4 22-Dec-2015  jmcneill branches: 1.4.2;
Switch Tegra over to fdt based clocks and reset controls.
 1.3 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.2 21-Nov-2015  jmcneill Apply initial fuse offset in tegra_fuse_read instead of in each reg def
 1.1 21-Nov-2015  jmcneill Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.
 1.4.2.3 28-Aug-2017  skrll Sync with HEAD
 1.4.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.4.2.1 22-Dec-2015  skrll file tegra_fuse.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.5.12.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.5.12.1 10-Jun-2019  christos Sync with HEAD
 1.5.10.1 28-Jul-2018  pgoyette Sync with HEAD
 1.5.8.2 03-Dec-2017  jdolecek update from HEAD
 1.5.8.1 25-May-2017  jdolecek file tegra_fuse.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.8.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.3 11-Nov-2015  jmcneill not used by tegradrm
 1.2 23-Jul-2015  jmcneill add Tegra124 HDMI support
 1.1 18-May-2015  jmcneill branches: 1.1.2;
Work in progress HDMI / framebuffer support for Tegra K1.
 1.1.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.3 22-Sep-2015  skrll Sync with HEAD
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 18-May-2015  skrll file tegra_genfb.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.14 07-Aug-2021  thorpej Merge thorpej-cfargs2.
 1.13 24-Apr-2021  thorpej branches: 1.13.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
 1.12 27-Jan-2021  thorpej branches: 1.12.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.11 13-Oct-2019  skrll branches: 1.11.8;
Restore %# for PRIxBUSADDR
 1.10 13-Oct-2019  skrll Use PRIxBUSADDR
 1.9 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.8 25-May-2017  jmcneill branches: 1.8.8; 1.8.10; 1.8.12;
Match nvidia,tegra210-gpio and nvidia,tegra30-gpio compat strings.
 1.7 13-Mar-2016  christos PR/50963: David Binderman: Use kmem_zalloc() so all members are initialized.
 1.6 22-Dec-2015  jmcneill Add fdtbus_gpio_{read,write}_raw, which tells the controller not to take
polarity into account. Tegra GPIO pin data includes pin polarity, but so
does a regulator-fixed node, so the end result was that the enable value
was being swapped twice. Change fregulator to use the raw APIs, and adapt
Tegra and Exynos GPIO drivers to support this flag.
 1.5 14-Dec-2015  jmcneill handle GPIO_ACTIVE_LOW flag
 1.4 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.3 09-May-2015  jmcneill branches: 1.3.2;
tegra_gpio_acquire: if a pin is required and not in GPIO mode, switch configuration instead of bailing out
 1.2 02-May-2015  jmcneill simplify gpio kpi
 1.1 02-May-2015  jmcneill add GPIO support
 1.3.2.5 28-Aug-2017  skrll Sync with HEAD
 1.3.2.4 19-Mar-2016  skrll Sync with HEAD
 1.3.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.3.2.2 06-Jun-2015  skrll Sync with HEAD
 1.3.2.1 09-May-2015  skrll file tegra_gpio.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.8.12.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.8.12.1 10-Jun-2019  christos Sync with HEAD
 1.8.10.1 28-Jul-2018  pgoyette Sync with HEAD
 1.8.8.2 03-Dec-2017  jdolecek update from HEAD
 1.8.8.1 25-May-2017  jdolecek file tegra_gpio.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.11.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.12.2.1 23-Mar-2021  thorpej Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
 1.13.8.1 04-Aug-2021  thorpej Adapt to CFARGS().
 1.1 02-May-2015  jmcneill branches: 1.1.2; 1.1.18;
add GPIO support
 1.1.18.2 03-Dec-2017  jdolecek update from HEAD
 1.1.18.1 02-May-2015  jdolecek file tegra_gpioreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 02-May-2015  skrll file tegra_gpioreg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.15 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.14 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.13 13-Oct-2019  skrll branches: 1.13.8;
Restore %# for PRIxBUSADDR
 1.12 13-Oct-2019  skrll Use PRIxBUSADDR
 1.11 25-Jul-2019  jmcneill Replace the HDAUDIO_32BIT_ACCESS option with a runtime option. Set it for
tegra_hdaudio, but not for the pci attachment. Add hdaudio@pci to GENERIC64
 1.10 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.9 27-Sep-2017  jmcneill branches: 1.9.2; 1.9.4; 1.9.6;
Tegra210 HDA support.
 1.8 16-Apr-2017  jmcneill Add support for multiple clock domains in clk API.
 1.7 23-Dec-2015  jmcneill branches: 1.7.2; 1.7.4;
HDAUDIO_FLAG_NO_STREAM_RESET hack no longer required
 1.6 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.5 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.4 26-Jul-2015  jmcneill set HDAUDIO_FLAG_NO_STREAM_RESET quirk
 1.3 10-May-2015  jmcneill Tegra HD audio support (untested as it is for HDMI output)
 1.2 26-Apr-2015  jmcneill print "HDA" instead of "SATA" at attach
 1.1 29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.6 28-Aug-2017  skrll Sync with HEAD
 1.1.2.5 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.4 22-Sep-2015  skrll Sync with HEAD
 1.1.2.3 06-Jun-2015  skrll Sync with HEAD
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file tegra_hdaudio.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.7.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.7.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.9.6.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.9.6.1 10-Jun-2019  christos Sync with HEAD
 1.9.4.1 28-Jul-2018  pgoyette Sync with HEAD
 1.9.2.2 03-Dec-2017  jdolecek update from HEAD
 1.9.2.1 27-Sep-2017  jdolecek file tegra_hdaudio.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.13.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.1 10-May-2015  jmcneill branches: 1.1.2; 1.1.18;
Tegra HD audio support (untested as it is for HDMI output)
 1.1.18.2 03-Dec-2017  jdolecek update from HEAD
 1.1.18.1 10-May-2015  jdolecek file tegra_hdaudioreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 10-May-2015  skrll file tegra_hdaudioreg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.11 09-Nov-2015  jmcneill Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.
 1.10 19-Oct-2015  jmcneill allow "hdmi.forcemode=dvi" kernel option to force HDMI transmitter into DVI mode
 1.9 31-Jul-2015  jmcneill extract physical address from HDMI VDSB and make it available as the "physical-address" device property
 1.8 26-Jul-2015  jmcneill fix a few typos in the audio infoframe we build
 1.7 25-Jul-2015  jmcneill remove debug printfs, dont force hdmi mode
 1.6 25-Jul-2015  jmcneill Add HDMI audio support
 1.5 23-Jul-2015  jmcneill no need for exact match on tmds mode, just use the closest match
 1.4 23-Jul-2015  jmcneill add Tegra124 HDMI support
 1.3 08-Jul-2015  jmcneill expose EDID to userland
 1.2 18-May-2015  jmcneill branches: 1.2.2;
Make sure HDMI I/O is not in deep power down mode
 1.1 18-May-2015  jmcneill Work in progress HDMI / framebuffer support for Tegra K1.
 1.2.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.3 22-Sep-2015  skrll Sync with HEAD
 1.2.2.2 06-Jun-2015  skrll Sync with HEAD
 1.2.2.1 18-May-2015  skrll file tegra_hdmi.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.6 05-Dec-2021  msaitoh s/stauts/status/
 1.5 10-Nov-2015  jmcneill branches: 1.5.16;
support disabling the HDMI output
 1.4 25-Jul-2015  jmcneill Add HDMI audio support
 1.3 23-Jul-2015  skrll More defines
 1.2 23-Jul-2015  jmcneill add Tegra124 HDMI support
 1.1 18-May-2015  jmcneill branches: 1.1.2;
Work in progress HDMI / framebuffer support for Tegra K1.
 1.1.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.3 22-Sep-2015  skrll Sync with HEAD
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 18-May-2015  skrll file tegra_hdmireg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.5.16.2 03-Dec-2017  jdolecek update from HEAD
 1.5.16.1 10-Nov-2015  jdolecek file tegra_hdmireg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.2 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.1 18-May-2015  jmcneill branches: 1.1.2;
Power-on Host1x subsystem
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 18-May-2015  skrll file tegra_host1x.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.28 16-Sep-2025  thorpej As with ACPI, perform the fdtbus_register_i2c_controller() in a centralized
location.
 1.27 16-Sep-2025  thorpej Garbage-collect fdtbus_attach_i2cbus(); the regular iicbus_attach() is
sufficient now.
 1.26 27-Jan-2021  thorpej branches: 1.26.4; 1.26.14;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.25 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.24 23-Dec-2020  thorpej Change fdtbus_register_i2c_controller() to directly register the i2c_tag_t,
rather than the device and a set of functions (the only of which was to
return the i2c_tag_t anyway). Previously, this assumed only a single
i2c controller node per device_t, which is not true with an i2c mux.
 1.23 22-Dec-2019  thorpej branches: 1.23.8;
Use a separate lock (not the i2c bus lock) to synchronize with the
interrupt handler. This in all liklihood fixes a deadlock bug that
necessitated forcing I2C_F_POLL in tegra_i2c_exec() (someone who has
the hardware should test removing that line).

Also includes the changes for:

Cleanup i2c bus acquire / release, centralizing all of the logic into
iic_acquire_bus() / iic_release_bus(). "acquire" and "release" hooks
no longer need to be provided by back-end controller drivers (only if
they need special handling, e.g. powering on the i2c controller).
This results in the removal of a bunch of rendundant code from each
back-end controller driver.

Assert that we are not in hard interrupt context in iic_acquire_bus(),
iic_exec(), and iic_release_bus().
 1.22 25-Sep-2018  jmcneill Disallow 0-byte transfers and suppress timeout messages
 1.21 03-Sep-2018  riastradh Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
 1.20 05-Aug-2018  skrll Use PRIxBUSADDR and remove unnecessary cast
 1.19 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.18 01-Jul-2018  jmcneill Use fdtbus_attach_i2cbus
 1.17 09-May-2018  thorpej branches: 1.17.2;
If we don't get informed (via device properties) of child I2C devices,
don't assign an empty array to iba.iba_child_devices, as it will prevent
indirect configuration of the I2C bus from occurring.

Tested on Raspberry Pi (bcm2835), identical logical fix replicated
(and compile-tested) elsewhere.

PR port-arm/53171
 1.16 25-May-2017  jmcneill branches: 1.16.8; 1.16.10;
Match nvidia,tegra210-i2c and nvidia,tegra114-i2c compat strings.
 1.15 08-Aug-2016  jakllsch Send repeated start after command phase if there is any data phase
transfer, not just if the data phase a read operation.
 1.14 08-Aug-2016  jakllsch Adjust data pointer using current, rather than upcoming, transfer length.
 1.13 14-Feb-2016  chs zero the i2c_attach_args structure before filling it in.
fixes occasional crashes in iic_attach().
 1.12 22-Dec-2015  jmcneill tegra_car_* and tegra_i2c_dvc_write are no more
 1.11 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.10 16-Dec-2015  jmcneill use of_getprop_uint32
 1.9 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.8 12-Nov-2015  jmcneill Standard mode for I2C needs a source divider of 20, not 2.
 1.7 11-Nov-2015  jmcneill only send repeat start if we are doing write-then-read
 1.6 11-Nov-2015  jmcneill fix i2c periph clock, send repeat start for write-then-read xfers
 1.5 31-May-2015  jmcneill branches: 1.5.2;
add external function for writing to dvc (I2C5) devices
 1.4 17-May-2015  jmcneill initialize FIFO TX/RX trigger levels, wait for MSTR_CONFIG_LOAD to clear after setting it
 1.3 16-May-2015  jmcneill fix source clock divisor, set MSTR_CONFIG_LOAD after updating config, reset controller on errors, read from rx fifo before waiting for xfer to complete
 1.2 16-May-2015  jmcneill Support transfers > 4-bytes long by reading and writing using the
controller's packet-based interface instead of non-packet ("normal") mode.
 1.1 10-May-2015  jmcneill Tegra I2C driver
 1.5.2.6 28-Aug-2017  skrll Sync with HEAD
 1.5.2.5 05-Oct-2016  skrll Sync with HEAD
 1.5.2.4 19-Mar-2016  skrll Sync with HEAD
 1.5.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.5.2.2 06-Jun-2015  skrll Sync with HEAD
 1.5.2.1 31-May-2015  skrll file tegra_i2c.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.16.10.4 30-Sep-2018  pgoyette Ssync with HEAD
 1.16.10.3 06-Sep-2018  pgoyette Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)
 1.16.10.2 28-Jul-2018  pgoyette Sync with HEAD
 1.16.10.1 21-May-2018  pgoyette Sync with HEAD
 1.16.8.2 03-Dec-2017  jdolecek update from HEAD
 1.16.8.1 25-May-2017  jdolecek file tegra_i2c.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.17.2.2 08-Apr-2020  martin Merge changes from current as of 20200406
 1.17.2.1 10-Jun-2019  christos Sync with HEAD
 1.23.8.2 03-Apr-2021  thorpej Sync with HEAD.
 1.23.8.1 03-Jan-2021  thorpej Sync w/ HEAD.
 1.26.14.1 09-Aug-2021  thorpej Port over the changes from thorpej-i2c-spi-conf to thorpej-i2c-spi-conf2,
which is based on a newer HEAD revision.
 1.26.4.1 19-May-2021  thorpej fdtbus_attach_i2cbus() is no longer anything other than a wrapper around
config_found(); just get rid of it and make its callers look like all of
the other I2C controller drivers.
 1.2 16-May-2015  jmcneill branches: 1.2.2; 1.2.18;
Support transfers > 4-bytes long by reading and writing using the
controller's packet-based interface instead of non-packet ("normal") mode.
 1.1 10-May-2015  jmcneill Tegra I2C driver
 1.2.18.2 03-Dec-2017  jdolecek update from HEAD
 1.2.18.1 16-May-2015  jdolecek file tegra_i2creg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.2.2.2 06-Jun-2015  skrll Sync with HEAD
 1.2.2.1 16-May-2015  skrll file tegra_i2creg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.12 30-May-2017  jmcneill branches: 1.12.8;
Use an FDT-based ARM_INTR_IMPL for Tegra.
 1.11 21-Nov-2015  jmcneill Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.10 18-Nov-2015  jakllsch Complete the interrupt definitions list from the Tertiary Interrupt
Controller range of the Tegra K1.
 1.9 22-Oct-2015  jmcneill add newline after group of intr defs, no functional change
 1.8 17-Oct-2015  jmcneill add SOR and GPU interrupt numbers
 1.7 01-Aug-2015  jmcneill Add driver for Tegra HDMI CEC controller.
 1.6 30-May-2015  jmcneill Tegra K1 Watchdog support.
 1.5 17-May-2015  jmcneill add HDMI, DISPLAYA, DISPLAYB irqs
 1.4 10-May-2015  jmcneill Tegra I2C driver
 1.3 03-May-2015  jmcneill Add Tegra K1 PCIE support.
 1.2 29-Mar-2015  jmcneill branches: 1.2.2;
bump max sources to 256
 1.1 29-Mar-2015  jmcneill NVIDIA Tegra K1 support, work in progress.
 1.2.2.6 28-Aug-2017  skrll Sync with HEAD
 1.2.2.5 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.4 22-Sep-2015  skrll Sync with HEAD
 1.2.2.3 06-Jun-2015  skrll Sync with HEAD
 1.2.2.2 06-Apr-2015  skrll Sync with HEAD
 1.2.2.1 29-Mar-2015  skrll file tegra_intr.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.12.8.2 03-Dec-2017  jdolecek update from HEAD
 1.12.8.1 30-May-2017  jdolecek file tegra_intr.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.22 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.21 21-Nov-2015  jmcneill Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.20 21-Nov-2015  jmcneill Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.
 1.19 19-Nov-2015  jmcneill Remove HOST1X and AHB_A2 from pmap_devmap
 1.18 18-Nov-2015  jakllsch Note the interrupt for Tegra MC in the locators list.
 1.17 09-Nov-2015  jmcneill Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.
 1.16 30-Oct-2015  jmcneill initialize phy for the third EHCI controller
 1.15 21-Oct-2015  jmcneill Split out USB PHY support out of the ehci glue and into a separate driver.
 1.14 17-Oct-2015  jmcneill Add bus glue for attaching nouveau DRM
 1.13 01-Aug-2015  jmcneill Add driver for Tegra HDMI CEC controller.
 1.12 30-May-2015  jmcneill Tegra K1 Watchdog support.
 1.11 18-May-2015  jmcneill Power-on Host1x subsystem
 1.10 18-May-2015  jmcneill Work in progress HDMI / framebuffer support for Tegra K1.
 1.9 15-May-2015  jmcneill Tegra XUSB PADCTL driver
 1.8 10-May-2015  jmcneill Tegra I2C driver
 1.7 07-May-2015  jmcneill add Tegra MPIO / Pinmux driver
 1.6 05-May-2015  jmcneill Tegra K1 RTC driver.
 1.5 03-May-2015  jmcneill Add Tegra K1 PCIE support.
 1.4 02-May-2015  jmcneill add GPIO support
 1.3 28-Apr-2015  jmcneill Add a basic driver for the Clock and Reset controller, use it to determine
CPU frequency.
 1.2 29-Mar-2015  jmcneill branches: 1.2.2;
Use shared armv7_generic_space
 1.1 29-Mar-2015  jmcneill NVIDIA Tegra K1 support, work in progress.
 1.2.2.5 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.4 22-Sep-2015  skrll Sync with HEAD
 1.2.2.3 06-Jun-2015  skrll Sync with HEAD
 1.2.2.2 06-Apr-2015  skrll Sync with HEAD
 1.2.2.1 29-Mar-2015  skrll file tegra_io.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.8 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.7 15-Jan-2021  jmcneill Add 'const char *xname' arg to fdtbus_interrupt_controller_func .establish
 1.6 26-Jan-2019  thorpej branches: 1.6.12;
Define constants for representing the standard interrupt types
({pos,neg,double}-edge, {high,low}-level) from the FDT "interrupts"
bindings. Use these defined constants rather than magic numbers.
 1.5 26-May-2017  jmcneill branches: 1.5.8; 1.5.10; 1.5.12;
Match nvidia,tegra210-ictlr compat string.
 1.4 22-Apr-2017  jmcneill Explicitly initialize interrupt controllers and since we pass through to
GIC, don't include "LIC" in interrupt string.
 1.3 05-Jan-2016  marty branches: 1.3.2;
FDT: Interrupts -- add support for interrupt maps

The mct on exynos uses an interrupt map so we add support now. Devices
represent their interrupts either through a combination of interrupt-parent
and interrupts properties, where the 'interrupts' property is an array of
one or more interrupt specifiers; or through a combination of an
interrupt-parent that points to an interrupt-map, where the interrupt-map
contains 2 or more entries consisting of an index, a pointer to an
interrupt-controller, and a specifier for that controller.

This code adds the ability to walk the interrupt-map and return a specifier.
Unfortunately, the addition requires changing the interface to the
interrupt-controllers' _establish and _intstr functions, so this check in
contains a rototill of the three existing fdt interrupt controllers to use
the new interface.
 1.2 16-Dec-2015  jmcneill branches: 1.2.2;
use of_getprop_uint32
 1.1 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.2.2.4 28-Aug-2017  skrll Sync with HEAD
 1.2.2.3 19-Mar-2016  skrll Sync with HEAD
 1.2.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.1 16-Dec-2015  skrll file tegra_lic.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.3.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.5.12.1 10-Jun-2019  christos Sync with HEAD
 1.5.10.1 26-Jan-2019  pgoyette Sync with HEAD
 1.5.8.2 03-Dec-2017  jdolecek update from HEAD
 1.5.8.1 26-May-2017  jdolecek file tegra_lic.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.6.12.1 03-Apr-2021  thorpej Sync with HEAD.
 1.12 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.11 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.10 13-Oct-2019  skrll branches: 1.10.8;
Restore %# for PRIxBUSADDR
 1.9 13-Oct-2019  skrll Use PRIxBUSADDR
 1.8 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.7 21-Apr-2017  jmcneill branches: 1.7.10; 1.7.12; 1.7.14;
Get the physical memory layout from the /memory node instead of reading
from the memory controller registers.
 1.6 12-Apr-2017  jmcneill Make tegra_mc_intr static to match prototype
 1.5 13-Dec-2015  jmcneill branches: 1.5.2; 1.5.4;
Use fdt for device enumeration.
 1.4 22-Nov-2015  jmcneill replace inline mc_read/write with MC_READ/WRITE macros, install intr handler with IST_MPSAFE flag
 1.3 21-Nov-2015  jakllsch Add error interrupt handler to for Tegra MC.
 1.2 29-Mar-2015  jmcneill branches: 1.2.2;
Use shared armv7_generic_space
 1.1 29-Mar-2015  jmcneill NVIDIA Tegra K1 support, work in progress.
 1.2.2.4 28-Aug-2017  skrll Sync with HEAD
 1.2.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.2 06-Apr-2015  skrll Sync with HEAD
 1.2.2.1 29-Mar-2015  skrll file tegra_mc.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.5.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.5.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.7.14.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.7.14.1 10-Jun-2019  christos Sync with HEAD
 1.7.12.1 28-Jul-2018  pgoyette Sync with HEAD
 1.7.10.2 03-Dec-2017  jdolecek update from HEAD
 1.7.10.1 21-Apr-2017  jdolecek file tegra_mc.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.10.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.3 22-Jan-2017  jakllsch branches: 1.3.12;
Add some SMMU registers and bit definitions.
 1.2 21-Nov-2015  jakllsch branches: 1.2.2; 1.2.4;
Add a bunch of hopefully-useful Tegra MC register bits.
 1.1 29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.4 05-Feb-2017  skrll Sync with HEAD
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file tegra_mcreg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.2.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.2.2.1 20-Mar-2017  pgoyette Sync with HEAD
 1.3.12.2 03-Dec-2017  jdolecek update from HEAD
 1.3.12.1 22-Jan-2017  jdolecek file tegra_mcreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.4 22-Sep-2017  jmcneill Replace unused mpio driver with a more generic interface for pinmux, and
add Tegra210 pinmux support.
 1.3 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.2 08-May-2015  jmcneill branches: 1.2.2;
update PM field in set_config
 1.1 07-May-2015  jmcneill add Tegra MPIO / Pinmux driver
 1.2.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.2 06-Jun-2015  skrll Sync with HEAD
 1.2.2.1 08-May-2015  skrll file tegra_mpio.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.1 07-May-2015  jmcneill branches: 1.1.2; 1.1.18;
add Tegra MPIO / Pinmux driver
 1.1.18.2 03-Dec-2017  jdolecek update from HEAD
 1.1.18.1 07-May-2015  jdolecek file tegra_mpioreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 07-May-2015  skrll file tegra_mpioreg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.17 19-Dec-2021  riastradh drm_dev_alloc now returns ERR_PTR, check for that.


Author: Maya Rashish <maya@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
 1.16 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.15 25-Jan-2021  thorpej Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
 1.14 18-Jan-2021  thorpej Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.
 1.13 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.12 01-Nov-2018  skrll branches: 1.12.12;
Fix non-DIAGNOSTIC build
 1.11 27-Aug-2018  riastradh Update tegra drm and nouveau to compile with new drmkms.

Compile-tested only.
 1.10 30-May-2017  jmcneill branches: 1.10.8; 1.10.10; 1.10.12;
Use an FDT-based ARM_INTR_IMPL for Tegra.
 1.9 22-Dec-2015  jmcneill branches: 1.9.2;
Switch Tegra over to fdt based clocks and reset controls.
 1.8 13-Dec-2015  jmcneill attach nouveau to fdt
 1.7 27-Oct-2015  riastradh Eliminate Linux struct pci_dev::dev, struct platform_device::dev.
 1.6 18-Oct-2015  jmcneill support passing nouveau.config= and nouveau.debug= on the kernel cmdline
 1.5 18-Oct-2015  jmcneill fill in bus space tag, dma tag for drm device too
 1.4 18-Oct-2015  jmcneill defer DRM initialization until after the root file-system is loaded, so we can read necessary firmware files
 1.3 18-Oct-2015  jmcneill provide dma tag and copy of our struct device (eww)
 1.2 18-Oct-2015  jmcneill dont drop to Debugger on error
 1.1 17-Oct-2015  jmcneill Add bus glue for attaching nouveau DRM
 1.9.2.3 28-Aug-2017  skrll Sync with HEAD
 1.9.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.9.2.1 22-Dec-2015  skrll file tegra_nouveau.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.10.12.1 10-Jun-2019  christos Sync with HEAD
 1.10.10.2 26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.10.10.1 06-Sep-2018  pgoyette Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)
 1.10.8.2 03-Dec-2017  jdolecek update from HEAD
 1.10.8.1 30-May-2017  jdolecek file tegra_nouveau.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.12.12.1 03-Apr-2021  thorpej Sync with HEAD.
 1.40 15-Oct-2022  jmcneill Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings

Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED
 1.39 07-Aug-2021  thorpej Merge thorpej-cfargs2.
 1.38 12-May-2021  thorpej branches: 1.38.4;
Pass along our device handle to the PCI bus instance we attach.
 1.37 24-Apr-2021  thorpej branches: 1.37.2; 1.37.4;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
 1.36 27-Jan-2021  thorpej branches: 1.36.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.35 27-Jan-2021  thorpej Use DEVICE_COMPAT_EOL.
 1.34 25-Jan-2021  thorpej Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
 1.33 19-Jan-2021  thorpej Use device_compatible_entry / of_search_compatible() rather than
matching against multiple sets of compatinbility strings.
 1.32 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.31 07-Jul-2020  thorpej branches: 1.31.2;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.
 1.30 14-Jun-2020  chs replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.
 1.29 07-Jan-2020  skrll Fix arm __HAVE_PREEMPTION build

__HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP and curcpu is defined as

#define curcpu() lwp_getcpu(_curlwp())
 1.28 07-Jan-2020  skrll KNF
 1.27 28-Dec-2019  jmcneill Do not use Early Write Acknowledge for PCIe I/O and config space.
 1.26 12-Mar-2019  jakllsch branches: 1.26.4;
Fix paste-o in an error path diagnostic message.
 1.25 16-Nov-2018  jmcneill Add intr_establish_xname support to arm and expose it to intrctl
 1.24 01-Apr-2018  ryo branches: 1.24.2;
Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.23 19-Oct-2017  skrll branches: 1.23.2; 1.23.4;
Don't call tegra_pcie_reset_port for now - it makes tk1 re @ pci not work
 1.22 27-Sep-2017  jmcneill enable PHYs
 1.21 26-Sep-2017  jmcneill More PCIe / XUSBPAD initialization goo for Tegra210.
 1.20 25-Sep-2017  jmcneill Enable pcie on tegra210
 1.19 20-Jul-2017  jmcneill Don't match tegra210, this doesn't work yet.
 1.18 26-May-2017  jmcneill Match nvidia,tegra210-pcie compat string.
 1.17 16-Apr-2017  jmcneill Fix previous; pci_intr_setattr takes a pci_intr_handle_t not the driver's
opaque handle.
 1.16 16-Apr-2017  jmcneill Add support for PCI_INTR_MPSAFE
 1.15 17-Aug-2016  jakllsch branches: 1.15.2;
Change tegra_pcie_conf_hook() to only give us the defaults without
enabled bus mastering. Previously both bus mastering and ROM decode
were enabled at pci_configure_bus() time. Both bus mastering and ROM
decode potentially have undesireable side effects. These can best be
managed by drivers familiar with their hardware.
 1.14 13-Dec-2015  jmcneill branches: 1.14.2;
Use fdt for device enumeration.
 1.13 19-Nov-2015  jmcneill Remove HOST1X and AHB_A2 from pmap_devmap
 1.12 17-Nov-2015  jakllsch Add PCI Extended Configuration support for tegrapcie(4).

Similar to the acpimcfg code, this only maps the extended configuration
space into KVA for known busses.
 1.11 17-Nov-2015  jakllsch Do not clear the PCIe interrupt until we've allowed its cause to become
deasserted. This halves the PCIe interrupt rate.
 1.10 14-Nov-2015  jakllsch Jetson TK1 u-boot sets up PCI IO space in an impossible-to-use
configuration. As we're already allocating resources on the PCI
bus, set up our own mapping of PCI address spaces into the ARM
address space. We rely on a potential overlap of address space
windows to allow us to use the same bus_space_tag for PCI Memory
and IO spaces.

The PCI attachment of the onboard re(4) uses PCI IO space in
preference to PCI Memory space for register accessses. As IO space
was impossible to use, we had to avoid IO space. This is now no
longer the case, so set up and enable IO space for PCI devices.

Also, map ROM BARs.
 1.9 14-Nov-2015  jakllsch Correct TEGRA_PCIE_A[123] window definitions. Replace existing
usages thereof (and related bus space handles, etc.) with more
appropriate names.
 1.8 14-Nov-2015  jakllsch We don't need to use any particular value, but use the actual interrupt
number for the PCI_INTERRUPT_LINE.
 1.7 13-Nov-2015  jakllsch Limit configuration space access to the non-emulated busses to legacy
PCI_CONF_SIZE. Extended configuration access is possible, we just have
to implement it without wasting up to 256MiB of KVA.
 1.6 13-Nov-2015  jakllsch validate emulated bus 0 configuration space access more carefully
 1.5 13-Nov-2015  jakllsch drop white space on empty line
 1.4 15-Oct-2015  jmcneill explicitly disable PCIe MSI as we dont support it yet
 1.3 02-Oct-2015  msaitoh PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific
 1.2 03-May-2015  jmcneill branches: 1.2.2;
coherent dma tag doesnt quite work
 1.1 03-May-2015  jmcneill Add Tegra K1 PCIE support.
 1.2.2.5 28-Aug-2017  skrll Sync with HEAD
 1.2.2.4 05-Oct-2016  skrll Sync with HEAD
 1.2.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.2 06-Jun-2015  skrll Sync with HEAD
 1.2.2.1 03-May-2015  skrll file tegra_pcie.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.14.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.15.2.1 21-Apr-2017  bouyer Sync with HEAD
 1.23.4.2 26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.23.4.1 07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.23.2.2 03-Dec-2017  jdolecek update from HEAD
 1.23.2.1 19-Oct-2017  jdolecek file tegra_pcie.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.24.2.2 08-Apr-2020  martin Merge changes from current as of 20200406
 1.24.2.1 10-Jun-2019  christos Sync with HEAD
 1.26.4.1 29-Dec-2019  martin Pull up following revision(s) (requested by jmcneill in ticket #586):

sys/arch/arm/nvidia/tegra_pcie.c: revision 1.27
sys/arch/aarch64/aarch64/pmap.c: revision 1.57
sys/arch/aarch64/aarch64/locore.S: revision 1.48
sys/arch/aarch64/include/armreg.h: revision 1.29
sys/arch/aarch64/aarch64/pmap.c: revision 1.58
sys/arch/aarch64/aarch64/locore.S: revision 1.49
sys/arch/arm/acpi/acpipchb.c: revision 1.14
sys/arch/aarch64/aarch64/genassym.cf: revision 1.16
sys/arch/arm/acpi/acpi_machdep.c: revision 1.13
sys/arch/aarch64/include/pmap.h: revision 1.27
sys/arch/aarch64/aarch64/genassym.cf: revision 1.17
sys/arch/aarch64/include/pmap.h: revision 1.28
sys/arch/arm/fdt/pcihost_fdtvar.h: revision 1.3
sys/arch/arm/include/bus_defs.h: revision 1.14
sys/arch/aarch64/aarch64/bus_space.c: revision 1.9
sys/arch/arm/fdt/pcihost_fdt.c: revision 1.12
sys/arch/aarch64/conf/files.aarch64: revision 1.15
sys/arch/aarch64/conf/files.aarch64: revision 1.16
sys/arch/arm/rockchip/rk3399_pcie.c: revision 1.9

Enable early write acknowledge for device memory mappings.

Do not use Early Write Acknowledge for PCIe I/O and config space.
 1.31.2.1 03-Apr-2021  thorpej Sync with HEAD.
 1.36.2.1 23-Mar-2021  thorpej Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
 1.37.4.1 31-May-2021  cjep sync with head
 1.37.2.1 13-May-2021  thorpej Sync with HEAD.
 1.38.4.1 04-Aug-2021  thorpej Adapt to CFARGS().
 1.4 26-Sep-2017  jmcneill branches: 1.4.2;
More PCIe / XUSBPAD initialization goo for Tegra210.
 1.3 14-Nov-2015  jakllsch add more AFI BAR register offsets
 1.2 15-Oct-2015  jmcneill explicitly disable PCIe MSI as we dont support it yet
 1.1 03-May-2015  jmcneill branches: 1.1.2;
Add Tegra K1 PCIE support.
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 03-May-2015  skrll file tegra_pciereg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.4.2.2 03-Dec-2017  jdolecek update from HEAD
 1.4.2.1 26-Sep-2017  jdolecek file tegra_pciereg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.9 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.8 25-Jan-2021  thorpej Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
 1.7 18-Jan-2021  thorpej Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.
 1.6 13-Oct-2019  skrll branches: 1.6.8;
Restore %# for PRIxBUSADDR
 1.5 13-Oct-2019  skrll Use PRIxBUSADDR
 1.4 01-Oct-2019  jmcneill Add support for devices with separate "init" and "default" pinctrl states.
 1.3 28-Sep-2019  skrll Update tegra_pinmux to support all bindings (pins and pin groups)

Update tegra210_pinmux.c with all defined pins and groups.
 1.2 16-Jul-2018  christos branches: 1.2.4;
Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.1 22-Sep-2017  jmcneill branches: 1.1.2; 1.1.4; 1.1.6;
Replace unused mpio driver with a more generic interface for pinmux, and
add Tegra210 pinmux support.
 1.1.6.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.1.6.1 10-Jun-2019  christos Sync with HEAD
 1.1.4.1 28-Jul-2018  pgoyette Sync with HEAD
 1.1.2.2 03-Dec-2017  jdolecek update from HEAD
 1.1.2.1 22-Sep-2017  jdolecek file tegra_pinmux.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.2.4.2 03-Oct-2019  martin Pull up following revision(s) (requested by jmcneill in ticket #276):

sys/arch/arm/samsung/exynos_pinctrl.c: revision 1.14
sys/arch/arm/rockchip/rk3399_iomux.c: revision 1.6
sys/dev/fdt/fdtvar.h: revision 1.54
sys/arch/arm/broadcom/bcm2835_gpio.c: revision 1.14
sys/dev/i2c/axppmic.c: revision 1.26
sys/arch/arm/nvidia/tegra_pinmux.c: revision 1.4
sys/arch/arm/rockchip/rk3328_iomux.c: revision 1.3
sys/dev/fdt/fdt_pinctrl.c: revision 1.10
sys/arch/arm/amlogic/meson_pinctrl.c: revision 1.6
sys/dev/fdt/fdtbus.c: revision 1.30
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.27

Add support for devices with separate "init" and "default" pinctrl states.
 1.2.4.1 28-Sep-2019  martin Pull up following revision(s) (requested by skrll in ticket #263):

sys/arch/arm/nvidia/tegra_pinmux.h: revision 1.2
sys/arch/arm/nvidia/tegra_pinmux.c: revision 1.3
sys/arch/arm/nvidia/tegra210_pinmux.c: revision 1.2

Update tegra_pinmux to support all bindings (pins and pin groups)
Update tegra210_pinmux.c with all defined pins and groups.
 1.6.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.2 28-Sep-2019  skrll Update tegra_pinmux to support all bindings (pins and pin groups)

Update tegra210_pinmux.c with all defined pins and groups.
 1.1 22-Sep-2017  jmcneill branches: 1.1.2; 1.1.6; 1.1.10;
Replace unused mpio driver with a more generic interface for pinmux, and
add Tegra210 pinmux support.
 1.1.10.1 28-Sep-2019  martin Pull up following revision(s) (requested by skrll in ticket #263):

sys/arch/arm/nvidia/tegra_pinmux.h: revision 1.2
sys/arch/arm/nvidia/tegra_pinmux.c: revision 1.3
sys/arch/arm/nvidia/tegra210_pinmux.c: revision 1.2

Update tegra_pinmux to support all bindings (pins and pin groups)
Update tegra210_pinmux.c with all defined pins and groups.
 1.1.6.1 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.1.2.2 03-Dec-2017  jdolecek update from HEAD
 1.1.2.1 22-Sep-2017  jdolecek file tegra_pinmux.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.30 04-Oct-2025  thorpej Use device_{get,set}prop_bool() for "is_console".
 1.29 06-Sep-2025  thorpej Refactor the "platform" defitions into fdt_platform.h
 1.28 07-Apr-2023  skrll Rename ARM_PLATFORM to FDT_PLATFORM and make it available outside arm.
 1.27 24-Apr-2021  thorpej Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
 1.26 04-Feb-2021  thorpej branches: 1.26.2;
Call acpi_device_register() / fdtbus_device_register() as approrpriate.
 1.25 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.24 28-Sep-2020  jmcneill branches: 1.24.2;
Get rid of a4x bus_space tag from fdtbus_attach_args. The only consumer
of this was various com(4) glue so modify all of that to use the new
com_init_regs_stride instead.
 1.23 21-Aug-2020  uwe #ifdef consistency.
 1.22 10-Jul-2020  skrll Add support for KASAN on ARMv[67]

Thanks to maxv for many pointers and reviews.
 1.21 20-Jun-2020  skrll Convert to new proplib api
 1.20 03-Jan-2019  jmcneill Add a link set for cpu enable methods.
 1.19 15-Dec-2018  jmcneill Add missing call to arm_fdt_cpu_mpstart, fixes SMP on Tegra X1
 1.18 30-Oct-2018  skrll Retire fdt_putchar and ap_early_put_char in favour of uartputc.
 1.17 18-Oct-2018  skrll Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively
 1.16 21-Sep-2018  skrll Centralise defparam CONSADDR, CONSPEED, CONMODE and CONADDR into
opt_console.h and adjust.
 1.15 10-Sep-2018  ryo cleanup aarch64 mpstart and fdt bootstrap
* arm_cpu_hatch_arg is a bad idea. avoid serializing CPU startup, and eliminate arm_cpu_hatch_arg.
in mpstart, resolve own cpu index using array of cpu_mpidr[] (aarch64)
* add support fdt enable-method "spin-table"
* add support fdt enable-method "brcm,bcm2836-smp" (for 32bit RaspberryPi)
* use arm_fdt_cpu_bootstrap() instead of psci_fdt_bootstrap()
* rename "arm/fdt/psci_fdt.h" to "arm/fdt/psci_fdtvar.h" because of conflict of include file for needs-flag
* add devmap for cpu spin-table of raspberrypi3/aarch64
* no need to force hatch APs for raspberrypi3/arm32 ifndef MULTIPROCESSOR.
* fix to work pmap_extract(kerneltext/data/bss) even if before calling pmap_bootstrap

idea to use cpu_mpidr[] by jmcneill@. reviewd by skrll@. thanks.
 1.14 05-Aug-2018  skrll Add prefixes to struct arm_platform{,_info} members.

No functional change.
 1.13 08-Jul-2018  jmcneill Use psci_fdt_bootstrap for MP spinup on Tegra210.
 1.12 07-Jul-2018  jmcneill Use arm_generic_bs_tag instead of armv7_generic_bs_tag and conditionally
define SOC platform support (so we don't try to build 32-bit support into
64-bit kernels).
 1.11 01-Apr-2018  ryo branches: 1.11.2;
Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.10 17-Mar-2018  ryo move from sys/arch/arm/arm32/armv7_generic_dma.c to sys/arch/arm/arm/arm_generic_dma.c,
and change variable name from armv7_generic_dma_tag to arm_generic_dma_tag

no functional change. (preliminary changes for merging aarch64)
 1.9 19-Dec-2017  skrll branches: 1.9.2;
Trailing whitespace
 1.8 22-Oct-2017  skrll branches: 1.8.2;
Centralise defines for DEVMAP_{ALIGN,SIZE,ENTRY,ENTRY_END}
 1.7 20-Jul-2017  jmcneill branches: 1.7.2;
Get rid of tegra_chip_id/tegra_chip_name and rely on FDT for this info.
 1.6 02-Jun-2017  jmcneill Allow platform code to specify the UART frequency for consinit
 1.5 02-Jun-2017  jmcneill FDT-ize "delay" by having fdt_machdep provide the delay() function and
move the implementations into the platform code.
 1.4 30-May-2017  jmcneill Fix VERBOSE_INIT_ARM build with TEGRA kernel.
 1.3 29-May-2017  jmcneill Rename armv7fdt to armfdt now that bus space + dma tags are filled in by
platform code.
 1.2 29-May-2017  jmcneill Move console initialization out of platform code into the console drivers
themselves.
 1.1 28-May-2017  jmcneill Add a facility for platform-specific callbacks and use it to remove most
of the Tegra-specific code from tegra_machdep.c.

Platform code matches on the compatible property of the root ("/") DT node
and allows for chip-specific implementations of the following:

- devmap: Return a 0-terminated list of static device map entries.
- bootstrap: Early initialization of platform-specific facilities.
- early_putchar: Provides an implementation of putchar for use in early
debug messages.
- device_register: Platform-specific device register callback.
- reset: Platform-specific CPU reset implementation.
- consinit: Platform-specific console init implementation.
 1.7.2.2 28-Aug-2017  skrll Sync with HEAD
 1.7.2.1 20-Jul-2017  skrll file tegra_platform.c was added on branch nick-nhusb on 2017-08-28 17:51:31 +0000
 1.8.2.2 03-Dec-2017  jdolecek update from HEAD
 1.8.2.1 22-Oct-2017  jdolecek file tegra_platform.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.9.2.9 18-Jan-2019  pgoyette Synch with HEAD
 1.9.2.8 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.9.2.7 26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.9.2.6 20-Oct-2018  pgoyette Sync with head
 1.9.2.5 30-Sep-2018  pgoyette Ssync with HEAD
 1.9.2.4 06-Sep-2018  pgoyette Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)
 1.9.2.3 28-Jul-2018  pgoyette Sync with HEAD
 1.9.2.2 07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.9.2.1 22-Mar-2018  pgoyette Synch with HEAD, resolve conflicts
 1.11.2.1 10-Jun-2019  christos Sync with HEAD
 1.24.2.1 03-Apr-2021  thorpej Sync with HEAD.
 1.26.2.1 03-Apr-2021  thorpej - FDT device enumeration now sets the device handle using CFARG_DEVHANDLE.
- fdtbus_device_register() is now obsolete, so G/C it.
- of_device_register() is now obsolete, so G/C it.
 1.1 01-Apr-2018  ryo branches: 1.1.2;
Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.1.2.2 07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.1.2.1 01-Apr-2018  pgoyette file tegra_platform.h was added on branch pgoyette-compat on 2018-04-07 04:12:12 +0000
 1.16 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.15 13-Oct-2019  skrll branches: 1.15.8;
Restore %# for PRIxBUSADDR
 1.14 13-Oct-2019  skrll Use PRIxBUSADDR
 1.13 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.12 01-Apr-2018  ryo branches: 1.12.2;
Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.11 20-Jul-2017  jmcneill branches: 1.11.2; 1.11.4;
Get rid of tegra_chip_id/tegra_chip_name and rely on FDT for this info.
 1.10 25-May-2017  jmcneill Match nvidia,tegra210-pmc compat string.
 1.9 25-May-2017  jmcneill Correct an issue introduced in r1.7 that prevented unclamping power for
non-GPU partitions. While here, apply the GPU power workaround to Tegra210
as well.
 1.8 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.7 17-Oct-2015  jmcneill GPU power is controlled by a different register on Tegra124, handle this in tegra_pmc_remove_clamping
 1.6 25-May-2015  jmcneill wait for PWRGATE_TOGGLE.START to clear before submitting a new request
 1.5 18-May-2015  jmcneill Make sure HDMI I/O is not in deep power down mode
 1.4 15-May-2015  jmcneill more Tegra SATA init
 1.3 26-Apr-2015  jmcneill add Tegra124 MP support
 1.2 29-Mar-2015  jmcneill branches: 1.2.2;
Use shared armv7_generic_space
 1.1 29-Mar-2015  jmcneill NVIDIA Tegra K1 support, work in progress.
 1.2.2.5 28-Aug-2017  skrll Sync with HEAD
 1.2.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.3 06-Jun-2015  skrll Sync with HEAD
 1.2.2.2 06-Apr-2015  skrll Sync with HEAD
 1.2.2.1 29-Mar-2015  skrll file tegra_pmc.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.11.4.2 28-Jul-2018  pgoyette Sync with HEAD
 1.11.4.1 07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.11.2.2 03-Dec-2017  jdolecek update from HEAD
 1.11.2.1 20-Jul-2017  jdolecek file tegra_pmc.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.12.2.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.12.2.1 10-Jun-2019  christos Sync with HEAD
 1.15.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.5 17-Oct-2015  jmcneill branches: 1.5.16;
GPU power is controlled by a different register on Tegra124, handle this in tegra_pmc_remove_clamping
 1.4 18-May-2015  jmcneill Make sure HDMI I/O is not in deep power down mode
 1.3 15-May-2015  jmcneill more Tegra SATA init
 1.2 26-Apr-2015  jmcneill add Tegra124 MP support
 1.1 29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.3 06-Jun-2015  skrll Sync with HEAD
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file tegra_pmcreg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.5.16.2 03-Dec-2017  jdolecek update from HEAD
 1.5.16.1 17-Oct-2015  jdolecek file tegra_pmcreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.25 01-Apr-2018  ryo Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.24 21-Jul-2017  jmcneill branches: 1.24.2; 1.24.4;
Add support for NVIDIA Tegra X1.
 1.23 30-May-2017  jmcneill Fix VERBOSE_INIT_ARM build with TEGRA kernel.
 1.22 21-Apr-2017  jmcneill Get the physical memory layout from the /memory node instead of reading
from the memory controller registers.
 1.21 26-Mar-2016  skrll branches: 1.21.2;
Restore HOST1X and AHB_A2 to pmap_devmap to give pmap less work to do
 1.20 21-Nov-2015  jmcneill Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.19 21-Nov-2015  jmcneill Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.
 1.18 19-Nov-2015  jmcneill Remove HOST1X and AHB_A2 from pmap_devmap
 1.17 14-Nov-2015  jakllsch Jetson TK1 u-boot sets up PCI IO space in an impossible-to-use
configuration. As we're already allocating resources on the PCI
bus, set up our own mapping of PCI address spaces into the ARM
address space. We rely on a potential overlap of address space
windows to allow us to use the same bus_space_tag for PCI Memory
and IO spaces.

The PCI attachment of the onboard re(4) uses PCI IO space in
preference to PCI Memory space for register accessses. As IO space
was impossible to use, we had to avoid IO space. This is now no
longer the case, so set up and enable IO space for PCI devices.

Also, map ROM BARs.
 1.16 14-Nov-2015  jakllsch Correct TEGRA_PCIE_A[123] window definitions. Replace existing
usages thereof (and related bus space handles, etc.) with more
appropriate names.
 1.15 14-Nov-2015  jakllsch Increment TEGRA_PCIE_SIZE

It's a size, not a last-valid-offset.
 1.14 17-Oct-2015  jmcneill add GPU, SOR, and DPAUX offsets
 1.13 01-Aug-2015  jmcneill Add driver for Tegra HDMI CEC controller.
 1.12 30-May-2015  jmcneill Tegra K1 Watchdog support.
 1.11 18-May-2015  jmcneill Power-on Host1x subsystem
 1.10 17-May-2015  jmcneill add graphics host offsets
 1.9 10-May-2015  jmcneill Tegra I2C driver
 1.8 07-May-2015  jmcneill add Tegra MPIO / Pinmux driver
 1.7 03-May-2015  jmcneill UART clock source is PLLP. Set com type to COM_TYPE_TEGRA.
 1.6 03-May-2015  jmcneill Add Tegra K1 PCIE support.
 1.5 02-May-2015  jmcneill add GPIO support
 1.4 28-Apr-2015  jmcneill Add a basic driver for the Clock and Reset controller, use it to determine
CPU frequency.
 1.3 26-Apr-2015  jmcneill add Tegra124 MP support
 1.2 26-Apr-2015  jmcneill add AHB_A2 to devmap, print SCTLR value in initarm
 1.1 29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.7 28-Aug-2017  skrll Sync with HEAD
 1.1.2.6 22-Apr-2016  skrll Sync with HEAD
 1.1.2.5 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.4 22-Sep-2015  skrll Sync with HEAD
 1.1.2.3 06-Jun-2015  skrll Sync with HEAD
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file tegra_reg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.21.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.24.4.1 07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.24.2.2 03-Dec-2017  jdolecek update from HEAD
 1.24.2.1 21-Jul-2017  jdolecek file tegra_reg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.10 08-Sep-2025  thorpej Garbage-collect fdtbus_todr_attach(); todr_attach() does all the
necessary work now.

kern/59630
 1.9 07-Sep-2025  thorpej Change todr_chip_handle::cookie -> todr_chip_handle::todr_dev, and
make it a device_t. Upcoming functional changes will require the
device_t associated with a TODR device.

Change todr_chip_handle::bus_cookie -> todr_chip_handle::todr_devaux.
Nothing was using the old field, but I decided to keep it around just
in cause something needs it in the future.

And with these largely mechanical yet semantically meaningful changes,
thus spake the Oracle: "Welcome to NetBSD 11.99.2."
 1.8 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.7 13-Oct-2019  skrll branches: 1.7.8;
Restore %# for PRIxBUSADDR
 1.6 13-Oct-2019  skrll Use PRIxBUSADDR
 1.5 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.4 25-May-2017  jmcneill branches: 1.4.8; 1.4.10; 1.4.12;
Match nvidia,tegra210-rtc and nvidia,tegra20-rtc compat strings.
 1.3 22-Apr-2017  jmcneill Use fdtbus_todr_attach
 1.2 13-Dec-2015  jmcneill branches: 1.2.2;
Use fdt for device enumeration.
 1.1 05-May-2015  jmcneill branches: 1.1.2;
Tegra K1 RTC driver.
 1.1.2.4 28-Aug-2017  skrll Sync with HEAD
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 05-May-2015  skrll file tegra_rtc.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.2.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.4.12.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.4.12.1 10-Jun-2019  christos Sync with HEAD
 1.4.10.1 28-Jul-2018  pgoyette Sync with HEAD
 1.4.8.2 03-Dec-2017  jdolecek update from HEAD
 1.4.8.1 25-May-2017  jdolecek file tegra_rtc.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.7.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.1 05-May-2015  jmcneill branches: 1.1.2; 1.1.18;
Tegra K1 RTC driver.
 1.1.18.2 03-Dec-2017  jdolecek update from HEAD
 1.1.18.1 05-May-2015  jdolecek file tegra_rtcreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 05-May-2015  skrll file tegra_rtcreg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.32 06-Feb-2022  jmcneill sdhc: Retire SDHC_FLAG_USE_ADMA2 flag.

ADMA2 support in sdhc is mature now, so no need for it to be opt-in.
 1.31 06-Feb-2022  jmcneill sdhc: tegra: Set SDHC_FLAG_BROKEN_ADMA2_ZEROLEN quirk flag.

The Tegra SDHCI implementation apparently treats ADMA2 descriptors with
length of 0 incorrectly.
 1.30 22-Jan-2022  skrll Ensure bus_dmatag_subregion is called with an inclusive max_addr
everywhere.
 1.29 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.28 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.27 14-Sep-2020  skrll branches: 1.27.2;
Trailing whitespace.
 1.26 01-Mar-2020  skrll bus_dmatag_subregion isn't supported on (compiled into) arm so ifdef its
use in previous.
 1.25 15-Feb-2020  skrll Need to limit the DMA range for tx1. Assume 32bit DMA everywhere for now.
 1.24 13-Oct-2019  skrll branches: 1.24.2;
Restore %# for PRIxBUSADDR
 1.23 13-Oct-2019  skrll Use PRIxBUSADDR
 1.22 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.21 21-Jul-2017  jmcneill branches: 1.21.2; 1.21.4; 1.21.6;
Disable UHS modes if signaling voltage regulator is unavailable.
 1.20 25-May-2017  jmcneill Match nvidia,tegra210-sdhci compat string.
 1.19 22-Apr-2017  jmcneill If the "vqmmc-supply" regulator is present, use it to set signal voltage.
 1.18 22-Apr-2017  jmcneill Set parent clock rate to 100MHz when SDR104 is disabled
 1.17 16-Apr-2017  jmcneill Disable SDR104 until the Tegra K1 custom tuning method is implemented.
This is required to work around errata that describes periodic data CRC
errors after autotuning has completed.
 1.16 11-Apr-2017  jmcneill Set SDHC_FLAG_NO_HS_BIT for Tegra sdhc. No noticeable impact on performance
and it seems to get rid of the spurious data transfer timeouts.
 1.15 22-Dec-2015  jmcneill branches: 1.15.2; 1.15.4;
Switch Tegra over to fdt based clocks and reset controls.
 1.14 16-Dec-2015  jmcneill use of_getprop_uint32
 1.13 15-Dec-2015  jmcneill fdtbus_gpio_read handles pin polarity, so fix inverted test in tegra_sdhc_card_detect
 1.12 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.11 03-Aug-2015  jmcneill set SDHC_FLAG_POLL_CARD_DET when we have a card detect pin
 1.10 02-Aug-2015  jmcneill set ref clk to 204MHz so we can take advantage of UHS-I modes
 1.9 29-Jul-2015  jmcneill enable ADMA2 data transfer mode
 1.8 23-Jul-2015  jmcneill use SDHC_FLAG_NO_TIMEOUT
 1.7 23-Jul-2015  jmcneill Support fractional dividers. This lets us use 48MHz for SDMMC HS mode
instead of 45.333MHz.
 1.6 30-May-2015  jmcneill dont set SDHC_FLAG_NO_HS_BIT flag
 1.5 03-May-2015  jmcneill since we dont support SDR104 yet, dont try to optimize it; instead, optimize for HS mode, which brings us up from 34 MHz to 45.333 MHz
 1.4 03-May-2015  jmcneill set SDHC_FLAG_SINGLE_POWER_WRITE
 1.3 02-May-2015  jmcneill hook up power, card detect, write protect gpios
 1.2 02-May-2015  jmcneill SDMMC clock input is PLLP (408 MHz). Set input divisor to 2 to get a
204 MHz input for the SDHC, which is just below the maximum supported
frequency for SDR104.
 1.1 29-Mar-2015  jmcneill branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
 1.1.2.6 28-Aug-2017  skrll Sync with HEAD
 1.1.2.5 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.4 22-Sep-2015  skrll Sync with HEAD
 1.1.2.3 06-Jun-2015  skrll Sync with HEAD
 1.1.2.2 06-Apr-2015  skrll Sync with HEAD
 1.1.2.1 29-Mar-2015  skrll file tegra_sdhc.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.15.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.15.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.21.6.3 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.21.6.2 08-Apr-2020  martin Merge changes from current as of 20200406
 1.21.6.1 10-Jun-2019  christos Sync with HEAD
 1.21.4.1 28-Jul-2018  pgoyette Sync with HEAD
 1.21.2.2 03-Dec-2017  jdolecek update from HEAD
 1.21.2.1 21-Jul-2017  jdolecek file tegra_sdhc.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.24.2.1 29-Feb-2020  ad Sync with head.
 1.27.2.1 03-Apr-2021  thorpej Sync with HEAD.
 1.16 24-Sep-2018  jmcneill Remove two unused bs handles
 1.15 01-Apr-2018  ryo branches: 1.15.2;
Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.14 20-Jul-2017  jmcneill branches: 1.14.2; 1.14.4;
Get rid of tegra_chip_id/tegra_chip_name and rely on FDT for this info.
 1.13 28-May-2017  jmcneill Remove unused tegra_dma_tag
 1.12 27-May-2017  jmcneill GC unused tegra_dma_bootstrap function.
 1.11 25-May-2017  jmcneill Chip detection and MP spinup code for Tegra210
 1.10 22-Apr-2017  jmcneill Get rid of tegra_cpuinit after scanning fdt and attach the cpufreq support
to the /cpus node. Use regulator API instead of poking directly at the I2C
controller to set voltages.
 1.9 26-Mar-2016  skrll branches: 1.9.2;
Restore HOST1X and AHB_A2 to pmap_devmap to give pmap less work to do
 1.8 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.7 19-Nov-2015  jmcneill Remove HOST1X and AHB_A2 from pmap_devmap
 1.6 13-May-2015  jmcneill Tegra K1 CPU frequency scaling support.

jetsontk1# sysctl machdep.cpu
machdep.cpu.frequency.target = 2292
machdep.cpu.frequency.current = 2292
machdep.cpu.frequency.available = 2292 2100 1896 1692 1500 1296 1092 900 696
 1.5 03-May-2015  jmcneill Add Tegra K1 PCIE support.
 1.4 28-Apr-2015  jmcneill Add a basic driver for the Clock and Reset controller, use it to determine
CPU frequency.
 1.3 26-Apr-2015  jmcneill add Tegra124 MP support
 1.2 29-Mar-2015  jmcneill branches: 1.2.2;
Use shared armv7_generic_space
 1.1 29-Mar-2015  jmcneill NVIDIA Tegra K1 support, work in progress.
 1.2.2.6 28-Aug-2017  skrll Sync with HEAD
 1.2.2.5 22-Apr-2016  skrll Sync with HEAD
 1.2.2.4 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.3 06-Jun-2015  skrll Sync with HEAD
 1.2.2.2 06-Apr-2015  skrll Sync with HEAD
 1.2.2.1 29-Mar-2015  skrll file tegra_soc.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.9.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.14.4.2 30-Sep-2018  pgoyette Ssync with HEAD
 1.14.4.1 07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.14.2.2 03-Dec-2017  jdolecek update from HEAD
 1.14.2.1 20-Jul-2017  jdolecek file tegra_soc.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.15.2.1 10-Jun-2019  christos Sync with HEAD
 1.13 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.12 27-Jan-2021  thorpej Use DEVICE_COMPAT_EOL.
 1.11 25-Jan-2021  thorpej Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
 1.10 18-Jan-2021  thorpej Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.
 1.9 13-Oct-2019  skrll branches: 1.9.8;
Restore %# for PRIxBUSADDR
 1.8 13-Oct-2019  skrll Use PRIxBUSADDR
 1.7 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.6 21-Jul-2017  jmcneill branches: 1.6.2; 1.6.4; 1.6.6;
Fix of_search_compatible usage
 1.5 20-Jul-2017  jmcneill Get rid of tegra_chip_id/tegra_chip_name and rely on FDT for this info.
 1.4 16-Apr-2017  jmcneill Add support for multiple clock domains in clk API.
 1.3 22-Dec-2015  jmcneill branches: 1.3.2; 1.3.4; 1.3.6;
Switch Tegra over to fdt based clocks and reset controls.
 1.2 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.1 21-Nov-2015  jmcneill Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.3.6.1 21-Apr-2017  bouyer Sync with HEAD
 1.3.4.1 26-Apr-2017  pgoyette Sync with HEAD
 1.3.2.3 28-Aug-2017  skrll Sync with HEAD
 1.3.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.3.2.1 22-Dec-2015  skrll file tegra_soctherm.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.6.6.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.6.6.1 10-Jun-2019  christos Sync with HEAD
 1.6.4.1 28-Jul-2018  pgoyette Sync with HEAD
 1.6.2.2 03-Dec-2017  jdolecek update from HEAD
 1.6.2.1 21-Jul-2017  jdolecek file tegra_soctherm.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.9.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.1 21-Nov-2015  jmcneill branches: 1.1.2; 1.1.18;
Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.1.18.2 03-Dec-2017  jdolecek update from HEAD
 1.1.18.1 21-Nov-2015  jdolecek file tegra_socthermreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.1 21-Nov-2015  skrll file tegra_socthermreg.h was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.2 29-Mar-2015  jmcneill Use shared armv7_generic_space
 1.1 29-Mar-2015  jmcneill NVIDIA Tegra K1 support, work in progress.
 1.12 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.11 13-Oct-2019  skrll branches: 1.11.8;
Restore %# for PRIxBUSADDR
 1.10 13-Oct-2019  skrll Use PRIxBUSADDR
 1.9 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.8 01-Apr-2018  ryo branches: 1.8.2;
Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.7 02-Jun-2017  jmcneill branches: 1.7.8; 1.7.10;
FDT-ize "delay" by having fdt_machdep provide the delay() function and
move the implementations into the platform code.
 1.6 25-May-2017  jmcneill Match nvidia,tegra210-timer and nvidia,tegra20-timer compat strings.
 1.5 16-Apr-2017  jmcneill Add support for multiple clock domains in clk API.
 1.4 24-Dec-2015  jmcneill branches: 1.4.2; 1.4.4;
use "watchdog" clock if not defined in fdt
 1.3 22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.2 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.1 30-May-2015  jmcneill branches: 1.1.2;
Tegra K1 Watchdog support.
 1.1.2.4 28-Aug-2017  skrll Sync with HEAD
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 30-May-2015  skrll file tegra_timer.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.4.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.4.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.7.10.2 28-Jul-2018  pgoyette Sync with HEAD
 1.7.10.1 07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.7.8.2 03-Dec-2017  jdolecek update from HEAD
 1.7.8.1 02-Jun-2017  jdolecek file tegra_timer.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.8.2.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.8.2.1 10-Jun-2019  christos Sync with HEAD
 1.11.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.2 22-Dec-2015  jmcneill branches: 1.2.16;
Switch Tegra over to fdt based clocks and reset controls.
 1.1 30-May-2015  jmcneill branches: 1.1.2;
Tegra K1 Watchdog support.
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 30-May-2015  skrll file tegra_timerreg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.2.16.2 03-Dec-2017  jdolecek update from HEAD
 1.2.16.1 22-Dec-2015  jdolecek file tegra_timerreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.11 27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.10 13-Oct-2019  skrll branches: 1.10.8;
Restore %# for PRIxBUSADDR
 1.9 13-Oct-2019  skrll Use PRIxBUSADDR
 1.8 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.7 25-May-2017  jmcneill branches: 1.7.8; 1.7.10; 1.7.12;
Match nvidia,tegra210-usb-phy and nvidia,tegra30-usb-phy compat strings.
 1.6 08-Mar-2016  skrll Use the nvidia,has-utmi-pad-registers property.

From Jared.
 1.5 22-Dec-2015  jmcneill branches: 1.5.2;
Switch Tegra over to fdt based clocks and reset controls.
 1.4 16-Dec-2015  jmcneill use of_getprop_uint32
 1.3 13-Dec-2015  jmcneill Use fdt for device enumeration.
 1.2 19-Nov-2015  jmcneill Remove HOST1X and AHB_A2 from pmap_devmap
 1.1 21-Oct-2015  jmcneill Split out USB PHY support out of the ehci glue and into a separate driver.
 1.5.2.4 28-Aug-2017  skrll Sync with HEAD
 1.5.2.3 19-Mar-2016  skrll Sync with HEAD
 1.5.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.5.2.1 22-Dec-2015  skrll file tegra_usbphy.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.7.12.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.7.12.1 10-Jun-2019  christos Sync with HEAD
 1.7.10.1 28-Jul-2018  pgoyette Sync with HEAD
 1.7.8.2 03-Dec-2017  jdolecek update from HEAD
 1.7.8.1 25-May-2017  jdolecek file tegra_usbphy.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.10.8.1 03-Apr-2021  thorpej Sync with HEAD.
 1.2 22-Jan-2017  jakllsch branches: 1.2.12;
Add TEGRA_EHCI_PHY_VBUS_WAKEUP_ID_REG and bit definitions.
 1.1 21-Oct-2015  jmcneill branches: 1.1.2; 1.1.4; 1.1.6;
Split out USB PHY support out of the ehci glue and into a separate driver.
 1.1.6.1 21-Apr-2017  bouyer Sync with HEAD
 1.1.4.1 20-Mar-2017  pgoyette Sync with HEAD
 1.1.2.3 05-Feb-2017  skrll Sync with HEAD
 1.1.2.2 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.1 21-Oct-2015  skrll file tegra_usbreg.h was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.2.12.2 03-Dec-2017  jdolecek update from HEAD
 1.2.12.1 22-Jan-2017  jdolecek file tegra_usbreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.46 31-Jan-2019  skrll Change ap_mpstart to return non-zero value if any/all APs don't start.
 1.45 14-Dec-2018  skrll Support SATA on TEGRA210

Thanks to jmcneill for help with this.
 1.44 18-Oct-2018  skrll Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively
 1.43 07-Jul-2018  jmcneill Use arm_generic_bs_tag instead of armv7_generic_bs_tag and conditionally
define SOC platform support (so we don't try to build 32-bit support into
64-bit kernels).
 1.42 24-Sep-2017  jmcneill branches: 1.42.2; 1.42.4; 1.42.6;
More XUSB init. A USB3 memory stick seems to work now.
 1.41 22-Sep-2017  jmcneill Replace unused mpio driver with a more generic interface for pinmux, and
add Tegra210 pinmux support.
 1.40 19-Sep-2017  jmcneill The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.39 20-Jul-2017  jmcneill Get rid of tegra_chip_id/tegra_chip_name and rely on FDT for this info.
 1.38 02-Jun-2017  jmcneill FDT-ize "delay" by having fdt_machdep provide the delay() function and
move the implementations into the platform code.
 1.37 28-May-2017  jmcneill Enumerate CPUs, GIC, and generic timer using FDT data instead of relying
on hard-coded tables in mainbus.
 1.36 27-May-2017  jmcneill tegra_dma_bootstrap is no more
 1.35 25-May-2017  jmcneill Chip detection and MP spinup code for Tegra210
 1.34 25-May-2017  jmcneill Add Tegra210 chip ID.
 1.33 22-Apr-2017  jmcneill Get rid of tegra_cpuinit after scanning fdt and attach the cpufreq support
to the /cpus node. Use regulator API instead of poking directly at the I2C
controller to set voltages.
 1.32 21-Apr-2017  jmcneill Get the physical memory layout from the /memory node instead of reading
from the memory controller registers.
 1.31 14-Apr-2017  jmcneill Only route USB ports to XHCI controller after the firmware is loaded
successfully. This gives us working USB (via USB2 controllers) until the
tegra-firmware package is installed.
 1.30 26-Mar-2016  skrll branches: 1.30.2; 1.30.4;
G/C old structs
 1.29 22-Dec-2015  jmcneill tegra_car_* and tegra_i2c_dvc_write are no more
 1.28 21-Nov-2015  jmcneill Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
Current CritMax WarnMax WarnMin CritMin Unit
CPU0: 27.500 degC
CPU1: 27.500 degC
CPU2: 29.500 degC
CPU3: 29.000 degC
MEM0: 26.500 degC
MEM1: 27.000 degC
GPU: 27.000 degC
PLLX: 28.000 degC
 1.27 21-Nov-2015  jmcneill Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.
 1.26 19-Nov-2015  jmcneill Remove HOST1X and AHB_A2 from pmap_devmap
 1.25 17-Oct-2015  jmcneill add support for enabling the GPU
 1.24 01-Aug-2015  jmcneill Add driver for Tegra HDMI CEC controller.
 1.23 23-Jul-2015  jmcneill Support fractional dividers. This lets us use 48MHz for SDMMC HS mode
instead of 45.333MHz.
 1.22 08-Jul-2015  jmcneill expose EDID to userland
 1.21 31-May-2015  jmcneill add external function for writing to dvc (I2C5) devices
 1.20 30-May-2015  jmcneill Tegra K1 Watchdog support.
 1.19 18-May-2015  jmcneill Make sure HDMI I/O is not in deep power down mode
 1.18 18-May-2015  jmcneill Power-on Host1x subsystem
 1.17 18-May-2015  jmcneill Work in progress HDMI / framebuffer support for Tegra K1.
 1.16 15-May-2015  jmcneill more Tegra SATA init
 1.15 13-May-2015  jmcneill Tegra K1 CPU frequency scaling support.

jetsontk1# sysctl machdep.cpu
machdep.cpu.frequency.target = 2292
machdep.cpu.frequency.current = 2292
machdep.cpu.frequency.available = 2292 2100 1896 1692 1500 1296 1092 900 696
 1.14 10-May-2015  jmcneill Tegra I2C driver
 1.13 10-May-2015  jmcneill Tegra SATA ungating support
 1.12 10-May-2015  jmcneill Tegra HD audio support (untested as it is for HDMI output)
 1.11 09-May-2015  jmcneill Tegra USB PHY support
 1.10 09-May-2015  jmcneill add tegra_car_pllu_rate
 1.9 07-May-2015  jmcneill add Tegra MPIO / Pinmux driver
 1.8 03-May-2015  jmcneill add pllc and uart rate funcs
 1.7 03-May-2015  jmcneill Add Tegra K1 PCIE support.
 1.6 02-May-2015  jmcneill simplify gpio kpi
 1.5 02-May-2015  jmcneill add GPIO support
 1.4 28-Apr-2015  jmcneill Add a basic driver for the Clock and Reset controller, use it to determine
CPU frequency.
 1.3 26-Apr-2015  jmcneill add Tegra124 MP support
 1.2 29-Mar-2015  jmcneill branches: 1.2.2;
Use shared armv7_generic_space
 1.1 29-Mar-2015  jmcneill NVIDIA Tegra K1 support, work in progress.
 1.2.2.7 28-Aug-2017  skrll Sync with HEAD
 1.2.2.6 22-Apr-2016  skrll Sync with HEAD
 1.2.2.5 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.4 22-Sep-2015  skrll Sync with HEAD
 1.2.2.3 06-Jun-2015  skrll Sync with HEAD
 1.2.2.2 06-Apr-2015  skrll Sync with HEAD
 1.2.2.1 29-Mar-2015  skrll file tegra_var.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
 1.30.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.30.2.1 26-Apr-2017  pgoyette Sync with HEAD
 1.42.6.1 10-Jun-2019  christos Sync with HEAD
 1.42.4.3 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.42.4.2 20-Oct-2018  pgoyette Sync with head
 1.42.4.1 28-Jul-2018  pgoyette Sync with HEAD
 1.42.2.2 03-Dec-2017  jdolecek update from HEAD
 1.42.2.1 24-Sep-2017  jdolecek file tegra_var.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.3 29-Aug-2020  jakllsch tegra_xusb: fix xusb static firmware build

To work around objcopy and ld now being unable to create a EABI5 object
from a binary, use the assembler directive .incbin in inline assembly
to pull in the firmware blob.

This also probably makes TEGRA210_XUSB_BIN_STATIC actually work.
 1.2 19-Sep-2017  jmcneill branches: 1.2.2;
The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.1 26-Sep-2016  jakllsch branches: 1.1.2; 1.1.4;
Add xhci(4) attachment glue and firmware handler for Tegra K1 "XUSB"
xHCI controller. Adjustments to tegraxusbpad(4) will be needed
to connect the controller to actual USB ports.
 1.1.4.2 04-Nov-2016  pgoyette Sync with HEAD
 1.1.4.1 26-Sep-2016  pgoyette file tegra_xusb-fw.mk was added on branch pgoyette-localcount on 2016-11-04 14:48:58 +0000
 1.1.2.2 05-Oct-2016  skrll Sync with HEAD
 1.1.2.1 26-Sep-2016  skrll file tegra_xusb-fw.mk was added on branch nick-nhusb on 2016-10-05 20:55:25 +0000
 1.2.2.2 03-Dec-2017  jdolecek update from HEAD
 1.2.2.1 19-Sep-2017  jdolecek file tegra_xusb-fw.mk was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.28 07-Aug-2021  thorpej Merge thorpej-cfargs2.
 1.27 24-Apr-2021  thorpej branches: 1.27.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
 1.26 27-Jan-2021  thorpej branches: 1.26.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.25 27-Jan-2021  thorpej Use DEVICE_COMPAT_EOL.
 1.24 25-Jan-2021  thorpej Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
 1.23 18-Jan-2021  thorpej Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.
 1.22 15-Jan-2021  jmcneill use fdtbus_intr_establish_xname
 1.21 15-Oct-2020  jmcneill branches: 1.21.2;
Initialise xhci_softc sc_ios
 1.20 29-Aug-2020  jakllsch tegra_xusb: fix xusb static firmware build

To work around objcopy and ld now being unable to create a EABI5 object
from a binary, use the assembler directive .incbin in inline assembly
to pull in the firmware blob.

This also probably makes TEGRA210_XUSB_BIN_STATIC actually work.
 1.19 13-Oct-2019  skrll Restore %# for PRIxBUSADDR
 1.18 13-Oct-2019  skrll Use PRIxBUSADDR
 1.17 08-Jan-2019  jakllsch Make TEGRA124_XUSB_BIN_STATIC and TEGRA210_XUSB_BIN_STATIC compile again.
 1.16 14-Dec-2018  skrll Provide TEGRA210 supplies.
 1.15 16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.14 01-Jul-2018  jmcneill Build fix
 1.13 29-Jun-2018  msaitoh Detect USB 3.1.
 1.12 26-Sep-2017  jmcneill branches: 1.12.2; 1.12.4; 1.12.6;
More PCIe / XUSBPAD initialization goo for Tegra210.
 1.11 25-Sep-2017  jmcneill USB works on Tegra X1 now.
 1.10 24-Sep-2017  jmcneill Enable XUSB power rails at attach
 1.9 22-Sep-2017  jmcneill Enable regulators at attach
 1.8 21-Sep-2017  jmcneill Enable xusb on tegra210
 1.7 19-Sep-2017  jmcneill The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.6 28-Apr-2017  jmcneill branches: 1.6.2;
Hide the debug output unless either TEGRA_XUSB_DEBUG is defined or
tegra_xusb_debug is set to 1.
 1.5 16-Apr-2017  jmcneill branches: 1.5.2;
Add support for multiple clock domains in clk API.
 1.4 14-Apr-2017  jmcneill Only route USB ports to XHCI controller after the firmware is loaded
successfully. This gives us working USB (via USB2 controllers) until the
tegra-firmware package is installed.
 1.3 27-Feb-2017  skrll Attach the usb2 bus - missed in merge from nick-nhusb
 1.2 03-Jan-2017  skrll branches: 1.2.2;
Do some more error checking.

PR/51551
 1.1 26-Sep-2016  jakllsch branches: 1.1.2; 1.1.4;
Add xhci(4) attachment glue and firmware handler for Tegra K1 "XUSB"
xHCI controller. Adjustments to tegraxusbpad(4) will be needed
to connect the controller to actual USB ports.
 1.1.4.5 26-Apr-2017  pgoyette Sync with HEAD
 1.1.4.4 20-Mar-2017  pgoyette Sync with HEAD
 1.1.4.3 07-Jan-2017  pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
 1.1.4.2 04-Nov-2016  pgoyette Sync with HEAD
 1.1.4.1 26-Sep-2016  pgoyette file tegra_xusb.c was added on branch pgoyette-localcount on 2016-11-04 14:48:58 +0000
 1.1.2.5 28-Aug-2017  skrll Sync with HEAD
 1.1.2.4 05-Feb-2017  skrll Sync with HEAD
 1.1.2.3 02-Jan-2017  skrll Parse the extended capabilies to and log each controller port to SS/HS
bus root hub ports.

Create/attach the two buses and adapt the xhci_roothub_ctrl to deal with
both buses and sets of roothub ports.

XXX the roothub ub_devices entry needs work to interact with usbdevs(1)
XXX correctly
 1.1.2.2 05-Oct-2016  skrll Sync with HEAD
 1.1.2.1 26-Sep-2016  skrll file tegra_xusb.c was added on branch nick-nhusb on 2016-10-05 20:55:25 +0000
 1.2.2.1 21-Apr-2017  bouyer Sync with HEAD
 1.5.2.1 02-May-2017  pgoyette Sync with HEAD - tag prg-localcount2-base1
 1.6.2.1 16-Nov-2019  martin Pull up the following revisions, requested by msaitoh in ticket #1443:

sys/arch/arm/nvidia/tegra_xusb.c 1.13-1.14 via patch
sys/dev/pci/xhci_pci.c 1.13
sys/dev/usb/usb.c 1.169
sys/dev/usb/usbdivar.h 1.116
sys/dev/usb/xhci.c 1.93, 1.95, 1.97
sys/dev/usb/xhcireg.h 1.11-1.12

Detect USB 3.1
 1.12.6.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.12.6.1 10-Jun-2019  christos Sync with HEAD
 1.12.4.3 18-Jan-2019  pgoyette Synch with HEAD
 1.12.4.2 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.12.4.1 28-Jul-2018  pgoyette Sync with HEAD
 1.12.2.2 03-Dec-2017  jdolecek update from HEAD
 1.12.2.1 26-Sep-2017  jdolecek file tegra_xusb.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.21.2.1 03-Apr-2021  thorpej Sync with HEAD.
 1.26.2.1 21-Mar-2021  thorpej Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
 1.27.8.1 04-Aug-2021  thorpej Adapt to CFARGS().
 1.6 19-Sep-2017  jmcneill branches: 1.6.2;
The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.5 14-Apr-2017  jmcneill Only route USB ports to XHCI controller after the firmware is loaded
successfully. This gives us working USB (via USB2 controllers) until the
tegra-firmware package is installed.
 1.4 11-Apr-2017  jmcneill Hide debug messages with TEGRA_XUSBPAD_DEBUG
 1.3 21-Jan-2017  skrll Pull across from nick-nhusb. This really should be fixed to use the
appropriate FDT info. At this point this is more likely to get fixed in
HEAD than on the branch.
 1.2 13-Dec-2015  jmcneill branches: 1.2.2; 1.2.4;
Use fdt for device enumeration.
 1.1 15-May-2015  jmcneill branches: 1.1.2;
Tegra XUSB PADCTL driver
 1.1.2.5 28-Aug-2017  skrll Sync with HEAD
 1.1.2.4 01-Nov-2016  jakllsch Tegra K1 XUSB pad setup for Jetson TK1.
Needs generalization and further cleanup.
 1.1.2.3 27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 15-May-2015  skrll file tegra_xusbpad.c was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.2.4.1 21-Apr-2017  bouyer Sync with HEAD
 1.2.2.2 26-Apr-2017  pgoyette Sync with HEAD
 1.2.2.1 20-Mar-2017  pgoyette Sync with HEAD
 1.6.2.2 03-Dec-2017  jdolecek update from HEAD
 1.6.2.1 19-Sep-2017  jdolecek file tegra_xusbpad.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1 19-Sep-2017  jmcneill branches: 1.1.2;
The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.1.2.2 03-Dec-2017  jdolecek update from HEAD
 1.1.2.1 19-Sep-2017  jdolecek file tegra_xusbpad.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.3 19-Sep-2017  jmcneill The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.
 1.2 26-Sep-2016  jakllsch Add register definitions that will be necessary for future
tegraxusbpadctl(4) changes.
 1.1 15-May-2015  jmcneill branches: 1.1.2; 1.1.4;
Tegra XUSB PADCTL driver
 1.1.4.1 04-Nov-2016  pgoyette Sync with HEAD
 1.1.2.3 05-Oct-2016  skrll Sync with HEAD
 1.1.2.2 06-Jun-2015  skrll Sync with HEAD
 1.1.2.1 15-May-2015  skrll file tegra_xusbpadreg.h was added on branch nick-nhusb on 2015-06-06 14:39:56 +0000
 1.1 26-Sep-2016  jakllsch branches: 1.1.2; 1.1.4; 1.1.18;
Add xhci(4) attachment glue and firmware handler for Tegra K1 "XUSB"
xHCI controller. Adjustments to tegraxusbpad(4) will be needed
to connect the controller to actual USB ports.
 1.1.18.2 03-Dec-2017  jdolecek update from HEAD
 1.1.18.1 26-Sep-2016  jdolecek file tegra_xusbreg.h was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.1.4.2 04-Nov-2016  pgoyette Sync with HEAD
 1.1.4.1 26-Sep-2016  pgoyette file tegra_xusbreg.h was added on branch pgoyette-localcount on 2016-11-04 14:48:58 +0000
 1.1.2.2 05-Oct-2016  skrll Sync with HEAD
 1.1.2.1 26-Sep-2016  skrll file tegra_xusbreg.h was added on branch nick-nhusb on 2016-10-05 20:55:25 +0000

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