| History log of /src/sys/arch/arm/rockchip |
| Revision | Date | Author | Comments |
| 1.31 | 06-Sep-2025 |
thorpej | Step towards modularizing the Flattened Device Tree code.
Define attributes for each of the specific device bindings: clock,
dai, dma, gpio, i2c, iommu, mbox, mmc_pwrseq, phy, power, power domain,
pwm, regulator, reset controller, spi, system controller, pin
controller. Include these support files only if either a provider
or consumer with one of these attributes is present in the kernel
config.
Add the necessary attributes to the device / attach declarations for
each provider and consumer.
There are some bindings that are consumed by generic code (iommu, pinctrl,
power, power domain). Provide weak stubs for these routines to handle
situations where there is no provider.
No actual code changed; NFCI.
|
| 1.30 | 03-Jun-2025 |
rjs | Add driver for Rockchip USB-C PHY, mostly from OpenBSD.
Only implements USB3 for now, not DP.
|
| 1.29 | 19-Nov-2022 |
yamt | branches: 1.29.8;
arm/rockchip: fix build w/o MULTIPROCESSOR
|
| 1.28 | 23-Aug-2022 |
ryo | add eqos(4) for RK3588
|
| 1.27 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.26 | 20-Jul-2022 |
riastradh | drm: Use CPPFLAGS.drmkms in all local drm drivers too.
This way we don't pollute the NetBSD kernel namespace with all the
Linux compat shim definitions needed to build drm, except for the
local drm drivers that need the API.
|
| 1.25 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.24 | 17-May-2020 |
riastradh | Rockchip crypto engine RNG driver.
As found on the rk3288 and rk3399. This driver only supports the
TRNG, not the rest of the crypto engine, although it uses the AES unit
to do a self-test at attach time to verify that the engine works.
There seem to be two versions of the Rockchip crypto engine, v1 and
v2; this one is for v1. Can't name a driver `rkcryptov1' so we'll
clumsily call it `rkv1crypto' instead to leave room for `rkv2crypto'
later on.
The crypto binding derived from the Rockchip BSP Linux kernel, in the
location it appears on the rk3399, is in rk3399-crypto.dtsi, since
there doesn't seem to be a better place to put it at the moment among
this twisty maze of inclusions, all different.
|
| 1.23 | 19-Dec-2019 |
jakllsch | add Rockchip (RK3399) glue for Analogix DisplayPort core
|
| 1.22 | 16-Nov-2019 |
jmcneill | Add driver for Rockchip I2S/PCM controller.
|
| 1.21 | 09-Nov-2019 |
jmcneill | WIP display driver for Rockchip RK3399
|
| 1.20 | 05-Aug-2019 |
tnn | rk_spi: Rockchip SPI driver
Match only on RK3399 for now, but should work on RK3328 as well with
the proper CRU support. If you can, please test and enable for RK3328.
|
| 1.19 | 01-May-2019 |
jmcneill | branches: 1.19.2;
Add support for RK3399 PWM controller.
|
| 1.18 | 26-Apr-2019 |
mrg | implement TSADC driver for rockchip RK3328 and RK3399. so far, only
tested on RK3399 but the RK3328 looks mostly the same and has a good
chance of working too.
add clock entries for "clk_tsadc" and "pclk_tsadc" to cru.
exports "CPU" and "GPU" temp sensors. these currently limited to 5
degC resolution but can be reduced to sub 1 degC resolution with some
interpolation.
todo list:
- handle setting various temp values
- add interpolation between the 5degC intervals in sample data
- handle DT trips/temp value defaults
- interrupts aren't triggered (test by lowering warn/crit values),
and once they work, make the interrupt do something
- test on RK3328, and port to other rockchips (will require moving
some part into per-chipset sections, such as code<->temp tables)
thanks to jmcneill for help.
|
| 1.17 | 10-Mar-2019 |
jmcneill | Add support for Rockchip eMMC PHY
|
| 1.16 | 07-Mar-2019 |
jakllsch | Add RK3399 PCIe host bridge support.
Not enabled yet due to occasional hangs during boot, and needing
__BUS_SPACE_HAS_PROBING_METHODS enabled.
Uses slightly non-standard DT bindings to avoid suboptimality of the
Linux binding. This allows for much more flexibility and efficency
in allotment of the limited apertures into PCI spaces.
|
| 1.15 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.14 | 01-Jul-2018 |
jmcneill | Add driver for Rockchip I2C controller.
|
| 1.13 | 16-Jun-2018 |
jmcneill | branches: 1.13.2;
Add initial support for Rockchip RK3328 SoC.
|
| 1.12 | 08-Feb-2018 |
jmcneill | branches: 1.12.2;
Move Rockchip port to the attic. It is not very useful.
|
| 1.11 | 29-Mar-2015 |
jmcneill | branches: 1.11.2; 1.11.18;
Use shared armv7_generic_space
|
| 1.10 | 17-Jan-2015 |
jmcneill | Add Rockchip PX2 support, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.9 | 04-Jan-2015 |
jmcneill | Add Rockchip ethernet driver, untested.
|
| 1.8 | 03-Jan-2015 |
jmcneill | attach devices marked "crit 1" first
|
| 1.7 | 02-Jan-2015 |
jmcneill | Add driver for RK3188 64-bit timer.
|
| 1.6 | 02-Jan-2015 |
jmcneill | Add RK3188/RK3188+ CPU frequency setting support.
|
| 1.5 | 30-Dec-2014 |
jmcneill | Actually set slave addr / reg. Wait for start irq after sending start before
transferring data. Add RKIIC_DEBUG kernel option.
|
| 1.4 | 30-Dec-2014 |
jmcneill | add I2C driver
|
| 1.3 | 27-Dec-2014 |
jmcneill | More clock fixes, debugging.
|
| 1.2 | 26-Dec-2014 |
jmcneill | Map all of core0 and core1 space and let drivers use bus_space_subregion
instead of bus_space_map. Fill in rockchip_reset.
|
| 1.1 | 26-Dec-2014 |
jmcneill | Initial support for Rockchip RK3066 / RK3188 SoCs, from Hiroshi Tokuda
<tokuda@tokuda.net> on port-arm:
http://mail-index.netbsd.org/port-arm/2014/10/09/msg002651.html
|
| 1.11.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.11.18.1 | 29-Mar-2015 |
jdolecek | file files.rockchip was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.11.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.11.2.1 | 29-Mar-2015 |
skrll | file files.rockchip was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.12.2.3 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.12.2.2 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.12.2.1 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.13.2.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.13.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.19.2.4 | 18-May-2020 |
martin | Pull up following revision(s) (requested by riastradh in ticket #913):
sys/arch/arm/dts/rk3399-crypto.dtsi: revision 1.1
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.1
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.2 (plus patch)
sys/arch/arm/rockchip/rk_v1crypto.h: revision 1.1
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.3
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.20
sys/arch/evbarm/conf/GENERIC64: revision 1.158
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.11
sys/arch/arm/rockchip/files.rockchip: revision 1.24
Rockchip crypto engine RNG driver.
As found on the rk3288 and rk3399. This driver only supports the
TRNG, not the rest of the crypto engine, although it uses the AES unit
to do a self-test at attach time to verify that the engine works.
There seem to be two versions of the Rockchip crypto engine, v1 and
v2; this one is for v1. Can't name a driver `rkcryptov1' so we'll
clumsily call it `rkv1crypto' instead to leave room for `rkv2crypto'
later on.
The crypto binding derived from the Rockchip BSP Linux kernel, in the
location it appears on the rk3399, is in rk3399-crypto.dtsi, since
there doesn't seem to be a better place to put it at the moment among
this twisty maze of inclusions, all different.
Use rnd_add_data_sync from the callback.
(Doesn't make a difference in HEAD but this is the stated API
contract and it matters if we want to pull this up.)
Prime the pool on attach.
|
| 1.19.2.3 | 21-Jan-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #616):
sys/dev/ic/anx_dp.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.126
sys/dev/ic/anx_dp.h: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.128
sys/dev/ic/anx_dp.h: revision 1.2
sys/dev/fdt/dwcmmc_fdt.c: revision 1.9
sys/dev/i2c/cwfg.c: revision 1.1
sys/conf/files: revision 1.1247
sys/dev/fdt/pwm_backlight.c: revision 1.5
sys/dev/fdt/pwm_backlight.c: revision 1.6
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.14
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.15
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.16
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.17
sys/dev/ic/dwc_mmc.c: revision 1.20
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.18
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.19
sys/dev/usb/usbdevs: revision 1.775
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.4
sys/dev/fdt/simple_amplifier.c: revision 1.1
sys/dev/i2c/files.i2c: revision 1.105
sys/arch/evbarm/conf/GENERIC64: revision 1.117
sys/arch/evbarm/conf/GENERIC64: revision 1.118
sys/dev/i2c/files.i2c: revision 1.107
sys/dev/fdt/files.fdt: revision 1.49
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.1
sys/dev/ic/dwc_mmc_var.h: revision 1.9
sys/dev/i2c/rkpmic.c: revision 1.4
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.2
sys/dev/i2c/rkpmic.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.6
sys/arch/arm/rockchip/rk_vop.c: revision 1.4
sys/arch/arm/rockchip/rk_vop.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.8
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.1
sys/dev/usb/ums.c: revision 1.96 (via patch)
sys/arch/arm/rockchip/rk_pwm.c: revision 1.3
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.2
sys/dev/i2c/es8316ac.c: revision 1.1
sys/dev/fdt/dwcmmc_fdt.c: revision 1.10
sys/dev/i2c/es8316ac.c: revision 1.2
sys/dev/fdt/fdt_panel.c: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.18
sys/dev/fdt/fdt_panel.c: revision 1.2
sys/dev/ic/dwc_mmc.c: revision 1.19
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.5
sys/dev/ic/dwc_mmc_var.h: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.6
sys/arch/evbarm/conf/GENERIC64: revision 1.122
sys/dev/ic/dwc_mmc_var.h: revision 1.11
sys/dev/fdt/files.fdt: revision 1.50
sys/arch/evbarm/conf/GENERIC64: revision 1.123
sys/arch/arm/rockchip/rk_i2s.c: revision 1.2
sys/arch/arm/rockchip/files.rockchip: revision 1.23
sys/arch/evbarm/conf/GENERIC64: revision 1.124
sys/dev/ic/anx_dp.c: revision 1.1
rkpmic: add RTC support; register w/ todr(9)
rkpmic: correct delay
Add support for SDIO interrupts.
fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
add RK3399 eDP clocks
add RK3399 DisplayPort clocks
style fix/KNF
rk3399_cru: implement dclk_vop0_frac and dclk_vop1_frac
Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
rkvop: set stride using virtual framebuffer width instead of display mode
rk3399_cru: Reparent dclk_vop[01] to gpll via dclk_vop[01]_frac.
The previous source of dclk_vop[01] was vpll via dclk_vop[01]_div.
vpll is apparently used directly as a pixel clock source for the
HDMI PHY, and we don't want the other VOP's dclk changing out from
under it because we can't handle finding a replacement clock source
with the right rate yet.
gpll happens to run at 594MHz, which works well as a basis for pixel
clocks.
Linux suggests that the source clock of the fractional divider needs
to be more than twenty times greater than the resulting clock (or some
intermediate clock?) for output stability. This may not be the case
with 594MHz and the common pixel clocks I see used by displays in my
area of the wild, but it works for now.
add Analogix DisplayPort core driver
add Rockchip (RK3399) glue for Analogix DisplayPort core
add anxdp(4)
Add another panel@fdt driver, this time for DRM-style panels.
To do: migrate away from other panel driver.
enable panel at fdt drivers
paper over the rkpwm get_conf function that otherwise doesn't seem to
let things work
add template bits for optional eDP panel on RockPro64
Abort panel driver attach if required regulator is missing.
Add clk provider
Add Pinebook Pro dts, from Manjaro Linux.
https://gitlab.manjaro.org/tsys/linux-pinebook-pro/blob/877ca0e7283596f37845de50dc36bff5b88b91e1/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+ rk3399-pinebook-pro.dts
Attach mmcpwrseq resource earlier
dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs
Fix performance regression with previous
Quiet chatty printfs
No need to print all supported levels at attach, print the range and total number of steps
Disable SPI for now (rkspi driver hangs at boot)
Add driver for simple-audio-amplifier binding
Add driver for Everest Semi ES8316 Low Power Audio CODEC
add es8316, simpleamp
Avoid sleeping while the audio intr lock is held.
If the rockchip,system-power-controller property is present, try to power off with the PMIC
Add HAILUCK keyboard (product 1e)
Add a quirk for the HAILUCK USB keyboard / touchpad device with product 1e.
The keyboard does not function properly unless the touchpad's intr endpoint
is active.
Add driver for CellWise CW2015 Fuel Gauge IC.
add cwfg
Emit PMFE_DISPLAY_{ON,OFF} events in response to DPMS requests.
If the backlight node does not have an enable gpio, set the lowest duty
cycle to turn the display off instead.
Attach psci as early as possible. This allows other power controllers to
register their own poweroff / reset callbacks with a higher preference.
Add 2000 MHz to available armclkb rates
Remove debug printfs
|
| 1.19.2.2 | 20-Nov-2019 |
martin | Pull up following revision(s) (requested by tnn in ticket #458):
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.9
sys/arch/arm/rockchip/rk_spi.c: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.104
sys/arch/arm/rockchip/files.rockchip: revision 1.20
rk3399_cru: add definitions for SPI clocks
rk_spi: Rockchip SPI driver
Match only on RK3399 for now, but should work on RK3328 as well with
the proper CRU support. If you can, please test and enable for RK3328.
rkspi* at fdt?
|
| 1.19.2.1 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.29.8.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.20 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.19 | 02-Apr-2015 |
jmcneill | branches: 1.19.2; 1.19.18;
print chip name
|
| 1.18 | 29-Mar-2015 |
jmcneill | Use shared armv7_generic_space
|
| 1.17 | 17-Jan-2015 |
jmcneill | Add Rockchip PX2 support, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.16 | 13-Jan-2015 |
jmcneill | From FUKAUMI Naoki <naobsd@gmail.com>:
sdmmc0 is unstable at 48MHz with default 4mA on some boards.
12mA is stable, it's used in Rockchip Linux 3.0 kernel too.
|
| 1.15 | 05-Jan-2015 |
jmcneill | add GRF bus space handle to obio_attach_args, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.14 | 04-Jan-2015 |
jmcneill | enable USB ethernet on Minix Neo X7
|
| 1.13 | 04-Jan-2015 |
jmcneill | print dpll, update phy init
|
| 1.12 | 04-Jan-2015 |
jmcneill | RK3188 iomux/gpio setup for emac
|
| 1.11 | 03-Jan-2015 |
jmcneill | attach devices marked "crit 1" first
|
| 1.10 | 02-Jan-2015 |
jmcneill | back out r1.8, its fine (and preferred) to write value before direction reg
|
| 1.9 | 02-Jan-2015 |
jmcneill | Add RK3188/RK3188+ CPU frequency setting support.
|
| 1.8 | 01-Jan-2015 |
jmcneill | obio_init_gpio: set pin direction to output before writing data
|
| 1.7 | 01-Jan-2015 |
jmcneill | IT66121 HDMI transmitter GPIO setup
|
| 1.6 | 01-Jan-2015 |
jmcneill | RK3188 I2C iomux init
|
| 1.5 | 30-Dec-2014 |
jmcneill | add I2C driver
|
| 1.4 | 30-Dec-2014 |
jmcneill | MMC0/VBUS GPIO changes for Radxa Rock, from FUKAUMI Naoki <fun@naobsd.org>.
XXX Need to find a way to handle board-specific configurations.
|
| 1.3 | 27-Dec-2014 |
jmcneill | More clock fixes, debugging.
|
| 1.2 | 26-Dec-2014 |
jmcneill | Map all of core0 and core1 space and let drivers use bus_space_subregion
instead of bus_space_map. Fill in rockchip_reset.
|
| 1.1 | 26-Dec-2014 |
jmcneill | Initial support for Rockchip RK3066 / RK3188 SoCs, from Hiroshi Tokuda
<tokuda@tokuda.net> on port-arm:
http://mail-index.netbsd.org/port-arm/2014/10/09/msg002651.html
|
| 1.19.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.19.18.1 | 02-Apr-2015 |
jdolecek | file obio.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.19.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.19.2.1 | 02-Apr-2015 |
skrll | file obio.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.4 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.3 | 28-Mar-2015 |
jmcneill | branches: 1.3.2; 1.3.18;
IST_EDGE -> IST_LEVEL
|
| 1.2 | 26-Dec-2014 |
jmcneill | Map all of core0 and core1 space and let drivers use bus_space_subregion
instead of bus_space_map. Fill in rockchip_reset.
|
| 1.1 | 26-Dec-2014 |
jmcneill | Initial support for Rockchip RK3066 / RK3188 SoCs, from Hiroshi Tokuda
<tokuda@tokuda.net> on port-arm:
http://mail-index.netbsd.org/port-arm/2014/10/09/msg002651.html
|
| 1.3.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.18.1 | 28-Mar-2015 |
jdolecek | file obio_com.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.3.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 28-Mar-2015 |
skrll | file obio_com.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.2 | 13-Nov-2021 |
jmcneill | Write back and invalidate cache before starting secondary CPUs.
|
| 1.1 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.5 | 13-Nov-2021 |
jmcneill | Add support for RK3288 temperature sensors.
|
| 1.4 | 13-Nov-2021 |
jmcneill | Add pwm and spi clocks
|
| 1.3 | 13-Nov-2021 |
jmcneill | Fix width of aclk_cpu_pre divider field
|
| 1.2 | 13-Nov-2021 |
jmcneill | rk3288: add watchdog and rng clocks
|
| 1.1 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.1 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.2 | 12-Nov-2021 |
jmcneill | Fix register accesses to PMU registers. Unlike the GRF ones, a RMW cycle
is required to update settings here.
|
| 1.1 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.1 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.1 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.10 | 24-Apr-2023 |
mrg | enable rkv1crypto on rock64.
this comes from upstream d1152bc533c941f7e267bf53d344cee510ea2808.
(i tried to make this be in rk3328.dtsi so all rk3328 boards would
benefit, but it doesn't work, and this is the only one have to test.)
adjust rkv1crypto to support a per-platform clocks setup.
|
| 1.9 | 12-Nov-2021 |
jmcneill | branches: 1.9.4;
arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.8 | 15-May-2021 |
mrg | add SPI support to rk3328, tested on rock64.
simply adding the SPI clocks (and pwm while here) and enabling
the config match was sufficient, though my first rock64 seems
to have a deal SPI now (does not probe in u-boot or netbsd.)
|
| 1.7 | 27-Jan-2021 |
thorpej | branches: 1.7.4; 1.7.6;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.6 | 31-Dec-2020 |
mrg | begin to make rock64 audio work.
- set status for "analog_sound" to enabled.
- add clocks for the i2s and spdif nodes.
- match "rockchip,rk3066-i2s", "rockchip,rk3188-i2s",
and "rockchip,rk3288-i2s".
this gets i2s and ausoc to attach, but no audio(4) yet.
to complete this probably also needs a codec driver (appears
to be rk3328 specific, unlike eg pinebookpro's es8316), and
support for "audio-graph-card" type sound cards.
|
| 1.5 | 15-May-2019 |
mrg | branches: 1.5.10;
support RK3328 tsadc:
- add clk_24m, clk_tsadc and pclk_tsadc rk3328 clocks
- rk3328 data<->temp conversion table is is wrong. the actual values
seen are 4096 - <expected>, and the linux driver has these values
in the inverted value directly
- the above means the rk3328 is increasing data for increasing temp,
and the min/max values are also inverted and swapped
- move auto-period into the rk_data
- rk3328 only has one sensor, deal with this
- rename rk_data_table as rk_data, and also s/rdt/rd/
thanks to jmcneill who helped clean up clocks confusion, and pointed
out the linux driver values matched my own inverted data experience.
|
| 1.4 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.3 | 01-Jul-2018 |
jmcneill | Add i2c clocks.
|
| 1.2 | 16-Jun-2018 |
jmcneill | branches: 1.2.2; 1.2.4;
Replace register numbers with defines, fixing a bunch of typos in the process.
|
| 1.1 | 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.2.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2.2.4 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.2.2.3 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.1 | 16-Jun-2018 |
pgoyette | file rk3328_cru.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.5.10.2 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.5.10.1 | 03-Jan-2021 |
thorpej | Sync w/ HEAD.
|
| 1.7.6.1 | 31-May-2021 |
cjep | sync with head
|
| 1.7.4.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.9.4.1 | 02-May-2023 |
martin | Pull up following revision(s) (requested by mrg in ticket #154):
sys/arch/arm/dts/rk3328-crypto.dtsi: revision 1.1
sys/arch/arm/dts/rk3328-rock64.dts: revision 1.8
sys/arch/arm/rockchip/rk3328_cru.c: revision 1.10
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.11
enable rkv1crypto on rock64.
this comes from upstream d1152bc533c941f7e267bf53d344cee510ea2808.
(i tried to make this be in rk3328.dtsi so all rk3328 boards would
benefit, but it doesn't work, and this is the only one have to test.)
adjust rkv1crypto to support a per-platform clocks setup.
|
| 1.2 | 31-Dec-2020 |
jmcneill | Fix definition of RK3328_HCLK_I2S1_8CH
|
| 1.1 | 16-Jun-2018 |
jmcneill | branches: 1.1.2; 1.1.16;
Add initial support for Rockchip RK3328 SoC.
|
| 1.1.16.1 | 03-Jan-2021 |
thorpej | Sync w/ HEAD.
|
| 1.1.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.1.2.1 | 16-Jun-2018 |
pgoyette | file rk3328_cru.h was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.8 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.7 | 24-Apr-2021 |
thorpej | branches: 1.7.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.6 | 27-Jan-2021 |
thorpej | branches: 1.6.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.5 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.4 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.3 | 01-Oct-2019 |
jmcneill | branches: 1.3.8;
Add support for devices with separate "init" and "default" pinctrl states.
|
| 1.2 | 23-Jan-2019 |
thorpej | branches: 1.2.4; 1.2.6;
Implement subroutines for parsing out some of the generic properties
specified in the pinctrl bindings, and adapt Meson, Rockchip, and
Allwinner pinctrl back-ends to use them.
Ok jmcneill@
|
| 1.1 | 12-Aug-2018 |
jmcneill | branches: 1.1.2;
Add support for Rockchip RK3399 SoC.
|
| 1.1.2.3 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.1.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.1.2.1 | 12-Aug-2018 |
pgoyette | file rk3328_iomux.c was added on branch pgoyette-compat on 2018-09-06 06:55:27 +0000
|
| 1.2.6.1 | 03-Oct-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #276):
sys/arch/arm/samsung/exynos_pinctrl.c: revision 1.14
sys/arch/arm/rockchip/rk3399_iomux.c: revision 1.6
sys/dev/fdt/fdtvar.h: revision 1.54
sys/arch/arm/broadcom/bcm2835_gpio.c: revision 1.14
sys/dev/i2c/axppmic.c: revision 1.26
sys/arch/arm/nvidia/tegra_pinmux.c: revision 1.4
sys/arch/arm/rockchip/rk3328_iomux.c: revision 1.3
sys/dev/fdt/fdt_pinctrl.c: revision 1.10
sys/arch/arm/amlogic/meson_pinctrl.c: revision 1.6
sys/dev/fdt/fdtbus.c: revision 1.30
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.27
Add support for devices with separate "init" and "default" pinctrl states.
|
| 1.2.4.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.2.4.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2.4.1 | 23-Jan-2019 |
christos | file rk3328_iomux.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.3.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.6.2.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.7.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 16-Jun-2018 |
jmcneill | branches: 1.1.2;
Add initial support for Rockchip RK3328 SoC.
|
| 1.1.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.1.2.1 | 16-Jun-2018 |
pgoyette | file rk3328_platform.h was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.27 | 03-Jun-2025 |
rjs | Add GPU clocks.
|
| 1.26 | 03-Jun-2025 |
rjs | Add driver for Rockchip USB-C PHY, mostly from OpenBSD.
Only implements USB3 for now, not DP.
|
| 1.25 | 23-Aug-2022 |
ryo | branches: 1.25.10;
- change struct rk_cru_arm and RK_CPU macros to allow mux and div registers to be specified independently.
Allow more div-regs to be specified in the future.
- commonize RK*_PLL() macro.
|
| 1.24 | 23-Aug-2022 |
ryo | Make .reg1 and .reg2 of struct rk_cru_cpu_rate into array, and change the type of those to bus_size_t and uint32_t.
Array size may increase in the future.
|
| 1.23 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.22 | 20-May-2021 |
msaitoh | Fix signed integer overflow found by kUBSan. OK'd by jmcneill.
The output was:
UBSan: Undefined Behavior in ../../../../arch/arm/rockchip/rk3399_cru.c:
284:13, signed integer overflow: 594000000 - -2086967296 cannot be
represented in type 'int'
|
| 1.21 | 27-Jan-2021 |
thorpej | branches: 1.21.4; 1.21.6;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.20 | 17-May-2020 |
riastradh | branches: 1.20.2;
Rockchip crypto engine RNG driver.
As found on the rk3288 and rk3399. This driver only supports the
TRNG, not the rest of the crypto engine, although it uses the AES unit
to do a self-test at attach time to verify that the engine works.
There seem to be two versions of the Rockchip crypto engine, v1 and
v2; this one is for v1. Can't name a driver `rkcryptov1' so we'll
clumsily call it `rkv1crypto' instead to leave room for `rkv2crypto'
later on.
The crypto binding derived from the Rockchip BSP Linux kernel, in the
location it appears on the rk3399, is in rk3399-crypto.dtsi, since
there doesn't seem to be a better place to put it at the moment among
this twisty maze of inclusions, all different.
|
| 1.19 | 04-Jan-2020 |
jmcneill | Add 2000 MHz to available armclkb rates
|
| 1.18 | 18-Dec-2019 |
jakllsch | rk3399_cru: Reparent dclk_vop[01] to gpll via dclk_vop[01]_frac.
The previous source of dclk_vop[01] was vpll via dclk_vop[01]_div.
vpll is apparently used directly as a pixel clock source for the
HDMI PHY, and we don't want the other VOP's dclk changing out from
under it because we can't handle finding a replacement clock source
with the right rate yet.
gpll happens to run at 594MHz, which works well as a basis for pixel
clocks.
Linux suggests that the source clock of the fractional divider needs
to be more than twenty times greater than the resulting clock (or some
intermediate clock?) for output stability. This may not be the case
with 594MHz and the common pixel clocks I see used by displays in my
area of the wild, but it works for now.
|
| 1.17 | 17-Dec-2019 |
jakllsch | rk3399_cru: implement dclk_vop0_frac and dclk_vop1_frac
|
| 1.16 | 29-Nov-2019 |
jakllsch | add RK3399 DisplayPort clocks
|
| 1.15 | 29-Nov-2019 |
jakllsch | add RK3399 eDP clocks
|
| 1.14 | 29-Nov-2019 |
jakllsch | fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
|
| 1.13 | 16-Nov-2019 |
jmcneill | Add support for I2S clocks.
|
| 1.12 | 10-Nov-2019 |
jmcneill | Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
|
| 1.11 | 09-Nov-2019 |
jmcneill | Add HDMI and VOP clocks
|
| 1.10 | 19-Oct-2019 |
tnn | rk3399: add definition for the watchdog timer clock gate
The watchdog timer clock gate is a bit special because it's a secure
gate that can only be accessed from EL3. We still need a dummy gate
definition for it so that dwcwdt(4) can infer the frequency via the
parent clock. The gate is enabled by default by U-Boot.
|
| 1.9 | 04-Aug-2019 |
tnn | rk3399_cru: add definitions for SPI clocks
|
| 1.8 | 09-Jun-2019 |
jmcneill | branches: 1.8.2; 1.8.4;
Init bpll in a way that brings the big cluster's PLL out of "slow mode".
While here, fix a few typos in the cpul's rate table.
|
| 1.7 | 26-Apr-2019 |
mrg | implement TSADC driver for rockchip RK3328 and RK3399. so far, only
tested on RK3399 but the RK3328 looks mostly the same and has a good
chance of working too.
add clock entries for "clk_tsadc" and "pclk_tsadc" to cru.
exports "CPU" and "GPU" temp sensors. these currently limited to 5
degC resolution but can be reduced to sub 1 degC resolution with some
interpolation.
todo list:
- handle setting various temp values
- add interpolation between the 5degC intervals in sample data
- handle DT trips/temp value defaults
- interrupts aren't triggered (test by lowering warn/crit values),
and once they work, make the interrupt do something
- test on RK3328, and port to other rockchips (will require moving
some part into per-chipset sections, such as code<->temp tables)
thanks to jmcneill for help.
|
| 1.6 | 13-Mar-2019 |
jmcneill | Fix aclk_emmc register offset, set RK_COMPOSITE_ROUND_DOWN for SD/EMMC clocks, and add a few more emmc clock nodes
|
| 1.5 | 10-Mar-2019 |
jmcneill | Add eMMC clocks
|
| 1.4 | 11-Nov-2018 |
jakllsch | Add clock information for RK3399 PCIe
|
| 1.3 | 01-Sep-2018 |
jmcneill | branches: 1.3.2;
Add support for RK3399 CPU clocks.
|
| 1.2 | 12-Aug-2018 |
jmcneill | Add I2C clocks
|
| 1.1 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.3.2.3 | 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
| 1.3.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.3.2.1 | 01-Sep-2018 |
pgoyette | file rk3399_cru.c was added on branch pgoyette-compat on 2018-09-06 06:55:27 +0000
|
| 1.8.4.4 | 18-May-2020 |
martin | Pull up following revision(s) (requested by riastradh in ticket #913):
sys/arch/arm/dts/rk3399-crypto.dtsi: revision 1.1
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.1
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.2 (plus patch)
sys/arch/arm/rockchip/rk_v1crypto.h: revision 1.1
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.3
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.20
sys/arch/evbarm/conf/GENERIC64: revision 1.158
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.11
sys/arch/arm/rockchip/files.rockchip: revision 1.24
Rockchip crypto engine RNG driver.
As found on the rk3288 and rk3399. This driver only supports the
TRNG, not the rest of the crypto engine, although it uses the AES unit
to do a self-test at attach time to verify that the engine works.
There seem to be two versions of the Rockchip crypto engine, v1 and
v2; this one is for v1. Can't name a driver `rkcryptov1' so we'll
clumsily call it `rkv1crypto' instead to leave room for `rkv2crypto'
later on.
The crypto binding derived from the Rockchip BSP Linux kernel, in the
location it appears on the rk3399, is in rk3399-crypto.dtsi, since
there doesn't seem to be a better place to put it at the moment among
this twisty maze of inclusions, all different.
Use rnd_add_data_sync from the callback.
(Doesn't make a difference in HEAD but this is the stated API
contract and it matters if we want to pull this up.)
Prime the pool on attach.
|
| 1.8.4.3 | 21-Jan-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #616):
sys/dev/ic/anx_dp.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.126
sys/dev/ic/anx_dp.h: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.128
sys/dev/ic/anx_dp.h: revision 1.2
sys/dev/fdt/dwcmmc_fdt.c: revision 1.9
sys/dev/i2c/cwfg.c: revision 1.1
sys/conf/files: revision 1.1247
sys/dev/fdt/pwm_backlight.c: revision 1.5
sys/dev/fdt/pwm_backlight.c: revision 1.6
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.14
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.15
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.16
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.17
sys/dev/ic/dwc_mmc.c: revision 1.20
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.18
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.19
sys/dev/usb/usbdevs: revision 1.775
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.4
sys/dev/fdt/simple_amplifier.c: revision 1.1
sys/dev/i2c/files.i2c: revision 1.105
sys/arch/evbarm/conf/GENERIC64: revision 1.117
sys/arch/evbarm/conf/GENERIC64: revision 1.118
sys/dev/i2c/files.i2c: revision 1.107
sys/dev/fdt/files.fdt: revision 1.49
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.1
sys/dev/ic/dwc_mmc_var.h: revision 1.9
sys/dev/i2c/rkpmic.c: revision 1.4
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.2
sys/dev/i2c/rkpmic.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.6
sys/arch/arm/rockchip/rk_vop.c: revision 1.4
sys/arch/arm/rockchip/rk_vop.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.8
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.1
sys/dev/usb/ums.c: revision 1.96 (via patch)
sys/arch/arm/rockchip/rk_pwm.c: revision 1.3
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.2
sys/dev/i2c/es8316ac.c: revision 1.1
sys/dev/fdt/dwcmmc_fdt.c: revision 1.10
sys/dev/i2c/es8316ac.c: revision 1.2
sys/dev/fdt/fdt_panel.c: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.18
sys/dev/fdt/fdt_panel.c: revision 1.2
sys/dev/ic/dwc_mmc.c: revision 1.19
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.5
sys/dev/ic/dwc_mmc_var.h: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.6
sys/arch/evbarm/conf/GENERIC64: revision 1.122
sys/dev/ic/dwc_mmc_var.h: revision 1.11
sys/dev/fdt/files.fdt: revision 1.50
sys/arch/evbarm/conf/GENERIC64: revision 1.123
sys/arch/arm/rockchip/rk_i2s.c: revision 1.2
sys/arch/arm/rockchip/files.rockchip: revision 1.23
sys/arch/evbarm/conf/GENERIC64: revision 1.124
sys/dev/ic/anx_dp.c: revision 1.1
rkpmic: add RTC support; register w/ todr(9)
rkpmic: correct delay
Add support for SDIO interrupts.
fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
add RK3399 eDP clocks
add RK3399 DisplayPort clocks
style fix/KNF
rk3399_cru: implement dclk_vop0_frac and dclk_vop1_frac
Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
rkvop: set stride using virtual framebuffer width instead of display mode
rk3399_cru: Reparent dclk_vop[01] to gpll via dclk_vop[01]_frac.
The previous source of dclk_vop[01] was vpll via dclk_vop[01]_div.
vpll is apparently used directly as a pixel clock source for the
HDMI PHY, and we don't want the other VOP's dclk changing out from
under it because we can't handle finding a replacement clock source
with the right rate yet.
gpll happens to run at 594MHz, which works well as a basis for pixel
clocks.
Linux suggests that the source clock of the fractional divider needs
to be more than twenty times greater than the resulting clock (or some
intermediate clock?) for output stability. This may not be the case
with 594MHz and the common pixel clocks I see used by displays in my
area of the wild, but it works for now.
add Analogix DisplayPort core driver
add Rockchip (RK3399) glue for Analogix DisplayPort core
add anxdp(4)
Add another panel@fdt driver, this time for DRM-style panels.
To do: migrate away from other panel driver.
enable panel at fdt drivers
paper over the rkpwm get_conf function that otherwise doesn't seem to
let things work
add template bits for optional eDP panel on RockPro64
Abort panel driver attach if required regulator is missing.
Add clk provider
Add Pinebook Pro dts, from Manjaro Linux.
https://gitlab.manjaro.org/tsys/linux-pinebook-pro/blob/877ca0e7283596f37845de50dc36bff5b88b91e1/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+ rk3399-pinebook-pro.dts
Attach mmcpwrseq resource earlier
dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs
Fix performance regression with previous
Quiet chatty printfs
No need to print all supported levels at attach, print the range and total number of steps
Disable SPI for now (rkspi driver hangs at boot)
Add driver for simple-audio-amplifier binding
Add driver for Everest Semi ES8316 Low Power Audio CODEC
add es8316, simpleamp
Avoid sleeping while the audio intr lock is held.
If the rockchip,system-power-controller property is present, try to power off with the PMIC
Add HAILUCK keyboard (product 1e)
Add a quirk for the HAILUCK USB keyboard / touchpad device with product 1e.
The keyboard does not function properly unless the touchpad's intr endpoint
is active.
Add driver for CellWise CW2015 Fuel Gauge IC.
add cwfg
Emit PMFE_DISPLAY_{ON,OFF} events in response to DPMS requests.
If the backlight node does not have an enable gpio, set the lowest duty
cycle to turn the display off instead.
Attach psci as early as possible. This allows other power controllers to
register their own poweroff / reset callbacks with a higher preference.
Add 2000 MHz to available armclkb rates
Remove debug printfs
|
| 1.8.4.2 | 20-Nov-2019 |
martin | Pull up following revision(s) (requested by tnn in ticket #458):
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.9
sys/arch/arm/rockchip/rk_spi.c: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.104
sys/arch/arm/rockchip/files.rockchip: revision 1.20
rk3399_cru: add definitions for SPI clocks
rk_spi: Rockchip SPI driver
Match only on RK3399 for now, but should work on RK3328 as well with
the proper CRU support. If you can, please test and enable for RK3328.
rkspi* at fdt?
|
| 1.8.4.1 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.8.2.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.8.2.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.8.2.1 | 09-Jun-2019 |
christos | file rk3399_cru.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.20.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.21.6.1 | 31-May-2021 |
cjep | sync with head
|
| 1.21.4.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.25.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.1 | 12-Aug-2018 |
jmcneill | branches: 1.1.2; 1.1.6;
Add support for Rockchip RK3399 SoC.
|
| 1.1.6.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.6.1 | 12-Aug-2018 |
christos | file rk3399_cru.h was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.1.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.1.2.1 | 12-Aug-2018 |
pgoyette | file rk3399_cru.h was added on branch pgoyette-compat on 2018-09-06 06:55:27 +0000
|
| 1.13 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.12 | 13-May-2021 |
msaitoh | branches: 1.12.4;
Use unsigned to avoid undefined behavior in GRF_GPIO_P_{CTL,WRITE_EN}.
Found by kUBSan.
|
| 1.11 | 24-Apr-2021 |
thorpej | branches: 1.11.2; 1.11.4;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.10 | 27-Jan-2021 |
thorpej | branches: 1.10.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.9 | 27-Jan-2021 |
thorpej | Use DEVICE_COMPAT_EOL.
|
| 1.8 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.7 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.6 | 01-Oct-2019 |
jmcneill | branches: 1.6.8;
Add support for devices with separate "init" and "default" pinctrl states.
|
| 1.5 | 20-Aug-2019 |
tnn | rk3399_iomux: add some #ifdef'd out code to enable the on-chip debug port
|
| 1.4 | 30-Apr-2019 |
jmcneill | branches: 1.4.2; 1.4.4;
Fix mux register offset
|
| 1.3 | 30-Apr-2019 |
jmcneill | Pull type value mappings are different for each pin, and not based on the bank number.
|
| 1.2 | 23-Jan-2019 |
thorpej | Implement subroutines for parsing out some of the generic properties
specified in the pinctrl bindings, and adapt Meson, Rockchip, and
Allwinner pinctrl back-ends to use them.
Ok jmcneill@
|
| 1.1 | 12-Aug-2018 |
jmcneill | branches: 1.1.2;
Add support for Rockchip RK3399 SoC.
|
| 1.1.2.3 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.1.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.1.2.1 | 12-Aug-2018 |
pgoyette | file rk3399_iomux.c was added on branch pgoyette-compat on 2018-09-06 06:55:27 +0000
|
| 1.4.4.1 | 03-Oct-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #276):
sys/arch/arm/samsung/exynos_pinctrl.c: revision 1.14
sys/arch/arm/rockchip/rk3399_iomux.c: revision 1.6
sys/dev/fdt/fdtvar.h: revision 1.54
sys/arch/arm/broadcom/bcm2835_gpio.c: revision 1.14
sys/dev/i2c/axppmic.c: revision 1.26
sys/arch/arm/nvidia/tegra_pinmux.c: revision 1.4
sys/arch/arm/rockchip/rk3328_iomux.c: revision 1.3
sys/dev/fdt/fdt_pinctrl.c: revision 1.10
sys/arch/arm/amlogic/meson_pinctrl.c: revision 1.6
sys/dev/fdt/fdtbus.c: revision 1.30
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.27
Add support for devices with separate "init" and "default" pinctrl states.
|
| 1.4.2.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.4.2.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.4.2.1 | 30-Apr-2019 |
christos | file rk3399_iomux.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.6.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.10.2.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.11.4.1 | 31-May-2021 |
cjep | sync with head
|
| 1.11.2.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.12.4.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.23 | 21-Nov-2024 |
skrll | Wrap a long line.
|
| 1.22 | 02-Feb-2024 |
andvar | branches: 1.22.2;
fix various typos in comments.
|
| 1.21 | 27-Dec-2023 |
skrll | Trailing whitespace
|
| 1.20 | 26-Mar-2023 |
andvar | fix various typos in documentation, comments and sysctl device description.
mainly aion -> ation and inlude -> include.
|
| 1.19 | 15-Oct-2022 |
jmcneill | Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings
Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED
|
| 1.18 | 02-Oct-2021 |
mrg | default RK3399 PCIe to 1.x.
sometime in mid-2019, rockchip disabled PCIe 2.x referrencing a
non-public errata in linux and the dts, both of which were changed
to default to only PCIe 1.x (in code, and in DT.) see:
https://lore.kernel.org/all/1481881357-1793-1-git-send-email-shawn.lin@rock-chips.com/
we haven't observed any specific problems, but we've also tested
far fewer cards than linux. there are other issues such as what
happens for a PCI abort depending on which CPU triggers it we do
not currently handle either.
tested on rockpro64 with nvme & ahcisata, and pinebook pro nvme.
still allows DT to set back to '2' if the user so desires.
|
| 1.17 | 06-Sep-2021 |
jmcneill | Instead of requiring drivers to be explicit about their device memory
mapping requirements, move this decision into the fdt layer. This
introduces a new MD function, fdtbus_bus_tag_create, which is responsible
for returning per-node bus_space handles.
|
| 1.16 | 03-Sep-2021 |
mrg | rk3399 pcie: pay attention to the "bus-scan-delay-ms" property.
our existing pinebookpro DTS, but not the other rk3399 ones, have
this property set to "1000" (it's the same in linux 5.14 DTS.)
as there are already static 100ms + upto 1000ms, count how many
are done, and only delay more to complete one second.
this allows reverting this device-specific change:
http://mail-index.netbsd.org/source-changes/2021/06/23/msg130402.html
and makes other sorts of storage cards more likely to work as well.
tested on rockpro64.
XXX: consider moving dts setting into rk3399.dtsi.
ok jmcneill jak
inspired by https://gitlab.manjaro.org/manjaro-arm/packages/core/linux/-/blob/master/0013-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch
|
| 1.15 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.14 | 15-Jan-2021 |
jmcneill | Add 'const char *xname' param to fdtbus_intr_establish_byname
|
| 1.13 | 15-Jan-2021 |
jmcneill | Add 'const char *xname' arg to fdtbus_interrupt_controller_func .establish
|
| 1.12 | 11-Oct-2020 |
tnn | branches: 1.12.2;
rk3399_pci: support for PCI express switches / bridges / multiple buses
There were two isses that prevented this from working:
1. We must use type 1 configuration cycles when accessing bus 2 and
beyond, but type 0 configuration cycles for bus 0 and 1.
2. The hardware address decoder cannot be used to decode the bus portion
of the ECAM address. Due to the physical SoC address of the remote device
region not having sufficient alignment the wrong bus address would go out
on the wire. Also the mapped region is too small to address busses
beyond bus31.
Fix: Reduce the number of ECAM translated bits to dev+func only.
For each configuration space access, acquire an exclusive lock
and reprogram the translator with the correct bus number and access type.
Config space is accessed sufficiently infrequent for this to not cause
any performance problems.
|
| 1.11 | 08-Oct-2020 |
tnn | rk3399_pcie: do reset timing according to PCI Express Base Specification
Don't do link training or configuration space accesses within the time
allowed by the standard for the downstream card to come out of reset
after deasserting PERST#.
This fixes detection issues seen with a dual port wm(4) NIC,
an ASMedia SATA card and also Pericom bridges (but they need more work
to be useful).
|
| 1.10 | 17-Jun-2020 |
thorpej | <sys/extent.h> not needed here.
|
| 1.9 | 28-Dec-2019 |
jmcneill | Do not use Early Write Acknowledge for PCIe I/O and config space.
|
| 1.8 | 07-Dec-2019 |
jmcneill | Use bus_space_{peek,poke}_4 for pci conf reg access.
|
| 1.7 | 29-Nov-2019 |
jmcneill | Do not crash if the optional vpcie3v3-supply property is missing or the
regulator can not be found.
|
| 1.6 | 23-Jun-2019 |
jmcneill | branches: 1.6.2;
Enable MSI and MSI-X
|
| 1.5 | 19-Jun-2019 |
mrg | fix access to any busses that may appear beyond the bus the 4x slot see.
only the root bus and the slot's bus are limited to device = 0.
|
| 1.4 | 15-Jun-2019 |
jmcneill | Make this work.
|
| 1.3 | 12-Jun-2019 |
jmcneill | Use ranges from the device tree.
|
| 1.2 | 12-Jun-2019 |
jmcneill | Enable RK3399 PCIe.
|
| 1.1 | 07-Mar-2019 |
jakllsch | branches: 1.1.4;
Add RK3399 PCIe host bridge support.
Not enabled yet due to occasional hangs during boot, and needing
__BUS_SPACE_HAS_PROBING_METHODS enabled.
Uses slightly non-standard DT bindings to avoid suboptimality of the
Linux binding. This allows for much more flexibility and efficency
in allotment of the limited apertures into PCI spaces.
|
| 1.1.4.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.1.4.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.4.1 | 07-Mar-2019 |
christos | file rk3399_pcie.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.6.2.3 | 29-Dec-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #586):
sys/arch/arm/nvidia/tegra_pcie.c: revision 1.27
sys/arch/aarch64/aarch64/pmap.c: revision 1.57
sys/arch/aarch64/aarch64/locore.S: revision 1.48
sys/arch/aarch64/include/armreg.h: revision 1.29
sys/arch/aarch64/aarch64/pmap.c: revision 1.58
sys/arch/aarch64/aarch64/locore.S: revision 1.49
sys/arch/arm/acpi/acpipchb.c: revision 1.14
sys/arch/aarch64/aarch64/genassym.cf: revision 1.16
sys/arch/arm/acpi/acpi_machdep.c: revision 1.13
sys/arch/aarch64/include/pmap.h: revision 1.27
sys/arch/aarch64/aarch64/genassym.cf: revision 1.17
sys/arch/aarch64/include/pmap.h: revision 1.28
sys/arch/arm/fdt/pcihost_fdtvar.h: revision 1.3
sys/arch/arm/include/bus_defs.h: revision 1.14
sys/arch/aarch64/aarch64/bus_space.c: revision 1.9
sys/arch/arm/fdt/pcihost_fdt.c: revision 1.12
sys/arch/aarch64/conf/files.aarch64: revision 1.15
sys/arch/aarch64/conf/files.aarch64: revision 1.16
sys/arch/arm/rockchip/rk3399_pcie.c: revision 1.9
Enable early write acknowledge for device memory mappings.
Do not use Early Write Acknowledge for PCIe I/O and config space.
|
| 1.6.2.2 | 09-Dec-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #529):
sys/arch/evbarm/conf/std.generic64: revision 1.12
sys/arch/arm/rockchip/rk3399_pcie.c: revision 1.8
Define __BUS_SPACE_HAS_PROBING_METHODS
Use bus_space_{peek,poke}_4 for pci conf reg access.
|
| 1.6.2.1 | 08-Dec-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #498):
sys/arch/arm/rockchip/rk3399_pcie.c: revision 1.7
Do not crash if the optional vpcie3v3-supply property is missing or the
regulator can not be found.
|
| 1.12.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.22.2.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.5 | 19-Nov-2024 |
skrll | Trailing whitespace
|
| 1.4 | 27-Jan-2021 |
thorpej | branches: 1.4.24;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.3 | 17-Nov-2020 |
ryo | don't expose 'compatible[]'
|
| 1.2 | 17-Jun-2020 |
thorpej | branches: 1.2.2;
<sys/extent.h> not needed here.
|
| 1.1 | 07-Mar-2019 |
jakllsch | branches: 1.1.4;
Add RK3399 PCIe host bridge support.
Not enabled yet due to occasional hangs during boot, and needing
__BUS_SPACE_HAS_PROBING_METHODS enabled.
Uses slightly non-standard DT bindings to avoid suboptimality of the
Linux binding. This allows for much more flexibility and efficency
in allotment of the limited apertures into PCI spaces.
|
| 1.1.4.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.4.1 | 07-Mar-2019 |
christos | file rk3399_pcie_phy.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.2.2.2 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.2.2.1 | 14-Dec-2020 |
thorpej | Sync w/ HEAD.
|
| 1.4.24.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.1 | 12-Aug-2018 |
jmcneill | branches: 1.1.2; 1.1.6;
Add support for Rockchip RK3399 SoC.
|
| 1.1.6.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.6.1 | 12-Aug-2018 |
christos | file rk3399_platform.h was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.1.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.1.2.1 | 12-Aug-2018 |
pgoyette | file rk3399_platform.h was added on branch pgoyette-compat on 2018-09-06 06:55:27 +0000
|
| 1.4 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.3 | 01-May-2019 |
jmcneill | branches: 1.3.2; 1.3.12;
Add support for RK3399 PWM controller.
|
| 1.2 | 12-Aug-2018 |
jmcneill | branches: 1.2.2;
Add I2C clocks
|
| 1.1 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.2.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.2.2.1 | 12-Aug-2018 |
pgoyette | file rk3399_pmucru.c was added on branch pgoyette-compat on 2018-09-06 06:55:27 +0000
|
| 1.3.12.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.3.2.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.3.2.1 | 01-May-2019 |
christos | file rk3399_pmucru.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.1 | 12-Aug-2018 |
jmcneill | branches: 1.1.2; 1.1.6;
Add support for Rockchip RK3399 SoC.
|
| 1.1.6.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.6.1 | 12-Aug-2018 |
christos | file rk3399_pmucru.h was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.1.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.1.2.1 | 12-Aug-2018 |
pgoyette | file rk3399_pmucru.h was added on branch pgoyette-compat on 2018-09-06 06:55:27 +0000
|
| 1.3 | 07-Feb-2024 |
msaitoh | Remove ryo@'s mail addresses.
|
| 1.2 | 17-Oct-2023 |
tnn | rk3588_cru: fix clock id for BIGCORE1
|
| 1.1 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.3 | 07-Feb-2024 |
msaitoh | Remove ryo@'s mail addresses.
|
| 1.2 | 17-Oct-2023 |
tnn | rk3588_cru: sync clock id numbers with mainline Linux
The previous constants came from the Rockchip board support package,
but we want to be compatible with upstream device tree.
|
| 1.1 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.2 | 07-Feb-2024 |
msaitoh | Remove ryo@'s mail addresses.
|
| 1.1 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.2 | 07-Feb-2024 |
msaitoh | Remove ryo@'s mail addresses.
|
| 1.1 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.6 | 19-Dec-2021 |
riastradh | rkdrm: Convert to atomic modesetting, as needed for bridges.
Author: Jared McNeill <jmcneill@invisible.ca>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.5 | 19-Dec-2021 |
riastradh | Get drm to build on arm64 again.
Author: Jared McNeill <jmcneill@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.4 | 25-Jul-2021 |
jmcneill | rockchip: edp: Force VOPB as CRTC for eDP.
Fixes display init on Pinebook Pro w/ U-Boot 2021.07.
|
| 1.3 | 27-Jan-2021 |
thorpej | branches: 1.3.4;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.2 | 04-Jan-2020 |
jmcneill | branches: 1.2.4; 1.2.8; 1.2.12;
Emit PMFE_DISPLAY_{ON,OFF} events in response to DPMS requests.
|
| 1.1 | 19-Dec-2019 |
jakllsch | add Rockchip (RK3399) glue for Analogix DisplayPort core
|
| 1.2.12.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.2.8.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.2.8.1 | 04-Jan-2020 |
martin | file rk_anxdp.c was added on branch phil-wifi on 2020-04-08 14:07:30 +0000
|
| 1.2.4.3 | 28-Jul-2021 |
snj | Pull up following revision(s) (requested by jmcneill in ticket #1324):
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.4
rockchip: edp: Force VOPB as CRTC for eDP.
Fixes display init on Pinebook Pro w/ U-Boot 2021.07.
|
| 1.2.4.2 | 21-Jan-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #616):
sys/dev/ic/anx_dp.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.126
sys/dev/ic/anx_dp.h: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.128
sys/dev/ic/anx_dp.h: revision 1.2
sys/dev/fdt/dwcmmc_fdt.c: revision 1.9
sys/dev/i2c/cwfg.c: revision 1.1
sys/conf/files: revision 1.1247
sys/dev/fdt/pwm_backlight.c: revision 1.5
sys/dev/fdt/pwm_backlight.c: revision 1.6
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.14
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.15
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.16
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.17
sys/dev/ic/dwc_mmc.c: revision 1.20
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.18
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.19
sys/dev/usb/usbdevs: revision 1.775
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.4
sys/dev/fdt/simple_amplifier.c: revision 1.1
sys/dev/i2c/files.i2c: revision 1.105
sys/arch/evbarm/conf/GENERIC64: revision 1.117
sys/arch/evbarm/conf/GENERIC64: revision 1.118
sys/dev/i2c/files.i2c: revision 1.107
sys/dev/fdt/files.fdt: revision 1.49
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.1
sys/dev/ic/dwc_mmc_var.h: revision 1.9
sys/dev/i2c/rkpmic.c: revision 1.4
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.2
sys/dev/i2c/rkpmic.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.6
sys/arch/arm/rockchip/rk_vop.c: revision 1.4
sys/arch/arm/rockchip/rk_vop.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.8
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.1
sys/dev/usb/ums.c: revision 1.96 (via patch)
sys/arch/arm/rockchip/rk_pwm.c: revision 1.3
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.2
sys/dev/i2c/es8316ac.c: revision 1.1
sys/dev/fdt/dwcmmc_fdt.c: revision 1.10
sys/dev/i2c/es8316ac.c: revision 1.2
sys/dev/fdt/fdt_panel.c: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.18
sys/dev/fdt/fdt_panel.c: revision 1.2
sys/dev/ic/dwc_mmc.c: revision 1.19
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.5
sys/dev/ic/dwc_mmc_var.h: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.6
sys/arch/evbarm/conf/GENERIC64: revision 1.122
sys/dev/ic/dwc_mmc_var.h: revision 1.11
sys/dev/fdt/files.fdt: revision 1.50
sys/arch/evbarm/conf/GENERIC64: revision 1.123
sys/arch/arm/rockchip/rk_i2s.c: revision 1.2
sys/arch/arm/rockchip/files.rockchip: revision 1.23
sys/arch/evbarm/conf/GENERIC64: revision 1.124
sys/dev/ic/anx_dp.c: revision 1.1
rkpmic: add RTC support; register w/ todr(9)
rkpmic: correct delay
Add support for SDIO interrupts.
fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
add RK3399 eDP clocks
add RK3399 DisplayPort clocks
style fix/KNF
rk3399_cru: implement dclk_vop0_frac and dclk_vop1_frac
Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
rkvop: set stride using virtual framebuffer width instead of display mode
rk3399_cru: Reparent dclk_vop[01] to gpll via dclk_vop[01]_frac.
The previous source of dclk_vop[01] was vpll via dclk_vop[01]_div.
vpll is apparently used directly as a pixel clock source for the
HDMI PHY, and we don't want the other VOP's dclk changing out from
under it because we can't handle finding a replacement clock source
with the right rate yet.
gpll happens to run at 594MHz, which works well as a basis for pixel
clocks.
Linux suggests that the source clock of the fractional divider needs
to be more than twenty times greater than the resulting clock (or some
intermediate clock?) for output stability. This may not be the case
with 594MHz and the common pixel clocks I see used by displays in my
area of the wild, but it works for now.
add Analogix DisplayPort core driver
add Rockchip (RK3399) glue for Analogix DisplayPort core
add anxdp(4)
Add another panel@fdt driver, this time for DRM-style panels.
To do: migrate away from other panel driver.
enable panel at fdt drivers
paper over the rkpwm get_conf function that otherwise doesn't seem to
let things work
add template bits for optional eDP panel on RockPro64
Abort panel driver attach if required regulator is missing.
Add clk provider
Add Pinebook Pro dts, from Manjaro Linux.
https://gitlab.manjaro.org/tsys/linux-pinebook-pro/blob/877ca0e7283596f37845de50dc36bff5b88b91e1/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+ rk3399-pinebook-pro.dts
Attach mmcpwrseq resource earlier
dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs
Fix performance regression with previous
Quiet chatty printfs
No need to print all supported levels at attach, print the range and total number of steps
Disable SPI for now (rkspi driver hangs at boot)
Add driver for simple-audio-amplifier binding
Add driver for Everest Semi ES8316 Low Power Audio CODEC
add es8316, simpleamp
Avoid sleeping while the audio intr lock is held.
If the rockchip,system-power-controller property is present, try to power off with the PMIC
Add HAILUCK keyboard (product 1e)
Add a quirk for the HAILUCK USB keyboard / touchpad device with product 1e.
The keyboard does not function properly unless the touchpad's intr endpoint
is active.
Add driver for CellWise CW2015 Fuel Gauge IC.
add cwfg
Emit PMFE_DISPLAY_{ON,OFF} events in response to DPMS requests.
If the backlight node does not have an enable gpio, set the lowest duty
cycle to turn the display off instead.
Attach psci as early as possible. This allows other power controllers to
register their own poweroff / reset callbacks with a higher preference.
Add 2000 MHz to available armclkb rates
Remove debug printfs
|
| 1.2.4.1 | 04-Jan-2020 |
martin | file rk_anxdp.c was added on branch netbsd-9 on 2020-01-21 10:39:59 +0000
|
| 1.3.4.1 | 01-Aug-2021 |
thorpej | Sync with HEAD.
|
| 1.10 | 18-Sep-2022 |
ryo | KNF. 80 columns, use tab. NFC.
|
| 1.9 | 17-Nov-2018 |
jakllsch | use aprint_debug() rather than aprint_error() rk_cru_clock_get_rate()
|
| 1.8 | 21-Sep-2018 |
skrll | Centralise defparam CONSADDR, CONSPEED, CONMODE and CONADDR into
opt_console.h and adjust.
|
| 1.7 | 09-Sep-2018 |
aymeric | Pass clock provider's phandle to fdtbus_clock_controller_func.decode()
and update callers.
This allows to accomodate clock managers whose clocks are identified
directly by a clock instead of a pair (clock provider, index).
ok jmcneill@ on port-arm
|
| 1.6 | 12-Aug-2018 |
jmcneill | Back to aprint_debug for dumping clocks at attach
|
| 1.5 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.4 | 30-Jun-2018 |
jmcneill | Use syscon API.
|
| 1.3 | 26-Jun-2018 |
jmcneill | branches: 1.3.2;
device_printf -> aprint_debug
|
| 1.2 | 17-Jun-2018 |
jmcneill | branches: 1.2.2;
Fix soft reset logic
|
| 1.1 | 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.2.2.6 | 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
| 1.2.2.5 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
|
| 1.2.2.4 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.2.2.3 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.1 | 17-Jun-2018 |
pgoyette | file rk_cru.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.3.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.11 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.10 | 23-Aug-2022 |
ryo | - change struct rk_cru_arm and RK_CPU macros to allow mux and div registers to be specified independently.
Allow more div-regs to be specified in the future.
- commonize RK*_PLL() macro.
|
| 1.9 | 23-Aug-2022 |
ryo | Make .reg1 and .reg2 of struct rk_cru_cpu_rate into array, and change the type of those to bus_size_t and uint32_t.
Array size may increase in the future.
|
| 1.8 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.7 | 16-Nov-2019 |
jmcneill | Add support for I2S clocks.
|
| 1.6 | 10-Nov-2019 |
jmcneill | Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
|
| 1.5 | 19-Oct-2019 |
tnn | rk3399: add definition for the watchdog timer clock gate
The watchdog timer clock gate is a bit special because it's a secure
gate that can only be accessed from EL3. We still need a dummy gate
definition for it so that dwcwdt(4) can infer the frequency via the
parent clock. The gate is enabled by default by U-Boot.
|
| 1.4 | 01-Sep-2018 |
jmcneill | branches: 1.4.4;
Add support for RK3399 CPU clocks.
|
| 1.3 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.2 | 30-Jun-2018 |
jmcneill | Use syscon API.
|
| 1.1 | 16-Jun-2018 |
jmcneill | branches: 1.1.2; 1.1.4;
Add initial support for Rockchip RK3328 SoC.
|
| 1.1.4.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.1.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.2.4 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.1.2.3 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.1.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.1.2.1 | 16-Jun-2018 |
pgoyette | file rk_cru.h was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.4.4.1 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.5 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.4 | 23-Aug-2022 |
ryo | - change struct rk_cru_arm and RK_CPU macros to allow mux and div registers to be specified independently.
Allow more div-regs to be specified in the future.
- commonize RK*_PLL() macro.
|
| 1.3 | 23-Aug-2022 |
ryo | Make .reg1 and .reg2 of struct rk_cru_cpu_rate into array, and change the type of those to bus_size_t and uint32_t.
Array size may increase in the future.
|
| 1.2 | 01-Sep-2018 |
jmcneill | Add support for RK3399 CPU clocks.
|
| 1.1 | 16-Jun-2018 |
jmcneill | branches: 1.1.2; 1.1.4;
Add initial support for Rockchip RK3328 SoC.
|
| 1.1.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.2.3 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.1.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.1.2.1 | 16-Jun-2018 |
pgoyette | file rk_cru_arm.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.8 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.7 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.6 | 20-May-2021 |
msaitoh | Fix wrong calculation found by kUBSan. OK'd by jmcneill.
The output was:
UBSan: Undefined Behavior in ../../../../arch/arm/rockchip/
rk_cru_composite.c:86:21, unsigned integer overflow: 0 divrem 0 cannot be
represented in type 'unsigned int'
|
| 1.5 | 16-Nov-2019 |
jmcneill | branches: 1.5.12; 1.5.14;
Add support for I2S clocks.
|
| 1.4 | 10-Nov-2019 |
jmcneill | Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
|
| 1.3 | 19-Jun-2018 |
jmcneill | branches: 1.3.2; 1.3.4; 1.3.8;
rk_cru_composite_set_rate: allow selection of parent clocks in different
domains
|
| 1.2 | 17-Jun-2018 |
jmcneill | Make gate enable/disable logic easier to read. NFC.
|
| 1.1 | 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.3.8.1 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.3.4.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.3.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.3.2.1 | 19-Jun-2018 |
pgoyette | file rk_cru_composite.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.5.14.1 | 31-May-2021 |
cjep | sync with head
|
| 1.5.12.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.2 | 17-Jun-2018 |
jmcneill | branches: 1.2.2;
Make gate enable/disable logic easier to read. NFC.
|
| 1.1 | 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.2.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.1 | 17-Jun-2018 |
pgoyette | file rk_cru_gate.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.2 | 30-Jun-2018 |
jmcneill | Use syscon API.
|
| 1.1 | 16-Jun-2018 |
jmcneill | branches: 1.1.2; 1.1.4;
Add initial support for Rockchip RK3328 SoC.
|
| 1.1.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.2.3 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.1.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.1.2.1 | 16-Jun-2018 |
pgoyette | file rk_cru_mux.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.6 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.5 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.4 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.3 | 30-Jun-2018 |
jmcneill | Use syscon API.
|
| 1.2 | 16-Jun-2018 |
jmcneill | branches: 1.2.2; 1.2.4;
Fix rate calculation of fractional mode PLLs
|
| 1.1 | 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.2.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2.2.4 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.2.2.3 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.1 | 16-Jun-2018 |
pgoyette | file rk_cru_pll.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.22 | 13-Oct-2025 |
thorpej | Use device_{get,set}prop_bool().
|
| 1.21 | 30-Oct-2022 |
jmcneill | Remove dirty fb IOCTL callback introduced in latest drm update.
Not sure how this got here, but the rkdrm driver does not need to do
damage tracking as it uses Normal-NC (uncached) mappings.
PR# port-arm/56596
|
| 1.20 | 25-Sep-2022 |
riastradh | rkdrm: Set is_console on the drm device, not the fb child.
The drm device is represented by a rockchip,display-subsystem node in
the device tree. The fb child is a purely software abstraction used
by drm.
The is_console property is used by MD firmware logic to mark which
actual device in hardware bus enumeration like PCI or FDT the system
has chosen for the console early at boot, so hanging it on the node
for the real hardware device makes more sense than hanging it on the
software abstraction, and is consistent with recent changes to drmfb
to respect its setting on other platforms for hardware devices.
|
| 1.19 | 21-Apr-2022 |
andvar | s/subesquent/subsequent/ in copy pasted comments.
|
| 1.18 | 20-Dec-2021 |
riastradh | rkdrm: Implement vblank.
|
| 1.17 | 19-Dec-2021 |
riastradh | rkdrm: Comment why we config_defer rk_drm_init.
|
| 1.16 | 19-Dec-2021 |
riastradh | rkdrm: Convert to atomic modesetting, as needed for bridges.
Author: Jared McNeill <jmcneill@invisible.ca>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.15 | 19-Dec-2021 |
riastradh | rkdrm: Do drm_mode_config_reset on init.
|
| 1.14 | 19-Dec-2021 |
riastradh | sunxi/drm, rockchip/drm: Avoid messy error output.
|
| 1.13 | 19-Dec-2021 |
riastradh | rockchip/drm: use drm_helper_mode_fill_fb_struct or say why not.
Author: phone <mrg@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.12 | 19-Dec-2021 |
riastradh | rockchip/drm: use an explicit task queue to avoid config_defer pitfalls.
Author: phone <mrg@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.11 | 19-Dec-2021 |
riastradh | catch up with newer drm_encoder_init prototype
Author: Maya Rashish <maya@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.10 | 19-Dec-2021 |
riastradh | drm_dev_alloc now returns ERR_PTR, check for that.
Author: Maya Rashish <maya@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.9 | 19-Dec-2021 |
riastradh | Sort includes.
|
| 1.8 | 19-Dec-2021 |
riastradh | Get drm to build on arm64 again.
Author: Jared McNeill <jmcneill@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 28-Apr-2021 |
mrg | branches: 1.6.6;
for big endian kernels use DRM_FORMAT_BGRX8888 pixel format.
now my pinebook pro console looks right with evbarm64-eb, instead
of having red and green swapped, and no blue. fixes both console
"text" mode and X11.
|
| 1.5 | 24-Apr-2021 |
thorpej | branches: 1.5.2;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.4 | 27-Jan-2021 |
thorpej | branches: 1.4.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.3 | 15-Dec-2019 |
mrg | branches: 1.3.8; 1.3.10;
ensure to call drm_mode_config_cleanup() when erroring.
tripped up 'active lock in free' checks, and perhaps
lead to other lock corruption. (crash with un-init lock
in arpresolve that does not make sense now seems to not
occur either.)
|
| 1.2 | 14-Nov-2019 |
jmcneill | branches: 1.2.2;
Remove debug output
|
| 1.1 | 09-Nov-2019 |
jmcneill | WIP display driver for Rockchip RK3399
|
| 1.2.2.3 | 17-Dec-2019 |
martin | Pull up following revision(s) (requested by mrg in ticket #557):
sys/arch/arm/rockchip/rk_drm.c: revision 1.3
sys/arch/arm/ti/ti_lcdc.c: revision 1.4
sys/arch/arm/sunxi/sunxi_drm.c: revision 1.10
ensure to call drm_mode_config_cleanup() when erroring.
tripped up 'active lock in free' checks, and perhaps
lead to other lock corruption. (crash with un-init lock
in arpresolve that does not make sense now seems to not
occur either.)
|
| 1.2.2.2 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.2.2.1 | 14-Nov-2019 |
martin | file rk_drm.c was added on branch netbsd-9 on 2019-11-16 16:48:25 +0000
|
| 1.3.10.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.3.8.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.3.8.1 | 15-Dec-2019 |
martin | file rk_drm.c was added on branch phil-wifi on 2020-04-13 08:03:37 +0000
|
| 1.4.2.1 | 02-Apr-2021 |
thorpej | config_found_ia() -> config_found() w/ CFARG_IATTR.
|
| 1.5.2.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.6.6.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 19-Dec-2021 |
riastradh | rockchip/drm: use an explicit task queue to avoid config_defer pitfalls.
Author: phone <mrg@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.1 | 09-Nov-2019 |
jmcneill | branches: 1.1.2; 1.1.10;
WIP display driver for Rockchip RK3399
|
| 1.1.10.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.1.10.1 | 09-Nov-2019 |
martin | file rk_drm.h was added on branch phil-wifi on 2020-04-13 08:03:37 +0000
|
| 1.1.2.2 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.1.2.1 | 09-Nov-2019 |
martin | file rk_drm.h was added on branch netbsd-9 on 2019-11-16 16:48:25 +0000
|
| 1.8 | 11-Apr-2023 |
riastradh | arm/rockchip: Omit needless functions.
|
| 1.7 | 19-Dec-2021 |
riastradh | Sort includes.
|
| 1.6 | 19-Dec-2021 |
riastradh | Get drm to build on arm64 again.
Author: Jared McNeill <jmcneill@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.5 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.4 | 17-Dec-2019 |
jakllsch | branches: 1.4.8; 1.4.10;
Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
|
| 1.3 | 16-Nov-2019 |
jmcneill | branches: 1.3.2;
Add audio support
|
| 1.2 | 10-Nov-2019 |
jmcneill | Fix typo in phy config table
|
| 1.1 | 09-Nov-2019 |
jmcneill | WIP display driver for Rockchip RK3399
|
| 1.3.2.3 | 21-Jan-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #616):
sys/dev/ic/anx_dp.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.126
sys/dev/ic/anx_dp.h: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.128
sys/dev/ic/anx_dp.h: revision 1.2
sys/dev/fdt/dwcmmc_fdt.c: revision 1.9
sys/dev/i2c/cwfg.c: revision 1.1
sys/conf/files: revision 1.1247
sys/dev/fdt/pwm_backlight.c: revision 1.5
sys/dev/fdt/pwm_backlight.c: revision 1.6
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.14
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.15
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.16
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.17
sys/dev/ic/dwc_mmc.c: revision 1.20
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.18
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.19
sys/dev/usb/usbdevs: revision 1.775
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.4
sys/dev/fdt/simple_amplifier.c: revision 1.1
sys/dev/i2c/files.i2c: revision 1.105
sys/arch/evbarm/conf/GENERIC64: revision 1.117
sys/arch/evbarm/conf/GENERIC64: revision 1.118
sys/dev/i2c/files.i2c: revision 1.107
sys/dev/fdt/files.fdt: revision 1.49
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.1
sys/dev/ic/dwc_mmc_var.h: revision 1.9
sys/dev/i2c/rkpmic.c: revision 1.4
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.2
sys/dev/i2c/rkpmic.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.6
sys/arch/arm/rockchip/rk_vop.c: revision 1.4
sys/arch/arm/rockchip/rk_vop.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.8
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.1
sys/dev/usb/ums.c: revision 1.96 (via patch)
sys/arch/arm/rockchip/rk_pwm.c: revision 1.3
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.2
sys/dev/i2c/es8316ac.c: revision 1.1
sys/dev/fdt/dwcmmc_fdt.c: revision 1.10
sys/dev/i2c/es8316ac.c: revision 1.2
sys/dev/fdt/fdt_panel.c: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.18
sys/dev/fdt/fdt_panel.c: revision 1.2
sys/dev/ic/dwc_mmc.c: revision 1.19
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.5
sys/dev/ic/dwc_mmc_var.h: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.6
sys/arch/evbarm/conf/GENERIC64: revision 1.122
sys/dev/ic/dwc_mmc_var.h: revision 1.11
sys/dev/fdt/files.fdt: revision 1.50
sys/arch/evbarm/conf/GENERIC64: revision 1.123
sys/arch/arm/rockchip/rk_i2s.c: revision 1.2
sys/arch/arm/rockchip/files.rockchip: revision 1.23
sys/arch/evbarm/conf/GENERIC64: revision 1.124
sys/dev/ic/anx_dp.c: revision 1.1
rkpmic: add RTC support; register w/ todr(9)
rkpmic: correct delay
Add support for SDIO interrupts.
fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
add RK3399 eDP clocks
add RK3399 DisplayPort clocks
style fix/KNF
rk3399_cru: implement dclk_vop0_frac and dclk_vop1_frac
Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
rkvop: set stride using virtual framebuffer width instead of display mode
rk3399_cru: Reparent dclk_vop[01] to gpll via dclk_vop[01]_frac.
The previous source of dclk_vop[01] was vpll via dclk_vop[01]_div.
vpll is apparently used directly as a pixel clock source for the
HDMI PHY, and we don't want the other VOP's dclk changing out from
under it because we can't handle finding a replacement clock source
with the right rate yet.
gpll happens to run at 594MHz, which works well as a basis for pixel
clocks.
Linux suggests that the source clock of the fractional divider needs
to be more than twenty times greater than the resulting clock (or some
intermediate clock?) for output stability. This may not be the case
with 594MHz and the common pixel clocks I see used by displays in my
area of the wild, but it works for now.
add Analogix DisplayPort core driver
add Rockchip (RK3399) glue for Analogix DisplayPort core
add anxdp(4)
Add another panel@fdt driver, this time for DRM-style panels.
To do: migrate away from other panel driver.
enable panel at fdt drivers
paper over the rkpwm get_conf function that otherwise doesn't seem to
let things work
add template bits for optional eDP panel on RockPro64
Abort panel driver attach if required regulator is missing.
Add clk provider
Add Pinebook Pro dts, from Manjaro Linux.
https://gitlab.manjaro.org/tsys/linux-pinebook-pro/blob/877ca0e7283596f37845de50dc36bff5b88b91e1/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+ rk3399-pinebook-pro.dts
Attach mmcpwrseq resource earlier
dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs
Fix performance regression with previous
Quiet chatty printfs
No need to print all supported levels at attach, print the range and total number of steps
Disable SPI for now (rkspi driver hangs at boot)
Add driver for simple-audio-amplifier binding
Add driver for Everest Semi ES8316 Low Power Audio CODEC
add es8316, simpleamp
Avoid sleeping while the audio intr lock is held.
If the rockchip,system-power-controller property is present, try to power off with the PMIC
Add HAILUCK keyboard (product 1e)
Add a quirk for the HAILUCK USB keyboard / touchpad device with product 1e.
The keyboard does not function properly unless the touchpad's intr endpoint
is active.
Add driver for CellWise CW2015 Fuel Gauge IC.
add cwfg
Emit PMFE_DISPLAY_{ON,OFF} events in response to DPMS requests.
If the backlight node does not have an enable gpio, set the lowest duty
cycle to turn the display off instead.
Attach psci as early as possible. This allows other power controllers to
register their own poweroff / reset callbacks with a higher preference.
Add 2000 MHz to available armclkb rates
Remove debug printfs
|
| 1.3.2.2 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.3.2.1 | 16-Nov-2019 |
martin | file rk_dwhdmi.c was added on branch netbsd-9 on 2019-11-16 16:48:25 +0000
|
| 1.4.10.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.4.8.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.4.8.1 | 17-Dec-2019 |
martin | file rk_dwhdmi.c was added on branch phil-wifi on 2020-04-13 08:03:37 +0000
|
| 1.4 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.3 | 13-Mar-2019 |
jmcneill | branches: 1.3.4; 1.3.14;
Set drive strength and output tap delay
|
| 1.2 | 10-Mar-2019 |
jmcneill | Use syscon instead of bus_space_map
|
| 1.1 | 10-Mar-2019 |
jmcneill | Add support for Rockchip eMMC PHY
|
| 1.3.14.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.3.4.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.3.4.1 | 13-Mar-2019 |
christos | file rk_emmcphy.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.3 | 07-Feb-2024 |
msaitoh | Remove ryo@'s mail addresses.
|
| 1.2 | 24-Dec-2023 |
skrll | eqos(4): MP improvements
Remove the non-MP-safe scaffolding and pass MP safe flags for callout
and interrupt handlers.
Where we had #ifndef EQOS_MPSAFE splnet(), we also had EQOS_LOCK,
which implies splnet, so just remove the conditional splnet.
|
| 1.1 | 23-Aug-2022 |
ryo | add eqos(4) for RK3588
|
| 1.7 | 25-Sep-2022 |
riastradh | rkdrm: Set is_console on the drm device, not the fb child.
The drm device is represented by a rockchip,display-subsystem node in
the device tree. The fb child is a purely software abstraction used
by drm.
The is_console property is used by MD firmware logic to mark which
actual device in hardware bus enumeration like PCI or FDT the system
has chosen for the console early at boot, so hanging it on the node
for the real hardware device makes more sense than hanging it on the
software abstraction, and is consistent with recent changes to drmfb
to respect its setting on other platforms for hardware devices.
|
| 1.6 | 19-Dec-2021 |
riastradh | rkdrm: Turn display off and back on again at config_interrupts.
This grody kludge works around whatever we're doing wrong in the
initial modeset that causes it not to take.
|
| 1.5 | 19-Dec-2021 |
riastradh | rockchip/drm: use an explicit task queue to avoid config_defer pitfalls.
Author: phone <mrg@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.4 | 19-Dec-2021 |
riastradh | Sort includes.
|
| 1.3 | 19-Dec-2021 |
riastradh | Get drm to build on arm64 again.
Author: Jared McNeill <jmcneill@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.2 | 21-May-2021 |
jmcneill | whitespace cleanup
|
| 1.1 | 09-Nov-2019 |
jmcneill | branches: 1.1.2; 1.1.10; 1.1.16; 1.1.18;
WIP display driver for Rockchip RK3399
|
| 1.1.18.1 | 31-May-2021 |
cjep | sync with head
|
| 1.1.16.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.1.10.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.1.10.1 | 09-Nov-2019 |
martin | file rk_fb.c was added on branch phil-wifi on 2020-04-13 08:03:37 +0000
|
| 1.1.2.2 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.1.2.1 | 09-Nov-2019 |
martin | file rk_fb.c was added on branch netbsd-9 on 2019-11-16 16:48:25 +0000
|
| 1.23 | 10-Aug-2024 |
skrll | awge(4): MP improvements
Remove the non-MP-safe scaffolding and make the locking less
coarse.
|
| 1.22 | 31-Dec-2023 |
skrll | branches: 1.22.2;
Trailing whitespace
|
| 1.21 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.20 | 07-Nov-2021 |
jmcneill | Handle RGMII variants.
|
| 1.19 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.18 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.17 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.16 | 15-Jan-2021 |
ryo | use fdtbus_intr_establish_xname
|
| 1.15 | 09-Nov-2019 |
tnn | branches: 1.15.8;
rk_gmac: clean up code for setting up clock delay lines a bit
- break long lines
- move toggle to enable it under a single #ifdef notyet
I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.
|
| 1.14 | 21-Jul-2019 |
mrg | move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().
with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.
XXX: still don't know why the existing hangs occur.
|
| 1.13 | 08-Jul-2019 |
msaitoh | Add rnd(9) support.
|
| 1.12 | 05-May-2019 |
jmcneill | RK3399: Skip setting RGMII TX/RX clock delayline parameters for now and
rely on the settings configured by firmware.
|
| 1.11 | 28-Feb-2019 |
msaitoh | Set RGMII delay for MAC side correctly on RK3399.
|
| 1.10 | 27-Feb-2019 |
msaitoh | Fix RGMII clock 25MHz setting (for 100Mbps).
|
| 1.9 | 23-Feb-2019 |
martin | Adjust all callers of dwc_gmac_attach, pass MII_PHY_ANY for now.
|
| 1.8 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.7 | 16-Jul-2018 |
christos | Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
|
| 1.6 | 30-Jun-2018 |
jmcneill | Rock64 needs more time for the PHY to reset. Add a delay.
|
| 1.5 | 30-Jun-2018 |
jmcneill | Use syscon API
|
| 1.4 | 30-Jun-2018 |
jmcneill | Only install interrupt handler if dwc_gmac_attach succeeds.
|
| 1.3 | 19-Jun-2018 |
jmcneill | branches: 1.3.2; 1.3.4;
Disable threshhold mode for TX/RX DMA and ignore tx_delay/rx_delay props
for now. Fixes GMAC on RK3328.
|
| 1.2 | 17-Jun-2018 |
jmcneill | Enable gpio reset logic
|
| 1.1 | 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.3.4.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.3.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.3.2.4 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.3.2.3 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.3.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.3.2.1 | 19-Jun-2018 |
pgoyette | file rk_gmac.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.15.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.22.2.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.8 | 03-Jun-2025 |
rjs | Add support for generating interrupts from GPIO pins.
|
| 1.7 | 17-Oct-2023 |
tnn | branches: 1.7.6;
rk_gpio: add support for version 2 controller
Based on PR 57597 from Johann Rudloff.
|
| 1.6 | 17-Oct-2023 |
tnn | rk_gpio: de-duplicate some code from the fdtbus accessors
Make fdtbus accessors implementation agnostic and use the chipset tag
to call into implementation code. This makes it easy to populate the
chipset tag with alternate implementation needed for v2 controllers.
|
| 1.5 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.4 | 24-Apr-2021 |
thorpej | branches: 1.4.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.3 | 27-Jan-2021 |
thorpej | branches: 1.3.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.2 | 16-Jun-2018 |
jmcneill | branches: 1.2.2; 1.2.16;
Fix reading through /dev/gpio and use the same style for writing registers in both fdt and /dev/gpio cases
|
| 1.1 | 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.2.16.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.2.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.1 | 16-Jun-2018 |
pgoyette | file rk_gpio.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.3.2.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.4.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.7.6.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.14 | 16-Sep-2025 |
thorpej | As with ACPI, perform the fdtbus_register_i2c_controller() in a centralized
location.
|
| 1.13 | 16-Sep-2025 |
thorpej | Garbage-collect fdtbus_attach_i2cbus(); the regular iicbus_attach() is
sufficient now.
|
| 1.12 | 13-Nov-2021 |
jmcneill | Match rockchip,rk3288-i2c
|
| 1.11 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.10 | 27-Jan-2021 |
thorpej | branches: 1.10.4; 1.10.14;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.9 | 23-Dec-2020 |
thorpej | Change fdtbus_register_i2c_controller() to directly register the i2c_tag_t,
rather than the device and a set of functions (the only of which was to
return the i2c_tag_t anyway). Previously, this assumed only a single
i2c controller node per device_t, which is not true with an i2c mux.
|
| 1.8 | 19-Sep-2020 |
ryo | branches: 1.8.2;
fix to work on big endian
|
| 1.7 | 22-Dec-2019 |
thorpej | Cleanup i2c bus acquire / release, centralizing all of the logic into
iic_acquire_bus() / iic_release_bus(). "acquire" and "release" hooks
no longer need to be provided by back-end controller drivers (only if
they need special handling, e.g. powering on the i2c controller).
This results in the removal of a bunch of rendundant code from each
back-end controller driver.
Assert that we are not in hard interrupt context in iic_acquire_bus(),
iic_exec(), and iic_release_bus().
|
| 1.6 | 08-Nov-2019 |
jmcneill | Support reads of more than 32 bytes in a single xfer.
|
| 1.5 | 18-Sep-2019 |
tnn | rkiic: coalesce smbus-style writes into a single transaction
There seems to be a hw controller bug. Split cmd/data writes caused corrupt
transfers, with junk bytes witten into the rk808 pmic registers.
This may have caused us to operate with out-of-spec core voltage.
|
| 1.4 | 02-Sep-2018 |
jmcneill | branches: 1.4.4; 1.4.6;
Process assigned-clocks
|
| 1.3 | 02-Sep-2018 |
jmcneill | Calculate i2c divisor based on sclk not pclk
|
| 1.2 | 02-Sep-2018 |
jmcneill | Send an ACK after the last byte is received
|
| 1.1 | 01-Jul-2018 |
jmcneill | branches: 1.1.2;
Add driver for Rockchip I2C controller.
|
| 1.1.2.3 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.1.2.2 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.1.2.1 | 01-Jul-2018 |
pgoyette | file rk_i2c.c was added on branch pgoyette-compat on 2018-07-28 04:37:29 +0000
|
| 1.4.6.2 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.4.6.1 | 24-Sep-2019 |
martin | Pull up following revision(s) (requested by tnn in ticket #235):
sys/arch/arm/rockchip/rk_i2c.c: revision 1.5
rkiic: coalesce smbus-style writes into a single transaction
There seems to be a hw controller bug. Split cmd/data writes caused corrupt
transfers, with junk bytes witten into the rk808 pmic registers.
This may have caused us to operate with out-of-spec core voltage.
|
| 1.4.4.4 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.4.4.3 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.4.4.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.4.4.1 | 02-Sep-2018 |
christos | file rk_i2c.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.8.2.2 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.8.2.1 | 03-Jan-2021 |
thorpej | Sync w/ HEAD.
|
| 1.10.14.1 | 09-Aug-2021 |
thorpej | Port over the changes from thorpej-i2c-spi-conf to thorpej-i2c-spi-conf2,
which is based on a newer HEAD revision.
|
| 1.10.4.1 | 19-May-2021 |
thorpej | fdtbus_attach_i2cbus() is no longer anything other than a wrapper around
config_found(); just get rid of it and make its callers look like all of
the other I2C controller drivers.
|
| 1.10 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.9 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.8 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.7 | 15-Jan-2021 |
ryo | use fdtbus_intr_establish_xname
|
| 1.6 | 01-Jan-2021 |
jmcneill | rk_i2s.c
|
| 1.5 | 31-Dec-2020 |
mrg | begin to make rock64 audio work.
- set status for "analog_sound" to enabled.
- add clocks for the i2s and spdif nodes.
- match "rockchip,rk3066-i2s", "rockchip,rk3188-i2s",
and "rockchip,rk3288-i2s".
this gets i2s and ausoc to attach, but no audio(4) yet.
to complete this probably also needs a codec driver (appears
to be rk3328 specific, unlike eg pinebookpro's es8316), and
support for "audio-graph-card" type sound cards.
|
| 1.4 | 31-Dec-2020 |
mrg | save the return value of fdtbus_clock_enable() so we can both
report it correctly instead of always 0, and also return failure
to the caller.
|
| 1.3 | 29-Feb-2020 |
isaki | branches: 1.3.6; 1.3.8;
Remove rounding by 4 bytes on round_blocksize().
For drivers which supports only 16bit * 2channels sampling,
rounding by 4 bytes no longer meaningful.
|
| 1.2 | 04-Jan-2020 |
jmcneill | branches: 1.2.2;
Remove debug printfs
|
| 1.1 | 16-Nov-2019 |
jmcneill | branches: 1.1.2;
Add driver for Rockchip I2S/PCM controller.
|
| 1.1.2.3 | 21-Jan-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #616):
sys/dev/ic/anx_dp.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.126
sys/dev/ic/anx_dp.h: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.128
sys/dev/ic/anx_dp.h: revision 1.2
sys/dev/fdt/dwcmmc_fdt.c: revision 1.9
sys/dev/i2c/cwfg.c: revision 1.1
sys/conf/files: revision 1.1247
sys/dev/fdt/pwm_backlight.c: revision 1.5
sys/dev/fdt/pwm_backlight.c: revision 1.6
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.14
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.15
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.16
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.17
sys/dev/ic/dwc_mmc.c: revision 1.20
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.18
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.19
sys/dev/usb/usbdevs: revision 1.775
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.4
sys/dev/fdt/simple_amplifier.c: revision 1.1
sys/dev/i2c/files.i2c: revision 1.105
sys/arch/evbarm/conf/GENERIC64: revision 1.117
sys/arch/evbarm/conf/GENERIC64: revision 1.118
sys/dev/i2c/files.i2c: revision 1.107
sys/dev/fdt/files.fdt: revision 1.49
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.1
sys/dev/ic/dwc_mmc_var.h: revision 1.9
sys/dev/i2c/rkpmic.c: revision 1.4
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.2
sys/dev/i2c/rkpmic.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.6
sys/arch/arm/rockchip/rk_vop.c: revision 1.4
sys/arch/arm/rockchip/rk_vop.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.8
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.1
sys/dev/usb/ums.c: revision 1.96 (via patch)
sys/arch/arm/rockchip/rk_pwm.c: revision 1.3
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.2
sys/dev/i2c/es8316ac.c: revision 1.1
sys/dev/fdt/dwcmmc_fdt.c: revision 1.10
sys/dev/i2c/es8316ac.c: revision 1.2
sys/dev/fdt/fdt_panel.c: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.18
sys/dev/fdt/fdt_panel.c: revision 1.2
sys/dev/ic/dwc_mmc.c: revision 1.19
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.5
sys/dev/ic/dwc_mmc_var.h: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.6
sys/arch/evbarm/conf/GENERIC64: revision 1.122
sys/dev/ic/dwc_mmc_var.h: revision 1.11
sys/dev/fdt/files.fdt: revision 1.50
sys/arch/evbarm/conf/GENERIC64: revision 1.123
sys/arch/arm/rockchip/rk_i2s.c: revision 1.2
sys/arch/arm/rockchip/files.rockchip: revision 1.23
sys/arch/evbarm/conf/GENERIC64: revision 1.124
sys/dev/ic/anx_dp.c: revision 1.1
rkpmic: add RTC support; register w/ todr(9)
rkpmic: correct delay
Add support for SDIO interrupts.
fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
add RK3399 eDP clocks
add RK3399 DisplayPort clocks
style fix/KNF
rk3399_cru: implement dclk_vop0_frac and dclk_vop1_frac
Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
rkvop: set stride using virtual framebuffer width instead of display mode
rk3399_cru: Reparent dclk_vop[01] to gpll via dclk_vop[01]_frac.
The previous source of dclk_vop[01] was vpll via dclk_vop[01]_div.
vpll is apparently used directly as a pixel clock source for the
HDMI PHY, and we don't want the other VOP's dclk changing out from
under it because we can't handle finding a replacement clock source
with the right rate yet.
gpll happens to run at 594MHz, which works well as a basis for pixel
clocks.
Linux suggests that the source clock of the fractional divider needs
to be more than twenty times greater than the resulting clock (or some
intermediate clock?) for output stability. This may not be the case
with 594MHz and the common pixel clocks I see used by displays in my
area of the wild, but it works for now.
add Analogix DisplayPort core driver
add Rockchip (RK3399) glue for Analogix DisplayPort core
add anxdp(4)
Add another panel@fdt driver, this time for DRM-style panels.
To do: migrate away from other panel driver.
enable panel at fdt drivers
paper over the rkpwm get_conf function that otherwise doesn't seem to
let things work
add template bits for optional eDP panel on RockPro64
Abort panel driver attach if required regulator is missing.
Add clk provider
Add Pinebook Pro dts, from Manjaro Linux.
https://gitlab.manjaro.org/tsys/linux-pinebook-pro/blob/877ca0e7283596f37845de50dc36bff5b88b91e1/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+ rk3399-pinebook-pro.dts
Attach mmcpwrseq resource earlier
dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs
Fix performance regression with previous
Quiet chatty printfs
No need to print all supported levels at attach, print the range and total number of steps
Disable SPI for now (rkspi driver hangs at boot)
Add driver for simple-audio-amplifier binding
Add driver for Everest Semi ES8316 Low Power Audio CODEC
add es8316, simpleamp
Avoid sleeping while the audio intr lock is held.
If the rockchip,system-power-controller property is present, try to power off with the PMIC
Add HAILUCK keyboard (product 1e)
Add a quirk for the HAILUCK USB keyboard / touchpad device with product 1e.
The keyboard does not function properly unless the touchpad's intr endpoint
is active.
Add driver for CellWise CW2015 Fuel Gauge IC.
add cwfg
Emit PMFE_DISPLAY_{ON,OFF} events in response to DPMS requests.
If the backlight node does not have an enable gpio, set the lowest duty
cycle to turn the display off instead.
Attach psci as early as possible. This allows other power controllers to
register their own poweroff / reset callbacks with a higher preference.
Add 2000 MHz to available armclkb rates
Remove debug printfs
|
| 1.1.2.2 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.1.2.1 | 16-Nov-2019 |
martin | file rk_i2s.c was added on branch netbsd-9 on 2019-11-16 16:48:25 +0000
|
| 1.2.2.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.3.8.2 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.3.8.1 | 03-Jan-2021 |
thorpej | Sync w/ HEAD.
|
| 1.3.6.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.3.6.1 | 29-Feb-2020 |
martin | file rk_i2s.c was added on branch phil-wifi on 2020-04-13 08:03:37 +0000
|
| 1.4 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.3 | 30-Jun-2018 |
jmcneill | Use syscon API
|
| 1.2 | 16-Jun-2018 |
jmcneill | branches: 1.2.2; 1.2.4;
Remove unused defines
|
| 1.1 | 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.2.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2.2.4 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.2.2.3 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.1 | 16-Jun-2018 |
pgoyette | file rk_iomux.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.18 | 06-Sep-2025 |
thorpej | Refactor the "platform" defitions into fdt_platform.h
|
| 1.17 | 07-Apr-2023 |
skrll | Rename ARM_PLATFORM to FDT_PLATFORM and make it available outside arm.
|
| 1.16 | 23-Aug-2022 |
ryo | Add initial support for RK3588 SoC (CRU and IOMUX)
|
| 1.15 | 12-Nov-2021 |
jmcneill | arm: rockchip: Add support for RK3288 SoC.
The Rockchip RK3288 is a quad core Cortex-A17 SoC.
|
| 1.14 | 03-Sep-2021 |
mrg | revert "make ahcisata(4) work on rk3399 (rockpro64)" from 23-06-2021.
this problem is known to affect more than AHCI, and a more general
solution has been commited now.
|
| 1.13 | 23-Jun-2021 |
mrg | make ahcisata(4) work on rk3399 (rockpro64)
on rk3399, a marvell 9230 ahci sata card consistently takes between
1213 and 1216 milliseconds, the ahci spec says this should complete
in 1000 or fewer.
add a "pcie-reset-ms" uint32 property that ahcisata defaults to 1000
if not set, and the rockchip platform code sets to 2000.
ok @jmcneill
|
| 1.12 | 24-Apr-2021 |
thorpej | branches: 1.12.2;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.11 | 04-Feb-2021 |
thorpej | branches: 1.11.2;
Call acpi_device_register() / fdtbus_device_register() as approrpriate.
|
| 1.10 | 28-Sep-2020 |
jmcneill | branches: 1.10.2;
Get rid of a4x bus_space tag from fdtbus_attach_args. The only consumer
of this was various com(4) glue so modify all of that to use the new
com_init_regs_stride instead.
|
| 1.9 | 10-Jul-2020 |
skrll | Add support for KASAN on ARMv[67]
Thanks to maxv for many pointers and reviews.
|
| 1.8 | 30-Oct-2018 |
skrll | Retire fdt_putchar and ap_early_put_char in favour of uartputc.
|
| 1.7 | 20-Oct-2018 |
ryo | add missing .ap_mpstart for rk3399
|
| 1.6 | 18-Oct-2018 |
skrll | Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.
The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.
The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.
Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!
The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.
Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively
|
| 1.5 | 21-Sep-2018 |
skrll | Centralise defparam CONSADDR, CONSPEED, CONMODE and CONADDR into
opt_console.h and adjust.
|
| 1.4 | 10-Sep-2018 |
ryo | cleanup aarch64 mpstart and fdt bootstrap
* arm_cpu_hatch_arg is a bad idea. avoid serializing CPU startup, and eliminate arm_cpu_hatch_arg.
in mpstart, resolve own cpu index using array of cpu_mpidr[] (aarch64)
* add support fdt enable-method "spin-table"
* add support fdt enable-method "brcm,bcm2836-smp" (for 32bit RaspberryPi)
* use arm_fdt_cpu_bootstrap() instead of psci_fdt_bootstrap()
* rename "arm/fdt/psci_fdt.h" to "arm/fdt/psci_fdtvar.h" because of conflict of include file for needs-flag
* add devmap for cpu spin-table of raspberrypi3/aarch64
* no need to force hatch APs for raspberrypi3/arm32 ifndef MULTIPROCESSOR.
* fix to work pmap_extract(kerneltext/data/bss) even if before calling pmap_bootstrap
idea to use cpu_mpidr[] by jmcneill@. reviewd by skrll@. thanks.
|
| 1.3 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.2 | 05-Aug-2018 |
skrll | Add prefixes to struct arm_platform{,_info} members.
No functional change.
|
| 1.1 | 16-Jun-2018 |
jmcneill | branches: 1.1.2; 1.1.4;
Add initial support for Rockchip RK3328 SoC.
|
| 1.1.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.2.6 | 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
| 1.1.2.5 | 20-Oct-2018 |
pgoyette | Sync with head
|
| 1.1.2.4 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
|
| 1.1.2.3 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.1.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.1.2.1 | 16-Jun-2018 |
pgoyette | file rk_platform.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.10.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.11.2.1 | 03-Apr-2021 |
thorpej | - FDT device enumeration now sets the device handle using CFARG_DEVHANDLE.
- fdtbus_device_register() is now obsolete, so G/C it.
- of_device_register() is now obsolete, so G/C it.
|
| 1.12.2.1 | 01-Aug-2021 |
thorpej | Sync with HEAD.
|
| 1.7 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.6 | 27-Jan-2021 |
thorpej | Use DEVICE_COMPAT_EOL.
|
| 1.5 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.4 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.3 | 19-Dec-2019 |
jakllsch | branches: 1.3.8;
paper over the rkpwm get_conf function that otherwise doesn't seem to
let things work
|
| 1.2 | 18-Oct-2019 |
skrll | Use PRIxBUSADDR
|
| 1.1 | 01-May-2019 |
jmcneill | branches: 1.1.2; 1.1.4;
Add support for RK3399 PWM controller.
|
| 1.1.4.1 | 21-Jan-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #616):
sys/dev/ic/anx_dp.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.126
sys/dev/ic/anx_dp.h: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.128
sys/dev/ic/anx_dp.h: revision 1.2
sys/dev/fdt/dwcmmc_fdt.c: revision 1.9
sys/dev/i2c/cwfg.c: revision 1.1
sys/conf/files: revision 1.1247
sys/dev/fdt/pwm_backlight.c: revision 1.5
sys/dev/fdt/pwm_backlight.c: revision 1.6
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.14
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.15
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.16
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.17
sys/dev/ic/dwc_mmc.c: revision 1.20
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.18
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.19
sys/dev/usb/usbdevs: revision 1.775
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.4
sys/dev/fdt/simple_amplifier.c: revision 1.1
sys/dev/i2c/files.i2c: revision 1.105
sys/arch/evbarm/conf/GENERIC64: revision 1.117
sys/arch/evbarm/conf/GENERIC64: revision 1.118
sys/dev/i2c/files.i2c: revision 1.107
sys/dev/fdt/files.fdt: revision 1.49
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.1
sys/dev/ic/dwc_mmc_var.h: revision 1.9
sys/dev/i2c/rkpmic.c: revision 1.4
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.2
sys/dev/i2c/rkpmic.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.6
sys/arch/arm/rockchip/rk_vop.c: revision 1.4
sys/arch/arm/rockchip/rk_vop.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.8
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.1
sys/dev/usb/ums.c: revision 1.96 (via patch)
sys/arch/arm/rockchip/rk_pwm.c: revision 1.3
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.2
sys/dev/i2c/es8316ac.c: revision 1.1
sys/dev/fdt/dwcmmc_fdt.c: revision 1.10
sys/dev/i2c/es8316ac.c: revision 1.2
sys/dev/fdt/fdt_panel.c: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.18
sys/dev/fdt/fdt_panel.c: revision 1.2
sys/dev/ic/dwc_mmc.c: revision 1.19
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.5
sys/dev/ic/dwc_mmc_var.h: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.6
sys/arch/evbarm/conf/GENERIC64: revision 1.122
sys/dev/ic/dwc_mmc_var.h: revision 1.11
sys/dev/fdt/files.fdt: revision 1.50
sys/arch/evbarm/conf/GENERIC64: revision 1.123
sys/arch/arm/rockchip/rk_i2s.c: revision 1.2
sys/arch/arm/rockchip/files.rockchip: revision 1.23
sys/arch/evbarm/conf/GENERIC64: revision 1.124
sys/dev/ic/anx_dp.c: revision 1.1
rkpmic: add RTC support; register w/ todr(9)
rkpmic: correct delay
Add support for SDIO interrupts.
fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
add RK3399 eDP clocks
add RK3399 DisplayPort clocks
style fix/KNF
rk3399_cru: implement dclk_vop0_frac and dclk_vop1_frac
Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
rkvop: set stride using virtual framebuffer width instead of display mode
rk3399_cru: Reparent dclk_vop[01] to gpll via dclk_vop[01]_frac.
The previous source of dclk_vop[01] was vpll via dclk_vop[01]_div.
vpll is apparently used directly as a pixel clock source for the
HDMI PHY, and we don't want the other VOP's dclk changing out from
under it because we can't handle finding a replacement clock source
with the right rate yet.
gpll happens to run at 594MHz, which works well as a basis for pixel
clocks.
Linux suggests that the source clock of the fractional divider needs
to be more than twenty times greater than the resulting clock (or some
intermediate clock?) for output stability. This may not be the case
with 594MHz and the common pixel clocks I see used by displays in my
area of the wild, but it works for now.
add Analogix DisplayPort core driver
add Rockchip (RK3399) glue for Analogix DisplayPort core
add anxdp(4)
Add another panel@fdt driver, this time for DRM-style panels.
To do: migrate away from other panel driver.
enable panel at fdt drivers
paper over the rkpwm get_conf function that otherwise doesn't seem to
let things work
add template bits for optional eDP panel on RockPro64
Abort panel driver attach if required regulator is missing.
Add clk provider
Add Pinebook Pro dts, from Manjaro Linux.
https://gitlab.manjaro.org/tsys/linux-pinebook-pro/blob/877ca0e7283596f37845de50dc36bff5b88b91e1/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+ rk3399-pinebook-pro.dts
Attach mmcpwrseq resource earlier
dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs
Fix performance regression with previous
Quiet chatty printfs
No need to print all supported levels at attach, print the range and total number of steps
Disable SPI for now (rkspi driver hangs at boot)
Add driver for simple-audio-amplifier binding
Add driver for Everest Semi ES8316 Low Power Audio CODEC
add es8316, simpleamp
Avoid sleeping while the audio intr lock is held.
If the rockchip,system-power-controller property is present, try to power off with the PMIC
Add HAILUCK keyboard (product 1e)
Add a quirk for the HAILUCK USB keyboard / touchpad device with product 1e.
The keyboard does not function properly unless the touchpad's intr endpoint
is active.
Add driver for CellWise CW2015 Fuel Gauge IC.
add cwfg
Emit PMFE_DISPLAY_{ON,OFF} events in response to DPMS requests.
If the backlight node does not have an enable gpio, set the lowest duty
cycle to turn the display off instead.
Attach psci as early as possible. This allows other power controllers to
register their own poweroff / reset callbacks with a higher preference.
Add 2000 MHz to available armclkb rates
Remove debug printfs
|
| 1.1.2.4 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.1.2.3 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.1.2.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.2.1 | 01-May-2019 |
christos | file rk_pwm.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000
|
| 1.3.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.11 | 10-Sep-2025 |
thorpej | Garbage-collect fdtbus_attach_spibus(). spibus_attach() does everything
now.
|
| 1.10 | 10-Sep-2025 |
thorpej | Register the SPI controller with FDT in spi_attach(), not in each
driver.
|
| 1.9 | 10-Sep-2025 |
thorpej | It is not necessary to pass the phandle separately to fdtbus_spi_*(); it
can be retrieved from the device_t.
|
| 1.8 | 10-Sep-2025 |
thorpej | Don't bother registering a function that returns a SPI controller; just
register the controller directly.
|
| 1.7 | 15-May-2021 |
mrg | branches: 1.7.8;
add SPI support to rk3328, tested on rock64.
simply adding the SPI clocks (and pwm while here) and enabling
the config match was sufficient, though my first rock64 seems
to have a deal SPI now (does not probe in u-boot or netbsd.)
|
| 1.6 | 27-Jan-2021 |
thorpej | branches: 1.6.4; 1.6.6;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.5 | 15-Jan-2021 |
ryo | use fdtbus_intr_establish_xname
|
| 1.4 | 01-Apr-2020 |
tnn | branches: 1.4.4; 1.4.6;
Don't fail if we cannot compute the clock divider because the master
clock is too slow for what the slave device requested.
Instead warn and select the highest available slave clock rate.
Should fix boot hang on Pinebook Pro when using spiflash(4).
|
| 1.3 | 13-Aug-2019 |
tnn | branches: 1.3.2;
rk_spi: register controller with fdt
|
| 1.2 | 13-Aug-2019 |
tnn | ensure spibus_attach_args is zero'ed
|
| 1.1 | 05-Aug-2019 |
tnn | rk_spi: Rockchip SPI driver
Match only on RK3399 for now, but should work on RK3328 as well with
the proper CRU support. If you can, please test and enable for RK3328.
|
| 1.3.2.2 | 20-Nov-2019 |
martin | Pull up following revision(s) (requested by tnn in ticket #458):
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.9
sys/arch/arm/rockchip/rk_spi.c: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.104
sys/arch/arm/rockchip/files.rockchip: revision 1.20
rk3399_cru: add definitions for SPI clocks
rk_spi: Rockchip SPI driver
Match only on RK3399 for now, but should work on RK3328 as well with
the proper CRU support. If you can, please test and enable for RK3328.
rkspi* at fdt?
|
| 1.3.2.1 | 13-Aug-2019 |
martin | file rk_spi.c was added on branch netbsd-9 on 2019-11-20 16:49:58 +0000
|
| 1.4.6.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.4.4.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.4.4.1 | 01-Apr-2020 |
martin | file rk_spi.c was added on branch phil-wifi on 2020-04-13 08:03:37 +0000
|
| 1.6.6.1 | 31-May-2021 |
cjep | sync with head
|
| 1.6.4.2 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.6.4.1 | 19-May-2021 |
thorpej | - As with i2c, just register the spi_controller directly.
- fdtbus_attach_spibus() is no longer anything other than a wrapper
around config_found(); just get rid of it and make its callers
look like all of the other SPI controller drivers.
|
| 1.7.8.2 | 18-Jan-2022 |
thorpej | G/C fdtbus_register_spi_controller(); it serves no purpose in the new
universe.
|
| 1.7.8.1 | 09-Aug-2021 |
thorpej | Port over the changes from thorpej-i2c-spi-conf to thorpej-i2c-spi-conf2,
which is based on a newer HEAD revision.
|
| 1.1 | 03-Jun-2025 |
rjs | branches: 1.1.4;
Add driver for Rockchip USB-C PHY, mostly from OpenBSD.
Only implements USB3 for now, not DP.
|
| 1.1.4.2 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.1.4.1 | 03-Jun-2025 |
perseant | file rk_tcphy.c was added on branch perseant-exfatfs on 2025-08-02 05:55:29 +0000
|
| 1.16 | 11-Dec-2021 |
mrg | remove clause 3 from all my licenses that aren't conflicting with
another copyright claim line. again. (i did this in 2008 and then
did not update all of my personal templates.)
|
| 1.15 | 13-Nov-2021 |
jmcneill | Add support for RK3288 temperature sensors.
|
| 1.14 | 11-Sep-2021 |
andvar | Add missing double p and d for stopped and overriden accordingly.
Fix few more typos along the way, mainly in copy-pasted comments.
|
| 1.13 | 12-Jun-2021 |
mrg | fix comment to talk about correct units (kelvin, not seconds).
|
| 1.12 | 27-Jan-2021 |
thorpej | branches: 1.12.4;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.11 | 27-Jan-2021 |
thorpej | Use DEVICE_COMPAT_EOL.
|
| 1.10 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.9 | 19-Jan-2021 |
thorpej | Use device_compatible_entry / of_search_compatible() rather than
matching against multiple sets of compatibility strings.
|
| 1.8 | 15-Jan-2021 |
ryo | use fdtbus_intr_establish_xname
|
| 1.7 | 03-Jul-2019 |
jmcneill | branches: 1.7.10;
Set correct bits when enabling gpio tshut mode
|
| 1.6 | 01-Jun-2019 |
joerg | branches: 1.6.2;
Loop variables work better when they are initialized.
|
| 1.5 | 15-May-2019 |
mrg | support RK3328 tsadc:
- add clk_24m, clk_tsadc and pclk_tsadc rk3328 clocks
- rk3328 data<->temp conversion table is is wrong. the actual values
seen are 4096 - <expected>, and the linux driver has these values
in the inverted value directly
- the above means the rk3328 is increasing data for increasing temp,
and the min/max values are also inverted and swapped
- move auto-period into the rk_data
- rk3328 only has one sensor, deal with this
- rename rk_data_table as rk_data, and also s/rdt/rd/
thanks to jmcneill who helped clean up clocks confusion, and pointed
out the linux driver values matched my own inverted data experience.
|
| 1.4 | 14-May-2019 |
mrg | mostly port to rk3328.
- add rk3328 data<->temp table, and adjust code to use this vs rk3399
table for rk3328. add support for decrementing data.
- adjust auto period times for rk3328 vs rk3399
- add min/max data values, if data is outside these values mark the
sensor invalid.
- move init code into cpu specific sections, add rk3328 support
with a rk3328_cru.c update to add clocks, this attaches and reports
garbage values, so for now it's disabled.
|
| 1.3 | 26-Apr-2019 |
mrg | re-#if 0 some testing code.
|
| 1.2 | 26-Apr-2019 |
mrg | - implement sub-5degC interpolation.
- avoid setting TSADC_AUTO_CON_SRC*_EN twice
|
| 1.1 | 26-Apr-2019 |
mrg | implement TSADC driver for rockchip RK3328 and RK3399. so far, only
tested on RK3399 but the RK3328 looks mostly the same and has a good
chance of working too.
add clock entries for "clk_tsadc" and "pclk_tsadc" to cru.
exports "CPU" and "GPU" temp sensors. these currently limited to 5
degC resolution but can be reduced to sub 1 degC resolution with some
interpolation.
todo list:
- handle setting various temp values
- add interpolation between the 5degC intervals in sample data
- handle DT trips/temp value defaults
- interrupts aren't triggered (test by lowering warn/crit values),
and once they work, make the interrupt do something
- test on RK3328, and port to other rockchips (will require moving
some part into per-chipset sections, such as code<->temp tables)
thanks to jmcneill for help.
|
| 1.6.2.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.6.2.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.6.2.1 | 01-Jun-2019 |
christos | file rk_tsadc.c was added on branch phil-wifi on 2019-06-10 22:05:56 +0000
|
| 1.7.10.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.12.4.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.13 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.12 | 24-Apr-2021 |
thorpej | branches: 1.12.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.11 | 27-Jan-2021 |
thorpej | branches: 1.11.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.10 | 27-Jan-2021 |
thorpej | Use DEVICE_COMPAT_EOL.
|
| 1.9 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.8 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.7 | 09-Sep-2018 |
aymeric | branches: 1.7.12;
Pass clock provider's phandle to fdtbus_clock_controller_func.decode()
and update callers.
This allows to accomodate clock managers whose clocks are identified
directly by a clock instead of a pair (clock provider, index).
ok jmcneill@ on port-arm
|
| 1.6 | 12-Aug-2018 |
jmcneill | Fix USB2 on RK3399
|
| 1.5 | 12-Aug-2018 |
jmcneill | Remove a sneaky KASSERT
|
| 1.4 | 12-Aug-2018 |
jmcneill | Add support for Rockchip RK3399 SoC.
|
| 1.3 | 30-Jun-2018 |
jmcneill | Use syscon API
|
| 1.2 | 20-Jun-2018 |
jmcneill | branches: 1.2.2; 1.2.4;
Add missing return in error path
|
| 1.1 | 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.2.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2.2.5 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
|
| 1.2.2.4 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.2.2.3 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.2.2.1 | 20-Jun-2018 |
pgoyette | file rk_usb.c was added on branch pgoyette-compat on 2018-06-25 07:25:39 +0000
|
| 1.7.12.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.11.2.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.12.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.11 | 24-Apr-2023 |
mrg | enable rkv1crypto on rock64.
this comes from upstream d1152bc533c941f7e267bf53d344cee510ea2808.
(i tried to make this be in rk3328.dtsi so all rk3328 boards would
benefit, but it doesn't work, and this is the only one have to test.)
adjust rkv1crypto to support a per-platform clocks setup.
|
| 1.10 | 13-May-2022 |
riastradh | branches: 1.10.4;
rkv1crypto(4): Fix units in RNG repeated-output health test.
This code was intended to check whether the two 4-word halves of an
8-word, 32-byte, 256-bit sample were repeated.
Instead, it accidentally checked whether the first 4 _bytes_ of the
two halves were repeated.
The effect was a false alarm rate of 1/2^32, instead of a false alarm
rate of 1/2^128, with no change on the true alarm rate in the event
of an RNG wedged producing all-zero or all-one bits. 1/2^128 is an
acceptable false alarm rate; 1/2^32, not so much.
(The false alarm right might be higher if the samples are not
perfectly uniformly distributed, which they most likey aren't,
although the documentation doesn't give any details other than
suggesting it's a ring oscillator under the hood, which provides
entropy from jitter induced by thermal noise. This driver records
half a bit of entropy per bit of sample to be reasonably
conservative.)
|
| 1.9 | 08-Apr-2022 |
riastradh | rk_v1crypto(4): Fix missing `error =' assignment.
This is not likely to fail, but let's avoid suppressing an unlikely
error.
|
| 1.8 | 19-Mar-2022 |
riastradh | rnd(9): Adjust IPL of locks used by rndsource callbacks.
These no longer ever run from hard interrupt context or with a spin
lock held, so there is no longer any need to have them at IPL_VM to
block hard interrupts. Instead, lower them to IPL_SOFTSERIAL.
|
| 1.7 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.6 | 27-Jan-2021 |
thorpej | Use DEVICE_COMPAT_EOL.
|
| 1.5 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.4 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.3 | 19-Oct-2020 |
tnn | branches: 1.3.2;
bus_space_write_4 does not have a return value
|
| 1.2 | 17-May-2020 |
riastradh | branches: 1.2.2;
Use rnd_add_data_sync from the callback.
(Doesn't make a difference in HEAD but this is the stated API
contract and it matters if we want to pull this up.)
|
| 1.1 | 17-May-2020 |
riastradh | Rockchip crypto engine RNG driver.
As found on the rk3288 and rk3399. This driver only supports the
TRNG, not the rest of the crypto engine, although it uses the AES unit
to do a self-test at attach time to verify that the engine works.
There seem to be two versions of the Rockchip crypto engine, v1 and
v2; this one is for v1. Can't name a driver `rkcryptov1' so we'll
clumsily call it `rkv1crypto' instead to leave room for `rkv2crypto'
later on.
The crypto binding derived from the Rockchip BSP Linux kernel, in the
location it appears on the rk3399, is in rk3399-crypto.dtsi, since
there doesn't seem to be a better place to put it at the moment among
this twisty maze of inclusions, all different.
|
| 1.2.2.2 | 18-May-2020 |
martin | Pull up following revision(s) (requested by riastradh in ticket #913):
sys/arch/arm/dts/rk3399-crypto.dtsi: revision 1.1
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.1
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.2 (plus patch)
sys/arch/arm/rockchip/rk_v1crypto.h: revision 1.1
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.3
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.20
sys/arch/evbarm/conf/GENERIC64: revision 1.158
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.11
sys/arch/arm/rockchip/files.rockchip: revision 1.24
Rockchip crypto engine RNG driver.
As found on the rk3288 and rk3399. This driver only supports the
TRNG, not the rest of the crypto engine, although it uses the AES unit
to do a self-test at attach time to verify that the engine works.
There seem to be two versions of the Rockchip crypto engine, v1 and
v2; this one is for v1. Can't name a driver `rkcryptov1' so we'll
clumsily call it `rkv1crypto' instead to leave room for `rkv2crypto'
later on.
The crypto binding derived from the Rockchip BSP Linux kernel, in the
location it appears on the rk3399, is in rk3399-crypto.dtsi, since
there doesn't seem to be a better place to put it at the moment among
this twisty maze of inclusions, all different.
Use rnd_add_data_sync from the callback.
(Doesn't make a difference in HEAD but this is the stated API
contract and it matters if we want to pull this up.)
Prime the pool on attach.
|
| 1.2.2.1 | 17-May-2020 |
martin | file rk_v1crypto.c was added on branch netbsd-9 on 2020-05-18 18:54:30 +0000
|
| 1.3.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.10.4.1 | 02-May-2023 |
martin | Pull up following revision(s) (requested by mrg in ticket #154):
sys/arch/arm/dts/rk3328-crypto.dtsi: revision 1.1
sys/arch/arm/dts/rk3328-rock64.dts: revision 1.8
sys/arch/arm/rockchip/rk3328_cru.c: revision 1.10
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.11
enable rkv1crypto on rock64.
this comes from upstream d1152bc533c941f7e267bf53d344cee510ea2808.
(i tried to make this be in rk3328.dtsi so all rk3328 boards would
benefit, but it doesn't work, and this is the only one have to test.)
adjust rkv1crypto to support a per-platform clocks setup.
|
| 1.1 | 17-May-2020 |
riastradh | branches: 1.1.2;
Rockchip crypto engine RNG driver.
As found on the rk3288 and rk3399. This driver only supports the
TRNG, not the rest of the crypto engine, although it uses the AES unit
to do a self-test at attach time to verify that the engine works.
There seem to be two versions of the Rockchip crypto engine, v1 and
v2; this one is for v1. Can't name a driver `rkcryptov1' so we'll
clumsily call it `rkv1crypto' instead to leave room for `rkv2crypto'
later on.
The crypto binding derived from the Rockchip BSP Linux kernel, in the
location it appears on the rk3399, is in rk3399-crypto.dtsi, since
there doesn't seem to be a better place to put it at the moment among
this twisty maze of inclusions, all different.
|
| 1.1.2.2 | 18-May-2020 |
martin | Pull up following revision(s) (requested by riastradh in ticket #913):
sys/arch/arm/dts/rk3399-crypto.dtsi: revision 1.1
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.1
sys/arch/arm/rockchip/rk_v1crypto.c: revision 1.2 (plus patch)
sys/arch/arm/rockchip/rk_v1crypto.h: revision 1.1
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.3
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.20
sys/arch/evbarm/conf/GENERIC64: revision 1.158
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.11
sys/arch/arm/rockchip/files.rockchip: revision 1.24
Rockchip crypto engine RNG driver.
As found on the rk3288 and rk3399. This driver only supports the
TRNG, not the rest of the crypto engine, although it uses the AES unit
to do a self-test at attach time to verify that the engine works.
There seem to be two versions of the Rockchip crypto engine, v1 and
v2; this one is for v1. Can't name a driver `rkcryptov1' so we'll
clumsily call it `rkv1crypto' instead to leave room for `rkv2crypto'
later on.
The crypto binding derived from the Rockchip BSP Linux kernel, in the
location it appears on the rk3399, is in rk3399-crypto.dtsi, since
there doesn't seem to be a better place to put it at the moment among
this twisty maze of inclusions, all different.
Use rnd_add_data_sync from the callback.
(Doesn't make a difference in HEAD but this is the stated API
contract and it matters if we want to pull this up.)
Prime the pool on attach.
|
| 1.1.2.1 | 17-May-2020 |
martin | file rk_v1crypto.h was added on branch netbsd-9 on 2020-05-18 18:54:30 +0000
|
| 1.16 | 20-Dec-2021 |
riastradh | rkdrm: Implement vblank.
|
| 1.15 | 19-Dec-2021 |
riastradh | rkdrm: Implement atomic disable for planes.
|
| 1.14 | 19-Dec-2021 |
riastradh | rkdrm: Reset vop for 10us on attach.
This avoids creepy lines slowly appearing, and freezing themselves
semipermanently on the display, until the first successful modeset.
|
| 1.13 | 19-Dec-2021 |
riastradh | rkdrm: Convert to atomic modesetting, as needed for bridges.
Author: Jared McNeill <jmcneill@invisible.ca>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.12 | 19-Dec-2021 |
riastradh | Sort includes.
|
| 1.11 | 19-Dec-2021 |
riastradh | Get drm to build on arm64 again.
Author: Jared McNeill <jmcneill@NetBSD.org>
Committer: Taylor R Campbell <riastradh@NetBSD.org>
|
| 1.10 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.9 | 27-Jan-2021 |
thorpej | Use DEVICE_COMPAT_EOL.
|
| 1.8 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.7 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.6 | 05-Jan-2020 |
mrg | branches: 1.6.8; 1.6.10;
in rk_vop_dpms() set or unset the VOP_STANDBY_EN bit in VOP_SYS_CTRL
depending on the dpms mode requested.
this makes pinebook pro display actually turn off when dpms asks.
|
| 1.5 | 17-Dec-2019 |
jakllsch | rkvop: set stride using virtual framebuffer width instead of display mode
|
| 1.4 | 17-Dec-2019 |
jakllsch | Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
|
| 1.3 | 15-Dec-2019 |
mrg | rework slightly to avoid stupid gcc warnings.
ok jmcneill.
|
| 1.2 | 14-Nov-2019 |
jmcneill | branches: 1.2.2;
Fix a few swapped fields
|
| 1.1 | 09-Nov-2019 |
jmcneill | WIP display driver for Rockchip RK3399
|
| 1.2.2.5 | 21-Jan-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #616):
sys/dev/ic/anx_dp.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.126
sys/dev/ic/anx_dp.h: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.128
sys/dev/ic/anx_dp.h: revision 1.2
sys/dev/fdt/dwcmmc_fdt.c: revision 1.9
sys/dev/i2c/cwfg.c: revision 1.1
sys/conf/files: revision 1.1247
sys/dev/fdt/pwm_backlight.c: revision 1.5
sys/dev/fdt/pwm_backlight.c: revision 1.6
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.14
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.15
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.16
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.17
sys/dev/ic/dwc_mmc.c: revision 1.20
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.18
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.19
sys/dev/usb/usbdevs: revision 1.775
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.4
sys/dev/fdt/simple_amplifier.c: revision 1.1
sys/dev/i2c/files.i2c: revision 1.105
sys/arch/evbarm/conf/GENERIC64: revision 1.117
sys/arch/evbarm/conf/GENERIC64: revision 1.118
sys/dev/i2c/files.i2c: revision 1.107
sys/dev/fdt/files.fdt: revision 1.49
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.1
sys/dev/ic/dwc_mmc_var.h: revision 1.9
sys/dev/i2c/rkpmic.c: revision 1.4
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.2
sys/dev/i2c/rkpmic.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.6
sys/arch/arm/rockchip/rk_vop.c: revision 1.4
sys/arch/arm/rockchip/rk_vop.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.8
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.1
sys/dev/usb/ums.c: revision 1.96 (via patch)
sys/arch/arm/rockchip/rk_pwm.c: revision 1.3
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.2
sys/dev/i2c/es8316ac.c: revision 1.1
sys/dev/fdt/dwcmmc_fdt.c: revision 1.10
sys/dev/i2c/es8316ac.c: revision 1.2
sys/dev/fdt/fdt_panel.c: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.18
sys/dev/fdt/fdt_panel.c: revision 1.2
sys/dev/ic/dwc_mmc.c: revision 1.19
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.5
sys/dev/ic/dwc_mmc_var.h: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.6
sys/arch/evbarm/conf/GENERIC64: revision 1.122
sys/dev/ic/dwc_mmc_var.h: revision 1.11
sys/dev/fdt/files.fdt: revision 1.50
sys/arch/evbarm/conf/GENERIC64: revision 1.123
sys/arch/arm/rockchip/rk_i2s.c: revision 1.2
sys/arch/arm/rockchip/files.rockchip: revision 1.23
sys/arch/evbarm/conf/GENERIC64: revision 1.124
sys/dev/ic/anx_dp.c: revision 1.1
rkpmic: add RTC support; register w/ todr(9)
rkpmic: correct delay
Add support for SDIO interrupts.
fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
add RK3399 eDP clocks
add RK3399 DisplayPort clocks
style fix/KNF
rk3399_cru: implement dclk_vop0_frac and dclk_vop1_frac
Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
rkvop: set stride using virtual framebuffer width instead of display mode
rk3399_cru: Reparent dclk_vop[01] to gpll via dclk_vop[01]_frac.
The previous source of dclk_vop[01] was vpll via dclk_vop[01]_div.
vpll is apparently used directly as a pixel clock source for the
HDMI PHY, and we don't want the other VOP's dclk changing out from
under it because we can't handle finding a replacement clock source
with the right rate yet.
gpll happens to run at 594MHz, which works well as a basis for pixel
clocks.
Linux suggests that the source clock of the fractional divider needs
to be more than twenty times greater than the resulting clock (or some
intermediate clock?) for output stability. This may not be the case
with 594MHz and the common pixel clocks I see used by displays in my
area of the wild, but it works for now.
add Analogix DisplayPort core driver
add Rockchip (RK3399) glue for Analogix DisplayPort core
add anxdp(4)
Add another panel@fdt driver, this time for DRM-style panels.
To do: migrate away from other panel driver.
enable panel at fdt drivers
paper over the rkpwm get_conf function that otherwise doesn't seem to
let things work
add template bits for optional eDP panel on RockPro64
Abort panel driver attach if required regulator is missing.
Add clk provider
Add Pinebook Pro dts, from Manjaro Linux.
https://gitlab.manjaro.org/tsys/linux-pinebook-pro/blob/877ca0e7283596f37845de50dc36bff5b88b91e1/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+ rk3399-pinebook-pro.dts
Attach mmcpwrseq resource earlier
dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs
Fix performance regression with previous
Quiet chatty printfs
No need to print all supported levels at attach, print the range and total number of steps
Disable SPI for now (rkspi driver hangs at boot)
Add driver for simple-audio-amplifier binding
Add driver for Everest Semi ES8316 Low Power Audio CODEC
add es8316, simpleamp
Avoid sleeping while the audio intr lock is held.
If the rockchip,system-power-controller property is present, try to power off with the PMIC
Add HAILUCK keyboard (product 1e)
Add a quirk for the HAILUCK USB keyboard / touchpad device with product 1e.
The keyboard does not function properly unless the touchpad's intr endpoint
is active.
Add driver for CellWise CW2015 Fuel Gauge IC.
add cwfg
Emit PMFE_DISPLAY_{ON,OFF} events in response to DPMS requests.
If the backlight node does not have an enable gpio, set the lowest duty
cycle to turn the display off instead.
Attach psci as early as possible. This allows other power controllers to
register their own poweroff / reset callbacks with a higher preference.
Add 2000 MHz to available armclkb rates
Remove debug printfs
|
| 1.2.2.4 | 09-Jan-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #613):
sys/arch/arm/rockchip/rk_vop.c: revision 1.6
in rk_vop_dpms() set or unset the VOP_STANDBY_EN bit in VOP_SYS_CTRL
depending on the dpms mode requested.
this makes pinebook pro display actually turn off when dpms asks.
|
| 1.2.2.3 | 17-Dec-2019 |
martin | Pull up following revision(s) (requested by mrg in ticket #556):
sys/arch/arm/rockchip/rk_vop.c: revision 1.3
rework slightly to avoid stupid gcc warnings.
ok jmcneill.
|
| 1.2.2.2 | 16-Nov-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #427):
sys/dev/ic/dw_hdmi_phy.c: revision 1.2
sys/dev/ic/dw_hdmi.c: revision 1.4
sys/dev/fdt/ausoc.c: revision 1.5
sys/dev/ic/dw_hdmi.h: revision 1.2
sys/dev/ic/dw_hdmi.h: revision 1.3
sys/dev/ic/dw_hdmi.h: revision 1.4
sys/conf/files: revision 1.1242
sys/dev/fdt/fdtvar.h: revision 1.57
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.11
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.12
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.13
sys/arch/evbarm/conf/GENERIC64: revision 1.110
sys/arch/arm/rockchip/rk_drm.c: revision 1.1
sys/arch/arm/rockchip/rk_drm.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.112
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.1
sys/dev/fdt/fdt_clock.c: revision 1.10
sys/arch/evbarm/conf/GENERIC64: revision 1.113
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.2
sys/arch/arm/rockchip/rk_drm.h: revision 1.1
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.3
sys/arch/arm/rockchip/rk_fb.c: revision 1.1
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.9
sys/arch/arm/rockchip/rk_vop.c: revision 1.1
sys/arch/arm/rockchip/rk_vop.c: revision 1.2
sys/arch/arm/rockchip/rk_i2c.c: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.6
sys/arch/arm/rockchip/rk_cru.h: revision 1.7
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.4
sys/arch/arm/rockchip/rk_cru_composite.c: revision 1.5
sys/arch/arm/rockchip/files.rockchip: revision 1.21
sys/arch/arm/rockchip/rk_i2s.c: revision 1.1
sys/arch/arm/rockchip/files.rockchip: revision 1.22
sys/dev/ic/dw_hdmi.c: revision 1.2
sys/dev/ic/dw_hdmi_phy.c: revision 1.1
sys/dev/ic/dw_hdmi.c: revision 1.3
Support reads of more than 32 bytes in a single xfer.
Add support for internal DesignWare HDMI PHYs
Add fdtbus_clock_enable and fdtbus_clock_enable_index shortcuts
Add HDMI and VOP clocks
WIP display driver for Rockchip RK3399
Add (commented out) Rockchip display support
Select the correct MPLL and PHY settings for the requested pixel clock
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
Fix typo in phy config table
Fix a few swapped fields
Remove debug output
Enable Rockchip display support
Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk
Add I2S audio input support.
Add software volume controls.
Add support for I2S clocks.
Add driver for Rockchip I2S/PCM controller.
Enable HDMI audio on ROCKPro64
Add rki2s
Add audio support
|
| 1.2.2.1 | 14-Nov-2019 |
martin | file rk_vop.c was added on branch netbsd-9 on 2019-11-16 16:48:25 +0000
|
| 1.6.10.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.6.8.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.6.8.1 | 05-Jan-2020 |
martin | file rk_vop.c was added on branch phil-wifi on 2020-04-13 08:03:37 +0000
|
| 1.15 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.14 | 29-Mar-2015 |
jmcneill | branches: 1.14.2; 1.14.18;
Use shared armv7_generic_space
|
| 1.13 | 17-Jan-2015 |
jmcneill | Add Rockchip PX2 support, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.12 | 04-Jan-2015 |
jmcneill | add emac clk controls
|
| 1.11 | 02-Jan-2015 |
jmcneill | Add RK3188/RK3188+ CPU frequency setting support.
|
| 1.10 | 31-Dec-2014 |
jmcneill | fix typo in 1008MHz rate definition for rk3188
|
| 1.9 | 31-Dec-2014 |
jmcneill | Cleanup freq setting a bit. Add a table of supported rates in ~200MHz steps
from 600MHz to 1608MHz, and let the cpu.frequency parameter match the
closest available freq (without going over +50MHz).
After updating APLL, wait for PLL lock.
Do APLL changes with PLL mode set to slow, rather than the previous
(and more complex) APLL/GPLL dance.
|
| 1.8 | 31-Dec-2014 |
jmcneill | add RK3188plus freq scaling, and a 1.4GHz mode. anything above 1GHz with all 4 cores enabled seems to have trouble locking apll, needs more work
|
| 1.7 | 30-Dec-2014 |
jmcneill | add I2C driver
|
| 1.6 | 30-Dec-2014 |
jmcneill | Add support for setting RK3188/RK3188+ CPU frequency. If the SoC ID is
passed in bootargs matching RK3188 or RK3188+, and the cpu.frequency
option specifies a supported rate (currently 600, 1008, 1608 MHz), the
APLL clock will be adjusted accordingly.
|
| 1.5 | 27-Dec-2014 |
jmcneill | mmc0 on rk3188 is based on ahb clk, not gpll. add a function to control mmc0 clock as well.
|
| 1.4 | 27-Dec-2014 |
jmcneill | More clock fixes, debugging.
|
| 1.3 | 27-Dec-2014 |
jmcneill | add functions to get apll and cpu rates
|
| 1.2 | 27-Dec-2014 |
jmcneill | add helpers to get gpll and ahb clock rates
|
| 1.1 | 26-Dec-2014 |
jmcneill | Map all of core0 and core1 space and let drivers use bus_space_subregion
instead of bus_space_map. Fill in rockchip_reset.
|
| 1.14.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.14.18.1 | 29-Mar-2015 |
jdolecek | file rockchip_board.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.14.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.14.2.1 | 29-Mar-2015 |
skrll | file rockchip_board.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.4 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.3 | 29-Mar-2015 |
jmcneill | branches: 1.3.2; 1.3.18;
Use shared armv7_generic_space
|
| 1.2 | 17-Jan-2015 |
jmcneill | Add Rockchip PX2 support, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.1 | 02-Jan-2015 |
jmcneill | Add RK3188/RK3188+ CPU frequency setting support.
|
| 1.3.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.18.1 | 29-Mar-2015 |
jdolecek | file rockchip_cpufreq.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.3.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 29-Mar-2015 |
skrll | file rockchip_cpufreq.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.9 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.8 | 17-Jan-2015 |
jmcneill | branches: 1.8.2; 1.8.18;
Add Rockchip PX2 support, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.7 | 04-Jan-2015 |
jmcneill | add CLKSEL21 bits
|
| 1.6 | 31-Dec-2014 |
jmcneill | add some more bits
|
| 1.5 | 30-Dec-2014 |
jmcneill | Add support for setting RK3188/RK3188+ CPU frequency. If the SoC ID is
passed in bootargs matching RK3188 or RK3188+, and the cpu.frequency
option specifies a supported rate (currently 600, 1008, 1608 MHz), the
APLL clock will be adjusted accordingly.
|
| 1.4 | 27-Dec-2014 |
jmcneill | update some bits for rk3188
|
| 1.3 | 27-Dec-2014 |
jmcneill | More clock fixes, debugging.
|
| 1.2 | 27-Dec-2014 |
jmcneill | add functions to get apll and cpu rates
|
| 1.1 | 27-Dec-2014 |
jmcneill | add CRU reg definitions
|
| 1.8.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.8.18.1 | 17-Jan-2015 |
jdolecek | file rockchip_crureg.h was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.8.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.8.2.1 | 17-Jan-2015 |
skrll | file rockchip_crureg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.2 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.1 | 26-Dec-2014 |
jmcneill | branches: 1.1.2; 1.1.18;
Initial support for Rockchip RK3066 / RK3188 SoCs, from Hiroshi Tokuda
<tokuda@tokuda.net> on port-arm:
http://mail-index.netbsd.org/port-arm/2014/10/09/msg002651.html
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 26-Dec-2014 |
jdolecek | file rockchip_dma.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.1.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 26-Dec-2014 |
skrll | file rockchip_dma.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.7 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.6 | 20-Jun-2017 |
jmcneill | branches: 1.6.4;
Update for new dwc_mmc driver
|
| 1.5 | 03-Jan-2015 |
jmcneill | branches: 1.5.2; 1.5.12;
with 3.3V we can run this at 48MHz
|
| 1.4 | 29-Dec-2014 |
jmcneill | - Set DWC_MMC_F_FORCE_CLK
- Force max sdmmc clk to 24MHz
- Update for simpler dwcmmc clock setup
|
| 1.3 | 28-Dec-2014 |
jmcneill | remove redundant irq print
|
| 1.2 | 27-Dec-2014 |
jmcneill | set DWC_MMC_F_PWREN_CLEAR, implement set_clkdiv callback; now this works
|
| 1.1 | 27-Dec-2014 |
jmcneill | add dwcmmc glue, doesnt work yet
|
| 1.5.12.1 | 18-Jul-2017 |
snj | Pull up following revision(s) (requested by jmcneill in ticket #114):
sys/arch/arm/samsung/exynos_intr.h: revision 1.3
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.1
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.2
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.3
sys/arch/arm/sunxi/sunxi_gates.c: revision 1.1
distrib/utils/embedded/mkimage: revision 1.66
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.4
sys/arch/arm/sunxi/sunxi_rsb.c: revision 1.1
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.5
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.6
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.7
sys/dev/gpio/gpio.c: revision 1.59
sys/arch/arm/sunxi/sunxi_ccu_prediv.c: revision 1.1
sys/conf/Makefile.kern.inc: revision 1.257
sys/arch/evbarm/conf/ODROID-XU_INSTALL: file removal
sys/arch/arm/sunxi/sunxi_ccu_prediv.c: revision 1.2
sys/conf/Makefile.kern.inc: revision 1.258
sys/arch/arm/fdt/psci_fdt.h: revision 1.1
sys/arch/arm/sunxi/sunxi_resets.c: revision 1.1
sys/arch/evbarm/conf/files.sunxi: revision 1.1
sys/arch/evbarm/fdt/fdt_machdep.c: revision 1.8
sys/arch/evbarm/fdt/fdt_machdep.c: revision 1.9
sys/arch/arm/samsung/files.exynos: revision 1.22
distrib/utils/embedded/conf/armv7.conf: revision 1.13
sys/arch/arm/samsung/files.exynos: revision 1.23
sys/arch/evbarm/conf/std.tegra: revision 1.15
distrib/utils/embedded/conf/armv7.conf: revision 1.14
sys/arch/arm/samsung/files.exynos: revision 1.24
distrib/utils/embedded/conf/armv7.conf: revision 1.15
sys/arch/evbarm/sunxi/genassym.cf: revision 1.1
sys/arch/arm/samsung/exynos_fdt.c: file removal
sys/dev/fdt/fdt_pinctrl.c: revision 1.4
sys/arch/arm/samsung/exynos_sysmmu.c: revision 1.2
sys/arch/arm/sunxi/sun8i_h3_gpio.c: revision 1.1
sys/arch/arm/sunxi/sunxi_twi.c: revision 1.1
sys/dev/usb/ehci.c: revision 1.255
sys/arch/arm/sunxi/sunxi_twi.c: revision 1.2
sys/arch/arm/sunxi/sun8i_a83t_ccu.h: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.11
sys/arch/arm/cortex/gic.c: revision 1.24
distrib/evbarm/instkernel/ramdisk/Makefile: revision 1.17
etc/etc.evbarm/Makefile.inc: revision 1.87
etc/etc.evbarm/Makefile.inc: revision 1.88
sys/arch/arm/fdt/gic_fdt.c: revision 1.5
etc/Makefile: revision 1.429
sys/arch/arm/fdt/gic_fdt.c: revision 1.6
sys/arch/arm/fdt/gic_fdt.c: revision 1.7
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.1
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.2
sys/arch/evbarm/conf/std.sunxi: revision 1.1
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.3
sys/arch/evbarm/conf/std.sunxi: revision 1.2
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.4
sys/arch/evbarm/conf/std.sunxi: revision 1.3
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.5
sys/arch/arm/sunxi/sunxi_ccu_div.c: revision 1.1
sys/dev/gpio/gpiovar.h: revision 1.17
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.6
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.7
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.8
sys/arch/arm/sunxi/sunxi_rsb.h: revision 1.1
sys/arch/arm/samsung/exynos_i2c.c: revision 1.12
sys/dev/fdt/fdtvar.h: revision 1.21
sys/arch/evbarm/sunxi/sunxi_start.S: revision 1.1
sys/arch/arm/samsung/exynos_i2c.c: revision 1.13
sys/dev/fdt/fdtvar.h: revision 1.22
sys/arch/evbarm/conf/SUNXI: revision 1.10
sys/dev/fdt/fdtvar.h: revision 1.23
sys/arch/evbarm/conf/SUNXI: revision 1.11
sys/dev/fdt/gpioleds.c: revision 1.1
sys/dev/fdt/fdtvar.h: revision 1.24
sys/arch/evbarm/conf/SUNXI: revision 1.12
sys/arch/evbarm/conf/SUNXI: revision 1.13
sys/arch/arm/cortex/gic.c: revision 1.30
sys/arch/evbarm/conf/SUNXI: revision 1.14
sys/arch/evbarm/conf/SUNXI: revision 1.15
sys/arch/evbarm/conf/SUNXI: revision 1.16
sys/arch/arm/sunxi/sunxi_emac.c: revision 1.1
etc/Makefile: revision 1.430
sys/arch/arm/sunxi/sunxi_emac.c: revision 1.2
etc/Makefile: revision 1.431
sys/arch/evbarm/conf/VEXPRESS_A15: revision 1.17
sys/arch/arm/sunxi/sunxi_emac.c: revision 1.3
sys/arch/arm/sunxi/sunxi_emac.c: revision 1.4
sys/arch/arm/samsung/exynos5422_clock.c: revision 1.6
sys/arch/arm/samsung/exynos_platform.c: revision 1.1
sys/dev/ofw/ofw_subr.c: revision 1.29
sys/arch/arm/samsung/exynos_platform.c: revision 1.2
sys/arch/evbarm/conf/mk.vexpress: revision 1.3
sys/arch/arm/samsung/exynos_platform.c: revision 1.3
sys/arch/evbarm/conf/mk.vexpress: revision 1.4
sys/arch/arm/samsung/exynos_platform.c: revision 1.4
sys/arch/arm/arm/psci.h: revision 1.1
sys/arch/arm/samsung/exynos_platform.c: revision 1.5
sys/arch/arm/samsung/exynos_platform.c: revision 1.6
sys/arch/evbarm/fdt/fdt_machdep.c: revision 1.10
external/bsd/mdocml/bin/mandoc/Makefile: revision 1.12
sys/dev/fdt/files.fdt: revision 1.17
sys/dev/fdt/files.fdt: revision 1.18
sys/dev/fdt/files.fdt: revision 1.19
sys/arch/arm/samsung/exynos_sscom.c: revision 1.8
sys/arch/arm/sunxi/sun8i_a83t_ccu.c: revision 1.1
sys/arch/arm/sunxi/sunxi_mmc.c: revision 1.1
sys/arch/arm/samsung/exynos_sscom.c: revision 1.9
sys/arch/arm/conf/files.arm: revision 1.133
sys/arch/arm/samsung/mct_var.h: revision 1.5
sys/arch/arm/sunxi/sunxi_platform.c: revision 1.1
sys/arch/arm/sunxi/sunxi_platform.c: revision 1.2
sys/arch/evbarm/conf/std.vexpress: revision 1.6
sys/arch/arm/sunxi/sunxi_platform.c: revision 1.3
sys/arch/arm/sunxi/sun6i_a31_gpio.c: revision 1.1
sys/arch/arm/sunxi/sunxi_platform.c: revision 1.4
sys/arch/arm/sunxi/sun6i_a31_gpio.c: revision 1.2
sys/arch/arm/sunxi/files.sunxi: revision 1.1
sys/dev/ofw/ofw_subr.c: revision 1.30
sys/arch/arm/sunxi/files.sunxi: revision 1.2
sys/dev/ofw/openfirm.h: revision 1.35
sys/arch/arm/sunxi/files.sunxi: revision 1.3
sys/dev/ofw/openfirm.h: revision 1.36
sys/arch/arm/sunxi/files.sunxi: revision 1.4
sys/arch/arm/sunxi/files.sunxi: revision 1.5
sys/arch/evbarm/exynos/exynos_machdep.c: file removal
sys/arch/arm/sunxi/sunxi_gpio.h: revision 1.1
sys/arch/arm/samsung/sscom.c: revision 1.9
sys/arch/arm/sunxi/files.sunxi: revision 1.6
sys/dev/fdt/ohci_fdt.c: revision 1.1
sys/arch/arm/sunxi/sunxi_usbphy.c: revision 1.1
sys/arch/arm/sunxi/sunxi_gpio.h: revision 1.2
sys/arch/arm/sunxi/files.sunxi: revision 1.7
sys/arch/arm/sunxi/sunxi_usbphy.c: revision 1.2
sys/arch/arm/sunxi/sunxi_gpio.h: revision 1.3
sys/arch/arm/sunxi/files.sunxi: revision 1.8
sys/arch/arm/sunxi/sunxi_usbphy.c: revision 1.3
sys/arch/arm/sunxi/files.sunxi: revision 1.9
sys/arch/arm/samsung/exynos_sscom.c: revision 1.10
sys/arch/evbarm/conf/mk.tegra: revision 1.5
sys/arch/arm/samsung/exynos_dwcmmc.c: revision 1.4
sys/arch/evbarm/conf/mk.tegra: revision 1.6
sys/arch/evbarm/conf/EXYNOS: revision 1.15
sys/arch/evbarm/conf/EXYNOS: revision 1.16
sys/arch/evbarm/conf/EXYNOS: revision 1.17
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.1
sys/arch/evbarm/conf/EXYNOS: revision 1.19
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.2
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.3
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.4
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.5
sys/arch/arm/sunxi/sunxi_emac.h: revision 1.1
sys/arch/evbarm/conf/mk.sunxi: revision 1.1
sys/arch/evbarm/include/bootconfig.h: revision 1.7
sys/arch/evbarm/conf/TEGRA: revision 1.24
sys/arch/arm/arm/psci.c: revision 1.1
sys/dev/led.c: revision 1.1
sys/dev/led.c: revision 1.2
sys/arch/arm/arm/psci_arm.S: revision 1.1
sys/arch/arm/sunxi/sunxi_ccu_gate.c: revision 1.1
sys/arch/arm/sunxi/sunxi_ccu_gate.c: revision 1.2
sys/dev/fdt/ehci_fdt.c: revision 1.1
sys/dev/fdt/ehci_fdt.c: revision 1.2
sys/arch/arm/sunxi/sun6i_a31_ccu.h: revision 1.1
sys/arch/evbarm/conf/EXYNOS: revision 1.21
sys/arch/arm/sunxi/files.sunxi: revision 1.10
sys/arch/arm/sunxi/files.sunxi: revision 1.11
sys/dev/fdt/fdtbus.c: revision 1.14
sys/arch/arm/sunxi/sunxi_mmc.h: revision 1.1
sys/arch/arm/samsung/exynos5422_dma.c: file removal
usr.bin/config/mkmakefile.c: revision 1.69
sys/conf/files: revision 1.1178
sys/arch/arm/sunxi/sunxi_platform.h: revision 1.1
sys/arch/evbarm/exynos/exynos_start.S: revision 1.4
sys/arch/arm/samsung/exynos_pinctrl.c: revision 1.11
sys/arch/arm/samsung/exynos_pinctrl.c: revision 1.12
sys/arch/arm/sunxi/sunxi_rtc.c: revision 1.1
sys/arch/arm/sunxi/sun8i_h3_ccu.h: revision 1.1
sys/arch/arm/samsung/exynos5410_clock.c: revision 1.1
sys/arch/arm/samsung/exynos5410_clock.c: revision 1.2
sys/arch/evbarm/conf/SUNXI: revision 1.1
external/bsd/elftosb/usr.sbin/elftosb/Makefile: revision 1.5
sys/arch/evbarm/conf/SUNXI: revision 1.2
sys/arch/arm/fdt/psci_fdt.c: revision 1.1
sys/arch/evbarm/conf/SUNXI: revision 1.3
sys/arch/evbarm/conf/SUNXI: revision 1.4
sys/arch/evbarm/conf/files.exynos: revision 1.3
sys/arch/evbarm/conf/SUNXI: revision 1.5
sys/arch/evbarm/conf/SUNXI: revision 1.6
sys/arch/arm/sunxi/sunxi_ccu_nm.c: revision 1.1
sys/dev/fdt/fixedfactorclock.c: revision 1.1
sys/dev/fdt/fdt_subr.c: revision 1.14
sys/arch/evbarm/conf/SUNXI: revision 1.7
sys/arch/arm/sunxi/sunxi_ccu_nm.c: revision 1.2
sys/arch/arm/sunxi/sun8i_a83t_gpio.c: revision 1.1
sys/dev/fdt/fdt_subr.c: revision 1.15
sys/arch/evbarm/conf/SUNXI: revision 1.8
sys/arch/arm/sunxi/sunxi_ccu_nm.c: revision 1.3
sys/dev/ic/dwc_mmc_reg.h: revision 1.6
sys/dev/fdt/fdt_subr.c: revision 1.16
sys/arch/evbarm/conf/SUNXI: revision 1.9
usr.bin/config/mkmakefile.c: revision 1.70
sys/dev/fdt/fdt_phy.c: revision 1.1
sys/arch/evbarm/conf/ODROID-XU: file removal
sys/arch/arm/fdt/arm_fdt.c: revision 1.4
sys/arch/arm/samsung/exynos_reg.h: revision 1.14
sys/conf/files: revision 1.1180
sys/arch/arm/samsung/exynos_reg.h: revision 1.15
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.1
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.2
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.3
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.4
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.5
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.6
sys/dev/ic/dwc_mmc_var.h: revision 1.6
sys/arch/arm/samsung/exynos_combiner.c: revision 1.7
sys/arch/evbarm/exynos/platform.h: revision 1.2
sys/arch/arm/fdt/files.fdt: revision 1.12
sys/arch/evbarm/conf/std.exynos: revision 1.2
sys/arch/evbarm/conf/std.exynos: revision 1.3
sys/arch/arm/rockchip/rockchip_dwcmmc.c: revision 1.6
sys/arch/arm/sunxi/sunxi_com.c: revision 1.1
sys/dev/led.h: revision 1.1
sys/arch/evbarm/conf/std.exynos: revision 1.5
sys/arch/arm/sunxi/sunxi_com.c: revision 1.2
sys/arch/evbarm/conf/files.evbarm: revision 1.26
usr.bin/config/defs.h: revision 1.99
sys/arch/arm/fdt/arm_fdtvar.h: revision 1.6
sys/arch/arm/samsung/exynos_soc.c: revision 1.32
sys/arch/arm/sunxi/sun6i_a31_ccu.c: revision 1.1
sys/arch/arm/sunxi/sun6i_a31_ccu.c: revision 1.2
sys/arch/arm/samsung/mct.c: revision 1.11
sys/arch/evbarm/conf/ODROID-U: file removal
sys/arch/arm/samsung/mct.c: revision 1.12
sys/arch/arm/sunxi/sunxi_ccu_nkmp.c: revision 1.1
sys/arch/arm/sunxi/sunxi_ccu_nkmp.c: revision 1.2
sys/arch/arm/sunxi/sunxi_ccu_nkmp.c: revision 1.3
sys/arch/arm/sunxi/sunxi_ccu_nkmp.c: revision 1.4
Get the EXYNOS kernel building again with recent FDT changes. Untested.
Use arm_fdt_cpu_hatch and add mmu entry for DTB
Fix exynos5 devmap, bootstrap, and implement early_putchar.
Calculate UART frequency based on bootloader config.
Fix KERNEL_BASE_PHYS (how did this ever work?)
Avoid divide-by-zero for unconfigured PLLs
Correctly initialize i2cbus attach args.
Add delay and enable mct timecounter.
Fix build w/o VERBOSE_INIT_ARM
Remove ODROID-U and ODROID-XU kernel configs as they no longer work.
- Replace CONSADDR with SSCOM2CONSOLE in example
- Remove gtmr (Exynos5422 uses mct)
- cinclude EXYNOS.local instead of TEGRA.local
Use fdtbus_intr_establish to hook in block interrupts instead of
intr_establish.
Simplify MCT; just enable it and then attach an ARMv7 generic timer.
Add support for building DTB files during kernel build, from christos.
build vexpress-v2p-ca15-tc1.dtb with the kernel
build tegra124-apalis-eval.dtb, tegra124-jetson-tk1.dtb, tegra124-nyan-big.dtb, tegra124-nyan-blaze.dtb, and tegra124-venice2.dtb with the kernel
Allow multiline makeoptions to work by quoting the newline..
Bump for quoting makeoptions with multiple lines.
un-c99
bump required config version for multiline makeoptions feature
Set DTS makeoption in kernel config
Assign DTB files to a variable so we can make -V DTB
put the dtb files with their kernels.
no need for debug printing.
Don't assume that CPU index = GIC CPU interface number. We can determine
the current CPU interface number by reading from the read-only
GICD_ITARGETSR0 through GICD_ITARGETSR7 registers.
This gets interrupts working on Exynos 5422, where the boot processor has
GIC CPU interface #4.
use -v to get the expanded variable.
Use -v to get the expanded variables.
Get baud rate from sclk_uartN instead of uartN. Print IRQ number at attach.
Fix PLL con0 register locations and add uart clocks
Disable exyortc for now, it doesn't work.
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.
Update for new dwc_mmc driver
Fix dmesg
Add Exynos 5410 clock controller driver.
Fix a few typos in clock parent names for mmc clocks.
From jmcneill@
Update for new dwc_mmc driver
Implement platform reset for exynos5
Attach fdtbus to a /clocks node with no compatible string.
Add support for ARM Power State Coordination Interface (PSCI).
Support interrupt sharing.
Add initial support for Allwinner H3 SoC.
ARM Trusted Firmware reserves SGIs 8-15 for secure use. Even without ATF,
U-Boot on some platforms may use SGIs in this range for the PSCI
implementation.
Change ARMGIC_IPI_BASE to 0 from (16 - NIPI) and add a compile-time assert
to ensure that we don't end up with a conflict.
Add H3 MMC support
SD/MMC clock fixes
Add FDT PHY interface.
Add glue for generic ehci/ohci bindings.
Rename a variable, NFC.
Support parents in different clock domains.
Add USB stuff. Doesn't quite work yet.
Synopsys DesignWare APB UART needs "options COM_AWIN" for now.
Add i2c glue.
Add RTC driver.
PHY registers start at index 1. Now USB works.
Don't allow sharing edge and level triggered interrupts.
Add arm_fdt_memory_dump helper for dumping physical addresses from ddb
Print clocks with aprint_debug
Remove unused defines
Add fdtbus_get_string helper
Add of_search_compatible, which searches an array of compat_data structures
for a matching "compatible" entry matching the supplied OFW node. This
allows us to associate data with compatible strings.
Add driver for Allwinner Gigabit Ethernet (EMAC) as found in sun8i and
later family SoCs.
This is a port of my FreeBSD driver which has been confirmed to work on
Allwinner H3, A83T, and A64 SoCs.
Fix dmesg
Add basic support for Allwinner A31.
Add basic FDT GPIO support.
Fix the pinctrl api to match the spec. A pinctrl config can have more
than one xref, and an xref may have specifier data associated with it.
Enable sunxi pinctrl support
Adjust to new pinctrl API
Add P2WI/RSB driver, based on awin_p2wi.c.
Fix typo in a compat string.
Configure pin defaults at attach
No need to explicitly set pinctrl config 0 now
Fix some register definitions.
Disallow sharing between MPSAFE and non-MPSAFE handlers.
Add of_match_compat_data.
This routine searches an array of compat_data structures for a
matching "compatible" entry matching the supplied OFW node.
Add options __HAVE_CPU_UAREA_ALLOC_IDLELWP
Add support for reserved memory and MEMORY_DISK_DYNAMIC for FDT-based
kernels.
the extent code cannot use the full range of u_long,
so ignore the last page before 4GB too. ok jmcneill@
Copy install ramdisk to releasedir. Provide both a raw ffs and
Legacy U-Boot version of it.
Replace HUMMINGBIRD_A31 with SUNXI kernel on armv7.img and include .dtb
files for SUNXI and TEGRA kernels on the MSDOS partition.
Let the controller provide a default name for pins. This makes pins easier
to locate when we have multiple banks and a variable number of pins per
bank.
Attach gpio(4) to sunxigpio
Test for kernel build directory before reading DTB list
Add support for Allwinner A83T SoC.
Add A83T files
Fixup busdma sync and locking in the RX path. Disable batch RX/TX ints.
Fix AHB2 register definition and explicitly set AHB2 parent to PLL_PERIPH0/2 -- this gives us 50% more bus bandwidth for emac
Restore TX_INTERVAL_DEFAULT to 64
Drop the sunxi_emac_rx_batch feature. It was originally designed to
reduce the amount of mutex unlock/lock cycles during the RX path on
FreeBSD and if_input, but it is not required to drop the lock before
calling if_percpuq_enqueue on NetBSD.
Write back the data value instead of mask in sunxi_gpio_write
Add a helper for exposing LED controls via sysctl.
Add GPIO LED driver.
add gpioleds
Add misc. gates and resets driver, and explicitly enable PIO clocks
at attach.
Add fdtbus_get_string_index helper.
Add driver for fixed-factor clocks.
Add ffclock
Remove the requirement for ehci to attach after companion devices.
"go for it" - skrll@
Remove the hack to find companion devices and just assume 1 companion if
ETTF flag is not set.
Remove pass numbers for ehci/ohci now that the attach order no longer matters
Use unsigned char for ctype functions, suggested by christos
Add : to body of populate_sunxi to appease bash.
port-evbarm/52388: Fix number of args to a debug printf.
|
| 1.5.2.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.5.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.5.2.1 | 03-Jan-2015 |
skrll | file rockchip_dwcmmc.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.6.4.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.4.1 | 20-Jun-2017 |
jdolecek | file rockchip_dwcmmc.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.2 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.1 | 17-Jan-2015 |
jmcneill | branches: 1.1.2; 1.1.18;
Add dwctmr glue, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 17-Jan-2015 |
jdolecek | file rockchip_dwctmr.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.1.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 17-Jan-2015 |
skrll | file rockchip_dwctmr.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.7 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.6 | 23-Apr-2016 |
skrll | branches: 1.6.16;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.5 | 30-Aug-2015 |
skrll | Update for latest dwc2
|
| 1.4 | 30-Jul-2015 |
skrll | Use IPL_VM for dwc2_intr and mark as MP safe where possible.
|
| 1.3 | 22-Jul-2015 |
skrll | Trailing whitespace.
|
| 1.2 | 26-Dec-2014 |
jmcneill | branches: 1.2.2;
Map all of core0 and core1 space and let drivers use bus_space_subregion
instead of bus_space_map. Fill in rockchip_reset.
|
| 1.1 | 26-Dec-2014 |
jmcneill | Initial support for Rockchip RK3066 / RK3188 SoCs, from Hiroshi Tokuda
<tokuda@tokuda.net> on port-arm:
http://mail-index.netbsd.org/port-arm/2014/10/09/msg002651.html
|
| 1.2.2.3 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 26-Dec-2014 |
skrll | file rockchip_dwctwo.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.6.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.16.1 | 23-Apr-2016 |
jdolecek | file rockchip_dwctwo.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.18 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.17 | 20-Feb-2017 |
ozaki-r | branches: 1.17.12;
Apply deferred if_start to more drivers...
|
| 1.16 | 15-Dec-2016 |
ozaki-r | branches: 1.16.2;
Move bpf_mtap and if_ipackets++ on Rx of each driver to percpuq if_input
The benefits of the change are:
- We can reduce codes
- We can provide the same behavior between drivers
- Where/When if_ipackets is counted up
- Note that some drivers still update packet statistics in their own
way (periodical update)
- Moved bpf_mtap run in softint
- This makes it easy to MP-ify bpf
Proposed on tech-kern and tech-net
|
| 1.15 | 10-Jun-2016 |
ozaki-r | branches: 1.15.2;
Introduce m_set_rcvif and m_reset_rcvif
The API is used to set (or reset) a received interface of a mbuf.
They are counterpart of m_get_rcvif, which will come in another
commit, hide internal of rcvif operation, and reduce the diff of
the upcoming change.
No functional change.
|
| 1.14 | 26-Mar-2016 |
martin | David Binderman in port-arm/51013: masking of rxbdtlen happened before
the value was read - move it down a few lines.
|
| 1.13 | 09-Feb-2016 |
ozaki-r | Introduce softint-based if_input
This change intends to run the whole network stack in softint context
(or normal LWP), not hardware interrupt context. Note that the work is
still incomplete by this change; to that end, we also have to softint-ify
if_link_state_change (and bpf) which can still run in hardware interrupt.
This change softint-ifies at ifp->if_input that is called from
each device driver (and ieee80211_input) to ensure Layer 2 runs
in softint (e.g., ether_input and bridge_input). To this end,
we provide a framework (called percpuq) that utlizes softint(9)
and percpu ifqueues. With this patch, rxintr of most drivers just
queues received packets and schedules a softint, and the softint
dequeues packets and does rest packet processing.
To minimize changes to each driver, percpuq is allocated in struct
ifnet for now and that is initialized by default (in if_attach).
We probably have to move percpuq to softc of each driver, but it's
future work. At this point, only wm(4) has percpuq in its softc
as a reference implementation.
Additional information including performance numbers can be found
in the thread at tech-kern@ and tech-net@:
http://mail-index.netbsd.org/tech-kern/2016/01/14/msg019997.html
Acknowledgment: riastradh@ greatly helped this work.
Thank you very much!
|
| 1.12 | 23-Feb-2015 |
martin | branches: 1.12.2;
Apply patch from FUKAUMI Naoki to fix ring buffer handling when the
ring fills completely.
|
| 1.11 | 17-Jan-2015 |
jmcneill | Add Rockchip PX2 support, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.10 | 13-Jan-2015 |
jmcneill | one more segment can be queued, from FUKAUMI Naoki <naobsd@gmail.com>
|
| 1.9 | 08-Jan-2015 |
jmcneill | fix a couple txq fencepost issues, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.8 | 08-Jan-2015 |
jmcneill | no need to invert ether_crc32_le return, now multicast works
|
| 1.7 | 06-Jan-2015 |
jmcneill | Make sure to write our MAC address to the chip
|
| 1.6 | 06-Jan-2015 |
jmcneill | fix multicast hash calculation
|
| 1.5 | 05-Jan-2015 |
jmcneill | dont clear EMAC_STAT_MDIO on irq, as we poll this bit in readreg/writereg
|
| 1.4 | 05-Jan-2015 |
jmcneill | add multicast filter support
|
| 1.3 | 05-Jan-2015 |
jmcneill | various fixes from FUKAUMI Naoki <fun@naobsd.org> and martin@
|
| 1.2 | 04-Jan-2015 |
jmcneill | set rmii rate to 50MHz, handle 10 vs 100 Mbps
|
| 1.1 | 04-Jan-2015 |
jmcneill | Add Rockchip ethernet driver, untested.
|
| 1.12.2.7 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.12.2.6 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.12.2.5 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.12.2.4 | 22-Apr-2016 |
skrll | Sync with HEAD
|
| 1.12.2.3 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.12.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.12.2.1 | 23-Feb-2015 |
skrll | file rockchip_emac.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.15.2.2 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.15.2.1 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.16.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.17.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.17.12.1 | 20-Feb-2017 |
jdolecek | file rockchip_emac.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.2 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.1 | 04-Jan-2015 |
jmcneill | branches: 1.1.2; 1.1.18;
Add Rockchip ethernet driver, untested.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 04-Jan-2015 |
jdolecek | file rockchip_emacreg.h was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.1.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 04-Jan-2015 |
skrll | file rockchip_emacreg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.8 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.7 | 14-Feb-2016 |
chs | branches: 1.7.16;
zero the i2c_attach_args structure before filling it in.
fixes occasional crashes in iic_attach().
|
| 1.6 | 11-Jan-2015 |
jmcneill | branches: 1.6.2;
rkiic_wait: fix non-polled mode
|
| 1.5 | 01-Jan-2015 |
jmcneill | Include addr and reg in data sent with rkiic_write, now writes work too.
|
| 1.4 | 01-Jan-2015 |
jmcneill | drop clk rate to 100kHz, explicit register initialization, shift slave addr left 1, add some more debugging, now this works
|
| 1.3 | 30-Dec-2014 |
jmcneill | Actually set slave addr / reg. Wait for start irq after sending start before
transferring data. Add RKIIC_DEBUG kernel option.
|
| 1.2 | 30-Dec-2014 |
jmcneill | drop clock rate to 400kHz
|
| 1.1 | 30-Dec-2014 |
jmcneill | add I2C driver
|
| 1.6.2.3 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.6.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.6.2.1 | 11-Jan-2015 |
skrll | file rockchip_i2c.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.7.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7.16.1 | 14-Feb-2016 |
jdolecek | file rockchip_i2c.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.3 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.2 | 30-Dec-2014 |
jmcneill | branches: 1.2.2; 1.2.18;
Actually set slave addr / reg. Wait for start irq after sending start before
transferring data. Add RKIIC_DEBUG kernel option.
|
| 1.1 | 30-Dec-2014 |
jmcneill | add I2C driver
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 30-Dec-2014 |
jdolecek | file rockchip_i2creg.h was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.2.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 30-Dec-2014 |
skrll | file rockchip_i2creg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.2 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.1 | 26-Dec-2014 |
jmcneill | branches: 1.1.2; 1.1.18;
Initial support for Rockchip RK3066 / RK3188 SoCs, from Hiroshi Tokuda
<tokuda@tokuda.net> on port-arm:
http://mail-index.netbsd.org/port-arm/2014/10/09/msg002651.html
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 26-Dec-2014 |
jdolecek | file rockchip_intr.h was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.1.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 26-Dec-2014 |
skrll | file rockchip_intr.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.6 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.5 | 17-Jan-2015 |
jmcneill | branches: 1.5.2; 1.5.18;
Add Rockchip PX2 support, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.4 | 28-Dec-2014 |
jmcneill | add SRAM, SCU, PMU offsets
|
| 1.3 | 28-Dec-2014 |
jmcneill | add DDR offsets
|
| 1.2 | 26-Dec-2014 |
jmcneill | Map all of core0 and core1 space and let drivers use bus_space_subregion
instead of bus_space_map. Fill in rockchip_reset.
|
| 1.1 | 26-Dec-2014 |
jmcneill | Initial support for Rockchip RK3066 / RK3188 SoCs, from Hiroshi Tokuda
<tokuda@tokuda.net> on port-arm:
http://mail-index.netbsd.org/port-arm/2014/10/09/msg002651.html
|
| 1.5.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.18.1 | 17-Jan-2015 |
jdolecek | file rockchip_reg.h was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.5.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.5.2.1 | 17-Jan-2015 |
skrll | file rockchip_reg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.3 | 29-Mar-2015 |
jmcneill | Use shared armv7_generic_space
|
| 1.2 | 25-Feb-2015 |
joerg | Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland
|
| 1.1 | 26-Dec-2014 |
jmcneill | Initial support for Rockchip RK3066 / RK3188 SoCs, from Hiroshi Tokuda
<tokuda@tokuda.net> on port-arm:
http://mail-index.netbsd.org/port-arm/2014/10/09/msg002651.html
|
| 1.3 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.2 | 17-Jan-2015 |
jmcneill | branches: 1.2.2; 1.2.18;
Add Rockchip PX2 support, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.1 | 02-Jan-2015 |
jmcneill | Add driver for RK3188 64-bit timer.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 17-Jan-2015 |
jdolecek | file rockchip_timer.c was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.2.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 17-Jan-2015 |
skrll | file rockchip_timer.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.2 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.1 | 02-Jan-2015 |
jmcneill | branches: 1.1.2; 1.1.18;
Add driver for RK3188 64-bit timer.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 02-Jan-2015 |
jdolecek | file rockchip_timerreg.h was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.1.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 02-Jan-2015 |
skrll | file rockchip_timerreg.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.14 | 08-Feb-2018 |
jmcneill | Move Rockchip port to the attic. It is not very useful.
|
| 1.13 | 29-Mar-2015 |
jmcneill | branches: 1.13.2; 1.13.18;
Use shared armv7_generic_space
|
| 1.12 | 17-Jan-2015 |
jmcneill | Add Rockchip PX2 support, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.11 | 05-Jan-2015 |
jmcneill | add GRF bus space handle to obio_attach_args, from FUKAUMI Naoki <fun@naobsd.org>
|
| 1.10 | 04-Jan-2015 |
jmcneill | add emac clk controls
|
| 1.9 | 02-Jan-2015 |
jmcneill | Add RK3188/RK3188+ CPU frequency setting support.
|
| 1.8 | 30-Dec-2014 |
jmcneill | add I2C driver
|
| 1.7 | 30-Dec-2014 |
jmcneill | Add support for setting RK3188/RK3188+ CPU frequency. If the SoC ID is
passed in bootargs matching RK3188 or RK3188+, and the cpu.frequency
option specifies a supported rate (currently 600, 1008, 1608 MHz), the
APLL clock will be adjusted accordingly.
|
| 1.6 | 27-Dec-2014 |
jmcneill | mmc0 on rk3188 is based on ahb clk, not gpll. add a function to control mmc0 clock as well.
|
| 1.5 | 27-Dec-2014 |
jmcneill | More clock fixes, debugging.
|
| 1.4 | 27-Dec-2014 |
jmcneill | add functions to get apll and cpu rates
|
| 1.3 | 27-Dec-2014 |
jmcneill | add helpers to get gpll and ahb clock rates
|
| 1.2 | 26-Dec-2014 |
jmcneill | Map all of core0 and core1 space and let drivers use bus_space_subregion
instead of bus_space_map. Fill in rockchip_reset.
|
| 1.1 | 26-Dec-2014 |
jmcneill | Initial support for Rockchip RK3066 / RK3188 SoCs, from Hiroshi Tokuda
<tokuda@tokuda.net> on port-arm:
http://mail-index.netbsd.org/port-arm/2014/10/09/msg002651.html
|
| 1.13.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.13.18.1 | 29-Mar-2015 |
jdolecek | file rockchip_var.h was added on branch tls-maxphys on 2017-12-03 11:35:55 +0000
|
| 1.13.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.13.2.1 | 29-Mar-2015 |
skrll | file rockchip_var.h was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
