XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

branches: 1.11.2;
RCSId police

Move the mct's interrupt from a shared SPI interrupt to a private PPI
interrupt so all possible cpus get them.

branches: 1.9.2; 1.9.4; 1.9.6;
Remove the exyo_usb_locinfo structure as exyousb becomes usb2 only

Revisit Exynos USB system implementing usb2phy support for Exynos4.

branches: 1.7.2;
Rework USB2 attachment using a dedicated usb devices locator. This allows for
the more tightly coupled Exynos{4,5} usb2/usb2otg/usb3 controllers to share
memory spaces and IRQs

Note, currently only USB2 host is implemented.

branches: 1.6.2;
Add i2c locators, add a i2c bus indexer and provide function prototype for the
pinset to pindata function.

Implement gpio framework for the Samsung Exynos series.

Note that only the Exynos4 gpio registers are defined now and provision is
taken to allow for seamlessness adding of Exynos5 values.

exywdt -> exyowdt

Commit initial USB adapter support and associated DMA tags

Exynos4's MCT doesn't interrupt on the MCT_LTIMER interrupt but on the
IRQ_G0_IRQ and/or the IRQ_MCT_G{0,1,2,3}. The later are not chosen yet since
they are behind the interrupt combiner.

Confirmed that it indeed calls hardclock() at the specified intervals.

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

fix various typos, mainly in comments.

branches: 1.15.4;
Some changes to bring back exynos4 support and make exynos5 support more
modern/generic

- Provide a exynos_platform_early_putchar based on CONSADDR and remove
EXYNOS_CONSOLE_EARLY
- Provide devmaps for exynos4 and exynos5
- Simplify exynos_bootstrap
- Update exynos_start.S to use exynos_platform_early_putchar - this
needs a fix in a9_subr.S for arm_cpuinit to save lr in a callee save
register and not use ip. Maybe this change is safe now, but too much
testing required to commit it now.

branches: 1.14.10;
XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

branches: 1.13.2;
RCSId police

1st stage of USB support for Exynos5 chips: the register definitions

Fix typos

Add comments to Exynos4 PLL registers and add Exynos5 PLL registers

Add CMU PLL offsets

branches: 1.8.2;
Adjust AUDIOCORE mapping for exynos4 to map in entire piece.

branches: 1.7.2; 1.7.4;
Add USB2HOST aliases for exynos4 and exynos5 from where the ehci/ohci/phy are
referenced from

Remove comment about possible identification of the MCUCTL

Explicitly mark MCUCTL_ISP_OFFSET as an unknown module to prevent confusion

branches: 1.4.2; 1.4.4;
Revisit gpio and revisit register file mapping. The additional register files
are now mapped behind the origional register file.

The gpio channel GPZ is mapped over I2S0 in the separate audio register file
and were both abusively mapped over I2C0 in the main register file!

While here, delay the gpio bootstrap till on attachment. We could hasten it in
the odroid_machdep.c if needed. Also make the gpio code more resilliant and
allow booting correctly without any GPIO bits defined/available.

The EXYNOS4_I2C0_OFFSET is actually reffered to as additional GPIO space.

Commit initial USB adapter support and associated DMA tags

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

arm: fix the exynos 5410 clock PLL names and numbering.

Two fixes for the 5410 clock PLL names and numbering.
- MPLL was incorrecly numbered.
- BPLL was misnamed DPLL

Fix the duplicate sclk_usbd301 entries - the first should be sclk_usbd300

arm: handle epll rate setting in exynos5410 clocks

This is required by the Odroid-XU.

Rename the exynos clock PLL to PLL35XX to pave the wave for other PLL
types.

Same code before and after.

branches: 1.7.18; 1.7.26;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

branches: 1.6.4;
Traiing whitespace

Use PRIxBUSADDR

branches: 1.4.4;
Pass clock provider's phandle to fdtbus_clock_controller_func.decode()
and update callers.

This allows to accomodate clock managers whose clocks are identified
directly by a clock instead of a pair (clock provider, index).

ok jmcneill@ on port-arm

Fix a stupid bug in exynos*_clock_set_rate_div

branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10; 1.2.12;
Fix a few typos in clock parent names for mmc clocks.

From jmcneill@

Add Exynos 5410 clock controller driver.

arm: handle epll rate setting in exynos5410 clocks

This is required by the Odroid-XU.

Rename the exynos clock PLL to PLL35XX to pave the wave for other PLL
types.

Same code before and after.

branches: 1.16.18; 1.16.26;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

branches: 1.15.4;
Traiing whitespace

Use PRIxBUSADDR

branches: 1.13.4;
Pass clock provider's phandle to fdtbus_clock_controller_func.decode()
and update callers.

This allows to accomodate clock managers whose clocks are identified
directly by a clock instead of a pair (clock provider, index).

ok jmcneill@ on port-arm

Replace sscom with a much simpler uart driver. The simpler driver is 1/4th
the size and has the added benefit of not freezing when an arrow key is
pressed.

Add pwm clocks

Dump clock tree with aprint_debug instead of printf

Add more USB3 clocks

Add USB clocks and missing MMC biu clocks

Fix a stupid bug in exynos*_clock_set_rate_div

branches: 1.6.4; 1.6.6; 1.6.8;
Fix PLL con0 register locations and add uart clocks

branches: 1.5.4;
Adapt for clock domain support

branches: 1.4.2; 1.4.4; 1.4.6;
hook exynos5422 clock support into fdtbus

XU4 FDT Last drivers converted

There is a minimum conversion on the clock driver.

The USB driver needs reordering and is broken, but it was broken before.

Next up: tactical nuclear weapons

fix div clk set/get

Add clock controller backend for Exynos5422. Work in progress.

Get the EXYNOS kernel building again with recent FDT changes. Untested.

branches: 1.1.2; 1.1.12;
add a dma file to the EXYNOS rewrite

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

Add clock controller backend for Exynos5422. Work in progress.

branches: 1.12.2;
RCSId police

1st stage of USB support for Exynos5 chips: the register definitions

Add i2c to the exynos5 locators

branches: 1.9.2;
Implement i2c using gpio for Exynos5 and Odroid-XU

Add exyogpio device attachment for exynos5

branches: 1.7.2; 1.7.4;
Remove the exyo_usb_locinfo structure as exyousb becomes usb2 only

Revisit Exynos USB system implementing usb2phy support for Exynos4.

branches: 1.5.2;
Rework USB2 attachment using a dedicated usb devices locator. This allows for
the more tightly coupled Exynos{4,5} usb2/usb2otg/usb3 controllers to share
memory spaces and IRQs

Note, currently only USB2 host is implemented.

branches: 1.4.2;
Add i2c locators, add a i2c bus indexer and provide function prototype for the
pinset to pindata function.

exywdt -> exyowdt

Commit initial USB adapter support and associated DMA tags

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Align AUDIOCORE size to 1M, and add definition for SYSRAM

branches: 1.21.16; 1.21.18;
EXYNOS Rewrite step 2 of N: New exynos_gpio.c

I can't bring myself to fully nuke from orbit, so there are really two
things in this checkin:

1) A major rewrite of exynos_gpio.c, based mostly on the Nvidia
tegra_gpio.c file. This is missing a major function that will be
added the first time a customer for it is integrated, which is meant to
select pins based on aliases, rather than pin bank names.

2) A small number of changes to other files that keep the tree compiling
and progressing as far as ever; except it is now 5422 specific and
will not boot on the other exynos socs, which I don't have hardware to
test.

The choice to remove functionality is always controversial, but since
we are doing a significant rewrite and I don't have either
documentation or hardware *and* none of the code really works now
anyway, I'm taking the stance that only tested functionality should be
added, and that we'll layer the other exynos socs on this once it
fully boots.

Fixup USB Phy initialisation for Exynos5410.

odroid-xu now detects USB devices.

branches: 1.19.2;
Fix reinoud-ification of KPLL offset.

Add KPLL

Add extra GPIO chunk for 5410

Naming convention

Remove extra line

1st stage of USB support for Exynos5 chips: the register definitions

Add comments to Exynos4 PLL registers and add Exynos5 PLL registers

Fix I2C naming for HDMI

branches: 1.11.2;
Rename C2C gpio to match the naming scheme
Add I2S gpio offset

branches: 1.10.2; 1.10.4;
Add USB2HOST aliases for exynos4 and exynos5 from where the ehci/ohci/phy are
referenced from

Fix SDRAM base

Shrink core size so we can fit audio in.

Correct c&p error on XHCI* registers and remove old cruft copied from the
datasheet that apparently is not used.

Add constants for USB3 XHCI{0,1} and their PHYs. Taken from the relevant
Exynos5 dti from linux

Explicitly mark MCUCTL_ISP_OFFSET as an unknown module to prevent confusion

branches: 1.4.2;
Rework USB2 attachment using a dedicated usb devices locator. This allows for
the more tightly coupled Exynos{4,5} usb2/usb2otg/usb3 controllers to share
memory spaces and IRQs

Note, currently only USB2 host is implemented.

branches: 1.3.2;
Revisit gpio and revisit register file mapping. The additional register files
are now mapped behind the origional register file.

The gpio channel GPZ is mapped over I2S0 in the separate audio register file
and were both abusively mapped over I2C0 in the main register file!

While here, delay the gpio bootstrap till on attachment. We could hasten it in
the odroid_machdep.c if needed. Also make the gpio code more resilliant and
allow booting correctly without any GPIO bits defined/available.

Adjust the GIC offset to match the linux dts

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Delete chipid and sysmmu drivers, they don't do anything but print that
they are not implemented at attach time.

branches: 1.2.2; 1.2.18; 1.2.20; 1.2.22;
XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4 FDT checkpoint

It is rather amazing that XU4 gets as far as it does, given how much of this
code simply doesn't work. Focusing now on getting everything converted to
FDT. Next up USB and clocks. After that nuke everything that's not needed
and start the port in earnest.

arm: handle epll rate setting in exynos5410 clocks

This is required by the Odroid-XU.

Rename the exynos clock PLL to PLL35XX to pave the wave for other PLL
types.

Same code before and after.

branches: 1.1.2; 1.1.18; 1.1.26; 1.1.52; 1.1.60;
Add clock controller backend for Exynos5422. Work in progress.

Use fdtbus_intr_establish_xname

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Add 'const char *xname' arg to fdtbus_interrupt_controller_func .establish

branches: 1.11.8;
Use PRIxBUSADDR

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Trailing whitespace

Cleanup of combiner driver and make it work (at least for MCT).

branches: 1.7.4; 1.7.6; 1.7.8;
Use fdtbus_intr_establish to hook in block interrupts instead of
intr_establish.

branches: 1.6.10;
FDT: Interrupts -- add support for interrupt maps

The mct on exynos uses an interrupt map so we add support now. Devices
represent their interrupts either through a combination of interrupt-parent
and interrupts properties, where the 'interrupts' property is an array of
one or more interrupt specifiers; or through a combination of an
interrupt-parent that points to an interrupt-map, where the interrupt-map
contains 2 or more entries consisting of an index, a pointer to an
interrupt-controller, and a specifier for that controller.

This code adds the ability to walk the interrupt-map and return a specifier.
Unfortunately, the addition requires changing the interface to the
interrupt-controllers' _establish and _intstr functions, so this check in
contains a rototill of the three existing fdt interrupt controllers to use
the new interface.

XU4 interrupt combiner / fake sysmmu

Add sysmmu to have something that calls through to the combiner's establish
routine. Debug the combiner with it.

At this point the combiner is mostly done, but the interrupt handler has not
been tested. This may never happen as we may never support any of the
devices that use the combiner for interrupts. (Or maybe mct)

XU4 i2c, gpio & pinctrl changes

modify exynos_gpio.c to support the new pinctrl model.
set up the new pinctrl model in exynos_pinctrl.c

Flesh out exynos_i2c.c and set it up to use the new pinctrl model. NOTE:
exynos_i2c.c is still incomplete. I need to figure out what to set the
prescaler and scaler to.

branches: 1.3.2;
XU4 interrupt combiner

Written but untested. I'm still confused about how to handle two things:

1) at interrupt disestablishment, where do I get an interrupt number so
that I can disable the interrupt on the combiner?

2) How is interrupt multiplexing handled? I don't seem to have any sort of
interrupt dispatch routine that takes the 1 interrupt that reaches the
gic and turn it into one of eight combined interrupts to call the
established interrupt for the original uncombined interrupt source.

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4 FDT checkpoint

It is rather amazing that XU4 gets as far as it does, given how much of this
code simply doesn't work. Focusing now on getting everything converted to
FDT. Next up USB and clocks. After that nuke everything that's not needed
and start the port in earnest.

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10; 1.1.12;
Commit initial USB adapter support and associated DMA tags

Use fdtbus_intr_establish_xname

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Use DEVICE_COMPAT_EOL.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Use device_compatible_entry / of_search_compatible() rather than
matching against multiple sets of compatibility strings.

branches: 1.10.4;
Provide a sc_intr_cardmask to restore the value used to that before

http://mail-index.netbsd.org/source-changes/2020/01/22/msg113182.html

Use PRIxBUSADDR

branches: 1.8.4;
Fix softc size in CFATTACH_DECL_NEW

No need to use hold reg when updating clocks, and auto-discover some values.

Set module clock on rate changes

branches: 1.5.4; 1.5.6; 1.5.8;
Add some compat strings

Update for new dwc_mmc driver

branches: 1.3.10;
bus_width is not used, so don't fetch it; but do leave the logic in place
commented out so it's there if anyone wants it in the future.
PR 50594 from David Binderman.

branches: 1.2.2;
get fifo depth from fdt, use default clock parent for biu

Add dwcmmc glue

Merge thorpej-cfargs2.

branches: 1.7.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.6.2;
Use fdtbus_intr_establish_xname

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

branches: 1.4.12;
Add support for Samsung Exynos USB.

branches: 1.3.2;
Stop potential misuse of vendor names and USB vendor IDs in root hub
device and string descriptors.

Firstly: Few vendors have identical PCI-SIG vendor IDs and USB-IF vendor
IDs. As such, using the PCI vendor ID as a USB vendor ID may trample
on whomever is allocated that USB vendor ID.

Secondly: The vendor of the host controller hardware implementation has
little to nothing to do with our usbroothub implementation. Thus we
should not potentially associate any problems therewith to such third
party.

This change will result in root hubs being identified by USB Vendor ID
0x0000. Root hub vendor string will now be "NetBSD" (or, specifically:
ostype). Product ID (0x0000) and product strings remain unchanged.

branches: 1.2.16; 1.2.18;
Merge nick-nhusb

- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix

branches: 1.1.2;
XU4 USB snapshot: Reorganize source files

This is just a skeleton, not a set of drivers, but the pieces are now
more or less in the right places.

Get the EXYNOS kernel building again with recent FDT changes. Untested.

branches: 1.4.4;
Init array no longer required

branches: 1.3.2; 1.3.4;
update exynosfdt_init to match the devices in exynos5422-odroidxu3.dts

branches: 1.2.2;
XU4 FDT -- fix bus tags

I got away with not having the generic bus tags for getting minimum fdt to
work; but for real drivers have to actually have them. Make necessary
corrections.

XU4 FDT Missing file

maybe it'll compile now.

arm/samsung: Don't abuse child's dv_private for the parent's uses.

dv_private belongs to the device itself, i.e., the child here.

This overwrote the child's softc pointer, causing all kinds of havoc;
if this worked it was by an amazing accident.

Merge thorpej-cfargs2.

branches: 1.31.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.30.2;
Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

branches: 1.29.4;
Support Exynos 5410 GPIO

G/C

Use __BIT/__SHIFTOUT some more. NFCI.

Traiing whitespace

branches: 1.25.4;
Remove some duplicate code

Make the pinctrl driver actually work.

branches: 1.23.16; 1.23.18;
XU4 gpio - get rid of annoying printf

XU4 i2c, gpio & pinctrl changes

modify exynos_gpio.c to support the new pinctrl model.
set up the new pinctrl model in exynos_pinctrl.c

Flesh out exynos_i2c.c and set it up to use the new pinctrl model. NOTE:
exynos_i2c.c is still incomplete. I need to figure out what to set the
prescaler and scaler to.

make exynos_gpio_fdt_acquire actually work, now dwcmmc properly does card detect for micro SD slot

handle active low flag, simplify bank / pin name parsing, no need to panic if bank lookup fails

XU4 gpio clean up acquire code

properly locate the bank in the acquire code. This may even work.

XU4 GPIO Review Changes

Implement suggestions from Jared.

Add fdtbus_gpio_{read,write}_raw, which tells the controller not to take
polarity into account. Tegra GPIO pin data includes pin polarity, but so
does a regulator-fixed node, so the end result was that the enable value
was being swapped twice. Change fregulator to use the raw APIs, and adapt
Tegra and Exynos GPIO drivers to support this flag.

XU4 GPIO Driver

This is a moderately tested working gpio driver for the Exynos based ODROID
XU4. To use this you have to edit the dtd file exynos54422-pinctrl.dtsi
and change the two occurances of 'gpz' to 'gpz0'. Otherewise it will crash
on a lookup failure.

It certainly could use a code review.

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4 GPIO FDT broken snapshot

This is broken. exynos_gpio_bank_config and the call to it are wrong, and
the acquire function doesn't work.

But I'm in over my head and I need to discuss this:

There is a problem with the dtd: it doesn't have addresses for the individual
gpios. Do I add the addresses to it, or go back to the old version where I
have them hard coded in the driver.

There is a problem with creating the gpio device entries: I suspect I really
need to treat the pinctrl devices as busses and create the gpios as attached
to those busses, but I'm not familiar with how to do that in NetBSD. At the
minimum, a pointer to a similar situation would give me code to follow.
This is different than the usual bus attachment in that the gpios aren't
devices in the dtd (they don't have "compatible" properties) so they don't
get an attach routine called. An alternative to generating the bus
attachments might be to add "compatible" properties to the GPIO entries
in the dtd. so that they do get attached in the normal way.

If I'm going to modify the DTD, then it should be checked in, so a decision
on where to check them in would be nice, even if it does mean spreading them
all over because of license issues. (This DTD is GPL v2)

EXYNOS Rewrite step 2 of N: New exynos_gpio.c

I can't bring myself to fully nuke from orbit, so there are really two
things in this checkin:

1) A major rewrite of exynos_gpio.c, based mostly on the Nvidia
tegra_gpio.c file. This is missing a major function that will be
added the first time a customer for it is integrated, which is meant to
select pins based on aliases, rather than pin bank names.

2) A small number of changes to other files that keep the tree compiling
and progressing as far as ever; except it is now 5422 specific and
will not boot on the other exynos socs, which I don't have hardware to
test.

The choice to remove functionality is always controversial, but since
we are doing a significant rewrite and I don't have either
documentation or hardware *and* none of the code really works now
anyway, I'm taking the stance that only tested functionality should be
added, and that we'll layer the other exynos socs on this once it
fully boots.

Trailing whitespace.

branches: 1.11.2;
Add extra GPIO chunk for 5410

Xuhost bits for Exynos5 are located in the two top bits

RCSId police

Make it compile without DIAGNOSTIC

branches: 1.7.2;
Add GPIO definitions for Exynos5 series (taken from 5250)

branches: 1.6.2; 1.6.4; 1.6.6;
Don't panic if the pin is not available in pin_reserve() but return false
instead.

branches: 1.5.2;
Fix issues with the gpio controller:
* the func get/put shift is 4 bits, not 16!
* redo available and inuse bits
* create a function to get a pindata from a pinset

Revisit gpio and revisit register file mapping. The additional register files
are now mapped behind the origional register file.

The gpio channel GPZ is mapped over I2S0 in the separate audio register file
and were both abusively mapped over I2C0 in the main register file!

While here, delay the gpio bootstrap till on attachment. We could hasten it in
the odroid_machdep.c if needed. Also make the gpio code more resilliant and
allow booting correctly without any GPIO bits defined/available.

Fix typo

Add the missing ETC0, ETC6, ETC7, ETC8 `gpio' registers. They are special in
that they can't be set/unset nor configured. The only changeable parameters
are the pullups PUD and the DRV driving strength. They however fit the same
structure as the rest of the GPIOs and are used as such.

Implement gpio framework for the Samsung Exynos series.

Note that only the Exynos4 gpio registers are defined now and provision is
taken to allow for seamlessness adding of Exynos5 values.

As with ACPI, perform the fdtbus_register_i2c_controller() in a centralized
location.

Garbage-collect fdtbus_attach_i2cbus(); the regular iicbus_attach() is
sufficient now.

branches: 1.22.4; 1.22.14;
Use fdtbus_intr_establish_xname

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Change fdtbus_register_i2c_controller() to directly register the i2c_tag_t,
rather than the device and a set of functions (the only of which was to
return the i2c_tag_t anyway). Previously, this assumed only a single
i2c controller node per device_t, which is not true with an i2c mux.

branches: 1.19.4;
Traiing whitespace

Use a separate lock (not the i2c bus lock) to synchronize with the
interrupt handler. Refactor the code slightly to make the lock use
consistent.

Also includes the changes for:

Cleanup i2c bus acquire / release, centralizing all of the logic into
iic_acquire_bus() / iic_release_bus(). "acquire" and "release" hooks
no longer need to be provided by back-end controller drivers (only if
they need special handling, e.g. powering on the i2c controller).
This results in the removal of a bunch of rendundant code from each
back-end controller driver.

Assert that we are not in hard interrupt context in iic_acquire_bus(),
iic_exec(), and iic_release_bus().

Use PRIxBUSADDR

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER! Some subsystems have

#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)

Use fdtbus_attach_i2cbus

branches: 1.14.2;
If we don't get informed (via device properties) of child I2C devices,
don't assign an empty array to iba.iba_child_devices, as it will prevent
indirect configuration of the I2C bus from occurring.

Tested on Raspberry Pi (bcm2835), identical logical fix replicated
(and compile-tested) elsewhere.

PR port-arm/53171

branches: 1.13.4;
No need to explicitly set pinctrl config 0 now

Correctly initialize i2cbus attach args.

branches: 1.11.10;
zero the i2c_attach_args structure before filling it in.
fixes occasional crashes in iic_attach().

XU4 FDT pinctrl

Rewrite the use of pinctrl to reflect the new model from Jared.

XU4 i2c, gpio & pinctrl changes

modify exynos_gpio.c to support the new pinctrl model.
set up the new pinctrl model in exynos_pinctrl.c

Flesh out exynos_i2c.c and set it up to use the new pinctrl model. NOTE:
exynos_i2c.c is still incomplete. I need to figure out what to set the
prescaler and scaler to.

XU4 I2C snapshot

This is a complete, but untested, driver; except that it needs to be able
to configure gpios and, afaict, we don't yet have an fdtbus_gpio_* function
that will do that.

build fix

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4 FDT checkpoint

It is rather amazing that XU4 gets as far as it does, given how much of this
code simply doesn't work. Focusing now on getting everything converted to
FDT. Next up USB and clocks. After that nuke everything that's not needed
and start the port in earnest.

EXYNOS Rewrite step 2 of N: New exynos_gpio.c

I can't bring myself to fully nuke from orbit, so there are really two
things in this checkin:

1) A major rewrite of exynos_gpio.c, based mostly on the Nvidia
tegra_gpio.c file. This is missing a major function that will be
added the first time a customer for it is integrated, which is meant to
select pins based on aliases, rather than pin bank names.

2) A small number of changes to other files that keep the tree compiling
and progressing as far as ever; except it is now 5422 specific and
will not boot on the other exynos socs, which I don't have hardware to
test.

The choice to remove functionality is always controversial, but since
we are doing a significant rewrite and I don't have either
documentation or hardware *and* none of the code really works now
anyway, I'm taking the stance that only tested functionality should be
added, and that we'll layer the other exynos socs on this once it
fully boots.

Trailing whitespace.

branches: 1.2.2;
Make it compile without DIAGNOSTIC

branches: 1.1.2; 1.1.4; 1.1.6;
Provide bitbanging IIC for Samsung's Exynos

Get the EXYNOS kernel building again with recent FDT changes. Untested.

branches: 1.2.2; 1.2.12;
RCSId police

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10;
Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

branches: 1.8.2;
RCSId police

Implement CPU speed control for Exynos4 and Exynos5 CPUs using APLL frequency
adjustment.

branches: 1.6.2; 1.6.4; 1.6.6; 1.6.8; 1.6.10;
Revisit gpio and revisit register file mapping. The additional register files
are now mapped behind the origional register file.

The gpio channel GPZ is mapped over I2S0 in the separate audio register file
and were both abusively mapped over I2C0 in the main register file!

While here, delay the gpio bootstrap till on attachment. We could hasten it in
the odroid_machdep.c if needed. Also make the gpio code more resilliant and
allow booting correctly without any GPIO bits defined/available.

No use in duplicating the frequency settings of mct and gtmr at two different
places.

Implement evbarm_device_register_post_config() hook for odroid and its
decendents. This allows post attach actions on every level of the machine
support.

The mct runs at F_IN / XUSBXTI of 24 Mhz

Commit initial USB adapter support and associated DMA tags

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

branches: 1.6.2;
Remove never used usb locators

RCSId police

branches: 1.4.2; 1.4.4; 1.4.6; 1.4.8;
Rework USB2 attachment using a dedicated usb devices locator. This allows for
the more tightly coupled Exynos{4,5} usb2/usb2otg/usb3 controllers to share
memory spaces and IRQs

Note, currently only USB2 host is implemented.

branches: 1.3.2;
Add i2c locators, add a i2c bus indexer and provide function prototype for the
pinset to pindata function.

Use the constant for default interrupt provided by autoconf

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Merge thorpej-cfargs2.

branches: 1.6.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.5.2;
Use fdtbus_intr_establish_xname

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

branches: 1.3.12;
Add support for Samsung Exynos USB.

branches: 1.2.16; 1.2.18; 1.2.20;
Merge nick-nhusb

- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix

branches: 1.1.2;
XU4 USB snapshot: Reorganize source files

This is just a skeleton, not a set of drivers, but the pieces are now
more or less in the right places.

exyopctl(4): Don't leak a duplicate softc on attach.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Use DEVICE_COMPAT_EOL.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

branches: 1.17.4;
Support Exynos 5410 GPIO

Traiing whitespace

Use PRIxBUSADDR

Add support for devices with separate "init" and "default" pinctrl states.

branches: 1.13.4;
Make the pinctrl driver actually work.

branches: 1.12.4; 1.12.6; 1.12.8;
Configure pin defaults at attach

Adjust to new pinctrl API

Add some compat strings

branches: 1.9.10;
XU4 FDT pinctrl

Rewrite the use of pinctrl to reflect the new model from Jared.

XU4 i2c, gpio & pinctrl changes

modify exynos_gpio.c to support the new pinctrl model.
set up the new pinctrl model in exynos_pinctrl.c

Flesh out exynos_i2c.c and set it up to use the new pinctrl model. NOTE:
exynos_i2c.c is still incomplete. I need to figure out what to set the
prescaler and scaler to.

update compatible string to match exynos5422-odroidxu3.dts

branches: 1.6.2;
XU4 GPIO Review Changes

Implement suggestions from Jared.

OF_getprop -> of_getprop_bool

XU4 GPIO Driver

This is a moderately tested working gpio driver for the Exynos based ODROID
XU4. To use this you have to edit the dtd file exynos54422-pinctrl.dtsi
and change the two occurances of 'gpz' to 'gpz0'. Otherewise it will crash
on a lookup failure.

It certainly could use a code review.

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4 FDT missed files

XU4 GPIO FDT broken snapshot

This is broken. exynos_gpio_bank_config and the call to it are wrong, and
the acquire function doesn't work.

But I'm in over my head and I need to discuss this:

There is a problem with the dtd: it doesn't have addresses for the individual
gpios. Do I add the addresses to it, or go back to the old version where I
have them hard coded in the driver.

There is a problem with creating the gpio device entries: I suspect I really
need to treat the pinctrl devices as busses and create the gpios as attached
to those busses, but I'm not familiar with how to do that in NetBSD. At the
minimum, a pointer to a similar situation would give me code to follow.
This is different than the usual bus attachment in that the gpios aren't
devices in the dtd (they don't have "compatible" properties) so they don't
get an attach routine called. An alternative to generating the bus
attachments might be to add "compatible" properties to the GPIO entries
in the dtd. so that they do get attached in the normal way.

If I'm going to modify the DTD, then it should be checked in, so a decision
on where to check them in would be nice, even if it does mean spreading them
all over because of license issues. (This DTD is GPL v2)

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

branches: 1.3.4;
Support Exynos 5410 GPIO

branches: 1.2.2; 1.2.18; 1.2.22; 1.2.26;
XU4 GPIO Driver

This is a moderately tested working gpio driver for the Exynos based ODROID
XU4. To use this you have to edit the dtd file exynos54422-pinctrl.dtsi
and change the two occurances of 'gpz' to 'gpz0'. Otherewise it will crash
on a lookup failure.

It certainly could use a code review.

XU4 GPIO FDT missing file.

Refactor the "platform" defitions into fdt_platform.h

Rename ARM_PLATFORM to FDT_PLATFORM and make it available outside arm.

Build fixes.

Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.37.2;
Call acpi_device_register() / fdtbus_device_register() as approrpriate.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Use DEVICE_COMPAT_EOL.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

cpu_hatched_p does necessary memory barrier so remove membar_consumer
calls from before cpu_hatched_p calls.

branches: 1.31.2;
Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.

Get rid of a4x bus_space tag from fdtbus_attach_args. The only consumer
of this was various com(4) glue so modify all of that to use the new
com_init_regs_stride instead.

Add support for KASAN on ARMv[67]

Thanks to maxv for many pointers and reviews.

Bring back EXYNOS5422_DISABLE_CA7_CLUSTER the bug is back

Various updates and improvements to cpu start up on arm/aarch64

- start sharing more code around the AP startup messaging.
- call arm_cpu_topology_set early so that ci_core_id is available for
drivers, e.g. bcm2835_intr.c
- both arm and aarch64 now have
- a static cpu_info_store array
- the same arm_cpu_{hatched,mbox}

branches: 1.26.4; 1.26.6;
EXYNOS5422_DISABLE_CA7_CLUSTER isn't required anymore

Change ap_mpstart to return non-zero value if any/all APs don't start.

fix duplicated chunk from merge

Merge the [pgoyette-compat] branch

Starting CPUs in cluster 1 of Exynos5422 causes strange things to happen
around ap_mpstart. Until we figure out why, only start CPUs in cluster 0.

Add multi-cluster CPU spinup code for Exynos5422.

Retire fdt_putchar and ap_early_put_char in favour of uartputc.

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Remove a build dependency on SOC_EXYNOS4 and SOC_EXYNOS5. Now runtime.

Centralise defparam CONSADDR, CONSPEED, CONMODE and CONADDR into
opt_console.h and adjust.

exynos_bootstrap doesn't need an argument

Add Exynos5 SMP support.

Traiing whitespace

Some changes to bring back exynos4 support and make exynos5 support more
modern/generic

- Provide a exynos_platform_early_putchar based on CONSADDR and remove
EXYNOS_CONSOLE_EARLY
- Provide devmaps for exynos4 and exynos5
- Simplify exynos_bootstrap
- Update exynos_start.S to use exynos_platform_early_putchar - this
needs a fix in a9_subr.S for arm_cpuinit to save lr in a callee save
register and not use ip. Maybe this change is safe now, but too much
testing required to commit it now.

Add prefixes to struct arm_platform{,_info} members.

No functional change.

Sprinkle #include "opt_arm_debug.h" where VERBOSE_INIT_ARM is used

Add a proper MCT driver rather than relying on ARM Generic Timer (which
may not be functional or even present).

branches: 1.9.2;
move from sys/arch/arm/arm32/armv7_generic_dma.c to sys/arch/arm/arm/arm_generic_dma.c,
and change variable name from armv7_generic_dma_tag to arm_generic_dma_tag

no functional change. (preliminary changes for merging aarch64)

branches: 1.8.2;
Trailing whitespace

branches: 1.7.2;
Centralise defines for DEVMAP_{ALIGN,SIZE,ENTRY,ENTRY_END}

branches: 1.6.4; 1.6.6;
Implement platform reset for exynos5

Simplify MCT; just enable it and then attach an ARMv7 generic timer.

Fix build w/o VERBOSE_INIT_ARM

Add delay and enable mct timecounter.

Fix exynos5 devmap, bootstrap, and implement early_putchar.

Get the EXYNOS kernel building again with recent FDT changes. Untested.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

branches: 1.2.8;
Use PRIxBUSADDR

branches: 1.1.2; 1.1.6;
Add driver for Exynos PWM timer.

arm: handle epll rate setting in exynos5410 clocks

This is required by the Odroid-XU.

Rename the exynos clock PLL to PLL35XX to pave the wave for other PLL
types.

Same code before and after.

Rename PLL_PMS2FREQ to PLL_MPS2FREQ.

No functional change.

KNF

branches: 1.16.4;
fix various typos in word `interrupt', mainly in comments.

branches: 1.15.10; 1.15.36;
Avoid divide-by-zero for unconfigured PLLs

Get the EXYNOS kernel building again with recent FDT changes. Untested.

branches: 1.13.2; 1.13.12;
Indent PMU_PHY_ indenting

Phase 2 of samsung/exynos_* cleanup

Add usb20 phy host link enable
insert extra space

RCSId police

1st stage of USB support for Exynos5 chips: the register definitions

Add PLL registers and PLL conversion macros

branches: 1.7.2; 1.7.4; 1.7.6;
defintion -> definition

Add used pmu registers, sysreg registers and usb phy registers for USB2. More
are added when used.

branches: 1.5.2; 1.5.4;
Both Exynos4 and Exynos5 have a 24 Mhz external crystal that gets pumped up to
the required frequencies by PLL circuits.

USB freq. seems to be tied directly to this freq.

Add GPIO register definitions

Also add the frequency for the USB system; its also used for various other
clocksources

Move the watchdog registers back to the exynos_reg.h

Fix attachment of wdt to also use the bus_space_handle

While here, move the registers outside the global register file to a separate
wdt_reg.h file.

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Change todr_chip_handle::cookie -> todr_chip_handle::todr_dev, and
make it a device_t. Upcoming functional changes will require the
device_t associated with a TODR device.

Change todr_chip_handle::bus_cookie -> todr_chip_handle::todr_devaux.
Nothing was using the old field, but I decided to keep it around just
in cause something needs it in the future.

And with these largely mechanical yet semantically meaningful changes,
thus spake the Oracle: "Welcome to NetBSD 11.99.2."

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

branches: 1.3.8;
Use PRIxBUSADDR

branches: 1.2.2; 1.2.18; 1.2.22;
XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4 FDT checkpoint

It is rather amazing that XU4 gets as far as it does, given how much of this
code simply doesn't work. Focusing now on getting everything converted to
FDT. Next up USB and clocks. After that nuke everything that's not needed
and start the port in earnest.

Add .arch_extension sec to fix build. (v7a on it's own complains)

branches: 1.2.2;
RCSId police

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10;
Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Rename the exynos clock PLL to PLL35XX to pave the wave for other PLL
types.

Same code before and after.

branches: 1.41.2; 1.41.10;
Build fixes.

fix various typos in comments, messages and documentation.

branches: 1.39.4;
Fix non-DIGNOSTIC builds

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Remove a build dependency on SOC_EXYNOS4 and SOC_EXYNOS5. Now runtime.

exynos_bootstrap doesn't need an argument

Some changes to bring back exynos4 support and make exynos5 support more
modern/generic

- Provide a exynos_platform_early_putchar based on CONSADDR and remove
EXYNOS_CONSOLE_EARLY
- Provide devmaps for exynos4 and exynos5
- Simplify exynos_bootstrap
- Update exynos_start.S to use exynos_platform_early_putchar - this
needs a fix in a9_subr.S for arm_cpuinit to save lr in a callee save
register and not use ip. Maybe this change is safe now, but too much
testing required to commit it now.

Sprinkle #include "opt_arm_debug.h" where VERBOSE_INIT_ARM is used

Replace sscom with a much simpler uart driver. The simpler driver is 1/4th
the size and has the added benefit of not freezing when an arrow key is
pressed.

branches: 1.32.4; 1.32.6;
Get the EXYNOS kernel building again with recent FDT changes. Untested.

branches: 1.31.10;
XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4: Fix build

missed a dependency on evbarm/odroid that should have been evbarm/exynos.

EXYNOS Rewrite step 2 of N: New exynos_gpio.c

I can't bring myself to fully nuke from orbit, so there are really two
things in this checkin:

1) A major rewrite of exynos_gpio.c, based mostly on the Nvidia
tegra_gpio.c file. This is missing a major function that will be
added the first time a customer for it is integrated, which is meant to
select pins based on aliases, rather than pin bank names.

2) A small number of changes to other files that keep the tree compiling
and progressing as far as ever; except it is now 5422 specific and
will not boot on the other exynos socs, which I don't have hardware to
test.

The choice to remove functionality is always controversial, but since
we are doing a significant rewrite and I don't have either
documentation or hardware *and* none of the code really works now
anyway, I'm taking the stance that only tested functionality should be
added, and that we'll layer the other exynos socs on this once it
fully boots.

add 5422 gic handling to attach code

Fixup USB Phy initialisation for Exynos5410.

odroid-xu now detects USB devices.

Trailing whitespace.

branches: 1.25.2;
Add KPLL for Exynos5 and EPLL is called DPLL on the 5410 :-/

Disable maximum frequency setting for exynos5

While here add more known frequency settings for exynos4. They are currently
disabled since derived clocks are not adjusted.

arch/arm/samsung/ cleanup : move SoC specific power and phy routines into
exynos_soc.c and move Odroid board specific tweaks to odroid_machdep.c

Provide exynos_sysreg_bsh as a global bus_space_subregion

Phase 2 of samsung/exynos_* cleanup

RCSId police

Dump the PLL frequencies on startup on VERBOSE_INIT_ARM

Update the cycle counter i.e. our CPU frequency for all CPUs on setting the
cpu frequency.

tyop police

Implement CPU speed control for Exynos4 and Exynos5 CPUs using APLL frequency
adjustment.

Make it compile without DIAGNOSTIC by using __diagused

branches: 1.14.2; 1.14.4; 1.14.6;
Fix typo & include mct_reg.h

Exynos5 needs the MCT running to have the Global Timer operate.

branches: 1.12.2;
Make ODROID (-XU) compile again

branches: 1.11.2;
Revisit gpio and revisit register file mapping. The additional register files
are now mapped behind the origional register file.

The gpio channel GPZ is mapped over I2S0 in the separate audio register file
and were both abusively mapped over I2C0 in the main register file!

While here, delay the gpio bootstrap till on attachment. We could hasten it in
the odroid_machdep.c if needed. Also make the gpio code more resilliant and
allow booting correctly without any GPIO bits defined/available.

No use in duplicating the frequency settings of mct and gtmr at two different
places.

Implement evbarm_device_register_post_config() hook for odroid and its
decendents. This allows post attach actions on every level of the machine
support.

Implement gpio framework for the Samsung Exynos series.

Note that only the Exynos4 gpio registers are defined now and provision is
taken to allow for seamlessness adding of Exynos5 values.

Commit initial USB adapter support and associated DMA tags

Add the missing mpcaa_memh to reflect the correct offset.

The offsets are not actually used now on matt's request.

Teach sscom attachment, also the console, to use the busspace handle of the
main register space.

While here, map in the correct amount of memory or bus_space_map() won't
return an error but will wedge the system.

Remove unused code snippet

Remove old trustzone headerfile inclusion

Remove trustzone firmware indirect calls by explicit calling the exynos
routines in exynos_soc.c

While here, also remove unused variable conaddr

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; 1.1.12;
Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Replace sscom with a much simpler uart driver. The simpler driver is 1/4th
the size and has the added benefit of not freezing when an arrow key is
pressed.

Only process a tx or rx interrupt if the pending bit is set.

branches: 1.10.4; 1.10.6;
Get baud rate from sclk_uartN instead of uartN. Print IRQ number at attach.

Calculate UART frequency based on bootloader config.

Get the EXYNOS kernel building again with recent FDT changes. Untested.

branches: 1.7.10;
XU4 FDT missed files

EXYNOS FDT sscom

branches: 1.5.2; 1.5.4; 1.5.6; 1.5.10; 1.5.12;
We can't use IPL_SERIAL here, since it would mean its the same as IPL_HIGH
which panics the armgic's assertion.

In practice i dont think this will hurt since even the small queues are
relatively big.

Fix interrupt enable/disable and clearning bits

what was i thinking...

Teach sscom attachment, also the console, to use the busspace handle of the
main register space.

While here, map in the correct amount of memory or bus_space_map() won't
return an error but will wedge the system.

Implement sscom interrupt masking and acknowledgement routines

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Delete chipid and sysmmu drivers, they don't do anything but print that
they are not implemented at attach time.

branches: 1.2.4; 1.2.6; 1.2.8;
Fix dmesg

branches: 1.1.2; 1.1.12;
XU4 interrupt combiner / fake sysmmu

Add sysmmu to have something that calls through to the combiner's establish
routine. Debug the combiner with it.

At this point the combiner is mostly done, but the interrupt handler has not
been tested. This may never happen as we may never support any of the
devices that use the combiner for interrupts. (Or maybe mct)

Re-factor the console-related code into fdt_console.[ch]

ddb/db_active.h: New home for extern db_active.

This can be included unconditionally, and db_active can then be
queried unconditionally; if DDB is not in the kernel, then db_active
is a constant zero. Reduces need for #include opt_ddb.h, #ifdef DDB.

Add support for Apple M1 debug UART.

Use fdtbus_intr_establish_xname

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

branches: 1.3.4;
Traiing whitespace

branches: 1.2.4; 1.2.6;
Make this driver MPSAFE

branches: 1.1.2;
Replace sscom with a much simpler uart driver. The simpler driver is 1/4th
the size and has the added benefit of not freezing when an arrow key is
pressed.

XU4 USB snapshot: Reorganize source files

This is just a skeleton, not a set of drivers, but the pieces are now
more or less in the right places.

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4 FDT Last drivers converted

There is a minimum conversion on the clock driver.

The USB driver needs reordering and is broken, but it was broken before.

Next up: tactical nuclear weapons

branches: 1.13.2;
arch/arm/samsung/ cleanup : move SoC specific power and phy routines into
exynos_soc.c and move Odroid board specific tweaks to odroid_machdep.c

Use the global exynos_pmureg_bsh and exynos_sysreg_bsh bus space subregions

Power up both vbus and overcurrent lines for USB

Fix Exynos5 SoC OHCI hang

Redo the Exynos 5410 USB phy initialisation following uboot

Implement the XuhostPWREN/XuhostOVERCUR register selection
Update the usb2 isolation. It ought to work for Exynos5 too.

Only issue now is ohci not working

Fix usb attachment and add an usb2 phy enable for exynos5410.

There is still an issue with ohci

branches: 1.7.2; 1.7.4; 1.7.6;
Typo in error message.

Remove the exyo_usb_locinfo structure as exyousb becomes usb2 only

Revisit Exynos USB system implementing usb2phy support for Exynos4.

branches: 1.4.2;
Rework USB2 attachment using a dedicated usb devices locator. This allows for
the more tightly coupled Exynos{4,5} usb2/usb2otg/usb3 controllers to share
memory spaces and IRQs

Note, currently only USB2 host is implemented.

branches: 1.3.2;
The Odroids USB hub and Ethernet init are not to be done at the SoC level.

Add TDB lines

Commit initial USB adapter support and associated DMA tags

Add support for Samsung Exynos USB.

branches: 1.1.2; 1.1.18; 1.1.20; 1.1.22;
XU4 USB snapshot: Reorganize source files

This is just a skeleton, not a set of drivers, but the pieces are now
more or less in the right places.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Use DEVICE_COMPAT_EOL.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

branches: 1.2.2; 1.2.6; 1.2.16;
Fix value of PHY_CLK_RST_FSEL_24M, USB2 on XHCI works now.

Add support for Samsung Exynos USB.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

Use DEVICE_COMPAT_EOL.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

branches: 1.2.12;
Add support for Samsung Exynos USB.

branches: 1.1.2; 1.1.18; 1.1.20; 1.1.22;
XU4 USB snapshot: Reorganize source files

This is just a skeleton, not a set of drivers, but the pieces are now
more or less in the right places.

Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.

Fix several "loses const qualifier" bugs encountered during
this conversion.

branches: 1.28.4;
Support Exynos 5410 GPIO

branches: 1.27.4;
Remove a build dependency on SOC_EXYNOS4 and SOC_EXYNOS5. Now runtime.

exynos_bootstrap doesn't need an argument

Some changes to bring back exynos4 support and make exynos5 support more
modern/generic

- Provide a exynos_platform_early_putchar based on CONSADDR and remove
EXYNOS_CONSOLE_EARLY
- Provide devmaps for exynos4 and exynos5
- Simplify exynos_bootstrap
- Update exynos_start.S to use exynos_platform_early_putchar - this
needs a fix in a9_subr.S for arm_cpuinit to save lr in a callee save
register and not use ip. Maybe this change is safe now, but too much
testing required to commit it now.

Make the pinctrl driver actually work.

branches: 1.23.16; 1.23.18;
XU4 i2c, gpio & pinctrl changes

modify exynos_gpio.c to support the new pinctrl model.
set up the new pinctrl model in exynos_pinctrl.c

Flesh out exynos_i2c.c and set it up to use the new pinctrl model. NOTE:
exynos_i2c.c is still incomplete. I need to figure out what to set the
prescaler and scaler to.

XU4 GPIO Review Changes

Implement suggestions from Jared.

XU4 GPIO FDT broken snapshot

This is broken. exynos_gpio_bank_config and the call to it are wrong, and
the acquire function doesn't work.

But I'm in over my head and I need to discuss this:

There is a problem with the dtd: it doesn't have addresses for the individual
gpios. Do I add the addresses to it, or go back to the old version where I
have them hard coded in the driver.

There is a problem with creating the gpio device entries: I suspect I really
need to treat the pinctrl devices as busses and create the gpios as attached
to those busses, but I'm not familiar with how to do that in NetBSD. At the
minimum, a pointer to a similar situation would give me code to follow.
This is different than the usual bus attachment in that the gpios aren't
devices in the dtd (they don't have "compatible" properties) so they don't
get an attach routine called. An alternative to generating the bus
attachments might be to add "compatible" properties to the GPIO entries
in the dtd. so that they do get attached in the normal way.

If I'm going to modify the DTD, then it should be checked in, so a decision
on where to check them in would be nice, even if it does mean spreading them
all over because of license issues. (This DTD is GPL v2)

XU4 FDT -- fix bus tags

I got away with not having the generic bus tags for getting minimum fdt to
work; but for real drivers have to actually have them. Make necessary
corrections.

EXYNOS Rewrite step 2 of N: New exynos_gpio.c

I can't bring myself to fully nuke from orbit, so there are really two
things in this checkin:

1) A major rewrite of exynos_gpio.c, based mostly on the Nvidia
tegra_gpio.c file. This is missing a major function that will be
added the first time a customer for it is integrated, which is meant to
select pins based on aliases, rather than pin bank names.

2) A small number of changes to other files that keep the tree compiling
and progressing as far as ever; except it is now 5422 specific and
will not boot on the other exynos socs, which I don't have hardware to
test.

The choice to remove functionality is always controversial, but since
we are doing a significant rewrite and I don't have either
documentation or hardware *and* none of the code really works now
anyway, I'm taking the stance that only tested functionality should be
added, and that we'll layer the other exynos socs on this once it
fully boots.

branches: 1.18.2;
arch/arm/samsung/ cleanup : move SoC specific power and phy routines into
exynos_soc.c and move Odroid board specific tweaks to odroid_machdep.c

Provide exynos_sysreg_bsh as a global bus_space_subregion

Phase 2 of samsung/exynos_* cleanup

RCSId police

Add CPU descriminator _P() for Exynos 5422

Implement CPU speed control for Exynos4 and Exynos5 CPUs using APLL frequency
adjustment.

branches: 1.12.2; 1.12.4; 1.12.6;
Remove the exyo_usb_locinfo structure as exyousb becomes usb2 only

Revisit Exynos USB system implementing usb2phy support for Exynos4.

branches: 1.10.2;
Rework USB2 attachment using a dedicated usb devices locator. This allows for
the more tightly coupled Exynos{4,5} usb2/usb2otg/usb3 controllers to share
memory spaces and IRQs

Note, currently only USB2 host is implemented.

branches: 1.9.2;
Add i2c locators, add a i2c bus indexer and provide function prototype for the
pinset to pindata function.

Implement evbarm_device_register_post_config() hook for odroid and its
decendents. This allows post attach actions on every level of the machine
support.

Change int->void
sorry about the noise

Add exynos_gpio_pindata_ctl() analog to _pindata__read() and _pindata_write()

Implement gpio framework for the Samsung Exynos series.

Note that only the Exynos4 gpio registers are defined now and provision is
taken to allow for seamlessness adding of Exynos5 values.

Commit initial USB adapter support and associated DMA tags

Remove trustzone firmware indirect calls by explicit calling the exynos
routines in exynos_soc.c

While here, also remove unused variable conaddr

Redefine IS_EXYNOS4_P() to check for the product family instead of summing up
variants

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

branches: 1.11.8;
Use PRIxBUSADDR

branches: 1.10.18;
Exynos WDT - change the compatible string to match the current dts

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4 FDT WDT - convert driver to FDT

The watchdog timer is the most trivial driver in exynos, from the POV of
converting to FDT, so go ahead and do it first. NOTE: There's a hack in
the driver that needs to eventually be fixed -- the clock frequency is
hardwired when it should be gotten from the clock in the device tree. I'll
come back and fix this when I'm more comfortable with the api.

undo 'typo' fix and restore 'frequency' to dictionary

Oops. The 'typo' was elsewhere and I accidently removed setting
the frequency. Fix that.

Fix a typo

branches: 1.5.2;
Phase 2 of samsung/exynos_* cleanup

branches: 1.4.2; 1.4.4; 1.4.6; 1.4.8; 1.4.10;
Move the watchdog registers back to the exynos_reg.h

Move the WDT register definitions to the C source to unclutter the directory

Fix attachment of wdt to also use the bus_space_handle

While here, move the registers outside the global register file to a separate
wdt_reg.h file.

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Move the WDT register definitions to the C source to unclutter the directory

Fix attachment of wdt to also use the bus_space_handle

While here, move the registers outside the global register file to a separate
wdt_reg.h file.

Step towards modularizing the Flattened Device Tree code.

Define attributes for each of the specific device bindings: clock,
dai, dma, gpio, i2c, iommu, mbox, mmc_pwrseq, phy, power, power domain,
pwm, regulator, reset controller, spi, system controller, pin
controller. Include these support files only if either a provider
or consumer with one of these attributes is present in the kernel
config.

Add the necessary attributes to the device / attach declarations for
each provider and consumer.

There are some bindings that are consumed by generic code (iommu, pinctrl,
power, power domain). Provide weak stubs for these routines to handle
situations where there is no provider.

No actual code changed; NFCI.

Collapse all CPU_CORTEXA<n> options into CPU_CORTEX and do runtime
detection instead of ifdefs where required.

Add multi-cluster CPU spinup code for Exynos5422.

G/C

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Centralise defparam CONSADDR, CONSPEED, CONMODE and CONADDR into
opt_console.h and adjust.

Add Exynos5 SMP support.

Some changes to bring back exynos4 support and make exynos5 support more
modern/generic

- Provide a exynos_platform_early_putchar based on CONSADDR and remove
EXYNOS_CONSOLE_EARLY
- Provide devmaps for exynos4 and exynos5
- Simplify exynos_bootstrap
- Update exynos_start.S to use exynos_platform_early_putchar - this
needs a fix in a9_subr.S for arm_cpuinit to save lr in a callee save
register and not use ip. Maybe this change is safe now, but too much
testing required to commit it now.

Replace sscom with a much simpler uart driver. The simpler driver is 1/4th
the size and has the added benefit of not freezing when an arrow key is
pressed.

Add driver for Exynos PWM timer.

Add support for Samsung Exynos USB.

Attach mct early. Do not attach gtmr to mct.

XXX gtmr still needed for setstatclock symbol

Delete chipid and sysmmu drivers, they don't do anything but print that
they are not implemented at attach time.

branches: 1.25.2;
move from sys/arch/arm/arm32/armv7_generic_dma.c to sys/arch/arm/arm/arm_generic_dma.c,
and change variable name from armv7_generic_dma_tag to arm_generic_dma_tag

no functional change. (preliminary changes for merging aarch64)

branches: 1.24.4;
Add Exynos 5410 clock controller driver.

Simplify MCT; just enable it and then attach an ARMv7 generic timer.

Get the EXYNOS kernel building again with recent FDT changes. Untested.

branches: 1.21.10;
XU4 interrupt combiner / fake sysmmu

Add sysmmu to have something that calls through to the combiner's establish
routine. Debug the combiner with it.

At this point the combiner is mostly done, but the interrupt handler has not
been tested. This may never happen as we may never support any of the
devices that use the combiner for interrupts. (Or maybe mct)

XU4 USB snapshot: Reorganize source files

This is just a skeleton, not a set of drivers, but the pieces are now
more or less in the right places.

Add dwcmmc glue

XU4 GPIO Review Changes

Implement suggestions from Jared.

XU4 FDT final checkpoint

step N of N: get rid of baggage by removing whole files. What's left is in
approximately the same shape as when the FDT update started, that is mostly
broken. What's missing is most of the 76 devices recognized in the dtd. In
other words, This is barely the start of a port.

Next up, gpio then i2c, followed either by straightening out usb or getting
the sdhc driver to work -- both probably require getting the interrupt
combiner to work first. A large chunk of work is left to do on the clocks.
I barely got them attaching to fdt and didn't do anything to take advantage
of the information in the dtd.

None of the other existing drivers, such as they are, properly request gpios,
i2c or clocks, and, of course power domains are off the table.

XU4 FDT Last drivers converted

There is a minimum conversion on the clock driver.

The USB driver needs reordering and is broken, but it was broken before.

Next up: tactical nuclear weapons

XU4 FDT checkpoint

It is rather amazing that XU4 gets as far as it does, given how much of this
code simply doesn't work. Focusing now on getting everything converted to
FDT. Next up USB and clocks. After that nuke everything that's not needed
and start the port in earnest.

XU4 GPIO FDT broken snapshot

This is broken. exynos_gpio_bank_config and the call to it are wrong, and
the acquire function doesn't work.

But I'm in over my head and I need to discuss this:

There is a problem with the dtd: it doesn't have addresses for the individual
gpios. Do I add the addresses to it, or go back to the old version where I
have them hard coded in the driver.

There is a problem with creating the gpio device entries: I suspect I really
need to treat the pinctrl devices as busses and create the gpios as attached
to those busses, but I'm not familiar with how to do that in NetBSD. At the
minimum, a pointer to a similar situation would give me code to follow.
This is different than the usual bus attachment in that the gpios aren't
devices in the dtd (they don't have "compatible" properties) so they don't
get an attach routine called. An alternative to generating the bus
attachments might be to add "compatible" properties to the GPIO entries
in the dtd. so that they do get attached in the normal way.

If I'm going to modify the DTD, then it should be checked in, so a decision
on where to check them in would be nice, even if it does mean spreading them
all over because of license issues. (This DTD is GPL v2)

EXYNOS FDT sscom

XU4 FDT WDT - convert driver to FDT

The watchdog timer is the most trivial driver in exynos, from the POV of
converting to FDT, so go ahead and do it first. NOTE: There's a hack in
the driver that needs to eventually be fixed -- the clock frequency is
hardwired when it should be gotten from the clock in the device tree. I'll
come back and fix this when I'm more comfortable with the api.

XU4 FDT Enable the minimum device tree

This enables the use of FDT on the XU4 but doesn't add any drivers. However,
with this check in, XU4 becomes useless without a device tree blob from the
Linux tree, which isn't checked in anywhere.

XU4: re-enable gpio

c'n'p error left gpio disabled. fixed.

Move everything back into files.exynos

Add clock controller backend for Exynos5422. Work in progress.

branches: 1.7.2; 1.7.4; 1.7.8; 1.7.10;
Provide bitbanging IIC for Samsung's Exynos

branches: 1.6.2;
Implement gpio framework for the Samsung Exynos series.

Note that only the Exynos4 gpio registers are defined now and provision is
taken to allow for seamlessness adding of Exynos5 values.

exywdt -> exyowdt

Commit initial USB adapter support and associated DMA tags

Missing EOL at end of file

Remove trustzone firmware indirect calls by explicit calling the exynos
routines in exynos_soc.c

While here, also remove unused variable conaddr

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

Move everything back into files.exynos

Add clock controller backend for Exynos5422. Work in progress.

arm: Use device_set_private for various drivers.

Merge thorpej-cfargs2.

branches: 1.19.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.18.2;
Use fdtbus_intr_establish_xname

Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.

branches: 1.16.8;
Use PRIxBUSADDR

Add Exynos5 SMP support.

Add a proper MCT driver rather than relying on ARM Generic Timer (which
may not be functional or even present).

Add missing call to arm_fdt_timer_register

branches: 1.12.4; 1.12.6;
Simplify MCT; just enable it and then attach an ARMv7 generic timer.

Add delay and enable mct timecounter.

branches: 1.10.10;
exynos mct -- snapshot

This code is still a mess, but at least it uses an interrupt-map so I can
use it to test whether interrupt-map handling in fdt_intr_ is working
properly.

Need to get some real documentation and redo this so it works. :(

FDT: Interrupts -- add support for interrupt maps

The mct on exynos uses an interrupt map so we add support now. Devices
represent their interrupts either through a combination of interrupt-parent
and interrupts properties, where the 'interrupts' property is an array of
one or more interrupt specifiers; or through a combination of an
interrupt-parent that points to an interrupt-map, where the interrupt-map
contains 2 or more entries consisting of an index, a pointer to an
interrupt-controller, and a specifier for that controller.

This code adds the ability to walk the interrupt-map and return a specifier.
Unfortunately, the addition requires changing the interface to the
interrupt-controllers' _establish and _intstr functions, so this check in
contains a rototill of the three existing fdt interrupt controllers to use
the new interface.

XU4 interrupt combiner / fake sysmmu

Add sysmmu to have something that calls through to the combiner's establish
routine. Debug the combiner with it.

At this point the combiner is mostly done, but the interrupt handler has not
been tested. This may never happen as we may never support any of the
devices that use the combiner for interrupts. (Or maybe mct)

XU4 FDT missed files

EXYNOS Rewrite step 2 of N: New exynos_gpio.c

I can't bring myself to fully nuke from orbit, so there are really two
things in this checkin:

1) A major rewrite of exynos_gpio.c, based mostly on the Nvidia
tegra_gpio.c file. This is missing a major function that will be
added the first time a customer for it is integrated, which is meant to
select pins based on aliases, rather than pin bank names.

2) A small number of changes to other files that keep the tree compiling
and progressing as far as ever; except it is now 5422 specific and
will not boot on the other exynos socs, which I don't have hardware to
test.

The choice to remove functionality is always controversial, but since
we are doing a significant rewrite and I don't have either
documentation or hardware *and* none of the code really works now
anyway, I'm taking the stance that only tested functionality should be
added, and that we'll layer the other exynos socs on this once it
fully boots.

branches: 1.5.2;
tyop police

Substract just one each time instead of the periods missed. This will create a
more even representation of missed interrupts.

Also fix typo

branches: 1.3.2; 1.3.4; 1.3.6;
Fix missed clock interrupts calculation

branches: 1.2.2; 1.2.4;
Implement heartbeat LED using the new gpio subsystem

Add initial support for the ODROID-XU and ODROID-U3.
Still a work in progress. Started by nick and reinoud.

RCSId police