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History log of /src/sys/arch/cats/cats/cats_machdep.c
RevisionDateAuthorComments
 1.96  21-Oct-2024  skrll Fix my thinko wrt PMAP_NEED_ALLOC_POOLPAGE and restore the code that was
#ifndef PMAP_NEED_ALLOC_POOLPAGE / #endif
 1.95  20-Oct-2024  skrll G/C

PMAP_NEED_ALLOC_POOLPAGE is a failed experiment.
 1.94  20-Apr-2023  skrll Provide a shared pmap_devmap implementation and convert all pmap_devmap
arrays to use DEVMAP_ENTRY{,_END}
 1.93  08-Jan-2022  skrll defflag FCOM_INIT_ARM
 1.92  27-Aug-2021  skrll Do the VPRINTF thing and #include "opt_arm/debug.h" for VERBOSE_INIT_ARM
 1.91  27-Aug-2021  skrll initarm_common already calls db_machine_init, so don't do it for a second
time otherwise the handlers list just loops.
 1.90  27-Aug-2021  skrll lower case for hex values.
 1.89  18-Apr-2020  skrll PMAP_DEBUG has been deleted on arm
 1.88  16-Jul-2019  skrll branches: 1.88.8;
Consistently use vaddr_t as initarm and friends return type.

Makes no difference to binaries except for aarch64 where it's required
 1.87  26-Apr-2019  skrll The free block after the kernel from arm32_bootmem_init doesn't
account for bt_memavail. Adjust for this.
 1.86  15-Aug-2017  maya branches: 1.86.4;
remove unnecessary include. no aout code here!
 1.85  15-Aug-2017  maya Remove dead code. it isn't possible to do non-__ELF__ builds
 1.84  13-Jun-2017  skrll Now that bus_space can use devmap - use it for early console
 1.83  19-Mar-2017  skrll branches: 1.83.6;
Support __HAVE_MM_MD_DIRECT_MAPPED_PHYS
 1.82  04-Apr-2014  skrll branches: 1.82.6; 1.82.10; 1.82.14;
Convert cats to the new world order, i.e. arm32_{bootmem,kernel_vm}_init.
Make VERBOSE_INIT_ARM work while I'm here.
 1.81  04-Apr-2014  skrll whitespace.
 1.80  04-Apr-2014  skrll Revert previous - it wasn't complete.
 1.79  02-Apr-2014  skrll Convert cats to the new world order, i.e. arm32_{bootmem,kernel_vm}_init
 1.78  02-Apr-2014  matt Don't map ebsabootinfo.bt_vargp if it is the same address as the vector page
 1.77  18-Aug-2013  matt Include <arm/locore.h>
 1.76  13-Oct-2012  jdc branches: 1.76.2;
Adapt to the changed signature of pckbc_cnattach().
 1.75  22-Sep-2012  matt Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead
but add a second argument to it to indicate whether the TLB/caches need to be
flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field
to see if the fixed can be skipped.
Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1)
or enabeld (bit = 0).

With these changes, the A9 MMU can use traverse caches to do MMU tablewalks
Also, make sure all memory has the shareable bit for the A9.
 1.74  16-Aug-2012  matt branches: 1.74.2;
Move the standard definitions of the {UND,IRQ,FIQ,ABT}_STACK_SIZE to
<arm32/machdep.h>
Move the extern for cpu_reset_address to the same file.
Add cpu_reset_address_paddr.
Kill cpu_reset_v4_MMU_disable.
if cpu_reset_address is NULL, then the MMU will be disabled.
 1.73  29-Jul-2012  matt Fix more -fno-common fallout.
Move more variables to common locations.
 1.72  06-Feb-2012  matt Make this compile with VERBOSE_ARM_INIT.
If the AOUT magic is not ZMAGIC, assume kernel is ELF.
 1.71  01-Jul-2011  dyoung branches: 1.71.2; 1.71.6;
#include <sys/bus.h> instead of <machine/bus.h>.
 1.70  30-Jun-2011  wiz dependant -> dependent
 1.69  28-Dec-2009  uebayasi More setttb() -> cpu_setttb() for readability & consistency. Missing instances
pointed out by tsutsui@ & nonaka@, thanks.
 1.68  27-Nov-2009  rmind - Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
 1.67  26-Nov-2009  matt Kill proc0paddr. Use lwp0.l_addr instead.
 1.66  18-Aug-2009  he No longer rely on <sys/exec.h> including <sys/exec_aout.h>.
Hi, matt@!
 1.65  11-Aug-2009  matt Remove all declarations of physmem from sys/arch. Add an include of
<sys/systm.h> to the one file that did not already contain it.
This now means that physmem can be changed by updating systm.h and uvm_page.c
(excluding fixing printfs)
 1.64  13-Feb-2009  apb Use "defopt MODULAR" in sys/conf/files, and #include "opt_modular.h"
in all kernel sources that use the MODULAR option.
Proposed in tech-kern on 18 Jan 2009.
 1.63  30-Nov-2008  martin branches: 1.63.4;
As discussed on tech-kern: mutex_init is too heavyweight for early bootstrap
phases, so move the initialization of the ksyms mutex back into main via
a function called ksyms_init. Rename the existing (but quite different)
ksyms_init* variations into ksyms_addsyms_elf() and ksyms_addsyms_explicit()
and adapt machdep code accordingly.
 1.62  12-Nov-2008  ad Remove LKMs and switch to the module framework, pass 1.

Proposed on tech-kern@.
 1.61  11-Nov-2008  dyoung It is not appropriate to call pmf_system_shutdown(9) from
doshutdownhooks(9): shutdown hooks registered by shutdownhook_establish(9)
expect to be called with interrupts disabled, but shutdown hooks
registered with pmf_device_register1(9) expect to be called with
interrupts enabled. So I have made two changes:

1 Do not call pmf_system_shutdown() from doshutdownhooks(). Instead,
change every call to doshutdownhooks() to a call to doshutdownhooks()
followed by a call to pmf_system_shutdown(). No functional change
is intended by this change.

2 Make i386 re-enable interrupts briefly while it calls
pmf_system_shutdown(). I leave it to others either to fix the
other ports, or to factor out some MI shutdown code, as joerg@
suggests, and fix that. Note that a functional change *is* intended
by this change.

I hope that this patch will stop us from flip-flopping between
calling doshutdownhooks() and pmf_system_shutdown() sometimes with
and sometimes without interrupts enabled.
 1.60  27-Apr-2008  matt branches: 1.60.6; 1.60.8;
Merge kernel changes in matt-armv6 to HEAD.
 1.59  19-Jan-2008  chris branches: 1.59.6; 1.59.8; 1.59.10;
Remove arm support for IPKDB.

It hasn't worked since arm was broken out from arm32 in Jan 2001, and
no-one has noticed or cared to fix it.
 1.58  24-Nov-2006  wiz branches: 1.58.24; 1.58.28; 1.58.30; 1.58.36; 1.58.44;
s/independant/independent/, from Zafer.
 1.57  27-Jun-2006  he branches: 1.57.4; 1.57.6;
Fix a build problem ('kernel_l1pt.pv_va may be used uninitialized').
 1.56  11-Dec-2005  christos branches: 1.56.4; 1.56.8; 1.56.16;
merge ktrace-lwp.
 1.55  03-Jun-2005  chris branches: 1.55.2;
de-__P and ansify some functions.

Also add a const.
 1.54  03-Jun-2005  chris Remove long dead max_processes variable and PMAP_STATIC_L1S from config
files.
These options haven't been needed since the arm pmap was switched to using
domains.
 1.53  03-Jun-2005  chris Add const, fix -Wcast-qual and fix shadow warning.

Also add some tracing I used to debug booting issues with ABLE.
 1.52  12-Dec-2004  abs Fix comments slighly
 1.51  04-Oct-2003  chris Add Experimental ELF support for cats. Only to be used if you feel daring
enough to run the ABLE firmware.
 1.50  04-Oct-2003  chris Fix booting from ABLE on cats. Two problems fixed here:
1. ABLE sets the l1pt to use domain 3 for it's entries (no idea why) so to
cover all bases when setting the domain before the change to the new L1pt
become a client of all domains.
2. It seems that we setup the kernel entries without any access permission.
(note not sure that this isn't a bug) And rely on the control bits
containing either ROM or SYST enable. which allows access to pages without
access permissions set. We actually enable SYST when we do the full detect
of the CPU, but we don't detect the CPU till after the L1pt switch, which
we never make it past. Fix this by explicitly enabling the SYST bit in the
control register. rather than relying on the firmware to have dont the right
thing.
 1.49  15-Jul-2003  lukem __KERNEL_RCSID()
 1.48  14-Jun-2003  thorpej branches: 1.48.2;
Also pass a type argument to comcnattach() and com_kgdb_attach().
comspeed() (and thus cominit()) may need this information.
 1.47  22-May-2003  thorpej Move KERNEL_VM_SIZE into the C files where its used.
 1.46  21-May-2003  thorpej Move KERNEL_VM_BASE inside where it is used (it won't be there for long).
 1.45  03-May-2003  thorpej Don't expose KERNEL_TEXT_BASE outside of board-specific code. This gives
individual board start-up code more flexibility about where the kernel
starts in the kernel address space.
 1.44  03-May-2003  thorpej Reduce differences between ARM32_NEW_VM_LAYOUT and not; always pass
the start and end of the kernel managed virtual address space to
pmap_bootstrap() in the new pmap.
 1.43  03-May-2003  thorpej Remove old pmap support for platforms which have fully switched over.
 1.42  02-May-2003  thorpej Eliminate PTE_BASE and the PT-PT completely in the ARM32_PMAP_NEW case.
Also in the ARM32_PMAP_NEW case, reclaim the USPACE-bytes of wasted space
at the top of the user address that hasn't been needed for a very very
long time.
 1.41  26-Apr-2003  chris Add support for ARM32_PMAP_NEW. also make it the default for all cats
kernels.
 1.40  26-Apr-2003  ragge Call ksyms_init() instead of ddb_init() in case of
NKSYMS || defined(DDB) || defined(LKM)
 1.39  01-Apr-2003  thorpej Use PAGE_SIZE rather than NBPG.
 1.38  17-Jan-2003  thorpej Merge the nathanw_sa branch.
 1.37  03-Nov-2002  chris Checkin new interrupt handling code for the footbridge.
This is based upon Jason's work on xscale.

Most of the interrupt handling code is now written in C using an asm stub to
call into the C code.

spl* now only updates a software mask, and does not update the hardware,
this should be much faster.

The new code works well on cats, it's untested on netwinder, but should work.

The code implements generic soft interrupts.

More work is still required to bring the isa interrupt handling code upto
scratch currently all isa interrupts are handled at IPL_BIO on the footbridge.
This may cause isa interrupts to be handled later than they should be.
I plan to fix this in the near future.
 1.36  12-Oct-2002  chris Merge isa_machdep.c from netwinder and cats into footbridge/isa (where it
joins other machdep files)
Saves maintaining multiple copies of the same thing, the only differences
were:
IRQ line used on the footbridge (made that a define in include/isa_machdep.h)
name of a dma_ranges variable contained arch name, so just made it generic.
 1.35  27-Sep-2002  provos remove trailing \n in panic(). approved perry.
 1.34  24-Aug-2002  thorpej Enable caching on kernel and user page tables. This saves having
to do uncached memory access during VM operations (which can be
quite expensive on some CPUs).

We currently write-back PTEs as soon as they're modified; there is
some room for optimization (to write them back in larger chunks).
For PTEs in the APTE space (i.e. PTEs for pmaps that describe another
process's address space), PTEs must also be evicted from the cache
complete (PTEs in PTE space will be evicted durint a context switch).
 1.33  21-Aug-2002  thorpej Do cached memory access to L1 tables, making sure to write-back the
cache after any L1 table modifications.
 1.32  31-Jul-2002  thorpej Overhaul how DMA ranges work in the ARM bus_dma implementation.

A new "arm32_dma_range" structure now describes a DMA window, with
a system address base, bus address base, and length. In addition to
providing info about which memory regions are legal for DMA, the new
structure provides address translation support, as well.

As before, if a tag does not list any ranges, then all addresses are
considered valid, and no DMA address translation is performed.

This allows us to remove a large chunk of code which was duplicated and
tweaked slightly (to do the address translation) from the stock ARM
bus_dma in the XScale IOP and ARM Integrator ports.

Test compiled on all ARM platforms, test booted on Intel IQ80321 and Shark.
 1.31  31-Jul-2002  thorpej Move the calls to uvm_page_physload() out of pmap_bootstrap() and
into platform-specific initialization code, giving platform-specific
code control over which free list a given chunk of memory gets put
onto.

Changes are essentially mechanical. Test compiled for all ARM
platforms, test booted on Intel IQ80321 and Shark.

Discussed some time ago on port-arm.
 1.30  30-Jul-2002  thorpej Move the uvm_setpagesize() call to platform-dependent code in preparation
for other changes to pmap_bootstrap().
 1.29  05-Apr-2002  thorpej branches: 1.29.2; 1.29.4;
* Rewrite the 32-bit ARM pte.h based on the ARM architecture manual.
Significant cleanup, here, including better PTE bit names.
* Add XScale PTE extensions (ECC enable, write-allocate cache mode).
* Mechanical changes everywhere else to update for new pte.h. While
doing this, two bugs (as a result of typos) were fixed in

arm/arm32/bus_dma.c
evbarm/integrator/int_bus_dma.c
 1.28  03-Apr-2002  thorpej Clean up handling of the vector page on 32-bit ARM systems:
* Don't refer to VA 0, instead refer to a new variable: vector_page
* Delete the old zero_page_*() functions, replacing them with a new
one: vector_page_setprot().
* When manipulating vector page mappings in user pmaps, only do so if
the vector page is below KERNEL_BASE (if it's above KERNEL_BASE, the
vector page is mapped by the kernel pmap).
* Add a new function, arm32_vector_init(), which takes the virtual
address of the vector page (which MUST be valid when the function
is called) and a bitmask of vectors the kernel is going to take
over, and performs all vector page initialization, including setting
the V bit in the CPU Control register ("relocate vectors to high
address"), if necessary.
 1.27  25-Mar-2002  thorpej * Fix use of pmap_curmaxkvaddr.
* Use the PTP hint in the pmap.
 1.26  23-Mar-2002  thorpej * Rename PROCESS_PAGE_TBLS_BASE -> PTE_BASE
* Rename ALT_PAGE_TBLS_BASE -> APTE_BASE
* Garbage-collect PAGE_TABLE_SPACE_START
 1.25  03-Mar-2002  chris Implement pmap_growkernel for arm32 based ports.
Note that this has been compiled on some systems, cats, IQ80310, IPAQ, netwinder and shark (note that shark's build is currently broken due to other reasons), but only actually run on cats.
Shark doesn't make use of the functionality as I believe there has to be a correlation between OFW and the kernel tables so that calls into OFW work.
 1.24  22-Feb-2002  skrll Pass the VA for kernel_ptpt as the VA to pmap_map_entry
 1.23  22-Feb-2002  skrll Make sure the kernel_pt_table has the right physical to virtual address
mapping.
 1.22  22-Feb-2002  thorpej Change pmap_map_entry() to work like pmap_map_chunk(): take a pointer
to the L1 table and a virtual address, and no pointer to the L2 table.
The L2 table will be looked up by pmap_map_entry(), which will panic
if the there is no L2 table for the requested VA.

NOTE: IT IS EXTREMELY IMPORTANT THAT THE CORRECT VIRTUAL ADDRESS
BE PROVIDED TO pmap_map_entry()! Notably, the code that mapped
the kernel L2 tables into the kernel PT mapping L2 table were not
passing actual virtual addresses, but rather offsets into the range
mapped by the L2 table. I have fixed up all of these call sites,
and tested the resulting kernel on both an IQ80310 and a Shark.
Other portmasters should examine their pmap_map_entry() calls if
their new kernels fail.
 1.21  21-Feb-2002  thorpej Keep track of which kernel PTs are available during bootstrap,
and let pmap_map_chunk() lookup the correct one to use for the
current VA. Eliminate the "l2table" argument to pmap_map_chunk().

Add a second L2 table for mapping kernel text/data/bss on the
IQ80310 (fixes booting kernels with ramdisks).
 1.20  21-Feb-2002  thorpej Always pass the L1 table to pmap_map_chunk(). This allows pmap_map_chunk()
to perform some error checking.
 1.19  21-Feb-2002  thorpej map_chunk() -> pmap_map_chunk(), and move it to pmap.c
 1.18  20-Feb-2002  thorpej map_pagetable() -> pmap_link_l2pt(), and move it to pmap.c
 1.17  20-Feb-2002  thorpej Collapse map_entry{,ro,nc}() into a single pmap_map_entry() that
takes a prot and a "cacheable" indicator.
 1.16  20-Feb-2002  thorpej Rename map_section() to pmap_map_section(), move it to pmap.c, and give it
an extra argument (prot - specifies protection of the mapping).
 1.15  10-Feb-2002  chris Fix a potential boot failure, we need to make sure that the pt's used for the kernel mapping are contiguous otherwise map_chunk etc could overwrite the L1 table.
 1.14  10-Feb-2002  chris Change reference from arm32 to cats in printf, pointed out by wiz.
 1.13  09-Feb-2002  chris Move the arm32/pci files into the cats dir. AFAIK these files are only used by cats.
 1.12  25-Jan-2002  thorpej Overhaul of the ARM cache code. This is mostly a simplification
pass. Rather than providing a whole slew of cache operations that
aren't ever used, distill them down to some useful primitives:

icache_sync_all Synchronize I-cache
icache_sync_range Synchronize I-cache range

dcache_wbinv_all Write-back and Invalidate D-cache
dcache_wbinv_range Write-back and Invalidate D-cache range
dcache_inv_range Invalidate D-cache range
dcache_wb_range Write-back D-cache range

idcache_wbinv_all Write-back and Invalidate D-cache,
Invalidate I-cache
idcache_wbinv_range Write-back and Invalidate D-cache,
Invalidate I-cache range

Note: This does not yet include an overhaul of the actual asm files
that implement the primitives. Instead, we've provided a safe default
for each CPU type, and the individual CPU types can now be optimized
one at a time.
 1.11  22-Jan-2002  chris Update/remove prototypes.
 1.10  19-Jan-2002  chris Following on from similair change by Jason for xscale, pass the l1 page table into the map_chunk function so it can try to map the kernel in sections.
 1.9  12-Jan-2002  chris Make GENERIC cats kernel boot again. By allocating a 2nd second level page table for the kernel and stack space we can now have to 8MB of kernel and stacks (if the kernel ever gets really bloated might need to add a 3rd!)
Also update the funcs in arm32_machdep.c that create the entries so that on cats they expect the 2 pagetables to be contiguous, note this means that for now cats is special cased in lots of funcs. I'll tidy this up to something a bit more sane soon, to avoid the multitude of #ifndef cats that I had to sprinkle in.
 1.8  07-Jan-2002  chris Finish up the changes to get LOOSE_PROTOTYPES working for cats.
Note that this leaves a few inconsistencies (no more than we already had though) eg initarm is now prototyped in arm32/machdep.h, however only cats currently makes use of that header.
 1.7  23-Nov-2001  thorpej Use <arm/undefined.h> instead of <machine/undefined.h>.
 1.6  23-Nov-2001  thorpej No need to pull in <machine/pte.h> directly.
 1.5  09-Nov-2001  thorpej branches: 1.5.2;
Add some rudimentary support for ELF symbols in DDB on the ARM ports.
On platforms which load the kernel sans symbols directly from firmware
(possibly in e.g. S-Record format), call ddb_init() with empty arguments,
so that it will search any compiled in SYMTAB_SPACE. On all other platforms,
if __ELF__, also call ddb_init() with empty arguments until ELF bootloaders
which pass symbol information are ready.
 1.4  09-Nov-2001  thorpej Remove unneeded declarations of the db_machine_init() function. The
ARM ports are the only ones that actually have one, and it is about
to change.
 1.3  09-Nov-2001  thorpej Remove unnecessary prototypes for zero_page_read{only,write}().
 1.2  05-Sep-2001  matt branches: 1.2.4;
Change <machine/irqhandler.h> to <machine/intr.h> since the latter always
includes the former and is a standard include file.
 1.1  20-Jun-2001  chris branches: 1.1.2;
Remove defopt EBSA285.
Move the files from footbridge that are cats specific.
Remove EBSA285 kernel as people should be able to use the generic cats kernel for EBSA285 systems.
 1.1.2.8  18-Oct-2002  jdolecek sync with -current:
Merge isa_machdep.c from netwinder and cats into footbridge/isa
 1.1.2.7  10-Oct-2002  jdolecek sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
 1.1.2.6  06-Sep-2002  jdolecek sync kqueue branch with HEAD
 1.1.2.5  23-Jun-2002  jdolecek catch up with -current on kqueue branch
 1.1.2.4  16-Mar-2002  jdolecek Catch up with -current.
 1.1.2.3  11-Feb-2002  jdolecek Sync w/ -current.
 1.1.2.2  10-Jan-2002  thorpej Sync kqueue branch with -current.
 1.1.2.1  13-Sep-2001  thorpej Update the kqueue branch to HEAD.
 1.2.4.1  12-Nov-2001  thorpej Sync the thorpej-mips-cache branch with -current.
 1.5.2.11  11-Nov-2002  nathanw Catch up to -current
 1.5.2.10  18-Oct-2002  nathanw Catch up to -current.
 1.5.2.9  27-Aug-2002  thorpej Sync with -current.
 1.5.2.8  01-Aug-2002  nathanw Catch up to -current.
 1.5.2.7  24-Jun-2002  nathanw Curproc->curlwp renaming.

Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".

"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
 1.5.2.6  17-Apr-2002  nathanw Catch up to -current.
 1.5.2.5  01-Apr-2002  nathanw Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
 1.5.2.4  28-Feb-2002  nathanw Catch up to -current.
 1.5.2.3  11-Jan-2002  nathanw More catchup.
 1.5.2.2  08-Jan-2002  nathanw Catch up to -current.
 1.5.2.1  09-Nov-2001  nathanw file cats_machdep.c was added on branch nathanw_sa on 2002-01-08 00:23:47 +0000
 1.29.4.2  14-Feb-2003  he Revert pull-up of revision 1.33 (requested by rearnsha in ticket #1170):
Revert cached memory access to L1 tables, this causes instability
on the release branch.
 1.29.4.1  21-Nov-2002  he Pull up revision 1.33 (requested by thorpej in ticket #712):
Do cached memory access to L1 tables, making sure to
write-back the cache after any L1 table modifications.
 1.29.2.1  30-Aug-2002  gehenna catch up with -current.
 1.48.2.5  10-Nov-2005  skrll Sync with HEAD. Here we go again...
 1.48.2.4  18-Dec-2004  skrll Sync with HEAD.
 1.48.2.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.48.2.2  18-Sep-2004  skrll Sync with HEAD.
 1.48.2.1  03-Aug-2004  skrll Sync with HEAD
 1.55.2.2  21-Jan-2008  yamt sync with head
 1.55.2.1  30-Dec-2006  yamt sync with head.
 1.56.16.1  13-Jul-2006  gdamore Merge from HEAD.
 1.56.8.1  11-Aug-2006  yamt sync with head
 1.56.4.1  09-Sep-2006  rpaulo sync with head
 1.57.6.1  10-Dec-2006  yamt sync with head.
 1.57.4.1  12-Jan-2007  ad Sync with head.
 1.58.44.1  20-Jan-2008  bouyer Sync with HEAD
 1.58.36.1  18-Feb-2008  mjf Sync with HEAD.
 1.58.30.2  23-Mar-2008  matt sync with HEAD
 1.58.30.1  28-Jan-2008  matt Adapt to new pmap_bootstrap signature.
 1.58.28.2  20-Jan-2008  chris Sync to HEAD.
 1.58.28.1  11-Aug-2007  chris Initial check-in of reworked arm interrupt routines.

Main things to note on this branch:
* spl routines are inlined, less complex, and small (kernel drops in size)
* interrupts are handled in priority order (for most things it doesn't
matter, but pending ipls are used to determine if there is any work to do)
* arm_irqhandler.c is derived from footbridge_irqhandler.c, which was based
on work by thorpej.
* The code tries to touch hardware as little as possible.
* spl masks are no longer tracked, as the system is based on pending ipls

The shared code uses global ipl lists to track which interrupt handlers
are attached to which ipl (arm_iplq[]).

Interrupt sources register with the common code to indicate:
* how many irq lines they have
* a function to set the hardware mask.
* call arm_intr_claim and arm_intr_disestablish to setup handlers

When an interrupt occurs the ipl is flagged as pending, in ipls_pending.
If it can be handled at the current_ipl_level the code does so.
If it can't be handled it's left until the current_ipl_level drops.

As the ipl level changes down a quick test is made of the new ipl level
against the ipls_pending value. If an ipl is pending arm_intr_splx_lifter
is called to handle the pending ipls.

It should be noted that all interrupts are left enabled at the hardware
level, interrupts are only masked when they occur. They are only
re-enabled after it's interrupt handler is called. Hardware masks are not
changed at any other time.

Soft interrupts are treated the same as hardware interrupts, they
register as a provider, and do not get treated specially. All the soft
interrupt handlers are placed onto the relevant global ipl queue, the same
as hard interrupts handlers.

At the moment only footbridge within a cats has been updated to use the new
handling.

Todo:
* change the handling of interrupts, so that the hardware doesn't register
a routine to fetch the hardware status. Instead is makes a call which
provides the mask. This removes the primary flag when registering an
interrupt provider. It also makes more sense with multiple interrupt
sources.
* Arm v5 has the clz asm, which could be used instead of the carefully
hand rolled arm_intr_fls function.
* switch cats isa support to use this framework.
* switch iomd and acorn32 to use this framework.
* switch shark to use this framework.
* port any other arm platforms that are interested
* examine overlaps between this code and ppcoea-renovation branch.
* add support for different trigger types (Edge, level, pulse, etc)

(note that iomd and shark currently touch hardware on every spl change,
hence why they're targets to port)
 1.58.24.1  28-Feb-2008  rjs Sync with HEAD.
 1.59.10.4  11-Mar-2010  yamt sync with head
 1.59.10.3  19-Aug-2009  yamt sync with head.
 1.59.10.2  04-May-2009  yamt sync with head.
 1.59.10.1  16-May-2008  yamt sync with head.
 1.59.8.1  18-May-2008  yamt sync with head.
 1.59.6.2  17-Jan-2009  mjf Sync with HEAD.
 1.59.6.1  02-Jun-2008  mjf Sync with HEAD.
 1.60.8.2  03-Mar-2009  skrll Sync with HEAD.
 1.60.8.1  19-Jan-2009  skrll Sync with HEAD.
 1.60.6.1  13-Dec-2008  haad Update haad-dm branch to haad-dm-base2.
 1.63.4.1  13-May-2009  jym Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.
 1.71.6.1  18-Feb-2012  mrg merge to -current.
 1.71.2.3  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.71.2.2  30-Oct-2012  yamt sync with head
 1.71.2.1  17-Apr-2012  yamt sync with head
 1.74.2.3  03-Dec-2017  jdolecek update from HEAD
 1.74.2.2  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.74.2.1  20-Nov-2012  tls Resync to 2012-11-19 00:00:00 UTC
 1.76.2.2  18-May-2014  rmind sync with head
 1.76.2.1  28-Aug-2013  rmind sync with head
 1.82.14.1  21-Apr-2017  bouyer Sync with HEAD
 1.82.10.1  20-Mar-2017  pgoyette Sync with HEAD
 1.82.6.1  28-Aug-2017  skrll Sync with HEAD
 1.83.6.3  28-Apr-2019  martin Redo previous, this time actually using the patch requested in the ticket:
pull up following revision(s) (requested by skrl in ticket #1249):

sys/arch/cats/cats/cats_machdep.c: revision 1.87 (via patch)

The free block after the kernel from arm32_bootmem_init doesn't
account for bt_memavail. Adjust for this.
 1.83.6.2  26-Apr-2019  martin Pull up following revision(s) (requested by skrl in ticket #1249):

sys/arch/cats/cats/cats_machdep.c: revision 1.87

The free block after the kernel from arm32_bootmem_init doesn't
account for bt_memavail. Adjust for this.
 1.83.6.1  05-Jul-2017  martin Pull up following revision(s) (requested by skrll in ticket #83):
sys/arch/cats/cats/cats_machdep.c: revision 1.84
sys/arch/arm/footbridge/footbridge_io.c: revision 1.23
sys/arch/cats/conf/GENERIC: revision 1.162
Use devmap if available
Now that bus_space can use devmap - use it for early console
Comment out a bunch of thing so that a GENERIC kernel boots on my cats
with cyclone firmware
 1.86.4.3  21-Apr-2020  martin Sync with HEAD
 1.86.4.2  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.86.4.1  10-Jun-2019  christos Sync with HEAD
 1.88.8.1  20-Apr-2020  bouyer Sync with HEAD

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