Provide a shared pmap_devmap implementation and convert all pmap_devmap
arrays to use DEVMAP_ENTRY{,_END}

Add ARMEB support to {evb,}arm/marvell.

Combined with upcoming commit to dev/marvell, all peripheral devices
seem to work just fine for KUROBOX_PRO in big-endian mode.

Consistently use vaddr_t as initarm and friends return type.

Makes no difference to binaries except for aarch64 where it's required

Centralise defparam CONSADDR, CONSPEED, CONMODE and CONADDR into
opt_console.h and adjust.

Sprinkle #include "opt_arm_debug.h" where VERBOSE_INIT_ARM is used

branches: 1.33.14; 1.33.16;
Add support Marvell Dove.
Also <SoC>_intr_bootstrap() rename to <SoC>_bootstrap(). And SoC init func, getclk into that.

branches: 1.32.2;
initialize ARMADA XP's Mbus address decoder and code clean up
probably we need more sophisticated Mbus driver or KPI...

add synchronization barrier for AURORA_IO_CACHE_COHERENCY.
cleanup MARVELL L2 cache code.

branches: 1.30.2;
Support __HAVE_MM_MD_DIRECT_MAPPED_PHYS.

Use armreg_ttbr_read() instead of __asm("mrc ...").

Support Armada 370.

Abolish run time configuration for mapped address of SoC by u-boot.
This had become a cause hang-ups from some models.

Support to check the clock gating for Armada XP in armadaxp.c.
Also move the checking for clock gate of Kirkwood into kirkwood.c.

Move Misc Registers from mvsocreg.h to armadaxpreg.h. These registers only
Armada XP. The misc_base initializes in initarm() instead of mvsoc_bootstrap().

Rename marvell_system_reset_old from marvell_system_reset.
And add reset function for ArmadaXP. It named marvell_system_reset.

Initialize mvTclk in SOC_getclks() before call consinit().
And more fast call set_cpufuncs().

Support ARMADA XP.

branches: 1.21.2;
Change physical_end to segment_end to avoid shadowing a global.

Get bootargs and parse them. This was accidentally removed in rev. 1.17.
Fixes PR#47250.

Switch to ARM_VECTORS_HIGH

branches: 1.18.2;
Increase kernel VM space.

Switch beagle and marvell to use the new boot/init code.

Allocate more VM space for over 8M kernel.

Move the standard definitions of the {UND,IRQ,FIQ,ABT}_STACK_SIZE to
<arm32/machdep.h>
Move the extern for cpu_reset_address to the same file.
Add cpu_reset_address_paddr.
Kill cpu_reset_v4_MMU_disable.
if cpu_reset_address is NULL, then the MMU will be disabled.

Make mvsoc_bootstrap (so it can initial an early console).

Remove unnecessary property 'xore-irq-begin'.

Fix to assert. We call to strncpy(), if r3 of args is valid from u-boot.

Fix more -fno-common fallout.
Move more variables to common locations.

Remove declartions of physmem

Support 88F6282. But PEX1 not test.

Set default EVBARM_BOARDTYPE is Marvell.

Make this compile NMVPEX > 0 && !ORION && KIRKWOOD.

branches: 1.6.2;
"if (mvTclk == 166666667) mvTclk = 166664740;" does not make sense.

It's within the margin of a 25.000MHz crystal multiplied by 20
and divided by 3, so it's moot anyway.

branches: 1.5.2; 1.5.6;
dependant -> dependent

branches: 1.4.2;
Use the command line U-Boot gave us for boothowto. From evbarm/gumstix.

Address 3rd issue in PR#43990.
Different implementation but same method as suggested.

ksyms_init() happens in main() now.

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
Add support Marvell Sheevaplug.
Add some NAS on Marvell SoC.

Hmm, fix typo in comments again...

Fix typo for the previous. No binary changes.

Initial support for armv5eb on Sheeva.

Disable L2 cache for Sheeva before switch to big-endian mode.

Note that we need to encode this code sequence in little endian,
as u-boot starts kernel in little-endian mode.

XXX
At the moment, this code is unconditionally enabled if CPU_SHEEVA
option is enabled; it does not work for older CPUs.

It would be better to determine CPU type automatically as done for
little-endian variant, but it is too ugly to hand-assemble for
the opposite byte-order.

It may be nice if we have tools something like:

$ nbarm-elf-bswap -s marvell_start -e Lswitch_endian_done netbsd

Tested for OPENBLOCKS_A6 (for CPU_SHEEVA), as well as KUROBOX_PRO
(for !CPU_SHEEVA).

Add ARMEB support to marvell_start.

Since u-boot is running in little-endian mode, first few instructions
(to switch byte-order) should be encoded in little-endian. After that,
nop's in little-endian should appear in order to flush prefetch buffer.
Then, CPWAIT() ensure entering in big-endian mode.

Catch up with armadaxp_start.S:1.5... if only we had generic start code
for arm

Only ent KERNEL_BASE_EXT when we want to change KERNEL_BASE from its
default of 0x8000_0000

Don't use KERNEL_BASE_EXT where KERNEL_BASE should be instead.

Workaround a as(1) weirdness in armadaxp_start.S

branches: 1.8.18; 1.8.20;
Fix initialize PJ4B.

Fix broken registers.

Add hook to set L2 cache to write-through

branches: 1.5.2;
Abolish run time configuration for mapped address of SoC by u-boot.
This had become a cause hang-ups from some models.

Remove undefined CPU ID. Thanks skrll@.

Support ARMADAXP.
+ Add MVSOC_FIXUP_DEVID.
+ check mapped address for SoC registers.

branches: 1.2.2; 1.2.6; 1.2.16; 1.2.20;
Add RCSID when needed.
Don't include pmap.h or pte.h, include "assym.h" instead.
Use assym.h provided values.

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
Add support Marvell Sheevaplug.
Add some NAS on Marvell SoC.

Add support Marvell Dove.
Also <SoC>_intr_bootstrap() rename to <SoC>_bootstrap(). And SoC init func, getclk into that.

branches: 1.4.6; 1.4.10;
Support options MVSOC_INTERREGS_PBASE for *old* Armada {XP,370} machines.

Support ARMADA XP.

branches: 1.2.4;
Handle differences for Armada XP.

Obtained from Marvell, Semihalf.

branches: 1.1.2; 1.1.4; 1.1.10; 1.1.14; 1.1.24;
Add support Marvell Sheevaplug.
Add some NAS on Marvell SoC.

add new ethernet driver mvxpe for recent MARVELL's SoC after ARMADA/XP.
this driver supports 'counter mode', and is disabled by default.

ARMADA SoC family has new ethernet controller acceleration mode called
'enhanced mode' or 'counter mode.' it seems that backward compatibility mode
used by if_mvgbe is still working, but the specification of the old mode
is completely disappeared from SoC's reference manual.

I tested the driver using MIRABOX(ARMADA/370).

branches: 1.3.6;
Add _LOCORE around marvell_interregs_pbase

Support ARMADA XP.

branches: 1.1.2; 1.1.4; 1.1.10; 1.1.14; 1.1.24; 1.1.28;
Add support Marvell Sheevaplug.
Add some NAS on Marvell SoC.