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History log of /src/sys/arch/evbarm/marvell
RevisionDateAuthorComments
 1.38 20-Apr-2023  skrll Provide a shared pmap_devmap implementation and convert all pmap_devmap
arrays to use DEVMAP_ENTRY{,_END}
 1.37 30-Aug-2021  rin Add ARMEB support to {evb,}arm/marvell.

Combined with upcoming commit to dev/marvell, all peripheral devices
seem to work just fine for KUROBOX_PRO in big-endian mode.
 1.36 16-Jul-2019  skrll Consistently use vaddr_t as initarm and friends return type.

Makes no difference to binaries except for aarch64 where it's required
 1.35 21-Sep-2018  skrll Centralise defparam CONSADDR, CONSPEED, CONMODE and CONADDR into
opt_console.h and adjust.
 1.34 31-Jul-2018  skrll Sprinkle #include "opt_arm_debug.h" where VERBOSE_INIT_ARM is used
 1.33 07-Jan-2017  kiyohara branches: 1.33.14; 1.33.16;
Add support Marvell Dove.
Also <SoC>_intr_bootstrap() rename to <SoC>_bootstrap(). And SoC init func, getclk into that.
 1.32 03-Jun-2015  hsuenaga branches: 1.32.2;
initialize ARMADA XP's Mbus address decoder and code clean up
probably we need more sophisticated Mbus driver or KPI...
 1.31 14-May-2015  hsuenaga add synchronization barrier for AURORA_IO_CACHE_COHERENCY.
cleanup MARVELL L2 cache code.
 1.30 30-Aug-2014  kiyohara branches: 1.30.2;
Support __HAVE_MM_MD_DIRECT_MAPPED_PHYS.
 1.29 30-Aug-2014  kiyohara Use armreg_ttbr_read() instead of __asm("mrc ...").
 1.28 15-Mar-2014  kiyohara Support Armada 370.
 1.27 29-Jan-2014  kiyohara Abolish run time configuration for mapped address of SoC by u-boot.
This had become a cause hang-ups from some models.
 1.26 23-Dec-2013  kiyohara Support to check the clock gating for Armada XP in armadaxp.c.
Also move the checking for clock gate of Kirkwood into kirkwood.c.
 1.25 23-Dec-2013  kiyohara Move Misc Registers from mvsocreg.h to armadaxpreg.h. These registers only
Armada XP. The misc_base initializes in initarm() instead of mvsoc_bootstrap().
 1.24 20-Nov-2013  kiyohara Rename marvell_system_reset_old from marvell_system_reset.
And add reset function for ArmadaXP. It named marvell_system_reset.
 1.23 20-Nov-2013  kiyohara Initialize mvTclk in SOC_getclks() before call consinit().
And more fast call set_cpufuncs().
 1.22 30-Sep-2013  kiyohara Support ARMADA XP.
 1.21 12-Dec-2012  matt branches: 1.21.2;
Change physical_end to segment_end to avoid shadowing a global.
 1.20 02-Dec-2012  msaitoh Get bootargs and parse them. This was accidentally removed in rev. 1.17.
Fixes PR#47250.
 1.19 22-Oct-2012  matt Switch to ARM_VECTORS_HIGH
 1.18 07-Sep-2012  matt branches: 1.18.2;
Increase kernel VM space.
 1.17 01-Sep-2012  matt Switch beagle and marvell to use the new boot/init code.
 1.16 23-Aug-2012  kiyohara Allocate more VM space for over 8M kernel.
 1.15 16-Aug-2012  matt Move the standard definitions of the {UND,IRQ,FIQ,ABT}_STACK_SIZE to
<arm32/machdep.h>
Move the extern for cpu_reset_address to the same file.
Add cpu_reset_address_paddr.
Kill cpu_reset_v4_MMU_disable.
if cpu_reset_address is NULL, then the MMU will be disabled.
 1.14 10-Aug-2012  matt Make mvsoc_bootstrap (so it can initial an early console).
 1.13 03-Aug-2012  kiyohara Remove unnecessary property 'xore-irq-begin'.
 1.12 03-Aug-2012  kiyohara Fix to assert. We call to strncpy(), if r3 of args is valid from u-boot.
 1.11 29-Jul-2012  matt Fix more -fno-common fallout.
Move more variables to common locations.
 1.10 28-Jul-2012  matt Remove declartions of physmem
 1.9 18-Jul-2012  kiyohara Support 88F6282. But PEX1 not test.
 1.8 18-Jul-2012  kiyohara Set default EVBARM_BOARDTYPE is Marvell.
 1.7 31-Mar-2012  tsutsui Make this compile NMVPEX > 0 && !ORION && KIRKWOOD.
 1.6 27-Jan-2012  jakllsch branches: 1.6.2;
"if (mvTclk == 166666667) mvTclk = 166664740;" does not make sense.

It's within the margin of a 25.000MHz crystal multiplied by 20
and divided by 3, so it's moot anyway.
 1.5 30-Jun-2011  wiz branches: 1.5.2; 1.5.6;
dependant -> dependent
 1.4 01-Feb-2011  jakllsch branches: 1.4.2;
Use the command line U-Boot gave us for boothowto. From evbarm/gumstix.
 1.3 01-Feb-2011  jakllsch Address 3rd issue in PR#43990.
Different implementation but same method as suggested.
 1.2 01-Feb-2011  jakllsch ksyms_init() happens in main() now.
 1.1 03-Oct-2010  kiyohara branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
Add support Marvell Sheevaplug.
Add some NAS on Marvell SoC.
 1.1.8.1 08-Feb-2011  bouyer Sync with HEAD
 1.1.6.1 06-Jun-2011  jruoho Sync with HEAD.
 1.1.4.2 22-Oct-2010  uebayasi Sync with HEAD (-D20101022).
 1.1.4.1 03-Oct-2010  uebayasi file marvell_machdep.c was added on branch uebayasi-xip on 2010-10-22 09:23:12 +0000
 1.1.2.2 09-Oct-2010  yamt sync with head
 1.1.2.1 03-Oct-2010  yamt file marvell_machdep.c was added on branch yamt-nfs-mp on 2010-10-09 03:31:44 +0000
 1.4.2.2 05-Mar-2011  rmind sync with head
 1.4.2.1 01-Feb-2011  rmind file marvell_machdep.c was added on branch rmind-uvmplock on 2011-03-05 20:50:08 +0000
 1.5.6.2 05-Apr-2012  mrg sync to latest -current.
 1.5.6.1 18-Feb-2012  mrg merge to -current.
 1.5.2.4 22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.5.2.3 16-Jan-2013  yamt sync with (a bit old) head
 1.5.2.2 30-Oct-2012  yamt sync with head
 1.5.2.1 17-Apr-2012  yamt sync with head
 1.6.2.2 08-Feb-2013  riz sys/arch/arm/include/arm32/pte.h 1.11
sys/arch/evbarm/marvell/marvell_machdep.c 1.19 via patch

Switch to ARM_VECTORS_HIGH for Sheeva CPU.
[msaitoh, ticket #785]
 1.6.2.1 28-Jun-2012  riz Pull up following revision(s) (requested by tsutsui in ticket #359):
sys/arch/evbarm/marvell/marvell_machdep.c: revision 1.7
Make this compile NMVPEX > 0 && !ORION && KIRKWOOD.
 1.18.2.4 03-Dec-2017  jdolecek update from HEAD
 1.18.2.3 20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.18.2.2 25-Feb-2013  tls resync with head
 1.18.2.1 20-Nov-2012  tls Resync to 2012-11-19 00:00:00 UTC
 1.21.2.1 18-May-2014  rmind sync with head
 1.30.2.2 05-Feb-2017  skrll Sync with HEAD
 1.30.2.1 06-Jun-2015  skrll Sync with HEAD
 1.32.2.1 20-Mar-2017  pgoyette Sync with HEAD
 1.33.16.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.33.16.1 10-Jun-2019  christos Sync with HEAD
 1.33.14.2 30-Sep-2018  pgoyette Ssync with HEAD
 1.33.14.1 06-Sep-2018  pgoyette Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)
 1.14 20-May-2022  rin Hmm, fix typo in comments again...
 1.13 20-May-2022  rin Fix typo for the previous. No binary changes.
 1.12 20-May-2022  rin Initial support for armv5eb on Sheeva.

Disable L2 cache for Sheeva before switch to big-endian mode.

Note that we need to encode this code sequence in little endian,
as u-boot starts kernel in little-endian mode.

XXX
At the moment, this code is unconditionally enabled if CPU_SHEEVA
option is enabled; it does not work for older CPUs.

It would be better to determine CPU type automatically as done for
little-endian variant, but it is too ugly to hand-assemble for
the opposite byte-order.

It may be nice if we have tools something like:

$ nbarm-elf-bswap -s marvell_start -e Lswitch_endian_done netbsd

Tested for OPENBLOCKS_A6 (for CPU_SHEEVA), as well as KUROBOX_PRO
(for !CPU_SHEEVA).
 1.11 30-Aug-2021  rin Add ARMEB support to marvell_start.

Since u-boot is running in little-endian mode, first few instructions
(to switch byte-order) should be encoded in little-endian. After that,
nop's in little-endian should appear in order to flush prefetch buffer.
Then, CPWAIT() ensure entering in big-endian mode.
 1.10 16-Oct-2018  skrll Catch up with armadaxp_start.S:1.5... if only we had generic start code
for arm
 1.9 15-Oct-2018  skrll Only ent KERNEL_BASE_EXT when we want to change KERNEL_BASE from its
default of 0x8000_0000

Don't use KERNEL_BASE_EXT where KERNEL_BASE should be instead.

Workaround a as(1) weirdness in armadaxp_start.S
 1.8 30-Aug-2014  kiyohara branches: 1.8.18; 1.8.20;
Fix initialize PJ4B.
 1.7 30-Aug-2014  kiyohara Fix broken registers.
 1.6 14-Apr-2014  matt Add hook to set L2 cache to write-through
 1.5 29-Jan-2014  kiyohara branches: 1.5.2;
Abolish run time configuration for mapped address of SoC by u-boot.
This had become a cause hang-ups from some models.
 1.4 02-Oct-2013  kiyohara Remove undefined CPU ID. Thanks skrll@.
 1.3 30-Sep-2013  kiyohara Support ARMADAXP.
+ Add MVSOC_FIXUP_DEVID.
+ check mapped address for SoC registers.
 1.2 31-Jan-2011  matt branches: 1.2.2; 1.2.6; 1.2.16; 1.2.20;
Add RCSID when needed.
Don't include pmap.h or pte.h, include "assym.h" instead.
Use assym.h provided values.
 1.1 03-Oct-2010  kiyohara branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
Add support Marvell Sheevaplug.
Add some NAS on Marvell SoC.
 1.1.8.1 08-Feb-2011  bouyer Sync with HEAD
 1.1.6.1 06-Jun-2011  jruoho Sync with HEAD.
 1.1.4.2 22-Oct-2010  uebayasi Sync with HEAD (-D20101022).
 1.1.4.1 03-Oct-2010  uebayasi file marvell_start.S was added on branch uebayasi-xip on 2010-10-22 09:23:12 +0000
 1.1.2.2 09-Oct-2010  yamt sync with head
 1.1.2.1 03-Oct-2010  yamt file marvell_start.S was added on branch yamt-nfs-mp on 2010-10-09 03:31:45 +0000
 1.2.20.1 18-May-2014  rmind sync with head
 1.2.16.2 03-Dec-2017  jdolecek update from HEAD
 1.2.16.1 20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.2.6.1 22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.2.2.2 05-Mar-2011  rmind sync with head
 1.2.2.1 31-Jan-2011  rmind file marvell_start.S was added on branch rmind-uvmplock on 2011-03-05 20:50:08 +0000
 1.5.2.1 10-Aug-2014  tls Rebase.
 1.8.20.1 10-Jun-2019  christos Sync with HEAD
 1.8.18.1 20-Oct-2018  pgoyette Sync with head
 1.5 07-Jan-2017  kiyohara Add support Marvell Dove.
Also <SoC>_intr_bootstrap() rename to <SoC>_bootstrap(). And SoC init func, getclk into that.
 1.4 15-Mar-2014  kiyohara branches: 1.4.6; 1.4.10;
Support options MVSOC_INTERREGS_PBASE for *old* Armada {XP,370} machines.
 1.3 30-Sep-2013  kiyohara Support ARMADA XP.
 1.2 01-May-2013  rkujawa branches: 1.2.4;
Handle differences for Armada XP.

Obtained from Marvell, Semihalf.
 1.1 03-Oct-2010  kiyohara branches: 1.1.2; 1.1.4; 1.1.10; 1.1.14; 1.1.24;
Add support Marvell Sheevaplug.
Add some NAS on Marvell SoC.
 1.1.24.3 03-Dec-2017  jdolecek update from HEAD
 1.1.24.2 20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.1.24.1 23-Jun-2013  tls resync from head
 1.1.14.1 22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.1.10.2 05-Mar-2011  rmind sync with head
 1.1.10.1 03-Oct-2010  rmind file marvellreg.h was added on branch rmind-uvmplock on 2011-03-05 20:50:08 +0000
 1.1.4.2 22-Oct-2010  uebayasi Sync with HEAD (-D20101022).
 1.1.4.1 03-Oct-2010  uebayasi file marvellreg.h was added on branch uebayasi-xip on 2010-10-22 09:23:12 +0000
 1.1.2.2 09-Oct-2010  yamt sync with head
 1.1.2.1 03-Oct-2010  yamt file marvellreg.h was added on branch yamt-nfs-mp on 2010-10-09 03:31:45 +0000
 1.2.4.1 18-May-2014  rmind sync with head
 1.4.10.1 20-Mar-2017  pgoyette Sync with HEAD
 1.4.6.1 05-Feb-2017  skrll Sync with HEAD
 1.4 03-May-2015  hsuenaga add new ethernet driver mvxpe for recent MARVELL's SoC after ARMADA/XP.
this driver supports 'counter mode', and is disabled by default.

ARMADA SoC family has new ethernet controller acceleration mode called
'enhanced mode' or 'counter mode.' it seems that backward compatibility mode
used by if_mvgbe is still working, but the specification of the old mode
is completely disappeared from SoC's reference manual.

I tested the driver using MIRABOX(ARMADA/370).
 1.3 18-Mar-2014  matt branches: 1.3.6;
Add _LOCORE around marvell_interregs_pbase
 1.2 30-Sep-2013  kiyohara Support ARMADA XP.
 1.1 03-Oct-2010  kiyohara branches: 1.1.2; 1.1.4; 1.1.10; 1.1.14; 1.1.24; 1.1.28;
Add support Marvell Sheevaplug.
Add some NAS on Marvell SoC.
 1.1.28.1 18-May-2014  rmind sync with head
 1.1.24.2 03-Dec-2017  jdolecek update from HEAD
 1.1.24.1 20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.1.14.1 22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.1.10.2 05-Mar-2011  rmind sync with head
 1.1.10.1 03-Oct-2010  rmind file marvellvar.h was added on branch rmind-uvmplock on 2011-03-05 20:50:08 +0000
 1.1.4.2 22-Oct-2010  uebayasi Sync with HEAD (-D20101022).
 1.1.4.1 03-Oct-2010  uebayasi file marvellvar.h was added on branch uebayasi-xip on 2010-10-22 09:23:12 +0000
 1.1.2.2 09-Oct-2010  yamt sync with head
 1.1.2.1 03-Oct-2010  yamt file marvellvar.h was added on branch yamt-nfs-mp on 2010-10-09 03:31:45 +0000
 1.3.6.1 06-Jun-2015  skrll Sync with HEAD

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