| History log of /src/sys/arch/macppc/dev/ki2cvar.h |
| Revision | | Date | Author | Comments |
| 1.8 |
| 21-Sep-2025 |
thorpej | Use direct device tree enumeration support for ki2c. Cleanly separate
the two ki2c channels rather than mixing them all together and using an
artificial i2c address bit to distinguish the channels.
|
| 1.7 |
| 05-Jul-2025 |
macallan | deal with G5s that have two openpics by:
- checking interrupt-parent, trying to find the corresponding PIC, and adjusting
our IRQ number accordingly
- fall back to polling if we have interrupt-parent but no matching PIC
- if there is no interrupt-parent, assume we have only one PIC
... this should probably be handled by intr_establish*
|
| 1.6 |
| 05-Jul-2025 |
macallan | use interrupts so we can sleep instead of busy waiting on i2c transfers
|
| 1.5 |
| 15-Sep-2017 |
macallan | branches: 1.5.20; 1.5.30; 1.5.40;
bus_space-ify
|
| 1.4 |
| 26-Jul-2011 |
macallan | branches: 1.4.12;
finish device_t-ification
|
| 1.3 |
| 07-Dec-2007 |
macallan | finish mutexification, now ki2c compiles again
|
| 1.2 |
| 11-Dec-2005 |
christos | branches: 1.2.18; 1.2.36; 1.2.50; 1.2.52; 1.2.58; 1.2.62;
merge ktrace-lwp.
|
| 1.1 |
| 10-Aug-2005 |
macallan | branches: 1.1.6;
split from ki2c.c
|
| 1.1.6.2 |
| 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.1.6.1 |
| 10-Aug-2005 |
skrll | file ki2cvar.h was added on branch ktrace-lwp on 2005-11-10 13:57:27 +0000
|
| 1.2.62.1 |
| 08-Dec-2007 |
ad | Sync with head.
|
| 1.2.58.1 |
| 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.2.52.1 |
| 09-Jan-2008 |
matt | sync with HEAD
|
| 1.2.50.1 |
| 09-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.2.36.1 |
| 09-Dec-2007 |
reinoud | Pullup to HEAD
|
| 1.2.18.3 |
| 21-Jan-2008 |
yamt | sync with head
|
| 1.2.18.2 |
| 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.18.1 |
| 11-Dec-2005 |
yamt | file ki2cvar.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:13 +0000
|
| 1.4.12.1 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.40.1 |
| 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.5.30.1 |
| 09-Aug-2021 |
thorpej | Port over the changes from thorpej-i2c-spi-conf to thorpej-i2c-spi-conf2,
which is based on a newer HEAD revision.
|
| 1.5.20.1 |
| 08-May-2021 |
thorpej | Adapt the Keywest i2c controller driver to the new i2c device enumeration
mechanism. We need to provide our own enumeration callback because these
controllers do not use the standard OpenFirmware bindings.
The Keywest controller supports 2 physical i2c busses on a single controller,
so we logically split it up that way now, rather than encoding the channel in
in the i2c address as was done previously.
Different systems have different I2C device tree topologies.
Some systems use a scheme like this:
/u3@0,f8000000/i2c@f8001000/temp-monitor@98
/u3@0,f8000000/i2c@f8001000/fan@15e
Here, we see the channel encoded in bit #8 of the address.
Other systems use a scheme like this:
/ht@0,f2000000/pci@4000,0,0/mac-io@7/i2c@18000/i2c-bus@0
/ht@0,f2000000/pci@4000,0,0/mac-io@7/i2c@18000/i2c-bus@0/codec@8c
/u4@0,f8000000/i2c@f8001000/i2c-bus@1
/u4@0,f8000000/i2c@f8001000/i2c-bus@1/temp-monitor@94
Here, a separate device tree node represents the channel.
Note that in BOTH cases, the I2C address of the devices are
shifted left by 1 (as it would be on the wire to leave room
for the read/write bit).
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