| History log of /src/sys/arch/mips |
| Revision | Date | Author | Comments |
| 1.3 | 27-Nov-2008 |
nakayama | No need to dig into mips/conf since mips/conf/Makefile has been removed.
|
| 1.2 | 10-Oct-2002 |
simonb | branches: 1.2.108; 1.2.112; 1.2.118; 1.2.120;
Install the kernel linker script in /usr/lkm/ldscript so that modload(8)
works without needing to resort to -A abuse. LKMs work cleanly on MIPS
now.
|
| 1.1 | 12-Jun-1998 |
cgd | branches: 1.1.32;
Rework the way kernel include files are installed. In the new method,
as with user-land programs, include files are installed by each directory
in the tree that has includes to install. (This allows more flexibility
as to what gets installed, makes 'partial installs' easier, and gives us
more options as to which machines' includes get installed at any given
time.) The old SYS_INCLUDES={symlinks,copies} behaviours are _both_
still supported, though at least one bug in the 'symlinks' case is
fixed by this change. Include files can't be build before installation,
so directories that have includes as targets (e.g. dev/pci) have to move
those targets into a different Makefile.
|
| 1.1.32.1 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.2.120.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.2.118.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.2.112.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.2.108.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.7 | 04-Apr-2011 |
dyoung | Fix target 'tags'.
|
| 1.6 | 20-Mar-2007 |
dyoung | branches: 1.6.60; 1.6.66;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.5 | 21-Feb-2007 |
dyoung | branches: 1.5.4; 1.5.6; 1.5.8;
Expand SMIPS so that the 'tags' make-target covers more sources.
Sort.
|
| 1.4 | 19-Feb-2007 |
dyoung | Create tags for alchemy, atheros, bonito.
|
| 1.3 | 06-Aug-2006 |
dyoung | branches: 1.3.10;
Use ${SYSDIR}/arch/mips/ instead of ../mips/, which was fragile.
|
| 1.2 | 11-Oct-1997 |
mycroft | branches: 1.2.68; 1.2.82; 1.2.86;
GC some bogus definitions.
|
| 1.1 | 29-Sep-1996 |
jonathan | branches: 1.1.10;
Update arch/pmax/Makefile to build in NetBSD rather than 4.4-Lite:
* Create arch/mips/Makefile.inc with source list of generic MIPS-cpu
files for tags
* Use mips/Makefile.inc and updated tag list in pmax/Makefile
* Try building bootblocks in arch/pmax/stand.
|
| 1.1.10.1 | 14-Oct-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.2.86.1 | 11-Aug-2006 |
yamt | sync with head
|
| 1.2.82.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.68.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.2.68.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.2.68.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.10.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.3.10.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.5.8.1 | 29-Mar-2007 |
reinoud | Pullup to -current
|
| 1.5.6.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.5.4.1 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.6.66.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.60.1 | 21-Apr-2011 |
rmind | sync with head
|
| 1.7 | 28-May-2021 |
simonb | Update R6000 description.
|
| 1.6 | 15-Aug-2020 |
mrg | branches: 1.6.6; 1.6.8;
there was no MIPS{32,64} release 4.
XXX: missing lots and lots of evbmips CPUs.
|
| 1.5 | 19-Jun-2016 |
rkujawa | branches: 1.5.2; 1.5.18;
Link to the list of MIPS Computer Systems, Inc. machines.
|
| 1.4 | 18-Jun-2016 |
maya | Clarify that EHB is SSNOP on older implementations,
revert accidential change at the bottom.
|
| 1.3 | 18-Jun-2016 |
maya | Added some notes on playstation2 and MIPSnnR6 deprecations of SSNOP and
branch likely instructions.
|
| 1.2 | 16-Jun-2016 |
macallan | add some models
|
| 1.1 | 16-Jun-2016 |
dholland | Notes on MIPS models and architecture levels and their properties and
handling in NetBSD.
This is very preliminary so far, because I'm trying to get citations
from documentation for everything.
Please add stuff.
|
| 1.5.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.18.1 | 19-Jun-2016 |
jdolecek | file README.models was added on branch tls-maxphys on 2017-12-03 11:36:25 +0000
|
| 1.5.2.2 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.5.2.1 | 19-Jun-2016 |
skrll | file README.models was added on branch nick-nhusb on 2016-07-09 20:24:53 +0000
|
| 1.6.8.1 | 31-May-2021 |
cjep | sync with head
|
| 1.6.6.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.2 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.4; 1.1.20;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_cfio.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:43 +0000
|
| 1.1.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.1.4.1 | 20-Mar-2007 |
ad | file adm5120_cfio.c was added on branch vmlocking on 2007-04-10 13:23:22 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_cfio.c was added on branch yamt-idlelwp on 2007-03-24 14:54:49 +0000
|
| 1.8 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.7 | 24-Apr-2021 |
thorpej | branches: 1.7.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.6 | 27-Oct-2012 |
chs | branches: 1.6.52;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.5 | 01-Jul-2011 |
dyoung | branches: 1.5.2; 1.5.12;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.4 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.3 | 15-Dec-2010 |
matt | branches: 1.3.2; 1.3.4;
Make these compile again.
|
| 1.2 | 24-Oct-2008 |
dyoung | branches: 1.2.12; 1.2.16;
Use aprint_error_dev() instead of printf().
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.4; 1.1.20; 1.1.40; 1.1.44; 1.1.50;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.50.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.1.44.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.1.40.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_extio.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:43 +0000
|
| 1.1.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.1.4.1 | 20-Mar-2007 |
ad | file adm5120_extio.c was added on branch vmlocking on 2007-04-10 13:23:22 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_extio.c was added on branch yamt-idlelwp on 2007-03-24 14:54:49 +0000
|
| 1.2.16.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.12.1 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.3.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.5.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.6.52.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.7.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.4 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 19-Oct-2009 |
rmind | Drop 3rd and 4th clauses from David Young's license.
Reviewed and approved by dyoung@ (copyright holder).
|
| 1.2 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.4; 1.1.20; 1.1.40; 1.1.42; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.1.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_extio_space.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:43 +0000
|
| 1.1.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.1.4.1 | 20-Mar-2007 |
ad | file adm5120_extio_space.c was added on branch vmlocking on 2007-04-10 13:23:22 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_extio_space.c was added on branch yamt-idlelwp on 2007-03-24 14:54:49 +0000
|
| 1.9 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.8 | 10-Nov-2019 |
chs | branches: 1.8.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.7 | 26-Aug-2016 |
skrll | branches: 1.7.16;
Adjust evbmips_iointr to pass a clockframe pointer and use it for
pwmclock @ voyager.
Suggested by matt@
Hi macallan!
|
| 1.6 | 10-Jul-2011 |
matt | branches: 1.6.12; 1.6.30;
Fix machine/ includes
|
| 1.5 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.4 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.3 | 28-Apr-2008 |
martin | branches: 1.3.18; 1.3.22; 1.3.28; 1.3.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 15-Jan-2008 |
dyoung | branches: 1.2.6; 1.2.8; 1.2.10;
Change software interrupts initialization, and add an #include, to
help ADM5120 support compile in -current again.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.4; 1.1.18; 1.1.20; 1.1.26; 1.1.32;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.32.1 | 19-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.1.26.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.3 | 21-Jan-2008 |
yamt | sync with head
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_intr.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:43 +0000
|
| 1.1.18.1 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.1.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.1.4.1 | 20-Mar-2007 |
ad | file adm5120_intr.c was added on branch vmlocking on 2007-04-10 13:23:23 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_intr.c was added on branch yamt-idlelwp on 2007-03-24 14:54:49 +0000
|
| 1.2.10.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.2.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.3.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.18.4 | 28-Feb-2010 |
matt | Add #define __INTR_PRIVATE
|
| 1.3.18.3 | 23-Feb-2010 |
matt | Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that
in the interrupt init routine. There's a default ipl_sr_map will operate
correctly, but isn't performant.
|
| 1.3.18.2 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.3.18.1 | 15-Feb-2010 |
matt | Adapt to the new interrupt framework for NetBSD/mips.
|
| 1.6.30.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.6.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7.16.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.8.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.6 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.5 | 24-Apr-2021 |
thorpej | branches: 1.5.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.4 | 01-Jul-2011 |
dyoung | branches: 1.4.68;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 15-Dec-2010 |
matt | branches: 1.2.2; 1.2.4;
Make these compile again.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.4; 1.1.20; 1.1.62; 1.1.66;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.66.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.62.2 | 14-Jan-2010 |
matt | More fixes for the CFATTAL_DECL_NEW changes and rmixl cpucore/cpu changes.
|
| 1.1.62.1 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_obio.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:44 +0000
|
| 1.1.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.1.4.1 | 20-Mar-2007 |
ad | file adm5120_obio.c was added on branch vmlocking on 2007-04-10 13:23:23 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_obio.c was added on branch yamt-idlelwp on 2007-03-24 14:54:49 +0000
|
| 1.2.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.4.68.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.5.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.5 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.4 | 01-Jul-2011 |
dyoung | branches: 1.4.12; 1.4.30;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 28-Apr-2008 |
martin | branches: 1.2.18; 1.2.22; 1.2.28; 1.2.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.4; 1.1.20; 1.1.40; 1.1.42; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_obio_dma.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:44 +0000
|
| 1.1.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.1.4.1 | 20-Mar-2007 |
ad | file adm5120_obio_dma.c was added on branch vmlocking on 2007-04-10 13:23:23 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_obio_dma.c was added on branch yamt-idlelwp on 2007-03-24 14:54:50 +0000
|
| 1.2.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.18.1 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.4.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.4.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.4; 1.1.20; 1.1.40; 1.1.42; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_obio_space.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:44 +0000
|
| 1.1.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.1.4.1 | 20-Mar-2007 |
ad | file adm5120_obio_space.c was added on branch vmlocking on 2007-04-10 13:23:23 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_obio_space.c was added on branch yamt-idlelwp on 2007-03-24 14:54:50 +0000
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.4; 1.1.20; 1.1.40; 1.1.42; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_pciio_space.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:45 +0000
|
| 1.1.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.1.4.1 | 20-Mar-2007 |
ad | file adm5120_pciio_space.c was added on branch vmlocking on 2007-04-10 13:23:23 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_pciio_space.c was added on branch yamt-idlelwp on 2007-03-24 14:54:50 +0000
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.4; 1.1.20; 1.1.40; 1.1.42; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_pcimem_space.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:45 +0000
|
| 1.1.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.1.4.1 | 20-Mar-2007 |
ad | file adm5120_pcimem_space.c was added on branch vmlocking on 2007-04-10 13:23:23 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_pcimem_space.c was added on branch yamt-idlelwp on 2007-03-24 14:54:50 +0000
|
| 1.6 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.5 | 24-Apr-2021 |
thorpej | branches: 1.5.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.4 | 01-Jul-2011 |
dyoung | branches: 1.4.68;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 19-Oct-2009 |
rmind | branches: 1.2.4; 1.2.6; 1.2.8;
Drop 3rd and 4th clauses from David Young's license.
Reviewed and approved by dyoung@ (copyright holder).
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.44; 1.1.62;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.62.1 | 14-Jan-2010 |
matt | More fixes for the CFATTAL_DECL_NEW changes and rmixl cpucore/cpu changes.
|
| 1.1.44.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file admgpio.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:46 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file admgpio.c was added on branch vmlocking on 2007-06-09 21:36:53 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file admgpio.c was added on branch yamt-idlelwp on 2007-03-24 14:54:50 +0000
|
| 1.2.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.4.68.1 | 02-Apr-2021 |
thorpej | config_found_ia() -> config_found() w/ CFARG_IATTR.
|
| 1.5.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.18 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.17 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.16 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.15 | 24-Apr-2021 |
thorpej | branches: 1.15.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.14 | 07-Jul-2020 |
thorpej | branches: 1.14.4;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:
==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.
This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.
- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.
|
| 1.13 | 02-Oct-2015 |
msaitoh | PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific
|
| 1.12 | 26-Jun-2015 |
matt | #include <mips/locore.h> and other include cleanups.
|
| 1.11 | 28-Jun-2014 |
skrll | branches: 1.11.4;
#ifdef a variable like its usage.
|
| 1.10 | 29-Mar-2014 |
christos | branches: 1.10.2;
make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.
|
| 1.9 | 12-Feb-2012 |
matt | branches: 1.9.6; 1.9.10;
Change old-style function defintions to C89 prototypes.
Approved by releng.
|
| 1.8 | 10-Jul-2011 |
matt | branches: 1.8.2; 1.8.6;
Fix machine/ includes
|
| 1.7 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.6 | 17-May-2011 |
dyoung | PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.
Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.
This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:
algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
|
| 1.5 | 04-Apr-2011 |
dyoung | Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.
For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:
Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.
siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.
slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.
viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.
While I'm here, make pci_mapreg_submap() static.
With these changes in place, I have tested the compilation of these
kernels:
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:
### evbmips-el GDIUM
nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop
### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'
### ia64 GENERIC
/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type
### sgimips GENERIC32_IP3x
crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
|
| 1.4 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.3 | 20-Dec-2010 |
matt | branches: 1.3.2; 1.3.4;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
|
| 1.2 | 19-Oct-2009 |
rmind | branches: 1.2.4;
Drop 3rd and 4th clauses from David Young's license.
Reviewed and approved by dyoung@ (copyright holder).
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.44; 1.1.62;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.62.2 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.1.62.1 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.1.44.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file admpci.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:46 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file admpci.c was added on branch vmlocking on 2007-06-09 21:36:53 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file admpci.c was added on branch yamt-idlelwp on 2007-03-24 14:54:50 +0000
|
| 1.2.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.2.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.8.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.8.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.8.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.9.10.1 | 18-May-2014 |
rmind | sync with head
|
| 1.9.6.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.9.6.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.10.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.11.4.2 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.11.4.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.14.4.1 | 02-Apr-2021 |
thorpej | config_found_ia() -> config_found() w/ CFARG_IATTR.
|
| 1.15.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.4 | 27-Oct-2012 |
chs | split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.3 | 01-Jul-2011 |
dyoung | branches: 1.3.2; 1.3.12;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 19-Oct-2009 |
rmind | Drop 3rd and 4th clauses from David Young's license.
Reviewed and approved by dyoung@ (copyright holder).
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file admwdog.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:46 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file admwdog.c was added on branch vmlocking on 2007-06-09 21:36:54 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file admwdog.c was added on branch yamt-idlelwp on 2007-03-24 14:54:51 +0000
|
| 1.3.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.3.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.32 | 23-Oct-2022 |
skrll | Fix build from previous
|
| 1.31 | 09-Mar-2022 |
riastradh | usb: Provisionally release bus lock around ubm_rhctrl.
This isn't quite correct, but it avoids a deadlock:
- *_roothub_ctrl holds bus lock, waits in usb_delay_ms for kpause
- softint waits for bus lock, holds up kpause wakeup
The deadlock is new since recent changes to hold the bus lock over
upm_start/upm_transfer. Making this change regresses to other
problems:
- *_suspend/resume and *_roothub_ctrl often touch the same portsc
registers
- roothub_ctrl_abort needs to wait for ubm_rhctrl to complete.
When the bus lock was held across both, a noop served here, but we
can't hold the bus lock across both, so that doesn't work.
However, these problems -- which we've had for a long time -- seem to
be less bad than the deadlock. So let's avoid the deadlock for now
and then work out another way to serialize suspend/resume/rhctrl and
aborts.
Candidate fix for PR kern/56739.
|
| 1.30 | 03-Mar-2022 |
riastradh | usb: Hold pipe lock across upm_transfer and upm_start.
This simplifies the code and fixes races with abort. Access to the
pipe's queue is now done exclusively while the pipe is locked.
|
| 1.29 | 03-Mar-2022 |
riastradh | usb: Factor usb_insert_transfer out of upm_transfer and make private.
Almost every upm_transfer function starts with:
mutex_enter(&sc->sc_lock);
err = usb_insert_transfer(xfer);
mutex_exit(&sc->sc_lock);
if (err)
return err;
Some of them have debug messages sprinkled in here too, or assert
that err == USBD_NORMAL_COMPLETION (alternative is USBD_IN_PROGRESS,
only for pipes with up_running or up_serialise, presumably not
applicable for these types of pipes). Some of them also assert
xfer->ux_status == USBD_NOT_STARTED, which is guaranteed on entry and
preserved by usb_insert_transer.
Exceptions:
- arch/mips/adm5120/dev/ahci.c ahci_device_isoc_transfer just returns
USBD_NORMAL_COMPLETION, but I'm pretty sure this is and always has
been broken anyway, so won't make anything worse (if anything, might
make it better...)
- external/bsd/dwc2/dwc2.c dwc2_device_bulk_transfer and
dwc2_device_isoc_transfer _also_ issue dwc2_device_start(xfer)
under the lock. This is probably a better way to do it, but let's
do it uniformly across all HCIs at once.
- rump/dev/lib/libugenhc/ugenhc.c rumpusb_device_bulk_transfer
sometimes returns USBD_IN_PROGRESS _without_ queueing the transfer,
in the !rump_threads case. Not really sure how this is supposed to
work... If it actually breaks anything, we can figure it out.
|
| 1.28 | 21-Dec-2021 |
skrll | Change the usb_mem API to take a bus_dma_tag_t in usb_allocmem instead of
a struct usbd_bus *.
This allows an HCD to use more than one tag.
|
| 1.27 | 07-Dec-2021 |
skrll | Make this compile again.
|
| 1.26 | 04-Oct-2021 |
andvar | remove duplicate the article in comments.
|
| 1.25 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.24 | 24-Apr-2021 |
thorpej | branches: 1.24.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.23 | 05-Jan-2021 |
skrll | branches: 1.23.2;
Misc KNF. NFCI.
|
| 1.22 | 05-Apr-2020 |
skrll | branches: 1.22.4;
Switch USB to use non-coherent buffers for data transfers in the
same way as OpenBSD.
The use of coherent (uncacheable on ARM and other arches) mappings
for transfer buffers impacts performance, espcially where memcpys
are involved.
Audit the necessary usb_syncmem operations - a few were missing.
|
| 1.21 | 21-Feb-2020 |
skrll | Fix a memory leak. Spotted by nat@
|
| 1.20 | 15-Feb-2020 |
riastradh | Fix mistakes in previous sloppy change with root intr xfers.
- Make sure ux_status is set to USBD_IN_PROGRESS when started.
Otherwise, if it is still in flight when we abort the pipe,
usbd_ar_pipe will skip calling upm_abort.
- Initialize ux_status under the lock; in principle a completion
interrupt (or a delay) could race with the initialization.
- KASSERT that the xfer is in progress when we're about to complete
it.
Candidate fix for PR kern/54963 for other HCI drivers than uhci.
ok nick
ok phone
(This is the change that nick evidently MEANT to ok when he ok'd the
previous one!)
|
| 1.19 | 12-Feb-2020 |
riastradh | Fix steady state of root intr xfers.
Why?
- Avoid completing a root intr xfer multiple times in races.
- Avoid potential use-after-free in poll_hub callouts (uhci, ahci).
How?
- Use sc->sc_intr_xfer or equivalent to store only a pending xfer
that has not yet completed -- whether successfully, by timeout, or
by synchronous abort. When any of those happens, set it to null
under the lock, so the xfer is completed only once.
- For hci drivers that use a callout to poll the root hub (uhci, ahci):
. Pass the softc pointer, not the xfer, to the callout, so the
callout is not even tempted to use xfer after free -- if the
callout fires, but the xfer is synchronously aborted before the
callout can do anything, the xfer might be freed by the time the
callout starts to examine it.
. Teach the callout to do nothing if it is callout_pending after it
has fired. This way:
1. completion or synchronous abort can just callout_stop
2. start can just callout_schedule
If the callout had already fired before (1), and doesn't acquire
the bus lock until after (2), it may be tempted to abort the new
root intr xfer just after submission, which would be wrong -- so
instead we just have the callout do nothing if it notices it has
been rescheduled, since it will fire again after the appropriate
time has elapsed.
|
| 1.18 | 12-Feb-2020 |
riastradh | Factor out HCI-independent xfer completion logic.
New API for HCI drivers to synchronize hardware completion
interrupts, synchronous aborts, and asynchronous timeouts:
- When submitting an xfer to hardware, call
usbd_xfer_schedule_timeout(xfer).
- On HCI completion interrupt for xfer completion:
if (!usbd_xfer_trycomplete(xfer))
return; /* timed out or aborted, ignore it */
- In upm_abort methods, call usbd_xfer_abort(xfer).
For HCI drivers that use this API (not needed in drivers that don't,
or for xfers like root intr xfers that don't use it):
- New ubm_abortx method serves role of former *hci_abort_xfer, but
without any logic for wrangling timeouts/callouts/tasks -- caller
in usbd_xfer_abort has already handled them.
- New ubm_dying method, returns true if the device is in the process
of detaching, used by the timeout logic.
Converted and tested:
- ehci
- ohci
Converted and compile-tested:
- ahci (XXX did this ever work?)
- dwc2
- motg (XXX missing usbd_xfer_schedule_timeout in motg_*_start?)
- uhci
- xhci
Not changed:
- slhci (sys/dev/ic/sl811hs.c) -- doesn't use a separate per-xfer
callout for timeouts (XXX but maybe should?)
- ugenhc (sys/rump/dev/lib/libugenhc/ugenhc.c) -- doesn't manage its
own transfer timeouts
- vhci -- times transfers out only on detach; could be adapted easily
if we wanted to use the xfer->ux_callout
|
| 1.17 | 17-Feb-2019 |
rin | branches: 1.17.4; 1.17.6;
Fix assertion failures triggered by usbdi.c,v 1.182, when devices
are detached.
This is because xfers of USBD_NOT_STARTED can be removed from queue
in an invisible way to host controller drivers.
Discussed on tech-kern.
|
| 1.16 | 03-Sep-2018 |
riastradh | Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.
To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
|
| 1.15 | 09-Apr-2018 |
jakllsch | branches: 1.15.2;
Stop potential misuse of vendor names and USB vendor IDs in root hub
device and string descriptors.
Firstly: Few vendors have identical PCI-SIG vendor IDs and USB-IF vendor
IDs. As such, using the PCI vendor ID as a USB vendor ID may trample
on whomever is allocated that USB vendor ID.
Secondly: The vendor of the host controller hardware implementation has
little to nothing to do with our usbroothub implementation. Thus we
should not potentially associate any problems therewith to such third
party.
This change will result in root hubs being identified by USB Vendor ID
0x0000. Root hub vendor string will now be "NetBSD" (or, specifically:
ostype). Product ID (0x0000) and product strings remain unchanged.
|
| 1.14 | 01-Jun-2017 |
chs | branches: 1.14.2; 1.14.8;
remove checks for failure after memory allocation calls that cannot fail:
kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()
all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.
|
| 1.13 | 23-Apr-2016 |
skrll | Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.12 | 22-Sep-2013 |
skrll | branches: 1.12.4; 1.12.6; 1.12.10;
Adapt to usbmp. Compile tested only.
Did this ever work?
|
| 1.11 | 22-Sep-2013 |
skrll | Remove trailing whitespace.
|
| 1.10 | 02-Sep-2013 |
skrll | Use C99 designated initializers.
|
| 1.9 | 27-Oct-2012 |
chs | branches: 1.9.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.8 | 11-Mar-2012 |
mrg | branches: 1.8.2;
pull down from usbmp branch:
- remove usbd_bus{} intr_context member, and replace the checks against
it with cpu_intr_p() and cpu_softintr_p().
|
| 1.7 | 01-Jul-2011 |
dyoung | branches: 1.7.2; 1.7.6;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.6 | 04-Apr-2011 |
dyoung | Use callout(9) instead of the USB compatibility junk that went away
months ago.
|
| 1.5 | 16-Dec-2008 |
christos | branches: 1.5.6; 1.5.8;
replace bitmask_snprintf(9) with snprintb(3)
|
| 1.4 | 27-May-2008 |
dyoung | branches: 1.4.6;
Make this compile again: don't use USBDEVNAME().
While I'm here, use device_t, device_private(), aprint_error_dev().
|
| 1.3 | 28-Apr-2008 |
martin | branches: 1.3.2;
Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 15-Dec-2007 |
perry | branches: 1.2.6; 1.2.8; 1.2.10;
__FUNCTION__ -> __func__
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.18; 1.1.20; 1.1.28; 1.1.32;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.32.1 | 02-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.1.28.1 | 26-Dec-2007 |
ad | Sync with head.
|
| 1.1.20.3 | 21-Jan-2008 |
yamt | sync with head
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file ahci.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:47 +0000
|
| 1.1.18.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file ahci.c was added on branch vmlocking on 2007-06-09 21:36:54 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file ahci.c was added on branch yamt-idlelwp on 2007-03-24 14:54:51 +0000
|
| 1.2.10.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.2.10.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.2.8.2 | 04-Jun-2008 |
yamt | sync with head
|
| 1.2.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.6.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.2.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.3.2.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.4.6.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.5.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.6.1 | 21-Apr-2011 |
rmind | sync with head
|
| 1.7.6.1 | 25-Feb-2012 |
mrg | catch up with bus->intr_context going away.
|
| 1.7.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.7.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.7.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.8.2.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.8.2.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.8.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.9.2.1 | 18-May-2014 |
rmind | sync with head
|
| 1.12.10.2 | 23-Jan-2017 |
skrll | Adapt to branch
|
| 1.12.10.1 | 06-Sep-2016 |
skrll | First pass at netbsd-7 updated with USB code from HEAD
|
| 1.12.6.17 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.12.6.16 | 12-Dec-2015 |
skrll | Whitespace
|
| 1.12.6.15 | 22-Oct-2015 |
skrll | Simplify *_XFER2SC using ux_bus
|
| 1.12.6.14 | 20-Oct-2015 |
skrll | Consistently providei/use *_{XFER,PIPE,BUS}2SC, etc macros
|
| 1.12.6.13 | 11-Oct-2015 |
skrll | Update ubm_allocx with the isoc frame count parameter and use it in
dwctwo(4)
|
| 1.12.6.12 | 19-Mar-2015 |
skrll | Do the same as OpenBSD and get rid of the *_handle typedefs and use
plain structures insteads
|
| 1.12.6.11 | 05-Dec-2014 |
skrll | KNF. Remove ( ) from return statements.
|
| 1.12.6.10 | 04-Dec-2014 |
skrll | Rework roothub control transfers so that much of the code is shared
across HCDs.
I have retained the vendor/product reporting for each HCD for now,
but it maybe get removed later.
ahci(4) now reports a language table and uses the usb_makestrdesc
function instead of rolling its own version.
|
| 1.12.6.9 | 03-Dec-2014 |
skrll | Provide a USETWD macro for use with USB words designated
initialisers.
|
| 1.12.6.8 | 03-Dec-2014 |
skrll | Replace malloc(9) with kmem(9)
|
| 1.12.6.7 | 03-Dec-2014 |
skrll | Use designated initializers for more descriptors.
|
| 1.12.6.6 | 03-Dec-2014 |
skrll | Use designated initialisers for usb_device_descriptor_t structs.
|
| 1.12.6.5 | 03-Dec-2014 |
skrll | The grand renaming of structure members.
No functional change.
|
| 1.12.6.4 | 02-Dec-2014 |
skrll | Step #1 of memory allocation re-organisation.
Centralised the buffer allocation routine which now supports DMA
and non-DMA capable host controllers. Remove the
ubm_{alloc,free}m methods from usbd_bus_methods.
The buffer allocation is only allowed in thread context and,
therefore, negates the usefulness of the reserve dma code which
is removed in this change.
USBD_NO_COPY is also no longer required as usbd_transfer and
usbd_transfer_complete now track buffer usage and handle any
copying.
|
| 1.12.6.3 | 01-Dec-2014 |
skrll | Add prefixes to method structures member names. No functional change.
|
| 1.12.6.2 | 30-Nov-2014 |
skrll | Whitespace
|
| 1.12.6.1 | 30-Nov-2014 |
skrll | Use C99 types. u_int{8,16,32,64}_t to uint{8,16,32,64}_t.
No functional change.
|
| 1.12.4.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.14.8.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.14.8.1 | 16-Apr-2018 |
pgoyette | Sync with HEAD, resolve some conflicts
|
| 1.14.2.1 | 25-Feb-2020 |
martin | Pull up following revision(s) (requested by skrll in ticket #1507):
sys/dev/usb/ohci.c: revision 1.296
sys/dev/usb/uhci.c: revision 1.294
sys/external/bsd/dwc2/dwc2.c: revision 1.72
sys/arch/mips/adm5120/dev/ahci.c: revision 1.21
sys/dev/usb/ehci.c: revision 1.274
Fix a memory leak. Spotted by nat@
|
| 1.15.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.15.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.17.6.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.17.4.2 | 01-Mar-2020 |
martin | Pull up following revision(s) (requested by riastradh in ticket #744):
sys/dev/usb/uhci.c: revision 1.292
sys/dev/usb/uhci.c: revision 1.293
sys/dev/usb/usbdi.h: revision 1.99
sys/dev/usb/motg.c: revision 1.26
sys/dev/usb/motg.c: revision 1.27
sys/dev/usb/motg.c: revision 1.28
sys/dev/usb/motg.c: revision 1.29
sys/external/bsd/dwc2/dwc2.c: revision 1.70
sys/external/bsd/dwc2/dwc2.c: revision 1.71
sys/dev/usb/usb.c: revision 1.181
sys/arch/mips/adm5120/dev/ahci.c: revision 1.20
sys/dev/usb/usb.c: revision 1.182
sys/dev/usb/xhci.c: revision 1.116
sys/dev/usb/xhci.c: revision 1.117
sys/dev/usb/xhci.c: revision 1.118
sys/dev/usb/uhci.c: revision 1.289
sys/dev/usb/usbdivar.h: revision 1.121
sys/dev/usb/usbdi.c: revision 1.190
sys/dev/usb/usbdivar.h: revision 1.122
sys/dev/usb/usbdi.c: revision 1.191
sys/dev/usb/usbdi.c: revision 1.192
sys/external/bsd/dwc2/dwc2var.h: revision 1.7
sys/dev/usb/motg.c: revision 1.30
sys/dev/usb/motg.c: revision 1.31
sys/dev/usb/motg.c: revision 1.32
sys/dev/usb/motg.c: revision 1.33
sys/external/bsd/dwc2/dwc2.c: revision 1.67
sys/external/bsd/dwc2/dwc2.c: revision 1.68
sys/dev/usb/ehci.c: revision 1.270
sys/external/bsd/dwc2/dwc2.c: revision 1.69
sys/dev/usb/usbdi.h: revision 1.100
sys/dev/usb/ehci.c: revision 1.271
sys/arch/mips/adm5120/dev/ahci.c: revision 1.18
sys/dev/usb/usbdi.h: revision 1.101
sys/dev/usb/ehci.c: revision 1.272
sys/dev/ic/sl811hs.c: revision 1.103
sys/arch/mips/adm5120/dev/ahci.c: revision 1.19
sys/dev/usb/ehci.c: revision 1.273
sys/dev/usb/ohci.c: revision 1.293
sys/dev/usb/uhci.c: revision 1.290
sys/dev/usb/ohci.c: revision 1.294
sys/dev/usb/uhci.c: revision 1.291
sys/dev/usb/ohci.c: revision 1.295
Teach usb_rem_task to return whether removed from queue or not.
New function usb_task_pending for diagnostic assertions.
Usable only for negative diagnostic assertions:
KASSERT(!usb_task_pending(dev, task))
If you can think of a better name for this than !usb_task_pending,
I'm all ears.
-
Nothing guarantees xfer's timeout has completed.
Wait for it when we free the xfer.
-
New xfer state variables ux_timeout_set and ux_timeout_reset.
These are needed because:
- The host controller interrupt cannot wait for the callout or task
to finish running.
- Nothing in the USBD API as is waits for the callout or task to
finish running.
- Callers expect to be able to resubmit USB xfers from xfer callbacks
without waiting for anything to finish running.
The variable ux_timeout_set can be used by a host controller to
decide on submission whether to schedule the callout or to ask an
already-scheduled callout or already-queued task to reschedule the
callout, by setting the variable ux_timeout_reset to true.
When the callout or task runs and sees that ux_timeout_reset is true,
rather than queue the task or abort the xfer, it can instead just
schedule the callout anew.
-
Fix steady state of timeouts in ehci.
This is complicated because:
1. There are three ways that an xfer can be completed:
(a) hardware interrupt completes xfer
(b) software decision aborts xfer with USBD_CANCELLED
(c) timeout aborts xfer with USBD_TIMEOUT
2. The timeout abort can't be done in callout because ehci_sync_hc,
called unconditionally by ehci_abort_xfer to wait until the device
has finished using any references to the xfer, may sleep. So we
have to schedule a callout that, when run, will schedule a usb_task.
3. The hardware completion interrupt can't sleep waiting for a callout
or task to finish -- can't use callout_halt or usb_rem_task_wait.
So the callout and usb_task must be able to run _after_ the hardware
completion interrupt, and recognize that they're late to the party.
(Note, though, that usbd_free_xfer does wait for the callout and
task to complete, so there's no danger they may use themselves after
free.)
4. The xfer may resubmitted -- and the timeout may be rescheduled --
immediately after the hardware completion interrupt, _while_ the
callout and/or usb_task may still be scheduled. Specifically, we
may have the following sequence of events:
(a) hardware completion interrupt
(b) callout or usb_task fires
(c) driver resubmits xfer
(d) callout or usb_task acquires lock and looks around dazed and
bewildered at the firehose of events like reading the news in 2019
The mechanism for sorting this out is that we have two bits of state:
- xfer->ux_timeout_set informs the driver, when submitting an xfer and
setting up its timeout, whether either the callout or usb_task is
already scheduled or not.
- xfer->ux_timeout_reset informs the callout or usb_task whether it
should reschedule the callout, because the xfer got resubmitted, or
not.
-
Factor out HCI-independent xfer completion logic.
New API for HCI drivers to synchronize hardware completion
interrupts, synchronous aborts, and asynchronous timeouts:
- When submitting an xfer to hardware, call
usbd_xfer_schedule_timeout(xfer).
- On HCI completion interrupt for xfer completion:
if (!usbd_xfer_trycomplete(xfer))
return; /* timed out or aborted, ignore it */
- In upm_abort methods, call usbd_xfer_abort(xfer).
For HCI drivers that use this API (not needed in drivers that don't,
or for xfers like root intr xfers that don't use it):
- New ubm_abortx method serves role of former *hci_abort_xfer, but
without any logic for wrangling timeouts/callouts/tasks -- caller
in usbd_xfer_abort has already handled them.
- New ubm_dying method, returns true if the device is in the process
of detaching, used by the timeout logic.
Converted and tested:
- ehci
- ohci
Converted and compile-tested:
- ahci (XXX did this ever work?)
- dwc2
- motg (XXX missing usbd_xfer_schedule_timeout in motg_*_start?)
- uhci
- xhci
Not changed:
- slhci (sys/dev/ic/sl811hs.c) -- doesn't use a separate per-xfer
callout for timeouts (XXX but maybe should?)
- ugenhc (sys/rump/dev/lib/libugenhc/ugenhc.c) -- doesn't manage its
own transfer timeouts
-
Fix steady state of root intr xfers.
Why?
- Avoid completing a root intr xfer multiple times in races.
- Avoid potential use-after-free in poll_hub callouts (uhci, ahci).
How?
- Use sc->sc_intr_xfer or equivalent to store only a pending xfer
that has not yet completed -- whether successfully, by timeout, or
by synchronous abort. When any of those happens, set it to null
under the lock, so the xfer is completed only once.
- For hci drivers that use a callout to poll the root hub (uhci, ahci):
. Pass the softc pointer, not the xfer, to the callout, so the
callout is not even tempted to use xfer after free -- if the
callout fires, but the xfer is synchronously aborted before the
callout can do anything, the xfer might be freed by the time the
callout starts to examine it.
. Teach the callout to do nothing if it is callout_pending after it
has fired. This way:
1. completion or synchronous abort can just callout_stop
2. start can just callout_schedule
If the callout had already fired before (1), and doesn't acquire
the bus lock until after (2), it may be tempted to abort the new
root intr xfer just after submission, which would be wrong -- so
instead we just have the callout do nothing if it notices it has
been rescheduled, since it will fire again after the appropriate
time has elapsed.
-
Initialize xfer->ux_status in uhci_root_intr_start.
Otherwise, it will be USBD_NOT_STARTED, so usbd_ar_pipe will skip
calling upm_abort.
Candidate fix for PR kern/54963, same problem as reported at:
href="https://mail-index.NetBSD.org/current-users/2020/02/13/msg037740.html
-
Set ux_isdone in uhci_poll_hub for DIAGNOSTIC.
-
Fix mistakes in previous sloppy change with root intr xfers.
- Make sure ux_status is set to USBD_IN_PROGRESS when started.
Otherwise, if it is still in flight when we abort the pipe,
usbd_ar_pipe will skip calling upm_abort.
- Initialize ux_status under the lock; in principle a completion
interrupt (or a delay) could race with the initialization.
- KASSERT that the xfer is in progress when we're about to complete
it.
Candidate fix for PR kern/54963 for other HCI drivers than uhci.
ok nick
ok phone
(This is the change that nick evidently MEANT to ok when he ok'd the
previous one!)
-
Fix build
-
Fix non-DIAGNOSTIC builds.
-
Fix wrong KASSERT in motg abort.
This has been wrong since last summer when we did the transition to
xfer->ux_status = USBD_CANCELLED earlier.
XXX pullup-9
-
Fix mistakes in timeout/abort/completion changes in motg(4).
- Call usbd_xfer_schedule_timeout so we actually do time out.
- Don't call usbd_xfer_trycomplete until all the data have been
transferred -- it commits to completion, not timeout.
- Use xfer->ux_status != USBD_IN_PROGRESS to test whether, after a
partial write, an xfer has been interrupted or timed out and need
not be continued.
- Remove wrong assertion.
-
Fix mistake in use of usbd_xfer_schedule_timeout in motg.
This code path is used both for xfers that are new, and xfers that
are being done piece by piece and are partway done. For the latter
case, skip usbd_xfer_schedule_timeout so we schedule it only once per
xfer.
-
Simplify some branches and kassert some redundant assignments.
|
| 1.17.4.1 | 25-Feb-2020 |
martin | Pull up following revision(s) (requested by skrll in ticket #718):
sys/dev/usb/ohci.c: revision 1.296
sys/dev/usb/uhci.c: revision 1.294
sys/external/bsd/dwc2/dwc2.c: revision 1.72
sys/arch/mips/adm5120/dev/ahci.c: revision 1.21
sys/dev/usb/ehci.c: revision 1.274
Fix a memory leak. Spotted by nat@
|
| 1.22.4.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.23.2.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.24.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 23-Apr-2016 |
skrll | Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.88; 1.1.108;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.108.2 | 30-Nov-2014 |
skrll | Whitespace
|
| 1.1.108.1 | 30-Nov-2014 |
skrll | Use C99 types. u_int{8,16,32,64}_t to uint{8,16,32,64}_t.
No functional change.
|
| 1.1.88.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file ahcireg.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:47 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file ahcireg.h was added on branch vmlocking on 2007-06-09 21:36:55 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file ahcireg.h was added on branch yamt-idlelwp on 2007-03-24 14:54:52 +0000
|
| 1.6 | 23-Apr-2016 |
skrll | Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.5 | 22-Sep-2013 |
skrll | branches: 1.5.4; 1.5.6; 1.5.10;
Adapt to usbmp. Compile tested only.
Did this ever work?
|
| 1.4 | 27-Oct-2012 |
chs | branches: 1.4.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.3 | 04-Apr-2011 |
dyoung | branches: 1.3.4; 1.3.14;
Use callout(9) instead of the USB compatibility junk that went away
months ago.
|
| 1.2 | 28-Apr-2008 |
martin | branches: 1.2.22; 1.2.28;
Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.40; 1.1.42; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file ahcivar.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:48 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file ahcivar.h was added on branch vmlocking on 2007-06-09 21:36:55 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file ahcivar.h was added on branch yamt-idlelwp on 2007-03-24 14:54:52 +0000
|
| 1.2.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.22.1 | 21-Apr-2011 |
rmind | sync with head
|
| 1.3.14.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.14.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.14.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.3.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.4.2.1 | 18-May-2014 |
rmind | sync with head
|
| 1.5.10.1 | 23-Jan-2017 |
skrll | Adapt to branch
|
| 1.5.6.2 | 19-Mar-2015 |
skrll | Do the same as OpenBSD and get rid of the *_handle typedefs and use
plain structures insteads
|
| 1.5.6.1 | 30-Nov-2014 |
skrll | Use C99 types. u_int{8,16,32,64}_t to uint{8,16,32,64}_t.
No functional change.
|
| 1.5.4.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.32 | 15-Oct-2025 |
thorpej | Use ether_getaddr().
|
| 1.31 | 10-Feb-2024 |
andvar | s/alloted/allotted/ in comments.
|
| 1.30 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.29 | 18-Sep-2022 |
thorpej | Eliminate use of IFF_OACTIVE.
|
| 1.28 | 29-Jan-2020 |
thorpej | Adopt <net/if_stats.h>.
|
| 1.27 | 05-Dec-2019 |
msaitoh | branches: 1.27.2;
Revert if_admsw.c rev. 1.25. It's not required to check
sc->sc_ifmedia[port].ifm_cur->ifm_media instead of ifm->ifm_media.
|
| 1.26 | 05-Dec-2019 |
msaitoh | Do SIOC[GS]IFMEDIA like others. Not tested.
|
| 1.25 | 04-Dec-2019 |
msaitoh | Fix admsw_mediachange(). Not tested.
ifmedia_change() is used to change the device's media setting from
user-selected media. The user-selected media is not
sc->sc_ifmedia[port]->ifm_media but sc->sc_ifmedia[port].ifm_cur->ifm_media.
|
| 1.24 | 28-May-2019 |
msaitoh | Use ETHER_LOCK()/ETHER_UNLOCK() for all ethernet drivers to protect ec_multi*.
|
| 1.23 | 23-May-2019 |
msaitoh | -No functional change:
- KNF
- u_int*_t -> uint*_t.
|
| 1.22 | 26-Apr-2019 |
msaitoh | No functional change:
- u_int_{8,16,32}_t -> uint_{8,16,32}_t
- KNF.
- Tabify.
- Remove extra space.
|
| 1.21 | 22-Apr-2019 |
msaitoh | Don't include mii*.h because this driver doesn't use MII(4).
|
| 1.20 | 12-Apr-2019 |
msaitoh | Fix a bug that the duplex of manual media setting may be wrong
when the IFM_GMASK bit other than IFM_[FH]DX is set.
|
| 1.19 | 11-Apr-2019 |
msaitoh | Fix a bug that the duplex of manual media setting may be wrong
when the IFM_GMASK bit other than IFM_[FH]DX is set.
|
| 1.18 | 03-Sep-2018 |
riastradh | Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.
To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
|
| 1.17 | 26-Jun-2018 |
msaitoh | branches: 1.17.2;
Implement the BPF direction filter (BIOC[GS]DIRECTION). It provides backward
compatibility with BIOC[GS]SEESENT ioctl. The userland interface is the same
as FreeBSD.
This change also fixes a bug that the direction is misunderstand on some
environment by passing the direction to bpf_mtap*() instead of checking
m->m_pkthdr.rcvif.
|
| 1.16 | 15-Dec-2016 |
ozaki-r | branches: 1.16.8; 1.16.14;
Move bpf_mtap and if_ipackets++ on Rx of each driver to percpuq if_input
The benefits of the change are:
- We can reduce codes
- We can provide the same behavior between drivers
- Where/When if_ipackets is counted up
- Note that some drivers still update packet statistics in their own
way (periodical update)
- Moved bpf_mtap run in softint
- This makes it easy to MP-ify bpf
Proposed on tech-kern and tech-net
|
| 1.15 | 08-Dec-2016 |
ozaki-r | Apply deferred if_start framework
if_schedule_deferred_start checks if the if_snd queue contains packets,
so drivers don't need to check it by themselves.
|
| 1.14 | 10-Jun-2016 |
ozaki-r | branches: 1.14.2;
Introduce m_set_rcvif and m_reset_rcvif
The API is used to set (or reset) a received interface of a mbuf.
They are counterpart of m_get_rcvif, which will come in another
commit, hide internal of rcvif operation, and reduce the diff of
the upcoming change.
No functional change.
|
| 1.13 | 09-Feb-2016 |
ozaki-r | Introduce softint-based if_input
This change intends to run the whole network stack in softint context
(or normal LWP), not hardware interrupt context. Note that the work is
still incomplete by this change; to that end, we also have to softint-ify
if_link_state_change (and bpf) which can still run in hardware interrupt.
This change softint-ifies at ifp->if_input that is called from
each device driver (and ieee80211_input) to ensure Layer 2 runs
in softint (e.g., ether_input and bridge_input). To this end,
we provide a framework (called percpuq) that utlizes softint(9)
and percpu ifqueues. With this patch, rxintr of most drivers just
queues received packets and schedules a softint, and the softint
dequeues packets and does rest packet processing.
To minimize changes to each driver, percpuq is allocated in struct
ifnet for now and that is initialized by default (in if_attach).
We probably have to move percpuq to softc of each driver, but it's
future work. At this point, only wm(4) has percpuq in its softc
as a reference implementation.
Additional information including performance numbers can be found
in the thread at tech-kern@ and tech-net@:
http://mail-index.netbsd.org/tech-kern/2016/01/14/msg019997.html
Acknowledgment: riastradh@ greatly helped this work.
Thank you very much!
|
| 1.12 | 16-Jun-2014 |
msaitoh | branches: 1.12.4;
IFM_FDX and IFM_HDX use different bit, so set IFM_HDX bit if it's not full
duplex. For many drivers, it recognize half duplex if IFM_FDX isn't set,
but not for others. Same as {Free|Open}BSD.
|
| 1.11 | 27-Oct-2012 |
chs | branches: 1.11.10;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.10 | 10-Jul-2011 |
matt | branches: 1.10.2; 1.10.8; 1.10.12;
Fix machine/ includes
|
| 1.9 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.8 | 05-Apr-2010 |
joerg | Push the bpf_ops usage back into bpf.h. Push the common ifp->if_bpf
check into the inline functions as well the fourth argument for
bpf_attach.
|
| 1.7 | 22-Jan-2010 |
martin | branches: 1.7.2; 1.7.4;
Unify the name of the device property to hold a MAC address - there was
no clear majority for either "mac-addr" vs. "mac-address", but a quick
gallup poll among developers selected the latter.
|
| 1.6 | 19-Jan-2010 |
pooka | Redefine bpf linkage through an always present op vector, i.e.
#if NBPFILTER is no longer required in the client. This change
doesn't yet add support for loading bpf as a module, since drivers
can register before bpf is attached. However, callers of bpf can
now be modularized.
Dynamically loadable bpf could probably be done fairly easily with
coordination from the stub driver and the real driver by registering
attachments in the stub before the real driver is loaded and doing
a handoff. ... and I'm not going to ponder the depths of unload
here.
Tested with i386/MONOLITHIC, modified MONOLITHIC without bpf and rump.
|
| 1.5 | 16-Dec-2008 |
christos | replace bitmask_snprintf(9) with snprintb(3)
|
| 1.4 | 07-Feb-2008 |
dyoung | branches: 1.4.6; 1.4.10; 1.4.18;
Start patching up the kernel so that a network driver always has
the opportunity to handle an ioctl before generic ifioctl handling
occurs. This will ease extending the kernel and sharing of code
between drivers.
First steps: Make the signature of ifioctl_common() match struct
ifinet->if_ioctl. Convert SIOCSIFCAP and SIOCSIFMTU to the new
ifioctl() regime, throughout the kernel.
|
| 1.3 | 22-Apr-2007 |
dyoung | branches: 1.3.4; 1.3.14; 1.3.16; 1.3.22;
Delete noisy diagnostic printf.
|
| 1.2 | 17-Apr-2007 |
dyoung | In admsw_intr(), print any events we do not expect.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.2.3 | 07-May-2007 |
yamt | sync with head.
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file if_admsw.c was added on branch yamt-idlelwp on 2007-03-24 14:54:52 +0000
|
| 1.3.22.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.3.16.3 | 11-Feb-2008 |
yamt | sync with head.
|
| 1.3.16.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.3.16.1 | 22-Apr-2007 |
yamt | file if_admsw.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:48 +0000
|
| 1.3.14.1 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.3.4.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.3.4.1 | 22-Apr-2007 |
ad | file if_admsw.c was added on branch vmlocking on 2007-06-09 21:36:56 +0000
|
| 1.4.18.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.4.10.3 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.4.10.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.4.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.4.6.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.7.4.1 | 30-May-2010 |
rmind | sync with head
|
| 1.7.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.10.12.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.12.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.10.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.10.8.1 | 09-Nov-2014 |
martin | Pull up following revision(s) (requested by msaitoh in ticket #1189):
sys/dev/pci/if_wm.c: revision 1.270
sys/dev/mii/inphy.c: revision 1.53
sys/dev/mii/glxtphy.c: revision 1.24
sys/dev/mii/tlphy.c: revision 1.62
sys/dev/mii/iophy.c: revision 1.37
sys/dev/mii/brgphy.c: revision 1.70
sys/dev/mii/ihphy.c: revision 1.8
sys/dev/mii/bmtphy.c: revision 1.31
sys/dev/mii/urlphy.c: revision 1.30
sys/dev/mii/makphy.c: revision 1.40
sys/dev/mii/qsphy.c: revision 1.48
sys/dev/mii/igphy.c: revision 1.23
sys/dev/mii/nsphy.c: revision 1.58
sys/dev/mii/mvphy.c: revision 1.10
sys/dev/pci/if_txp.c: revision 1.41
sys/dev/mii/nsphy.c: revision 1.59
sys/dev/mii/rlphy.c: revision 1.28
sys/dev/mii/icsphy.c: revision 1.49
sys/dev/mii/rlphy.c: revision 1.29
sys/dev/mii/lxtphy.c: revision 1.49
sys/dev/mii/ciphyreg.h: revision 1.5
sys/dev/mii/nsphyter.c: revision 1.38
sys/dev/mii/sqphy.c: revision 1.50
sys/dev/mii/gentbi.c: revision 1.26
sys/dev/mii/gentbi.c: revision 1.27
sys/dev/mii/tqphy.c: revision 1.39
sys/dev/mii/ikphy.c: revision 1.10
sys/dev/mii/dmphy.c: revision 1.35
sys/dev/mii/amhphy.c: revision 1.20
sys/dev/mii/acphy.c: revision 1.24
sys/dev/mii/ciphy.c: revision 1.25
sys/dev/mii/brgphyreg.h: revision 1.8
sys/dev/mii/ukphy_subr.c: revision 1.12
sys/dev/ic/rtl80x9.c: revision 1.16
sys/arch/mips/adm5120/dev/if_admsw.c: revision 1.12
sys/dev/pci/if_kse.c: revision 1.28
sys/dev/mii/ukphy_subr.c: revision 1.13
sys/dev/mii/mii.h: revision 1.18
sys/dev/mii/gphyter.c: revision 1.29
No functional change:
- Fix typo.
- Remove trailing white spaces.
- Capitalize comments.
- Tabify.
- KNF.
IFM_FDX and IFM_HDX use different bit, so set IFM_HDX bit if it's not full
duplex. For many drivers, it recognize half duplex if IFM_FDX isn't set,
but not for others. Same as {Free|Open}BSD.
|
| 1.10.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.11.10.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.12.4.3 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.12.4.2 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.12.4.1 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.14.2.1 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.16.14.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.16.14.1 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.16.8.1 | 13-May-2019 |
martin | Pull up the following, via patch, requested by msaitoh in ticket #1263:
sys/dev/mii/brgphy.c 1.84
sys/dev/mii/ciphy.c 1.33 via patch
sys/dev/mii/rgephy.c 1.53
sys/arch/arm/imx/if_enet.c 1.18
sys/arch/mips/adm5120/dev/if_admsw.c 1.19-1.20
sys/dev/pci/if_bge.c 1.329
sys/dev/pci/if_bnx.c 1.81
sys/dev/pci/if_et.c 1.21
sys/dev/pci/if_lii.c 1.22
sys/dev/pci/if_msk.c 1.87
sys/dev/pci/if_nfe.c 1.68
sys/dev/pci/if_sk.c 1.95
sys/dev/pci/if_ti.c 1.107
sys/dev/pci/if_txp.c 1.52
sys/dev/pci/if_vge.c 1.69
sys/dev/usb/if_axen.c 1.38
sys/dev/usb/if_aue.c 1.149
Fix a bug that the duplex of manual media setting may be wrong
when the IFM_GMASK bit other than IFM_[FH]DX is set.
|
| 1.17.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.17.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.27.2.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file if_admswreg.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:48 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file if_admswreg.h was added on branch vmlocking on 2007-06-09 21:36:56 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file if_admswreg.h was added on branch yamt-idlelwp on 2007-03-24 14:54:52 +0000
|
| 1.9 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.8 | 16-Apr-2020 |
rin | Revert previous for now:
http://mail-index.netbsd.org/source-changes/2020/04/16/msg116278.html
The reasoning turned out to be wrong; __KERNEL_RCSID() in header files
does *not* overwrite RCSID in main source files. The real problem is that
it inserts its RCSID into *every* object files. However, it can be still
useful even if heavily duplicated.
|
| 1.7 | 16-Apr-2020 |
rin | Stop using __KERNEL_RCSID() in header files; it confuses ident(1) by
overwriting RCSID in main source files.
XXX
The first argument of __KERNEL_RCSID() is neglected for ELF. If we wish
to have RCSID of header files in kernel binary, we need something like
__FBSDID() macro in FreeBSD.
|
| 1.6 | 03-Sep-2018 |
riastradh | branches: 1.6.10;
Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.
To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
|
| 1.5 | 27-Oct-2012 |
chs | branches: 1.5.36; 1.5.38;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.4 | 10-Jul-2011 |
matt | branches: 1.4.2; 1.4.12;
Fix machine/ includes
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 19-Jan-2010 |
pooka | Redefine bpf linkage through an always present op vector, i.e.
#if NBPFILTER is no longer required in the client. This change
doesn't yet add support for loading bpf as a module, since drivers
can register before bpf is attached. However, callers of bpf can
now be modularized.
Dynamically loadable bpf could probably be done fairly easily with
coordination from the stub driver and the real driver by registering
attachments in the stub before the real driver is loaded and doing
a handoff. ... and I'm not going to ponder the depths of unload
here.
Tested with i386/MONOLITHIC, modified MONOLITHIC without bpf and rump.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file if_admswvar.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:49 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file if_admswvar.h was added on branch vmlocking on 2007-06-09 21:36:57 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file if_admswvar.h was added on branch yamt-idlelwp on 2007-03-24 14:54:52 +0000
|
| 1.4.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.4.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.5.38.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.5.36.1 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.6.10.1 | 20-Apr-2020 |
bouyer | Sync with HEAD
|
| 1.12 | 25-Jul-2014 |
dholland | Add d_discard to all struct cdevsw instances I could find.
All have been set to "nodiscard"; some should get a real implementation.
|
| 1.11 | 28-Jun-2014 |
skrll | Remove unused variables
|
| 1.10 | 16-Mar-2014 |
dholland | branches: 1.10.2;
Change (mostly mechanically) every cdevsw/bdevsw I can find to use
designated initializers.
I have not built every extant kernel so I have probably broken at
least one build; however I've also found and fixed some wrong
cdevsw/bdevsw entries so even if so I think we come out ahead.
|
| 1.9 | 10-Jul-2011 |
matt | branches: 1.9.2; 1.9.12; 1.9.16;
Fix machine/ includes
|
| 1.8 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.7 | 24-Apr-2011 |
rmind | Rename ttymalloc() to tty_alloc(), and ttyfree() to tty_free() for
consistency. Remove some unnecessary malloc.h inclusions as well.
|
| 1.6 | 21-Nov-2009 |
rmind | branches: 1.6.4; 1.6.6;
Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.5 | 11-Jun-2008 |
cegger | use device_lookup_private to get softc
|
| 1.4 | 09-Jan-2008 |
elad | branches: 1.4.6; 1.4.8; 1.4.10; 1.4.12; 1.4.14;
Kill two KAUTH_GENERIC_ISSUSER requests and replace them with something
more meaningful.
|
| 1.3 | 19-Nov-2007 |
ad | branches: 1.3.6;
- Factor out too many copies of the same bit of tty code.
- Fix another tty signalling/wakeup problem.
|
| 1.2 | 23-Mar-2007 |
dogcow | branches: 1.2.2; 1.2.8; 1.2.16; 1.2.18; 1.2.20; 1.2.24; 1.2.26;
the last of caddr_t in sys/, save for netbsd32_caddr_t and the like.
|
| 1.1 | 20-Mar-2007 |
dyoung | Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.2.26.2 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.2.26.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.2.24.1 | 21-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.2.20.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.2.20.3 | 07-Dec-2007 |
yamt | sync with head
|
| 1.2.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.2.20.1 | 23-Mar-2007 |
yamt | file uart.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:49 +0000
|
| 1.2.18.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.2.18.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.2.16.1 | 21-Nov-2007 |
joerg | Sync with HEAD.
|
| 1.2.8.3 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.2.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.2.8.1 | 23-Mar-2007 |
ad | file uart.c was added on branch vmlocking on 2007-06-09 21:36:57 +0000
|
| 1.2.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.2.2.1 | 23-Mar-2007 |
yamt | file uart.c was added on branch yamt-idlelwp on 2007-03-24 14:54:52 +0000
|
| 1.3.6.1 | 10-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.4.14.1 | 18-Jun-2008 |
simonb | Sync with head.
|
| 1.4.12.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.4.10.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.4.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.4.8.1 | 17-Jun-2008 |
yamt | sync with head.
|
| 1.4.6.1 | 29-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.6.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.4.1 | 31-May-2011 |
rmind | sync with head
|
| 1.9.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.9.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.9.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.10.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file uart.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:49 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file uart.h was added on branch vmlocking on 2007-06-09 21:36:57 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file uart.h was added on branch yamt-idlelwp on 2007-03-24 14:54:53 +0000
|
| 1.13 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.12 | 03-Dec-2020 |
skrll | Fix build
|
| 1.11 | 09-Sep-2019 |
jdolecek | branches: 1.11.8;
adjust several missed drivers for wdcprobe() changes of ATA NCQ branch
for dreamcast g1 just drop the custom reset function, it doesn't seem to do
anything useful over the generic variant
PR kern/54538 by Izumi Tsutsui
|
| 1.10 | 20-Oct-2017 |
jdolecek | branches: 1.10.4; 1.10.8;
move ata_queue_alloc(1) and ata_queue_free() calls to ata_channel_init()
and ata_channel_destroy() respectively, to make attachment code simpler,
and to make it easier to spot special queue manipulation like cmdide(4)
on topic of PR kern/52606
|
| 1.9 | 07-Oct-2017 |
jdolecek | Merge support for SATA NCQ (Native Command Queueing) from jdolecek-ncq branch
ATA subsystem was changed to support several outstanding commands, and use
NCQ xfers if supported by both the controller and the disk, including NCQ
error recovery. Set NCQ high priority for BPRIO_TIMECRITICAL xfers
if supported. Added FUA support.
Done some work towards MP-safe, all ATA code tsleep()/wakeup() replaced
by condvars, and switched most code from spl* to mutexes (separate
wd(4) and ata channel lock).
Introduced new option WD_CHAOS_MONKEY to facilitate testing of error
handling, fixed several uncovered issues. Also fixed several problems
with kernel dump to wd(4) disk.
Tested with ahcisata(4), mvsata(4), siisata(4), piixide(4) on amd64,
with and without port multiplier, both disk and ATAPI devices; other
drivers and archs mechanically adjusted and compile-tested. NCQ is
supported for ahcisata(4) and siisata(4) for any controller, for
mvsata(4) only Gen IIe ones for now. Also enabled ATAPI support in
mvsata(4).
Thanks to Matt Thomas for initial ATA infrastructure patch, and
Jonathan A.Kollasch for siisata(4) NCQ changes and general testing.
Also fixes PR kern/43169 (wd(4)); and PR kern/11811, PR kern/47041,
PR kern/51979 (kernel dump)
|
| 1.8 | 31-Jul-2012 |
bouyer | branches: 1.8.2; 1.8.28;
Apply back changes that were reverted on Jul 24 and Jul 26 (general ata/wdc
cleanup and SATA PMP support), now that I'm back to fix the fallouts.
|
| 1.7 | 26-Jul-2012 |
jakllsch | Revert, with intention of restoring in a less invasive way, the SATA Port
Multiplier code.
ok christos@
|
| 1.6 | 02-Jul-2012 |
bouyer | Add sata Port MultiPlier (PMP) support to the ata bus layer,
as described in
http://mail-index.netbsd.org/tech-kern/2012/06/23/msg013442.html
PMP support in integrated to the atabus layer.
struct ata_channel's ch_drive[] is not dynamically allocated, and ch_ndrive
(renamed to ch_ndrives) closely reflects the size of the ch_drive[] array.
Add helper functions atabus_alloc_drives() and atabus_free_drives()
to manage ch_drive[]/ch_ndrives.
Add wdc_maxdrives to struct wdc_softc so that bus front-end can specify
how much drive they really support (master/slave or single).
ata_reset_drive() callback gains a uint32_t *sigp argument which,
when not NULL, will contain the signature of the device being reset.
While there, some cosmetic changes:
- added a drive_type enum to ata_drive_datas, and stop encoding the
probed drive type in drive_flags (we were out of drive flags anyway).
- rename DRIVE_ATAPIST to DRIVE_ATAPIDSCW to better reflect what this
really is
- remove ata_channel->ata_drives, it's redundant with the pointer in
ata_drive_datas
- factor out the interpretation of SATA signatures in sata_interpet_sig()
propagate these changes to the ATA HBA drivers, and add support for PMP
to ahcisata(4) and siisata(4).
Thanks to:
- Protocase (http://www.protocase.com/) which provided a system
with lots of controllers, SATA PMP and drive slots
- Conservation Genomics Laboratory, Department of Biology, New Mexico State
University for hosting the above system
- Brook Milligan, who set up remote access and has been very responsive
when SATA cable move was needed
|
| 1.5 | 10-Jul-2011 |
matt | branches: 1.5.2;
Fix machine/ includes
|
| 1.4 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 19-Oct-2009 |
rmind | Drop 3rd and 4th clauses from David Young's license.
Reviewed and approved by dyoung@ (copyright holder).
|
| 1.2 | 18-Mar-2008 |
cube | branches: 1.2.4;
Split device_t and softc for ATA devices, as well as wd(4). Other
cosmetic changes where appropriate.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.18; 1.1.20; 1.1.36; 1.1.40;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.40.1 | 03-Apr-2008 |
mjf | Sync with HEAD.
|
| 1.1.36.1 | 24-Mar-2008 |
keiichi | sync with head.
|
| 1.1.20.3 | 24-Mar-2008 |
yamt | sync with head.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file wdc_extio.c was added on branch yamt-lazymbuf on 2007-09-03 14:27:50 +0000
|
| 1.1.18.1 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file wdc_extio.c was added on branch vmlocking on 2007-06-09 21:36:58 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file wdc_extio.c was added on branch yamt-idlelwp on 2007-03-24 14:54:53 +0000
|
| 1.2.4.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.5.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.8.28.1 | 24-Apr-2017 |
jdolecek | use ata_queue_alloc() to dynamically allocate ata_queue for ata channel
|
| 1.8.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.8.1 | 23-Sep-2019 |
martin | Pull up following revision(s) (requested by tsutsui in ticket #232):
sys/arch/evbppc/mpc85xx/wdc_obio.c: revision 1.7
sys/arch/dreamcast/dev/g1/wdc_g1.c: revision 1.4
sys/arch/dreamcast/dev/g1/wdc_g1.c: revision 1.5
sys/arch/mmeye/dev/wdc_mainbus.c: revision 1.7
sys/dev/ic/wdcvar.h: revision 1.99
sys/dev/ic/wdc.c: revision 1.292
sys/arch/mips/adm5120/dev/wdc_extio.c: revision 1.11
adjust several missed drivers for wdcprobe() changes of ATA NCQ branch
for dreamcast g1 just drop the custom reset function, it doesn't seem to do
anything useful over the generic variant
PR kern/54538 by Izumi Tsutsui
Restore interface to pass a MD reset function to MI wdcprobe().
Fixes silent hang on G1IDE on Dreamcast. PR kern/54538
Should be pulled up to netbsd-9 with the previous changes.
|
| 1.10.4.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.11.8.1 | 14-Dec-2020 |
thorpej | Sync w/ HEAD.
|
| 1.4 | 27-Oct-2012 |
chs | split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.3 | 19-Oct-2009 |
rmind | branches: 1.3.12; 1.3.22;
Drop 3rd and 4th clauses from David Young's license.
Reviewed and approved by dyoung@ (copyright holder).
|
| 1.2 | 15-Jan-2008 |
dyoung | branches: 1.2.10;
Change software interrupts initialization, and add an #include, to
help ADM5120 support compile in -current again.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.18; 1.1.20; 1.1.26; 1.1.32;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.32.1 | 19-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.1.26.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.3 | 21-Jan-2008 |
yamt | sync with head
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_extiovar.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:50 +0000
|
| 1.1.18.1 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file adm5120_extiovar.h was added on branch vmlocking on 2007-06-09 21:36:58 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_extiovar.h was added on branch yamt-idlelwp on 2007-03-24 14:54:53 +0000
|
| 1.2.10.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.3.22.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.3.12.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.62; 1.1.66; 1.1.72; 1.1.74;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.74.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.72.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.66.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.62.1 | 14-Jan-2010 |
matt | More fixes for the CFATTAL_DECL_NEW changes and rmixl cpucore/cpu changes.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_mainbusvar.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:50 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file adm5120_mainbusvar.h was added on branch vmlocking on 2007-06-09 21:36:59 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_mainbusvar.h was added on branch yamt-idlelwp on 2007-03-24 14:54:53 +0000
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_obiovar.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:50 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file adm5120_obiovar.h was added on branch vmlocking on 2007-06-09 21:36:59 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_obiovar.h was added on branch yamt-idlelwp on 2007-03-24 14:54:53 +0000
|
| 1.2 | 19-Oct-2009 |
rmind | Drop 3rd and 4th clauses from David Young's license.
Reviewed and approved by dyoung@ (copyright holder).
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120_pcivar.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:51 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file adm5120_pcivar.h was added on branch vmlocking on 2007-06-09 21:36:59 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120_pcivar.h was added on branch yamt-idlelwp on 2007-03-24 14:54:53 +0000
|
| 1.2 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.40; 1.1.42; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120reg.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:51 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file adm5120reg.h was added on branch vmlocking on 2007-06-09 21:37:00 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120reg.h was added on branch yamt-idlelwp on 2007-03-24 14:54:53 +0000
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 20-Mar-2007 |
dyoung | branches: 1.1.2; 1.1.8; 1.1.20; 1.1.40; 1.1.42; 1.1.44;
Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.1.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.20.1 | 20-Mar-2007 |
yamt | file adm5120var.h was added on branch yamt-lazymbuf on 2007-09-03 14:27:51 +0000
|
| 1.1.8.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.1.8.1 | 20-Mar-2007 |
ad | file adm5120var.h was added on branch vmlocking on 2007-06-09 21:37:00 +0000
|
| 1.1.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.1.2.1 | 20-Mar-2007 |
yamt | file adm5120var.h was added on branch yamt-idlelwp on 2007-03-24 14:54:54 +0000
|
| 1.12 | 11-Apr-2019 |
kamil | Fix CVS Id usage
|
| 1.11 | 09-Jun-2015 |
matt | branches: 1.11.18;
#include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.10 | 10-Jul-2011 |
matt | branches: 1.10.12; 1.10.30;
Fix machine/ includes
|
| 1.9 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.8 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.7 | 28-Feb-2007 |
thorpej | branches: 1.7.62; 1.7.66; 1.7.72; 1.7.74;
TRUE -> true, FALSE -> false
|
| 1.6 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.5 | 13-Jul-2006 |
gdamore | branches: 1.5.6; 1.5.12;
Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.4 | 11-Apr-2006 |
simonb | branches: 1.4.2; 1.4.6; 1.4.8;
The RTC and PCMCIA don't live at address 0 - restore the -1 address
locator from pre-split aubus.c. Should only affect autoconfig display.
|
| 1.3 | 18-Feb-2006 |
gdamore | branches: 1.3.2; 1.3.4; 1.3.6;
Use bus_space instead of direct access.
Fix a couple of inverted bits.
Added GPIO_BASE definition to aureg.h.
|
| 1.2 | 13-Feb-2006 |
gdamore | branches: 1.2.2;
GPIO support for all supported Alchemy parts.
|
| 1.1 | 06-Feb-2006 |
gdamore | Fix up incorrect ICU reporting, add processor specific switch tables for
IRQ routing and such.
Closes PR port-evbmips/31992.
Reviewed by simonb@, matt@, and izumi@
|
| 1.2.2.3 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.2.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.2.2.1 | 13-Feb-2006 |
yamt | file au1000.c was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.3.6.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.3.4.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.3.2.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.3.2.1 | 24-May-2006 |
yamt | sync with head.
|
| 1.4.8.5 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.4.8.4 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.4.8.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.8.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.8.1 | 11-Apr-2006 |
yamt | file au1000.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.4.6.1 | 15-Jun-2006 |
gdamore | Make these autoconfig com rather than aucom.
|
| 1.4.2.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.4.2.1 | 11-Apr-2006 |
simonb | file au1000.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.5.12.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.5.12.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.5.6.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.5.6.1 | 13-Jul-2006 |
rpaulo | file au1000.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.7.74.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.7.72.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.7.66.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.7.62.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.10.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.10.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.11.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.11 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.10 | 10-Jul-2011 |
matt | branches: 1.10.12; 1.10.30;
Fix machine/ includes
|
| 1.9 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.8 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.7 | 28-Feb-2007 |
thorpej | branches: 1.7.62; 1.7.66; 1.7.72; 1.7.74;
TRUE -> true, FALSE -> false
|
| 1.6 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.5 | 13-Jul-2006 |
gdamore | branches: 1.5.6; 1.5.12;
Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.4 | 11-Apr-2006 |
simonb | branches: 1.4.2; 1.4.6; 1.4.8;
The RTC and PCMCIA don't live at address 0 - restore the -1 address
locator from pre-split aubus.c. Should only affect autoconfig display.
|
| 1.3 | 18-Feb-2006 |
gdamore | branches: 1.3.2; 1.3.4; 1.3.6;
Use bus_space instead of direct access.
Fix a couple of inverted bits.
Added GPIO_BASE definition to aureg.h.
|
| 1.2 | 13-Feb-2006 |
gdamore | branches: 1.2.2;
GPIO support for all supported Alchemy parts.
|
| 1.1 | 06-Feb-2006 |
gdamore | Fix up incorrect ICU reporting, add processor specific switch tables for
IRQ routing and such.
Closes PR port-evbmips/31992.
Reviewed by simonb@, matt@, and izumi@
|
| 1.2.2.3 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.2.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.2.2.1 | 13-Feb-2006 |
yamt | file au1100.c was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.3.6.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.3.4.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.3.2.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.3.2.1 | 24-May-2006 |
yamt | sync with head.
|
| 1.4.8.5 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.4.8.4 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.4.8.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.8.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.8.1 | 11-Apr-2006 |
yamt | file au1100.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.4.6.1 | 15-Jun-2006 |
gdamore | Make these autoconfig com rather than aucom.
|
| 1.4.2.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.4.2.1 | 11-Apr-2006 |
simonb | file au1100.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.5.12.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.5.12.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.5.6.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.5.6.1 | 13-Jul-2006 |
rpaulo | file au1100.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.7.74.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.7.72.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.7.66.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.7.62.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.10.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.10.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.12 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.11 | 10-Jul-2011 |
matt | branches: 1.11.12; 1.11.30;
Fix machine/ includes
|
| 1.10 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.9 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.8 | 28-Feb-2007 |
thorpej | branches: 1.8.62; 1.8.66; 1.8.72; 1.8.74;
TRUE -> true, FALSE -> false
|
| 1.7 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.6 | 13-Jul-2006 |
gdamore | branches: 1.6.6; 1.6.12;
Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.5 | 11-Apr-2006 |
simonb | branches: 1.5.2; 1.5.6; 1.5.8;
The RTC and PCMCIA don't live at address 0 - restore the -1 address
locator from pre-split aubus.c. Should only affect autoconfig display.
|
| 1.4 | 18-Feb-2006 |
gdamore | branches: 1.4.2; 1.4.4; 1.4.6;
Use bus_space instead of direct access.
Fix a couple of inverted bits.
Added GPIO_BASE definition to aureg.h.
|
| 1.3 | 13-Feb-2006 |
gdamore | branches: 1.3.2;
GPIO support for all supported Alchemy parts.
|
| 1.2 | 09-Feb-2006 |
gdamore | Add Au1550 PCI support (Au1500 not yet, coming shortly).
Closes PR port-evbmips/32087.
Reviewed by simonb@ (Also, earlier, matt@, and tsutsui@.)
|
| 1.1 | 06-Feb-2006 |
gdamore | Fix up incorrect ICU reporting, add processor specific switch tables for
IRQ routing and such.
Closes PR port-evbmips/31992.
Reviewed by simonb@, matt@, and izumi@
|
| 1.3.2.3 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.3.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.3.2.1 | 13-Feb-2006 |
yamt | file au1500.c was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.4.6.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.4.4.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.4.2.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.4.2.1 | 24-May-2006 |
yamt | sync with head.
|
| 1.5.8.5 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.5.8.4 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.5.8.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.5.8.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.5.8.1 | 11-Apr-2006 |
yamt | file au1500.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.5.6.1 | 15-Jun-2006 |
gdamore | Make these autoconfig com rather than aucom.
|
| 1.5.2.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.5.2.1 | 11-Apr-2006 |
simonb | file au1500.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.6.12.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.6.12.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.6.6.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.6.6.1 | 13-Jul-2006 |
rpaulo | file au1500.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.8.74.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.8.72.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.8.66.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.8.62.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.11.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.11.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.15 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.14 | 10-Jul-2011 |
matt | branches: 1.14.12; 1.14.30;
Fix machine/ includes
|
| 1.13 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.12 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.11 | 28-Feb-2007 |
thorpej | branches: 1.11.62; 1.11.66; 1.11.72; 1.11.74;
TRUE -> true, FALSE -> false
|
| 1.10 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.9 | 13-Jul-2006 |
gdamore | branches: 1.9.6; 1.9.12;
Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.8 | 11-Apr-2006 |
simonb | branches: 1.8.2; 1.8.6; 1.8.8;
The RTC and PCMCIA don't live at address 0 - restore the -1 address
locator from pre-split aubus.c. Should only affect autoconfig display.
|
| 1.7 | 24-Feb-2006 |
shige | branches: 1.7.2; 1.7.4; 1.7.6;
Add Au1XXX PSC(Programable Serial Controller) bus-type driver.
PSC supports four protocols (AC97, I2S, SPI, SMBus).
These protocol drivers will be configured on the bus.
|
| 1.6 | 23-Feb-2006 |
gdamore | Initial commit of aupcmcia chip driver. It requires board specific logic
(coming in a the follow up commit for dbau1550 only), and is not yet complete.
It has serious problems, enough that it isn't yet usable, although the
functionality is all basically fleshed out. It is not enabled in any
default kernels at this point, so it should be benign. Hopefully the
bugs will soon be worked out and these caveats can be removed.
|
| 1.5 | 19-Feb-2006 |
gdamore | Back out accidental inclusion of aupcmcia. Doh!
|
| 1.4 | 18-Feb-2006 |
gdamore | Use bus_space instead of direct access.
Fix a couple of inverted bits.
Added GPIO_BASE definition to aureg.h.
|
| 1.3 | 12-Feb-2006 |
gdamore | branches: 1.3.2;
Add GPIO driver, and GPIO access functions for other subsystems.
|
| 1.2 | 09-Feb-2006 |
gdamore | Add Au1550 PCI support (Au1500 not yet, coming shortly).
Closes PR port-evbmips/32087.
Reviewed by simonb@ (Also, earlier, matt@, and tsutsui@.)
|
| 1.1 | 06-Feb-2006 |
gdamore | Fix up incorrect ICU reporting, add processor specific switch tables for
IRQ routing and such.
Closes PR port-evbmips/31992.
Reviewed by simonb@, matt@, and izumi@
|
| 1.3.2.3 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.3.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.3.2.1 | 12-Feb-2006 |
yamt | file au1550.c was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.7.6.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.7.4.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.7.2.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.7.2.1 | 24-May-2006 |
yamt | sync with head.
|
| 1.8.8.5 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.8.8.4 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.8.8.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.8.8.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.8.8.1 | 11-Apr-2006 |
yamt | file au1550.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.8.6.1 | 15-Jun-2006 |
gdamore | Make these autoconfig com rather than aucom.
|
| 1.8.2.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.8.2.1 | 11-Apr-2006 |
simonb | file au1550.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.9.12.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.9.12.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.9.6.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.9.6.1 | 13-Jul-2006 |
rpaulo | file au1550.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.11.74.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.11.72.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.11.66.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.11.62.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.14.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.14.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.4 | 10-Jul-2011 |
matt | branches: 1.4.12; 1.4.30;
Fix machine/ includes
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 06-Feb-2006 |
gdamore | branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22; 1.1.98; 1.1.102; 1.1.108; 1.1.110;
Forgot to cvs add this file. Doh!
Closes PR port-evbmips/31992.
Adds generalized IRQ routing & reporting support based on different Alchemy
parts. Reviewed by matt@, simonb@, and izumi@
|
| 1.1.110.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.108.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.102.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.98.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.1.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.22.1 | 06-Feb-2006 |
rpaulo | file au_chipdep.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.1.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.16.1 | 06-Feb-2006 |
yamt | file au_chipdep.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.1.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.10.1 | 06-Feb-2006 |
simonb | file au_chipdep.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.1.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 06-Feb-2006 |
yamt | file au_chipdep.c was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.4.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.4.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.5 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.4 | 04-Feb-2006 |
gdamore | branches: 1.4.68; 1.4.70; 1.4.72;
port-evbmips/31910
Forgot to include this file in the last commit... oops!
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.2; 1.3.4; 1.3.6;
merge ktrace-lwp.
|
| 1.2 | 15-Jul-2003 |
lukem | branches: 1.2.16;
__KERNEL_RCSID()
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.12;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.12.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.12.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.12.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file au_cpureg_mem.c was added on branch kqueue on 2002-09-06 08:37:18 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file au_cpureg_mem.c was added on branch gehenna-devsw on 2002-08-31 13:45:12 +0000
|
| 1.1.2.2 | 29-Jul-2002 |
simonb | Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.2.1 | 29-Jul-2002 |
simonb | file au_cpureg_mem.c was added on branch nathanw_sa on 2002-07-29 15:39:12 +0000
|
| 1.2.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.3.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.3.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.4.72.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.4.70.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.4.68.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.16 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.15 | 10-Nov-2019 |
chs | branches: 1.15.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.14 | 27-Jan-2012 |
para | branches: 1.14.48;
converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch
releng@ acknowledged
|
| 1.13 | 10-Jul-2011 |
matt | branches: 1.13.2; 1.13.6;
Fix machine/ includes
|
| 1.12 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.11 | 07-Jun-2010 |
martin | Now that bus_handle_t is signed, avoid % operations on it. Convert all
% PAGE_SIZE to & PAGE_MASK. We don't expect to support non power of two
page sizes anytime soon ;-)
This makes PCI work again on my au1550.
|
| 1.10 | 16-Dec-2009 |
matt | branches: 1.10.2; 1.10.4;
Fix printf format problems and latent bugs made visible by new bus_*_t types.
|
| 1.9 | 07-Nov-2009 |
cegger | Add a flags argument to pmap_kenter_pa(9).
Patch showed on tech-kern@ http://mail-index.netbsd.org/tech-kern/2009/11/04/msg006434.html
No objections.
|
| 1.8 | 28-Apr-2008 |
martin | branches: 1.8.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.7 | 28-Feb-2007 |
thorpej | branches: 1.7.40; 1.7.42; 1.7.44;
TRUE -> true, FALSE -> false
|
| 1.6 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.5 | 28-Mar-2006 |
gdamore | branches: 1.5.2; 1.5.8; 1.5.14; 1.5.20;
Rework evbmips clock architecture to use common clock_subr.h routines.
Additionally, do not fail if no RTC is present, as not all boards have one.
Malta now uses the common dev/ic/mc146818.c code as much as possible, reducing
local "custom" code. These malta changes are *untested*, as I do not have
a Malta board to test with. If someone would please test them and get back to
me, I'd appreciate it!
|
| 1.4 | 19-Mar-2006 |
martin | Fix bus_space_read_stream*_2 accessors (pasto, proably) - this makes wi0
work on my meshcube.
|
| 1.3 | 16-Mar-2006 |
simonb | branches: 1.3.2;
Fix prototype for au_himem_map().
|
| 1.2 | 19-Feb-2006 |
gdamore | branches: 1.2.2; 1.2.4;
Sprinkle wbflush(). Apparently code out there assumes implicit barriers.
|
| 1.1 | 16-Feb-2006 |
gdamore | branches: 1.1.2;
Reenable PCI on DBAU1500. May still be useful for PIO devices. Comments
in the config are left intact, though.
Add a PMAP-driven bus_space for access to upper memory, instead of using
wired entries.
Convert aupci to use said bus_space -- no measured performance impact.
|
| 1.1.2.3 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 16-Feb-2006 |
yamt | file au_himem_space.c was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.2.4.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.2.2.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.3.2.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.5.20.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.5.20.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.5.14.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.5.14.1 | 28-Mar-2006 |
rpaulo | file au_himem_space.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.5.8.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.5.8.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.5.8.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.5.8.1 | 28-Mar-2006 |
yamt | file au_himem_space.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.5.2.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.5.2.1 | 28-Mar-2006 |
simonb | file au_himem_space.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.7.44.3 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.7.44.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.7.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.7.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.7.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.8.18.1 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.10.4.1 | 03-Jul-2010 |
rmind | sync with head
|
| 1.10.2.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.13.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.13.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.14.48.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.15.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.31 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.30 | 10-Nov-2019 |
chs | branches: 1.30.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.29 | 14-Jan-2012 |
kiyohara | branches: 1.29.48;
+ Fix IPL_VM sr_bits for alchemy_ipl_sr_map. Alchemy peripherals connects to
MIPS_INT_MASK_[0-3].
+ Also add IPL_DDB.
|
| 1.28 | 10-Jul-2011 |
matt | branches: 1.28.2; 1.28.6;
Fix machine/ includes
|
| 1.27 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.26 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.25 | 31-May-2009 |
martin | branches: 1.25.4; 1.25.6; 1.25.8;
Per discussion with <simonb> also block the interrupts from icu 1 for
splvm(), even if we don't currently support any handlers for gpio
interrupts.
|
| 1.24 | 31-May-2009 |
martin | Block MIPS_INT_MASK_1 for splvm() too - if_aumac.c establishes it's
interrupt handler at icu 0 req 1, which needs to be blocked by splvm().
|
| 1.23 | 28-Apr-2008 |
martin | branches: 1.23.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.22 | 06-Dec-2007 |
ad | branches: 1.22.12; 1.22.14; 1.22.16;
Make it compile.
|
| 1.21 | 21-Dec-2006 |
yamt | branches: 1.21.10; 1.21.22; 1.21.24; 1.21.30; 1.21.32;
merge yamt-splraiseipl branch.
- finish implementing splraiseipl (and makeiplcookie).
http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
- complete workqueue(9) and fix its ipl problem, which is reported
to cause audio skipping.
- fix netbt (at least compilation problems) for some ports.
- fix PR/33218.
|
| 1.20 | 02-Oct-2006 |
gdamore | Fix incorrect code which ignored "req", causing all interrupts to get
assigned to request 0. With this change, ethernet interrupts are assigned
to req1, seperately from req0. This potentially gives better performance
by shortening the list of handlers walked somewhat.
|
| 1.19 | 25-Mar-2006 |
gdamore | branches: 1.19.8; 1.19.10;
Clean up some code and ensure that the ICU registers start out with sane
values.
|
| 1.18 | 23-Feb-2006 |
gdamore | branches: 1.18.2; 1.18.4; 1.18.6;
Sprinkle wbflush() to ensure register writes are pushed thru the cpu write
buffer.
Clear and set WAKEUP properly.
|
| 1.17 | 10-Feb-2006 |
simonb | Fix bogus gcc uninitialised warnings - they're not needed for one of the
variables.
Update a comment to match changed code.
|
| 1.16 | 10-Feb-2006 |
gdamore | Fix error calling interrupt too many times (found with vmstat -e).
Replace "&&" with "&" when doing bit mask operations. Doh!
|
| 1.15 | 10-Feb-2006 |
gdamore | Add au_intr_enable() and au_intr_disable() API to allow for split interrupts
(e.g. PCMCIA leaves GPIO interrupt masked and reenables them soft interrupt.)
Add checks for masked interrupts before calling the handler.
When removing last interrupt handler, mask off interrupts completely using
MASK_CLEAR and WAKEUP_CLEAR. Tested on dbau1500.
|
| 1.14 | 09-Feb-2006 |
gdamore | au_icu.c is in mips/ and should not depend on evbmips intr handler struct.
convert various u_int32_t to preferred uint32_t.
|
| 1.13 | 06-Feb-2006 |
gdamore | Fix up incorrect ICU reporting, add processor specific switch tables for
IRQ routing and such.
Closes PR port-evbmips/31992.
Reviewed by simonb@, matt@, and izumi@
|
| 1.12 | 24-Dec-2005 |
perry | branches: 1.12.2; 1.12.4; 1.12.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.11 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.10 | 09-Jun-2005 |
he | branches: 1.10.2;
Rename local variable `cpu_intr' to `cpu_int' to avoid shadowing.
|
| 1.9 | 13-Feb-2004 |
wiz | Uppercase CPU, plural is CPUs.
|
| 1.8 | 27-Oct-2003 |
simonb | More bogus uninitialised warnings.
|
| 1.7 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.6 | 25-May-2003 |
tsutsui | branches: 1.6.2;
Use common mips/softintr.c for softintr(9) on evbmips.
Ok'ed by simonb.
|
| 1.5 | 01-Apr-2003 |
hpeyerl | support active low, level triggered interrupts, needed for ohci front end.
|
| 1.4 | 17-Nov-2002 |
simonb | Remove reference to mips_int5_evcnt from here; that is port-specific,
not arch-specific.
|
| 1.3 | 27-Sep-2002 |
provos | remove trailing \n in panic(). approved perry.
|
| 1.2 | 29-Jul-2002 |
simonb | branches: 1.2.2; 1.2.4; 1.2.6;
Remove some debug code accidently left in.
|
| 1.1 | 29-Jul-2002 |
simonb | Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.2.6.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.2.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.2.6.1 | 29-Jul-2002 |
jdolecek | file au_icu.c was added on branch kqueue on 2002-09-06 08:37:18 +0000
|
| 1.2.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.4.1 | 29-Jul-2002 |
gehenna | file au_icu.c was added on branch gehenna-devsw on 2002-08-31 13:45:13 +0000
|
| 1.2.2.3 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.2.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.1 | 29-Jul-2002 |
nathanw | file au_icu.c was added on branch nathanw_sa on 2002-10-18 02:38:42 +0000
|
| 1.6.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.6.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.6.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.6.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.10.2.3 | 07-Dec-2007 |
yamt | sync with head
|
| 1.10.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.10.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.12.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.12.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.12.2.2 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.12.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.18.6.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.18.4.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.18.2.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.19.10.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.19.10.1 | 22-Sep-2006 |
yamt | fix softintr for following ports. (hopefully)
hpcmips
evbmips
algor
arc
ews4800mips
newsmips
|
| 1.19.8.2 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.19.8.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.21.32.1 | 08-Dec-2007 |
ad | Sync with head.
|
| 1.21.30.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.21.24.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.21.22.1 | 09-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.21.10.1 | 09-Dec-2007 |
reinoud | Pullup to HEAD
|
| 1.22.16.2 | 20-Jun-2009 |
yamt | sync with head
|
| 1.22.16.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.22.14.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.22.12.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.23.18.3 | 28-Feb-2010 |
matt | Add #define __INTR_PRIVATE
|
| 1.23.18.2 | 23-Feb-2010 |
matt | Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that
in the interrupt init routine. There's a default ipl_sr_map will operate
correctly, but isn't performant.
|
| 1.23.18.1 | 15-Feb-2010 |
matt | Adapt to the new interrupt framework for NetBSD/mips.
|
| 1.25.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.25.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.25.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.28.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.28.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.29.48.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.30.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.11 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.10 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.9 | 26-May-2008 |
tsutsui | branches: 1.9.16; 1.9.20; 1.9.26; 1.9.28;
Remove all initialization of obsolete ci_divisor_recip in
mips struct cpu_info and related macroes.
The member was prepared for a hack in MD microtime(9) implementation
but it has been superseded by MI timecounter(9).
|
| 1.8 | 09-Jan-2008 |
wiz | branches: 1.8.6; 1.8.8; 1.8.10; 1.8.12;
Fix typo in macro name and comments.
|
| 1.7 | 17-Oct-2007 |
garbled | branches: 1.7.2; 1.7.8;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.6 | 20-May-2007 |
he | branches: 1.6.10;
Now that curcpu() is defined in terms of curlwp() for mips, we need to
include <sys/lwp.h> where curcpu() is used.
|
| 1.5 | 02-Sep-2006 |
gdamore | branches: 1.5.12; 1.5.14; 1.5.20;
Remove pointless dependency upon evbmips/clockvar.h.
|
| 1.4 | 25-Nov-2005 |
simonb | branches: 1.4.4; 1.4.8;
Include <sys/systm.h> if we use printf(), instead of relying on some
other random header pulling <sys/systm.h> in for us.
|
| 1.3 | 25-Feb-2005 |
simonb | branches: 1.3.4; 1.3.10;
Remove some errant semicolons.
|
| 1.2 | 15-Jul-2003 |
lukem | branches: 1.2.8; 1.2.10;
__KERNEL_RCSID()
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.12;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.12.5 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.1.12.4 | 04-Mar-2005 |
skrll | Sync with HEAD.
Hi Perry!
|
| 1.1.12.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.12.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.12.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file au_timer.c was added on branch kqueue on 2002-09-06 08:37:19 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file au_timer.c was added on branch gehenna-devsw on 2002-08-31 13:45:13 +0000
|
| 1.1.2.2 | 29-Jul-2002 |
simonb | Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.2.1 | 29-Jul-2002 |
simonb | file au_timer.c was added on branch nathanw_sa on 2002-07-29 15:39:13 +0000
|
| 1.2.10.1 | 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.2.8.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.3.10.1 | 29-Nov-2005 |
yamt | sync with head.
|
| 1.3.4.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.3.4.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.3.4.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.4.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.8.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.4.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.5.20.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.5.14.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.5.12.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.6.10.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.6.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.7.8.1 | 10-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.7.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.8.12.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.8.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.8.8.1 | 04-Jun-2008 |
yamt | sync with head
|
| 1.8.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.9.28.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.9.26.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.9.20.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.9.16.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.11 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.10 | 10-Nov-2019 |
chs | branches: 1.10.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.9 | 27-Jan-2012 |
para | branches: 1.9.48;
converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch
releng@ acknowledged
|
| 1.8 | 10-Jul-2011 |
matt | branches: 1.8.2; 1.8.6;
Fix machine/ includes
|
| 1.7 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.6 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.5 | 04-Mar-2007 |
christos | branches: 1.5.40; 1.5.42; 1.5.44;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.4 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.3 | 16-Mar-2006 |
simonb | branches: 1.3.4; 1.3.10; 1.3.16; 1.3.22;
Update a comment.
|
| 1.2 | 16-Feb-2006 |
gdamore | branches: 1.2.2; 1.2.4; 1.2.6;
Remove useless extra assignment.
|
| 1.1 | 06-Feb-2006 |
gdamore | Add a bus_space that makes use of wired TLB entries, as required for PCI,
PCMCIA, and perhaps other devices on Alchemy parts.
Closes PR port-evbmips/32298
Reviewed as part of PCI changes by matt@, izumi@, and probably also simonb@.
This implementation has been tested seperately with my PCI code. This commit
does not add the necessary changes to configuration files to include this in
current configurations yet, as I intend to add that when I add the
multi-platform configuration support for evbmips/alchemy (which will be
required for PCI anyway.)
|
| 1.2.6.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.2.4.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.2.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.2.2.1 | 16-Feb-2006 |
yamt | file au_wired_space.c was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.3.22.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.3.22.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.3.16.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.16.1 | 16-Mar-2006 |
rpaulo | file au_wired_space.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.3.10.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.3.10.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.3.10.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.3.10.1 | 16-Mar-2006 |
yamt | file au_wired_space.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.3.4.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.3.4.1 | 16-Mar-2006 |
simonb | file au_wired_space.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.5.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.5.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.5.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.8.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.8.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.9.48.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.10.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.27 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.26 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.25 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.24 | 24-Apr-2021 |
thorpej | branches: 1.24.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.23 | 10-Jul-2011 |
matt | branches: 1.23.68;
Fix machine/ includes
|
| 1.22 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.21 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.20 | 16-Dec-2009 |
matt | branches: 1.20.4; 1.20.6; 1.20.8;
Fix printf format problems and latent bugs made visible by new bus_*_t types.
|
| 1.19 | 14-Mar-2009 |
dsl | Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)
|
| 1.18 | 06-Feb-2006 |
gdamore | branches: 1.18.72; 1.18.80; 1.18.86; 1.18.90;
Fix up incorrect ICU reporting, add processor specific switch tables for
IRQ routing and such.
Closes PR port-evbmips/31992.
Reviewed by simonb@, matt@, and izumi@
|
| 1.17 | 20-Dec-2005 |
tron | branches: 1.17.2; 1.17.4; 1.17.6;
Add basic support for Alchemy Au1550 processor (CPU and devices).
Patch contributed by Garrett D'Amore in PR port-evbmips/32030.
|
| 1.16 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.15 | 26-Aug-2005 |
drochner | kill some more simple submatch() functions, use config_stdsubmatch()
|
| 1.14 | 25-Aug-2005 |
drochner | replace the "locdesc_t" structure carrying the number of locators
explicitely by a plain integer array
the length in now known to all relevant parties, so this avoids
duplication of information, and we can allocate that thing in
drivers without hacks
|
| 1.13 | 28-Jun-2005 |
drochner | branches: 1.13.2;
kill questionable uses of config(8) generated xxxlocnames[]
locator information does belong elsewhere and definitely shouldn't
be in the global namespace
|
| 1.12 | 13-Sep-2004 |
drochner | autoconf cleanup: turn xxxsubmatch() functions into the locator
passing variants
|
| 1.11 | 16-Mar-2004 |
nathanw | The Au1500 doesn't have an i2s interface.
|
| 1.10 | 13-Feb-2004 |
wiz | Uppercase CPU, plural is CPUs.
|
| 1.9 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.8 | 02-Apr-2003 |
hpeyerl | branches: 1.8.2;
de-slob-ify. (I'm a slob)
|
| 1.7 | 01-Apr-2003 |
hpeyerl | allocate an aubus dma tag.
|
| 1.6 | 01-Jan-2003 |
thorpej | Use aprint_normal() for cfprint routines.
|
| 1.5 | 11-Nov-2002 |
simonb | Fix a typo in the on-board device selection machinery (which I thought
I'd committed long ago).
|
| 1.4 | 02-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.3 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.2 | 27-Sep-2002 |
thorpej | Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.6.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file aubus.c was added on branch kqueue on 2002-09-06 08:37:19 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file aubus.c was added on branch gehenna-devsw on 2002-08-31 13:45:13 +0000
|
| 1.1.2.4 | 03-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.1.2.3 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 29-Jul-2002 |
nathanw | file aubus.c was added on branch nathanw_sa on 2002-10-18 02:38:42 +0000
|
| 1.8.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.8.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.8.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.8.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.13.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.17.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.17.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.17.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.18.90.1 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.18.86.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.18.80.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.18.72.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.18.72.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.20.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.20.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.20.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.23.68.2 | 22-Mar-2021 |
thorpej | Audit CFARG_IATTR in config_found() calls, and remove it in situations
where the interface attribute is not ambiguous.
|
| 1.23.68.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.24.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 09-Feb-2006 |
gdamore | branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22;
Split out peripheral register defines from aureg.h. As discussed with
simonb@.
|
| 1.1.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.22.1 | 09-Feb-2006 |
rpaulo | file ac97reg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.1.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.16.1 | 09-Feb-2006 |
yamt | file ac97reg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.1.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.10.1 | 09-Feb-2006 |
simonb | file ac97reg.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.1.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 09-Feb-2006 |
yamt | file ac97reg.h was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.9 | 27-Oct-2012 |
chs | split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.8 | 06-Jun-2011 |
matt | branches: 1.8.2; 1.8.12;
CFATTACH_DECL(..., sizeof(struct device), -> CFATTACH_DECL_NEW(..., 0
struct device * -> device_t
struct cfdata * -> cfdata_t
use bool when appropriate
some constification
|
| 1.7 | 11-Dec-2005 |
christos | branches: 1.7.100; 1.7.110;
merge ktrace-lwp.
|
| 1.6 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.5 | 02-Oct-2002 |
thorpej | branches: 1.5.6;
Add trailing ; to CFATTACH_DECL.
|
| 1.4 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.3 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.2 | 27-Sep-2002 |
thorpej | Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver. The cfdriver is then looked
up in a list which is built at run-time.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.6.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file auaudio.c was added on branch kqueue on 2002-09-06 08:37:20 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file auaudio.c was added on branch gehenna-devsw on 2002-08-31 13:45:13 +0000
|
| 1.1.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 29-Jul-2002 |
nathanw | file auaudio.c was added on branch nathanw_sa on 2002-10-18 02:38:42 +0000
|
| 1.5.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.5.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.5.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.7.110.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.7.100.1 | 12-Jun-2011 |
rmind | sync with head
|
| 1.8.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.8.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.22 | 13-Jul-2006 |
gdamore | Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.21 | 14-May-2006 |
elad | branches: 1.21.4;
integrate kauth.
|
| 1.20 | 28-Mar-2006 |
thorpej | Use device_unit().
|
| 1.19 | 26-Mar-2006 |
thorpej | Use device_unit().CVS: ----------------------------------------------------------------------
|
| 1.18 | 20-Feb-2006 |
thorpej | branches: 1.18.2; 1.18.4; 1.18.6;
Use device_is_active() rather than testing dv_flags for DVF_ACTIVE
directly.
|
| 1.17 | 27-Dec-2005 |
chs | branches: 1.17.2; 1.17.4; 1.17.6;
remove the COM_MPLOCK option. always include the spinlock in the softc
and always call the simple_* locking functions. the locking functions
are compiled out if they are not needed anyway, so a separate option
for this doesn't gain anything.
this also fixes the serial console on my alpha ES40 (which doesn't make much
sense since the com driver should still be under the big lock on alpha,
but whatever).
|
| 1.16 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.15 | 06-Sep-2005 |
kleink | Change the driver open function's conditional for overriding exclusive tty
use from checking the proc's uid to suser(9), and account for the use of
privileges. Noted by David Holland in PR kern/31126.
|
| 1.14 | 01-May-2004 |
thorpej | branches: 1.14.12;
Rename the COM16650 option to COM_16650, for consistency with other
com variant options.
|
| 1.13 | 08-Nov-2003 |
simonb | Use the COM_AU1x00 option for Au1x00 feature support.
|
| 1.12 | 08-Nov-2003 |
simonb | Sync with com.c, rev 1.222.
|
| 1.11 | 07-Nov-2003 |
simonb | Sync with dev/ic/com.c rev 1.221.
|
| 1.10 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.9 | 29-Jun-2003 |
fvdl | branches: 1.9.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.8 | 29-Jun-2003 |
simonb | Use the com softc enabled/disable hooks instead of directly frobbing
Au1x00 registers in com_attach_subr(). Suggested by Jason Thorpe and
tested on both console and extra serial ports.
|
| 1.7 | 29-Jun-2003 |
simonb | Fix 'struct lwp *' lossage.
|
| 1.6 | 27-Jun-2003 |
he | Conditionalize usage of the COM_HW_HAYESP constant on COM_HAYESP.
Add a dummy type argument to the local (au)comcnattach to match the change
in the prototype of the "real" comcnattach.
Reviewed and tested by simonb.
|
| 1.5 | 23-Jun-2003 |
martin | Make sure to include opt_foo.h if a defflag option FOO is used.
|
| 1.4 | 08-Mar-2003 |
he | Initialize the two new members of "struct console" to NULL so that
this file compiles again.
|
| 1.3 | 23-Oct-2002 |
jdolecek | merge kqueue branch into -current
kqueue provides a stateful and efficient event notification framework
currently supported events include socket, file, directory, fifo,
pipe, tty and device changes, and monitoring of processes and signals
kqueue is supported by all writable filesystems in NetBSD tree
(with exception of Coda) and all device drivers supporting poll(2)
based on work done by Jonathan Lemon for FreeBSD
initial NetBSD port done by Luke Mewburn and Jason Thorpe
|
| 1.2 | 06-Sep-2002 |
gehenna | Merge the gehenna-devsw branch into the trunk.
This merge changes the device switch tables from static array to
dynamically generated by config(8).
- All device switches is defined as a constant structure in device drivers.
- The new grammer ``device-major'' is introduced to ``files''.
device-major <prefix> char <num> [block <num>] [<rules>]
- All device major numbers must be listed up in port dependent majors.<arch>
by using this grammer.
- Added the new naming convention.
The name of the device switch must be <prefix>_[bc]devsw for auto-generation
of device switch tables.
- The backward compatibility of loading block/character device
switch by LKM framework is broken. This is necessary to convert
from block/character device major to device name in runtime and vice versa.
- The restriction to assign device major by LKM is completely removed.
We don't need to reserve LKM entries for dynamic loading of device switch.
- In compile time, device major numbers list is packed into the kernel and
the LKM framework will refer it to assign device major number dynamically.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add a slightly modified dev/ic/com.c that supports the Alchemy
Semiconductor Au1x00 series on-chip UARTs. Will be merged with
the original com.c driver once a few issues are tidied up. Main
differences from a standard 16550 UART are:
- separate rxdata and txdata registers
- single 16-bit register for the clock divisor
- "enable uart" register
|
| 1.1.6.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file aucom.c was added on branch kqueue on 2002-09-06 08:37:21 +0000
|
| 1.1.4.4 | 01-Sep-2002 |
gehenna | fix typo.
|
| 1.1.4.3 | 31-Aug-2002 |
gehenna | Add character device switch.
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file aucom.c was added on branch gehenna-devsw on 2002-08-31 13:45:14 +0000
|
| 1.1.2.3 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.2.2 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 29-Jul-2002 |
nathanw | file aucom.c was added on branch nathanw_sa on 2002-09-17 21:15:42 +0000
|
| 1.9.2.5 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.9.2.4 | 17-Jan-2005 |
skrll | Adapt to branch.
|
| 1.9.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.9.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.9.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.14.12.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.14.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.17.6.2 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.17.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.17.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.17.2.1 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.18.6.3 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.18.6.2 | 31-Mar-2006 |
tron | Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.
|
| 1.18.6.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.18.4.4 | 13-May-2006 |
elad | sprinkle some #include <sys/kauth.h> in files that use kauth kpi but
don't include it yet. hopefully this will prevent some fallout.
|
| 1.18.4.3 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.18.4.2 | 10-Mar-2006 |
elad | generic_authorize() -> kauth_authorize_generic().
|
| 1.18.4.1 | 08-Mar-2006 |
elad | Adapt to kernel authorization KPI.
I expect *some* lossage here...
|
| 1.18.2.3 | 11-Aug-2006 |
yamt | sync with head
|
| 1.18.2.2 | 24-May-2006 |
yamt | sync with head.
|
| 1.18.2.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.21.4.1 | 15-Jun-2006 |
gdamore | Adapt to new com framework, converting aucom.c clone to use common com.c.
|
| 1.14 | 13-Jul-2006 |
gdamore | Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.13 | 09-Feb-2006 |
gdamore | branches: 1.13.2; 1.13.10;
Remove not-useful UART references from aureg.h, duplicates consolidated into
aucomreg.h. First part of aureg.h cleanup requested by simonb@.
|
| 1.12 | 11-Dec-2005 |
christos | branches: 1.12.2; 1.12.4; 1.12.6;
merge ktrace-lwp.
|
| 1.11 | 06-Sep-2005 |
simonb | Include <sys/systm.h>; needed for printf() and strcmp() in the
non-DEBUG case.
|
| 1.10 | 15-Dec-2003 |
simonb | branches: 1.10.16;
Use UART_SIZE instead of a (redefined) COM_NPORTS.
|
| 1.9 | 08-Nov-2003 |
simonb | Add a "COM_AU1x00" option, similar to COM_PXA2X0, for enabling Au1x00
features in the "com" driver.
|
| 1.8 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.7 | 29-Jun-2003 |
fvdl | branches: 1.7.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.6 | 29-Jun-2003 |
simonb | Use the com softc enabled/disable hooks instead of directly frobbing
Au1x00 registers in com_attach_subr(). Suggested by Jason Thorpe and
tested on both console and extra serial ports.
|
| 1.5 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.4 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.3 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.2 | 27-Sep-2002 |
thorpej | Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver. The cfdriver is then looked
up in a list which is built at run-time.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.6.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file aucom_aubus.c was added on branch kqueue on 2002-09-06 08:37:22 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file aucom_aubus.c was added on branch gehenna-devsw on 2002-08-31 13:45:14 +0000
|
| 1.1.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 29-Jul-2002 |
nathanw | file aucom_aubus.c was added on branch nathanw_sa on 2002-10-18 02:38:42 +0000
|
| 1.7.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.7.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.7.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.7.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.10.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.10.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.12.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.12.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.12.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.13.10.1 | 16-Jun-2006 |
gdamore | Remove this file now that we use stock com.
|
| 1.13.2.1 | 11-Aug-2006 |
yamt | sync with head
|
| 1.3 | 13-Jul-2006 |
gdamore | Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.2 | 09-Feb-2006 |
gdamore | branches: 1.2.2; 1.2.10;
Remove not-useful UART references from aureg.h, duplicates consolidated into
aucomreg.h. First part of aureg.h cleanup requested by simonb@.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.28; 1.1.40; 1.1.42; 1.1.44;
Add a slightly modified dev/ic/com.c that supports the Alchemy
Semiconductor Au1x00 series on-chip UARTs. Will be merged with
the original com.c driver once a few issues are tidied up. Main
differences from a standard 16550 UART are:
- separate rxdata and txdata registers
- single 16-bit register for the clock divisor
- "enable uart" register
|
| 1.1.44.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.42.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.40.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.1.28.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.28.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file aucomreg.h was added on branch kqueue on 2002-09-06 08:37:22 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file aucomreg.h was added on branch gehenna-devsw on 2002-08-31 13:45:14 +0000
|
| 1.1.2.2 | 29-Jul-2002 |
simonb | Add a slightly modified dev/ic/com.c that supports the Alchemy
Semiconductor Au1x00 series on-chip UARTs. Will be merged with
the original com.c driver once a few issues are tidied up. Main
differences from a standard 16550 UART are:
- separate rxdata and txdata registers
- single 16-bit register for the clock divisor
- "enable uart" register
|
| 1.1.2.1 | 29-Jul-2002 |
simonb | file aucomreg.h was added on branch nathanw_sa on 2002-07-29 15:42:43 +0000
|
| 1.2.10.1 | 15-Jun-2006 |
gdamore | Adapt to new com framework, converting aucom.c clone to use common com.c.
|
| 1.2.2.1 | 11-Aug-2006 |
yamt | sync with head
|
| 1.4 | 27-Dec-2005 |
chs | remove the COM_MPLOCK option. always include the spinlock in the softc
and always call the simple_* locking functions. the locking functions
are compiled out if they are not needed anyway, so a separate option
for this doesn't gain anything.
this also fixes the serial console on my alpha ES40 (which doesn't make much
sense since the com driver should still be under the big lock on alpha,
but whatever).
|
| 1.3 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.2 | 01-May-2004 |
thorpej | branches: 1.2.12;
Rename the COM16650 option to COM_16650, for consistency with other
com variant options.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.12;
Add a slightly modified dev/ic/com.c that supports the Alchemy
Semiconductor Au1x00 series on-chip UARTs. Will be merged with
the original com.c driver once a few issues are tidied up. Main
differences from a standard 16550 UART are:
- separate rxdata and txdata registers
- single 16-bit register for the clock divisor
- "enable uart" register
|
| 1.1.12.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.12.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.12.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file aucomvar.h was added on branch kqueue on 2002-09-06 08:37:23 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file aucomvar.h was added on branch gehenna-devsw on 2002-08-31 13:45:15 +0000
|
| 1.1.2.2 | 29-Jul-2002 |
simonb | Add a slightly modified dev/ic/com.c that supports the Alchemy
Semiconductor Au1x00 series on-chip UARTs. Will be merged with
the original com.c driver once a few issues are tidied up. Main
differences from a standard 16550 UART are:
- separate rxdata and txdata registers
- single 16-bit register for the clock divisor
- "enable uart" register
|
| 1.1.2.1 | 29-Jul-2002 |
simonb | file aucomvar.h was added on branch nathanw_sa on 2002-07-29 15:42:43 +0000
|
| 1.2.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.10 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.9 | 24-Apr-2021 |
thorpej | branches: 1.9.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.8 | 27-Jun-2015 |
matt | branches: 1.8.32;
Cleanup includes.
|
| 1.7 | 03-Jan-2012 |
kiyohara | branches: 1.7.6; 1.7.24;
Use device_t instead of 'struct device *'.
Call aprint_* in auto-config time.
|
| 1.6 | 01-Jul-2011 |
dyoung | branches: 1.6.2; 1.6.6;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.5 | 24-Mar-2006 |
gdamore | branches: 1.5.2; 1.5.8; 1.5.14;
Remove crufty (and unused) augpio_found check. Noted by Kiyohara Takashi.
|
| 1.4 | 24-Mar-2006 |
gdamore | Add macros so that GPIOs can be accessed directly without having to use
ioctls or the GPIO framework. Useful for some subsystems such as PCMCIA, that
may also use GPIOs. Requested by Kiyohara Takashi.
|
| 1.3 | 18-Feb-2006 |
gdamore | branches: 1.3.2; 1.3.4; 1.3.6;
Use bus_space instead of direct access.
Fix a couple of inverted bits.
Added GPIO_BASE definition to aureg.h.
|
| 1.2 | 13-Feb-2006 |
gdamore | branches: 1.2.2;
Do not reset GPIO2 block -- causes PCI reset.
|
| 1.1 | 12-Feb-2006 |
gdamore | Add GPIO driver, and GPIO access functions for other subsystems.
|
| 1.2.2.3 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.2.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.2.2.1 | 13-Feb-2006 |
yamt | file augpio.c was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.3.6.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.3.4.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.3.2.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.5.14.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.5.14.1 | 24-Mar-2006 |
rpaulo | file augpio.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.5.8.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.5.8.1 | 24-Mar-2006 |
yamt | file augpio.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.5.2.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.5.2.1 | 24-Mar-2006 |
simonb | file augpio.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.6.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.6.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.7.24.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.7.6.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.8.32.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.9.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 18-Feb-2006 |
gdamore | branches: 1.3.8; 1.3.14; 1.3.20;
Use bus_space instead of direct access.
Fix a couple of inverted bits.
Added GPIO_BASE definition to aureg.h.
|
| 1.2 | 13-Feb-2006 |
gdamore | branches: 1.2.2;
Do not reset GPIO2 block -- causes PCI reset.
|
| 1.1 | 12-Feb-2006 |
gdamore | Add GPIO driver, and GPIO access functions for other subsystems.
|
| 1.2.2.3 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.2.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.2.2.1 | 13-Feb-2006 |
yamt | file augpioreg.h was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.3.20.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.20.1 | 18-Feb-2006 |
rpaulo | file augpioreg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.3.14.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.3.14.1 | 18-Feb-2006 |
yamt | file augpioreg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.3.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.3.8.1 | 18-Feb-2006 |
simonb | file augpioreg.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.3 | 24-Mar-2006 |
gdamore | branches: 1.3.2; 1.3.4; 1.3.6; 1.3.12; 1.3.18;
Add macros so that GPIOs can be accessed directly without having to use
ioctls or the GPIO framework. Useful for some subsystems such as PCMCIA, that
may also use GPIOs. Requested by Kiyohara Takashi.
|
| 1.2 | 18-Feb-2006 |
gdamore | branches: 1.2.2;
Use bus_space instead of direct access.
Fix a couple of inverted bits.
Added GPIO_BASE definition to aureg.h.
|
| 1.1 | 12-Feb-2006 |
gdamore | branches: 1.1.2;
Add GPIO driver, and GPIO access functions for other subsystems.
|
| 1.1.2.3 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 12-Feb-2006 |
yamt | file augpiovar.h was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.2.2.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.3.18.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.18.1 | 24-Mar-2006 |
rpaulo | file augpiovar.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.3.12.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.3.12.1 | 24-Mar-2006 |
yamt | file augpiovar.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.3.6.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.3.6.1 | 24-Mar-2006 |
simonb | file augpiovar.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.3.4.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.3.4.1 | 24-Mar-2006 |
elad | file augpiovar.h was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.3.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.3.2.1 | 24-Mar-2006 |
tron | file augpiovar.h was added on branch peter-altq on 2006-03-28 09:47:16 +0000
|
| 1.22 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.21 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.20 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.19 | 24-Apr-2021 |
thorpej | branches: 1.19.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.18 | 07-Jul-2020 |
thorpej | branches: 1.18.4;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:
==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.
This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.
- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.
|
| 1.17 | 02-Oct-2015 |
msaitoh | PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific
|
| 1.16 | 27-Jun-2015 |
matt | Cleanup includes.
|
| 1.15 | 29-Mar-2014 |
christos | branches: 1.15.6;
make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.
|
| 1.14 | 26-Mar-2014 |
christos | kill sprintf
|
| 1.13 | 27-Jan-2012 |
para | branches: 1.13.6; 1.13.10;
converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch
releng@ acknowledged
|
| 1.12 | 03-Jan-2012 |
kiyohara | Use device_t instead of 'struct device *'.
Call aprint_* in auto-config time.
|
| 1.11 | 01-Jul-2011 |
dyoung | branches: 1.11.2; 1.11.6;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.10 | 17-May-2011 |
dyoung | PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.
Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.
This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:
algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
|
| 1.9 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.8 | 28-Feb-2007 |
thorpej | branches: 1.8.62; 1.8.66; 1.8.72; 1.8.74;
TRUE -> true, FALSE -> false
|
| 1.7 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.6 | 09-Sep-2006 |
simonb | branches: 1.6.6;
Fix a white-space nit.
|
| 1.5 | 27-Feb-2006 |
gdamore | branches: 1.5.2; 1.5.8; 1.5.12; 1.5.14; 1.5.18; 1.5.20;
Masking for mstart was still *not* right. This time I'm fairly sure I got
it right -- OMSAL400 and MTX-1 boards should have functional PCI now.
|
| 1.4 | 27-Feb-2006 |
gdamore | Incorrect pci_mbar/pci_mwmask related calculation was causing devices to be
inaccessible on some platforms.
|
| 1.3 | 16-Feb-2006 |
gdamore | branches: 1.3.2;
Reenable PCI on DBAU1500. May still be useful for PIO devices. Comments
in the config are left intact, though.
Add a PMAP-driven bus_space for access to upper memory, instead of using
wired entries.
Convert aupci to use said bus_space -- no measured performance impact.
|
| 1.2 | 13-Feb-2006 |
simonb | If we get a master abort, reset the SPL before returning.
|
| 1.1 | 09-Feb-2006 |
gdamore | Add Au1550 PCI support (Au1500 not yet, coming shortly).
Closes PR port-evbmips/32087.
Reviewed by simonb@ (Also, earlier, matt@, and tsutsui@.)
|
| 1.3.2.3 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.3.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.3.2.1 | 16-Feb-2006 |
yamt | file aupci.c was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.5.20.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.5.20.1 | 27-Feb-2006 |
rpaulo | file aupci.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.5.18.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.5.14.5 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.5.14.4 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.5.14.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.5.14.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.5.14.1 | 27-Feb-2006 |
yamt | file aupci.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.5.12.1 | 13-Jul-2006 |
gdamore | Merge from HEAD.
|
| 1.5.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.5.8.1 | 27-Feb-2006 |
simonb | file aupci.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.5.2.1 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.6.6.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.6.6.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.8.74.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.8.72.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.8.66.2 | 31-May-2011 |
rmind | sync with head
|
| 1.8.66.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.8.62.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.11.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.11.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.11.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.13.10.1 | 18-May-2014 |
rmind | sync with head
|
| 1.13.6.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.13.6.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.15.6.2 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.15.6.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.18.4.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.19.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 16-Feb-2006 |
gdamore | branches: 1.2.2; 1.2.10; 1.2.16; 1.2.22;
Reenable PCI on DBAU1500. May still be useful for PIO devices. Comments
in the config are left intact, though.
Add a PMAP-driven bus_space for access to upper memory, instead of using
wired entries.
Convert aupci to use said bus_space -- no measured performance impact.
|
| 1.1 | 09-Feb-2006 |
gdamore | Add Au1550 PCI support (Au1500 not yet, coming shortly).
Closes PR port-evbmips/32087.
Reviewed by simonb@ (Also, earlier, matt@, and tsutsui@.)
|
| 1.2.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.22.1 | 16-Feb-2006 |
rpaulo | file aupcireg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.2.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.16.1 | 16-Feb-2006 |
yamt | file aupcireg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.2.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.10.1 | 16-Feb-2006 |
simonb | file aupcireg.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.2.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.2.2.1 | 16-Feb-2006 |
yamt | file aupcireg.h was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.3 | 04-Apr-2011 |
dyoung | Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.
For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:
Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.
siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.
slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.
viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.
While I'm here, make pci_mapreg_submap() static.
With these changes in place, I have tested the compilation of these
kernels:
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:
### evbmips-el GDIUM
nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop
### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'
### ia64 GENERIC
/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type
### sgimips GENERIC32_IP3x
crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
|
| 1.2 | 16-Feb-2006 |
gdamore | branches: 1.2.2; 1.2.10; 1.2.16; 1.2.22; 1.2.102; 1.2.108;
Reenable PCI on DBAU1500. May still be useful for PIO devices. Comments
in the config are left intact, though.
Add a PMAP-driven bus_space for access to upper memory, instead of using
wired entries.
Convert aupci to use said bus_space -- no measured performance impact.
|
| 1.1 | 09-Feb-2006 |
gdamore | Add Au1550 PCI support (Au1500 not yet, coming shortly).
Closes PR port-evbmips/32087.
Reviewed by simonb@ (Also, earlier, matt@, and tsutsui@.)
|
| 1.2.108.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.102.1 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.22.1 | 16-Feb-2006 |
rpaulo | file aupcivar.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.2.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.16.1 | 16-Feb-2006 |
yamt | file aupcivar.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.2.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.10.1 | 16-Feb-2006 |
simonb | file aupcivar.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.2.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.2.2.1 | 16-Feb-2006 |
yamt | file aupcivar.h was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.13 | 25-Sep-2022 |
andvar | s/inerrupt/interrupt/ and s/intrrupt/interrupt/ in comments.
|
| 1.12 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.11 | 24-Apr-2021 |
thorpej | branches: 1.11.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.10 | 30-Aug-2015 |
dholland | branches: 1.10.32;
Turn interrupts back off after sleeping. From maxv's Brainy list.
|
| 1.9 | 04-Jan-2012 |
kiyohara | branches: 1.9.6; 1.9.24;
Use device_t instead of 'struct device *'.
Remove unnecessary \n.
|
| 1.8 | 03-Jan-2012 |
kiyohara | Use device_t instead of 'struct device *'.
Call aprint_* in auto-config time.
|
| 1.7 | 26-Jul-2011 |
dyoung | branches: 1.7.2; 1.7.6;
Don't set the iobase and iosize members of pcmciabus_attach_args because
they're not used in any meaningful way.
|
| 1.6 | 08-Jan-2008 |
dogcow | add include for incomplete struct blah blah blah
|
| 1.5 | 22-Dec-2007 |
ad | Make compile (hi moof).
|
| 1.4 | 17-Oct-2007 |
garbled | branches: 1.4.2; 1.4.4; 1.4.8;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.3 | 09-Jul-2007 |
ad | branches: 1.3.10;
Merge some of the less invasive changes from the vmlocking branch:
- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements
|
| 1.2 | 25-Mar-2006 |
gdamore | branches: 1.2.2; 1.2.8; 1.2.14; 1.2.24; 1.2.26; 1.2.32;
Remove verbose debug message, and make sure we pass right IPL.
(Pedantic, since IPL isn't used in ICU, but better to be pedantic and right
than wrong.)
|
| 1.1 | 23-Feb-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
Initial commit of aupcmcia chip driver. It requires board specific logic
(coming in a the follow up commit for dbau1550 only), and is not yet complete.
It has serious problems, enough that it isn't yet usable, although the
functionality is all basically fleshed out. It is not enabled in any
default kernels at this point, so it should be benign. Hopefully the
bugs will soon be worked out and these caveats can be removed.
|
| 1.1.8.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.6.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.4.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 23-Feb-2006 |
yamt | file aupcmcia.c was added on branch yamt-uio_vmspace on 2006-03-01 09:27:59 +0000
|
| 1.2.32.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.2.26.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.2.24.1 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.2.14.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.14.1 | 25-Mar-2006 |
rpaulo | file aupcmcia.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.2.8.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.2.8.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.2.8.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.8.1 | 25-Mar-2006 |
yamt | file aupcmcia.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.2.2.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.2.1 | 25-Mar-2006 |
simonb | file aupcmcia.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.3.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.3.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.4.8.2 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.4.8.1 | 02-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.4.4.1 | 26-Dec-2007 |
ad | Sync with head.
|
| 1.4.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.7.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.7.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.9.24.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.9.6.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.32.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.11.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 15-Dec-2024 |
andvar | s/particlar/particular/ in comment.
|
| 1.1 | 23-Feb-2006 |
gdamore | branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22; 1.1.204;
Initial commit of aupcmcia chip driver. It requires board specific logic
(coming in a the follow up commit for dbau1550 only), and is not yet complete.
It has serious problems, enough that it isn't yet usable, although the
functionality is all basically fleshed out. It is not enabled in any
default kernels at this point, so it should be benign. Hopefully the
bugs will soon be worked out and these caveats can be removed.
|
| 1.1.204.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.1.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.22.1 | 23-Feb-2006 |
rpaulo | file aupcmciareg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.1.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.16.1 | 23-Feb-2006 |
yamt | file aupcmciareg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.1.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.10.1 | 23-Feb-2006 |
simonb | file aupcmciareg.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.1.2.2 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 23-Feb-2006 |
yamt | file aupcmciareg.h was added on branch yamt-uio_vmspace on 2006-03-01 09:27:59 +0000
|
| 1.1 | 23-Feb-2006 |
gdamore | branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22;
Initial commit of aupcmcia chip driver. It requires board specific logic
(coming in a the follow up commit for dbau1550 only), and is not yet complete.
It has serious problems, enough that it isn't yet usable, although the
functionality is all basically fleshed out. It is not enabled in any
default kernels at this point, so it should be benign. Hopefully the
bugs will soon be worked out and these caveats can be removed.
|
| 1.1.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.22.1 | 23-Feb-2006 |
rpaulo | file aupcmciavar.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.1.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.16.1 | 23-Feb-2006 |
yamt | file aupcmciavar.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.1.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.10.1 | 23-Feb-2006 |
simonb | file aupcmciavar.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.1.2.2 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 23-Feb-2006 |
yamt | file aupcmciavar.h was added on branch yamt-uio_vmspace on 2006-03-01 09:27:59 +0000
|
| 1.9 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.8 | 24-Apr-2021 |
thorpej | branches: 1.8.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.7 | 03-Jan-2012 |
kiyohara | branches: 1.7.62;
Use device_t instead of 'struct device *'.
Call aprint_* in auto-config time.
|
| 1.6 | 01-Jul-2011 |
dyoung | branches: 1.6.2; 1.6.6;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.5 | 02-Oct-2006 |
gdamore | Make PSC better able to support different protocols, as developed for SPI.
The main changes needed are:
1) pass address and IRQ information from aubus (auspi uses interrupts)
2) all Au1550 PSC protocols have the same status and register bits
for enable, so clean that up (clock registers could be different)
3) improve timeout logic on enable (a fixed delay isn't good enough)
4) make aupsc_print return QUIET, as it is annoying to see messages
for unconfigured protocols. This whole mechanism should be re-
engineered, to either use indirect configuration or provide more
detailed board-driven configuration. A comment to that effect is
placed in the source.
This is shown to work on DBAU1550.
|
| 1.4 | 06-Mar-2006 |
shige | branches: 1.4.6; 1.4.12; 1.4.16; 1.4.18; 1.4.20;
Change name of SMBus include: smbusreg.h => ausmbus_pscreg.h.
|
| 1.3 | 06-Mar-2006 |
simonb | Remove commented out "ausmbus" instance now that there's a fleshed out
instance above this.
|
| 1.2 | 06-Mar-2006 |
shige | Add enable/disable/suspend functions for AuXXXX PSC devices.
|
| 1.1 | 24-Feb-2006 |
shige | branches: 1.1.2; 1.1.4;
Add Au1XXX PSC(Programable Serial Controller) bus-type driver.
PSC supports four protocols (AC97, I2S, SPI, SMBus).
These protocol drivers will be configured on the bus.
|
| 1.1.4.1 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 24-Feb-2006 |
yamt | file aupsc.c was added on branch yamt-uio_vmspace on 2006-03-01 09:27:59 +0000
|
| 1.4.20.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.4.18.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.4.18.1 | 06-Mar-2006 |
rpaulo | file aupsc.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.4.16.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.4.12.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.12.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.12.1 | 06-Mar-2006 |
yamt | file aupsc.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.4.6.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.4.6.1 | 06-Mar-2006 |
simonb | file aupsc.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.6.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.6.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.7.62.2 | 22-Mar-2021 |
thorpej | Audit CFARG_IATTR in config_found() calls, and remove it in situations
where the interface attribute is not ambiguous.
|
| 1.7.62.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.8.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 02-Oct-2006 |
gdamore | Make PSC better able to support different protocols, as developed for SPI.
The main changes needed are:
1) pass address and IRQ information from aubus (auspi uses interrupts)
2) all Au1550 PSC protocols have the same status and register bits
for enable, so clean that up (clock registers could be different)
3) improve timeout logic on enable (a fixed delay isn't good enough)
4) make aupsc_print return QUIET, as it is annoying to see messages
for unconfigured protocols. This whole mechanism should be re-
engineered, to either use indirect configuration or provide more
detailed board-driven configuration. A comment to that effect is
placed in the source.
This is shown to work on DBAU1550.
|
| 1.2 | 06-Mar-2006 |
shige | branches: 1.2.6; 1.2.12; 1.2.16; 1.2.18; 1.2.20;
Add some definitions for register bits.
|
| 1.1 | 24-Feb-2006 |
shige | branches: 1.1.2; 1.1.4;
Add Au1XXX PSC(Programable Serial Controller) bus-type driver.
PSC supports four protocols (AC97, I2S, SPI, SMBus).
These protocol drivers will be configured on the bus.
|
| 1.1.4.1 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 24-Feb-2006 |
yamt | file aupscreg.h was added on branch yamt-uio_vmspace on 2006-03-01 09:27:59 +0000
|
| 1.2.20.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.2.18.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.18.1 | 06-Mar-2006 |
rpaulo | file aupscreg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.2.16.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.2.12.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.12.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.12.1 | 06-Mar-2006 |
yamt | file aupscreg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.2.6.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.6.1 | 06-Mar-2006 |
simonb | file aupscreg.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.4 | 03-Jan-2012 |
kiyohara | Use device_t instead of 'struct device *'.
Call aprint_* in auto-config time.
|
| 1.3 | 02-Oct-2006 |
gdamore | branches: 1.3.90; 1.3.94;
Make PSC better able to support different protocols, as developed for SPI.
The main changes needed are:
1) pass address and IRQ information from aubus (auspi uses interrupts)
2) all Au1550 PSC protocols have the same status and register bits
for enable, so clean that up (clock registers could be different)
3) improve timeout logic on enable (a fixed delay isn't good enough)
4) make aupsc_print return QUIET, as it is annoying to see messages
for unconfigured protocols. This whole mechanism should be re-
engineered, to either use indirect configuration or provide more
detailed board-driven configuration. A comment to that effect is
placed in the source.
This is shown to work on DBAU1550.
|
| 1.2 | 06-Mar-2006 |
shige | branches: 1.2.6; 1.2.12; 1.2.16; 1.2.18; 1.2.20;
Add enable/disable/suspend functions for AuXXXX PSC devices.
|
| 1.1 | 24-Feb-2006 |
shige | branches: 1.1.2; 1.1.4;
Add Au1XXX PSC(Programable Serial Controller) bus-type driver.
PSC supports four protocols (AC97, I2S, SPI, SMBus).
These protocol drivers will be configured on the bus.
|
| 1.1.4.1 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 24-Feb-2006 |
yamt | file aupscvar.h was added on branch yamt-uio_vmspace on 2006-03-01 09:27:59 +0000
|
| 1.2.20.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.2.18.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.18.1 | 06-Mar-2006 |
rpaulo | file aupscvar.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.2.16.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.2.12.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.12.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.12.1 | 06-Mar-2006 |
yamt | file aupscvar.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.2.6.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.6.1 | 06-Mar-2006 |
simonb | file aupscvar.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.3.94.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.3.90.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.16 | 07-Sep-2025 |
thorpej | Change todr_chip_handle::cookie -> todr_chip_handle::todr_dev, and
make it a device_t. Upcoming functional changes will require the
device_t associated with a TODR device.
Change todr_chip_handle::bus_cookie -> todr_chip_handle::todr_devaux.
Nothing was using the old field, but I decided to keep it around just
in cause something needs it in the future.
And with these largely mechanical yet semantically meaningful changes,
thus spake the Oracle: "Welcome to NetBSD 11.99.2."
|
| 1.15 | 07-Sep-2025 |
thorpej | Remove unnecessary NULL-initialization of TODR handle fields.
|
| 1.14 | 03-Jan-2012 |
kiyohara | Use device_t instead of 'struct device *'.
Call aprint_* in auto-config time.
|
| 1.13 | 01-Jul-2011 |
dyoung | branches: 1.13.2; 1.13.6;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.12 | 12-Dec-2009 |
tsutsui | Remove `volatile' qualifier from argument types of
struct timeval passed to todr_gettime(9) and todr_settime(9).
We no longer have an ancient and volatile struct timeval `time'
global since we have switched to MI timercounter(9) on all port.
XXX1: some of these RTC drivers still assume 32bit time_t
XXX2: some of these should be rewritten to use todr_[gs]ettime_ymdhms()
XXX3: todr(9) man page doesn't mention todr_[gs]ettime_ymdhms()
|
| 1.11 | 04-Sep-2006 |
gdamore | branches: 1.11.60;
Remove unused todr_setcal/todr_getcal and all the assorted stub
implementations.
|
| 1.10 | 28-Mar-2006 |
gdamore | Use todr_attach.
|
| 1.9 | 28-Mar-2006 |
gdamore | Rework evbmips clock architecture to use common clock_subr.h routines.
Additionally, do not fail if no RTC is present, as not all boards have one.
Malta now uses the common dev/ic/mc146818.c code as much as possible, reducing
local "custom" code. These malta changes are *untested*, as I do not have
a Malta board to test with. If someone would please test them and get back to
me, I'd appreciate it!
|
| 1.8 | 09-Mar-2006 |
gdamore | branches: 1.8.2;
Fix the RTC so that the AU1550 keeps accurate time. The RTC is taken from
the TOY register, which is presumed to be seconds since Jan. 1 2000.
For now I'm assuming the trim divider is 32K, which makes 1 tick per sec.
This is true for the DBAU1550 board at least. Other boards might need to
initialize a reasonable trim counter and establish the 32KHz oscillator.
In any case, this code is *no worse* on older systems than what was there
before.
|
| 1.7 | 11-Dec-2005 |
christos | branches: 1.7.4; 1.7.6; 1.7.8; 1.7.10;
merge ktrace-lwp.
|
| 1.6 | 15-Jul-2003 |
lukem | branches: 1.6.16;
__KERNEL_RCSID()
|
| 1.5 | 02-Oct-2002 |
thorpej | branches: 1.5.6;
Add trailing ; to CFATTACH_DECL.
|
| 1.4 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.3 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.2 | 27-Sep-2002 |
thorpej | Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver. The cfdriver is then looked
up in a list which is built at run-time.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.6.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file aurtc.c was added on branch kqueue on 2002-09-06 08:37:23 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file aurtc.c was added on branch gehenna-devsw on 2002-08-31 13:45:15 +0000
|
| 1.1.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 29-Jul-2002 |
nathanw | file aurtc.c was added on branch nathanw_sa on 2002-10-18 02:38:43 +0000
|
| 1.5.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.5.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.5.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.6.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.6.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.7.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.7.8.3 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.7.8.2 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.7.8.1 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.7.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.7.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.8.2.2 | 31-Mar-2006 |
tron | Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.
|
| 1.8.2.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.11.60.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.13.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.13.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.17 | 15-Sep-2025 |
thorpej | Encapsulate what's needed to attach an I2C bus into a iicbus_attach()
inline.
|
| 1.16 | 18-Jun-2022 |
andvar | fix typos in word "functions" in comments, mainly s/fuctions/functions/.
|
| 1.15 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.14 | 24-Apr-2021 |
thorpej | branches: 1.14.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.13 | 22-Dec-2019 |
thorpej | branches: 1.13.10;
Cleanup i2c bus acquire / release, centralizing all of the logic into
iic_acquire_bus() / iic_release_bus(). "acquire" and "release" hooks
no longer need to be provided by back-end controller drivers (only if
they need special handling, e.g. powering on the i2c controller).
This results in the removal of a bunch of rendundant code from each
back-end controller driver.
Assert that we are not in hard interrupt context in iic_acquire_bus(),
iic_exec(), and iic_release_bus().
|
| 1.12 | 14-Feb-2016 |
chs | branches: 1.12.18;
zero the i2c_attach_args structure before filling it in.
fixes occasional crashes in iic_attach().
|
| 1.11 | 03-Jan-2012 |
kiyohara | branches: 1.11.6; 1.11.24;
Use device_t instead of 'struct device *'.
Call aprint_* in auto-config time.
|
| 1.10 | 01-Jul-2011 |
dyoung | branches: 1.10.2; 1.10.6;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.9 | 20-Apr-2009 |
pgoyette | One more implementation of the quick_{read,write} I2C protocol. Note
that this is currently used only by the I2C_SCAN code (disabled by
default).
XXX Not tested due to lack of hardware. Reviewed by simon@ and shige@.
|
| 1.8 | 17-Oct-2007 |
garbled | branches: 1.8.20; 1.8.28; 1.8.34;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.7 | 14-Aug-2007 |
kiyohara | branches: 1.7.2;
Remove white-spaces.
|
| 1.6 | 26-Jun-2006 |
drochner | branches: 1.6.6; 1.6.16; 1.6.24; 1.6.30; 1.6.34;
use the "i2cbus" interface attribute rather than putting a string name
into the i2cbus attach args
|
| 1.5 | 25-Jun-2006 |
kiyohara | Supoort read/write word.
|
| 1.4 | 27-Mar-2006 |
shige | branches: 1.4.2; 1.4.6; 1.4.8;
Add waits after bus_space_write.
|
| 1.3 | 06-Mar-2006 |
shige | branches: 1.3.2; 1.3.4; 1.3.6;
Change name of SMBus include: smbusreg.h => ausmbus_pscreg.h.
|
| 1.2 | 06-Mar-2006 |
shige | Remove working-debug codes.
I apologize sincerely...
|
| 1.1 | 06-Mar-2006 |
shige | Add support for On-chip PSC SMBus protocol.
|
| 1.3.6.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.3.4.5 | 11-Aug-2006 |
yamt | sync with head
|
| 1.3.4.4 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.3.4.3 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.3.4.2 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.3.4.1 | 06-Mar-2006 |
yamt | file ausmbus_psc.c was added on branch yamt-pdpolicy on 2006-03-13 09:06:58 +0000
|
| 1.3.2.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.4.8.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.4.8.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.8.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.8.1 | 27-Mar-2006 |
yamt | file ausmbus_psc.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.4.6.1 | 13-Jul-2006 |
gdamore | Merge from HEAD.
|
| 1.4.2.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.4.2.1 | 27-Mar-2006 |
simonb | file ausmbus_psc.c was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.6.34.1 | 16-Aug-2007 |
jmcneill | Sync with HEAD.
|
| 1.6.30.1 | 15-Aug-2007 |
skrll | Sync with HEAD.
|
| 1.6.24.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.6.16.1 | 20-Aug-2007 |
ad | Sync with HEAD.
|
| 1.6.6.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.6.6.1 | 26-Jun-2006 |
rpaulo | file ausmbus_psc.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.7.2.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.8.34.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.8.28.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.8.20.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.10.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.10.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.11.24.1 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.11.6.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.12.18.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.13.10.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.14.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 02-Jun-2024 |
andvar | s/intterrupt/interrupt/ in comments.
|
| 1.1 | 06-Mar-2006 |
shige | branches: 1.1.4; 1.1.8; 1.1.14; 1.1.20;
Change name of SMBus include: smbusreg.h => ausmbus_pscreg.h.
|
| 1.1.20.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.20.1 | 06-Mar-2006 |
rpaulo | file ausmbus_pscreg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.1.14.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.14.1 | 06-Mar-2006 |
yamt | file ausmbus_pscreg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 06-Mar-2006 |
simonb | file ausmbus_pscreg.h was added on branch simonb-timecounters on 2006-04-22 11:37:41 +0000
|
| 1.1.4.2 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.1.4.1 | 06-Mar-2006 |
yamt | file ausmbus_pscreg.h was added on branch yamt-pdpolicy on 2006-03-13 09:06:58 +0000
|
| 1.12 | 10-Sep-2025 |
thorpej | Encapsulate what's needed to attach a SPI bus into a spibus_attach()
inline.
|
| 1.11 | 07-Aug-2021 |
thorpej | branches: 1.11.2;
Merge thorpej-cfargs2.
|
| 1.10 | 24-Apr-2021 |
thorpej | branches: 1.10.2; 1.10.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.9 | 13-Aug-2019 |
tnn | branches: 1.9.10;
ensure spibus_attach_args is zero'ed
|
| 1.8 | 04-Jan-2012 |
kiyohara | branches: 1.8.48;
Use device_t instead of 'struct device *'.
Remove unnecessary \n.
|
| 1.7 | 03-Jan-2012 |
kiyohara | Use device_t instead of 'struct device *'.
Call aprint_* in auto-config time.
|
| 1.6 | 10-Jul-2011 |
matt | branches: 1.6.2; 1.6.6;
Fix machine/ includes
|
| 1.5 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.4 | 08-Jun-2011 |
rmind | - Use IPL_BIO (instead of IPL_SERIAL) for SPI.
- Convert simple_lock/ltsleep to mutex/condvar.
|
| 1.3 | 28-Feb-2007 |
thorpej | branches: 1.3.66; 1.3.76;
TRUE -> true, FALSE -> false
|
| 1.2 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.1 | 02-Oct-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.8; 1.1.10;
Add Alchemy PSC SPI bus protocol driver. Not activated on any boards yet,
that requires an evbmips commit.
|
| 1.1.10.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.1.10.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.1.8.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.1.8.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.1.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 02-Oct-2006 |
yamt | file auspi.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.4.1 | 02-Oct-2006 |
ad | file auspi.c was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.1.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.1.2.1 | 02-Oct-2006 |
yamt | file auspi.c was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.3.76.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.3.66.1 | 12-Jun-2011 |
rmind | sync with head
|
| 1.6.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.6.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.8.48.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.9.10.2 | 02-Apr-2021 |
thorpej | config_found_ia() -> config_found() w/ CFARG_IATTR.
|
| 1.9.10.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.10.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.10.2.1 | 18-May-2021 |
thorpej | Pass the controller devhandle along to the "spi" instance.
|
| 1.11.2.1 | 09-Aug-2021 |
thorpej | Port over the changes from thorpej-i2c-spi-conf to thorpej-i2c-spi-conf2,
which is based on a newer HEAD revision.
|
| 1.1 | 02-Oct-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.8;
Add Alchemy PSC SPI bus protocol driver. Not activated on any boards yet,
that requires an evbmips commit.
|
| 1.1.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 02-Oct-2006 |
yamt | file auspireg.h was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.4.1 | 02-Oct-2006 |
ad | file auspireg.h was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.1.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.1.2.1 | 02-Oct-2006 |
yamt | file auspireg.h was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.1 | 02-Oct-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.8;
Add Alchemy PSC SPI bus protocol driver. Not activated on any boards yet,
that requires an evbmips commit.
|
| 1.1.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 02-Oct-2006 |
yamt | file auspivar.h was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.4.1 | 02-Oct-2006 |
ad | file auspivar.h was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.1.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.1.2.1 | 02-Oct-2006 |
yamt | file auspivar.h was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.9 | 11-Jan-2019 |
thorpej | Simplify regmap initialization, and fix an regmap issue that
affected TI OMAP (LCR register would get clobbered due to
using the wrong offset for the MDR1 register) reported by Lwazi Dube
(who also found the root cause).
|
| 1.8 | 08-Dec-2018 |
thorpej | Remove the COM_REGMAP option -- just use it all the time. While here,
garbage-collect the COM_FUNCMAP and COM_AU1X00 options, as there are
not used anywhere.
|
| 1.7 | 08-Dec-2018 |
thorpej | Clean up initialization of com_regs structure, in preparation for
some additional changers.
|
| 1.6 | 01-Jul-2011 |
dyoung | branches: 1.6.52; 1.6.54;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.5 | 14-Mar-2008 |
cube | Split device_t and softc for all com(4) devices (well, everything that
uses a com_softc backend). Use proper types and ansify where appropriate.
|
| 1.4 | 17-Oct-2007 |
garbled | branches: 1.4.12; 1.4.16;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.3 | 20-May-2007 |
he | branches: 1.3.10;
Now that curcpu() is defined in terms of curlwp() for mips, we need to
include <sys/lwp.h> where curcpu() is used.
|
| 1.2 | 13-Jul-2006 |
gdamore | branches: 1.2.4; 1.2.8; 1.2.14; 1.2.20; 1.2.22; 1.2.28;
Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.1 | 15-Jun-2006 |
gdamore | branches: 1.1.2;
file com_aubus.c was initially added on branch gdamore-uart.
|
| 1.1.2.4 | 17-Jun-2006 |
gdamore | Undo the undo. Restore COM_INIT_REGS handling.
|
| 1.1.2.3 | 17-Jun-2006 |
gdamore | Undo the change to use COM_INIT_REGS, and instead use backwards compat
support. For com_arbus and com_aubus, we have to set a new flag, COM_HW_REGMAP
to indicate that we have special mapping considerations so that com_attach_subr
doesn't clobber our register map.
|
| 1.1.2.2 | 16-Jun-2006 |
gdamore | Cleanup for KNF changes in comvar. While here, remove a redundant call
to bus_space_map.
|
| 1.1.2.1 | 15-Jun-2006 |
gdamore | Adapt to new com framework, converting aucom.c clone to use common com.c.
|
| 1.2.28.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.2.22.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.2.20.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.2.14.4 | 17-Mar-2008 |
yamt | sync with head.
|
| 1.2.14.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.2.14.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.14.1 | 13-Jul-2006 |
yamt | file com_aubus.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.2.8.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.8.1 | 13-Jul-2006 |
rpaulo | file com_aubus.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.2.4.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.2.4.1 | 13-Jul-2006 |
yamt | file com_aubus.c was added on branch yamt-pdpolicy on 2006-08-11 15:42:14 +0000
|
| 1.3.10.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.3.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.4.16.1 | 03-Apr-2008 |
mjf | Sync with HEAD.
|
| 1.4.12.1 | 24-Mar-2008 |
keiichi | sync with head.
|
| 1.6.54.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.6.52.2 | 18-Jan-2019 |
pgoyette | Synch with HEAD
|
| 1.6.52.1 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.2 | 13-Jul-2006 |
gdamore | branches: 1.2.4; 1.2.8; 1.2.14;
Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.1 | 15-Jun-2006 |
gdamore | branches: 1.1.2;
file com_aubus_reg.h was initially added on branch gdamore-uart.
|
| 1.1.2.1 | 15-Jun-2006 |
gdamore | Adapt to new com framework, converting aucom.c clone to use common com.c.
|
| 1.2.14.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.14.1 | 13-Jul-2006 |
yamt | file com_aubus_reg.h was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.2.8.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.8.1 | 13-Jul-2006 |
rpaulo | file com_aubus_reg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.2.4.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.2.4.1 | 13-Jul-2006 |
yamt | file com_aubus_reg.h was added on branch yamt-pdpolicy on 2006-08-11 15:42:14 +0000
|
| 1.54 | 15-Oct-2025 |
thorpej | Use ether_getaddr().
|
| 1.53 | 29-Jun-2024 |
riastradh | if_stats(9): Add ifp argument to if_stat..._ref.
This will enable us to pass the ifp through to a dtrace probe inside.
No functional change intended in this change, but this is an API
change visible to modules so it shouldn't be pulled up.
PR kern/58377
|
| 1.52 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.51 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.50 | 18-Sep-2022 |
thorpej | Eliminate use of IFF_OACTIVE.
|
| 1.49 | 29-Sep-2020 |
msaitoh | s/occurence/occurrence/
|
| 1.48 | 29-Jan-2020 |
thorpej | Adopt <net/if_stats.h>.
|
| 1.47 | 28-May-2019 |
msaitoh | branches: 1.47.4;
Use ETHER_LOCK()/ETHER_UNLOCK() for all ethernet drivers to protect ec_multi*.
|
| 1.46 | 23-May-2019 |
msaitoh | No functional change:
- Simplify MII structure initialization and reference.
- u_int*_t -> uint*_t.
- KNF
|
| 1.45 | 22-Jan-2019 |
msaitoh | Change MII PHY read/write API from:
int (*mii_readreg_t)(device_t, int, int);
void (*mii_writereg_t)(device_t, int, int, int);
to:
int (*mii_readreg_t)(device_t, int, int, uint16_t *);
int (*mii_writereg_t)(device_t, int, int, uint16_t);
Now we can test if a read/write operation failed or not by the return value.
In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.
Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:
arm/at91/at91emac.c
arm/ep93xx/epe.c
arm/omap/omapl1x_emac.c
mips/ralink/ralink_eth.c
arch/powerpc/booke/dev/pq3etsec.c(read)
dev/cadence/if_cemac.c <- hkenken
dev/ic/lan9118.c
Tested with the following device:
axe+ukphy
axe+rgephy
axen+rgephy (tested by Andrius V)
wm+atphy
wm+ukphy
wm+igphy
wm+ihphy
wm+makphy
sk+makphy
sk+brgphy
sk+gentbi
msk+makphy
sip+icsphy
sip+ukphy
re+rgephy
bge+brgphy
bnx+brgphy
gsip+gphyter
rtk+rlphy
fxp+inphy (tested by Andrius V)
tlp+acphy
ex+exphy
epic+qsphy
vge+ciphy (tested by Andrius V)
vr+ukphy (tested by Andrius V)
vte+ukphy (tested by Andrius V)
Not tested (MAC):
arm:at91emac
arm:cemac
arm:epe
arm:geminigmac
arm:enet
arm:cpsw
arm:emac(omac)
arm:emac(sunxi)
arm:npe
evbppc:temac
macppc:bm
macppc:gm
mips:aumac
mips:ae
mips:cnmac
mips:reth
mips:sbmac
playstation2:smap
powerpc:tsec
powerpc:emac(ibm4xx)
sgimips:mec
sparc:be
sf
ne(ax88190, dl10019)
awge
ep
gem
hme
smsh
mtd
sm
age
alc
ale
bce
cas
et
jme
lii
nfe
pcn
ste
stge
tl
xi
aue
mue
smsc
udav
url
Not tested (PHY):
amhphy
bmtphy
dmphy
etphy
glxtphy
ikphy
iophy
lxtphy
nsphyter
pnaphy
rdcphy
sqphy
tlphy
tqphy
urlphy
|
| 1.44 | 26-Jun-2018 |
msaitoh | branches: 1.44.2;
Implement the BPF direction filter (BIOC[GS]DIRECTION). It provides backward
compatibility with BIOC[GS]SEESENT ioctl. The userland interface is the same
as FreeBSD.
This change also fixes a bug that the direction is misunderstand on some
environment by passing the direction to bpf_mtap*() instead of checking
m->m_pkthdr.rcvif.
|
| 1.43 | 15-Dec-2016 |
ozaki-r | branches: 1.43.14;
Move bpf_mtap and if_ipackets++ on Rx of each driver to percpuq if_input
The benefits of the change are:
- We can reduce codes
- We can provide the same behavior between drivers
- Where/When if_ipackets is counted up
- Note that some drivers still update packet statistics in their own
way (periodical update)
- Moved bpf_mtap run in softint
- This makes it easy to MP-ify bpf
Proposed on tech-kern and tech-net
|
| 1.42 | 08-Dec-2016 |
ozaki-r | Apply deferred if_start framework
if_schedule_deferred_start checks if the if_snd queue contains packets,
so drivers don't need to check it by themselves.
|
| 1.41 | 10-Jun-2016 |
ozaki-r | branches: 1.41.2;
Introduce m_set_rcvif and m_reset_rcvif
The API is used to set (or reset) a received interface of a mbuf.
They are counterpart of m_get_rcvif, which will come in another
commit, hide internal of rcvif operation, and reduce the diff of
the upcoming change.
No functional change.
|
| 1.40 | 09-Feb-2016 |
ozaki-r | Introduce softint-based if_input
This change intends to run the whole network stack in softint context
(or normal LWP), not hardware interrupt context. Note that the work is
still incomplete by this change; to that end, we also have to softint-ify
if_link_state_change (and bpf) which can still run in hardware interrupt.
This change softint-ifies at ifp->if_input that is called from
each device driver (and ieee80211_input) to ensure Layer 2 runs
in softint (e.g., ether_input and bridge_input). To this end,
we provide a framework (called percpuq) that utlizes softint(9)
and percpu ifqueues. With this patch, rxintr of most drivers just
queues received packets and schedules a softint, and the softint
dequeues packets and does rest packet processing.
To minimize changes to each driver, percpuq is allocated in struct
ifnet for now and that is initialized by default (in if_attach).
We probably have to move percpuq to softc of each driver, but it's
future work. At this point, only wm(4) has percpuq in its softc
as a reference implementation.
Additional information including performance numbers can be found
in the thread at tech-kern@ and tech-net@:
http://mail-index.netbsd.org/tech-kern/2016/01/14/msg019997.html
Acknowledgment: riastradh@ greatly helped this work.
Thank you very much!
|
| 1.39 | 13-Apr-2015 |
riastradh | MD rnd.h cleanups. Please let me know if I broke anything!
|
| 1.38 | 10-Aug-2014 |
tls | branches: 1.38.4;
Merge tls-earlyentropy branch into HEAD.
|
| 1.37 | 22-Jul-2012 |
matt | branches: 1.37.2; 1.37.12;
Fix mii_statchg to take a 'struct ifnet *' instead of device_t. This fixes
problem with a common MDIO bus used for multiple interfaces.
Some drivers converted to CFATTACL_DECL_NEW.
|
| 1.36 | 07-Jun-2012 |
kiyohara | Fix can't assign IPv6 address. Valiable error resets to 0, if error == ENETRESET in aumac_ioctl().
|
| 1.35 | 19-May-2012 |
kiyohara | Enable interrupt in aumac_init(). And disable in aumac_stop()/aumac_attach().
Interrupt storm happen if received packet and DMA not set.
|
| 1.34 | 02-Feb-2012 |
tls | Entropy-pool implementation move and cleanup.
1) Move core entropy-pool code and source/sink/sample management code
to sys/kern from sys/dev.
2) Remove use of NRND as test for presence of entropy-pool code throughout
source tree.
3) Remove use of RND_ENABLED in device drivers as microoptimization to
avoid expensive operations on disabled entropy sources; make the
rnd_add calls do this directly so all callers benefit.
4) Fix bug in recent rnd_add_data()/rnd_add_uint32() changes that might
have lead to slight entropy overestimation for some sources.
5) Add new source types for environmental sensors, power sensors, VM
system events, and skew between clocks, with a sample implementation
for each.
ok releng to go in before the branch due to the difficulty of later
pullup (widespread #ifdef removal and moved files). Tested with release
builds on amd64 and evbarm and live testing on amd64.
|
| 1.33 | 03-Jan-2012 |
kiyohara | Use device_t instead of 'struct device *'.
Call aprint_* in auto-config time.
|
| 1.32 | 19-Nov-2011 |
tls | branches: 1.32.2;
First step of random number subsystem rework described in
<20111022023242.BA26F14A158@mail.netbsd.org>. This change includes
the following:
An initial cleanup and minor reorganization of the entropy pool
code in sys/dev/rnd.c and sys/dev/rndpool.c. Several bugs are
fixed. Some effort is made to accumulate entropy more quickly at
boot time.
A generic interface, "rndsink", is added, for stream generators to
request that they be re-keyed with good quality entropy from the pool
as soon as it is available.
The arc4random()/arc4randbytes() implementation in libkern is
adjusted to use the rndsink interface for rekeying, which helps
address the problem of low-quality keys at boot time.
An implementation of the FIPS 140-2 statistical tests for random
number generator quality is provided (libkern/rngtest.c). This
is based on Greg Rose's implementation from Qualcomm.
A new random stream generator, nist_ctr_drbg, is provided. It is
based on an implementation of the NIST SP800-90 CTR_DRBG by
Henric Jungheim. This generator users AES in a modified counter
mode to generate a backtracking-resistant random stream.
An abstraction layer, "cprng", is provided for in-kernel consumers
of randomness. The arc4random/arc4randbytes API is deprecated for
in-kernel use. It is replaced by "cprng_strong". The current
cprng_fast implementation wraps the existing arc4random
implementation. The current cprng_strong implementation wraps the
new CTR_DRBG implementation. Both interfaces are rekeyed from
the entropy pool automatically at intervals justifiable from best
current cryptographic practice.
In some quick tests, cprng_fast() is about the same speed as
the old arc4randbytes(), and cprng_strong() is about 20% faster
than rnd_extract_data(). Performance is expected to improve.
The AES code in src/crypto/rijndael is no longer an optional
kernel component, as it is required by cprng_strong, which is
not an optional kernel component.
The entropy pool output is subjected to the rngtest tests at
startup time; if it fails, the system will reboot. There is
approximately a 3/10000 chance of a false positive from these
tests. Entropy pool _input_ from hardware random numbers is
subjected to the rngtest tests at attach time, as well as the
FIPS continuous-output test, to detect bad or stuck hardware
RNGs; if any are detected, they are detached, but the system
continues to run.
A problem with rndctl(8) is fixed -- datastructures with
pointers in arrays are no longer passed to userspace (this
was not a security problem, but rather a major issue for
compat32). A new kernel will require a new rndctl.
The sysctl kern.arandom() and kern.urandom() nodes are hooked
up to the new generators, but the /dev/*random pseudodevices
are not, yet.
Manual pages for the new kernel interfaces are forthcoming.
|
| 1.31 | 10-Jul-2011 |
matt | branches: 1.31.2;
Fix machine/ includes
|
| 1.30 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.29 | 12-Nov-2010 |
uebayasi | Pull in uvm/uvm.h for VM_PAGE_TO_PHYS().
|
| 1.28 | 05-Apr-2010 |
joerg | Push the bpf_ops usage back into bpf.h. Push the common ifp->if_bpf
check into the inline functions as well the fourth argument for
bpf_attach.
|
| 1.27 | 22-Jan-2010 |
martin | branches: 1.27.2; 1.27.4;
Unify the name of the device property to hold a MAC address - there was
no clear majority for either "mac-addr" vs. "mac-address", but a quick
gallup poll among developers selected the latter.
|
| 1.26 | 19-Jan-2010 |
pooka | Redefine bpf linkage through an always present op vector, i.e.
#if NBPFILTER is no longer required in the client. This change
doesn't yet add support for loading bpf as a module, since drivers
can register before bpf is attached. However, callers of bpf can
now be modularized.
Dynamically loadable bpf could probably be done fairly easily with
coordination from the stub driver and the real driver by registering
attachments in the stub before the real driver is loaded and doing
a handoff. ... and I'm not going to ponder the depths of unload
here.
Tested with i386/MONOLITHIC, modified MONOLITHIC without bpf and rump.
|
| 1.25 | 20-Jan-2008 |
dogcow | branches: 1.25.10;
kill unused variable
|
| 1.24 | 19-Jan-2008 |
dyoung | Make many ethernet drivers share the common code for MII media
handling, ether_mediastatus() and ether_mediachange(). Check for
a non-ENXIO error return from mii_mediachg(). (ENXIO indicates
that a PHY is suspended.)
This patch shrinks the source code size by 979 lines. There was
a 5100-byte savings on the NetBSD/i386 kernel configuration, ALL.
I have made a few miscellaneous changes, too:
gem(4): use LIST_EMPTY(), LIST_FOREACH().
mtd(4): handle media ioctls, for a change!
axe(4): do not track link status in sc->axe_link any longer
nfe(4), aue(4), axe(4), udav(4), url(4): do not reset all PHYs
on a change of media
Except for the change to mtd(4), no functional changes are intended.
XXX This patch affects more architectures than I can feasibly
XXX compile and run. I have compiled macppc, sparc64, i386. I
XXX have run the patches on i386 boxen with bnx(4) and sip(4).
XXX Compiling and running on evbmips (MERAKI, ADM5120) is in
XXX progress.
|
| 1.23 | 17-Oct-2007 |
garbled | branches: 1.23.2; 1.23.8;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.22 | 26-Aug-2007 |
dyoung | branches: 1.22.2;
Constify.
|
| 1.21 | 09-Jul-2007 |
ad | branches: 1.21.4; 1.21.8;
Merge some of the less invasive changes from the vmlocking branch:
- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements
|
| 1.20 | 06-Mar-2007 |
simonb | branches: 1.20.2; 1.20.4; 1.20.10;
Fix some caddr_t rototill fallout.
|
| 1.19 | 04-Mar-2007 |
christos | Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.18 | 20-Sep-2006 |
gdamore | branches: 1.18.4;
Get rid of annoying and useless missed frame message, no other driver
echos this "non-error" message (not even tulip.c). Included is an
explanatory message stating that these counters should probably all be
converted to evcnt counters.
|
| 1.17 | 05-May-2006 |
thorpej | branches: 1.17.8; 1.17.10;
Remove the devprop API and switch everthing over to the new proplib. Add
a new device_properties() accessor for device_t that returns the device's
property dictionary.
|
| 1.16 | 03-Mar-2006 |
simonb | branches: 1.16.2; 1.16.4; 1.16.6;
Oops, missed the call to rnd_attach_source() in previous.
|
| 1.15 | 03-Mar-2006 |
simonb | Contribute to the random pool. No measurable difference to network
speeds when measured with nttcp.
|
| 1.14 | 18-Feb-2006 |
thorpej | - Don't expose dev_propdb directly -- provide devprop_*() wrappers instead.
- Rework the ARMADILLO / epe device properties interaction so that it actually
associates the MAC address property with the epe device instance.
|
| 1.13 | 08-Dec-2005 |
yamt | branches: 1.13.2; 1.13.4; 1.13.6;
use VM_PAGE_TO_PHYS macro.
|
| 1.12 | 30-Oct-2004 |
thorpej | branches: 1.12.12;
When adding/deleting multicast addresses, only whack the address
filter if the interface is marked RUNNING.
Fixes kern/27678.
|
| 1.11 | 04-Jul-2003 |
thorpej | branches: 1.11.4;
Nuke the "alchemy_info" stuff, and just use the dev_propdb to set
the mac-addr property for the Au1x00 on-chip MACs.
|
| 1.10 | 27-Mar-2003 |
simonb | branches: 1.10.2;
Use "rxintr" for the name of the receive interrupts evcnt instead
of "txintr". Much less confusing that way...
|
| 1.9 | 17-Jan-2003 |
simonb | Zero out the TX buffer when padding packet to ETHER_MIN_LEN-ETHER_CRC_LEN.
|
| 1.8 | 16-Jan-2003 |
simonb | Tidy up event counter increments a little.
|
| 1.7 | 16-Jan-2003 |
simonb | Removed unused register map; this info is now passed in with the attach
args.
|
| 1.6 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.5 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.4 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.3 | 27-Sep-2002 |
thorpej | Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver. The cfdriver is then looked
up in a list which is built at run-time.
|
| 1.2 | 29-Jul-2002 |
simonb | branches: 1.2.2; 1.2.4; 1.2.6;
Remove some debug code accidently left in.
|
| 1.1 | 29-Jul-2002 |
simonb | Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.2.6.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.2.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.2.6.1 | 29-Jul-2002 |
jdolecek | file if_aumac.c was added on branch kqueue on 2002-09-06 08:37:24 +0000
|
| 1.2.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.4.1 | 29-Jul-2002 |
gehenna | file if_aumac.c was added on branch gehenna-devsw on 2002-08-31 13:45:15 +0000
|
| 1.2.2.3 | 17-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.2.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.1 | 29-Jul-2002 |
nathanw | file if_aumac.c was added on branch nathanw_sa on 2002-10-18 02:38:43 +0000
|
| 1.10.2.5 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.10.2.4 | 02-Nov-2004 |
skrll | Sync with HEAD.
|
| 1.10.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.10.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.10.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.11.4.1 | 24-Jan-2005 |
he | Pull up revision 1.12 (requested by thorpej in ticket #939):
When adding or deleting multicast addresses, only change
the address filter if the interface is marked RUNNING.
Fixes PR#27678.
|
| 1.12.12.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.12.12.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.12.12.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.12.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.13.6.2 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.13.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.13.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.13.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.16.6.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.16.4.1 | 11-May-2006 |
elad | sync with head
|
| 1.16.2.1 | 24-May-2006 |
yamt | sync with head.
|
| 1.17.10.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.17.8.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.18.4.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.20.10.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.20.4.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.20.2.2 | 09-Oct-2007 |
ad | Sync with head.
|
| 1.20.2.1 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.21.8.1 | 03-Sep-2007 |
jmcneill | Sync with HEAD.
|
| 1.21.4.1 | 03-Sep-2007 |
skrll | Sync with HEAD.
|
| 1.22.2.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.22.2.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.23.8.1 | 20-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.23.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.25.10.2 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.25.10.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.27.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.27.4.1 | 30-May-2010 |
rmind | sync with head
|
| 1.27.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.31.2.3 | 30-Oct-2012 |
yamt | sync with head
|
| 1.31.2.2 | 23-May-2012 |
yamt | sync with head.
|
| 1.31.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.32.2.2 | 02-Jun-2012 |
mrg | sync to latest -current.
|
| 1.32.2.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.37.12.1 | 07-Apr-2014 |
tls | Be a little more clear and consistent about harvesting entropy from devices:
1) deprecate RND_FLAG_NO_ESTIMATE
2) define RND_FLAG_COLLECT_TIME, RND_FLAG_COLLECT_VALUE
3) define RND_FLAG_ESTIMATE_TIME, RND_FLAG_ESTIMATE_VALUE
4) define RND_FLAG_DEFAULT: RND_FLAG_COLLECT_TIME|
RND_FLAG_COLLECT_VALUE|RND_FLAG_ESTIMATE_TIME
5) Make entropy harvesting from environmental sensors a little more generic
and remove it from individual sensor drivers.
6) Remove individual open-coded delta-estimators for values from a few
places in the tree (uvm, environmental drivers).
7) 0 -> RND_FLAG_DEFAULT, actually gather entropy from various drivers
that had stubbed out code, other minor cleanups.
|
| 1.37.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.37.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.38.4.4 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.38.4.3 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.38.4.2 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.38.4.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.41.2.1 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.43.14.2 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.43.14.1 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.44.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.44.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.47.4.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file if_aumacreg.h was added on branch kqueue on 2002-09-06 08:37:24 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file if_aumacreg.h was added on branch gehenna-devsw on 2002-08-31 13:45:15 +0000
|
| 1.1.2.2 | 29-Jul-2002 |
simonb | Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.2.1 | 29-Jul-2002 |
simonb | file if_aumacreg.h was added on branch nathanw_sa on 2002-07-29 15:39:15 +0000
|
| 1.7 | 18-Oct-2003 |
simonb | Remove unused ohci stub.
|
| 1.6 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.5 | 02-Oct-2002 |
thorpej | branches: 1.5.6;
Add trailing ; to CFATTACH_DECL.
|
| 1.4 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.3 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.2 | 27-Sep-2002 |
thorpej | Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver. The cfdriver is then looked
up in a list which is built at run-time.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.6.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file ohci.c was added on branch kqueue on 2002-09-06 08:37:24 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file ohci.c was added on branch gehenna-devsw on 2002-08-31 13:45:15 +0000
|
| 1.1.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 29-Jul-2002 |
nathanw | file ohci.c was added on branch nathanw_sa on 2002-10-18 02:38:43 +0000
|
| 1.5.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.18 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.17 | 24-Apr-2021 |
thorpej | branches: 1.17.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.16 | 23-Apr-2016 |
skrll | branches: 1.16.32;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.15 | 01-Jul-2011 |
dyoung | branches: 1.15.12; 1.15.28; 1.15.30; 1.15.34;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.14 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.13 | 03-Apr-2008 |
drochner | branches: 1.13.2; 1.13.4;
minor fixes for device/softc split, approved by dogcow
(not tested on real hardware yet)
|
| 1.12 | 31-Mar-2008 |
dogcow | ...and fix my fix to do the proper device_t split.
|
| 1.11 | 31-Mar-2008 |
dogcow | fix device_t split fallout.
|
| 1.10 | 09-Feb-2006 |
gdamore | branches: 1.10.68;
Split out peripheral register defines from aureg.h. As discussed with
simonb@.
|
| 1.9 | 08-Feb-2006 |
gdamore | Remove pointless (unused) dependency upon pb1000 evbmips headers.
|
| 1.8 | 20-Dec-2005 |
tron | branches: 1.8.2; 1.8.4; 1.8.6;
Add basic support for Alchemy Au1550 processor (CPU and devices).
Patch contributed by Garrett D'Amore in PR port-evbmips/32030.
|
| 1.7 | 19-Dec-2005 |
tron | Make OHCI work on Au1500 systems running in big-endian mode.
Patch contributed by Garrett D'Amore in PR port-evbmips/31912.
|
| 1.6 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.5 | 23-Oct-2003 |
simonb | branches: 1.5.16;
Remove "struct aubus_ohci_softc". As well as ohci_softc_t, it only had
a copy of the interrupt cookie which isn't used outside the attach. We
has also bogusly only told the autoconfiguration machinery that our softc
was as big as a ohci_softc_t, not a struct aubus_ohci_softc.
Also, disestablish the interrupt if OHCI initialisation fails.
|
| 1.4 | 18-Oct-2003 |
simonb | Tell the Alchemy Au1x00 on-chip ohci that we're in big-endian mode if
necessary.
|
| 1.3 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.2 | 03-Apr-2003 |
hpeyerl | branches: 1.2.2;
Read USBH_ENABLE twice in succession according to Errata 7 for au1500.
|
| 1.1 | 01-Apr-2003 |
hpeyerl | OHCI front-end driver for Alchemy cpu's. We now have USB Host support.
Tested on PB1500 and DB1500 boards.
|
| 1.2.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.8.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.8.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.8.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.10.68.2 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.10.68.1 | 03-Apr-2008 |
mjf | Sync with HEAD.
|
| 1.13.4.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.13.2.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.15.34.1 | 06-Sep-2016 |
skrll | First pass at netbsd-7 updated with USB code from HEAD
|
| 1.15.30.4 | 05-Dec-2014 |
skrll | Use int for return type for [eou]chi_init and motg_init.
|
| 1.15.30.3 | 05-Dec-2014 |
skrll | KNF. Remove ( ) from return statements.
|
| 1.15.30.2 | 03-Dec-2014 |
skrll | The grand renaming of structure members.
No functional change.
|
| 1.15.30.1 | 03-Dec-2014 |
skrll | Trailing whitespace.
|
| 1.15.28.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.15.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.16.32.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.17.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 09-Feb-2006 |
gdamore | branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22;
Split out peripheral register defines from aureg.h. As discussed with
simonb@.
|
| 1.1.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.22.1 | 09-Feb-2006 |
rpaulo | file ohcireg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:14 +0000
|
| 1.1.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.16.1 | 09-Feb-2006 |
yamt | file ohcireg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.1.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.10.1 | 09-Feb-2006 |
simonb | file ohcireg.h was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 09-Feb-2006 |
yamt | file ohcireg.h was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.2 | 07-Mar-2006 |
shige | Change name of SMBus include: smbusreg.h => ausmbus_pscreg.h.
|
| 1.1 | 06-Mar-2006 |
shige | Add register definitions for AuXXXX SMBus protocol.
|
| 1.1 | 09-Feb-2006 |
gdamore | branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22;
Split out peripheral register defines from aureg.h. As discussed with
simonb@.
|
| 1.1.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.22.1 | 09-Feb-2006 |
rpaulo | file usbdreg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:15 +0000
|
| 1.1.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.16.1 | 09-Feb-2006 |
yamt | file usbdreg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:28 +0000
|
| 1.1.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.10.1 | 09-Feb-2006 |
simonb | file usbdreg.h was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 09-Feb-2006 |
yamt | file usbdreg.h was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.1 | 16-Feb-2006 |
gdamore | branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22;
Reenable PCI on DBAU1500. May still be useful for PIO devices. Comments
in the config are left intact, though.
Add a PMAP-driven bus_space for access to upper memory, instead of using
wired entries.
Convert aupci to use said bus_space -- no measured performance impact.
|
| 1.1.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.22.1 | 16-Feb-2006 |
rpaulo | file au_himem_space.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.1.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.16.1 | 16-Feb-2006 |
yamt | file au_himem_space.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.1.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.10.1 | 16-Feb-2006 |
simonb | file au_himem_space.h was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 16-Feb-2006 |
yamt | file au_himem_space.h was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.1 | 06-Feb-2006 |
gdamore | branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22;
Add a bus_space that makes use of wired TLB entries, as required for PCI,
PCMCIA, and perhaps other devices on Alchemy parts.
Closes PR port-evbmips/32298
Reviewed as part of PCI changes by matt@, izumi@, and probably also simonb@.
This implementation has been tested seperately with my PCI code. This commit
does not add the necessary changes to configuration files to include this in
current configurations yet, as I intend to add that when I add the
multi-platform configuration support for evbmips/alchemy (which will be
required for PCI anyway.)
|
| 1.1.22.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.22.1 | 06-Feb-2006 |
rpaulo | file au_wired_space.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.1.16.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.16.1 | 06-Feb-2006 |
yamt | file au_wired_space.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.1.10.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.10.1 | 06-Feb-2006 |
simonb | file au_wired_space.h was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.2.2 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 06-Feb-2006 |
yamt | file au_wired_space.h was added on branch yamt-uio_vmspace on 2006-02-18 15:38:41 +0000
|
| 1.5 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.4 | 13-Jul-2006 |
gdamore | Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.3 | 01-Apr-2003 |
hpeyerl | branches: 1.3.18; 1.3.32; 1.3.36; 1.3.44;
allocate an aubus dma tag.
|
| 1.2 | 22-Mar-2003 |
simonb | Fix a grammatical nit.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file aubusvar.h was added on branch kqueue on 2002-09-06 08:37:25 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file aubusvar.h was added on branch gehenna-devsw on 2002-08-31 13:45:16 +0000
|
| 1.1.2.2 | 29-Jul-2002 |
simonb | Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.2.1 | 29-Jul-2002 |
simonb | file aubusvar.h was added on branch nathanw_sa on 2002-07-29 15:39:16 +0000
|
| 1.3.44.1 | 15-Jun-2006 |
gdamore | Adapt to new com framework, converting aucom.c clone to use common com.c.
|
| 1.3.36.1 | 11-Aug-2006 |
yamt | sync with head
|
| 1.3.32.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.18.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.20 | 08-Apr-2022 |
andvar | fix various typos, mainly in comments, but also log messages, docs, game text.
|
| 1.19 | 17-Aug-2021 |
andvar | fix multiplei repetitive typos in comments, messages and documentation. mainly because copy paste code big amount of files are affected.
|
| 1.18 | 02-Oct-2006 |
gdamore | Add register values required to configure PSC/SPI devices on Alchemy AU1550.
Fairly soon I will be committing a new SPI bus framwork and an Alchemy
Au1550 implementation of the framework.
|
| 1.17 | 10-Apr-2006 |
simonb | branches: 1.17.8; 1.17.10;
Fix some comment grammar nits.
|
| 1.16 | 25-Mar-2006 |
gdamore | Ooops, forgot to commit some register renames. (Minor cleanups.)
|
| 1.15 | 01-Mar-2006 |
shige | branches: 1.15.2; 1.15.4; 1.15.6;
Fix base-address for PSC devices.
|
| 1.14 | 24-Feb-2006 |
shige | Add Au1XXX PSC(Programable Serial Controller) bus-type driver.
PSC supports four protocols (AC97, I2S, SPI, SMBus).
These protocol drivers will be configured on the bus.
|
| 1.13 | 20-Feb-2006 |
gdamore | Add missing GPIO_BASE, plus clean up PCMCIA_BASE and add STATIC_BUS_BASE.
Fixes build error noted by martin@
|
| 1.12 | 10-Feb-2006 |
gdamore | Reduce address space used by PCI.
Add definitions for PCMCIA addresses.
|
| 1.11 | 09-Feb-2006 |
gdamore | Split out peripheral register defines from aureg.h. As discussed with
simonb@.
|
| 1.10 | 09-Feb-2006 |
gdamore | Remove if_aumac register defs, which were generally #ifdef'd out anyway.
|
| 1.9 | 09-Feb-2006 |
gdamore | Remove not-useful UART references from aureg.h, duplicates consolidated into
aucomreg.h. First part of aureg.h cleanup requested by simonb@.
|
| 1.8 | 09-Feb-2006 |
gdamore | Add Au1550 PCI support (Au1500 not yet, coming shortly).
Closes PR port-evbmips/32087.
Reviewed by simonb@ (Also, earlier, matt@, and tsutsui@.)
|
| 1.7 | 20-Dec-2005 |
tron | branches: 1.7.2; 1.7.4; 1.7.6;
Add basic support for Alchemy Au1550 processor (CPU and devices).
Patch contributed by Garrett D'Amore in PR port-evbmips/32030.
|
| 1.6 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.5 | 11-Nov-2004 |
soren | branches: 1.5.12;
Add USB device controller register names.
|
| 1.4 | 08-Nov-2003 |
simonb | Add a define for the size of the UART register block.
|
| 1.3 | 01-Apr-2003 |
hpeyerl | branches: 1.3.2;
add defines for Alchemy clock and frequency control registers.
|
| 1.2 | 17-Nov-2002 |
simonb | Fix typo in the address of the Au1500 MAC1 enable register; 2nd MAC works
on the Au1500 cpu now.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file aureg.h was added on branch kqueue on 2002-09-06 08:37:26 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file aureg.h was added on branch gehenna-devsw on 2002-08-31 13:45:16 +0000
|
| 1.1.2.2 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.1.2.1 | 29-Jul-2002 |
thorpej | file aureg.h was added on branch nathanw_sa on 2002-12-11 06:10:56 +0000
|
| 1.3.2.4 | 14-Nov-2004 |
skrll | Sync with HEAD.
|
| 1.3.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.3.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.3.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.12.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.5.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.7.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.7.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.7.2.2 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.7.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.15.6.2 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.15.6.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.15.4.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.15.2.2 | 11-Apr-2006 |
yamt | sync with head
|
| 1.15.2.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.17.10.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.17.8.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.12 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.11 | 10-Jul-2011 |
matt | branches: 1.11.12; 1.11.30;
Fix machine/ includes
|
| 1.10 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.9 | 21-Feb-2007 |
thorpej | branches: 1.9.64; 1.9.68; 1.9.74; 1.9.76;
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.8 | 16-Feb-2006 |
gdamore | branches: 1.8.20;
Reenable PCI on DBAU1500. May still be useful for PIO devices. Comments
in the config are left intact, though.
Add a PMAP-driven bus_space for access to upper memory, instead of using
wired entries.
Convert aupci to use said bus_space -- no measured performance impact.
|
| 1.7 | 10-Feb-2006 |
gdamore | Reduce address space used by PCI.
Add definitions for PCMCIA addresses.
|
| 1.6 | 10-Feb-2006 |
gdamore | Add au_intr_enable() and au_intr_disable() API to allow for split interrupts
(e.g. PCMCIA leaves GPIO interrupt masked and reenables them soft interrupt.)
Add checks for masked interrupts before calling the handler.
When removing last interrupt handler, mask off interrupts completely using
MASK_CLEAR and WAKEUP_CLEAR. Tested on dbau1500.
|
| 1.5 | 09-Feb-2006 |
gdamore | Add Au1550 PCI support (Au1500 not yet, coming shortly).
Closes PR port-evbmips/32087.
Reviewed by simonb@ (Also, earlier, matt@, and tsutsui@.)
|
| 1.4 | 06-Feb-2006 |
gdamore | Fix up incorrect ICU reporting, add processor specific switch tables for
IRQ routing and such.
Closes PR port-evbmips/31992.
Reviewed by simonb@, matt@, and izumi@
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.2; 1.3.4; 1.3.6;
merge ktrace-lwp.
|
| 1.2 | 04-Jul-2003 |
thorpej | branches: 1.2.16;
Nuke the "alchemy_info" stuff, and just use the dev_propdb to set
the mac-addr property for the Au1x00 on-chip MACs.
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.12;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.12.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.12.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.12.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file auvar.h was added on branch kqueue on 2002-09-06 08:37:26 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file auvar.h was added on branch gehenna-devsw on 2002-08-31 13:45:17 +0000
|
| 1.1.2.2 | 29-Jul-2002 |
simonb | Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.2.1 | 29-Jul-2002 |
simonb | file auvar.h was added on branch nathanw_sa on 2002-07-29 15:39:16 +0000
|
| 1.2.16.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.2.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.3.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.3.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.8.20.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.9.76.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.9.74.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.9.68.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.9.64.1 | 15-Feb-2010 |
matt | Adapt to the new interrupt framework for NetBSD/mips.
|
| 1.11.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.11.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10 | 03-Oct-2025 |
thorpej | Use device_setprop_data().
|
| 1.9 | 27-Oct-2012 |
chs | split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.8 | 07-Jul-2011 |
matt | branches: 1.8.2; 1.8.12;
Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.7 | 15-Dec-2010 |
matt | make this compile again.
|
| 1.6 | 22-Jan-2010 |
martin | branches: 1.6.4;
Unify the name of the device property to hold a MAC address - there was
no clear majority for either "mac-addr" vs. "mac-address", but a quick
gallup poll among developers selected the latter.
|
| 1.5 | 23-Jan-2008 |
dyoung | branches: 1.5.10;
Make these compile again by #including <prop/problib.h>.
|
| 1.4 | 28-Feb-2007 |
thorpej | branches: 1.4.20; 1.4.26; 1.4.32;
TRUE -> true, FALSE -> false
|
| 1.3 | 26-Sep-2006 |
gdamore | branches: 1.3.4; 1.3.6;
Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.2 | 04-Sep-2006 |
gdamore | branches: 1.2.2; 1.2.4; 1.2.6;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.1 | 28-Aug-2006 |
gdamore | branches: 1.1.2;
First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.1.2.3 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 28-Aug-2006 |
yamt | file ar5312.c was added on branch yamt-pdpolicy on 2006-09-03 15:23:21 +0000
|
| 1.2.6.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.2.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.4.1 | 04-Sep-2006 |
rpaulo | file ar5312.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.2.2.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.3.6.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.3.4.4 | 04-Feb-2008 |
yamt | sync with head.
|
| 1.3.4.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.3.4.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.4.1 | 26-Sep-2006 |
yamt | file ar5312.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.4.32.1 | 23-Jan-2008 |
bouyer | Sync with HEAD.
|
| 1.4.26.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.4.20.1 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.5.10.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.6.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.8.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.8.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.5 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.4 | 07-Jul-2011 |
matt | branches: 1.4.12; 1.4.30;
Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 06-Jul-2009 |
alc | Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.1 | 26-Sep-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.8; 1.1.62; 1.1.72; 1.1.80;
Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.1.80.1 | 21-Apr-2010 |
matt | sync with netbsd-5
|
| 1.1.72.1 | 07-Aug-2009 |
snj | Pull up following revision(s) (requested by jmcneill in ticket #775):
sys/arch/mips/atheros/ar5312_board.c: revision 1.2
sys/arch/mips/atheros/ar5315.c: revision 1.6
sys/arch/mips/atheros/ar5315_board.c: revision 1.2
sys/arch/mips/atheros/dev/if_ath_arbus.c: revision 1.16
sys/arch/mips/atheros/include/ar5312reg.h: revision 1.3
Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.1.62.1 | 18-Jul-2009 |
yamt | sync with head.
|
| 1.1.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 26-Sep-2006 |
yamt | file ar5312_board.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.4.1 | 26-Sep-2006 |
ad | file ar5312_board.c was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.1.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.1.2.1 | 26-Sep-2006 |
yamt | file ar5312_board.c was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.4.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.4.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.1 | 26-Sep-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.8;
Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.1.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 26-Sep-2006 |
yamt | file ar5312_console.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.4.1 | 26-Sep-2006 |
ad | file ar5312_console.c was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.1.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.1.2.1 | 26-Sep-2006 |
yamt | file ar5312_console.c was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.9 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.8 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.7 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.6 | 07-Jan-2008 |
dyoung | branches: 1.6.28; 1.6.32; 1.6.38; 1.6.40;
Delete unused mips_ipl_si_to_sr[].
|
| 1.5 | 07-Jan-2008 |
dyoung | Update AR5312 interrupt masks along the same lines as the AR5315.
|
| 1.4 | 21-Feb-2007 |
dyoung | branches: 1.4.22; 1.4.28; 1.4.34;
Following other platform-dependent MIPS code, use SI_NQUEUES for
the length of the si_to_sr table.
|
| 1.3 | 06-Feb-2007 |
dyoung | branches: 1.3.2;
Stop using _IPL_NSOFT because nothing defines it, and it is
unnecessary to specify the length of the arrays mips_ipl_si_to_sr,
anyway.
|
| 1.2 | 04-Sep-2006 |
gdamore | branches: 1.2.2; 1.2.4; 1.2.10;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.1 | 28-Aug-2006 |
gdamore | branches: 1.1.2;
First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.1.2.3 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 28-Aug-2006 |
yamt | file ar5312_intr.c was added on branch yamt-pdpolicy on 2006-09-03 15:23:21 +0000
|
| 1.2.10.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.2.10.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.2.10.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.10.1 | 04-Sep-2006 |
yamt | file ar5312_intr.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.2.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.4.1 | 04-Sep-2006 |
rpaulo | file ar5312_intr.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.2.2.1 | 09-Feb-2007 |
ad | Sync with HEAD.
|
| 1.3.2.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.4.34.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.4.28.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.4.22.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.6.40.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.6.38.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.32.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.6.28.4 | 28-Feb-2010 |
matt | Add #define __INTR_PRIVATE
|
| 1.6.28.3 | 23-Feb-2010 |
matt | Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that
in the interrupt init routine. There's a default ipl_sr_map will operate
correctly, but isn't performant.
|
| 1.6.28.2 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.6.28.1 | 15-Feb-2010 |
matt | Adapt to the new interrupt framework for NetBSD/mips.
|
| 1.11 | 03-Oct-2025 |
thorpej | Use device_setprop_data() to set the "mac-address" property.
|
| 1.10 | 27-Oct-2012 |
chs | split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.9 | 10-Jul-2011 |
matt | branches: 1.9.2; 1.9.12;
Cleanup machine includes
|
| 1.8 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.7 | 22-Jan-2010 |
martin | Unify the name of the device property to hold a MAC address - there was
no clear majority for either "mac-addr" vs. "mac-address", but a quick
gallup poll among developers selected the latter.
|
| 1.6 | 06-Jul-2009 |
alc | Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.5 | 23-Jan-2008 |
dyoung | branches: 1.5.10; 1.5.20; 1.5.28;
Make these compile again by #including <prop/problib.h>.
|
| 1.4 | 28-Feb-2007 |
thorpej | branches: 1.4.20; 1.4.26; 1.4.32;
TRUE -> true, FALSE -> false
|
| 1.3 | 07-Oct-2006 |
gdamore | branches: 1.3.2; 1.3.4; 1.3.8; 1.3.10;
Add Atheros SPI controller. This is a "pseudo-controller", as it has some
artificial limitations which really only make it good for use with serial
flash devices. One of the more annoying limitations is a restriction that
it can only transfer 8 bytes at a time. (4 command/address, plus 4 data.)
The driver includes design to work around those limitations, but these
changes are only appropriate for serial flash devices.
This driver is designed to run in interrupt driven mode, but due to lack
of adequate documentation, we run it in polled mode.
A subsequent commit will introduce the MI M25P flash driver, which has been
tested and is known to function somewhat reasonably..
|
| 1.2 | 26-Sep-2006 |
gdamore | Dynamically calculate the memory size. The math is suspect, but the
results are at least accurate. (This was reverse engineered from the
redboot sources, which is one of the reasons why the math is suspect.)
|
| 1.1 | 26-Sep-2006 |
gdamore | Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.3.10.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.3.8.4 | 04-Feb-2008 |
yamt | sync with head.
|
| 1.3.8.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.3.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.8.1 | 07-Oct-2006 |
yamt | file ar5315.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.3.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.3.4.1 | 07-Oct-2006 |
ad | file ar5315.c was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.3.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.3.2.1 | 07-Oct-2006 |
yamt | file ar5315.c was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.4.32.1 | 23-Jan-2008 |
bouyer | Sync with HEAD.
|
| 1.4.26.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.4.20.1 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.5.28.1 | 21-Apr-2010 |
matt | sync with netbsd-5
|
| 1.5.20.1 | 07-Aug-2009 |
snj | Pull up following revision(s) (requested by jmcneill in ticket #775):
sys/arch/mips/atheros/ar5312_board.c: revision 1.2
sys/arch/mips/atheros/ar5315.c: revision 1.6
sys/arch/mips/atheros/ar5315_board.c: revision 1.2
sys/arch/mips/atheros/dev/if_ath_arbus.c: revision 1.16
sys/arch/mips/atheros/include/ar5312reg.h: revision 1.3
Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.5.10.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.5.10.1 | 18-Jul-2009 |
yamt | sync with head.
|
| 1.9.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.9.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.4 | 10-Jul-2011 |
matt | Cleanup machine includes
|
| 1.3 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.2 | 06-Jul-2009 |
alc | Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.1 | 26-Sep-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.8; 1.1.62; 1.1.72; 1.1.80;
Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.1.80.1 | 21-Apr-2010 |
matt | sync with netbsd-5
|
| 1.1.72.1 | 07-Aug-2009 |
snj | Pull up following revision(s) (requested by jmcneill in ticket #775):
sys/arch/mips/atheros/ar5312_board.c: revision 1.2
sys/arch/mips/atheros/ar5315.c: revision 1.6
sys/arch/mips/atheros/ar5315_board.c: revision 1.2
sys/arch/mips/atheros/dev/if_ath_arbus.c: revision 1.16
sys/arch/mips/atheros/include/ar5312reg.h: revision 1.3
Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.1.62.1 | 18-Jul-2009 |
yamt | sync with head.
|
| 1.1.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 26-Sep-2006 |
yamt | file ar5315_board.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.4.1 | 26-Sep-2006 |
ad | file ar5315_board.c was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.1.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.1.2.1 | 26-Sep-2006 |
yamt | file ar5315_board.c was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.2 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.1 | 26-Sep-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.8;
Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.1.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 26-Sep-2006 |
yamt | file ar5315_console.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.4.1 | 26-Sep-2006 |
ad | file ar5315_console.c was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.1.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.1.2.1 | 26-Sep-2006 |
yamt | file ar5315_console.c was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.8 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.7 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.6 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.5 | 07-Jan-2008 |
dyoung | branches: 1.5.28; 1.5.32; 1.5.38; 1.5.40;
Cosmetic: re-number the comments on elements of ipl_sr_bits[].
|
| 1.4 | 07-Jan-2008 |
dyoung | Make this compile again by making changes similar to the changes
that ad@ made to arch/mips/alchemy/au_icu.c. Compiles and runs,
but this probably deserves a looksie by someone with more MIPS
clue.
|
| 1.3 | 21-Feb-2007 |
dyoung | branches: 1.3.22; 1.3.28; 1.3.34;
Following other platform-dependent MIPS code, use SI_NQUEUES for
the length of the si_to_sr table.
|
| 1.2 | 06-Feb-2007 |
dyoung | branches: 1.2.2;
Stop using _IPL_NSOFT because nothing defines it, and it is
unnecessary to specify the length of the arrays mips_ipl_si_to_sr,
anyway.
|
| 1.1 | 26-Sep-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.8;
Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.1.8.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.1.8.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.1.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 26-Sep-2006 |
yamt | file ar5315_intr.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.4.3 | 09-Feb-2007 |
ad | Sync with HEAD.
|
| 1.1.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.4.1 | 26-Sep-2006 |
ad | file ar5315_intr.c was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.1.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.1.2.1 | 26-Sep-2006 |
yamt | file ar5315_intr.c was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.2.2.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.3.34.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.3.28.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.3.22.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.5.40.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.5.38.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.32.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.5.28.4 | 28-Feb-2010 |
matt | Add #define __INTR_PRIVATE
|
| 1.5.28.3 | 23-Feb-2010 |
matt | Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that
in the interrupt init routine. There's a default ipl_sr_map will operate
correctly, but isn't performant.
|
| 1.5.28.2 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.5.28.1 | 15-Feb-2010 |
matt | Adapt to the new interrupt framework for NetBSD/mips.
|
| 1.6 | 26-Sep-2006 |
gdamore | Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.5 | 08-Sep-2006 |
gdamore | branches: 1.5.2; 1.5.4;
Various improvements to make the common mips3 clock handling more generally
useful. The functions delay, cpu_initclocks, and setstatclcokrate have been
renamed to mips3_delay, mips3_initclocks, and mips3_setstatclockrate.
We provide weak aliases for the original names, so machdep code doesn't have
to provide wrapper routines. (Giving good performance.)
I've moved mips3_clockintr, mips3_initclocks, and mips3_setstatclockrate to
their own mips3_clockintr file, because some ports may not be able to use
these, and its senseless to carry that baggage.
|
| 1.4 | 28-Aug-2006 |
gdamore | branches: 1.4.2;
First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.3 | 05-Jun-2006 |
gdamore | branches: 1.3.4;
Import new HAL 0.9.17.2. Approved by sam@
New HAL includes some driver changes to register accesses.
Adds support for WLAN devices on AR5312 family devices.
Adds support 32-bit SPARC ath devices (untested).
ath enabled in SPARC64 GENERIC builds.
This HAL is tested and known to work for i386 PCI devices, SPARC64 PCI devices,
and AR5312 WiSoC devices. MIPS PCI devices appear to be busted (possibly only
on Alchemy hardware, unconfirmed), and cardbus support is untested due to
lack of test hardware.
Please report any new problems with this import to garrett@.
|
| 1.2 | 25-May-2006 |
gdamore | Add RBLE bit to flash enable.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.10.1 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.1.8.4 | 07-Jun-2006 |
kardel | Sync with head.
|
| 1.1.8.3 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 21-Mar-2006 |
simonb | file ar531x_board.c was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.6.1 | 21-Mar-2006 |
elad | file ar531x_board.c was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.1.4.5 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.4 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.3 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.1.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.1.4.1 | 21-Mar-2006 |
yamt | file ar531x_board.c was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file ar531x_board.c was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.3.4.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.4.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.3.4.1 | 05-Jun-2006 |
yamt | file ar531x_board.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.4.2.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.5.4.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.5.2.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.5.2.1 | 08-Sep-2006 |
rpaulo | file ar531x_board.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.3 | 28-Aug-2006 |
gdamore | First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.2 | 28-Mar-2006 |
gdamore | branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; 1.2.14;
Rework evbmips clock architecture to use common clock_subr.h routines.
Additionally, do not fail if no RTC is present, as not all boards have one.
Malta now uses the common dev/ic/mc146818.c code as much as possible, reducing
local "custom" code. These malta changes are *untested*, as I do not have
a Malta board to test with. If someone would please test them and get back to
me, I'd appreciate it!
|
| 1.1 | 21-Mar-2006 |
gdamore | Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.2.14.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.14.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.14.1 | 28-Mar-2006 |
yamt | file ar531x_intr.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.2.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.8.1 | 28-Mar-2006 |
simonb | file ar531x_intr.c was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.2.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.2.6.1 | 28-Mar-2006 |
elad | file ar531x_intr.c was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.2.4.3 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.2.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.2.4.1 | 28-Mar-2006 |
yamt | file ar531x_intr.c was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.2.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.2.2.1 | 28-Mar-2006 |
tron | file ar531x_intr.c was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.2 | 21-Mar-2006 |
gdamore | Remove a file that should never have been committed. (Stub implementation
that I abandoned.)
|
| 1.1 | 21-Mar-2006 |
gdamore | Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.2 | 28-Aug-2006 |
gdamore | First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.14;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.14.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.14.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.14.1 | 21-Mar-2006 |
yamt | file ar531x_timer.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 21-Mar-2006 |
simonb | file ar531x_timer.c was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.6.1 | 21-Mar-2006 |
elad | file ar531x_timer.c was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.1.4.3 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.1.4.1 | 21-Mar-2006 |
yamt | file ar531x_timer.c was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file ar531x_timer.c was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.4 | 03-Jul-2025 |
andvar | s/ochi/ohci and s/echi/ehci/ in few more places (logs, comments, intr desc).
|
| 1.3 | 09-Jun-2015 |
matt | branches: 1.3.54;
#include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.2 | 31-Jul-2011 |
matt | branches: 1.2.12; 1.2.30;
Support using MEMSIZE
|
| 1.1 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.2.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.54.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.7 | 03-Oct-2025 |
thorpej | Use device_setprop_data() to set the "mac-address" property.
|
| 1.6 | 02-Oct-2025 |
thorpej | Rename property "mac-addr" -> "mac-address" to match everyone else.
|
| 1.5 | 29-May-2014 |
skrll | Comment out nfrac as it's unused.
|
| 1.4 | 27-Oct-2012 |
chs | branches: 1.4.10;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.3 | 10-Jul-2011 |
matt | branches: 1.3.2; 1.3.12;
Fix machine/ includes
|
| 1.2 | 10-Jul-2011 |
matt | Add athers_get_uart_freq() (since AR7240 uses the ref_clk, not the bus_clk).
Add little endian bus_space_tag for arbus.
Add EHCI attachment for arbus.
|
| 1.1 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.3.12.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.3.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.4.10.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.2 | 10-Jul-2011 |
matt | branches: 1.2.12; 1.2.30;
Add athers_get_uart_freq() (since AR7240 uses the ref_clk, not the bus_clk).
Add little endian bus_space_tag for arbus.
Add EHCI attachment for arbus.
|
| 1.1 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.2.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2 | 10-Jul-2011 |
matt | Add athers_get_uart_freq() (since AR7240 uses the ref_clk, not the bus_clk).
Add little endian bus_space_tag for arbus.
Add EHCI attachment for arbus.
|
| 1.1 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.7 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.6 | 10-Nov-2019 |
chs | branches: 1.6.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.5 | 29-Jun-2015 |
maxv | branches: 1.5.18;
Remove a dead branch. Could look like a memory leak, but ih cannot be
NULL.
Found by Brainy.
|
| 1.4 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.3 | 10-Jul-2011 |
matt | branches: 1.3.12; 1.3.30;
Cleanup machine includes
|
| 1.2 | 08-Jul-2011 |
dyoung | Use <sys/bus.h> not <machine/bus.h>.
|
| 1.1 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.3.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.3.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.18.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.6.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.17 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.16 | 24-Apr-2021 |
thorpej | branches: 1.16.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.15 | 10-Jul-2011 |
matt | branches: 1.15.68;
Add athers_get_uart_freq() (since AR7240 uses the ref_clk, not the bus_clk).
Add little endian bus_space_tag for arbus.
Add EHCI attachment for arbus.
|
| 1.14 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.13 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.12 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.11 | 15-Dec-2010 |
matt | branches: 1.11.2; 1.11.4;
Make these compile again.
|
| 1.10 | 04-Sep-2006 |
gdamore | branches: 1.10.4; 1.10.80; 1.10.84;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.9 | 28-Aug-2006 |
gdamore | First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.8 | 13-Jul-2006 |
gdamore | Activate argpio. Apparently I forgot to commit this change earlier.
Noticed while merging other com(4) changes.
|
| 1.7 | 05-Jun-2006 |
gdamore | branches: 1.7.2; 1.7.4;
Import new HAL 0.9.17.2. Approved by sam@
New HAL includes some driver changes to register accesses.
Adds support for WLAN devices on AR5312 family devices.
Adds support 32-bit SPARC ath devices (untested).
ath enabled in SPARC64 GENERIC builds.
This HAL is tested and known to work for i386 PCI devices, SPARC64 PCI devices,
and AR5312 WiSoC devices. MIPS PCI devices appear to be busted (possibly only
on Alchemy hardware, unconfirmed), and cardbus support is untested due to
lack of test hardware.
Please report any new problems with this import to garrett@.
|
| 1.6 | 25-May-2006 |
gdamore | Rename flash to athflash to reflect MD nature. Approved by simon@ and dyoung@
|
| 1.5 | 25-May-2006 |
gdamore | Add flash device support.
|
| 1.4 | 14-May-2006 |
elad | branches: 1.4.2;
integrate kauth.
|
| 1.3 | 11-May-2006 |
gdamore | A zero mask means that the device should always be enabled.
|
| 1.2 | 02-Apr-2006 |
gdamore | branches: 1.2.2; 1.2.4; 1.2.6;
Interrupt values (aa_irq) can be zero, and represent a real interrupt.
Please display them.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.2.3 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file arbus.c was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.2.6.4 | 07-Jun-2006 |
kardel | Sync with head.
|
| 1.2.6.3 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.2.6.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.6.1 | 02-Apr-2006 |
simonb | file arbus.c was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.2.4.3 | 11-May-2006 |
elad | sync with head
|
| 1.2.4.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.2.4.1 | 02-Apr-2006 |
elad | file arbus.c was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.2.2.7 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.2.2.6 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.2.2.5 | 11-Aug-2006 |
yamt | sync with head
|
| 1.2.2.4 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.2.2.3 | 24-May-2006 |
yamt | sync with head.
|
| 1.2.2.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.2.2.1 | 02-Apr-2006 |
yamt | file arbus.c was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.4.2.1 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.7.4.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.7.4.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.7.4.1 | 05-Jun-2006 |
yamt | file arbus.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.7.2.1 | 13-Jul-2006 |
gdamore | Merge from HEAD.
|
| 1.10.84.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.10.80.1 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.10.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.10.4.1 | 04-Sep-2006 |
rpaulo | file arbus.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.11.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.11.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.15.68.2 | 22-Mar-2021 |
thorpej | Audit CFARG_IATTR in config_found() calls, and remove it in situations
where the interface attribute is not ambiguous.
|
| 1.15.68.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.16.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 10-Jul-2011 |
matt | Add athers_get_uart_freq() (since AR7240 uses the ref_clk, not the bus_clk).
Add little endian bus_space_tag for arbus.
Add EHCI attachment for arbus.
|
| 1.3 | 02-Aug-2021 |
andvar | fix various typos in comments and log messages.
|
| 1.2 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.14; 1.1.20; 1.1.74; 1.1.76; 1.1.78;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.20.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.20.1 | 21-Mar-2006 |
rpaulo | file aereg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.1.14.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.14.1 | 21-Mar-2006 |
yamt | file aereg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 21-Mar-2006 |
simonb | file aereg.h was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.6.1 | 21-Mar-2006 |
elad | file aereg.h was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.1.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.1.4.1 | 21-Mar-2006 |
yamt | file aereg.h was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file aereg.h was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.8 | 13-Sep-2019 |
msaitoh | if_flags is neither int nor short. It's unsigned short.
|
| 1.7 | 13-Apr-2015 |
riastradh | branches: 1.7.18;
MD rnd.h cleanups. Please let me know if I broke anything!
|
| 1.6 | 27-Oct-2012 |
chs | branches: 1.6.14;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.5 | 02-Feb-2012 |
tls | branches: 1.5.6;
Entropy-pool implementation move and cleanup.
1) Move core entropy-pool code and source/sink/sample management code
to sys/kern from sys/dev.
2) Remove use of NRND as test for presence of entropy-pool code throughout
source tree.
3) Remove use of RND_ENABLED in device drivers as microoptimization to
avoid expensive operations on disabled entropy sources; make the
rnd_add calls do this directly so all callers benefit.
4) Fix bug in recent rnd_add_data()/rnd_add_uint32() changes that might
have lead to slight entropy overestimation for some sources.
5) Add new source types for environmental sensors, power sensors, VM
system events, and skew between clocks, with a sample implementation
for each.
ok releng to go in before the branch due to the difficulty of later
pullup (widespread #ifdef removal and moved files). Tested with release
builds on amd64 and evbarm and live testing on amd64.
|
| 1.4 | 19-Nov-2011 |
tls | branches: 1.4.2;
First step of random number subsystem rework described in
<20111022023242.BA26F14A158@mail.netbsd.org>. This change includes
the following:
An initial cleanup and minor reorganization of the entropy pool
code in sys/dev/rnd.c and sys/dev/rndpool.c. Several bugs are
fixed. Some effort is made to accumulate entropy more quickly at
boot time.
A generic interface, "rndsink", is added, for stream generators to
request that they be re-keyed with good quality entropy from the pool
as soon as it is available.
The arc4random()/arc4randbytes() implementation in libkern is
adjusted to use the rndsink interface for rekeying, which helps
address the problem of low-quality keys at boot time.
An implementation of the FIPS 140-2 statistical tests for random
number generator quality is provided (libkern/rngtest.c). This
is based on Greg Rose's implementation from Qualcomm.
A new random stream generator, nist_ctr_drbg, is provided. It is
based on an implementation of the NIST SP800-90 CTR_DRBG by
Henric Jungheim. This generator users AES in a modified counter
mode to generate a backtracking-resistant random stream.
An abstraction layer, "cprng", is provided for in-kernel consumers
of randomness. The arc4random/arc4randbytes API is deprecated for
in-kernel use. It is replaced by "cprng_strong". The current
cprng_fast implementation wraps the existing arc4random
implementation. The current cprng_strong implementation wraps the
new CTR_DRBG implementation. Both interfaces are rekeyed from
the entropy pool automatically at intervals justifiable from best
current cryptographic practice.
In some quick tests, cprng_fast() is about the same speed as
the old arc4randbytes(), and cprng_strong() is about 20% faster
than rnd_extract_data(). Performance is expected to improve.
The AES code in src/crypto/rijndael is no longer an optional
kernel component, as it is required by cprng_strong, which is
not an optional kernel component.
The entropy pool output is subjected to the rngtest tests at
startup time; if it fails, the system will reboot. There is
approximately a 3/10000 chance of a false positive from these
tests. Entropy pool _input_ from hardware random numbers is
subjected to the rngtest tests at attach time, as well as the
FIPS continuous-output test, to detect bad or stuck hardware
RNGs; if any are detected, they are detached, but the system
continues to run.
A problem with rndctl(8) is fixed -- datastructures with
pointers in arrays are no longer passed to userspace (this
was not a security problem, but rather a major issue for
compat32). A new kernel will require a new rndctl.
The sysctl kern.arandom() and kern.urandom() nodes are hooked
up to the new generators, but the /dev/*random pseudodevices
are not, yet.
Manual pages for the new kernel interfaces are forthcoming.
|
| 1.3 | 28-Apr-2008 |
martin | branches: 1.3.34;
Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 04-Sep-2006 |
gdamore | branches: 1.2.4; 1.2.58; 1.2.60; 1.2.62;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.14;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.14.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.14.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.14.1 | 21-Mar-2006 |
yamt | file aevar.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 21-Mar-2006 |
simonb | file aevar.h was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.6.1 | 21-Mar-2006 |
elad | file aevar.h was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.1.4.3 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.1.4.1 | 21-Mar-2006 |
yamt | file aevar.h was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file aevar.h was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.2.62.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.2.60.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.58.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.2.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.4.1 | 04-Sep-2006 |
rpaulo | file aevar.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.3.34.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.3.34.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.4.2.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.5.6.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.6.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.6.14.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.7.18.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.10 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.9 | 24-Apr-2021 |
thorpej | branches: 1.9.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.8 | 11-Jul-2020 |
nia | branches: 1.8.4;
Fix various typos of "system" in comments. Mainly copypasto errors.
from vezhlys on freenode.
|
| 1.7 | 15-Sep-2016 |
jdolecek | remove last isolated islands using BUS_SPACE_BARRIER_SYNC and
BUS_SPACE_BARRIER_X_BEFORE_X - these were only ever defined for mips and ia64,
and never actually implemented even there
|
| 1.6 | 17-Jul-2011 |
dyoung | branches: 1.6.12; 1.6.30; 1.6.34;
Repair device_t/softc so that this compiles.
|
| 1.5 | 10-Jul-2011 |
matt | Cleanup machine includes
|
| 1.4 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 04-Sep-2006 |
gdamore | branches: 1.3.4; 1.3.10;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.2 | 28-Aug-2006 |
gdamore | First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.1 | 07-Jul-2006 |
gdamore | branches: 1.1.2; 1.1.6;
Add AR531X GPIO support. This also registers the reset button with sysmon,
so that when it is pressed the default reset button action (currently board
reset, no change to data in flash) is taken.
While here, remove the AR531X generic config, because it just doesn't make
sense.
|
| 1.1.6.4 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.6.3 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.6.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.1.6.1 | 07-Jul-2006 |
yamt | file argpio.c was added on branch yamt-pdpolicy on 2006-08-11 15:42:14 +0000
|
| 1.1.2.2 | 13-Jul-2006 |
gdamore | Merge from HEAD.
|
| 1.1.2.1 | 07-Jul-2006 |
gdamore | file argpio.c was added on branch gdamore-uart on 2006-07-13 17:48:57 +0000
|
| 1.3.10.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.10.1 | 04-Sep-2006 |
yamt | file argpio.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.3.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.4.1 | 04-Sep-2006 |
rpaulo | file argpio.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.6.34.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.6.30.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.6.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.8.4.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.9.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 07-Jul-2006 |
gdamore | branches: 1.1.2; 1.1.6; 1.1.10; 1.1.16;
Add AR531X GPIO support. This also registers the reset button with sysmon,
so that when it is pressed the default reset button action (currently board
reset, no change to data in flash) is taken.
While here, remove the AR531X generic config, because it just doesn't make
sense.
|
| 1.1.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.16.1 | 07-Jul-2006 |
yamt | file argpioreg.h was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.10.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.10.1 | 07-Jul-2006 |
rpaulo | file argpioreg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.1.6.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.1.6.1 | 07-Jul-2006 |
yamt | file argpioreg.h was added on branch yamt-pdpolicy on 2006-08-11 15:42:14 +0000
|
| 1.1.2.2 | 13-Jul-2006 |
gdamore | Merge from HEAD.
|
| 1.1.2.1 | 07-Jul-2006 |
gdamore | file argpioreg.h was added on branch gdamore-uart on 2006-07-13 17:48:57 +0000
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 02-Oct-2015 |
msaitoh | branches: 1.5.32;
PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific
|
| 1.4 | 26-Jun-2015 |
matt | #include <mips/locore.h> and other include cleanups.
|
| 1.3 | 29-Mar-2014 |
christos | branches: 1.3.6;
make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.
|
| 1.2 | 10-Jul-2011 |
matt | branches: 1.2.2; 1.2.12; 1.2.16;
Fix machine/ includes
|
| 1.1 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.2.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.2.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.6.2 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.3.6.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.5.32.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.17 | 03-Oct-2025 |
thorpej | Minor shuffling of include order.
|
| 1.16 | 10-Sep-2025 |
thorpej | Encapsulate what's needed to attach a SPI bus into a spibus_attach()
inline.
|
| 1.15 | 07-Aug-2021 |
thorpej | branches: 1.15.2;
Merge thorpej-cfargs2.
|
| 1.14 | 24-Apr-2021 |
thorpej | branches: 1.14.2; 1.14.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.13 | 04-Jan-2021 |
thorpej | branches: 1.13.2;
malloc(9) -> kmem(9)
|
| 1.12 | 13-Aug-2019 |
tnn | branches: 1.12.8;
ensure spibus_attach_args is zero'ed
|
| 1.11 | 03-Sep-2018 |
riastradh | Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.
To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
|
| 1.10 | 27-Oct-2012 |
chs | branches: 1.10.36; 1.10.38;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.9 | 10-Jul-2011 |
matt | branches: 1.9.2; 1.9.12;
Cleanup machine includes
|
| 1.8 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.7 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.6 | 08-Jun-2011 |
rmind | - Use IPL_BIO (instead of IPL_SERIAL) for SPI.
- Convert simple_lock/ltsleep to mutex/condvar.
|
| 1.5 | 28-Feb-2007 |
thorpej | branches: 1.5.66; 1.5.76;
TRUE -> true, FALSE -> false
|
| 1.4 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.3 | 25-Dec-2006 |
wiz | branches: 1.3.2; 1.3.4;
Spell "separate" correctly. From Zafer Aydogan.
|
| 1.2 | 20-Oct-2006 |
gdamore | branches: 1.2.2; 1.2.4;
This commit provides substantial fixes and functionality for SPI flash.
Specifically, the SPI flash now operates as a nearly fully functional block
device (other than lacking disklabel support). It does some basic translation
stuff, so that if you attempt to write a block, the underlying flash sectors
(usually 64k in size) will be read, erased and rewritten.
To minize thrashing, the spiflash strategy routine attempts to gather writes
to the same sector together, so that in the typical case you will not have to
repeatedly erase/rewrite the sector. It also attempts to check and verify
whether an erase cycle is truly needed. There are still access patterns that
will cause multiple erases to occur, and so I heartily discourage the use
of these flash devices for storing anything other than small configuration
data, or write-once images. If you want to do more than that, then someone
should try to write a real flash translation layer.
The drivers attempt to provide some level of asynchronous operation, so that
while you are erasing or writing to the flash, other things can reasonably
take place.
Note that spiflash does not do bad block remapping. It also doesn't detect
when a device is in read-only mode, or if some sectors are read-only. It
only supports uniform sectored NOR flash. It lacks any code to deal with
disklabels, and does not offer any disk related ioctls.
These limitations aside, it would not be terribly hard, I think, to break
out the code I've done to create a generic "norflash" driver, backed by
a "common" spiflash module. Then other flash drivers (e.g. athflash, etc.)
could benefit from the ability to use this as a block device. I've tried
to architect it to support that, if someone else wants to do the work.
(Hi Jared!)
The primary reason that I've not added code to deal with disklabels is that
I had a difficult time figuring out which framework (disklabels or wedges)
to use, and which bits of code were necessary to implement. In the case of
the flash devices I'm working with, a parser to deal with redboot FIS images
(partitions) would need to be added. I was prepared to do this, but gave
up owing to the complete and total lack of any API or design documentation
pertaining to the requirements for disk drivers and disklabel management or
wedges. I would strongly encourage someone who knows something about
wedges or disklabels to write a simple document (or even a dummy driver)
showing which interfaces should be provided in new mass storage drivers.
This work was funded by the Champaign-Urbana Community Wireless Network
Project.
|
| 1.1 | 07-Oct-2006 |
gdamore | Add Atheros SPI controller. This is a "pseudo-controller", as it has some
artificial limitations which really only make it good for use with serial
flash devices. One of the more annoying limitations is a restriction that
it can only transfer 8 bytes at a time. (4 command/address, plus 4 data.)
The driver includes design to work around those limitations, but these
changes are only appropriate for serial flash devices.
This driver is designed to run in interrupt driven mode, but due to lack
of adequate documentation, we run it in polled mode.
A subsequent commit will introduce the MI M25P flash driver, which has been
tested and is known to function somewhat reasonably..
|
| 1.2.4.3 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.2.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.2.4.1 | 20-Oct-2006 |
ad | file arspi.c was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.2.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.2.2.1 | 20-Oct-2006 |
yamt | file arspi.c was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.3.4.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.3.4.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.3.2.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.3.2.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.3.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.2.1 | 25-Dec-2006 |
yamt | file arspi.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.5.76.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.5.66.1 | 12-Jun-2011 |
rmind | sync with head
|
| 1.9.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.9.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.10.38.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.10.38.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.10.36.1 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.12.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.13.2.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.14.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.14.2.1 | 18-May-2021 |
thorpej | Pass the controller devhandle along to the "spi" instance.
|
| 1.15.2.1 | 09-Aug-2021 |
thorpej | Port over the changes from thorpej-i2c-spi-conf to thorpej-i2c-spi-conf2,
which is based on a newer HEAD revision.
|
| 1.1 | 14-Oct-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.8;
Forgot to commit this file when adding SPI support to Atheros.
|
| 1.1.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 14-Oct-2006 |
yamt | file arspireg.h was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.1.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.4.1 | 14-Oct-2006 |
ad | file arspireg.h was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.1.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.1.2.1 | 14-Oct-2006 |
yamt | file arspireg.h was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.12 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.11 | 10-Nov-2019 |
chs | branches: 1.11.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.10 | 03-Sep-2018 |
riastradh | Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.
To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
|
| 1.9 | 09-Jun-2015 |
matt | branches: 1.9.16; 1.9.18;
#include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.8 | 25-Jul-2014 |
dholland | branches: 1.8.2; 1.8.4;
Add d_discard to all struct cdevsw instances I could find.
All have been set to "nodiscard"; some should get a real implementation.
|
| 1.7 | 16-Mar-2014 |
dholland | branches: 1.7.2;
Change (mostly mechanically) every cdevsw/bdevsw I can find to use
designated initializers.
I have not built every extant kernel so I have probably broken at
least one build; however I've also found and fixed some wrong
cdevsw/bdevsw entries so even if so I think we come out ahead.
|
| 1.6 | 27-Oct-2012 |
chs | branches: 1.6.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.5 | 25-Aug-2011 |
dyoung | branches: 1.5.2; 1.5.12;
Use humanize_number() instead of the buggy code that GCC 4.5 caught.
Compiles. Not tested.
|
| 1.4 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 11-Jun-2008 |
cegger | use device_lookup_private to get softc
|
| 1.2 | 28-Apr-2008 |
martin | branches: 1.2.2; 1.2.4;
Remove clause 3 and 4 from TNF licenses
|
| 1.1 | 25-May-2006 |
gdamore | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10; 1.1.16; 1.1.70; 1.1.72; 1.1.74;
Rename flash to athflash to reflect MD nature. Approved by simon@ and dyoung@
|
| 1.1.74.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.1.74.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.1.72.2 | 17-Jun-2008 |
yamt | sync with head.
|
| 1.1.72.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.1.70.2 | 29-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.70.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.1.16.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.1.16.1 | 25-May-2006 |
rpaulo | file athflash.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.1.10.2 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.1.10.1 | 25-May-2006 |
yamt | file athflash.c was added on branch yamt-pdpolicy on 2006-06-26 12:44:55 +0000
|
| 1.1.8.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.8.1 | 25-May-2006 |
yamt | file athflash.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.1.6.2 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.1.6.1 | 25-May-2006 |
chap | file athflash.c was added on branch chap-midi on 2006-06-19 03:44:52 +0000
|
| 1.1.2.2 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.1.2.1 | 25-May-2006 |
kardel | file athflash.c was added on branch simonb-timecounters on 2006-06-01 22:35:03 +0000
|
| 1.2.4.1 | 18-Jun-2008 |
simonb | Sync with head.
|
| 1.2.2.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.5.12.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.12.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.5.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.5.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.5.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.6.2.1 | 18-May-2014 |
rmind | sync with head
|
| 1.7.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.8.4.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.8.2.1 | 05-Nov-2015 |
riz | Pull up revisions (requested by nisimura in ticket #978):
sys/arch/mips/atheros/dev/athflash.c: 1.9
sys/arch/mips/atheros/dev/if_ae.c: 1.25
remove unused variables which break AP30 and MERAKI kernel builds.
|
| 1.9.18.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.9.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.9.16.1 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.11.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.13 | 08-Dec-2018 |
thorpej | Clean up initialization of com_regs structure, in preparation for
some additional changers.
|
| 1.12 | 23-Feb-2014 |
martin | branches: 1.12.28; 1.12.30;
fix typo
|
| 1.11 | 07-Feb-2014 |
msaitoh | Check _BYTE_ORDER.
|
| 1.10 | 07-Jul-2011 |
matt | branches: 1.10.2; 1.10.12; 1.10.16;
Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.9 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.8 | 09-Feb-2011 |
matt | Use $NetBSD$ instead of $Id$
|
| 1.7 | 28-Apr-2008 |
martin | branches: 1.7.22; 1.7.28; 1.7.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.6 | 14-Mar-2008 |
cube | branches: 1.6.2; 1.6.4;
Split device_t and softc for all com(4) devices (well, everything that
uses a com_softc backend). Use proper types and ansify where appropriate.
|
| 1.5 | 17-Feb-2007 |
jmcneill | branches: 1.5.22; 1.5.38; 1.5.42;
Only define COM_ARBUS_BAUD if not already defined elsewhere.
|
| 1.4 | 04-Sep-2006 |
gdamore | branches: 1.4.4; 1.4.10;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.3 | 28-Aug-2006 |
gdamore | First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.2 | 13-Jul-2006 |
gdamore | Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.12; 1.1.14;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.14.5 | 17-Mar-2008 |
yamt | sync with head.
|
| 1.1.14.4 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.1.14.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.14.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.14.1 | 21-Mar-2006 |
yamt | file com_arbus.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.1.12.4 | 17-Jun-2006 |
gdamore | Undo the undo. Restore COM_INIT_REGS handling.
|
| 1.1.12.3 | 17-Jun-2006 |
gdamore | Undo the change to use COM_INIT_REGS, and instead use backwards compat
support. For com_arbus and com_aubus, we have to set a new flag, COM_HW_REGMAP
to indicate that we have special mapping considerations so that com_attach_subr
doesn't clobber our register map.
|
| 1.1.12.2 | 16-Jun-2006 |
gdamore | KNF per simonb@ consisting of:
regs.xx -> regs.cr_xxx
wrap COM_INIT_REGS body with do { } while (0);)
Convert INB/OUTB macros to CSR_READ/CSR_WRITE macros per tsutsui@.
|
| 1.1.12.1 | 15-Jun-2006 |
gdamore | Adapt to new com framework. While here, make sure com only matches real com
devices.
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 21-Mar-2006 |
simonb | file com_arbus.c was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.6.1 | 21-Mar-2006 |
elad | file com_arbus.c was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.1.4.5 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.4 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.3 | 11-Aug-2006 |
yamt | sync with head
|
| 1.1.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.1.4.1 | 21-Mar-2006 |
yamt | file com_arbus.c was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file com_arbus.c was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.4.10.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.4.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.4.4.1 | 04-Sep-2006 |
rpaulo | file com_arbus.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.5.42.2 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.5.42.1 | 03-Apr-2008 |
mjf | Sync with HEAD.
|
| 1.5.38.1 | 24-Mar-2008 |
keiichi | sync with head.
|
| 1.5.22.1 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.6.4.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.6.2.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.7.30.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.7.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.7.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.10.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.10.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.10.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.12.30.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.12.28.1 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.10 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.9 | 24-Apr-2021 |
thorpej | branches: 1.9.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.8 | 21-Aug-2019 |
msaitoh | branches: 1.8.10;
Fix typo (s/contoller/controller/).
|
| 1.7 | 12-Jul-2016 |
maya | branches: 1.7.18;
Include <mips/locore.h> for badaddr.
Fixes mipseb DB120 kernel build.
ok skrll@
|
| 1.6 | 23-Apr-2016 |
skrll | Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.5 | 21-Sep-2015 |
skrll | Fix typo
|
| 1.4 | 11-Sep-2015 |
skrll | Trailing whitespace.
|
| 1.3 | 11-Sep-2015 |
skrll | Fix up USBMODE registers in sc_vendor_init functions and not in the ehci
driver.
|
| 1.2 | 20-Jul-2012 |
matt | branches: 1.2.2; 1.2.14; 1.2.16; 1.2.20;
EHCI_USBINTR is 4 bytes long so use EOWRITE4
|
| 1.1 | 10-Jul-2011 |
matt | branches: 1.1.2;
Add athers_get_uart_freq() (since AR7240 uses the ref_clk, not the bus_clk).
Add little endian bus_space_tag for arbus.
Add EHCI attachment for arbus.
|
| 1.1.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.2.20.1 | 06-Sep-2016 |
skrll | First pass at netbsd-7 updated with USB code from HEAD
|
| 1.2.16.5 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.16.4 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.16.3 | 05-Dec-2014 |
skrll | Use int for return type for [eou]chi_init and motg_init.
|
| 1.2.16.2 | 03-Dec-2014 |
skrll | The grand renaming of structure members.
No functional change.
|
| 1.2.16.1 | 03-Dec-2014 |
skrll | Trailing whitespace.
|
| 1.2.14.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.2.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7.18.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.8.10.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.9.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 25-May-2006 |
gdamore | Rename flash to athflash to reflect MD nature. Approved by simon@ and dyoung@
|
| 1.2 | 17-May-2006 |
gdamore | branches: 1.2.2; 1.2.4; 1.2.6;
Move comment with caveats about this driver, and make it more prominent, as
requested by simon@.
|
| 1.1 | 17-May-2006 |
gdamore | Initial swag at flash device support. Only read/write supported, and only
read is tested now. (I don't have a recovery option if I clobber flash on
write, so I'm loathe to test write access right now.)
|
| 1.2.6.2 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.2.6.1 | 17-May-2006 |
tron | file flash_arbus.c was added on branch peter-altq on 2006-05-24 15:48:12 +0000
|
| 1.2.4.3 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.2.4.2 | 24-May-2006 |
yamt | sync with head.
|
| 1.2.4.1 | 17-May-2006 |
yamt | file flash_arbus.c was added on branch yamt-pdpolicy on 2006-05-24 10:56:58 +0000
|
| 1.2.2.1 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.46 | 04-Oct-2025 |
thorpej | Add a shared function to query the common properties used for configuring
an Ethernet address.
|
| 1.45 | 05-Jul-2024 |
rin | sys: Drop redundant NULL check before m_freem(9)
m_freem(9) safely has accepted NULL argument at least since 4.2BSD:
https://www.tuhs.org/cgi-bin/utree.pl?file=4.2BSD/usr/src/sys/sys/uipc_mbuf.c
Compile-tested on amd64/ALL.
Suggested by knakahara@
|
| 1.44 | 29-Jun-2024 |
riastradh | branches: 1.44.2;
if_stats(9): Add ifp argument to if_stat..._ref.
This will enable us to pass the ifp through to a dtrace probe inside.
No functional change intended in this change, but this is an API
change visible to modules so it shouldn't be pulled up.
PR kern/58377
|
| 1.43 | 10-Feb-2024 |
andvar | s/alloted/allotted/ in comments.
|
| 1.42 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.41 | 18-Sep-2022 |
thorpej | Eliminate use of IFF_OACTIVE.
|
| 1.40 | 02-Sep-2020 |
msaitoh | Id -> NetBSD in comment. No functional change.
|
| 1.39 | 04-Feb-2020 |
thorpej | Use ifmedia_fini().
|
| 1.38 | 29-Jan-2020 |
thorpej | Adopt <net/if_stats.h>.
|
| 1.37 | 13-Sep-2019 |
msaitoh | branches: 1.37.2;
if_flags is neither int nor short. It's unsigned short.
|
| 1.36 | 28-May-2019 |
msaitoh | Use ETHER_LOCK()/ETHER_UNLOCK() for all ethernet drivers to protect ec_multi*.
|
| 1.35 | 23-May-2019 |
msaitoh | Whitespace fix (mainly tabify).
|
| 1.34 | 23-May-2019 |
msaitoh | No functional change:
- Simplify MII structure initialization and reference.
- u_int*_t -> uint*_t.
- KNF
|
| 1.33 | 08-Mar-2019 |
msaitoh | s/ are are / are /
s/ a a / a /
|
| 1.32 | 22-Jan-2019 |
msaitoh | Change MII PHY read/write API from:
int (*mii_readreg_t)(device_t, int, int);
void (*mii_writereg_t)(device_t, int, int, int);
to:
int (*mii_readreg_t)(device_t, int, int, uint16_t *);
int (*mii_writereg_t)(device_t, int, int, uint16_t);
Now we can test if a read/write operation failed or not by the return value.
In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.
Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:
arm/at91/at91emac.c
arm/ep93xx/epe.c
arm/omap/omapl1x_emac.c
mips/ralink/ralink_eth.c
arch/powerpc/booke/dev/pq3etsec.c(read)
dev/cadence/if_cemac.c <- hkenken
dev/ic/lan9118.c
Tested with the following device:
axe+ukphy
axe+rgephy
axen+rgephy (tested by Andrius V)
wm+atphy
wm+ukphy
wm+igphy
wm+ihphy
wm+makphy
sk+makphy
sk+brgphy
sk+gentbi
msk+makphy
sip+icsphy
sip+ukphy
re+rgephy
bge+brgphy
bnx+brgphy
gsip+gphyter
rtk+rlphy
fxp+inphy (tested by Andrius V)
tlp+acphy
ex+exphy
epic+qsphy
vge+ciphy (tested by Andrius V)
vr+ukphy (tested by Andrius V)
vte+ukphy (tested by Andrius V)
Not tested (MAC):
arm:at91emac
arm:cemac
arm:epe
arm:geminigmac
arm:enet
arm:cpsw
arm:emac(omac)
arm:emac(sunxi)
arm:npe
evbppc:temac
macppc:bm
macppc:gm
mips:aumac
mips:ae
mips:cnmac
mips:reth
mips:sbmac
playstation2:smap
powerpc:tsec
powerpc:emac(ibm4xx)
sgimips:mec
sparc:be
sf
ne(ax88190, dl10019)
awge
ep
gem
hme
smsh
mtd
sm
age
alc
ale
bce
cas
et
jme
lii
nfe
pcn
ste
stge
tl
xi
aue
mue
smsc
udav
url
Not tested (PHY):
amhphy
bmtphy
dmphy
etphy
glxtphy
ikphy
iophy
lxtphy
nsphyter
pnaphy
rdcphy
sqphy
tlphy
tqphy
urlphy
|
| 1.31 | 26-Jun-2018 |
msaitoh | branches: 1.31.2;
Implement the BPF direction filter (BIOC[GS]DIRECTION). It provides backward
compatibility with BIOC[GS]SEESENT ioctl. The userland interface is the same
as FreeBSD.
This change also fixes a bug that the direction is misunderstand on some
environment by passing the direction to bpf_mtap*() instead of checking
m->m_pkthdr.rcvif.
|
| 1.30 | 15-Dec-2016 |
ozaki-r | branches: 1.30.14;
Move bpf_mtap and if_ipackets++ on Rx of each driver to percpuq if_input
The benefits of the change are:
- We can reduce codes
- We can provide the same behavior between drivers
- Where/When if_ipackets is counted up
- Note that some drivers still update packet statistics in their own
way (periodical update)
- Moved bpf_mtap run in softint
- This makes it easy to MP-ify bpf
Proposed on tech-kern and tech-net
|
| 1.29 | 08-Dec-2016 |
ozaki-r | Apply deferred if_start framework
if_schedule_deferred_start checks if the if_snd queue contains packets,
so drivers don't need to check it by themselves.
|
| 1.28 | 10-Jun-2016 |
ozaki-r | branches: 1.28.2;
Introduce m_set_rcvif and m_reset_rcvif
The API is used to set (or reset) a received interface of a mbuf.
They are counterpart of m_get_rcvif, which will come in another
commit, hide internal of rcvif operation, and reduce the diff of
the upcoming change.
No functional change.
|
| 1.27 | 09-Feb-2016 |
ozaki-r | Introduce softint-based if_input
This change intends to run the whole network stack in softint context
(or normal LWP), not hardware interrupt context. Note that the work is
still incomplete by this change; to that end, we also have to softint-ify
if_link_state_change (and bpf) which can still run in hardware interrupt.
This change softint-ifies at ifp->if_input that is called from
each device driver (and ieee80211_input) to ensure Layer 2 runs
in softint (e.g., ether_input and bridge_input). To this end,
we provide a framework (called percpuq) that utlizes softint(9)
and percpu ifqueues. With this patch, rxintr of most drivers just
queues received packets and schedules a softint, and the softint
dequeues packets and does rest packet processing.
To minimize changes to each driver, percpuq is allocated in struct
ifnet for now and that is initialized by default (in if_attach).
We probably have to move percpuq to softc of each driver, but it's
future work. At this point, only wm(4) has percpuq in its softc
as a reference implementation.
Additional information including performance numbers can be found
in the thread at tech-kern@ and tech-net@:
http://mail-index.netbsd.org/tech-kern/2016/01/14/msg019997.html
Acknowledgment: riastradh@ greatly helped this work.
Thank you very much!
|
| 1.26 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.25 | 10-Aug-2014 |
tls | branches: 1.25.2; 1.25.4;
Merge tls-earlyentropy branch into HEAD.
|
| 1.24 | 27-Oct-2012 |
chs | branches: 1.24.10;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.23 | 22-Jul-2012 |
matt | branches: 1.23.2;
Fix mii_statchg to take a 'struct ifnet *' instead of device_t. This fixes
problem with a common MDIO bus used for multiple interfaces.
Some drivers converted to CFATTACL_DECL_NEW.
|
| 1.22 | 02-Feb-2012 |
tls | Entropy-pool implementation move and cleanup.
1) Move core entropy-pool code and source/sink/sample management code
to sys/kern from sys/dev.
2) Remove use of NRND as test for presence of entropy-pool code throughout
source tree.
3) Remove use of RND_ENABLED in device drivers as microoptimization to
avoid expensive operations on disabled entropy sources; make the
rnd_add calls do this directly so all callers benefit.
4) Fix bug in recent rnd_add_data()/rnd_add_uint32() changes that might
have lead to slight entropy overestimation for some sources.
5) Add new source types for environmental sensors, power sensors, VM
system events, and skew between clocks, with a sample implementation
for each.
ok releng to go in before the branch due to the difficulty of later
pullup (widespread #ifdef removal and moved files). Tested with release
builds on amd64 and evbarm and live testing on amd64.
|
| 1.21 | 10-Jul-2011 |
matt | branches: 1.21.2; 1.21.6;
Cleanup machine includes
|
| 1.20 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.19 | 05-Apr-2010 |
joerg | Push the bpf_ops usage back into bpf.h. Push the common ifp->if_bpf
check into the inline functions as well the fourth argument for
bpf_attach.
|
| 1.18 | 22-Jan-2010 |
martin | branches: 1.18.2; 1.18.4;
Unify the name of the device property to hold a MAC address - there was
no clear majority for either "mac-addr" vs. "mac-address", but a quick
gallup poll among developers selected the latter.
|
| 1.17 | 19-Jan-2010 |
pooka | Redefine bpf linkage through an always present op vector, i.e.
#if NBPFILTER is no longer required in the client. This change
doesn't yet add support for loading bpf as a module, since drivers
can register before bpf is attached. However, callers of bpf can
now be modularized.
Dynamically loadable bpf could probably be done fairly easily with
coordination from the stub driver and the real driver by registering
attachments in the stub before the real driver is loaded and doing
a handoff. ... and I'm not going to ponder the depths of unload
here.
Tested with i386/MONOLITHIC, modified MONOLITHIC without bpf and rump.
|
| 1.16 | 12-Nov-2009 |
dyoung | Simplify activation hook.
|
| 1.15 | 07-Nov-2008 |
dyoung | *** Summary ***
When a link-layer address changes (e.g., ifconfig ex0 link
02:de:ad:be:ef:02 active), send a gratuitous ARP and/or a Neighbor
Advertisement to update the network-/link-layer address bindings
on our LAN peers.
Refuse a change of ethernet address to the address 00:00:00:00:00:00
or to any multicast/broadcast address. (Thanks matt@.)
Reorder ifnet ioctl operations so that driver ioctls may inherit
the functions of their "class"---ether_ioctl(), fddi_ioctl(), et
cetera---and the class ioctls may inherit from the generic ioctl,
ifioctl_common(), but both driver- and class-ioctls may override
the generic behavior. Make network drivers share more code.
Distinguish a "factory" link-layer address from others for the
purposes of both protecting that address from deletion and computing
EUI64.
Return consistent, appropriate error codes from network drivers.
Improve readability. KNF.
*** Details ***
In if_attach(), always initialize the interface ioctl routine,
ifnet->if_ioctl, if the driver has not already initialized it.
Delete if_ioctl == NULL tests everywhere else, because it cannot
happen.
In the ioctl routines of network interfaces, inherit common ioctl
behaviors by calling either ifioctl_common() or whichever ioctl
routine is appropriate for the class of interface---e.g., ether_ioctl()
for ethernets.
Stop (ab)using SIOCSIFADDR and start to use SIOCINITIFADDR. In
the user->kernel interface, SIOCSIFADDR's argument was an ifreq,
but on the protocol->ifnet interface, SIOCSIFADDR's argument was
an ifaddr. That was confusing, and it would work against me as I
make it possible for a network interface to overload most ioctls.
On the protocol->ifnet interface, replace SIOCSIFADDR with
SIOCINITIFADDR. In ifioctl(), return EPERM if userland tries to
invoke SIOCINITIFADDR.
In ifioctl(), give the interface the first shot at handling most
interface ioctls, and give the protocol the second shot, instead
of the other way around. Finally, let compatibility code (COMPAT_OSOCK)
take a shot.
Pull device initialization out of switch statements under
SIOCINITIFADDR. For example, pull ..._init() out of any switch
statement that looks like this:
switch (...->sa_family) {
case ...:
..._init();
...
break;
...
default:
..._init();
...
break;
}
Rewrite many if-else clauses that handle all permutations of IFF_UP
and IFF_RUNNING to use a switch statement,
switch (x & (IFF_UP|IFF_RUNNING)) {
case 0:
...
break;
case IFF_RUNNING:
...
break;
case IFF_UP:
...
break;
case IFF_UP|IFF_RUNNING:
...
break;
}
unifdef lots of code containing #ifdef FreeBSD, #ifdef NetBSD, and
#ifdef SIOCSIFMTU, especially in fwip(4) and in ndis(4).
In ipw(4), remove an if_set_sadl() call that is out of place.
In nfe(4), reuse the jumbo MTU logic in ether_ioctl().
Let ethernets register a callback for setting h/w state such as
promiscuous mode and the multicast filter in accord with a change
in the if_flags: ether_set_ifflags_cb() registers a callback that
returns ENETRESET if the caller should reset the ethernet by calling
if_init(), 0 on success, != 0 on failure. Pull common code from
ex(4), gem(4), nfe(4), sip(4), tlp(4), vge(4) into ether_ioctl(),
and register if_flags callbacks for those drivers.
Return ENOTTY instead of EINVAL for inappropriate ioctls. In
zyd(4), use ENXIO instead of ENOTTY to indicate that the device is
not any longer attached.
Add to if_set_sadl() a boolean 'factory' argument that indicates
whether a link-layer address was assigned by the factory or some
other source. In a comment, recommend using the factory address
for generating an EUI64, and update in6_get_hw_ifid() to prefer a
factory address to any other link-layer address.
Add a routing message, RTM_LLINFO_UPD, that tells protocols to
update the binding of network-layer addresses to link-layer addresses.
Implement this message in IPv4 and IPv6 by sending a gratuitous
ARP or a neighbor advertisement, respectively. Generate RTM_LLINFO_UPD
messages on a change of an interface's link-layer address.
In ether_ioctl(), do not let SIOCALIFADDR set a link-layer address
that is broadcast/multicast or equal to 00:00:00:00:00:00.
Make ether_ioctl() call ifioctl_common() to handle ioctls that it
does not understand.
In gif(4), initialize if_softc and use it, instead of assuming that
the gif_softc and ifp overlap.
Let ifioctl_common() handle SIOCGIFADDR.
Sprinkle rtcache_invariants(), which checks on DIAGNOSTIC kernels
that certain invariants on a struct route are satisfied.
In agr(4), rewrite agr_ioctl_filter() to be a bit more explicit
about the ioctls that we do not allow on an agr(4) member interface.
bzero -> memset. Delete unnecessary casts to void *. Use
sockaddr_in_init() and sockaddr_in6_init(). Compare pointers with
NULL instead of "testing truth". Replace some instances of (type
*)0 with NULL. Change some K&R prototypes to ANSI C, and join
lines.
|
| 1.14 | 28-Apr-2008 |
martin | branches: 1.14.6; 1.14.8;
Remove clause 3 and 4 from TNF licenses
|
| 1.13 | 11-Mar-2008 |
dyoung | branches: 1.13.2; 1.13.4;
Prepare for PMF self-suspension: in the if_stop() methods, clear
IFF_UP and IFF_RUNNING before running the 'disable' step, instead
of after. Soon I will handle the 'disable' step by calling into
PMF, which may call if_stop(, 0). Ordinarily, that is harmless.
This change lets the if_stop() routines exit early when they find
on entry that IFF_RUNNING is not set.
|
| 1.12 | 11-Mar-2008 |
dyoung | Use device_t and accessors.
|
| 1.11 | 23-Jan-2008 |
dyoung | branches: 1.11.2; 1.11.6;
Make this compile again: delete an unused variable from ae_ioctl().
|
| 1.10 | 19-Jan-2008 |
dyoung | Make many ethernet drivers share the common code for MII media
handling, ether_mediastatus() and ether_mediachange(). Check for
a non-ENXIO error return from mii_mediachg(). (ENXIO indicates
that a PHY is suspended.)
This patch shrinks the source code size by 979 lines. There was
a 5100-byte savings on the NetBSD/i386 kernel configuration, ALL.
I have made a few miscellaneous changes, too:
gem(4): use LIST_EMPTY(), LIST_FOREACH().
mtd(4): handle media ioctls, for a change!
axe(4): do not track link status in sc->axe_link any longer
nfe(4), aue(4), axe(4), udav(4), url(4): do not reset all PHYs
on a change of media
Except for the change to mtd(4), no functional changes are intended.
XXX This patch affects more architectures than I can feasibly
XXX compile and run. I have compiled macppc, sparc64, i386. I
XXX have run the patches on i386 boxen with bnx(4) and sip(4).
XXX Compiling and running on evbmips (MERAKI, ADM5120) is in
XXX progress.
|
| 1.9 | 17-Oct-2007 |
garbled | branches: 1.9.2; 1.9.8;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.8 | 29-Sep-2007 |
scw | s/NPBFILTER/NBPFILTER/ in #endif comment. No functional change.
|
| 1.7 | 26-Aug-2007 |
dyoung | branches: 1.7.2; 1.7.4;
Constify.
|
| 1.6 | 09-Jul-2007 |
ad | branches: 1.6.4; 1.6.8;
Merge some of the less invasive changes from the vmlocking branch:
- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements
|
| 1.5 | 04-Mar-2007 |
christos | branches: 1.5.2; 1.5.4; 1.5.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.4 | 24-Sep-2006 |
jmcneill | branches: 1.4.4;
Add "name" parameter to powerhook_establish, to aid debugging. No objections
on tech-kern@
|
| 1.3 | 04-Sep-2006 |
gdamore | branches: 1.3.2; 1.3.4; 1.3.6;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.2 | 05-May-2006 |
thorpej | branches: 1.2.6;
Remove the devprop API and switch everthing over to the new proplib. Add
a new device_properties() accessor for device_t that returns the device's
property dictionary.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.8.3 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 21-Mar-2006 |
simonb | file if_ae.c was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.6.3 | 11-May-2006 |
elad | sync with head
|
| 1.1.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.6.1 | 21-Mar-2006 |
elad | file if_ae.c was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.1.4.4 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.3 | 24-May-2006 |
yamt | sync with head.
|
| 1.1.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.1.4.1 | 21-Mar-2006 |
yamt | file if_ae.c was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.1.2.3 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file if_ae.c was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.2.6.8 | 17-Mar-2008 |
yamt | sync with head.
|
| 1.2.6.7 | 04-Feb-2008 |
yamt | sync with head.
|
| 1.2.6.6 | 21-Jan-2008 |
yamt | sync with head
|
| 1.2.6.5 | 27-Oct-2007 |
yamt | sync with head.
|
| 1.2.6.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.2.6.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.6.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.6.1 | 05-May-2006 |
yamt | file if_ae.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.3.6.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.3.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.4.1 | 04-Sep-2006 |
rpaulo | file if_ae.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.3.2.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.4.4.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.5.10.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.5.4.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.5.2.2 | 09-Oct-2007 |
ad | Sync with head.
|
| 1.5.2.1 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.6.8.2 | 02-Oct-2007 |
joerg | Sync with HEAD.
|
| 1.6.8.1 | 03-Sep-2007 |
jmcneill | Sync with HEAD.
|
| 1.6.4.1 | 03-Sep-2007 |
skrll | Sync with HEAD.
|
| 1.7.4.1 | 06-Oct-2007 |
yamt | sync with head.
|
| 1.7.2.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.7.2.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.9.8.2 | 23-Jan-2008 |
bouyer | Sync with HEAD.
|
| 1.9.8.1 | 20-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.9.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.11.6.3 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.11.6.2 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.11.6.1 | 03-Apr-2008 |
mjf | Sync with HEAD.
|
| 1.11.2.1 | 24-Mar-2008 |
keiichi | sync with head.
|
| 1.13.4.4 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.13.4.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.13.4.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.13.4.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.13.2.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.14.8.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.14.6.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.18.4.1 | 30-May-2010 |
rmind | sync with head
|
| 1.18.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.21.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.21.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.21.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.23.2.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.23.2.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.23.2.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.24.10.1 | 07-Apr-2014 |
tls | Be a little more clear and consistent about harvesting entropy from devices:
1) deprecate RND_FLAG_NO_ESTIMATE
2) define RND_FLAG_COLLECT_TIME, RND_FLAG_COLLECT_VALUE
3) define RND_FLAG_ESTIMATE_TIME, RND_FLAG_ESTIMATE_VALUE
4) define RND_FLAG_DEFAULT: RND_FLAG_COLLECT_TIME|
RND_FLAG_COLLECT_VALUE|RND_FLAG_ESTIMATE_TIME
5) Make entropy harvesting from environmental sensors a little more generic
and remove it from individual sensor drivers.
6) Remove individual open-coded delta-estimators for values from a few
places in the tree (uvm, environmental drivers).
7) 0 -> RND_FLAG_DEFAULT, actually gather entropy from various drivers
that had stubbed out code, other minor cleanups.
|
| 1.25.4.4 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.25.4.3 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.25.4.2 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.25.4.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.25.2.1 | 05-Nov-2015 |
riz | Pull up revisions (requested by nisimura in ticket #978):
sys/arch/mips/atheros/dev/athflash.c: 1.9
sys/arch/mips/atheros/dev/if_ae.c: 1.25
remove unused variables which break AP30 and MERAKI kernel builds.
|
| 1.28.2.1 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.30.14.2 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.30.14.1 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.31.2.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.31.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.31.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.37.2.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.44.2.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.23 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.22 | 12-Feb-2012 |
matt | Change old-style function defintions to C89 prototypes.
Approved by releng.
|
| 1.21 | 10-Jul-2011 |
matt | branches: 1.21.2; 1.21.6;
Cleanup machine includes
|
| 1.20 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.19 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.18 | 24-Feb-2010 |
dyoung | A pointer typedef entails trading too much flexibility to declare const
and non-const types, and the kernel uses both const and non-const
PMF qualifiers and device suspensors, so change the pmf_qual_t and
device_suspensor_t typedefs from "pointers to const" to non-pointer,
non-const types.
|
| 1.17 | 08-Jan-2010 |
dyoung | branches: 1.17.2;
Expand PMF_FN_* macros.
|
| 1.16 | 06-Jul-2009 |
alc | Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.15 | 09-Jul-2008 |
joerg | branches: 1.15.4; 1.15.12;
- device/softc split for ath(4)
|
| 1.14 | 10-May-2008 |
martin | branches: 1.14.2; 1.14.4;
Backout previous: the license sweep touched these files in error, so
restore the old license.
|
| 1.13 | 28-Apr-2008 |
martin | branches: 1.13.2;
Remove clause 3 and 4 from TNF licenses
|
| 1.12 | 12-Mar-2008 |
dyoung | branches: 1.12.4;
Do not use sc_invalid, it is no more.
|
| 1.11 | 29-Feb-2008 |
dyoung | Use PMF_FN_ARGS, PMF_FN_PROTO.
|
| 1.10 | 07-Jan-2008 |
dyoung | branches: 1.10.2; 1.10.6;
Use pmf(9). Use device_t and device_private().
|
| 1.9 | 24-Jan-2007 |
hubertf | branches: 1.9.24; 1.9.30; 1.9.36;
Remove duplicate #includes, patch contributed in private mail
by Slava Semushin <slava.semushin@gmail.com>.
To verify that no nasty side effects of duplicate includes (or their
removal) have an effect here, I've compiled an i386/ALL kernel with
and without the patch, and the only difference in the resulting .o
files was in shifted line numbers in some assert() calls.
The comparison of the .o files was based on the output of "objdump -D".
Thanks to martin@ for the input on testing.
|
| 1.8 | 26-Sep-2006 |
gdamore | Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.7 | 04-Sep-2006 |
gdamore | branches: 1.7.2; 1.7.4; 1.7.6;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.6 | 28-Aug-2006 |
gdamore | First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.5 | 14-Jul-2006 |
seanb | Consistently establish / disestablish shutdown hook
in the bus layer and remove from common ath_attach().
Having it in both layers (on some bus architectures)
was causing a double call to ath_stop() on shutdown
which in turn was tickling the bus lockup described
therin on slower machines.
|
| 1.4 | 05-Jun-2006 |
gdamore | branches: 1.4.4;
Import new HAL 0.9.17.2. Approved by sam@
New HAL includes some driver changes to register accesses.
Adds support for WLAN devices on AR5312 family devices.
Adds support 32-bit SPARC ath devices (untested).
ath enabled in SPARC64 GENERIC builds.
This HAL is tested and known to work for i386 PCI devices, SPARC64 PCI devices,
and AR5312 WiSoC devices. MIPS PCI devices appear to be busted (possibly only
on Alchemy hardware, unconfirmed), and cardbus support is untested due to
lack of test hardware.
Please report any new problems with this import to garrett@.
|
| 1.3 | 07-Apr-2006 |
gdamore | branches: 1.3.2; 1.3.4; 1.3.6; 1.3.8;
Use PCI vendor ID for Atheros.
|
| 1.2 | 02-Apr-2006 |
gdamore | Change to use new HAL layout. (Not in HEAD yet, but since this device
isn't built by default yet, it is harmless to change now.)
Pass DMA tag. Do not register shutdown hooks if attach fails.
Use SYSREG_REVISION for ath device ids.
if_ath_arbus isn't operational yet, but it is much closer now.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.2.3 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file if_ath_arbus.c was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.3.8.1 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.3.6.3 | 07-Jun-2006 |
kardel | Sync with head.
|
| 1.3.6.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.3.6.1 | 07-Apr-2006 |
simonb | file if_ath_arbus.c was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.3.4.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.3.4.1 | 07-Apr-2006 |
elad | file if_ath_arbus.c was added on branch elad-kernelauth on 2006-04-19 02:33:12 +0000
|
| 1.3.2.7 | 15-Sep-2006 |
yamt | fix a merge botch.
|
| 1.3.2.6 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.3.2.5 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.3.2.4 | 11-Aug-2006 |
yamt | sync with head
|
| 1.3.2.3 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.3.2.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.3.2.1 | 07-Apr-2006 |
yamt | file if_ath_arbus.c was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.4.4.6 | 17-Mar-2008 |
yamt | sync with head.
|
| 1.4.4.5 | 21-Jan-2008 |
yamt | sync with head
|
| 1.4.4.4 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.4.4.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.4.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.4.1 | 05-Jun-2006 |
yamt | file if_ath_arbus.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.7.6.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.7.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.7.4.1 | 04-Sep-2006 |
rpaulo | file if_ath_arbus.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.7.2.2 | 01-Feb-2007 |
ad | Sync with head.
|
| 1.7.2.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.9.36.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.9.30.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.9.24.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.9.24.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.10.6.2 | 28-Sep-2008 |
mjf | Sync with HEAD.
|
| 1.10.6.1 | 03-Apr-2008 |
mjf | Sync with HEAD.
|
| 1.10.2.1 | 24-Mar-2008 |
keiichi | sync with head.
|
| 1.12.4.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.12.4.2 | 18-Jul-2009 |
yamt | sync with head.
|
| 1.12.4.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.13.2.2 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.13.2.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.14.4.1 | 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.14.2.1 | 18-Jul-2008 |
simonb | Sync with head.
|
| 1.15.12.1 | 21-Apr-2010 |
matt | sync with netbsd-5
|
| 1.15.4.1 | 07-Aug-2009 |
snj | Pull up following revision(s) (requested by jmcneill in ticket #775):
sys/arch/mips/atheros/ar5312_board.c: revision 1.2
sys/arch/mips/atheros/ar5315.c: revision 1.6
sys/arch/mips/atheros/ar5315_board.c: revision 1.2
sys/arch/mips/atheros/dev/if_ath_arbus.c: revision 1.16
sys/arch/mips/atheros/include/ar5312reg.h: revision 1.3
Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.17.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.21.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.21.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.6 | 10-Nov-2021 |
msaitoh | s/endianess/endianness/
|
| 1.5 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.4 | 24-Apr-2021 |
thorpej | branches: 1.4.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.3 | 23-Apr-2016 |
skrll | branches: 1.3.32;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.2 | 26-Jun-2015 |
matt | #include <mips/locore.h> and other include cleanups.
|
| 1.1 | 07-Jul-2011 |
matt | branches: 1.1.12; 1.1.28; 1.1.30; 1.1.34;
Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.1.34.1 | 06-Sep-2016 |
skrll | First pass at netbsd-7 updated with USB code from HEAD
|
| 1.1.30.4 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.30.3 | 05-Dec-2014 |
skrll | Use int for return type for [eou]chi_init and motg_init.
|
| 1.1.30.2 | 03-Dec-2014 |
skrll | The grand renaming of structure members.
No functional change.
|
| 1.1.30.1 | 03-Dec-2014 |
skrll | Trailing whitespace.
|
| 1.1.28.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.1.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.32.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.4.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.4 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.3 | 06-Jul-2009 |
alc | Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.2 | 04-Sep-2006 |
gdamore | branches: 1.2.4; 1.2.10; 1.2.64; 1.2.74; 1.2.82;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.1 | 28-Aug-2006 |
gdamore | branches: 1.1.2;
First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.1.2.3 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 28-Aug-2006 |
yamt | file ar5312reg.h was added on branch yamt-pdpolicy on 2006-09-03 15:23:21 +0000
|
| 1.2.82.1 | 21-Apr-2010 |
matt | sync with netbsd-5
|
| 1.2.74.1 | 07-Aug-2009 |
snj | Pull up following revision(s) (requested by jmcneill in ticket #775):
sys/arch/mips/atheros/ar5312_board.c: revision 1.2
sys/arch/mips/atheros/ar5315.c: revision 1.6
sys/arch/mips/atheros/ar5315_board.c: revision 1.2
sys/arch/mips/atheros/dev/if_ath_arbus.c: revision 1.16
sys/arch/mips/atheros/include/ar5312reg.h: revision 1.3
Update reference to the Atheros HAL exported headers.
`external/isc/atheros_hal/dist', former `contrib/dev/ath/' is now in cpp(1)'s
include path.
Fix build of MERAKI kernel.
|
| 1.2.64.1 | 18-Jul-2009 |
yamt | sync with head.
|
| 1.2.10.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.10.1 | 04-Sep-2006 |
yamt | file ar5312reg.h was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.2.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.4.1 | 04-Sep-2006 |
rpaulo | file ar5312reg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.3 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.2 | 26-Sep-2006 |
gdamore | branches: 1.2.2; 1.2.4; 1.2.8;
Dynamically calculate the memory size. The math is suspect, but the
results are at least accurate. (This was reverse engineered from the
redboot sources, which is one of the reasons why the math is suspect.)
|
| 1.1 | 26-Sep-2006 |
gdamore | Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.2.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.8.1 | 26-Sep-2006 |
yamt | file ar5315reg.h was added on branch yamt-lazymbuf on 2006-12-30 20:46:30 +0000
|
| 1.2.4.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.2.4.1 | 26-Sep-2006 |
ad | file ar5315reg.h was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.2.2.2 | 22-Oct-2006 |
yamt | sync with head
|
| 1.2.2.1 | 26-Sep-2006 |
yamt | file ar5315reg.h was added on branch yamt-splraiseipl on 2006-10-22 06:04:52 +0000
|
| 1.5 | 28-Aug-2006 |
gdamore | First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.4 | 09-Jun-2006 |
gdamore | branches: 1.4.4;
Add AR531X_SYSREG_WDOG_TIMER register. (Forgot to commit this earlier.)
|
| 1.3 | 05-Jun-2006 |
gdamore | Import new HAL 0.9.17.2. Approved by sam@
New HAL includes some driver changes to register accesses.
Adds support for WLAN devices on AR5312 family devices.
Adds support 32-bit SPARC ath devices (untested).
ath enabled in SPARC64 GENERIC builds.
This HAL is tested and known to work for i386 PCI devices, SPARC64 PCI devices,
and AR5312 WiSoC devices. MIPS PCI devices appear to be busted (possibly only
on Alchemy hardware, unconfirmed), and cardbus support is untested due to
lack of test hardware.
Please report any new problems with this import to garrett@.
|
| 1.2 | 07-Apr-2006 |
gdamore | branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8;
Add unified AR531X_REVISION_WMAC.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.2.3 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file ar531xreg.h was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.2.8.1 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.2.6.3 | 07-Jun-2006 |
kardel | Sync with head.
|
| 1.2.6.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.6.1 | 07-Apr-2006 |
simonb | file ar531xreg.h was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.2.4.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.2.4.1 | 07-Apr-2006 |
elad | file ar531xreg.h was added on branch elad-kernelauth on 2006-04-19 02:33:18 +0000
|
| 1.2.2.4 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.2.2.3 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.2.2.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.2.2.1 | 07-Apr-2006 |
yamt | file ar531xreg.h was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.4.4.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.4.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.4.1 | 09-Jun-2006 |
yamt | file ar531xreg.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.8 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.7 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.6 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.5 | 26-Sep-2006 |
gdamore | branches: 1.5.74; 1.5.78; 1.5.84; 1.5.86;
Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.4 | 04-Sep-2006 |
gdamore | branches: 1.4.2; 1.4.4; 1.4.6;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.3 | 28-Aug-2006 |
gdamore | First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.2 | 05-Jun-2006 |
gdamore | branches: 1.2.4;
Import new HAL 0.9.17.2. Approved by sam@
New HAL includes some driver changes to register accesses.
Adds support for WLAN devices on AR5312 family devices.
Adds support 32-bit SPARC ath devices (untested).
ath enabled in SPARC64 GENERIC builds.
This HAL is tested and known to work for i386 PCI devices, SPARC64 PCI devices,
and AR5312 WiSoC devices. MIPS PCI devices appear to be busted (possibly only
on Alchemy hardware, unconfirmed), and cardbus support is untested due to
lack of test hardware.
Please report any new problems with this import to garrett@.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.10.1 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.1.8.3 | 07-Jun-2006 |
kardel | Sync with head.
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 21-Mar-2006 |
simonb | file ar531xvar.h was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.6.1 | 21-Mar-2006 |
elad | file ar531xvar.h was added on branch elad-kernelauth on 2006-04-19 02:33:18 +0000
|
| 1.1.4.5 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.4 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.3 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.1.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.1.4.1 | 21-Mar-2006 |
yamt | file ar531xvar.h was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file ar531xvar.h was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.2.4.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.4.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.4.1 | 05-Jun-2006 |
yamt | file ar531xvar.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.4.6.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.4.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.4.4.1 | 04-Sep-2006 |
rpaulo | file ar531xvar.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.4.2.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.5.86.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.5.84.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.78.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.5.74.1 | 15-Feb-2010 |
matt | Adapt to the new interrupt framework for NetBSD/mips.
|
| 1.2 | 10-Jul-2011 |
matt | Fix machine/ includes
|
| 1.1 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.5 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.4 | 10-Jul-2011 |
matt | branches: 1.4.12; 1.4.30;
Add athers_get_uart_freq() (since AR7240 uses the ref_clk, not the bus_clk).
Add little endian bus_space_tag for arbus.
Add EHCI attachment for arbus.
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 04-Sep-2006 |
gdamore | branches: 1.2.4;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.14;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.14.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.14.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.14.1 | 21-Mar-2006 |
yamt | file arbusvar.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 21-Mar-2006 |
simonb | file arbusvar.h was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.6.1 | 21-Mar-2006 |
elad | file arbusvar.h was added on branch elad-kernelauth on 2006-04-19 02:33:18 +0000
|
| 1.1.4.3 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.1.4.1 | 21-Mar-2006 |
yamt | file arbusvar.h was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file arbusvar.h was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.2.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.4.1 | 04-Sep-2006 |
rpaulo | file arbusvar.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:25 +0000
|
| 1.4.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.4.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2 | 10-Jul-2011 |
matt | Add athers_get_uart_freq() (since AR7240 uses the ref_clk, not the bus_clk).
Add little endian bus_space_tag for arbus.
Add EHCI attachment for arbus.
|
| 1.1 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.5 | 10-Jul-2011 |
matt | Fix machine/ includes
|
| 1.4 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.74; 1.3.76; 1.3.78;
merge ktrace-lwp.
|
| 1.2 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.1 | 09-Jan-2002 |
thorpej | branches: 1.1.2; 1.1.4; 1.1.20;
Add code to manipulate the BONITO I/O Buffer Cache.
|
| 1.1.20.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.20.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.20.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.4.2 | 11-Jan-2002 |
nathanw | More catchup.
|
| 1.1.4.1 | 09-Jan-2002 |
nathanw | file bonito_iobc.c was added on branch nathanw_sa on 2002-01-11 23:38:38 +0000
|
| 1.1.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.1.2.1 | 09-Jan-2002 |
thorpej | file bonito_iobc.c was added on branch kqueue on 2002-01-10 19:45:56 +0000
|
| 1.3.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.3.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.3.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.12 | 02-Oct-2015 |
msaitoh | PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific
|
| 1.11 | 11-Mar-2014 |
mrg | branches: 1.11.6;
avoid set but unused variables.
move variables under their usage #ifdef.
|
| 1.10 | 27-Aug-2011 |
bouyer | branches: 1.10.2; 1.10.12; 1.10.16;
Loongson2f support:
- make the 'struct bonito_config' const, so that it can be in kernel
text instead of data.
- Add a bc_attach_hook to struct bonito_config, to be used as pc_attach_hook
if not NULL.
- Add some LS2-specific register defines (LS2f uses a modified bonito64).
|
| 1.9 | 10-Jul-2011 |
matt | Fix machine/ includes
|
| 1.8 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.7 | 09-Aug-2009 |
matt | s/struct device */device_t /g
|
| 1.6 | 06-Aug-2009 |
matt | Use bool instead of int.
|
| 1.5 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.4 | 11-Dec-2005 |
christos | branches: 1.4.74; 1.4.76; 1.4.78;
merge ktrace-lwp.
|
| 1.3 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.2 | 18-Aug-2002 |
simonb | branches: 1.2.6;
Issue a dummy read after a write to the BONITO_PCIMAP_CFG register to
make sure the write is posted; needed to keep the BONITO64 happy.
|
| 1.1 | 22-Jun-2001 |
thorpej | branches: 1.1.2; 1.1.8; 1.1.16;
PCI configuration space access for BONITO.
|
| 1.1.16.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.8.2 | 27-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.1.8.1 | 22-Jun-2001 |
nathanw | file bonito_pci.c was added on branch nathanw_sa on 2002-08-27 23:44:48 +0000
|
| 1.1.2.1 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.2.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.4.78.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.4.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.4.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.4.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.10.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.10.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.10.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.11.6.1 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.8 | 16-Apr-2013 |
macallan | add definitions for Loongson 2F Chip Config register
|
| 1.7 | 27-Aug-2011 |
bouyer | branches: 1.7.2; 1.7.12;
Loongson2f support:
- make the 'struct bonito_config' const, so that it can be in kernel
text instead of data.
- Add a bc_attach_hook to struct bonito_config, to be used as pc_attach_hook
if not NULL.
- Add some LS2-specific register defines (LS2f uses a modified bonito64).
|
| 1.6 | 24-Dec-2005 |
perry | Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.5 | 18-Aug-2002 |
simonb | branches: 1.5.22;
Update to rev 1.48 from Algorithmics; adds BONITO64 register definitions.
|
| 1.4 | 09-Jan-2002 |
thorpej | branches: 1.4.8;
Add the BONITO_ICU_RETRYERR bit.
|
| 1.3 | 25-Jun-2001 |
thorpej | branches: 1.3.2; 1.3.8;
Add some macros to decode the BONITO revision register.
|
| 1.2 | 22-Jun-2001 |
thorpej | Add a definition for BONITO_PCIMAPCFG_TYPE1, and make the BONITO
accessor macros useful in the NetBSD kernel environment.
|
| 1.1 | 01-Jun-2001 |
thorpej | Memory map and register definitions for the Algorithmics BONITO
MIPS memory and PCI controller. This file is provided by Algorithmics.
|
| 1.3.8.4 | 27-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.3.8.3 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.3.8.2 | 11-Jan-2002 |
nathanw | More catchup.
|
| 1.3.8.1 | 25-Jun-2001 |
nathanw | file bonitoreg.h was added on branch nathanw_sa on 2002-01-11 23:38:38 +0000
|
| 1.3.2.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.3.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.4.8.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.5.22.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.7.12.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.7.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.6 | 09-Jun-2015 |
matt | #include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.5 | 27-Aug-2011 |
bouyer | branches: 1.5.12; 1.5.30;
Loongson2f support:
- make the 'struct bonito_config' const, so that it can be in kernel
text instead of data.
- Add a bc_attach_hook to struct bonito_config, to be used as pc_attach_hook
if not NULL.
- Add some LS2-specific register defines (LS2f uses a modified bonito64).
|
| 1.4 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.3 | 09-Jan-2002 |
thorpej | branches: 1.3.118; 1.3.120; 1.3.122;
Update copyright.
|
| 1.2 | 09-Jan-2002 |
thorpej | Add code to manipulate the BONITO I/O Buffer Cache.
|
| 1.1 | 22-Jun-2001 |
thorpej | branches: 1.1.2; 1.1.8;
Basic BONITO software state definitions.
|
| 1.1.8.3 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.1.8.2 | 11-Jan-2002 |
nathanw | More catchup.
|
| 1.1.8.1 | 22-Jun-2001 |
nathanw | file bonitovar.h was added on branch nathanw_sa on 2002-01-11 23:38:38 +0000
|
| 1.1.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.3.122.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.3.120.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.3.118.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.5.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.5.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file autoconf.h was added on branch tls-maxphys on 2017-12-03 11:36:26 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file autoconf.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.11 | 06-Sep-2025 |
thorpej | Re-factor the console-related code into fdt_console.[ch]
|
| 1.10 | 06-Sep-2021 |
jmcneill | Instead of requiring drivers to be explicit about their device memory
mapping requirements, move this decision into the fdt layer. This
introduces a new MD function, fdtbus_bus_tag_create, which is responsible
for returning per-node bus_space handles.
|
| 1.9 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.8 | 10-May-2021 |
thorpej | branches: 1.8.4;
Specify the "fdt" interface attribute when configuring via FDT, since
mainbus also carries the "mainbus" interface attribute.
|
| 1.7 | 24-Apr-2021 |
thorpej | branches: 1.7.2; 1.7.4;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.6 | 28-Sep-2020 |
jmcneill | branches: 1.6.4;
faa_a4x_bst is gone
|
| 1.5 | 18-Aug-2020 |
simonb | We don't need to call the POW and FGA bootstrap functions from the FDT
mainbus attach, the iobus attach code does this already and is called
for both iobus-only and FDT cases anyway.
After discussion with jmcneill@.
|
| 1.4 | 17-Aug-2020 |
jmcneill | Attach an iobus with octrnm even if using devicetree (there is no
corresponding node for this device in the DT).
|
| 1.3 | 16-Jul-2020 |
jmcneill | Initialize FDT console device
|
| 1.2 | 16-Jul-2020 |
jmcneill | FDT support for Cavium OCTEON MIPS SoCs. WIP.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file mainbus.c was added on branch tls-maxphys on 2017-12-03 11:36:26 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file mainbus.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.6.4.2 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.6.4.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.7.4.1 | 31-May-2021 |
cjep | sync with head
|
| 1.7.2.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.8.4.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2; 1.2.18;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 01-Jun-2015 |
jdolecek | file mainbus_octeon1p.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file mainbus_octeon1p.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.6 | 17-Aug-2020 |
jmcneill | Attach an iobus with octrnm even if using devicetree (there is no
corresponding node for this device in the DT).
|
| 1.5 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
|
| 1.4 | 31-May-2020 |
simonb | Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).
|
| 1.3 | 31-May-2020 |
simonb | Clean up Cavium Octeon device names. Rename devices from "octeon_foo"
to "octfoo" - this follows the naming conventions used by many other
MIPS CPUs.
|
| 1.2 | 01-May-2015 |
hikaru | branches: 1.2.2; 1.2.18;
Use dwc2 instead of octeon_usbc, and unify octeon_usbn to new octeon_dwctwo.
Internal USB memory stick of EdgeRouter Lite works now.
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 01-May-2015 |
jdolecek | file octeon1p_iobus.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-May-2015 |
skrll | file octeon1p_iobus.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.3 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.2 | 24-Apr-2021 |
thorpej | branches: 1.2.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.36;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.36.2 | 22-Mar-2021 |
thorpej | Audit CFARG_IATTR in config_found() calls, and remove it in situations
where the interface attribute is not ambiguous.
|
| 1.1.36.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_bootbus.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_bootbus.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.22 | 03-Mar-2022 |
riastradh | mips: Carefully use device_set_private for cpuN.
But don't do it in cpu_attach_common because the callers aren't set
up right -- instead leave a comment about what's wrong, to be dealt
with later.
|
| 1.21 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.20 | 03-Aug-2021 |
andvar | Fix various typos in comments. Also add missing NetBSD RCS Id in some of these files.
|
| 1.19 | 24-Apr-2021 |
thorpej | branches: 1.19.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.18 | 28-Jul-2020 |
simonb | branches: 1.18.4;
Change cpus_booted back to a simple variable instead of a kcpuset.
octeon_cpu_spinup() was trying to set CPU status immediately on kernel
startup _well_ before the kcpuset was initialised.
|
| 1.17 | 22-Jul-2020 |
jmcneill | Initialize PageMask and Wired registers on secondary processors.
|
| 1.16 | 21-Jul-2020 |
simonb | Support "boot -1" to start an MP kernel in uniprocessor mode.
Sort sys/* includes while here.
|
| 1.15 | 19-Jul-2020 |
simonb | KNF whitespace nits.
|
| 1.14 | 17-Jul-2020 |
jmcneill | Remove 2 CPU limit in OCTEON interrupt controller driver.
|
| 1.13 | 23-Jun-2020 |
simonb | Minor tweaks and cleanup.
|
| 1.12 | 23-Jan-2018 |
maya | if 0 out unused code which is currently breaking my local builds
|
| 1.11 | 22-Jan-2018 |
maya | Fix RCSID (hopefully)
|
| 1.10 | 19-Aug-2016 |
skrll | branches: 1.10.14;
Fix insn #2 printf in octeon_fixup_cpu_info_references
|
| 1.9 | 19-Aug-2016 |
skrll | Remove useless cast
|
| 1.8 | 19-Aug-2016 |
martin | Typo in #ifdef - the per cpu wdog softint wasn't initialized.
|
| 1.7 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.6 | 11-Jul-2016 |
skrll | Fix an aprint_normal
|
| 1.5 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.4 | 09-Jun-2015 |
martin | Reenable preemption before returning an error when trying to set the
watchdog to an invalid period.
|
| 1.3 | 06-Jun-2015 |
matt | Use ci_nmi_stack
|
| 1.2 | 06-Jun-2015 |
matt | Add wdog support
cleanup IPI and MP support
Add NMI support.
|
| 1.1 | 01-Jun-2015 |
matt | branches: 1.1.2;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1.2.4 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.2.3 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 01-Jun-2015 |
skrll | file octeon_cpunode.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.10.14.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.14.1 | 19-Aug-2016 |
jdolecek | file octeon_cpunode.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.18.4.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.19.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 15-Dec-2019 |
tsutsui | Remove clause 3 and 4 leftovers from TNF licenses in more sources.
Confirmed by martin@ in PR/54760.
|
| 1.2 | 11-Jul-2016 |
matt | branches: 1.2.16; 1.2.20; 1.2.24;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.2.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_dma.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2.24.1 | 18-Dec-2019 |
martin | Pull up following revision(s) (requested by tsutsui in ticket #570):
sys/compat/netbsd32/netbsd32_compat_50_sysv.c: revision 1.3
sys/dev/raidframe/rf_compat50.h: revision 1.6
sys/arch/emips/emips/bus_space.c: revision 1.3
sys/compat/net/if.h: revision 1.5
sys/arch/emips/stand/common/bootinfo.c: revision 1.2
sys/compat/common/sysv_msg_50.c: revision 1.5
sys/compat/common/kern_time_30.c: revision 1.8
sys/arch/emips/stand/common/bootinfo.h: revision 1.2
sys/arch/ia64/include/bus.h: revision 1.4
sys/arch/ia64/ia64/bus_space.c: revision 1.2
sys/compat/common/sysv_shm_50.c: revision 1.5
sys/dev/ic/adw.h: revision 1.15
sys/compat/common/uipc_syscalls_50.c: revision 1.10
sys/arch/emips/ebus/flash_ebus.c: revision 1.22
sys/dev/ic/adv.h: revision 1.15
sys/dev/ic/adwmcode.c: revision 1.18
sys/dev/ic/advlib.c: revision 1.29
sys/arch/hpcarm/include/kloader.h: revision 1.3
sys/dev/usb/uberry.c: revision 1.16
sys/compat/common/sysv_sem_50.c: revision 1.5
sys/compat/netbsd32/netbsd32_compat_50.c: revision 1.43
sys/dev/ic/advlib.h: revision 1.21
sys/dev/ic/adv.c: revision 1.50
sys/compat/netinet6/in6_var.h: revision 1.5
sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm: revision 1.2
sys/arch/emips/include/loadfile_machdep.h: revision 1.3
sys/arch/emips/stand/common/prom_iface.c: revision 1.7
sys/dev/ic/adw.c: revision 1.56
sys/dev/ic/adwmcode.h: revision 1.12
sys/dev/ic/advmcode.c: revision 1.10
sys/arch/emips/ebus/ace_ebus.c: revision 1.22
sys/compat/netbsd32/netbsd32_compat_60.c: revision 1.5
sys/dev/raidframe/rf_compat50.c: revision 1.13
sys/arch/x68k/dev/intiovar.h: revision 1.15
sys/dev/usb/uipad.c: revision 1.8
sys/arch/zaurus/include/kloader.h: revision 1.3
sys/arch/emips/stand/common/bootxx.c: revision 1.2
sys/dev/ic/adwlib.h: revision 1.23
sys/dev/ic/adwlib.c: revision 1.44
sys/compat/netbsd32/netbsd32_compat_16.c: revision 1.3
sys/arch/amigappc/include/intr.h: revision 1.27
sys/arch/x68k/dev/mfp.c: revision 1.27
sys/arch/arm/at91/at91dbgu.c: revision 1.17
sys/dev/ic/advmcode.h: revision 1.7
sys/compat/ultrix/ultrix_exec.h: revision 1.7
sys/compat/common/vfs_syscalls_50.c: revision 1.24
sys/arch/mips/cavium/octeon_dma.c: revision 1.3
sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm: revision 1.2
Remove clause 3 and 4 from TNF licenses.
Ok'ed by martin@ in PR/54760.
Remove clause 3 and 4 leftovers from TNF licenses in more sources.
Confirmed by martin@ in PR/54760.
|
| 1.2.20.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.2.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.16.1 | 11-Jul-2016 |
jdolecek | file octeon_dma.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.27 | 09-Apr-2022 |
riastradh | mips/cavium: Insert appropriate membars around IPIs.
|
| 1.26 | 26-Mar-2022 |
riastradh | mips/cavium: Simplify membars around interrupt establishment.
Previously I used xc_barrier to ensure the initialization of the
struct octeon_intrhand was witnessed on all CPUs before publishing
it, in order to avoid needing any barrier on the usage side to be
issued by the interrupt handler.
But there's no need to avoid atomic_load_consume at time of
interrupt: on MIPS it's the same as atomic_load_relaxed anyway, so
there's no additional memory barrier cost here.
|
| 1.25 | 23-Mar-2022 |
riastradh | mips/cavium: Fix membars around establishing interrupt handlers.
|
| 1.24 | 18-Aug-2020 |
skrll | Fix MULTIPROCESSOR build
|
| 1.23 | 17-Aug-2020 |
jmcneill | IPI_SHOOTDOWN needs to be IPL_SCHED. Spotted by nick.
|
| 1.22 | 05-Aug-2020 |
simonb | Apply some static to some symbols.
|
| 1.21 | 05-Aug-2020 |
simonb | Target all device interrupts to cpu0.
Patch from skrll@. Code is conditional, hopefully not needed long term.
|
| 1.20 | 20-Jul-2020 |
jmcneill | Simplify IPI handling even more for now and run everything at IPL_HIGH.
|
| 1.19 | 20-Jul-2020 |
jmcneill | Fix confusion between ipi bitmask and mbox register bit assignments.
|
| 1.18 | 17-Jul-2020 |
jmcneill | Remove 2 CPU limit in OCTEON interrupt controller driver.
|
| 1.17 | 17-Jul-2020 |
jmcneill | Simplify IPI handling and change IPLs of IPI_HALT, IPI_XCALL, and
IPI_GENERIC from IPL_SCHED to IPL_HIGH.
|
| 1.16 | 17-Jul-2020 |
jmcneill | Cleanup handling of multiple banks.
|
| 1.15 | 16-Jul-2020 |
jmcneill | Support 128 IRQs instead of 64. This is icky and needs to be cleaned up.
|
| 1.14 | 23-Jun-2020 |
simonb | Don't include "opt_octeon.h" any more.
|
| 1.13 | 20-Jun-2020 |
riastradh | Nix trailing whitespace.
|
| 1.12 | 19-Jun-2020 |
simonb | Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.
|
| 1.11 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.10 | 30-Mar-2017 |
skrll | branches: 1.10.12;
Indentation
|
| 1.9 | 28-Nov-2016 |
mrg | branches: 1.9.2;
fix non-DIAG builds.
|
| 1.8 | 31-Oct-2016 |
skrll | Fixup IPI interrupt delivery and splsched mask so that
sys/uvm/pmap/pmap_tlb.c
541 KASSERTMSG(ci->ci_cpl >= IPL_SCHED,
542 "%s: cpl (%d) < IPL_SCHED (%d)",
543 __func__, ci->ci_cpl, IPL_SCHED);
doesn't fire.
|
| 1.7 | 20-Aug-2016 |
skrll | Need to set ci_request_ipis otherwise they won't get delivered.
Correct the test for the IPL_HIGH ipis
|
| 1.6 | 12-Jul-2016 |
skrll | branches: 1.6.2;
#include "opt_multiprocessor.h" as this file has #ifdef MULTIPROCESSOR
|
| 1.5 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.4 | 06-Jun-2015 |
matt | Add wdog support
cleanup IPI and MP support
Add NMI support.
|
| 1.3 | 01-Jun-2015 |
matt | branches: 1.3.2;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.2 | 19-May-2015 |
matt | Add per irq evcnt's
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.3.2.6 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.3.2.5 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.3.2.4 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.3.2.3 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.3.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 01-Jun-2015 |
skrll | file octeon_intr.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.6.2.3 | 26-Apr-2017 |
pgoyette | Sync with HEAD
|
| 1.6.2.2 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.6.2.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.9.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.10.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.12.1 | 30-Mar-2017 |
jdolecek | file octeon_intr.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 17-Aug-2020 |
jmcneill | branches: 1.5.4;
Attach an iobus with octrnm even if using devicetree (there is no
corresponding node for this device in the DT).
|
| 1.4 | 23-Jun-2020 |
simonb | Minor tweaks and cleanup.
|
| 1.3 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2; 1.2.18;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 01-Jun-2015 |
jdolecek | file octeon_iobus.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file octeon_iobus.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5.4.2 | 22-Mar-2021 |
thorpej | Audit CFARG_IATTR in config_found() calls, and remove it in situations
where the interface attribute is not ambiguous.
|
| 1.5.4.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 06-Feb-2022 |
andvar | fix various typos in comments, log messages and documentation.
mainly s/aparently/apparently/ and s/implmented/implemented/.
|
| 1.1 | 15-Jun-2020 |
simonb | Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 15-Jun-2020 |
simonb | Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)
|
| 1.18 | 26-Jan-2022 |
andvar | remove double t from targeted, add missing r to arbitrary
And fix few more typos along the way in comments and man pages.
|
| 1.17 | 28-Jul-2020 |
simonb | Change cpus_booted back to a simple variable instead of a kcpuset.
octeon_cpu_spinup() was trying to set CPU status immediately on kernel
startup _well_ before the kcpuset was initialised.
|
| 1.16 | 17-Jul-2020 |
jmcneill | Remove 2 CPU limit in OCTEON interrupt controller driver.
|
| 1.15 | 17-Jul-2020 |
jmcneill | Cleanup handling of multiple banks.
|
| 1.14 | 16-Jul-2020 |
jmcneill | Support 128 IRQs instead of 64. This is icky and needs to be cleaned up.
|
| 1.13 | 23-Jun-2020 |
simonb | Cleanup - mostly removing unused code and defines.
|
| 1.12 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.11 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.10 | 15-Jun-2020 |
simonb | Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)
|
| 1.9 | 05-Jun-2020 |
simonb | Rework CVMSEG LM usage a litte:
- remove unused LM slots
- use #defines for defining the size of CVMSEG LM users
XXX: Need to dynamically set CVMMEMCTL[LMEMSZ] during startup so we can
both adapt to any future increase in CVMSEG LM usage and not waste
any more L2 that we need to.
XXX: Still need to move general IOBDMA conf to a different (new?) header.
|
| 1.8 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.7 | 13-May-2020 |
riastradh | Rework octeon_rnm(4) random number generator driver.
- Do a little on-line self-test for fun.
- Draw raw samples from the ring oscillators.
- Draw substantially more samples:
=> early RO samples seem to have considerably lower entropy
=> consecutive RO samples are not independent
- Make sure to use rnd_add_data_sync in the callback.
=> not technically needed in HEAD, but would be needed for pullup
|
| 1.6 | 19-Apr-2018 |
christos | branches: 1.6.6;
s/static inline/static __inline/g for consistency.
|
| 1.5 | 11-Jul-2016 |
matt | branches: 1.5.16; 1.5.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.4 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.3 | 06-Jun-2015 |
matt | Add wdog support
cleanup IPI and MP support
Add NMI support.
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.2.4 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.2.3 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file octeonvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5.18.1 | 22-Apr-2018 |
pgoyette | Sync with HEAD
|
| 1.5.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.16.1 | 11-Jul-2016 |
jdolecek | file octeonvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.6.6.1 | 19-May-2020 |
martin | Pull up following revision(s) (requested by simonb in ticket #918):
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.3
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.4
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.5
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.6 (+ patch)
sys/arch/mips/cavium/dev/octeon_rnmreg.h: revision 1.2
sys/arch/mips/cavium/dev/octeon_rnmreg.h: revision 1.3
sys/arch/mips/cavium/octeonvar.h: revision 1.7
Add a few more bits.
XXX convert to __BITS.
--
If bus_space_map fails, just don't attach the driver instead of panicing.
Check RNG built in self test, don't attach if that fails too.
--
Oceton RNG/RNM driver modernisation to fit new entropy world order by
riastradh@, with some tweaks to get working in RNG mode.
XXX TODO: work out how to get raw entropy mode working.
--
Rework octeon_rnm(4) random number generator driver.
- Do a little on-line self-test for fun.
- Draw raw samples from the ring oscillators.
- Draw substantially more samples:
=3D> early RO samples seem to have considerably lower entropy
=3D> consecutive RO samples are not independent
- Make sure to use rnd_add_data_sync in the callback.
=3D> not technically needed in HEAD, but would be needed for pullup
--
Adjust entropy estimate for the Octeon.
We are hedging in serial and in parallel, and more conservative than
the Linux driver from Cavium seems to be, so although I don't know
exactly what the thermal jitter of the device is, this seems like a
reasonable compromise.
|
| 1.30 | 04-Oct-2025 |
thorpej | Add a shared function to query the common properties used for configuring
an Ethernet address.
|
| 1.29 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.28 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.27 | 18-Sep-2022 |
thorpej | Eliminate use of IFF_OACTIVE.
|
| 1.26 | 27-May-2021 |
simonb | Move the send queue checking to a new function, and also call this
in the rx interrupt path. Measureable improvement on a NFS "create
small files" test.
|
| 1.25 | 27-May-2021 |
simonb | Schedule the send cleanup function for next tick in cnmac_start(). In
the send cleanup function, schedule for the next tick instead of waiting
for HZ ticks if there are still send requests outstanding. Greatly
increases NFS throughput, perhaps other types of network traffic.
Use callout_setfunc() after callout_init() instead of callout_reset().
|
| 1.24 | 23-Jun-2020 |
simonb | branches: 1.24.6; 1.24.8;
Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
Support SGMII mode used on CN70XX.
Most functional changes from OpenBSD octeon port. Still more to come from
the OpenBSD driver.
|
| 1.23 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.22 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.21 | 10-Jun-2020 |
simonb | Update for proplib(3) API changes.
|
| 1.20 | 05-Jun-2020 |
simonb | Rework CVMSEG LM usage a litte:
- remove unused LM slots
- use #defines for defining the size of CVMSEG LM users
XXX: Need to dynamically set CVMMEMCTL[LMEMSZ] during startup so we can
both adapt to any future increase in CVMSEG LM usage and not waste
any more L2 that we need to.
XXX: Still need to move general IOBDMA conf to a different (new?) header.
|
| 1.19 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.18 | 24-Apr-2020 |
mrg | fetch properties in attach rather than every re-init.
this avoids a rwlock while spinlock held problem likely introduced
with MII locking rework, as fetching a property takes an rwlock,
and prior to the rework, only kernel lock would have been held.
ok skrll@.
|
| 1.17 | 18-Feb-2020 |
thorpej | branches: 1.17.4;
- Use ether_mediachange().
- Don't call the media change function directly from the init
function; bounce through mii_ifmedia_change().
|
| 1.16 | 29-Jan-2020 |
thorpej | Adopt <net/if_stats.h>.
|
| 1.15 | 28-Dec-2019 |
gutteridge | branches: 1.15.2;
Fix typos in comments.
|
| 1.14 | 07-Jun-2019 |
martin | Delay setting of the filters at attach time a bit to avoid using an
unitialized mutex. From msaitoh@.
|
| 1.13 | 29-May-2019 |
msaitoh | - Simplify MII structure initialization and reference.
- Use the common path of SIOCGIFMEDIA in sys/net/if_ethersubr.c
|
| 1.12 | 26-Apr-2019 |
msaitoh | No functional change:
- u_int_{8,16,32}_t -> uint_{8,16,32}_t
- KNF.
- Tabify.
- Remove extra space.
|
| 1.11 | 22-Jan-2019 |
msaitoh | Change MII PHY read/write API from:
int (*mii_readreg_t)(device_t, int, int);
void (*mii_writereg_t)(device_t, int, int, int);
to:
int (*mii_readreg_t)(device_t, int, int, uint16_t *);
int (*mii_writereg_t)(device_t, int, int, uint16_t);
Now we can test if a read/write operation failed or not by the return value.
In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.
Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:
arm/at91/at91emac.c
arm/ep93xx/epe.c
arm/omap/omapl1x_emac.c
mips/ralink/ralink_eth.c
arch/powerpc/booke/dev/pq3etsec.c(read)
dev/cadence/if_cemac.c <- hkenken
dev/ic/lan9118.c
Tested with the following device:
axe+ukphy
axe+rgephy
axen+rgephy (tested by Andrius V)
wm+atphy
wm+ukphy
wm+igphy
wm+ihphy
wm+makphy
sk+makphy
sk+brgphy
sk+gentbi
msk+makphy
sip+icsphy
sip+ukphy
re+rgephy
bge+brgphy
bnx+brgphy
gsip+gphyter
rtk+rlphy
fxp+inphy (tested by Andrius V)
tlp+acphy
ex+exphy
epic+qsphy
vge+ciphy (tested by Andrius V)
vr+ukphy (tested by Andrius V)
vte+ukphy (tested by Andrius V)
Not tested (MAC):
arm:at91emac
arm:cemac
arm:epe
arm:geminigmac
arm:enet
arm:cpsw
arm:emac(omac)
arm:emac(sunxi)
arm:npe
evbppc:temac
macppc:bm
macppc:gm
mips:aumac
mips:ae
mips:cnmac
mips:reth
mips:sbmac
playstation2:smap
powerpc:tsec
powerpc:emac(ibm4xx)
sgimips:mec
sparc:be
sf
ne(ax88190, dl10019)
awge
ep
gem
hme
smsh
mtd
sm
age
alc
ale
bce
cas
et
jme
lii
nfe
pcn
ste
stge
tl
xi
aue
mue
smsc
udav
url
Not tested (PHY):
amhphy
bmtphy
dmphy
etphy
glxtphy
ikphy
iophy
lxtphy
nsphyter
pnaphy
rdcphy
sqphy
tlphy
tqphy
urlphy
|
| 1.10 | 03-Sep-2018 |
riastradh | Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.
To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
|
| 1.9 | 26-Jun-2018 |
msaitoh | branches: 1.9.2;
Implement the BPF direction filter (BIOC[GS]DIRECTION). It provides backward
compatibility with BIOC[GS]SEESENT ioctl. The userland interface is the same
as FreeBSD.
This change also fixes a bug that the direction is misunderstand on some
environment by passing the direction to bpf_mtap*() instead of checking
m->m_pkthdr.rcvif.
|
| 1.8 | 01-Jan-2018 |
jmcneill | branches: 1.8.2;
Set and clear IFF_OACTIVE as necessary, and add support for queueing
multiple packets before performing a PKO doorbell write.
|
| 1.7 | 26-Nov-2017 |
jmcneill | branches: 1.7.2;
Set ETHERCAP_VLAN_MTU capability flag.
|
| 1.6 | 22-Aug-2017 |
maya | Reword warning message
|
| 1.5 | 15-Dec-2016 |
ozaki-r | branches: 1.5.8;
Move bpf_mtap and if_ipackets++ on Rx of each driver to percpuq if_input
The benefits of the change are:
- We can reduce codes
- We can provide the same behavior between drivers
- Where/When if_ipackets is counted up
- Note that some drivers still update packet statistics in their own
way (periodical update)
- Moved bpf_mtap run in softint
- This makes it easy to MP-ify bpf
Proposed on tech-kern and tech-net
|
| 1.4 | 11-Jul-2016 |
matt | branches: 1.4.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.3 | 10-Jun-2016 |
ozaki-r | Introduce m_set_rcvif and m_reset_rcvif
The API is used to set (or reset) a received interface of a mbuf.
They are counterpart of m_get_rcvif, which will come in another
commit, hide internal of rcvif operation, and reduce the diff of
the upcoming change.
No functional change.
|
| 1.2 | 09-Feb-2016 |
ozaki-r | Introduce softint-based if_input
This change intends to run the whole network stack in softint context
(or normal LWP), not hardware interrupt context. Note that the work is
still incomplete by this change; to that end, we also have to softint-ify
if_link_state_change (and bpf) which can still run in hardware interrupt.
This change softint-ifies at ifp->if_input that is called from
each device driver (and ieee80211_input) to ensure Layer 2 runs
in softint (e.g., ether_input and bridge_input). To this end,
we provide a framework (called percpuq) that utlizes softint(9)
and percpu ifqueues. With this patch, rxintr of most drivers just
queues received packets and schedules a softint, and the softint
dequeues packets and does rest packet processing.
To minimize changes to each driver, percpuq is allocated in struct
ifnet for now and that is initialized by default (in if_attach).
We probably have to move percpuq to softc of each driver, but it's
future work. At this point, only wm(4) has percpuq in its softc
as a reference implementation.
Additional information including performance numbers can be found
in the thread at tech-kern@ and tech-net@:
http://mail-index.netbsd.org/tech-kern/2016/01/14/msg019997.html
Acknowledgment: riastradh@ greatly helped this work.
Thank you very much!
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.2.7 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.1.2.6 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.1.2.5 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.2.4 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.1.2.3 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file if_cnmac.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.4.2.1 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.5.8.1 | 27-Nov-2017 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #397):
sys/arch/mips/cavium/dev/if_cnmac.c: revision 1.7
Set ETHERCAP_VLAN_MTU capability flag.
|
| 1.7.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7.2.1 | 26-Nov-2017 |
jdolecek | file if_cnmac.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.8.2.3 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.8.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.8.2.1 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.9.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.9.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.15.2.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.17.4.1 | 25-Apr-2020 |
bouyer | Sync with bouyer-xenpvh-base2 (HEAD)
|
| 1.24.8.1 | 31-May-2021 |
cjep | sync with head
|
| 1.24.6.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.5 | 18-Sep-2022 |
thorpej | Eliminate use of IFF_OACTIVE.
|
| 1.4 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
Support SGMII mode used on CN70XX.
Most functional changes from OpenBSD octeon port. Still more to come from
the OpenBSD driver.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file if_cnmacvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file if_cnmacvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.4 | 23-Jun-2020 |
simonb | branches: 1.4.2;
Minor tweaks and cleanup.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_asx.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_asx.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.4.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.2 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_asxreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_asxreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.4 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.3 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_asxvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_asxvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.3 | 22-Jun-2020 |
simonb | Remove more snprintb _BITS bits.
|
| 1.2 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_bootbusreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_bootbusreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.7 | 05-May-2021 |
simonb | Sprinkle some static.
|
| 1.6 | 27-Jan-2021 |
thorpej | branches: 1.6.4;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.5 | 27-Jan-2021 |
thorpej | Use DEVICE_COMPAT_EOL.
|
| 1.4 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.3 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.2 | 15-Jan-2021 |
jmcneill | Add 'const char *xname' arg to fdtbus_interrupt_controller_func .establish
|
| 1.1 | 16-Jul-2020 |
jmcneill | branches: 1.1.2;
Add driver for Cavium Interrupt Bus.
|
| 1.1.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.6.4.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.5 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.4 | 23-Jun-2020 |
simonb | Minor tweaks and cleanup.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_ciu.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_ciu.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.11 | 20-Jul-2020 |
jmcneill | Fix coreX/IP4 summary register offsets
|
| 1.10 | 17-Jul-2020 |
jmcneill | Remove 2 CPU limit in OCTEON interrupt controller driver.
|
| 1.9 | 22-Jun-2020 |
simonb | Remove more snprintb _BITS bits.
|
| 1.8 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.7 | 19-Jun-2020 |
simonb | Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.
|
| 1.6 | 02-Jun-2020 |
simonb | Add a missing entry, clean up a few other incorrect entries.
|
| 1.5 | 20-Aug-2016 |
skrll | branches: 1.5.14;
Fix a couple of (unsed) definitions
|
| 1.4 | 06-Jun-2015 |
matt | Add CIU_BASE
|
| 1.3 | 06-Jun-2015 |
matt | branches: 1.3.2;
Fix CUI_MBOX_{SET,CLR}1 values
|
| 1.2 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.3.2.4 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.3.2.3 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.3.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 06-Jun-2015 |
skrll | file octeon_ciureg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5.14.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.14.1 | 20-Aug-2016 |
jdolecek | file octeon_ciureg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_cop2reg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_cop2reg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_cop2var.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_cop2var.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5 | 04-Aug-2020 |
simonb | Add some CvmCtl bits from newer cnMIPS cores.
|
| 1.4 | 26-Jul-2020 |
simonb | Remove mostly duplicate MIPS spec CP0 regs from octeon_corereg.h, move
the Cavium specific CP0 regs to <mips/cpuregs.h> as done for other core
specific regs.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2; 1.2.18;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 01-Jun-2015 |
jdolecek | file octeon_corereg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file octeon_corereg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.15 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.14 | 24-Apr-2021 |
thorpej | branches: 1.14.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.13 | 23-Jun-2020 |
simonb | branches: 1.13.4;
Make sure we only attach to CN3xxx/CN5xxx.
Cleanup - mostly removing unused code.
|
| 1.12 | 23-Jun-2020 |
simonb | Remove unused octeon*usb*var*h includes.
|
| 1.11 | 19-Jun-2020 |
simonb | Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.
|
| 1.10 | 31-May-2020 |
simonb | Clean up Cavium Octeon device names. Rename devices from "octeon_foo"
to "octfoo" - this follows the naming conventions used by many other
MIPS CPUs.
|
| 1.9 | 12-Jul-2016 |
matt | branches: 1.9.16;
Use mips_lwu
|
| 1.8 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.7 | 26-Apr-2016 |
skrll | Adapt to nick-nhusb merge
|
| 1.6 | 30-Aug-2015 |
skrll | Update for latest dwc2
|
| 1.5 | 30-Jul-2015 |
skrll | Use IPL_VM for dwc2_intr and mark as MP safe where possible.
|
| 1.4 | 22-Jul-2015 |
skrll | Trailing whitespace.
|
| 1.3 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 01-May-2015 |
hikaru | Use dwc2 instead of octeon_usbc, and unify octeon_usbn to new octeon_dwctwo.
Internal USB memory stick of EdgeRouter Lite works now.
|
| 1.2.2.5 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.2.4 | 29-May-2016 |
skrll | Sync with HEAD
|
| 1.2.2.3 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file octeon_dwctwo.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.9.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.9.16.1 | 12-Jul-2016 |
jdolecek | file octeon_dwctwo.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.13.4.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.14.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.4 | 23-Jun-2020 |
simonb | Minor tweaks and cleanup.
|
| 1.3 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_fau.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_fau.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_faureg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_faureg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.4 | 23-Jun-2020 |
simonb | Minor tweaks and cleanup.
|
| 1.3 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_fauvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_fauvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.10 | 24-Mar-2021 |
simonb | Remove somewhat dubious empty octfpa_desc structure.
|
| 1.9 | 04-Jan-2021 |
thorpej | branches: 1.9.2;
malloc(9) -> kmem(9)
|
| 1.8 | 23-Jun-2020 |
simonb | branches: 1.8.2;
Minor tweaks and cleanup.
|
| 1.7 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.6 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.5 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.4 | 27-Jan-2019 |
dholland | Restore accidentally-dropped opt_octeon.h.
(or at least it really looks like it was accidental)
|
| 1.3 | 27-Jan-2019 |
pgoyette | Merge the [pgoyette-compat] branch
|
| 1.2 | 04-Oct-2018 |
skrll | Remove duplicate #include
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.20; 1.1.22;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.22.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.20.1 | 20-Oct-2018 |
pgoyette | Sync with head
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_fpa.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_fpa.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.8.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.9.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.5 | 23-Jun-2020 |
simonb | Minor tweaks and cleanup.
|
| 1.4 | 22-Jun-2020 |
simonb | Remove more snprintb _BITS bits.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_fpareg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_fpareg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.7 | 23-Jun-2020 |
simonb | Minor tweaks and cleanup.
|
| 1.6 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.5 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.4 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.3 | 28-May-2019 |
msaitoh | s/recieve/receive/
|
| 1.2 | 19-Apr-2018 |
christos | branches: 1.2.2;
s/static inline/static __inline/g for consistency.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.20;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.20.1 | 22-Apr-2018 |
pgoyette | Sync with HEAD
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_fpavar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_fpavar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.25 | 24-Feb-2025 |
andvar | fix various typos in comments.
|
| 1.24 | 29-Jun-2024 |
riastradh | branches: 1.24.2;
if_stats(9): Add ifp argument to if_stat..._ref.
This will enable us to pass the ifp through to a dtrace probe inside.
No functional change intended in this change, but this is an API
change visible to modules so it shouldn't be pulled up.
PR kern/58377
|
| 1.23 | 20-Jul-2023 |
gutteridge | octeon_gmx.c: fix spelling in (default disabled) error messages
|
| 1.22 | 03-Jun-2022 |
andvar | fix folloing->following typos in more files.
also s/begginning/beginning/.
|
| 1.21 | 04-May-2022 |
andvar | s/entires/entries/
|
| 1.20 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.19 | 14-May-2021 |
simonb | branches: 1.19.4;
Fix a missed bitmask to __SHIFTOUT conversion in rev 1.12.
Fixes negotiation problems on non-gige switches. Problem discovered and
tested by riastradh@.
|
| 1.18 | 05-May-2021 |
simonb | branches: 1.18.2;
Sprinkle some static.
|
| 1.17 | 24-Apr-2021 |
thorpej | branches: 1.17.2;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.16 | 04-Jan-2021 |
thorpej | branches: 1.16.2;
malloc(9) -> kmem(9)
|
| 1.15 | 23-Jun-2020 |
simonb | branches: 1.15.2;
Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
Support SGMII mode used on CN70XX.
Most functional changes from OpenBSD octeon port. Still more to come from
the OpenBSD driver.
|
| 1.14 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.13 | 19-Jun-2020 |
simonb | Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.
|
| 1.12 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.11 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.10 | 31-May-2020 |
simonb | Clean up Cavium Octeon device names. Rename devices from "octeon_foo"
to "octfoo" - this follows the naming conventions used by many other
MIPS CPUs.
|
| 1.9 | 24-Apr-2020 |
mrg | fetch properties in attach rather than every re-init.
this avoids a rwlock while spinlock held problem likely introduced
with MII locking rework, as fetching a property takes an rwlock,
and prior to the rework, only kernel lock would have been held.
ok skrll@.
|
| 1.8 | 29-Jan-2020 |
thorpej | branches: 1.8.4;
Adopt <net/if_stats.h>.
|
| 1.7 | 25-Jan-2020 |
thorpej | Remove the IFETHER_DOT3STATS stuff in this driver. ifi_dot3stats does
not exist in NetBSD's "struct if_data", and what this driver does with
it is incompatible with upcoming network stack changes.
|
| 1.6 | 10-Nov-2019 |
chs | branches: 1.6.2;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.5 | 28-May-2019 |
msaitoh | Fix compile error.
|
| 1.4 | 28-May-2019 |
msaitoh | Use ETHER_LOCK()/ETHER_UNLOCK() for all ethernet drivers to protect ec_multi*.
|
| 1.3 | 20-Aug-2017 |
maxv | branches: 1.3.2; 1.3.6;
as the xxx implicitly points out, there's a division by zero here, so
panic right away; found by mootja
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.2.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file octeon_gmx.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.3.6.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.3.6.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.3.6.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.3.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.2.1 | 20-Aug-2017 |
jdolecek | file octeon_gmx.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.6.2.2 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.6.2.1 | 25-Jan-2020 |
ad | Sync with head.
|
| 1.8.4.1 | 25-Apr-2020 |
bouyer | Sync with bouyer-xenpvh-base2 (HEAD)
|
| 1.15.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.16.2.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.17.2.2 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.17.2.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.18.2.1 | 31-May-2021 |
cjep | sync with head
|
| 1.19.4.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.24.2.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.7 | 23-May-2022 |
andvar | s/controll/control/ in comments.
|
| 1.6 | 17-Apr-2022 |
andvar | fix various typos in comments.
|
| 1.5 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
Support SGMII mode used on CN70XX.
Most functional changes from OpenBSD octeon port. Still more to come from
the OpenBSD driver.
|
| 1.4 | 22-Jun-2020 |
simonb | Remove more snprintb _BITS bits.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_gmxreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_gmxreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.7 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
Support SGMII mode used on CN70XX.
Most functional changes from OpenBSD octeon port. Still more to come from
the OpenBSD driver.
|
| 1.6 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.5 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.4 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.3 | 24-Apr-2020 |
mrg | fetch properties in attach rather than every re-init.
this avoids a rwlock while spinlock held problem likely introduced
with MII locking rework, as fetching a property takes an rwlock,
and prior to the rework, only kernel lock would have been held.
ok skrll@.
|
| 1.2 | 19-Apr-2018 |
christos | branches: 1.2.12;
s/static inline/static __inline/g for consistency.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.20;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.20.1 | 22-Apr-2018 |
pgoyette | Sync with HEAD
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_gmxvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_gmxvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2.12.1 | 25-Apr-2020 |
bouyer | Sync with bouyer-xenpvh-base2 (HEAD)
|
| 1.2 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_gpioreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_gpioreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.7 | 05-May-2021 |
simonb | Sprinkle some static.
|
| 1.6 | 27-Jan-2021 |
thorpej | branches: 1.6.4;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.5 | 27-Jan-2021 |
thorpej | Use DEVICE_COMPAT_EOL.
|
| 1.4 | 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.3 | 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.2 | 15-Jan-2021 |
jmcneill | Add 'const char *xname' arg to fdtbus_interrupt_controller_func .establish
|
| 1.1 | 16-Jul-2020 |
jmcneill | branches: 1.1.2;
FDT support for Cavium OCTEON MIPS SoCs. WIP.
|
| 1.1.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.6.4.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_iobreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_iobreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.8 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.7 | 23-Jun-2020 |
simonb | branches: 1.7.2;
Cleanup - mostly removing unused code and defines.
|
| 1.6 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.5 | 19-Jun-2020 |
simonb | Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.
|
| 1.4 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.3 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2; 1.2.18;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 01-Jun-2015 |
jdolecek | file octeon_ipd.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file octeon_ipd.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.7.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_ipdreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_ipdreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5 | 23-Jun-2020 |
simonb | Cleanup - mostly removing unused code and defines.
|
| 1.4 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.3 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_ipdvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_ipdvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_l2creg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_l2creg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 19-Jun-2020 |
simonb | branches: 1.5.4;
Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.
|
| 1.4 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.3 | 31-May-2020 |
simonb | Clean up Cavium Octeon device names. Rename devices from "octeon_foo"
to "octfoo" - this follows the naming conventions used by many other
MIPS CPUs.
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2; 1.2.18;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 01-Jun-2015 |
jdolecek | file octeon_mpi.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file octeon_mpi.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5.4.1 | 02-Apr-2021 |
thorpej | config_found_ia() -> config_found() w/ CFARG_IATTR.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_mpireg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_mpireg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_mpivar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_mpivar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_npireg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_npireg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.4 | 19-Jun-2020 |
simonb | Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.
|
| 1.3 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2; 1.2.18;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 01-Jun-2015 |
jdolecek | file octeon_pci.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file octeon_pci.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_pcmreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_pcmreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.14 | 05-Dec-2021 |
msaitoh | s/multple/multiple/ in comment.
|
| 1.13 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.12 | 24-Apr-2021 |
thorpej | branches: 1.12.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.11 | 27-Jan-2021 |
thorpej | branches: 1.11.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.10 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.9 | 16-Jul-2020 |
jmcneill | branches: 1.9.2;
FDT support for Cavium OCTEON MIPS SoCs. WIP.
|
| 1.8 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
|
| 1.7 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.6 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.5 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.4 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.3 | 29-Jan-2020 |
thorpej | Adopt <net/if_stats.h>.
|
| 1.2 | 06-Feb-2018 |
mrg | branches: 1.2.4; 1.2.10;
update for GCC 6:
hide octeon_pip_dump_regs_[] under OCTEON_ETH_DEBUG, the only user.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_pip.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_pip.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2.10.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.2.4.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.9.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.11.2.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.12.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.5 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
|
| 1.4 | 22-Jun-2020 |
simonb | Remove more snprintb _BITS bits.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_pipreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_pipreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
|
| 1.4 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.3 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_pipvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_pipvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.7 | 17-Sep-2021 |
andvar | some love to double letters (in comments).
|
| 1.6 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.5 | 23-Jun-2020 |
simonb | branches: 1.5.2;
Cleanup - mostly removing unused code and defines.
|
| 1.4 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.3 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.2 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_pko.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_pko.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_pkoreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_pkoreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.6 | 23-Jun-2020 |
simonb | Cleanup - mostly removing unused code and defines.
|
| 1.5 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.4 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.3 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.2 | 19-Apr-2018 |
christos | s/static inline/static __inline/g for consistency.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.20;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.20.1 | 22-Apr-2018 |
pgoyette | Sync with HEAD
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_pkovar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_pkovar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.10 | 23-Jun-2020 |
simonb | Cleanup - mostly removing unused code and defines.
|
| 1.9 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.8 | 19-Jun-2020 |
simonb | Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.
|
| 1.7 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.6 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.5 | 10-Nov-2019 |
chs | in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.4 | 28-May-2019 |
msaitoh | s/recieve/receive/
|
| 1.3 | 11-Apr-2019 |
kamil | Fix CVS Id
NFCI
|
| 1.2 | 01-Jun-2015 |
matt | branches: 1.2.2; 1.2.18; 1.2.22;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.22.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.2.22.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 01-Jun-2015 |
jdolecek | file octeon_pow.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 01-Jun-2015 |
skrll | file octeon_pow.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5 | 23-Jun-2020 |
simonb | Cleanup - mostly removing unused code and defines.
|
| 1.4 | 22-Jun-2020 |
simonb | Remove more snprintb _BITS bits.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_powreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_powreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.7 | 23-Jun-2020 |
simonb | Cleanup - mostly removing unused code and defines.
|
| 1.6 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.5 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.4 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.3 | 19-Apr-2018 |
christos | s/static inline/static __inline/g for consistency.
|
| 1.2 | 11-Jul-2016 |
matt | branches: 1.2.16; 1.2.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.2.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_powvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2.18.1 | 22-Apr-2018 |
pgoyette | Sync with HEAD
|
| 1.2.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.16.1 | 11-Jul-2016 |
jdolecek | file octeon_powvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.17 | 30-Jan-2025 |
gutteridge | octeon_rnm.c: minor code formatting and grammar tweaks (NFC)
|
| 1.16 | 21-Mar-2023 |
riastradh | branches: 1.16.6;
octrnm(4): Raise delay on startup.
According to CN50XX-HRM-V0.99E and CN78XX-HM-0.99E:
The entropy is provided by the jitter of 125 of 128 free-running
oscillators XORed into a 128-bit LFSR. The LFSR accumulates entropy
over 81 cycles, after which it is fed into a SHA-1 engine.
[...]
The SHA-1 engine runs once every 81 cycles.
[...]
The hardware produces new 64-bit random number every 81 cycles.
The last sentence means that we only need to wait 81 cycles _between_
consecutive SHA-1 outputs (which isn't relevant anyway because we
reconfigure it into raw mode later), but the first two quotes might
mean that we need to wait 81+81 cycles for the _first_ output to be
produced on boot when running the self-test.
Now, in this case, the self-test is run with the LFSR unhooked, by
clearing the RNM_CTL_STATUS[ENT_EN] bit, so that SHA-1 is computed
from a known input -- this is really just paranoia to make sure that
_some_ functions of the device (which is conjured out of thin air at
a fixed virtual address, with no firmware bindings to guide us)
behave as we expect.
And it's not clear if it really does take 81+81 cycles for the first
SHA-1 output to appear when the LFSR isn't feeding into it anyway.
But experimentally, delay of 81+81 cycles seems to work whereas a
delay of only 81 cycles crashes.
PR kern/57280
XXX pullup-10
XXX pullup-9
|
| 1.15 | 19-Mar-2022 |
riastradh | branches: 1.15.4;
rnd(9): Omit needless locks in various HWRNG drivers.
Now that the rnd(9) API guarantees serial callbacks, we can simplify
everything a bit more.
(Some drivers like hifn(4) and sun8icrypto(4) still use locks to
coordinate with other parts of the driver to submit requests to and
process responses from the device.)
|
| 1.14 | 19-Mar-2022 |
riastradh | rnd(9): Adjust IPL of locks used by rndsource callbacks.
These no longer ever run from hard interrupt context or with a spin
lock held, so there is no longer any need to have them at IPL_VM to
block hard interrupts. Instead, lower them to IPL_SOFTSERIAL.
|
| 1.13 | 28-Dec-2021 |
riastradh | sys: Use preempt_point and preempt_needed, not open-coded versions.
|
| 1.12 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.11 | 08-Jun-2020 |
simonb | Fix tyop in a comment. Thanks riastradh@.
|
| 1.10 | 05-Jun-2020 |
simonb | Rework CVMSEG LM usage a litte:
- remove unused LM slots
- use #defines for defining the size of CVMSEG LM users
XXX: Need to dynamically set CVMMEMCTL[LMEMSZ] during startup so we can
both adapt to any future increase in CVMSEG LM usage and not waste
any more L2 that we need to.
XXX: Still need to move general IOBDMA conf to a different (new?) header.
|
| 1.9 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.8 | 31-May-2020 |
simonb | Clean up Cavium Octeon device names. Rename devices from "octeon_foo"
to "octfoo" - this follows the naming conventions used by many other
MIPS CPUs.
|
| 1.7 | 30-May-2020 |
simonb | CN70XX iobdma limit appears to be 128 words, so gather that many samples
as a time.
Gather the full 512 bytes of samples and process in a single call to
rnd_add_data_sync() - about 10% faster than 4 calls to rnd_add_data_sync().
Put sample buffer in the softc to save some stack usage.
|
| 1.6 | 18-May-2020 |
riastradh | Adjust entropy estimate for the Octeon.
We are hedging in serial and in parallel, and more conservative than
the Linux driver from Cavium seems to be, so although I don't know
exactly what the thermal jitter of the device is, this seems like a
reasonable compromise.
|
| 1.5 | 13-May-2020 |
riastradh | Rework octeon_rnm(4) random number generator driver.
- Do a little on-line self-test for fun.
- Draw raw samples from the ring oscillators.
- Draw substantially more samples:
=> early RO samples seem to have considerably lower entropy
=> consecutive RO samples are not independent
- Make sure to use rnd_add_data_sync in the callback.
=> not technically needed in HEAD, but would be needed for pullup
|
| 1.4 | 12-May-2020 |
simonb | Oceton RNG/RNM driver modernisation to fit new entropy world order by
riastradh@, with some tweaks to get working in RNG mode.
XXX TODO: work out how to get raw entropy mode working.
|
| 1.3 | 12-May-2020 |
simonb | If bus_space_map fails, just don't attach the driver instead of panicing.
Check RNG built in self test, don't attach if that fails too.
|
| 1.2 | 08-Jan-2019 |
jdolecek | branches: 1.2.4;
no need to include <machine/param.h> if <sys/param.h> already included
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.20; 1.1.22;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.22.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.20.1 | 18-Jan-2019 |
pgoyette | Synch with HEAD
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_rnm.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_rnm.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2.4.3 | 30-Jul-2023 |
martin | Pull up following revision(s) (requested by gutteridge in ticket #256):
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.16 (patch)
octrnm(4): Raise delay on startup.
According to CN50XX-HRM-V0.99E and CN78XX-HM-0.99E:
The entropy is provided by the jitter of 125 of 128 free-running
oscillators XORed into a 128-bit LFSR. The LFSR accumulates entropy
over 81 cycles, after which it is fed into a SHA-1 engine.
[...]
The SHA-1 engine runs once every 81 cycles.
[...]
The hardware produces new 64-bit random number every 81 cycles.
The last sentence means that we only need to wait 81 cycles _between_
consecutive SHA-1 outputs (which isn't relevant anyway because we
reconfigure it into raw mode later), but the first two quotes might
mean that we need to wait 81+81 cycles for the _first_ output to be
produced on boot when running the self-test.
Now, in this case, the self-test is run with the LFSR unhooked, by
clearing the RNM_CTL_STATUS[ENT_EN] bit, so that SHA-1 is computed
from a known input -- this is really just paranoia to make sure that
_some_ functions of the device (which is conjured out of thin air at
a fixed virtual address, with no firmware bindings to guide us)
behave as we expect.
And it's not clear if it really does take 81+81 cycles for the first
SHA-1 output to appear when the LFSR isn't feeding into it anyway.
But experimentally, delay of 81+81 cycles seems to work whereas a
delay of only 81 cycles crashes.
PR kern/57280
|
| 1.2.4.2 | 19-May-2020 |
martin | Apply patch, requested by simonb in ticket #918:
the updated octeon_rnm(4) driver fails a bogus randomness
test in the netbsd-9 rnd(9) driver for RND_TYPE_RNG type devices so
uses the RND_TYPE_UNKNOWN type. This approach is used by other drivers
on the netbsd-9 branch.
|
| 1.2.4.1 | 19-May-2020 |
martin | Pull up following revision(s) (requested by simonb in ticket #918):
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.3
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.4
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.5
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.6 (+ patch)
sys/arch/mips/cavium/dev/octeon_rnmreg.h: revision 1.2
sys/arch/mips/cavium/dev/octeon_rnmreg.h: revision 1.3
sys/arch/mips/cavium/octeonvar.h: revision 1.7
Add a few more bits.
XXX convert to __BITS.
--
If bus_space_map fails, just don't attach the driver instead of panicing.
Check RNG built in self test, don't attach if that fails too.
--
Oceton RNG/RNM driver modernisation to fit new entropy world order by
riastradh@, with some tweaks to get working in RNG mode.
XXX TODO: work out how to get raw entropy mode working.
--
Rework octeon_rnm(4) random number generator driver.
- Do a little on-line self-test for fun.
- Draw raw samples from the ring oscillators.
- Draw substantially more samples:
=3D> early RO samples seem to have considerably lower entropy
=3D> consecutive RO samples are not independent
- Make sure to use rnd_add_data_sync in the callback.
=3D> not technically needed in HEAD, but would be needed for pullup
--
Adjust entropy estimate for the Octeon.
We are hedging in serial and in parallel, and more conservative than
the Linux driver from Cavium seems to be, so although I don't know
exactly what the thermal jitter of the device is, this seems like a
reasonable compromise.
|
| 1.15.4.1 | 30-Jul-2023 |
martin | Pull up following revision(s) (requested by gutteridge in ticket #256):
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.16
octrnm(4): Raise delay on startup.
According to CN50XX-HRM-V0.99E and CN78XX-HM-0.99E:
The entropy is provided by the jitter of 125 of 128 free-running
oscillators XORed into a 128-bit LFSR. The LFSR accumulates entropy
over 81 cycles, after which it is fed into a SHA-1 engine.
[...]
The SHA-1 engine runs once every 81 cycles.
[...]
The hardware produces new 64-bit random number every 81 cycles.
The last sentence means that we only need to wait 81 cycles _between_
consecutive SHA-1 outputs (which isn't relevant anyway because we
reconfigure it into raw mode later), but the first two quotes might
mean that we need to wait 81+81 cycles for the _first_ output to be
produced on boot when running the self-test.
Now, in this case, the self-test is run with the LFSR unhooked, by
clearing the RNM_CTL_STATUS[ENT_EN] bit, so that SHA-1 is computed
from a known input -- this is really just paranoia to make sure that
_some_ functions of the device (which is conjured out of thin air at
a fixed virtual address, with no firmware bindings to guide us)
behave as we expect.
And it's not clear if it really does take 81+81 cycles for the first
SHA-1 output to appear when the LFSR isn't feeding into it anyway.
But experimentally, delay of 81+81 cycles seems to work whereas a
delay of only 81 cycles crashes.
PR kern/57280
|
| 1.16.6.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.5 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.4 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.3 | 13-May-2020 |
riastradh | Rework octeon_rnm(4) random number generator driver.
- Do a little on-line self-test for fun.
- Draw raw samples from the ring oscillators.
- Draw substantially more samples:
=> early RO samples seem to have considerably lower entropy
=> consecutive RO samples are not independent
- Make sure to use rnd_add_data_sync in the callback.
=> not technically needed in HEAD, but would be needed for pullup
|
| 1.2 | 12-May-2020 |
simonb | Add a few more bits.
XXX convert to __BITS.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.26;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.26.1 | 19-May-2020 |
martin | Pull up following revision(s) (requested by simonb in ticket #918):
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.3
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.4
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.5
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.6 (+ patch)
sys/arch/mips/cavium/dev/octeon_rnmreg.h: revision 1.2
sys/arch/mips/cavium/dev/octeon_rnmreg.h: revision 1.3
sys/arch/mips/cavium/octeonvar.h: revision 1.7
Add a few more bits.
XXX convert to __BITS.
--
If bus_space_map fails, just don't attach the driver instead of panicing.
Check RNG built in self test, don't attach if that fails too.
--
Oceton RNG/RNM driver modernisation to fit new entropy world order by
riastradh@, with some tweaks to get working in RNG mode.
XXX TODO: work out how to get raw entropy mode working.
--
Rework octeon_rnm(4) random number generator driver.
- Do a little on-line self-test for fun.
- Draw raw samples from the ring oscillators.
- Draw substantially more samples:
=3D> early RO samples seem to have considerably lower entropy
=3D> consecutive RO samples are not independent
- Make sure to use rnd_add_data_sync in the callback.
=3D> not technically needed in HEAD, but would be needed for pullup
--
Adjust entropy estimate for the Octeon.
We are hedging in serial and in parallel, and more conservative than
the Linux driver from Cavium seems to be, so although I don't know
exactly what the thermal jitter of the device is, this seems like a
reasonable compromise.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_rnmreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_rnmreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.9 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.8 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.7 | 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.6 | 16-Jul-2020 |
jmcneill | branches: 1.6.2;
FDT support for Cavium OCTEON MIPS SoCs. WIP.
|
| 1.5 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
|
| 1.4 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.3 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.2 | 22-Jan-2019 |
msaitoh | Change MII PHY read/write API from:
int (*mii_readreg_t)(device_t, int, int);
void (*mii_writereg_t)(device_t, int, int, int);
to:
int (*mii_readreg_t)(device_t, int, int, uint16_t *);
int (*mii_writereg_t)(device_t, int, int, uint16_t);
Now we can test if a read/write operation failed or not by the return value.
In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.
Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:
arm/at91/at91emac.c
arm/ep93xx/epe.c
arm/omap/omapl1x_emac.c
mips/ralink/ralink_eth.c
arch/powerpc/booke/dev/pq3etsec.c(read)
dev/cadence/if_cemac.c <- hkenken
dev/ic/lan9118.c
Tested with the following device:
axe+ukphy
axe+rgephy
axen+rgephy (tested by Andrius V)
wm+atphy
wm+ukphy
wm+igphy
wm+ihphy
wm+makphy
sk+makphy
sk+brgphy
sk+gentbi
msk+makphy
sip+icsphy
sip+ukphy
re+rgephy
bge+brgphy
bnx+brgphy
gsip+gphyter
rtk+rlphy
fxp+inphy (tested by Andrius V)
tlp+acphy
ex+exphy
epic+qsphy
vge+ciphy (tested by Andrius V)
vr+ukphy (tested by Andrius V)
vte+ukphy (tested by Andrius V)
Not tested (MAC):
arm:at91emac
arm:cemac
arm:epe
arm:geminigmac
arm:enet
arm:cpsw
arm:emac(omac)
arm:emac(sunxi)
arm:npe
evbppc:temac
macppc:bm
macppc:gm
mips:aumac
mips:ae
mips:cnmac
mips:reth
mips:sbmac
playstation2:smap
powerpc:tsec
powerpc:emac(ibm4xx)
sgimips:mec
sparc:be
sf
ne(ax88190, dl10019)
awge
ep
gem
hme
smsh
mtd
sm
age
alc
ale
bce
cas
et
jme
lii
nfe
pcn
ste
stge
tl
xi
aue
mue
smsc
udav
url
Not tested (PHY):
amhphy
bmtphy
dmphy
etphy
glxtphy
ikphy
iophy
lxtphy
nsphyter
pnaphy
rdcphy
sqphy
tlphy
tqphy
urlphy
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.20; 1.1.22;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.22.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.20.1 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_smi.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_smi.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.6.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.3 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_smireg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_smireg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.6 | 23-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
|
| 1.5 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.4 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.3 | 22-Jan-2019 |
msaitoh | Change MII PHY read/write API from:
int (*mii_readreg_t)(device_t, int, int);
void (*mii_writereg_t)(device_t, int, int, int);
to:
int (*mii_readreg_t)(device_t, int, int, uint16_t *);
int (*mii_writereg_t)(device_t, int, int, uint16_t);
Now we can test if a read/write operation failed or not by the return value.
In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.
Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:
arm/at91/at91emac.c
arm/ep93xx/epe.c
arm/omap/omapl1x_emac.c
mips/ralink/ralink_eth.c
arch/powerpc/booke/dev/pq3etsec.c(read)
dev/cadence/if_cemac.c <- hkenken
dev/ic/lan9118.c
Tested with the following device:
axe+ukphy
axe+rgephy
axen+rgephy (tested by Andrius V)
wm+atphy
wm+ukphy
wm+igphy
wm+ihphy
wm+makphy
sk+makphy
sk+brgphy
sk+gentbi
msk+makphy
sip+icsphy
sip+ukphy
re+rgephy
bge+brgphy
bnx+brgphy
gsip+gphyter
rtk+rlphy
fxp+inphy (tested by Andrius V)
tlp+acphy
ex+exphy
epic+qsphy
vge+ciphy (tested by Andrius V)
vr+ukphy (tested by Andrius V)
vte+ukphy (tested by Andrius V)
Not tested (MAC):
arm:at91emac
arm:cemac
arm:epe
arm:geminigmac
arm:enet
arm:cpsw
arm:emac(omac)
arm:emac(sunxi)
arm:npe
evbppc:temac
macppc:bm
macppc:gm
mips:aumac
mips:ae
mips:cnmac
mips:reth
mips:sbmac
playstation2:smap
powerpc:tsec
powerpc:emac(ibm4xx)
sgimips:mec
sparc:be
sf
ne(ax88190, dl10019)
awge
ep
gem
hme
smsh
mtd
sm
age
alc
ale
bce
cas
et
jme
lii
nfe
pcn
ste
stge
tl
xi
aue
mue
smsc
udav
url
Not tested (PHY):
amhphy
bmtphy
dmphy
etphy
glxtphy
ikphy
iophy
lxtphy
nsphyter
pnaphy
rdcphy
sqphy
tlphy
tqphy
urlphy
|
| 1.2 | 10-Jan-2019 |
msaitoh | KNF. No functional change.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.20; 1.1.22;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.22.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.20.2 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.1.20.1 | 18-Jan-2019 |
pgoyette | Synch with HEAD
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_smivar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_smivar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 31-May-2020 |
simonb | Remove unused Timer Unit register definitions and stubs. Can be
resurrected from the attic in the unlikely event we'll ever have
a driver for this device.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_tim.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_tim.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 31-May-2020 |
simonb | Remove unused Timer Unit register definitions and stubs. Can be
resurrected from the attic in the unlikely event we'll ever have
a driver for this device.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_timreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_timreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_twsi.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_twsi.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.3 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.2 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_twsireg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_twsireg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.10 | 26-Jan-2022 |
martin | Fix initialization of the register map by using the com_init_regs()
helper function. Pointed out by jmcneill.
|
| 1.9 | 23-Jun-2020 |
simonb | Add support for a very simple output-only console so early printf() can work.
Minor tweaks, remove some unused code.
|
| 1.8 | 19-Jun-2020 |
simonb | Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.
|
| 1.7 | 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.6 | 15-Jun-2020 |
simonb | Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)
|
| 1.5 | 31-May-2020 |
simonb | Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).
|
| 1.4 | 31-May-2020 |
simonb | Clean up Cavium Octeon device names. Rename devices from "octeon_foo"
to "octfoo" - this follows the naming conventions used by many other
MIPS CPUs.
|
| 1.3 | 02-Jun-2015 |
matt | branches: 1.3.2; 1.3.18;
Use structure copy instead of memcpy.
|
| 1.2 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.3.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.18.1 | 02-Jun-2015 |
jdolecek | file octeon_uart.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.3.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 02-Jun-2015 |
skrll | file octeon_uart.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 11-Apr-2019 |
kamil | Fix CVS Id
NFCI
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18; 1.1.22;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.22.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_uartreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_uartreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.1 | 27-Jun-2020 |
simonb | Add new file containing a couple of UART prototypes.
Missing file pointed out by rin@. Thanks!
|
| 1.2 | 01-May-2015 |
hikaru | Use dwc2 instead of octeon_usbc, and unify octeon_usbn to new octeon_dwctwo.
Internal USB memory stick of EdgeRouter Lite works now.
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.4 | 23-Jun-2020 |
simonb | Remove USB controller register definitions, these match dwc2 core and
weren't used anyway.
|
| 1.3 | 22-Jun-2020 |
simonb | Remove more snprintb _BITS bits.
|
| 1.2 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_usbcreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_usbcreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.7 | 23-Jun-2020 |
simonb | Remove unused include files.
|
| 1.6 | 18-Nov-2018 |
skrll | Remove unused struct member (usbd_xfer now has a struct usb_task)
|
| 1.5 | 18-Nov-2018 |
skrll | Whitespace
|
| 1.4 | 09-Apr-2018 |
jakllsch | branches: 1.4.2;
Stop potential misuse of vendor names and USB vendor IDs in root hub
device and string descriptors.
Firstly: Few vendors have identical PCI-SIG vendor IDs and USB-IF vendor
IDs. As such, using the PCI vendor ID as a USB vendor ID may trample
on whomever is allocated that USB vendor ID.
Secondly: The vendor of the host controller hardware implementation has
little to nothing to do with our usbroothub implementation. Thus we
should not potentially associate any problems therewith to such third
party.
This change will result in root hubs being identified by USB Vendor ID
0x0000. Root hub vendor string will now be "NetBSD" (or, specifically:
ostype). Product ID (0x0000) and product strings remain unchanged.
|
| 1.3 | 26-Apr-2016 |
skrll | branches: 1.3.16; 1.3.18;
g/c usb_dma_reserve
|
| 1.2 | 26-Apr-2016 |
skrll | s/usbd_xfer_handle/struct usbd_xfer */
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.2.3 | 29-May-2016 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_usbcvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.3.18.2 | 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
| 1.3.18.1 | 16-Apr-2018 |
pgoyette | Sync with HEAD, resolve some conflicts
|
| 1.3.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.16.1 | 26-Apr-2016 |
jdolecek | file octeon_usbcvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.4.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2 | 01-May-2015 |
hikaru | Use dwc2 instead of octeon_usbc, and unify octeon_usbn to new octeon_dwctwo.
Internal USB memory stick of EdgeRouter Lite works now.
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.3 | 23-Jun-2020 |
simonb | Minor tweaks and cleanup.
|
| 1.2 | 22-Jun-2020 |
simonb | Remove unused snprintb format strings.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_usbnreg.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_usbnreg.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 23-Jun-2020 |
simonb | Remove unused include files.
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file octeon_usbnvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file octeon_usbnvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.9 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.8 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.7 | 10-Nov-2021 |
msaitoh | s/endianess/endianness/
|
| 1.6 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.5 | 24-Apr-2021 |
thorpej | branches: 1.5.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.4 | 27-Jan-2021 |
thorpej | branches: 1.4.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.3 | 15-Oct-2020 |
jmcneill | branches: 1.3.2;
Initialise xhci_softc sc_ios
|
| 1.2 | 17-Jul-2020 |
simonb | Don't use a reserved value for the USB endian CSR selects and
enable octxhci_uctl_init(). Between these, USB works without
needing a "usb start" from u-boot.
XXX: Note the port power enable goop is still disabled until
we get a GPIO driver.
|
| 1.1 | 16-Jul-2020 |
jmcneill | Add USB3 support.
|
| 1.3.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.4.2.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.5.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 17-Jul-2020 |
simonb | Don't use a reserved value for the USB endian CSR selects and
enable octxhci_uctl_init(). Between these, USB works without
needing a "usb start" from u-boot.
XXX: Note the port power enable goop is still disabled until
we get a GPIO driver.
|
| 1.1 | 16-Jul-2020 |
jmcneill | Add USB3 support.
|
| 1.2 | 04-Jun-2015 |
matt | branches: 1.2.2; 1.2.18;
minor constification
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 04-Jun-2015 |
jdolecek | file bootbusvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.2.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 04-Jun-2015 |
skrll | file bootbusvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2 | 17-Aug-2020 |
jmcneill | Attach an iobus with octrnm even if using devicetree (there is no
corresponding node for this device in the DT).
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file iobusvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file iobusvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2; 1.1.18;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 29-Apr-2015 |
jdolecek | file mainbusvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file mainbusvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.4 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.3 | 07-Feb-2003 |
cgd | branches: 1.3.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.2 | 08-Nov-2002 |
cgd | update to latest CFE API code
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.12.1 | 05-Mar-2002 |
nathanw | file cfe_api.c was added on branch nathanw_sa on 2002-11-11 22:00:20 +0000
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file cfe_api.c was added on branch kqueue on 2002-06-23 17:37:59 +0000
|
| 1.3.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.3.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.3.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.3 | 07-Feb-2003 |
cgd | Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.2 | 08-Nov-2002 |
cgd | update to latest CFE API code
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.12.1 | 05-Mar-2002 |
nathanw | file cfe_api.h was added on branch nathanw_sa on 2002-11-11 22:00:21 +0000
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file cfe_api.h was added on branch kqueue on 2002-06-23 17:37:59 +0000
|
| 1.2 | 07-Feb-2003 |
cgd | Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 08-Nov-2002 |
cgd | branches: 1.1.2;
update to latest CFE API code
|
| 1.1.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.2.1 | 08-Nov-2002 |
nathanw | file cfe_api_int.h was added on branch nathanw_sa on 2002-11-11 22:00:21 +0000
|
| 1.2 | 07-Feb-2003 |
cgd | Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 08-Nov-2002 |
cgd | branches: 1.1.2;
update to latest CFE API code
|
| 1.1.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.2.1 | 08-Nov-2002 |
nathanw | file cfe_error.h was added on branch nathanw_sa on 2002-11-11 22:00:22 +0000
|
| 1.2 | 08-Nov-2002 |
cgd | update to latest CFE API code
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.12.1 | 05-Mar-2002 |
nathanw | file cfe_xiocb.h was added on branch nathanw_sa on 2002-11-11 22:00:22 +0000
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file cfe_xiocb.h was added on branch kqueue on 2002-06-23 17:38:00 +0000
|
| 1.2 | 21-Nov-2008 |
tsutsui | No need to install kern.ldscript since /usr/lkm is gone and
modload(8) no longer uses a linker script.
|
| 1.1 | 10-Oct-2002 |
simonb | branches: 1.1.2; 1.1.110; 1.1.114; 1.1.120; 1.1.122;
Install the kernel linker script in /usr/lkm/ldscript so that modload(8)
works without needing to resort to -A abuse. LKMs work cleanly on MIPS
now.
|
| 1.1.122.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.1.120.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.1.114.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.1.110.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.1.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 10-Oct-2002 |
nathanw | file Makefile was added on branch nathanw_sa on 2002-10-18 02:38:43 +0000
|
| 1.73 | 26-Jul-2023 |
rin | Use OBJCOPY_STRIPFLAGS instead of STRIPFLAGS.
|
| 1.72 | 26-Apr-2021 |
christos | branches: 1.72.14;
Produce elf32 images for mipsn64eb too
|
| 1.71 | 25-Apr-2021 |
christos | use ${MACHINE_MIPS64}
|
| 1.70 | 01-Jan-2019 |
christos | branches: 1.70.16;
ELF2ECOFF -> MIPS_ELF2ECOFF
|
| 1.69 | 22-Sep-2018 |
rin | - Determine KERN_AS automatically depending on whether OPT_MODULAR is
set or not, in the same way as libcompat.
- Specify OPT_MODULAR in the port Makefile instead of KERN_AS.
Now, KERN_AS=library is used for kernels without module(7) for all ports.
OK christos
|
| 1.68 | 05-Jun-2018 |
christos | branches: 1.68.2;
use the compiler way of passing arguments to the linker.
|
| 1.67 | 22-Feb-2017 |
maya | branches: 1.67.12;
leave the part for GCC >= 5.3 in.
Was a little over-eager and accidentally removed the else case.
|
| 1.66 | 22-Feb-2017 |
maya | GC workaround for GCC 4.8 fixed in GCC 5+
|
| 1.65 | 29-Mar-2016 |
macallan | branches: 1.65.2; 1.65.4;
make sure we compile mips_fpu.c and fp.S with -mhard-float
|
| 1.64 | 28-Mar-2016 |
martin | Restrict float format hacks to gcc 4.8
|
| 1.63 | 18-Feb-2016 |
macallan | gcc does not pass floating point options to the assembler
by default, because it is afraid that the stricter tests
will break userland code. The new binutils is pickier about
this. Gcc 5.x fixes the issue so for now, set explicitly
the assembler soft-float flags when we build the kernel.
see: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64569
|
| 1.62 | 24-Aug-2015 |
uebayasi | Define ${LINKSCRIPT} in one place.
|
| 1.61 | 15-Nov-2014 |
uebayasi | branches: 1.61.2;
LINKSCRIPT is set only once, so use = not +=.
|
| 1.60 | 15-Nov-2014 |
uebayasi | Use LINKSCRIPT.
|
| 1.59 | 10-Mar-2013 |
christos | Explicitly set KERN_AS (this could be done in /usr/src/sys/conf/Makefile.*)
so that modules work, on config files that did not set it explicitly. All
the files now use the standard logic, except the ones that set KERN_AS=obj
and Makefile.usermode which sets KERN_AS=library.
|
| 1.58 | 20-Feb-2011 |
matt | branches: 1.58.4; 1.58.14;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.57 | 01-Feb-2011 |
matt | Use elf32-ntrad{little,big}mips
|
| 1.56 | 21-Jan-2011 |
joerg | Switch remaining platforms to modern CPP for assembler.
|
| 1.55 | 14-Dec-2009 |
matt | branches: 1.55.4; 1.55.6; 1.55.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.54 | 15-Feb-2009 |
cube | Convert the recently introduced awk command to retrieve the value of the
option MODULAR to using %MODULAR%. While it is now possible to only
request the new version in the affected Makefiles, it is made mandatory for
everybody because I just fixed a bug in config(1) that would not make it
fail in the case of a syntax error in the Makefile template.
|
| 1.53 | 14-Feb-2009 |
apb | Now that "options MODULAR" is handled via defflag, the Makefile
generated by config(1) in the kernel compile directory no longer
contains IDENT=-DMODULAR. Instead, there's an opt_modular.h file that
might or might not contain "#define MODULAR 1".
Adapt to this by adding an OPT_MODULAR variable to relevant Makefiles,
set via an awk script that parses opt_modular.h.
|
| 1.52 | 11-Dec-2008 |
alc | branches: 1.52.2;
Clean-up makefile stub used to include in the build the binary HAL object
|
| 1.51 | 13-Nov-2008 |
ad | LKM -> MODULAR
|
| 1.50 | 18-Feb-2008 |
tsutsui | branches: 1.50.6; 1.50.10; 1.50.16; 1.50.18; 1.50.20; 1.50.24;
Backout previous. vr_idle.S no longer depends on assym.h.
|
| 1.49 | 18-Feb-2008 |
joerg | Another assym.h dependency for hpcmips
|
| 1.48 | 03-Jan-2008 |
joerg | Missing assym.h dependency.
|
| 1.47 | 17-Oct-2007 |
garbled | branches: 1.47.2; 1.47.8;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.46 | 25-May-2007 |
tsutsui | branches: 1.46.10;
Preserve local symbols on linking a kernel so that
we can get more useful trace on ddb(4).
|
| 1.45 | 17-May-2007 |
yamt | merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.44 | 27-Aug-2006 |
matt | branches: 1.44.6; 1.44.8; 1.44.12; 1.44.14; 1.44.20; 1.44.22;
Add -msym32 to CFLAGS when MACHINE_ARCH is mips64e[bl].
Since kernels are always run out of KSEG0 (0xffffffff.8xxxxxxx), we can
take advantage of that if we load a 32 bit address (0x8xxxxxxx) that it
will be sign-extended to 64 bits (0xffffffff.8xxxxxxx).
So instead of 6 instructions (2 lui, 2 daddiu, dsll32, daddu) to load an
address, the normal number of 2 instructions (lui, daddiu) will be used.
Thus telling gcc/gas that symbols will always be 32 bits significantly
shrinks (by 10%) and speeds up a MIPS64 kernel.
|
| 1.43 | 27-Aug-2006 |
matt | Sign extend DEFTEXTADDR on MIPS64.
|
| 1.42 | 26-Aug-2006 |
matt | Nuke unneeded LP64 conditional section
|
| 1.41 | 04-Apr-2006 |
gdamore | Add support for using the MIPS Atheros HAL.
Atheros WLAN added to default evbmips DBAU1500, DBAU1550, and MTX-1 configs.
Note that AR5312 config will require unique HAL that we don't have yet.
|
| 1.40 | 11-Nov-2005 |
simonb | branches: 1.40.6; 1.40.8; 1.40.10; 1.40.12; 1.40.14;
Build libkern as a .o if LKMs are enabled so that all libkern functions
are available to LKMs, not just those needed by the kernel at link time.
From PR port-mips/31857 from Takehiko NOZAKI.
|
| 1.39 | 31-May-2005 |
christos | branches: 1.39.2;
s/GENASSYM/GENASSYM_CONF/ so we can use "GENASSYM" as the program name.
|
| 1.38 | 01-Oct-2004 |
sekiya | Set LP64 default to "no".
|
| 1.37 | 01-Oct-2004 |
sekiya | Rework previous slightly, so that ld is passed the right flags for 64-bit mode.
|
| 1.36 | 29-Sep-2004 |
sekiya | Allow arguments to as/ld to be specified in the kernel config file. Provide
a mechanism to override ranlib.
|
| 1.35 | 04-Jun-2004 |
thorpej | Add the %MAKEOPTIONSAPPEND token at the end of the file, after the
common Makefile.kern.inc has been included.
|
| 1.34 | 05-Oct-2003 |
tsutsui | branches: 1.34.4;
Define ELF2ECOFF here for native build.
(BTW, objcopy with OMAGIC kernel won't work on old pmax and sgimips machines?)
|
| 1.33 | 04-Jul-2003 |
simonb | Add some dependancies on assym.h; helps "make -j N" kernel builds.
|
| 1.32 | 09-Dec-2002 |
simonb | branches: 1.32.6;
Remove the explicit `makeoptions MACHINE_ARCH="mipse{b,l}"' for kernel
builds and use the endianness of the toolchain being used to determine
the endianness of the kernel.
|
| 1.31 | 09-Nov-2002 |
thorpej | Build with kernel with -msoft-float.
|
| 1.30 | 09-Nov-2002 |
thorpej | * Add -mno-abicalls to AFLAGS.
* GCC 3.3's traditional preprocessor functions properly now, so we
no longer need to special-case it.
|
| 1.29 | 09-Nov-2002 |
thorpej | Nuke the CROSSDIR stuff.
|
| 1.28 | 09-Nov-2002 |
thorpej | No need to pass -mno-half-pic; NetBSD's compiler does not generate
half-pic references.
|
| 1.27 | 04-Jun-2002 |
thorpej | Don't use -traditional-cpp if HAVE_GCC3.
|
| 1.26 | 05-Mar-2002 |
simonb | branches: 1.26.6; 1.26.8;
Don't explicitly depend locore_*.S and fp.S on assym.h - this is done
for all .S files in /sys/conf/Makefile.kern.inc.
|
| 1.25 | 09-Dec-2001 |
atatat | Roll the rest of the ports over to the new MI kernel build machinery.
Any problems reported by testers have been fixed, and massive
cross-compiling of kernels has shown that any problems that remain
with actually building kernels are not related to this.
|
| 1.24 | 26-Oct-2001 |
shin | branches: 1.24.2;
remove " in assignment of ENDIAN.
fixes mipseb link breakage.
|
| 1.23 | 26-Oct-2001 |
jmc | Change defaults for kernel compiles. Default all to USETOOLS?=no and have
the etc Makefile override that by putting USETOOLS into $.MAKEOVERRIDES
This way the default for kernel compiles is still to use the installed
toolchain instead of depending on $TOOLDIR. $TOOLDIR can be used by
simply adding USETOOLS=yes to the command line as usual.
Adjust each ports template to set the default no setting and also pull in
bsd.own.mk if they weren't already to ensure they'll build correctly
with the new toolchain setup.
|
| 1.22 | 23-Oct-2001 |
thorpej | branches: 1.22.2;
For MIPS kernel Makefiles, don't set ENDIAN in std.${MACHINE}. Instead,
explicitly set MACHINE_ARCH to the appropriate thing. Makefile.mips will
then set all of the internal variables it needs to accordingly.
|
| 1.21 | 23-Oct-2001 |
thorpej | Use MACHINE, not TARGET_MACHINE.
|
| 1.20 | 16-Oct-2001 |
uch | R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.19 | 08-Oct-2001 |
simonb | Use a separate variable (${KERNLDSCRIPT}) for the name of the kernel
ld script, so it can be used in other places.
|
| 1.18 | 05-Oct-2001 |
simonb | Use ".-include" instead of the ".if exists(...) ..." dance.
|
| 1.17 | 05-Oct-2001 |
simonb | Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
|
| 1.16 | 19-Jul-2001 |
oster | branches: 1.16.2;
By adding a well-placed space or two, 'make depend' no longer loses
due to a directory name like 'arc.current' messing up a sed substitution.
|
| 1.15 | 15-Jul-2001 |
takemura | Suppress warning message:
warning: duplicate script for target "fp.o" ignored
And delete verbose ifs.
|
| 1.14 | 29-May-2001 |
mrg | branches: 1.14.2;
define _KERNEL_OPT as well as _KERNEL. we will use this in the future to
get kernel "opt_foo.h" headers, rather than _KERNEL && !_LKM.
|
| 1.13 | 23-May-2001 |
hubertf | Allow overriding the 'install' target.
(I have a nice 'install' target for cobalts here, but that only works there.
I guess I'll put that into htdocs now that the cobalt port uses Makefile.mips)
|
| 1.12 | 28-Mar-2001 |
tsutsui | Define ${OBJCOPY}.
XXX: Should we use ${CROSSDIR} here or not?
|
| 1.11 | 04-Jan-2001 |
shin | branches: 1.11.2;
- don't ignore DEFCOPTS (Makefile.mips).
- DEFCOPTS of hpcmips is "-Os -mmemcpy" (std.hpcmips).
|
| 1.10 | 17-Dec-2000 |
jdolecek | delete obsolete comment
|
| 1.9 | 09-Dec-2000 |
matt | cpp/lorder/mkdep don't have cross specific versions.
|
| 1.8 | 03-Dec-2000 |
matt | branches: 1.8.2;
Add DEFGP/CROSSDIR for hpcmips.
|
| 1.7 | 03-Dec-2000 |
matt | Remove redundant depend of fp.S
|
| 1.6 | 03-Dec-2000 |
matt | Include FP support if NOFPU is *NOT* defined.
|
| 1.5 | 03-Dec-2000 |
matt | Revert back to a machinearch (really cputype) of mips. Put ENDIAN back.
|
| 1.4 | 03-Dec-2000 |
matt | Deal with lack of floating point on hpcmips, etc.
|
| 1.3 | 03-Dec-2000 |
matt | Change arch from mips to mipsel/mipseb as appropriate. Nuke the ENDIAN
makeoption. Key off MACHINE_ARCH for adding -EB/-EL to CFLAGS/AFLAGS/LD/
LINKFLAGS.
|
| 1.2 | 03-Dec-2000 |
matt | Add a POST_STRIP_SYSTEM_LD_FLAGS for mipsco and pmax.
|
| 1.1 | 03-Dec-2000 |
matt | Start using a Makefile.mips. Use a combination of makeoptions and
Makefile.sgimips.inc which has sgimips specific stuff.
|
| 1.8.2.5 | 21-Apr-2001 |
bouyer | Sync with HEAD
|
| 1.8.2.4 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.8.2.3 | 13-Dec-2000 |
bouyer | Sync with HEAD (for UBC fixes).
|
| 1.8.2.2 | 08-Dec-2000 |
bouyer | Sync with HEAD.
|
| 1.8.2.1 | 03-Dec-2000 |
bouyer | file Makefile.mips was added on branch thorpej_scsipi on 2000-12-08 09:28:20 +0000
|
| 1.11.2.2 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.11.2.1 | 09-Apr-2001 |
nathanw | Catch up with -current.
|
| 1.14.2.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.14.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.14.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.14.2.1 | 03-Aug-2001 |
lukem | update to -current
|
| 1.16.2.1 | 11-Oct-2001 |
fvdl | Catch up with -current. Fix some bogons in the sparc64 kbd/ms
attach code. cd18xx conversion provided by mrg.
|
| 1.22.2.2 | 12-Nov-2001 |
thorpej | Sync the thorpej-mips-cache branch with -current.
|
| 1.22.2.1 | 07-Nov-2001 |
shin | sync with trunk.
fixes mipseb link error.
|
| 1.24.2.6 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.24.2.5 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.24.2.4 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.24.2.3 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.24.2.2 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.24.2.1 | 26-Oct-2001 |
nathanw | file Makefile.mips was added on branch nathanw_sa on 2002-01-08 00:26:15 +0000
|
| 1.26.8.1 | 15-Nov-2002 |
lukem | Pull up revision 1.31 (via patch) (requested by thorpej in ticket #976):
Build with kernel with -msoft-float.
|
| 1.26.6.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.32.6.6 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.32.6.5 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.32.6.4 | 19-Oct-2004 |
skrll | Sync with HEAD
|
| 1.32.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.32.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.32.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.34.4.1 | 06-Feb-2005 |
jmc | Pull up patch (requested by martti in ticket #1086)
Move ipf to sys/dist/ipf and sync w. trunk
|
| 1.39.2.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.39.2.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.39.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.39.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.40.14.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.40.12.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.40.10.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.40.10.1 | 11-Apr-2006 |
yamt | sync with head
|
| 1.40.8.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.40.6.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.44.22.1 | 03-Sep-2007 |
wrstuden | Sync w/ NetBSD-4-RC_1
|
| 1.44.20.2 | 26-Jun-2007 |
garbled | Sync with HEAD.
|
| 1.44.20.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.44.14.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.44.12.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.44.8.1 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.44.6.1 | 11-Jun-2007 |
liamjfoy | Pull up following revision(s) (requested by tsutsui in ticket #715):
sys/arch/mips/mips/trap.c: revision 1.212
sys/arch/sbmips/conf/GENERIC: revision 1.60
sys/arch/mips/conf/Makefile.mips: revision 1.46
Preserve local symbols on linking a kernel so that
we can get more useful trace on ddb(4).
Bump SYMTAB_SPACE so that it fits again.
Use the kernel symbol table to see the beginning of the current
subroutine to get more proper backtrace on ddb(4).
In the previous code it scans backwards from the current PC
for the end of the previous subroutine and checks "jr ra" or
"jr k0" instructions, but it often fails because gcc is
so aggressive nowadays as to reorder instruction blocks
to create efficient code path by branch predict etc. and
"jr ra" is not always located at the end of subroutines.
No objection on port-mips.
|
| 1.46.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.46.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.47.8.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.47.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.50.24.7 | 21-Apr-2010 |
matt | sync with netbsd-5
|
| 1.50.24.6 | 14-Feb-2010 |
matt | We use ntrad* and so make objcopy use them too.
|
| 1.50.24.5 | 30-Jan-2010 |
matt | Change MIPS_CURLWP from s7 to t8. In a MALTA64 kernel, s6 is used 9155 times
which means the compiler could really use s7 is was free to do so. The least
used temporary was t8 (288 times). Once the kernel was switched to use t8 for
MIPS_CURLWP, s7 was used 7524 times.
Additionally a MALTA32 kernel shrunk by 6205 instructions (24820 bytes) or
about 1% of its text size.
[For some reason, pre-change t1 was never used and post change t2 was never
used. Not sure why.]
|
| 1.50.24.4 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.50.24.3 | 16-Sep-2009 |
matt | When making a ELF64 kernel, use objcopy to make a ELF32 N32 version as well.
The loader can't tell and this avoid requiring 64bit aware bootloaders.
|
| 1.50.24.2 | 21-Aug-2009 |
matt | Use LINKFORMAT, not LINKFLAGS.
|
| 1.50.24.1 | 20-Aug-2009 |
matt | Add support for building N64 kernels. This is done by adding
makeoptions LP64="yes"
to your config file.
|
| 1.50.20.1 | 07-Aug-2009 |
snj | Pull up following revision(s) (requested by sborrill in ticket #905):
sys/arch/alpha/conf/Makefile.alpha: revision 1.81
sys/arch/amd64/conf/Makefile.amd64: revision 1.26
sys/arch/i386/conf/Makefile.i386: revision 1.162
sys/arch/macppc/conf/Makefile.macppc: revision 1.31
sys/arch/mips/conf/Makefile.mips: revision 1.52
sys/arch/sparc64/conf/Makefile.sparc64: revision 1.68
sys/arch/xen/conf/Makefile.xen: revision 1.28
Clean-up makefile stub used to include in the build the binary HAL object
|
| 1.50.18.2 | 03-Mar-2009 |
skrll | Sync with HEAD.
|
| 1.50.18.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.50.16.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.50.10.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.50.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.50.6.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.52.2.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.55.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.55.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.55.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.55.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.58.14.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.58.14.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.58.4.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.61.2.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.61.2.3 | 22-Apr-2016 |
skrll | Sync with HEAD
|
| 1.61.2.2 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.61.2.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.65.4.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.65.2.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.67.12.3 | 18-Jan-2019 |
pgoyette | Synch with HEAD
|
| 1.67.12.2 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
|
| 1.67.12.1 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.68.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.70.16.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.72.14.1 | 11-Sep-2023 |
martin | Pull up following revision(s) (requested by rin in ticket #363):
sys/arch/aarch64/conf/Makefile.aarch64: revision 1.24
sys/arch/aarch64/conf/Makefile.aarch64: revision 1.25
sys/arch/shark/conf/Makefile.shark.inc: revision 1.28
sys/arch/alpha/conf/Makefile.alpha: revision 1.88
sys/arch/mips/conf/Makefile.mips: revision 1.73
sys/conf/Makefile.kern.inc: revision 1.298
sys/conf/Makefile.kern.inc: revision 1.299
sys/arch/cats/conf/Makefile.cats.inc: revision 1.37
sys/arch/arm/conf/Makefile.arm: revision 1.56
sys/arch/arm/conf/Makefile.arm: revision 1.57
sys/arch/riscv/conf/Makefile.riscv: revision 1.10
Always use arm-elf2aout; no a.out support both for binutils{,.old}
Fix kernel size inflation for arm and aarch64 (PR toolchain/57146)
For some conditions, SYSTEM_LD_TAIL is set for arm and aarch64.
Then, ctfmerge(1) in default SYSTEM_LD_TAIL is unintentionally
skipped, which results in the catastrophic kernel size inflation,
as reported in the PR.
Also, introduce and use OBJCOPY_STRIPFLAGS variable instead of
STRIPFLAGS, as strip(1) is replaced by objcopy(1) during MI
kernel build procedure.
For Makefile.{arm,aarch64}, weird logic is used to determine how
to handle debug symbols; MKDEBUG{,KERNEL} are taken into account
later in sys/conf/Makefile.kern.inc.
Use OBJCOPY_STRIPFLAGS instead of STRIPFLAGS.
Simplify fix for PR toolchain/57146
Introduce ARCH_STRIP_SYMBOLS variable to centralize logic for debug
symbols from MD Makefile's to Makefile.kern.inc.
|
| 1.4 | 23-Apr-2016 |
skrll | Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.3 | 04-Apr-2011 |
dyoung | branches: 1.3.14; 1.3.30; 1.3.32; 1.3.36;
Make usb_dma a dependency of ahci(4), since it needs usb_allocmem(9).
|
| 1.2 | 20-Mar-2007 |
dyoung | branches: 1.2.2; 1.2.4; 1.2.10; 1.2.22; 1.2.68; 1.2.74;
Comment out admflash, I have not supplied a source file for that,
yet.
|
| 1.1 | 20-Mar-2007 |
dyoung | Add a port to the Infineon ADM5120.
Basics: the ADM5120 is a 175 MHz MIPS32 4Kc processor featuring a
6-port ethernet 10/100 switch with Auto MDI/X, a PCI controller,
USB 1.1 controller, UART, watchdog timer, eight GPIO pins, and a
multiport memory controller with both NOR and NAND flash support.
This code supports most of the devices on the ADM5120, including
the 6-port switch (each port attaches as an ethernet, admsw0 through
admsw5), the PCI controller, USB controller, GPIO, watchdog, and
UART.
Remaining work: the port includes no NOR/NAND flash drivers. No
bootloader is included. I have only tested the PCI bus driver with
the use of one PCI slot on the RouterBOARD 153. It is not possible
to exploit the capabilities of the ethernet switch using bridge(4).
I have only netbooted the ADM5120 on the RB153. Booting other
boards, and booting from flash memory, remains to be done.
Hardware availability: many low-cost routers, including the
RouterBOARD 100 series at RouterBOARD.com, use the Infineon ADM5120
processor.
Credits: Ruslan Ermilov and Vsevolod Lobko ported to the ADM5120,
and they wrote device drivers for the UART, USB controller, and
10/100 switch. Matt Isaacs brought the port up-to-date with
NetBSD-current, made it compile, and ran it first on the RB153.
I added drivers for the PCI controller, GPIO, and watchdog timer.
I produced the bus attachment for the CompactFlash slot with advice
from Mikrotik technical support and from Matt Thomas.
|
| 1.2.74.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.68.1 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.22.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.2.22.1 | 20-Mar-2007 |
yamt | file files.adm5120 was added on branch yamt-lazymbuf on 2007-09-03 14:27:55 +0000
|
| 1.2.10.2 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.2.10.1 | 20-Mar-2007 |
mjf | file files.adm5120 was added on branch mjf-ufs-trans on 2007-07-11 20:00:45 +0000
|
| 1.2.4.2 | 10-Apr-2007 |
ad | Sync with head.
|
| 1.2.4.1 | 20-Mar-2007 |
ad | file files.adm5120 was added on branch vmlocking on 2007-04-10 13:22:44 +0000
|
| 1.2.2.2 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.2.2.1 | 20-Mar-2007 |
yamt | file files.adm5120 was added on branch yamt-idlelwp on 2007-03-24 14:54:54 +0000
|
| 1.3.36.1 | 23-Jan-2017 |
skrll | Adapt to branch
|
| 1.3.32.1 | 04-Dec-2014 |
skrll | Rework roothub control transfers so that much of the code is shared
across HCDs.
I have retained the vendor/product reporting for each HCD for now,
but it maybe get removed later.
ahci(4) now reports a language table and uses the usb_makestrdesc
function instead of rolling its own version.
|
| 1.3.30.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.3.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.14 | 08-May-2019 |
isaki | Merge isaki-audio2 branch, the overhaul of audio subsystem.
- Interrupt-oriented system rather than thread-oriented.
- Improve stability, quality and performance.
- Split playback and record cleanly. Improve halfduplex support.
- Many bugs are fixed including deadlocks, resource leaks, abuses, etc.
- Simplify audio filter mechanism. The encoding/channels/frequency
conversions are completely handled in the upper layer. So the hard-
ware driver only converts its hardware encoding (if necessary).
- audio_hw_if changes:
- Obsoletes query_encoding and add query_format instead.
- Obsoletes set_params and add set_format instead.
- Remove drain, setfd, mappage.
- The call sequences are changed.
- ioctl AUDIO_GETFD/SETFD, AUDIO_GETCHAN/SETCHAN are obsoleted.
- ioctl AUDIO_{QUERY,GET,SET}FORMAT are introduced.
- cleanup config attributes: au*conv and mulaw.
- All hardware drivers should follow it (I've done as much as possible).
Some file paths are changed:
- dev/audio.c -> dev/audio/audio.c (rewritten)
- dev/audiovar.h -> dev/audio/audiovar.h
- dev/audio_dai.h -> dev/audio/audio_dai.h
- dev/audio_if.h -> dev/audio/audio_if.h
- dev/audiobell.c -> dev/audio/audiobell.c
- dev/audiobellvar.h -> dev/audio/audiobellvar.h
- dev/mulaw.[ch] -> dev/audio/mulaw.[ch] + dev/audio/alaw.c
|
| 1.13 | 02-Oct-2006 |
gdamore | branches: 1.13.144; 1.13.146;
Add Alchemy PSC SPI bus protocol driver. Not activated on any boards yet,
that requires an evbmips commit.
|
| 1.12 | 13-Jul-2006 |
gdamore | branches: 1.12.4; 1.12.6;
Add an option COM_REGMAP to allow com(4) to use an array of register indices.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
|
| 1.11 | 06-Mar-2006 |
shige | branches: 1.11.8;
Add support for On-chip PSC SMBus protocol.
|
| 1.10 | 24-Feb-2006 |
shige | branches: 1.10.2;
Add Au1XXX PSC(Programable Serial Controller) bus-type driver.
PSC supports four protocols (AC97, I2S, SPI, SMBus).
These protocol drivers will be configured on the bus.
|
| 1.9 | 23-Feb-2006 |
gdamore | Initial commit of aupcmcia chip driver. It requires board specific logic
(coming in a the follow up commit for dbau1550 only), and is not yet complete.
It has serious problems, enough that it isn't yet usable, although the
functionality is all basically fleshed out. It is not enabled in any
default kernels at this point, so it should be benign. Hopefully the
bugs will soon be worked out and these caveats can be removed.
|
| 1.8 | 16-Feb-2006 |
gdamore | Reenable PCI on DBAU1500. May still be useful for PIO devices. Comments
in the config are left intact, though.
Add a PMAP-driven bus_space for access to upper memory, instead of using
wired entries.
Convert aupci to use said bus_space -- no measured performance impact.
|
| 1.7 | 12-Feb-2006 |
gdamore | Add GPIO driver, and GPIO access functions for other subsystems.
|
| 1.6 | 09-Feb-2006 |
gdamore | Add Au1550 PCI support (Au1500 not yet, coming shortly).
Closes PR port-evbmips/32087.
Reviewed by simonb@ (Also, earlier, matt@, and tsutsui@.)
|
| 1.5 | 06-Feb-2006 |
gdamore | Fix up incorrect ICU reporting, add processor specific switch tables for
IRQ routing and such.
Closes PR port-evbmips/31992.
Reviewed by simonb@, matt@, and izumi@
|
| 1.4 | 11-Dec-2005 |
christos | branches: 1.4.2; 1.4.4; 1.4.6;
merge ktrace-lwp.
|
| 1.3 | 08-Nov-2003 |
simonb | branches: 1.3.16;
Add a "COM_AU1x00" option, similar to COM_PXA2X0, for enabling Au1x00
features in the "com" driver.
|
| 1.2 | 01-Apr-2003 |
hpeyerl | branches: 1.2.2;
s/ohci.c/ohci_aubus.c/
|
| 1.1 | 29-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the the Alchemy Semiconductor Au1x00 series on-chip
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 29-Jul-2002 |
jdolecek | file files.alchemy was added on branch kqueue on 2002-09-06 08:37:28 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 29-Jul-2002 |
gehenna | file files.alchemy was added on branch gehenna-devsw on 2002-08-31 13:45:18 +0000
|
| 1.1.2.2 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 29-Jul-2002 |
nathanw | file files.alchemy was added on branch nathanw_sa on 2002-08-01 02:42:29 +0000
|
| 1.2.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.3.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.4.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.4.2.2 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.4.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.10.2.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.10.2.1 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.11.8.1 | 15-Jun-2006 |
gdamore | Configure com devices by default rather than aucom.
|
| 1.12.6.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.12.4.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.13.146.1 | 05-May-2019 |
isaki | Remove obsoleted au{,rate,vol}conv and mulaw attributes.
audio provides the equivalent of them inseparably.
|
| 1.13.144.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.10 | 10-Jul-2011 |
matt | Fix machine/ includes
|
| 1.9 | 07-Jul-2011 |
matt | Revamp / rework the Atheros MIPS SoC support. Add initial support for the
AR71xx (MIPS 24K core) SoC and the AR9344 (MIPS 74K core) SoC. Force use
of -mips32 for all Atheros kernels. Make code much more common.
|
| 1.8 | 07-Oct-2006 |
gdamore | Add Atheros SPI controller. This is a "pseudo-controller", as it has some
artificial limitations which really only make it good for use with serial
flash devices. One of the more annoying limitations is a restriction that
it can only transfer 8 bytes at a time. (4 command/address, plus 4 data.)
The driver includes design to work around those limitations, but these
changes are only appropriate for serial flash devices.
This driver is designed to run in interrupt driven mode, but due to lack
of adequate documentation, we run it in polled mode.
A subsequent commit will introduce the MI M25P flash driver, which has been
tested and is known to function somewhat reasonably..
|
| 1.7 | 26-Sep-2006 |
gdamore | Initial import of AR2315 support, specifically the Meraki Mini (see
the Meraki web site at http://www.meraki.net/ ) This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.
All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.
This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
|
| 1.6 | 04-Sep-2006 |
gdamore | branches: 1.6.2; 1.6.4; 1.6.6;
This is a boat-load of changes designed to finish parameterizing the
stuff necessary to separate out AR5312 from AR5315. This includes:
1) rework of arbus IRQs, so that IRQs are now seperately specified
as either MISC or CPU irqs
2) move board/chip-specific addresses into chip-dependent file
3) unencumber argpio from ar5312 specifics, using properties to pass
details such as reset-pin and sysled-pin.
4) an option to select which WiSoC is to be configured is provided.
AR5315 support should be forthcoming shortly now.
|
| 1.5 | 28-Aug-2006 |
gdamore | First pass at cleanup AR5312 WiSoC support to enable better & cleaner
sharing of code with the AR5315, which has many similarities, but many
differences from the AR5312.
No functional change at this time, other than the cpu_model string
(and also sysctl.hw.model node) is changed to reflect the WiSoC cpu
name rather than the identification string in ROM (which tends to not
be very informative.)
|
| 1.4 | 07-Jul-2006 |
gdamore | Add AR531X GPIO support. This also registers the reset button with sysmon,
so that when it is pressed the default reset button action (currently board
reset, no change to data in flash) is taken.
While here, remove the AR531X generic config, because it just doesn't make
sense.
|
| 1.3 | 25-May-2006 |
gdamore | branches: 1.3.2; 1.3.4;
Rename flash to athflash to reflect MD nature. Approved by simon@ and dyoung@
|
| 1.2 | 14-May-2006 |
elad | branches: 1.2.2;
integrate kauth.
|
| 1.1 | 21-Mar-2006 |
gdamore | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
Initial import of Atheros AR531X SoC support. Currently the onboard ethernet
and serial ports are supported, and the system appears stable with an NFS
mounted root. An earlier version of the code was reviewed by simon@, but it
has since had numerous improvements and cleanups.
At the moment, only AR5312 is known to work, but I suspect AR2313 will work
as well. Later 2315/2316 parts are substantially different, and are not yet
supported. Wifi and Marvell switch support found on some designs are not yet
supported.
Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear
WGU624.
|
| 1.1.8.3 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.1.8.2 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.1.8.1 | 21-Mar-2006 |
simonb | file files.atheros was added on branch simonb-timecounters on 2006-04-22 11:37:42 +0000
|
| 1.1.6.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.1.6.1 | 21-Mar-2006 |
elad | file files.atheros was added on branch elad-kernelauth on 2006-04-19 02:33:18 +0000
|
| 1.1.4.6 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.5 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.4.4 | 11-Aug-2006 |
yamt | sync with head
|
| 1.1.4.3 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.1.4.2 | 11-Apr-2006 |
yamt | sync files somehow mis-tagged by yamt-pdpolicy-base2.
|
| 1.1.4.1 | 21-Mar-2006 |
yamt | file files.atheros was added on branch yamt-pdpolicy on 2006-04-11 12:20:51 +0000
|
| 1.1.2.2 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.1.2.1 | 21-Mar-2006 |
tron | file files.atheros was added on branch peter-altq on 2006-03-28 09:47:17 +0000
|
| 1.2.2.1 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.3.4.3 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.4.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.3.4.1 | 25-May-2006 |
yamt | file files.atheros was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.3.2.2 | 13-Jul-2006 |
gdamore | Merge from HEAD.
|
| 1.3.2.1 | 15-Jun-2006 |
gdamore | Adapt to new com framework. While here, make sure com only matches real com
devices.
|
| 1.6.6.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.6.4.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.6.4.1 | 04-Sep-2006 |
rpaulo | file files.atheros was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:26 +0000
|
| 1.6.2.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1 | 01-Aug-2009 |
matt | branches: 1.1.2;
Extract bonito support from sys/arch/algor/conf/files.algor so it can be
used by multiple ports.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 01-Aug-2009 |
yamt | file files.bonito was added on branch yamt-nfs-mp on 2009-08-19 18:46:29 +0000
|
| 1.10 | 21-May-2017 |
skrll | branches: 1.10.8;
Provide and use some CP0 accessor functions instead of M[TF]C0 macros
for readability.
While here convert some other M[TF]C0 uses to already exising accessor
functions, e.g. mipsNN_cp0_ebase_read
|
| 1.9 | 19-May-2017 |
skrll | Move arch/mips/mips/bus_dma.c to correct location
|
| 1.8 | 08-Oct-2015 |
macallan | add a driver for the chip's EFUSE interface, use it to find the MAC address
for the onboard ethernet controller
|
| 1.7 | 07-Aug-2015 |
macallan | add driver for jz4780 random number generator
From Michael McConville
|
| 1.6 | 11-Jul-2015 |
macallan | - get rid of private bus space in ingenic_com.c
- move com to apbus
- attach the other UARTs
|
| 1.5 | 04-Apr-2015 |
macallan | preliminary driver for JZ4780's on-chip SMBus controllers
needs more work but it's good enough for talking to an RTC
|
| 1.4 | 10-Mar-2015 |
macallan | config goop for dme
|
| 1.3 | 08-Mar-2015 |
macallan | drivers for on-chip ohci and ehci
ohci works fine, ehci doesn't like high speed devices
|
| 1.2 | 06-Dec-2014 |
macallan | config goop for apbus and dwc2/usb
|
| 1.1 | 22-Nov-2014 |
macallan | branches: 1.1.2;
initial support for CI20 / Ingenic JZ4780
not much there yet, it loads, attaches a serial port and you can drop into
ddb
|
| 1.1.2.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.1.2.3 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.1.2.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.10.8.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.8.1 | 21-May-2017 |
jdolecek | file files.ingenic was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.84 | 25-May-2021 |
simonb | Alignment nit.
|
| 1.83 | 23-Mar-2021 |
simonb | branches: 1.83.2; 1.83.4;
Work in progress for MIPS modules. Only tested on mipseb64, not yet
enabled anywhere.
|
| 1.82 | 23-Mar-2021 |
simonb | Remove duplicate out-of-place comment.
|
| 1.81 | 21-Oct-2020 |
christos | branches: 1.81.2; 1.81.4;
make process_machdep.c included always since it provides register i/o used by
sys_process_getlwpstatus.c which is always included.
|
| 1.80 | 20-Oct-2020 |
christos | harmonize process_machdep.c inclusion.
|
| 1.79 | 15-Aug-2020 |
mrg | move stacktrace_subr() from trap.c into new mips_stacktrace.c so
it can be shared between ddb, other mips kernel components (see
locore), and an upcoming crash(8) port.
remove second copy of kdbpeek() (hidden by old DDB_TRACE
option, but they're functionally equivalent.)
tested on octeon.
ok simonb@
|
| 1.78 | 09-Aug-2020 |
skrll | More whitespace
|
| 1.77 | 09-Aug-2020 |
skrll | defflag foo on each line to make searching easier.
sort some lines and fix some indentation while I'm here.
|
| 1.76 | 27-Jan-2019 |
pgoyette | Merge the [pgoyette-compat] branch
|
| 1.75 | 11-Jul-2016 |
matt | branches: 1.75.16; 1.75.18;
Use sdcache routines.
Remove old cache support.
Switch to new cache routines.
|
| 1.74 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.73 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.72 | 16-Aug-2011 |
matt | branches: 1.72.12; 1.72.30;
Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.71 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.70 | 12-Jun-2011 |
rmind | Welcome to 5.99.53! Merge rmind-uvmplock branch:
- Reorganize locking in UVM and provide extra serialisation for pmap(9).
New lock order: [vmpage-owner-lock] -> pmap-lock.
- Simplify locking in some pmap(9) modules by removing P->V locking.
- Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share
the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs).
- Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner.
Add TLBSTATS option for x86 to collect statistics about TLB shootdowns.
- Unify /dev/mem et al in MI code and provide required locking (removes
kernel-lock on some ports). Also, avoid cache-aliasing issues.
Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches
formed the core changes of this branch.
|
| 1.69 | 26-Apr-2011 |
joerg | branches: 1.69.2;
Remove IRIX emulation
|
| 1.68 | 14-Apr-2011 |
cliff | - option MIPS_DDB_WATCH is deprecated, removed
|
| 1.67 | 06-Apr-2011 |
matt | slight reordering. no functional change.
|
| 1.66 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.65 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.64 | 14-Dec-2009 |
matt | branches: 1.64.2; 1.64.4; 1.64.6; 1.64.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.63 | 09-Aug-2009 |
matt | Add latent ENABLE_MIPS_16KB_PAGE option.
|
| 1.62 | 07-Aug-2009 |
matt | Add loongson2 specific cache ops
|
| 1.61 | 06-Aug-2009 |
matt | Change MIPS64_LOONGSON2 to MIP3_LOONGSON2 since it's a MIPS3 and not MIPS64.
|
| 1.60 | 01-Aug-2009 |
matt | Add MIPS64_LOONGSON2F since it needs some special help in various places.
|
| 1.59 | 19-Nov-2008 |
ad | Make the emulations, exec formats, coredump, NFS, and the NFS server
into modules. By and large this commit:
- shuffles header files and ifdefs
- splits code out where necessary to be modular
- adds module glue for each of the components
- adds/replaces hooks for things that can be installed at runtime
|
| 1.58 | 25-Jan-2008 |
joerg | branches: 1.58.6; 1.58.10; 1.58.16; 1.58.18; 1.58.24;
Refactor in_cksum/in4_cksum/in6_cksum implementations:
- All three functions are included in the kernel by default.
They call a backend function cpu_in_cksum after possibly
computing the checksum of the pseudo header.
- cpu_in_cksum is the core to implement the one-complement sum.
The default implementation is moderate fast on most platforms
and provides a 32bit accumulator with 16bit addends for L32 platforms
and a 64bit accumulator with 32bit addends for L64 platforms.
It handles edge cases like very large mbuf chains (could happen with
native IPv6 in the future) and provides a good base for new native
implementations.
- Modify i386 and amd64 assembly to use the new interface.
This disables the MD implementations on !x86 until the conversion is
done. For Alpha, the portable version is faster.
|
| 1.57 | 17-Oct-2007 |
garbled | branches: 1.57.2;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.56 | 07-Jul-2007 |
tsutsui | branches: 1.56.2; 1.56.10;
Remove leftover netns stuff.
|
| 1.55 | 09-Feb-2007 |
ad | branches: 1.55.6; 1.55.8; 1.55.14;
Merge newlock2 to head.
|
| 1.54 | 25-Mar-2006 |
tsutsui | branches: 1.54.8;
Update FPE trapsignal functions for new siginfo,
based on a patch provided by Matthias Drochner.
Ok'ed by christos, and fixes PR port-mips/26410.
|
| 1.53 | 11-Dec-2005 |
christos | branches: 1.53.4; 1.53.6; 1.53.8; 1.53.10; 1.53.12;
merge ktrace-lwp.
|
| 1.52 | 05-Nov-2005 |
tsutsui | Add MI mips3 wired map functions based on patch in port-mips/31915
from Garrett D'Amore of Tadpole Computer Inc.
Please refer discussion filed in the PR for details.
|
| 1.51 | 24-Jan-2005 |
drochner | branches: 1.51.6; 1.51.8; 1.51.14;
-remove definition of "struct sigframe" -- haven't found a use of it
(should fix build problems w/o COMPAT_16 reported by Markus W Kilbinger
per PR port-mips/29041 and by Havard Eidnes)
-further shuffle COMPAT_* conditionals to allow COMPAT_ULTRIX
w/o COMPAT_16
|
| 1.50 | 04-Mar-2004 |
drochner | branches: 1.50.8;
fix some problems with FPU exception signaling:
-The MachFPTrap did generate pre-siginfo arguments to trapsignal(),
leading to an immediate crash.
Put the siginfo generation into a separate .c file for simplicity.
-The exception bits in MIPS_FPU_CSR didn't get cleared, leading to
trouble later ("kernel used FPU" on pmax).
XXX This should probably be done for the "unimplemented fpu instruction"
case as well, but I don't know how to test this. Or, even better -
centralize the CSR clearing before the branch in MachFPTrap.
|
| 1.49 | 12-Dec-2003 |
sekiya | Remove preprocessor conditional MIPS3_L2CACHE_ABSENT, which was rendered
superfluous by Tsutsui-san's previous changes.
(this change differs slightly from that posted to port-mips@, as
mips_flushcache_allpvh should be compiled iff MIPS3_PLUS is defined and
MIPS3_L2CACHE_ABSENT should be removed from files.mips as well)
|
| 1.48 | 29-Oct-2003 |
christos | add compat_16_machdep.c
|
| 1.47 | 05-Oct-2003 |
tsutsui | Add R10000 cache ops, written by KIYOHARA Takashi and posted on port-sgimips.
Enabled by options ENABLE_MIPS4_CACHE_R10K for now.
|
| 1.46 | 08-Mar-2003 |
rafal | branches: 1.46.2;
Add support for R5k secondary caches, from code Chris Sekiya sent me a long
time ago, with small tweaks by me. Since the R5k doesn't do VCE, the pmap
still needs to be whacked for R5kSC CPUs to work correctly, but this is a
start.
|
| 1.45 | 15-Nov-2002 |
simonb | Put the MIPS64_SB1 option in opt_cputype.h.
|
| 1.44 | 09-Nov-2002 |
nisimura | - Make monolistic files into smaller manageable pieces, resulting
three new files;
sig_machdep.c (from mips_machdep.c)
copy.S and sigcode.S (from locore.S)
- Nuke the local use of struct sigframe, which is now identical to
struct sigcontext, from sendsig() as the consequence of new signal
trampoline.
|
| 1.43 | 08-Nov-2002 |
simonb | Note a new MIPS64_SB1 option that should be included in opt_cputype.h
one day.
|
| 1.42 | 06-Jul-2002 |
gmcgarry | Overhaul the emulation facility. We do this by:
- accumulating all emulation code (including floating-point) in one place
- steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts
and traps from *real* FPUs
- introducing MachEmulateInst() as a common dispatch point for all
emulated instructions
- cleaning up emulation dispatch in trap()
Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1.
Tested on r3k with and without SOFTFLOAT enabled.
|
| 1.41 | 01-Jun-2002 |
simonb | Use the current MIPS in_cksum for in4_cksum too.
|
| 1.40 | 03-Apr-2002 |
simonb | branches: 1.40.2;
Don't make arch/mips/mips/mips_mcclock.c mandatory for all mips ports
with an mcclock - pmax is the only one currently using this.
|
| 1.39 | 13-Mar-2002 |
simonb | All the mips ports had an identical procfs_machdep.c, so use a common
file under arch/mips/mips.
|
| 1.38 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Build mips3/5900/32/64 support subroutines.
- Move arch/mips/mips/fp.S to central location.
- Move NOFPU to opt_cputype.h.
|
| 1.37 | 14-Jan-2002 |
soren | Options MIPS3_5200 and MIPS3_L2CACHE_PRESENT are gone.
|
| 1.36 | 02-Dec-2001 |
uch | TX39, R5900 cache configuration.
|
| 1.35 | 28-Nov-2001 |
lukem | - convert usage of "defopt" to "defflag" where the relevant option does
not support a value (e.g., it's to be used as "options FOO" instead of
"options FOO=xxx"). options that take a value were converted to
defparam recently.
- minor whitespace & formatting cleanups
|
| 1.34 | 26-Nov-2001 |
manu | Added COMPAT_IRIX (being developped, not functionnal at that time)
|
| 1.33 | 20-Nov-2001 |
lukem | cleanup:
options SPACE TAB
makeoptions TAB
psuedo-device TAB
remove trailing whitespace
replace multiple spaces -> tabs
options "FOO" -> options FOO
options "FOO=bar" -> options FOO=bar
options "FOO=\"bar\"" -> options FOO="\"bar\""
|
| 1.32 | 14-Nov-2001 |
thorpej | branches: 1.32.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.31 | 23-Sep-2001 |
manu | branches: 1.31.2;
Moved COMPAT_LINUX config stuff from arch/sgimips to arch/mips, so that it's
available on all Mips ports.
|
| 1.30 | 16-Jan-2001 |
thorpej | branches: 1.30.2; 1.30.4;
New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
|
| 1.29 | 31-Oct-2000 |
jeffs | Add MIPS3_NO_PV_UNCACHED option to handle virtual coherency issues by
only allowing one mapping at a time instead of mapping uncached. Done
by removing conflicting mappings from the pmap when entering a new
mapping. UVM will remember and re-fault the requested page when needed
for the original mapping. Originally done to support our internal machine
that does not support uncached memory completely. Not enabled by default
currently. It may make sense to try on the cobalt or sgi ports.
|
| 1.28 | 04-Oct-2000 |
cgd | provide indicators of a few more things that might go in opt_cputype.h
|
| 1.27 | 17-Jul-2000 |
jeffs | Pull in geocast mips ddb improvements and start bringing in kgdb support.
Add ddb support for QED opcodes, fill in enough routines so "next" usually
works, kdbpoke support for any size. Add callback that ports can hook when
entering and leaving ddb. This can be used for things like turning
off watchdogs while in ddb.
|
| 1.26 | 23-May-2000 |
soren | MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,
so remove references them, and do a little other cleanup.
|
| 1.25 | 21-May-2000 |
soren | Populate the cputype defopt (not enabled yet).
|
| 1.24 | 29-Apr-2000 |
soren | Allow non-pmax to use COMPAT_ULTRIX.
|
| 1.23 | 14-Feb-2000 |
thorpej | Allow arch-specific code to specify in4_cksum() like it can specify
in_cksum().
|
| 1.22 | 22-Dec-1999 |
jun | FIX:
port-mips/9016 [serious/medium]:
MIPS FPU emulator points wrong epc on exception case
Responsible: port-mips-maintainer (NetBSD/mips Portmasters)
State: open
Class: sw-bug
Originator: Shuichiro URATA
Release: current 12/11/1999
Arrival-Date: Fri Dec 17 10:18:00 1999
commit patch
http://www.a-r.org/~ur/softfloat1211.diff.gz
by Shuichiro URATA (ur@a-r.org)
|
| 1.21 | 18-Nov-1999 |
jun | on port-mips@netbsd.org:
Shuichiro URATA <ur@a-r.org> makes kernel softfloat emulation code.
http://www.a-r.org/~ur/softfloat1116.diff.gz
is Patch for
sys/arch/mips/conf/files.mips
sys/arch/mips/mips/fp.S
sys/arch/mips/mips/fpemu.c
sys/arch/mips/mips/genassym.cf
sys/arch/mips/mips/locore.S
sys/arch/mips/mips/mips_machdep.c
sys/arch/mips/mips/process_machdep.c
sys/arch/mips/mips/trap.c
sys/arch/mips/mips/vm_machdep.c
After apply this patch,pmax package binary works on hpcmips!
|
| 1.20 | 24-Apr-1999 |
simonb | branches: 1.20.2; 1.20.8;
Nuke register and remove trailling white space.
|
| 1.19 | 14-Jan-1999 |
castor | branches: 1.19.4;
Add defopt opt_mips_cache.h and allow 'clock' device to not require the mc6xx files
|
| 1.18 | 02-Oct-1998 |
drochner | compat_13_sigreturn is needed for compat_ultrix too
|
| 1.17 | 13-Sep-1998 |
thorpej | Make signal delivery work again.
|
| 1.16 | 15-Jul-1998 |
jonathan | Add empty opt_cputype.h to satisfy changes committed during
defopt'ing of network options.
|
| 1.15 | 19-Apr-1998 |
jonathan | Configure mips_mclock if "clock|mccclock".
All(?) ARC boxes use mcclock, but QBus decstations use the same
time-of-year clock architecturally mandated for VAXes.
|
| 1.14 | 05-Jan-1998 |
perry | RCSID Police.
|
| 1.13 | 12-Aug-1997 |
jonathan | Fix for mbufs that start on odd-byte-aligned boundaries, and use.
|
| 1.12 | 09-Aug-1997 |
jonathan | MIPS cpu-speed detection using mc146818 clock.
Compute CPU speed(MHz) and loop multiplier for DELAY() based on
counting empty loop between mcclock ticks. New global: cpu_mhz.
Change pmax/pmax/machdep.c to build baseboard model names from cpu_mhz.
Set 'cpuspeed' for more realistic DELAY() on mips3 models.
Mips CPU constants, testing, and calibration from D. Sean Davidson
<davidson@zk3.dec.com> and Simon Burge <simonb@telstra.com.au>.
|
| 1.11 | 25-Jul-1997 |
jonathan | branches: 1.11.2;
revert to MI in_cksum code.
|
| 1.10 | 20-Jul-1997 |
jonathan | mips-tuned bcopy from Jon Kay (UCSD) released under BSD copyright,
with standard BSD in_cksum() interface by Jonathan Stone.
|
| 1.9 | 20-Jul-1997 |
jonathan | Add ddb to mips/conf/files.mips. Garbage-collect mdb.
|
| 1.8 | 28-Jun-1997 |
mhitch | Fix typo.
Include minidebug.c with options MDB.
|
| 1.7 | 16-Jun-1997 |
jonathan | Use generic MIPS pmap vm_machdep.c
|
| 1.6 | 09-Jun-1997 |
jonathan | Move the mips sys_machdep.c from pmax/pmax to mips/mips, to enforce a
common sysarch on all mips ports.
|
| 1.5 | 11-Nov-1996 |
jonathan | Eliminate old mips/mips/elf.c ELF exec code.
Don't call into from the a.out exec hook; don't configure it into kernels.
|
| 1.4 | 13-Oct-1996 |
jonathan | Change pmax port over to using ``mips MI'' trap handler.
|
| 1.3 | 12-Oct-1996 |
mhitch | Add arch/mips/mips/mips_machdep.c, it's now compiled as a separate file.
|
| 1.2 | 26-Mar-1996 |
jonathan | Add mips/mips/mem.c and mips/mips/process_machdep.c
|
| 1.1 | 19-Mar-1996 |
jonathan | Kernel config file for source code shared by mips-based NetBSD ports.
|
| 1.11.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.19.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.20.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.20.2.3 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.20.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.20.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.30.4.5 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.30.4.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.30.4.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.30.4.2 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.30.4.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.30.2.1 | 01-Oct-2001 |
fvdl | Catch up with -current.
|
| 1.31.2.1 | 24-Oct-2001 |
thorpej | Pull in new cache code, conditional on which CPU arch's are configured
into the kernel.
|
| 1.32.2.9 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.32.2.8 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.32.2.7 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.32.2.6 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.32.2.5 | 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.32.2.4 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.32.2.3 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.32.2.2 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.32.2.1 | 14-Nov-2001 |
nathanw | file files.mips was added on branch nathanw_sa on 2002-01-08 00:26:15 +0000
|
| 1.40.2.2 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.40.2.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.46.2.5 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.46.2.4 | 04-Feb-2005 |
skrll | Sync with HEAD.
|
| 1.46.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.46.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.46.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.50.8.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.51.14.1 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1260):
sys/arch/mips/mips/fp.S: revision 1.31
sys/arch/mips/mips/mips_fputrap.c: revision 1.3
sys/arch/mips/conf/files.mips: revision 1.54
Update FPE trapsignal functions for new siginfo,
based on a patch provided by Matthias Drochner.
Ok'ed by christos, and fixes PR port-mips/26410.
|
| 1.51.8.4 | 04-Feb-2008 |
yamt | sync with head.
|
| 1.51.8.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.51.8.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.51.8.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.51.6.1 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1260):
sys/arch/mips/mips/fp.S: revision 1.31
sys/arch/mips/mips/mips_fputrap.c: revision 1.3
sys/arch/mips/conf/files.mips: revision 1.54
Update FPE trapsignal functions for new siginfo,
based on a patch provided by Matthias Drochner.
Ok'ed by christos, and fixes PR port-mips/26410.
|
| 1.53.12.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.53.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.53.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.53.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.53.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.54.8.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.55.14.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.55.8.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.55.6.1 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.56.10.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.56.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.56.2.1 | 18-Jul-2007 |
matt | Add netbsd32 entry
|
| 1.57.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.58.24.20 | 27-Feb-2012 |
matt | Add option NOMIPSEMUL so disable (almost) all emulation.
|
| 1.58.24.19 | 27-Dec-2011 |
matt | Add core_r4k_pcache*.S files.
|
| 1.58.24.18 | 23-Dec-2011 |
matt | Split syncicache functions into separate file: pmap_syncicache.
Support up to 1024 ASIDs.
Always use atomic ops for manipulating pm_shootdown_pending
Nuke PMAP_POOLPAGE_DEBUG
defparam MIPS_PAGE_SHIFT
Track colors of execpages.
|
| 1.58.24.17 | 02-Dec-2011 |
matt | Add support for 8KB pages.
|
| 1.58.24.16 | 29-Nov-2011 |
matt | Take part of the KSEG2 space and use it to "almost" direct another 256MB
of memory so that N32 kernels can make use of ram outside of KSEG0. This
allows N32 kernels to be useful on systems with 4GB of RAM or more.
|
| 1.58.24.15 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.58.24.14 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.58.24.13 | 05-Feb-2011 |
cliff | - define config options flag MIPS_DDB_WATCH, enables COP0 watchpoint support in ddb
|
| 1.58.24.12 | 29-Dec-2010 |
matt | Break out break slot instruction emualtion into its own .S file.
Redo that and simplify
|
| 1.58.24.11 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.58.24.10 | 28-Feb-2010 |
matt | Add spl_stubs.c
|
| 1.58.24.9 | 27-Feb-2010 |
matt | Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
|
| 1.58.24.8 | 06-Feb-2010 |
cliff | add entry for mips/spl.S so kernel can compile
|
| 1.58.24.7 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.58.24.6 | 29-Jan-2010 |
matt | Change mips kernel options SOFTFLOAT to FPEMUL. Allow a kernel to have
no FP emulation code. Fix insufficient SYMTAB_SPACE. When a kernel without
an FPU and with FPEMUL code, the application will trap with a SIGILL/ILL_ILLOPC
signal, not SIGSEGV/SEGV_MAPERR.
|
| 1.58.24.5 | 22-Jan-2010 |
matt | Seperate the pmap TLB functions into their own file.
For 32 bit kernels, make sure that mips_virtual_end doesn't go past
VM_MAX_KERNEL_ADDRESS.
|
| 1.58.24.4 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.58.24.3 | 13-Sep-2009 |
cliff | add MIPS64_XLP MIPS64_XLR MIPS64_XLS to list of flags in opt_cputype.h
|
| 1.58.24.2 | 12-Sep-2009 |
matt | Add COMPAT_NETBSD32 support
|
| 1.58.24.1 | 23-Aug-2009 |
uebayasi | Make ddb(4) trace work on 64-bit ABIs.
For now:
- Values are shown in 32-bit.
- Only 4 arguments are shown.
- DDB_TRACE (heuristic version) is left as is.
Reviewed By: matt
|
| 1.58.18.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.58.16.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.58.10.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.58.10.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.58.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.58.6.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.64.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.64.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.64.4.4 | 31-May-2011 |
rmind | sync with head
|
| 1.64.4.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.64.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.64.4.1 | 18-Mar-2010 |
rmind | Unify /dev/{mem,kmem,zero,null} implementations in MI code. Based on patch
from Joerg Sonnenberger, proposed on tech-kern@, in February 2008.
Work and depression still in progress.
|
| 1.64.2.2 | 30-Oct-2010 |
uebayasi | Implement pmap_physload_device(9) to replace xmd(4) MD backend.
Implement pmap_mmap(9) and use it from mem(4) and xmd(4).
|
| 1.64.2.1 | 28-Aug-2010 |
uebayasi | xmd(4) glue for mips. Not tested.
|
| 1.69.2.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.72.30.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.72.30.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.72.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.75.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.75.16.1 | 29-Sep-2018 |
pgoyette | Add glue for netbsd32 compat_13 and _16 modules
|
| 1.81.4.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.81.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.83.4.1 | 31-May-2021 |
cjep | sync with head
|
| 1.83.2.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.14 | 06-Sep-2025 |
thorpej | Step towards modularizing the Flattened Device Tree code.
Define attributes for each of the specific device bindings: clock,
dai, dma, gpio, i2c, iommu, mbox, mmc_pwrseq, phy, power, power domain,
pwm, regulator, reset controller, spi, system controller, pin
controller. Include these support files only if either a provider
or consumer with one of these attributes is present in the kernel
config.
Add the necessary attributes to the device / attach declarations for
each provider and consumer.
There are some bindings that are consumed by generic code (iommu, pinctrl,
power, power domain). Provide weak stubs for these routines to handle
situations where there is no provider.
No actual code changed; NFCI.
|
| 1.13 | 26-Mar-2024 |
riastradh | mips/conf/files.octeon: octrnm does not depend on rnd
Whether or not we have /dev/random and /dev/urandom baked into the
kernel, configuring `octrnm* at ...' in the kernel config requires
octeon_rnm.c.
Related to PR kern/46728.
|
| 1.12 | 16-Jul-2020 |
jmcneill | Add USB3 support.
|
| 1.11 | 16-Jul-2020 |
jmcneill | Add driver for Cavium Interrupt Bus.
|
| 1.10 | 16-Jul-2020 |
jmcneill | FDT support for Cavium OCTEON MIPS SoCs. WIP.
|
| 1.9 | 24-Jun-2020 |
simonb | Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
Missed one file - thanks martin@.
|
| 1.8 | 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.7 | 15-Jun-2020 |
simonb | Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)
|
| 1.6 | 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.5 | 31-May-2020 |
simonb | Clean up Cavium Octeon device names. Rename devices from "octeon_foo"
to "octfoo" - this follows the naming conventions used by many other
MIPS CPUs.
|
| 1.4 | 06-Jun-2015 |
matt | branches: 1.4.2; 1.4.18;
Add a wdog for octeon
|
| 1.3 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.2 | 01-May-2015 |
hikaru | Use dwc2 instead of octeon_usbc, and unify octeon_usbn to new octeon_dwctwo.
Internal USB memory stick of EdgeRouter Lite works now.
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.4.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.18.1 | 06-Jun-2015 |
jdolecek | file files.octeon was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.4.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.4.2.1 | 06-Jun-2015 |
skrll | file files.octeon was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.4 | 28-Apr-2014 |
matt | Add pci attachment
|
| 1.3 | 02-Aug-2011 |
cliff | branches: 1.3.2; 1.3.12; 1.3.16; 1.3.26;
CFI NOR support for mips/ralink
|
| 1.2 | 28-Jul-2011 |
matt | Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file files.ralink was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.3.26.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.3.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.5 | 07-Oct-2024 |
andvar | s/periperal/peripheral/ in comments.
|
| 1.4 | 18-Mar-2011 |
cliff | branches: 1.4.92;
- add config for gpio
- add config for iobus, nand, flash
|
| 1.3 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file files.rmixl was initially added on branch matt-nb5-mips64.
|
| 1.1.2.20 | 05-Nov-2013 |
matt | Add XLP2XX support.
|
| 1.1.2.19 | 19-Jan-2012 |
matt | Cleanup/update attachments.
|
| 1.1.2.18 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.17 | 30-Dec-2011 |
matt | Change devices name from rmixl_* to xl*.
|
| 1.1.2.16 | 28-Dec-2011 |
matt | Add NOR support for XLP.
|
| 1.1.2.15 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.1.2.14 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.13 | 17-Apr-2010 |
cliff | - rename "pcie" bus space files to "pci" to reflect common use
by either pcie or pcix, depending on RMI chip type.
|
| 1.1.2.12 | 12-Apr-2010 |
cliff | - rmixl_pcix and rmixl_pcie get 'needs-flag'
|
| 1.1.2.11 | 07-Apr-2010 |
cliff | - configure XLR PCI-X interface
- this config can be used on XLS or XLR chip systems
|
| 1.1.2.10 | 21-Mar-2010 |
cliff | - add files rmixl_spl.S, rmixl_fmn.c
- add 'tmsk' locator to obio, allows specifying a thread (vCPU) mask
for interrupt routing; default is -1 which means route to any
|
| 1.1.2.9 | 20-Jan-2010 |
matt | cleanup attachments so that other mips cpus can use the same scheme.
|
| 1.1.2.8 | 16-Jan-2010 |
cliff | - cpucore and cpu config info moved here from to arch/evbmips/conf/files.rmixl
- obio now attaches to cpunode instead of mainbus
|
| 1.1.2.7 | 14-Dec-2009 |
cliff | - replace single bus space with two (big & little endian) bus spaces for obio
- configure RMI XLx USB Interface driver rmixl_usbi
- attach ohci at rmixl_usbi
- attach ehci at rmixl_usbi
|
| 1.1.2.6 | 15-Nov-2009 |
cliff | - we don't need -el bus space for obio, get rid of it and clean up the naming
- delete rmixl_eb_space.c, rmixl_el_space.c
- add mixl_obio_space.c, provides -eb bus space for obio devices
|
| 1.1.2.5 | 14-Nov-2009 |
cliff | - rmixls_subr.S is replaced by rmixl_subr.S
|
| 1.1.2.4 | 09-Nov-2009 |
cliff | - configure MD PCI stuff:
pci attches to rmixl_pcie attaches to obio
- configure file arch/mips/rmi/rmixls_subr.S
THIS IS TEMPORARY and should not be needed
once we have mtcp/mfcp, and a better place for the xkseg &etc addrs
|
| 1.1.2.3 | 22-Sep-2009 |
cliff | add CONSFREQ to opt_com.h options
|
| 1.1.2.2 | 15-Sep-2009 |
cliff | obio now provides both big endian and little endian bus spaces
to allow child devices to use according to access method needs
also preparing for dual bus_dma methods, one for addrs <4GB,
the other for all memory, including addrs >= 4GB
the bulk of XLS DMA work is still TBD
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file files.rmixl was added on branch yamt-nfs-mp on 2010-03-11 15:02:38 +0000
|
| 1.4.92.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.8 | 24-Jul-2017 |
mrg | mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.
also test-built some other mips kernels.
|
| 1.7 | 20-Feb-2011 |
matt | branches: 1.7.14; 1.7.32; 1.7.48;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.6 | 12-Aug-2009 |
simonb | branches: 1.6.4; 1.6.6; 1.6.8;
Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.5 | 25-Oct-2003 |
simonb | branches: 1.5.106; 1.5.124;
Rename the "strtc" device to "m41t81rtc" so that it doesn't conflict with
the MI i2c "strtc" device.
XXX: This should use the MI "strtc" device - the M41T81 should be
compatible enough with the M41ST84 currently supported by that
driver.
|
| 1.4 | 12-Nov-2002 |
simonb | branches: 1.4.6;
Add support for the ST M41T81 RTC found on pass 2 swarm boards.
XXX: Much of this should live in arch/sbmips instead of arch/mips/sibyte.
XXX: These should be replaced with MI SMBus drivers one day.
|
| 1.3 | 31-Jul-2002 |
simonb | Add support for the watchdog timers on the BCM1xxx parts.
|
| 1.2 | 04-Jun-2002 |
simonb | Add an extremely rough SMBus handler and RTC driver. This will be
cleaned up significantly when we have an MI SMBus framework, but at
least we can see the RTC on the swarm now.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.4; 1.1.8; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.10.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.1.8.5 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.1.8.4 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.1.8.3 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.1.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.8.1 | 05-Mar-2002 |
nathanw | file files.sibyte was added on branch nathanw_sa on 2002-04-01 07:40:56 +0000
|
| 1.1.4.4 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.4.3 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.1 | 05-Mar-2002 |
jdolecek | file files.sibyte was added on branch kqueue on 2002-03-16 15:58:33 +0000
|
| 1.4.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.124.4 | 10-Jun-2010 |
cliff | add bus watcher support for sibyte
|
| 1.5.124.3 | 21-Jan-2010 |
cyber | Remove sbpcihb, unused
|
| 1.5.124.2 | 21-Jan-2010 |
matt | sbldthb is dead. ppb.c will now take care of it.
sbpcihb is now brain dead. only print whether we are in host or device mode
|
| 1.5.124.1 | 21-Jan-2010 |
matt | Add rest of pci framework functions.
Disable pciide compat intr establish for sbmips
|
| 1.5.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.6.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.7.48.1 | 30-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #231):
distrib/sets/lists/base/md.evbmips 1.3
doc/CHANGES 1.2303-1.2304
etc/etc.evbmips/MAKEDEV.conf 1.8
etc/etc.evbmips/Makefile.inc 1.22
etc/mtree/Makefile 1.37
etc/mtree/NetBSD.dist.evbmips 1.1
sys/arch/evbmips/Makefile 1.9
sys/arch/evbmips/conf/SBMIPS upto 1.2
sys/arch/evbmips/conf/SBMIPS.MP upto 1.2
sys/arch/evbmips/conf/SBMIPS64 upto 1.2
sys/arch/evbmips/conf/SBMIPS64.MP upto 1.2
sys/arch/evbmips/conf/files.sbmips upto 1.2
sys/arch/evbmips/conf/std.sbmips upto 1.2
sys/arch/evbmips/include/disklabel.h 1.6
sys/arch/evbmips/include/loadfile_machdep.h
sys/arch/evbmips/include/param.h 1.10
sys/arch/evbmips/include/pci_machdep.h 1.3
sys/arch/evbmips/sbmips/TODO
sys/arch/evbmips/sbmips/autoconf.c
sys/arch/evbmips/sbmips/autoconf.h
sys/arch/evbmips/sbmips/console.c
sys/arch/evbmips/sbmips/cpu.c upto 1.3
sys/arch/evbmips/sbmips/cpuvar.h
sys/arch/evbmips/sbmips/disksubr.c
sys/arch/evbmips/sbmips/leds.h
sys/arch/evbmips/sbmips/locore_machdep.S
sys/arch/evbmips/sbmips/machdep.c upto 1.2
sys/arch/evbmips/sbmips/rtc.c upto 1.2
sys/arch/evbmips/sbmips/sb1250_icu.c upto 1.2
sys/arch/evbmips/sbmips/swarm.h
sys/arch/evbmips/sbmips/systemsw.c upto 1.2
sys/arch/evbmips/sbmips/systemsw.h
sys/arch/evbmips/sbmips/zbbus.c upto 1.2
sys/arch/evbmips/stand/Makefile 1.1
sys/arch/evbmips/stand/sbmips/Makefile
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs upto 1.2
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs 1.3
sys/arch/evbmips/stand/sbmips/Makefile.bootxx
sys/arch/evbmips/stand/sbmips/Makefile.inc upto 1.3
sys/arch/evbmips/stand/sbmips/boot/Makefile
sys/arch/evbmips/stand/sbmips/boot/filesystem.c
sys/arch/evbmips/stand/sbmips/boot/version
sys/arch/evbmips/stand/sbmips/bootxx_cd9660/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_ffs/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_lfs/Makefile
sys/arch/evbmips/stand/sbmips/common/bbinfo.h
sys/arch/evbmips/stand/sbmips/common/blkdev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/blkdev.h
sys/arch/evbmips/stand/sbmips/common/boot.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/boot.ldscript
sys/arch/evbmips/stand/sbmips/common/booted_dev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/bootxx.c
sys/arch/evbmips/stand/sbmips/common/cfe.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.h
sys/arch/evbmips/stand/sbmips/common/cfe_api_int.h
sys/arch/evbmips/stand/sbmips/common/cfe_error.h
sys/arch/evbmips/stand/sbmips/common/cfe_ioctl.h
sys/arch/evbmips/stand/sbmips/common/checksize.sh
sys/arch/evbmips/stand/sbmips/common/common.h
sys/arch/evbmips/stand/sbmips/common/panic_putstr.c
sys/arch/evbmips/stand/sbmips/common/putstr.c
sys/arch/evbmips/stand/sbmips/common/start.S
sys/arch/evbmips/stand/sbmips/netboot/Makefile
sys/arch/evbmips/stand/sbmips/netboot/conf.c
sys/arch/evbmips/stand/sbmips/netboot/dev_net.c
sys/arch/evbmips/stand/sbmips/netboot/devopen.c
sys/arch/evbmips/stand/sbmips/netboot/getsecs.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/if_cfe.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/version
sys/arch/mips/conf/files.sibyte 1.8
sys/arch/mips/include/pmap.h 1.70
sys/arch/mips/sibyte/dev/sbbuswatch.c 1.4
sys/arch/mips/sibyte/dev/sbmac.c 1.49
sys/arch/mips/sibyte/dev/sbscn.c 1.43
sys/arch/mips/sibyte/dev/sbsmbus.c 1.17
sys/arch/mips/sibyte/dev/sbtimer.c 1.21
sys/arch/mips/sibyte/dev/sbwdog.c 1.15
sys/arch/mips/sibyte/pci/sbbrz_pci.c 1.8
usr.sbin/installboot/installboot.8 1.94
Move sys/arch/sbmips/* into sys/arch/evbmips/*/sbmips.
|
| 1.7.32.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.7.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.12 | 23-Apr-2021 |
simonb | Merge the .text.* sections into the .text section on MIPS, SPARC and
SPARC64 as is done on all other ports. Mostly costmetic, but does mean
that main() now appears before the _etext symbol instead of after it.
|
| 1.11 | 25-Aug-2015 |
uebayasi | Replace a constant in ldscript.
|
| 1.10 | 24-Aug-2015 |
uebayasi | Don't mention stab and DWARF sections, because these (poorly mtaintained)
lists only help to make them harder to read.
If those sections are found in inputs, they simply appear in outputs as
orphaned sections, sorted by section types and attributes.
|
| 1.9 | 21-Aug-2015 |
uebayasi | I bet setting search-directory for ld.so is useless in any kernel.
|
| 1.8 | 20-Aug-2015 |
uebayasi | Indent with 2 spaces.
|
| 1.7 | 05-Mar-2011 |
matt | branches: 1.7.14; 1.7.32;
Add missing .debug lines from usr/libdata/ldscripts
Add missing .mdebug lines from usr/libdata/ldscripts
Fixes PR/40522
|
| 1.6 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.5 | 27-Aug-2006 |
tsutsui | branches: 1.5.78; 1.5.82; 1.5.88; 1.5.90;
Put .rodata.str1.4 and .rodata.cst4 sections by gcc4 into .rodata section.
Fixes malloc(9) failure at early boot on newsmips.
|
| 1.4 | 05-Oct-2001 |
simonb | branches: 1.4.4; 1.4.36; 1.4.50; 1.4.54;
Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
|
| 1.3 | 21-May-2000 |
soren | branches: 1.3.2; 1.3.4;
Also share BE ldscripts.
|
| 1.2 | 23-Jun-1997 |
jonathan | branches: 1.2.24;
Set kernel text start address in port-specific Makefile, not ldscript.
|
| 1.1 | 23-May-1997 |
jonathan | GNU ld script for linking mips kernels, contributed by Arne Juul.
|
| 1.2.24.1 | 20-Nov-2000 |
bouyer | Remove files that are no longer on the trunck
|
| 1.3.4.1 | 11-Oct-2001 |
fvdl | Catch up with -current. Fix some bogons in the sparc64 kbd/ms
attach code. cd18xx conversion provided by mrg.
|
| 1.3.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.4.54.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.4.50.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.4.36.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.4.2 | 05-Oct-2001 |
simonb | Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
|
| 1.4.4.1 | 05-Oct-2001 |
simonb | file kern.ldscript was added on branch nathanw_sa on 2001-10-05 05:03:28 +0000
|
| 1.5.90.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.5.88.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.82.2 | 06-Mar-2011 |
rmind | sync with head (and fix few botches with this)
|
| 1.5.82.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.5.78.2 | 03-Dec-2011 |
matt | Add __cacheline_aligned and __read_mostly from -HEAD.
|
| 1.5.78.1 | 22-Dec-2010 |
matt | Rework how fixups are processed. Inside of generating a table, we just
scan kernel text for jumps to locations between (__stub_start, __stub_end]
and if found, we actually decode the instructions in the stub to find out
where the stub would eventually jump to and then patch the original jump
to jump directly to it bypassing the stub. This is slightly slower than
the previous method but it's a simplier and new stubs get automagically
handled.
|
| 1.7.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.7.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4 | 05-Oct-2001 |
simonb | Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
|
| 1.3 | 01-Jun-2001 |
thorpej | branches: 1.3.2; 1.3.4;
Remove 4096-byte gap between .reginfo and .data, suggested by
Ian Taylor <ian@zembu.com>.
|
| 1.2 | 21-May-2000 |
soren | branches: 1.2.6; 1.2.8;
Fix RCS ID line.
|
| 1.1 | 21-May-2000 |
soren | Also share BE ldscripts.
|
| 1.2.8.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.2.6.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.2.6.1 | 21-May-2000 |
bouyer | file kern.ldscript.be was added on branch thorpej_scsipi on 2000-11-20 20:13:30 +0000
|
| 1.3.4.1 | 11-Oct-2001 |
fvdl | Catch up with -current. Fix some bogons in the sparc64 kbd/ms
attach code. cd18xx conversion provided by mrg.
|
| 1.3.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.3 | 05-Oct-2001 |
simonb | Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
|
| 1.2 | 01-Jun-2001 |
thorpej | branches: 1.2.2; 1.2.4;
Remove 4096-byte gap between .reginfo and .data, suggested by
Ian Taylor <ian@zembu.com>.
|
| 1.1 | 21-May-2000 |
soren | branches: 1.1.6; 1.1.8;
Also share BE ldscripts.
|
| 1.1.8.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.1.6.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.1.6.1 | 21-May-2000 |
bouyer | file kern.ldscript.le was added on branch thorpej_scsipi on 2000-11-20 20:13:30 +0000
|
| 1.2.4.1 | 11-Oct-2001 |
fvdl | Catch up with -current. Fix some bogons in the sparc64 kbd/ms
attach code. cd18xx conversion provided by mrg.
|
| 1.2.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.8 | 23-Apr-2021 |
simonb | Merge the .text.* sections into the .text section on MIPS, SPARC and
SPARC64 as is done on all other ports. Mostly costmetic, but does mean
that main() now appears before the _etext symbol instead of after it.
|
| 1.7 | 22-Aug-2015 |
uebayasi | .rel/.rela should not be generated in kernels.
|
| 1.6 | 20-Aug-2015 |
uebayasi | Indent with 2 spaces.
|
| 1.5 | 04-Oct-2013 |
christos | branches: 1.5.6;
discard eh sections
|
| 1.4 | 04-May-2010 |
tsutsui | branches: 1.4.8; 1.4.18; 1.4.22;
Merge .rodata.* sections (like .rodata.str1.4) into .rodata section.
Newer binutils creates such sections and old firmware might be confused.
|
| 1.3 | 05-Oct-2001 |
simonb | branches: 1.3.4; 1.3.126; 1.3.146; 1.3.148;
Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
|
| 1.2 | 21-May-2000 |
soren | branches: 1.2.2; 1.2.4;
Also share BE ldscripts.
|
| 1.1 | 05-Oct-1997 |
jonathan | branches: 1.1.2; 1.1.20;
GNU ld script for linking standalone MIPS code (e.g., bootblocks).
|
| 1.1.20.1 | 20-Nov-2000 |
bouyer | Remove files that are no longer on the trunck
|
| 1.1.2.2 | 14-Oct-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.1.2.1 | 05-Oct-1997 |
thorpej | file stand.ldscript was added on branch marc-pcmcia on 1997-10-14 10:17:20 +0000
|
| 1.2.4.1 | 11-Oct-2001 |
fvdl | Catch up with -current. Fix some bogons in the sparc64 kbd/ms
attach code. cd18xx conversion provided by mrg.
|
| 1.2.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.3.148.1 | 30-May-2010 |
rmind | sync with head
|
| 1.3.146.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.3.126.1 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.3.4.2 | 05-Oct-2001 |
simonb | Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
|
| 1.3.4.1 | 05-Oct-2001 |
simonb | file stand.ldscript was added on branch nathanw_sa on 2001-10-05 05:03:28 +0000
|
| 1.4.22.1 | 18-May-2014 |
rmind | sync with head
|
| 1.4.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.18.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.8.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.5.6.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.3 | 05-Oct-2001 |
simonb | Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
|
| 1.2 | 11-Jul-2000 |
soren | branches: 1.2.2; 1.2.4; 1.2.6;
Oops.
|
| 1.1 | 21-May-2000 |
soren | branches: 1.1.4;
Also share BE ldscripts.
|
| 1.1.4.1 | 03-Sep-2000 |
soren | Pull up rev 1.2:
> date: 2000/07/11 01:15:47; author: soren; state: Exp; lines: +2 -2
> Oops (was LE rather than BE).
|
| 1.2.6.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.2.4.1 | 11-Oct-2001 |
fvdl | Catch up with -current. Fix some bogons in the sparc64 kbd/ms
attach code. cd18xx conversion provided by mrg.
|
| 1.2.2.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.2.2.1 | 11-Jul-2000 |
bouyer | file stand.ldscript.be was added on branch thorpej_scsipi on 2000-11-20 20:13:30 +0000
|
| 1.2 | 05-Oct-2001 |
simonb | Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
|
| 1.1 | 21-May-2000 |
soren | branches: 1.1.6; 1.1.8; 1.1.10;
Also share BE ldscripts.
|
| 1.1.10.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.1.8.1 | 11-Oct-2001 |
fvdl | Catch up with -current. Fix some bogons in the sparc64 kbd/ms
attach code. cd18xx conversion provided by mrg.
|
| 1.1.6.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.1.6.1 | 21-May-2000 |
bouyer | file stand.ldscript.le was added on branch thorpej_scsipi on 2000-11-20 20:13:30 +0000
|
| 1.6 | 11-May-2021 |
simonb | Revert rev 1.5 - put the NOFPU option back. Older cnMIPS cores don't
have an FPU.
|
| 1.5 | 18-Apr-2021 |
simonb | branches: 1.5.2; 1.5.4;
Delete the NOFPU option. These CPUs do have an FPU. Allows o32
binaries to work now.
|
| 1.4 | 01-Jun-2015 |
matt | branches: 1.4.2; 1.4.18;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.3 | 25-May-2015 |
matt | Switch to MIPS64R2
|
| 1.2 | 19-May-2015 |
matt | Let the compiler/assembler know we compiling for octeon.
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.4.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.18.1 | 01-Jun-2015 |
jdolecek | file std.octeon was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.4.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.4.2.1 | 01-Jun-2015 |
skrll | file std.octeon was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5.4.1 | 31-May-2021 |
cjep | sync with head
|
| 1.5.2.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.1 | 16-Jul-2020 |
jmcneill | FDT support for Cavium OCTEON MIPS SoCs. WIP.
|
| 1.38 | 30-Nov-2024 |
christos | Create a new header lwp_private.h to contain _lwp_getprivate_fast,
_lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that:
1. we don't need special hacks to hide them
2. we can include <lwp.h> where needed to get the necessary prototypes
without redefining them locally.
|
| 1.37 | 04-Nov-2024 |
christos | Undo previous lwp.h change.
|
| 1.36 | 03-Nov-2024 |
christos | Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate
lwp.h file.
|
| 1.35 | 29-Mar-2021 |
simonb | branches: 1.35.22;
Install <mips/frame.h>, now needed for dtrace.
|
| 1.34 | 12-Jul-2018 |
maxv | branches: 1.34.12; 1.34.14;
Remove the kernel PMC code. Sent yesterday on tech-kern@.
This change:
* Removes "options PERFCTRS", the associated includes, and the associated
ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is
good.
* Removes the PMC code of ARM XSCALE.
* Removes all the pmc.h files. They were all empty, except for ARM XSCALE.
* Reorders the x86 PMC code not to rely on the legacy pmc.h file. The
definitions are put in sysarch.h.
* Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control
and sys_pmc_get_info syscalls. They are marked as OBSOL in kern,
netbsd32 and rump.
* Removes the pmc_evid_t and pmc_ctr_t types.
* Removes all the associated man pages. The sets are marked as obsolete.
|
| 1.33 | 21-Dec-2015 |
christos | branches: 1.33.16; 1.33.18;
Add mips fenv.h (From FreeBSD)
|
| 1.32 | 23-Jul-2014 |
alnsn | branches: 1.32.4;
Rename sljitarch.h to sljit_machdep.h.
|
| 1.31 | 25-Nov-2012 |
alnsn | branches: 1.31.10;
Add sljitarch.h to all mips machines.
|
| 1.30 | 17-Jul-2011 |
joerg | branches: 1.30.2; 1.30.12;
Retire varargs.h support. Move machine/stdarg.h logic into MI
sys/stdarg.h and expect compiler to provide proper builtins, defaulting
to the GCC interface. lint still has a special fallback.
Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and
derive va_list as required by standards.
|
| 1.29 | 17-Aug-2009 |
matt | Don't install aout_machpep.h and bsd-aout.h
|
| 1.28 | 09-Feb-2007 |
ad | branches: 1.28.48;
Merge newlock2 to head.
|
| 1.27 | 26-Jul-2006 |
drochner | branches: 1.27.4;
don't install <machine/db_machdep.h>, this is kernel only
|
| 1.26 | 11-Dec-2005 |
christos | branches: 1.26.4; 1.26.8;
merge ktrace-lwp.
|
| 1.25 | 08-May-2004 |
kleink | branches: 1.25.12;
Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
|
| 1.24 | 17-Jan-2003 |
thorpej | branches: 1.24.2;
Merge the nathanw_sa branch.
|
| 1.23 | 26-Nov-2002 |
lukem | Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.
|
| 1.22 | 07-Aug-2002 |
briggs | Implement pmc(9) -- An interface to hardware performance monitoring
counters. These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.
pmc(9) is meant to be a general interface. Initially, the Intel XScale
counters are the only ones supported.
|
| 1.21 | 28-Nov-2001 |
manu | branches: 1.21.8;
Back out the copy of theses files to userland
|
| 1.20 | 28-Nov-2001 |
manu | We need to copy new SVR4 header files to /usr/include/sys...
|
| 1.19 | 15-Apr-2001 |
kleink | branches: 1.19.2; 1.19.8;
Add definitions of C99 integer format conversion macros.
XXX Fastest minimum-width integer types haven't been decided upon yet.
|
| 1.18 | 15-Apr-2001 |
kleink | Add definitions of C99 specified-width integer type limits.
XXX Fastest minimum-width integer types haven't been decided upon yet.
|
| 1.17 | 14-Apr-2001 |
kleink | Add definitions of C99 integer constant macros.
Tidy Makefiles up a little.
|
| 1.16 | 14-Apr-2001 |
kleink | Add definitions of C99 minimum-width and greatest-width integer types.
XXX Fastest minimum-width integer types haven't been decided upon yet.
|
| 1.15 | 26-Jun-2000 |
kleink | branches: 1.15.2;
Add <machine/int_types.h>, which provides namespace-pure definitions
of exact-width integer types.
|
| 1.14 | 29-Apr-2000 |
thorpej | Require that each each MACHINE/MACHINE_ARCH supply a lock.h. This file
contains the values __SIMPLELOCK_LOCKED and __SIMPLELOCK_UNLOCKED, which
replace the old SIMPLELOCK_LOCKED and SIMPLELOCK_UNLOCKED. These files
are also required to supply inline functions __cpu_simple_lock(),
__cpu_simple_lock_try(), and __cpu_simple_unlock() if locking is to be
supported on that platform (i.e. if MULTIPROCESSOR is defined in the
_KERNEL case). Change these functions to take an int * (&alp->lock_data)
rather than the struct simplelock * itself.
These changes make it possible for userland to use the locking primitives
by including <machine/lock.h>.
|
| 1.13 | 17-Mar-2000 |
tron | Install "machineendian_machdep.h".
|
| 1.12 | 23-Dec-1999 |
kleink | C99: Define a NAN macro in <math.h> which evaulates to a constant expression of
a single-precision quiet NaN; only to be defined on platforms that do support
this value.
|
| 1.11 | 09-Nov-1999 |
kleink | Per discussion on tech-toolchain, remove MIPS-specific <machine/elf.h> header;
all the information is available from <sys/exec_elf.h>.
|
| 1.10 | 30-Aug-1999 |
mrg | branches: 1.10.2; 1.10.4; 1.10.8;
install ieee.h
|
| 1.9 | 30-Mar-1999 |
simonb | Don't install intr.h - there's only a kernel function prototype in
this file.
|
| 1.8 | 24-Mar-1999 |
nisimura | - Restore 'regdef.h' lost since last January.
|
| 1.7 | 15-Mar-1999 |
nisimura | - Eliminate 'conf.h' from MIPS common code.
|
| 1.6 | 13-Mar-1999 |
drochner | g/c regdef.h (went into asm.h)
|
| 1.5 | 18-Jan-1999 |
castor | Forgot to also ship out regnum.h
|
| 1.4 | 18-Jan-1999 |
castor | Remove vestiges of cpuarch.h. Revert to using cpuregs.h instead.
|
| 1.3 | 15-Jan-1999 |
bouyer | Move the bswap functions from libutil to libc (this bups the
minor of libc and the major of libutil). For little-endian architectures
merge the bnswap() assembly versions with nto* and hton* using symbols
aliasing. Use symbol renaming for the bswap function in this case to avoid
namespace pollution.
Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian
machines, common code for inline macros go in machine/byte_swap.h
Sync libkern with libc.
Adjust #include in kernel sources for machine/bswap.h.
|
| 1.2 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.1 | 12-Jun-1998 |
cgd | Rework the way kernel include files are installed. In the new method,
as with user-land programs, include files are installed by each directory
in the tree that has includes to install. (This allows more flexibility
as to what gets installed, makes 'partial installs' easier, and gives us
more options as to which machines' includes get installed at any given
time.) The old SYS_INCLUDES={symlinks,copies} behaviours are _both_
still supported, though at least one bug in the 'symlinks' case is
fixed by this change. Include files can't be build before installation,
so directories that have includes as targets (e.g. dev/pci) have to move
those targets into a different Makefile.
|
| 1.10.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.10.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.10.2.2 | 21-Apr-2001 |
bouyer | Sync with HEAD
|
| 1.10.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.15.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.19.8.5 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.19.8.4 | 13-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.19.8.3 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.19.8.2 | 17-Nov-2001 |
wdk | mcontext support for MIPS based ports.
|
| 1.19.8.1 | 15-Apr-2001 |
wdk | file Makefile was added on branch nathanw_sa on 2001-11-17 23:12:03 +0000
|
| 1.19.2.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.19.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.21.8.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.24.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.24.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.24.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.25.12.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.25.12.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.26.8.1 | 11-Aug-2006 |
yamt | sync with head
|
| 1.26.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.27.4.1 | 01-Feb-2007 |
ad | Header file cleanup.
|
| 1.28.48.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.30.12.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.30.12.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.30.12.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.30.2.1 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.31.10.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.32.4.1 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.33.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.33.16.1 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.34.14.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.34.12.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.35.22.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.11 | 23-Mar-2021 |
simonb | Remove addition of -msym32 to CFLAGS. Hinders rather than helps build
MIPS modules.
|
| 1.10 | 09-Jun-2016 |
martin | branches: 1.10.30; 1.10.32;
Sync register number for curlwp with the kernel
|
| 1.9 | 21-Jan-2011 |
joerg | branches: 1.9.14; 1.9.32;
Switch remaining platforms to modern CPP for assembler.
|
| 1.8 | 29-Nov-2009 |
pooka | branches: 1.8.4; 1.8.6; 1.8.8;
Don't build rump kernel with -mno-abicalls, because it's effectively
"no pic".
(should be used only for shared lib rump kernel, but this is just
bandaid for now)
|
| 1.7 | 21-Dec-2008 |
ad | Update flags to match reality.
|
| 1.6 | 02-Jun-2006 |
mrg | branches: 1.6.60; 1.6.64; 1.6.72;
remove GCC2 support.
|
| 1.5 | 07-Apr-2006 |
mrg | branches: 1.5.2;
retire HAVE_GCC3/HAVE_GCC4 and introduce HAVE_GCC that is set to 2, 3 or 4.
|
| 1.4 | 11-Dec-2005 |
christos | branches: 1.4.4; 1.4.6; 1.4.8; 1.4.10; 1.4.12;
merge ktrace-lwp.
|
| 1.3 | 27-Aug-2003 |
mrg | branches: 1.3.16;
introduce an additional switch to enable building GCC3 instead of GCC2:
HAVE_GCC3. if this is set, we also set USE_TOOLS_TOOLCHAIN=no. change
the definition of the former to be restricted to whether tools/toolchain
is used or not.
|
| 1.2 | 26-Jul-2003 |
mrg | don't need -mno-half-pic with gcc3
|
| 1.1 | 05-Oct-2001 |
simonb | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.24;
This Makefile.inc is used for building LKMS - add the standard MIPS
kernel compile flags as well as "-mlong-calls" so that calls from the
LKM in KSEG2 work to the kernel in KSEG0.
MIPS LKMs now build and can be loaded with the right Magick command line
args to modload(8). Changes to modload coming...
Thanks to Chris Demetriou for pointing out the -mlong-calls gcc option
that had been staring me in the face all along.
|
| 1.1.24.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.24.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.24.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.8.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.1.8.1 | 05-Oct-2001 |
thorpej | file Makefile.inc was added on branch kqueue on 2002-01-10 19:45:59 +0000
|
| 1.1.6.2 | 05-Oct-2001 |
simonb | This Makefile.inc is used for building LKMS - add the standard MIPS
kernel compile flags as well as "-mlong-calls" so that calls from the
LKM in KSEG2 work to the kernel in KSEG0.
MIPS LKMs now build and can be loaded with the right Magick command line
args to modload(8). Changes to modload coming...
Thanks to Chris Demetriou for pointing out the -mlong-calls gcc option
that had been staring me in the face all along.
|
| 1.1.6.1 | 05-Oct-2001 |
simonb | file Makefile.inc was added on branch nathanw_sa on 2001-10-05 15:36:47 +0000
|
| 1.1.2.2 | 11-Oct-2001 |
fvdl | Catch up with -current. Fix some bogons in the sparc64 kbd/ms
attach code. cd18xx conversion provided by mrg.
|
| 1.1.2.1 | 05-Oct-2001 |
fvdl | file Makefile.inc was added on branch thorpej-devvp on 2001-10-11 00:01:47 +0000
|
| 1.3.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.12.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.4.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.4.8.2 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.4.8.1 | 11-Apr-2006 |
yamt | sync with head
|
| 1.4.6.2 | 03-Jun-2006 |
kardel | Sync with head.
|
| 1.4.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.4.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.5.2.1 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.6.72.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.6.64.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.6.64.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.6.60.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.8.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.8.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.8.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.9.32.1 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.9.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.32.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.10.30.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.30 | 07-May-2019 |
kamil | Switch all users (except ia64) of custom machine/ansi.h to common_ansi.h
Deduplicate the code among ports and poll definitions of types
directly from a compiler.
This fixes miscompilation of certain programs that instruct compilers
to generate code for different types. This bug has been detected with
-fshort-wchar in EFI firmware.
Proposed and discussed on a mailing list (twice).
Itanium uses custom !ELF fallback switch, temporarily leave it as it is.
|
| 1.29 | 17-Jun-2015 |
matt | branches: 1.29.18;
Make _BSD_CLOCK_T_ unsigned int so it's the same for IPL32 and LP64
environments. We don't really have a powerpc64 native userland
and the mips64 native userland is IPL32 so this shouldn't affect anything.
|
| 1.28 | 17-Jul-2011 |
joerg | branches: 1.28.12; 1.28.28; 1.28.30;
Retire varargs.h support. Move machine/stdarg.h logic into MI
sys/stdarg.h and expect compiler to provide proper builtins, defaulting
to the GCC interface. lint still has a special fallback.
Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and
derive va_list as required by standards.
|
| 1.27 | 27-Mar-2010 |
tnozaki | 1. {wctype,wctrans,mbstate}_t: switch MD to MI like other
libc implementation (such as *BSD and glibc2).
2. don't typedef void * wc{type,trans}_t, suggested by soda@-san.
it may pass through compiler type check, it's harmful.
so i introduce dummy struct __tag_wc{type,trans}_t(iconv_t already does).
no ABI change was made.
|
| 1.26 | 14-Dec-2009 |
matt | branches: 1.26.2; 1.26.4;
Fix merge botch (we use 64bit times now).
|
| 1.25 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.24 | 11-Jan-2009 |
christos | merge christos-time_t
|
| 1.23 | 17-Oct-2007 |
garbled | branches: 1.23.16; 1.23.18; 1.23.22; 1.23.30; 1.23.38;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.22 | 03-Sep-2007 |
drochner | clean up some definitions around rune_t which are not needed anymore
|
| 1.21 | 04-Oct-2006 |
tnozaki | branches: 1.21.8; 1.21.16; 1.21.22; 1.21.26; 1.21.28;
fix gcc -Werror -Wmissing-braces problem
mbstate_t(this is opaque object)'s initializer should be ``{ 0 }'',
so changed 1st field of union from character array to integer.
|
| 1.20 | 11-Dec-2005 |
christos | branches: 1.20.20; 1.20.22;
merge ktrace-lwp.
|
| 1.19 | 25-Oct-2003 |
mycroft | branches: 1.19.16;
Update for GCC3 (basically, use the __builtin_va_* implementation).
|
| 1.18 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.17 | 30-May-2003 |
simonb | branches: 1.17.2;
#define<tab>
|
| 1.16 | 02-Mar-2003 |
tshiozak | add some ISO C 1995 I18N functions and types:
btowc, wctrans, towctrans, wcscoll, wcsxfrm, wctype_t and wctrans_t.
|
| 1.15 | 03-Nov-2002 |
thorpej | Add _LP64 types.
|
| 1.14 | 03-Jan-2001 |
takemura | branches: 1.14.8;
replace 'long long' with int64_t to compile stand alone program with
compiler other than GCC.
|
| 1.13 | 26-Dec-2000 |
itojun | make mbstate_t bigger (32 -> 128 bytes).
XXX if you have libc after citrus locale import, please recompile libc,
and your applications that use mbstate_t (rather rare). really sorry
for the mess.
|
| 1.12 | 21-Dec-2000 |
itojun | populate _BSD_MBSTATE_T_. add warning regarding to rune_t.
|
| 1.11 | 27-Jun-2000 |
kleink | G/c _BSD_INTPTR_T_ and _BSD_UINTPTR_T_.
|
| 1.10 | 24-Apr-1999 |
simonb | branches: 1.10.2; 1.10.10;
Nuke register and remove trailling white space.
|
| 1.9 | 27-Apr-1998 |
kleink | branches: 1.9.12;
Provide definitions for intptr_t and uintptr_t, signed resp. unsigned integral
types large enough to hold any pointer.
|
| 1.8 | 23-Nov-1997 |
kleink | Add _BSD_SUSECONDS_T_ and _BSD_USECONDS_T_; do some space vs. tab formatting
cleanup
|
| 1.7 | 15-Nov-1996 |
jtc | Define _BSD_CLOCKID_T_ and _BSD_TIMER_T_
|
| 1.6 | 16-Mar-1996 |
jtc | Add _BSD_WINT_T_ definition so we can handle wint_t type added in NA1.
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 15-Oct-1993 |
deraadt | update from rick, tarfile of Oct 11 10:46
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.9.12.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.10.10.1 | 28-May-2000 |
minoura | Citrus Project XPG4DL, an implementation of I18N (locale) framework,
is imported.
|
| 1.10.2.2 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.10.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.14.8.1 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.17.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.17.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.17.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.19.16.2 | 27-Oct-2007 |
yamt | sync with head.
|
| 1.19.16.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.20.22.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.20.20.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.21.28.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.21.26.1 | 02-Oct-2007 |
joerg | Sync with HEAD.
|
| 1.21.22.1 | 10-Sep-2007 |
skrll | Sync with HEAD.
|
| 1.21.16.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.21.8.1 | 09-Oct-2007 |
ad | Sync with head.
|
| 1.23.38.1 | 11-Dec-2009 |
matt | Unless we are in O32, use long int for size_t/ptrdiff_t/intptr_t. This
allows N32 and N64 use both use the same type.
|
| 1.23.30.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.23.22.3 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.23.22.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.23.22.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.23.18.3 | 04-Jan-2009 |
christos | handle LP64
|
| 1.23.18.2 | 30-Mar-2008 |
christos | time_t is now __int64_t
|
| 1.23.18.1 | 29-Mar-2008 |
christos | Welcome to the time_t=long long dev_t=uint64_t branch.
|
| 1.23.16.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.26.4.1 | 30-May-2010 |
rmind | sync with head
|
| 1.26.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.28.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.28.28.1 | 16-Jul-2015 |
riz | Pull up following revision(s) (requested by martin in ticket #846):
sys/arch/mips/include/ansi.h: revision 1.29
sys/arch/sh3/include/ansi.h: revision 1.16
sys/arch/sparc64/include/ansi.h: revision 1.18
sys/arch/m68k/include/ansi.h: revision 1.24
sys/arch/powerpc/include/ansi.h: revision 1.30
sys/arch/hppa/include/ansi.h: revision 1.14
sys/arch/i386/include/ansi.h: revision 1.27
sys/arch/alpha/include/ansi.h: revision 1.25
sys/arch/usermode/include/ansi.h: revision 1.5
sys/arch/sparc/include/ansi.h: revision 1.24
Make _BSD_CLOCK_T_ unsigned int so it's the same for IPL32 and LP64
environments. We don't really have a powerpc64 native userland
and the mips64 native userland is IPL32 so this shouldn't affect anything.
Make clock_t unsigned
Make clock_t unsigned int everywhere.
Ok: matt@, mrg@
|
| 1.28.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.29.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.9 | 12-Aug-2009 |
matt | Nuke a.out support for MIPS.
|
| 1.8 | 11-Dec-2005 |
christos | branches: 1.8.78; 1.8.92;
merge ktrace-lwp.
|
| 1.7 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.6 | 10-Dec-2002 |
thorpej | branches: 1.6.6;
Rename __LDPGSZ to AOUT_LDPGSZ, to accurately reflect what it is.
|
| 1.5 | 26-Oct-1994 |
cgd | branches: 1.5.48;
new RCS ID format.
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 14-Jan-1994 |
deraadt | some pmax updating (Terry Friedrichsen is helping on this now).
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.5.48.1 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.6.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.6.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.6.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.8.92.1 | 24-Oct-2010 |
jym | Sync with HEAD
|
| 1.8.78.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.77 | 06-Jan-2025 |
martin | PR 58960: fix misunderstanding in semantic and provide both the original
id string as well as _NETBSD_REVISIONID.
Do not rely on string concatenation in the inline assembler, use .ascii
and .asciz for individual string parts instead.
|
| 1.76 | 04-Jan-2025 |
martin | PR 58960: mips/asm.h: Respect NETBSD_REVISIONID.
|
| 1.75 | 14-Sep-2023 |
rin | branches: 1.75.6;
mips: Add initial support to gprof(1) for n64 userland
Use gp relative call for _mcount().
Stop using macro name MCOUNT as well for clarity. It has nothing to
do with one provided by <machine/profile.h>.
Now, gprof(1) works just fine for C programs. On the other hand, some
C++ profiling tests of ATF fail as partially observed for n32.
More C++ profile tests become broken for GCC12 in comparison to GCC10.
Something needs to be adjusted for us, or GCC, or both.
|
| 1.74 | 23-Feb-2023 |
riastradh | mips: Add missing barriers in cpu_switchto.
Details in comments.
PR kern/57240
XXX pullup-8
XXX pullup-9
XXX pullup-10
|
| 1.73 | 20-Feb-2023 |
riastradh | mips/asm.h: Make membar macros conditional on MULTIPROCESSOR.
For !MULTIPROCESSOR, define them to be empty or nop as appropriate.
|
| 1.72 | 13-Feb-2023 |
riastradh | mips/asm.h: Cite source for Cavium sync plunger business.
|
| 1.71 | 21-Apr-2022 |
riastradh | branches: 1.71.4;
mips/cavium: Take advantage of Octeon's guaranteed r/rw ordering.
|
| 1.70 | 09-Apr-2022 |
riastradh | mips/rmi: Hack to get XLSATX64.MP kernel building again.
Using <mips/asm.h> in a .c file is kinda grody but CALLFRAME_SIZ
doesn't seem to be defined anywhere else. Not sure how this was ever
supposed to work...
|
| 1.69 | 27-Feb-2022 |
riastradh | mips: Redefine LLSCSYNC as empty on non-Octeon MP.
This change deletes memory barriers on non-Octeon MP. However, all
the appropriate acquire and release barriers are already used in
mutex stubs, and no barriers are needed in atomic_* unless we set
__HAVE_ATOMIC_AS_MEMBAR which we don't on MIPS. So this should be
safe.
Unclear whether we need this even on Octeon -- don't have a clear
reference on why it's here.
|
| 1.68 | 27-Feb-2022 |
riastradh | mips: Redefine BDSYNC as sync on Octeon, not syncw.
BDSYNC is used for membar_sync, which is supposed to be a full
sequential consistency barrier, which is not provided by syncw, so
this is necessary for correctness.
BDSYNC is not used for anything else, so this can't hurt performance,
except where it was necessary for correctness anyway or where the
semantic choice of membar_sync was too strong anyway.
|
| 1.67 | 27-Feb-2022 |
riastradh | mips: Omit needless SYNC in mutex_exit.
This change deletes a memory barrier. However, it should be safe:
The semantic requirement for this is already provided by the SYNC_REL
above, before the ll. And as currently defined, SYNC_REL is at least
as strong as SYNC, so this change can't hurt correctness on its own
(barring CPU errata, which would apply to other users of SYNC_REL and
can be addressed in the definition of SYNC_REL).
Later, perhaps we can relax SYNC_REL to syncw on Octeon if we prove
that it is correct (e.g., if Octeon follows the SPARCv9 partial store
order semantics).
Nix now-unused SYNC macro in asm.h.
|
| 1.66 | 27-Feb-2022 |
riastradh | mips: Membar audit.
This change should be safe because it doesn't remove or weaken any
memory barriers, but does add, clarify, or strengthen barriers.
Goals:
- Make sure mutex_enter/exit and mutex_spin_enter/exit have
acquire/release semantics.
- New macros make maintenance easier and purpose clearer:
. SYNC_ACQ is for load-before-load/store barrier, and BDSYNC_ACQ
for a branch delay slot -- currently defined as plain sync for MP
and nothing, or nop, for UP; thus it is no weaker than SYNC and
BDSYNC as currently defined, which is syncw on Octeon, plain sync
on non-Octeon MP, and nothing/nop on UP.
It is not clear to me whether load-then-syncw or ll/sc-then-syncw
or even bare load provides load-acquire semantics on Octeon -- if
no, this will fix bugs; if yes (like it is on SPARC PSO), we can
relax SYNC_ACQ to be syncw or nothing later.
. SYNC_REL is for load/store-before-store barrier -- currently
defined as plain sync for MP and nothing for UP.
It is not clear to me whether syncw-then-store is enough for
store-release on Octeon -- if no, we can leave this as is; if
yes, we can relax SYNC_REL to be syncw on Octeon.
. SYNC_PLUNGER is there to flush clogged Cavium store buffers, and
BDSYNC_PLUNGER for a branch delay slot -- syncw on Octeon,
nothing or nop on non-Octeon.
=> This is not necessary (or, as far as I'm aware, sufficient)
for acquire semantics -- it serves only to flush store buffers
where stores might otherwise linger for hundreds of thousands
of cycles, which would, e.g., cause spin locks to be held for
unreasonably long durations.
Newerish revisions of the MIPS ISA also have finer-grained sync
variants that could be plopped in here.
Mechanism:
Insert these barriers in the right places, replacing only those where
the definition is currently equivalent, so this change is safe.
- Replace #ifdef _MIPS_ARCH_OCTEONP / syncw / #endif at the end of
atomic_cas_* by SYNC_PLUNGER, which is `sync 4' (a.k.a. syncw) if
__OCTEON__ and empty otherwise.
=> From what I can tell, __OCTEON__ is defined in at least as many
contexts as _MIPS_ARCH_OCTEONP -- i.e., there are some Octeons
with no _MIPS_ARCH_OCTEONP, but I don't know if any of them are
relevant to us or ever saw the light of day outside Cavium; we
seem to buid with `-march=octeonp' so this is unlikely to make a
difference. If it turns out that we do care, well, now there's
a central place to make the distinction for sync instructions.
- Replace post-ll/sc SYNC by SYNC_ACQ in _atomic_cas_*, which are
internal kernel versions used in sys/arch/mips/include/lock.h where
it assumes they have load-acquire semantics. Should move this to
lock.h later, since we _don't_ define __HAVE_ATOMIC_AS_MEMBAR on
MIPS and so the extra barrier might be costly.
- Insert SYNC_REL before ll/sc, and replace post-ll/sc SYNC by
SYNC_ACQ, in _ucas_*, which is used without any barriers in futex
code and doesn't mention barriers in the man page so I have to
assume it is required to be a release/acquire barrier.
- Change BDSYNC to BDSYNC_ACQ in mutex_enter and mutex_spin_enter.
This is necessary to provide load-acquire semantics -- unclear if
it was provided already by syncw on Octeon, but it seems more
likely that either (a) no sync or syncw is needed at all, or (b)
syncw is not enough and sync is needed, since syncw is only a
store-before-store ordering barrier.
- Insert SYNC_REL before ll/sc in mutex_exit and mutex_spin_exit.
This is currently redundant with the SYNC already there, but
SYNC_REL more clearly identifies the necessary semantics in case we
want to define it differently on different systems, and having a
sync in the middle of an ll/sc is a bit weird and possibly not a
good idea, so I intend to (carefully) remove the redundant SYNC in
a later change.
- Change BDSYNC to BDSYNC_PLUNGER at the end of mutex_exit. This has
no semantic change right now -- it's syncw on Octeon, sync on
non-Octeon MP, nop on UP -- but we can relax it later to nop on
non-Cavium MP.
- Leave LLSCSYNC in for now -- it is apparently there for a Cavium
erratum, but I'm not sure what the erratum is, exactly, and I have
no reference for it. I suspect these can be safely removed, but we
might have to double up some other syncw instructions -- Linux uses
it only in store-release sequences, not at the head of every ll/sc.
|
| 1.65 | 18-Feb-2021 |
simonb | Add an abicalls version of asm mcount prologue. XXX not tested because
profiled programs fail to link, but fixes build. Thanks dholland@ for
help analysing this.
While here, rename _KERN_MCOUNT to _MIPS_ASM_MCOUNT - it's not kernel
specific.
|
| 1.64 | 16-Feb-2021 |
simonb | Working kernel profiling for n32/n64:
- Different MCOUNT and _KERN_MCOUNT macros for n32/n64.
- Don't profile mipsXX_lwp_trampoline().
- Allow a few new instructions in the stub fixups.
|
| 1.63 | 04-Feb-2021 |
skrll | Use t9 instead of $25 in the SETUP_GP64 macro to hopefully make things
a bit clearer. Same libc binary after.
|
| 1.62 | 26-Sep-2020 |
simonb | branches: 1.62.2;
Add EXPORT_OBJECT - export definition of symbol of symbol type Object,
visible to ksyms(4) address search.
|
| 1.61 | 12-Aug-2020 |
skrll | Provide assmebler versions of BITS(3) macros. These are only good for
32 bit masks
|
| 1.60 | 10-Aug-2020 |
skrll | More SYNC centralisation
|
| 1.59 | 09-Aug-2020 |
skrll | Use compiler defines to determine which LLSCSYNC, et al
to provide.
This should fix mips builds.
|
| 1.58 | 06-Aug-2020 |
skrll | Centralise SYNC/BDSYNC in asm.h and introduce a new LLCSCSYNC and use it
before any ll/sc sequences.
Define LLSCSYNC as syncw; syncw for cnMIPS - issue two as early cnMIPS
has errat{um,a} that means the first can fail.
|
| 1.57 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.56 | 17-Apr-2020 |
joerg | Mark the .ident section as mergable string section to avoid redundant
entries.
|
| 1.55 | 04-Sep-2018 |
mrg | branches: 1.55.4; 1.55.10;
mark STATIC_NESTED_NOPROFILE() functions as functions.
|
| 1.54 | 25-Feb-2017 |
joerg | branches: 1.54.6; 1.54.12; 1.54.14;
Switch from __ABICALLS__ to __mips_abicalls like upstream GCC does in
the generic MIPS target logic.
|
| 1.53 | 11-Nov-2016 |
maya | branches: 1.53.2;
switch mfc0_hazard to be superscalar nop, some mips3 are superscalar
and need this to do the right thing
|
| 1.52 | 09-Nov-2016 |
maya | Move MFC0_HAZARD definition to asm.h instead of defining it twice
|
| 1.51 | 13-Aug-2016 |
skrll | Move the NOP_L macro into asm.h
|
| 1.50 | 13-Aug-2016 |
skrll | Trailing whitespace
|
| 1.49 | 11-Jul-2016 |
matt | branches: 1.49.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.48 | 17-Sep-2014 |
joerg | branches: 1.48.2;
Normal spelling is .asciz, so use that on MIPS too.
|
| 1.47 | 30-May-2014 |
joerg | Drop undocumented and redundant 0 argument to .ent.
|
| 1.46 | 10-Nov-2011 |
joerg | branches: 1.46.10; 1.46.24;
Don't redefine _C_LABEL.
|
| 1.45 | 01-Jul-2011 |
matt | branches: 1.45.2;
xxx_SUB macros should use a variant of subu, not add
|
| 1.44 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.43 | 20-Dec-2010 |
joerg | branches: 1.43.2; 1.43.4;
Consistently use .gnu.warning with .pushsectio and .popsection on all
architectures instead of obsolete STABS frames for linker warnings.
|
| 1.42 | 07-Jul-2010 |
chs | implement ucas_* for mips.
|
| 1.41 | 14-Dec-2009 |
matt | branches: 1.41.2; 1.41.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.40 | 17-Oct-2007 |
garbled | branches: 1.40.20; 1.40.38;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.39 | 17-May-2007 |
yamt | branches: 1.39.2; 1.39.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.38 | 09-Feb-2007 |
ad | branches: 1.38.2; 1.38.6; 1.38.8; 1.38.14;
Merge newlock2 to head.
|
| 1.37 | 20-Jan-2006 |
christos | branches: 1.37.18;
Add a STRONG_ALIAS macro
|
| 1.36 | 11-Dec-2005 |
christos | branches: 1.36.2;
merge ktrace-lwp.
|
| 1.35 | 07-Aug-2003 |
agc | branches: 1.35.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.34 | 27-Jun-2003 |
simonb | branches: 1.34.2;
Add STATIC_LEAF and STATIC_XLEAF macros, ala the alpha port.
|
| 1.33 | 05-Jun-2002 |
simonb | Remove an ELF-related comment that isn't needed any more.
|
| 1.32 | 13-May-2002 |
simonb | branches: 1.32.2;
Oops, remove an #endif leftover from the previous change.
|
| 1.31 | 13-May-2002 |
simonb | All MIPS ports have been ELF for a long time (most since they were
created); remove non-ELF assembly support.
|
| 1.30 | 05-Mar-2002 |
simonb | Include <machine/cdefs.h> to select 32/64bit APIs.
|
| 1.29 | 14-Dec-2000 |
jeffs | branches: 1.29.4; 1.29.8;
For MIPS software masking option, when returning to user mode apply
the mask to all interrupts to catch changes in the mask state faster.
Does not affect platforms w/o this option enabled.
|
| 1.28 | 30-Aug-2000 |
jeffs | Correct _KERN_MCOUNT restoration of $t9.
From Ethan Solomita (ethan@geocast.com).
|
| 1.27 | 09-Aug-2000 |
jeffs | Fix a bug in how .S routines call _mcount to allocate stack before
use. By Ethan Solomita (ethan@geocast.com).
|
| 1.26 | 27-Jul-2000 |
cgd | add nops after jals in PANIC and PRINTF. (these macros are often used in
code which has noreorder set, and they're not used with nops afterwards,
as is appropriate in that case, so put the nops in the macros.)
|
| 1.25 | 25-Jul-2000 |
jeffs | Add option to apply additional mask to the SR at run-time for MIPS3 platforms.
By default this is off, and only slightly changes the code to load SR when
a temp register is available. This can be used by the platform code to
handle slow to clear interrupts (our case) or to mask off any interrupt
any interrupt at run-time. This can be very useful for embedded platforms
that have less than desirable interrupt properties.
|
| 1.24 | 23-Jun-2000 |
kleink | Add a WEAK_ALIAS() macro.
|
| 1.23 | 12-Jun-2000 |
castor | branches: 1.23.2;
Profiling fixes from Ethan Solomita <ethan@geocast.com>.
Merge Kernel MCOUNT and user MCOUNT.
The earlier code which was inserted to call _mcount in profiling
assembler routines is busted badly. This gets it working with PIC
code and should work with any arbitrary assembler routine.
|
| 1.22 | 24-Apr-1999 |
simonb | branches: 1.22.2; 1.22.10;
Nuke register and remove trailling white space.
|
| 1.21 | 01-Apr-1999 |
soda | branches: 1.21.4;
do not include <machine/regdef.h>, but include <mips/regdef.h>,
requested by Matthias Drochner and Toru Nishimura.
|
| 1.20 | 30-Mar-1999 |
soda | - add _C_LABEL() to IMPORT(), to make this consistent with EXPORT().
- fix some oversight of previous my changes on defined(USE_AENT) or
!defined(__NO_LEADING_UNDERSCORES__) case.
|
| 1.19 | 30-Mar-1999 |
soda | - regdef.h is back, so use it.
- ALIAS() is not needed, use XLEAF() or XNESTED() instead
- use AENT() instead of .aent
- _END_LABEL() is not needed (and was wrong)
- define ALEAF(), NLEAF(), NON_LEAF(), NNON_LEAF() by
XLEAF(), LEAF_NONPROFILE(), NESTED(), NESTED_NONPROFILE()
|
| 1.18 | 24-Feb-1999 |
drochner | sync to [nisimura-pmax-wscons] version
(only change: include register definitions from regdef.h)
|
| 1.17 | 16-Feb-1999 |
jonathan | Add VECTOR() and VECTOR_END() macros for declaring exception-vector
code. Fold in <xxx>End names used to copy exception code to vector
locations. Use in mips3 locore code.
|
| 1.16 | 31-Jan-1999 |
castor | Remove genpubassym.cf stuff. The macro _MIPS_BSD_API allows selection of a
64-bit clean compilation model.
|
| 1.15 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.14 | 02-Dec-1998 |
thorpej | Implement WARN_REFERENCES().
|
| 1.13 | 20-Jul-1997 |
jonathan | branches: 1.13.10;
Don't emit ".set reorder ; .set noreorder" around mcount profiling
stubs if _LOCORE or _KERNEL are defined,. _LOCORE means we're
compiling locore. Locore assumes ".set noreorder" for the whole file.
|
| 1.12 | 23-Jun-1997 |
jonathan | Align to 8-byte boundary after ASMSTR(), for mips3.
|
| 1.11 | 30-Nov-1996 |
jtc | PROF -> GPROF
|
| 1.10 | 13-Oct-1996 |
christos | backout previous kprintf change
|
| 1.9 | 11-Oct-1996 |
christos | printf -> kprintf
|
| 1.8 | 25-Mar-1996 |
jonathan | Rename from pmax/include/machAsmDefs.h to mips/include/asm.h.
Update the include-idempotency preprocessor token to match.
References to machAsmDefs in vendor (sprite, 4.4bsd) headers left unchanged,
for historical accuracy.
|
| 1.7 | 18-Jan-1995 |
mellon | Support for alternate compilers and file formats
|
| 1.6 | 15-Dec-1994 |
mycroft | Make a new macro _C_LABEL(), which prepends an underscore to the argument unless
NO_UNDERSCORES is defined. Use it in the *LEAF() and END() macros.
|
| 1.5 | 14-Nov-1994 |
dean | Prepended underscores
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.13.10.3 | 06-Dec-1998 |
drochner | pull up 1.14 - WARN_REFERENCES()
|
| 1.13.10.2 | 30-Oct-1998 |
nisimura | - Make pm.c monochrome-aware and compilable with UVM.
- Make trap.c compilable with UVM.
- Place #ifdef _KERNEL guard in cpu.h
- Make asm.h more MIPS standard-alike while retaining current definitions.
|
| 1.13.10.1 | 15-Oct-1998 |
nisimura | - cpuregs.h was modifed a bit, then renamed with cpuarch.h.
- mips_cpu.h has gone.
- CPU's register mnemonics in regdef.h is now a part of asm.h.
|
| 1.21.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.22.10.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.22.2.2 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.22.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.23.2.2 | 07-Jun-2001 |
he | Pull up revision 1.25 (requested by hubertf, reviewed by thorpej):
Implement power saving for RM5200 and RM7000 CPUs, as used in
e.g. Cobalt RaQ2.
|
| 1.23.2.1 | 25-Jul-2000 |
kleink | Pull up rev. 1.24 (approved by thorpej):
For ELF, add a WEAK_ALIAS() macro.
|
| 1.29.8.2 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.29.8.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.29.4.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.29.4.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.32.2.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.34.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.34.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.34.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.35.16.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.35.16.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.35.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.36.2.1 | 01-Feb-2006 |
yamt | sync with head.
|
| 1.37.18.1 | 27-Jan-2007 |
ad | Make mips systems work.
|
| 1.38.14.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.38.8.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.38.6.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.38.2.1 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.39.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.39.2.1 | 18-Jul-2007 |
matt | Add PTR_L/PTR_S/ADDR_L/REGADD utility macros to make code portable between
o32/n32/n64.
|
| 1.40.38.14 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.40.38.13 | 24-Dec-2010 |
matt | MIPS_LOCK_RAS_SIZE needs to be 256 since each RAS need 64 bytes and we can
have 4 of them.
|
| 1.40.38.12 | 15-Feb-2010 |
matt | Fix a comment.
|
| 1.40.38.11 | 16-Jan-2010 |
matt | Rework the exception code. All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy. This also allows us to branch to unused space space
since the relative locations will remain the same.
When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU. The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).
kill outofworld and just let trap panic, if it can. Allow for sb1_subr.S
or rmixl_subr.S in the future. Fix TLB read/write code.
|
| 1.40.38.10 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.40.38.9 | 07-Sep-2009 |
matt | Simplify PTR_ case (32 bit or 64 bit)
|
| 1.40.38.8 | 05-Sep-2009 |
matt | Add REG_LL/REG_SC/REG_ADDU
|
| 1.40.38.7 | 03-Sep-2009 |
matt | Don't use .set noorder/.set reorder.
instead use .set push; .set noreorder; .set pop
This will preserve noorder
|
| 1.40.38.6 | 21-Aug-2009 |
matt | For now use old callframe defs for O32 to reduce spurious code gen
differences make real differences easier to spot.
|
| 1.40.38.5 | 20-Aug-2009 |
matt | Add XXX_WORD for INT and LONG.
Use PTR_LA in the PANIC macro.
|
| 1.40.38.4 | 19-Aug-2009 |
matt | Add XXX_SCALESHIFT for all types, not just PTR
REG_PROLOGUE/REG_EPILOGUE cleanup.
|
| 1.40.38.3 | 18-Aug-2009 |
matt | Fix .cpsetup use $25 instead of $t9.
kill FPST/FPLD and use FP_S/FP_L which match INT_S/PTR_S/REG_S ...
|
| 1.40.38.2 | 18-Aug-2009 |
uebayasi | Provide FP_L / FP_S as aliases of FPLD / FPST. Fix build.
|
| 1.40.38.1 | 16-Aug-2009 |
matt | Completely rework to support multiple ABIs. Includes macros/ops to make
writing ABI independent assembly much easier. Add macros to handle PIC
for N32/N64 as well as O32/O64.
|
| 1.40.20.2 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.40.20.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.41.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.41.2.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.43.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.43.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.45.2.1 | 10-Nov-2011 |
yamt | sync with head
|
| 1.46.24.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.46.10.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.46.10.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.48.2.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.48.2.2 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.48.2.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.49.2.2 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.49.2.1 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.53.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.54.14.2 | 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.54.14.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.54.12.1 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.54.6.2 | 01-Aug-2023 |
martin | Apply patch, requested by riastradh in ticket #1859:
sys/arch/mips/include/asm.h (apply patch)
Additional build fix for mips1 (and mips2?)
(patch taken from [pullup-9 #1676])
|
| 1.54.6.1 | 31-Jul-2023 |
martin | Pull up following revision(s) (requested by riastradh in ticket #1859):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
(applied also to sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/cortex_init.S)
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/alpha/include/asm.h: revision 1.45
(applied to sys/arch/alpha/alpha/multiproc.s)
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
|
| 1.55.10.1 | 20-Apr-2020 |
bouyer | Sync with HEAD
|
| 1.55.4.2 | 01-Aug-2023 |
martin | Apply patch, requested by riastradh in ticket #1676:
sys/arch/mips/include/asm.h (apply patch)
Additional build fix for mips1 (and mips2?)
|
| 1.55.4.1 | 31-Jul-2023 |
martin | Pull up following revision(s) (requested by riastradh in ticket #1676):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
sys/arch/alpha/include/asm.h: revision 1.45
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
|
| 1.62.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.71.4.1 | 31-Jul-2023 |
martin | Pull up following revision(s) (requested by riastradh in ticket #264):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
sys/arch/alpha/include/asm.h: revision 1.45
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/riscv/riscv/cpu_switch.S: revision 1.3
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
riscv: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
|
| 1.75.6.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.6 | 12-Aug-2009 |
matt | Nuke a.out support for MIPS.
|
| 1.5 | 30-Nov-2002 |
simonb | branches: 1.5.112; 1.5.126;
Standardise on #ifdef _MIPS_<header>_H_ for multiple inclusion tests.
|
| 1.4 | 24-Apr-1999 |
simonb | branches: 1.4.20;
Nuke register and remove trailling white space.
|
| 1.3 | 05-Jan-1998 |
perry | branches: 1.3.12;
RCSID Police.
|
| 1.2 | 28-Mar-1995 |
jtc | KERNEL -> _KERNEL
|
| 1.1 | 18-Jan-1995 |
mellon | 4.4BSD binary format
|
| 1.3.12.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.4.20.1 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.5.126.1 | 24-Oct-2010 |
jym | Sync with HEAD
|
| 1.5.112.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.5 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.4 | 23-May-2013 |
christos | add generic copyrights so FreeBSD can use them.
|
| 1.3 | 30-Nov-2002 |
simonb | branches: 1.3.146; 1.3.156;
Standardise on #ifdef _MIPS_<header>_H_ for multiple inclusion tests.
|
| 1.2 | 21-Aug-1999 |
simonb | branches: 1.2.20;
Include <sys/bswap.h> for function prototypes. i386, pc532 and vax
still include <machine/byte_swap.h> and define macros for some of
the bswap*() functions.
|
| 1.1 | 15-Jan-1999 |
bouyer | Move the bswap functions from libutil to libc (this bups the
minor of libc and the major of libutil). For little-endian architectures
merge the bnswap() assembly versions with nto* and hton* using symbols
aliasing. Use symbol renaming for the bswap function in this case to avoid
namespace pollution.
Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian
machines, common code for inline macros go in machine/byte_swap.h
Sync libkern with libc.
Adjust #include in kernel sources for machine/bswap.h.
|
| 1.2.20.1 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.3.156.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.3.146.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.11 | 28-May-2014 |
skrll | Remove unused file.
|
| 1.10 | 20-Feb-2011 |
matt | branches: 1.10.14; 1.10.28;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.9 | 28-Apr-2008 |
martin | branches: 1.9.18; 1.9.22; 1.9.28; 1.9.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.8 | 04-Mar-2007 |
christos | branches: 1.8.40; 1.8.42; 1.8.44;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.7 | 21-Feb-2007 |
mrg | add a pair of new bus_dma(9) functions:
int _bus_dmatag_subregion(bus_dma_tag_t tag,
bus_addr_t min_addr,
bus_addr_t max_addr,
bus_dma_tag_t *newtag,
int flags)
void _bus_dmatag_destroy(bus_dma_tag_t tag)
that allow a (normally broken/limited) device to restrict the bus address
range it can talk to. this is used by bce(4) to limit DMA addresses to
1GB range, the maximum the chip can address.
all this is from Yorick Hardy <yhardy@uj.ac.za> with input from several
people on tech-kern.
XXX: bus_dma(9) needs an update still.
|
| 1.6 | 01-Mar-2006 |
yamt | branches: 1.6.20;
merge yamt-uio_vmspace branch.
- use vmspace rather than proc or lwp where appropriate.
the latter is more natural to specify an address space.
(and less likely to be abused for random purposes.)
- fix a swdmover race.
|
| 1.5 | 11-Dec-2005 |
christos | branches: 1.5.2; 1.5.4; 1.5.6;
merge ktrace-lwp.
|
| 1.4 | 09-Mar-2005 |
matt | branches: 1.4.4;
Add a dm_maxsegsz public member to bus_dmamap_t. This allows a user of the API
to select the maximum segment size for each bus_dmamap_load (up to the maxsegsz
supplied to bus_dmamap_create). dm_maxsegsz is reset to the value supplied to
bus_dmamap_create when the dmamap is unloaded.
|
| 1.3 | 28-Jan-2003 |
kent | branches: 1.3.2; 1.3.10; 1.3.12;
Introduce BUS_DMA_NOCACHE, and bus_dmamem_map() of i386 supports it.
|
| 1.2 | 18-Mar-2002 |
simonb | branches: 1.2.4; 1.2.10;
Oops, balance #ifdef/#endif _KERNEL.
|
| 1.1 | 18-Mar-2002 |
simonb | Add generic MIPS bus_space and bus_dma headers; these are a straight
split of the algor <machine/bus.h>.
|
| 1.2.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.2.10.1 | 18-Mar-2002 |
jdolecek | file bus_dma.h was added on branch kqueue on 2002-06-23 17:38:01 +0000
|
| 1.2.4.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.2.4.1 | 18-Mar-2002 |
nathanw | file bus_dma.h was added on branch nathanw_sa on 2002-04-01 07:40:57 +0000
|
| 1.3.12.1 | 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.3.10.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.3.2.1 | 01-Apr-2005 |
skrll | Sync with HEAD.
|
| 1.4.4.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.4.4.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.4.4.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.5.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.5.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.5.2.1 | 18-Feb-2006 |
yamt | _dm_proc -> _dm_vmspace.
|
| 1.6.20.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.6.20.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.8.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.8.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.8.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.9.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.9.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.9.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.9.18.2 | 12-Jan-2010 |
matt | Rework bounce buffers so that it can also deal with non-coherent buffers.
|
| 1.9.18.1 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.10.28.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.10.14.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.6 | 22-Jan-2022 |
skrll | Ensure bus_dmatag_subregion is called with an inclusive max_addr
everywhere.
|
| 1.5 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.4 | 07-Feb-2019 |
mrg | add missing BUS_DMA_PREFETCHABLE
|
| 1.3 | 30-Jul-2016 |
matt | branches: 1.3.16;
Use register_t for _ds_vaddr
|
| 1.2 | 11-Jun-2015 |
matt | branches: 1.2.2;
Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_start to get the
VA space it needs.
pmap_segtab.c is almost identical to uvm/pmap/pmap_segtab.c now. It won't
be long until we switch to the uvm/pmap one.
|
| 1.1 | 01-Jul-2011 |
dyoung | branches: 1.1.12; 1.1.30;
Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split.
|
| 1.1.30.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.2.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.3.16.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1 | 01-Jul-2011 |
dyoung | Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split.
|
| 1.6 | 17-Jul-2011 |
dyoung | Switch MIPS and MIPS-ish architectures to new-style <sys/bus.h>. This
involves moving some inline bus_space(9) implementation into .c files.
|
| 1.5 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.4 | 28-Apr-2008 |
martin | branches: 1.4.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.3 | 04-Feb-2006 |
gdamore | branches: 1.3.68; 1.3.70; 1.3.72;
Provide streaming bus_space methods that don't swap if bus is otherwise
swapped from host byte order.
Closes PR port-mips/31910
Reviewed by <izumi>, <matt>, and <simonb>
|
| 1.2 | 18-Mar-2002 |
simonb | branches: 1.2.4; 1.2.10; 1.2.32; 1.2.44; 1.2.46; 1.2.48;
Oops, balance #ifdef/#endif _KERNEL.
|
| 1.1 | 18-Mar-2002 |
simonb | Add generic MIPS bus_space and bus_dma headers; these are a straight
split of the algor <machine/bus.h>.
|
| 1.2.48.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.46.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.44.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.2.32.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.2.10.1 | 18-Mar-2002 |
jdolecek | file bus_space.h was added on branch kqueue on 2002-06-23 17:38:01 +0000
|
| 1.2.4.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.2.4.1 | 18-Mar-2002 |
nathanw | file bus_space.h was added on branch nathanw_sa on 2002-04-01 07:40:57 +0000
|
| 1.3.72.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.3.72.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.3.70.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.3.68.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.4.18.3 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.4.18.2 | 17-Nov-2009 |
matt | Add/use PRIxBUS{ADDR,SIZE} and PRIxBSH
|
| 1.4.18.1 | 15-Nov-2009 |
cliff | - need to be able to handle >32 bit bus addrs in N32 kernel
- bus_addr_t is now paddr_t
- bus_size_t is now psize_t
- bus_space_handle_t is now intptr_t
- this will impact other MIPS ports, TBD
|
| 1.5 | 28-Mar-2023 |
nakayama | Add missing PRIuBUSSIZE to mips.
|
| 1.4 | 26-Jul-2020 |
simonb | branches: 1.4.20;
#define<tab>
Nuke trailing whitespace.
|
| 1.3 | 15-Sep-2016 |
jdolecek | remove last isolated islands using BUS_SPACE_BARRIER_SYNC and
BUS_SPACE_BARRIER_X_BEFORE_X - these were only ever defined for mips and ia64,
and never actually implemented even there
|
| 1.2 | 11-Jul-2016 |
matt | branches: 1.2.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1 | 01-Jul-2011 |
dyoung | branches: 1.1.12; 1.1.30;
Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split.
|
| 1.1.30.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.2.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.4.20.1 | 03-Apr-2023 |
martin | Additionally pull up following revision(s) for ticket #128
to unbreak the build:
sys/arch/mips/include/types.h: revision 1.78
sys/arch/mips/include/bus_space_defs.h: revision 1.5
Add missing PRIuBUSSIZE to mips.
|
| 1.2 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.1 | 01-Jul-2011 |
dyoung | Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split.
|
| 1.17 | 03-May-2025 |
riastradh | mips: Include opt_cputype.h before any of the flags it defines.
PR port-evbmips/59385: PGSHIFT is inconsistently defined on MIPS
|
| 1.16 | 27-Jul-2020 |
skrll | branches: 1.16.26;
s/MODULE/_MODULE/
spotted by chuq@
|
| 1.15 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.14 | 18-Aug-2016 |
skrll | Need to compile in cache alias support when MIPS3 or MIPS4
|
| 1.13 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.12 | 07-Jun-2015 |
matt | Multiple inclusion protection
|
| 1.11 | 15-Mar-2011 |
matt | branches: 1.11.14; 1.11.32;
Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.10 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.9 | 11-Dec-2005 |
christos | branches: 1.9.96; 1.9.100; 1.9.106; 1.9.108;
merge ktrace-lwp.
|
| 1.8 | 26-Mar-2005 |
tsutsui | Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.7 | 01-Mar-2005 |
sekiya | branches: 1.7.2;
Add a hint variable (mips_sdcache_forceinv, explicitly initialized to zero)
that tells pmap_zero_page() and pmap_copy_page() to unconditionally invalidate
pages for r5k-class CPUs with secondary cache.
This behavior must be explicitly enabled by setting mips_sdcache_forceinv to 1.
This is the last bit of a patch that has been kicked around since 2000 between
rafal@, tsutsui@, and myself.
|
| 1.6 | 17-Feb-2003 |
simonb | branches: 1.6.2; 1.6.10; 1.6.12;
No need to protect headers with #ifdef _KERNEL if they're never installed
in /usr/include.
|
| 1.5 | 17-Dec-2002 |
simonb | Add support for caches where the data cache is fully coherent, and
either requires flushing either only when the I cache ops are used
or not at all. Currently only used by MIPS32/MIPS64 cache code.
|
| 1.4 | 09-Nov-2002 |
thorpej | Make cache size/mask variables unsigned.
|
| 1.3 | 19-Nov-2001 |
thorpej | branches: 1.3.2;
Add mips_dcache_align and mips_dcache_align_mask variables that
contain information suitable for allowing other parts of the kernel
to determine if a memory region is aligned to the largest data cache
line size present in the system.
Add a mips_dcache_compute_align() function which must be called whenever
one of the data cache line size variables is changed, in order to
compute mips_dcache_align and mips_dcache_align_mask.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache.h was initially added on branch thorpej-mips-cache.
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New MIPS cache primitives and code to configure which ones are used.
|
| 1.2.2.4 | 19-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.2.2.3 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.2 | 01-Feb-2002 |
gmcgarry | Pull-up cache ops from -current
|
| 1.2.2.1 | 14-Nov-2001 |
gmcgarry | file cache.h was added on branch nathanw_sa on 2002-02-01 04:57:44 +0000
|
| 1.3.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.3.2.1 | 19-Nov-2001 |
thorpej | file cache.h was added on branch kqueue on 2002-01-10 19:45:59 +0000
|
| 1.6.12.2 | 26-Mar-2005 |
yamt | sync with head.
|
| 1.6.12.1 | 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.6.10.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.6.2.2 | 01-Apr-2005 |
skrll | Sync with HEAD.
|
| 1.6.2.1 | 04-Mar-2005 |
skrll | Sync with HEAD.
Hi Perry!
|
| 1.7.2.1 | 21-Nov-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #961):
sys/arch/mips/mips/cache.c: revision 1.27
sys/arch/mips/include/cache.h: revision 1.8
sys/arch/mips/mips/pmap.c: revision 1.158
sys/arch/mips/mips/vm_machdep.c: revision 1.106
sys/arch/mips/mips/mem.c: revision 1.30
sys/arch/mips/include/pmap.h: revision 1.47
Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.9.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.9.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.9.100.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.9.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.9.96.8 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.9.96.7 | 12-Jan-2012 |
matt | Add an optimization for UP system with non-virtually tagged caches (which are
most of them these days).
If a page needs to be have an icache_sync performed and the page has a direct
map alias (XKPHYS or KSEG0), then don't do an index op; instead do a range op
on the XKPHYS or KSEG0 address. This results in unneeded fewer cache line
invalidations.
|
| 1.9.96.6 | 27-Dec-2011 |
matt | Make these play nice with modules.
|
| 1.9.96.5 | 23-Dec-2011 |
matt | Add multiple inclusion protection.
Add separate variable for dealing with icache virtual aliases
|
| 1.9.96.4 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.9.96.3 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.9.96.2 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.9.96.1 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.11.32.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.11.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.11.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.16.26.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.4 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.3 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.2 | 11-Aug-2009 |
matt | branches: 1.2.2; 1.2.24; 1.2.42;
Flush by increasing way, then increasing addr. flush L1 before L2 (even
though according to the specification it should be needed). Reset
mips_sdcache_size to 0 so we will configure it.
|
| 1.1 | 07-Aug-2009 |
matt | Add loongson2 specific cache ops
|
| 1.2.42.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.24.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.2.2.1 | 11-Aug-2009 |
yamt | file cache_ls2.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:29 +0000
|
| 1.6 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.5 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.4 | 17-Feb-2003 |
simonb | branches: 1.4.126; 1.4.152; 1.4.172;
No need to protect headers with #ifdef _KERNEL if they're never installed
in /usr/include.
|
| 1.3 | 24-Nov-2002 |
simonb | New generic way-aware MIPS32/64 range-index cache functions with proper
handling for phyiscally-indexed caches where the way size is greater than
the page size.
These work fine with pass 1 SB1 cores, so g/c those workarounds.
Much thanks to Chris Demetriou for many suggestions and helping me get
my head around all this.
|
| 1.2 | 03-Apr-2002 |
simonb | Include 2way cache ops for mips{32,64} CPUs.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.4; 1.1.8;
Prototypes for MIPS32/64 cache ops.
|
| 1.1.8.4 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.1.8.3 | 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.1.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.8.1 | 05-Mar-2002 |
nathanw | file cache_mipsNN.h was added on branch nathanw_sa on 2002-04-01 07:40:57 +0000
|
| 1.1.4.3 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.1 | 05-Mar-2002 |
jdolecek | file cache_mipsNN.h was added on branch kqueue on 2002-03-16 15:58:33 +0000
|
| 1.4.172.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.4.152.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.126.2 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.4.126.1 | 27-Dec-2011 |
matt | Make these play nice with modules.
|
| 1.5 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.4 | 14-Jun-2020 |
simonb | Define Octeon Cavium cache layouts for various cnMIPS cores.
|
| 1.3 | 11-Apr-2019 |
simonb | Fix tyop.
|
| 1.2 | 11-Jul-2016 |
matt | branches: 1.2.16; 1.2.20;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.2.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file cache_octeon.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.2.20.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.16.1 | 11-Jul-2016 |
jdolecek | file cache_octeon.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.4 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.96; 1.3.122; 1.3.142;
merge ktrace-lwp.
|
| 1.2 | 01-Nov-2003 |
shin | branches: 1.2.4;
cache_r10k.c rev. 1.1 is broken. Because,
1) R10k uses VA0 to select cache ways, but in rev. 1.1, VA14
is used instead.
2) R10k does not support HitWriteBack and should map HitWriteBack
to HitWriteBackInvalidate, but in rev. 1.1, HitWriteBack is not
handled properly.
So, cache_r10k.c rev. 1.1 was replaced by new implementation.
|
| 1.1 | 05-Oct-2003 |
tsutsui | Add R10000 cache ops, written by KIYOHARA Takashi and posted on port-sgimips.
Enabled by options ENABLE_MIPS4_CACHE_R10K for now.
|
| 1.2.4.4 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.4.3 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.4.2 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.2.4.1 | 01-Nov-2003 |
skrll | file cache_r10k.h was added on branch ktrace-lwp on 2004-08-03 10:37:39 +0000
|
| 1.3.142.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.3.122.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.96.1 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.4 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.3 | 17-Feb-2003 |
simonb | branches: 1.3.126; 1.3.152; 1.3.172;
No need to protect headers with #ifdef _KERNEL if they're never installed
in /usr/include.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2; 1.2.4;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache_r3k.h was initially added on branch thorpej-mips-cache.
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New style cache operations for R2000/R3000-style caches.
|
| 1.2.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.2.4.1 | 14-Nov-2001 |
thorpej | file cache_r3k.h was added on branch kqueue on 2002-01-10 19:45:59 +0000
|
| 1.2.2.2 | 14-Nov-2001 |
thorpej | Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.2.2.1 | 14-Nov-2001 |
thorpej | file cache_r3k.h was added on branch nathanw_sa on 2001-11-14 18:26:22 +0000
|
| 1.3.172.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.3.152.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.126.1 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.17 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.16 | 12-Jul-2016 |
skrll | Appease gcc and asm
|
| 1.15 | 12-Jul-2016 |
skrll | Fix RCSId
|
| 1.14 | 11-Jul-2016 |
matt | Use sdcache routines.
Remove old cache support.
Switch to new cache routines.
|
| 1.13 | 11-Jul-2016 |
skrll | Trailing whitespace
|
| 1.12 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.11 | 24-Dec-2005 |
perry | branches: 1.11.96; 1.11.122; 1.11.142;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.10 | 08-Mar-2003 |
rafal | branches: 1.10.18;
Add support for R5k secondary caches, from code Chris Sekiya sent me a long
time ago, with small tweaks by me. Since the R5k doesn't do VCE, the pmap
still needs to be whacked for R5kSC CPUs to work correctly, but this is a
start.
|
| 1.9 | 17-Feb-2003 |
simonb | No need to protect headers with #ifdef _KERNEL if they're never installed
in /usr/include.
|
| 1.8 | 17-Nov-2002 |
simonb | Add cache_r4k_op_8lines_{16,32} macros to perform cache ops on 8
consecutive lines.
|
| 1.7 | 05-Mar-2002 |
simonb | Add 4way 16/32-byte-line cache op primitives.
|
| 1.6 | 19-Jan-2002 |
shin | add VR4131 cache-op bug workaround code.
we can't use Hit_WriteBack_Invalidate.
|
| 1.5 | 23-Dec-2001 |
takemura | branches: 1.5.2;
Added Vr4131 support.
|
| 1.4 | 23-Nov-2001 |
tsutsui | Add 32B/l L1 D/I-cache ops for newer ARC machines.
|
| 1.3 | 18-Nov-2001 |
thorpej | Add 128b/l L2 cache ops.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache_r4k.h was initially added on branch thorpej-mips-cache.
|
| 1.1.2.3 | 13-Nov-2001 |
thorpej | Fix 3 bad offsets in the cache_r4k_op_32lines_32() loop.
|
| 1.1.2.2 | 12-Nov-2001 |
shin | improve R4000/4400 secondary cache support.
add support for secondary cache line sizes 16, 64, 128.
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New style cache operations for R4000/R4400-style caches.
|
| 1.2.2.5 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.2.2.4 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.2.2.3 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.2 | 01-Feb-2002 |
gmcgarry | Pull-up cache ops from -current
|
| 1.2.2.1 | 14-Nov-2001 |
gmcgarry | file cache_r4k.h was added on branch nathanw_sa on 2002-02-01 04:57:44 +0000
|
| 1.5.2.4 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.5.2.3 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.5.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.5.2.1 | 23-Dec-2001 |
thorpej | file cache_r4k.h was added on branch kqueue on 2002-01-10 19:45:59 +0000
|
| 1.10.18.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.11.142.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.11.122.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.11.96.3 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.11.96.2 | 27-Dec-2011 |
matt | Make these play nice with modules.
|
| 1.11.96.1 | 24-Dec-2011 |
matt | Change macros with embedded asm into static inline functions.
Pass in line_size to asm and gas expand to the proper offsets.
|
| 1.10 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.9 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.8 | 02-Jul-2014 |
martin | branches: 1.8.4; 1.8.6;
Restore file for playstation2 accidently overlooked in the big revitilazation
|
| 1.7 | 20-Feb-2011 |
matt | branches: 1.7.12;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.6 | 28-Apr-2008 |
martin | branches: 1.6.18; 1.6.22; 1.6.28; 1.6.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.5 | 24-Dec-2005 |
perry | branches: 1.5.74; 1.5.76; 1.5.78;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.4 | 17-Feb-2003 |
simonb | branches: 1.4.18;
No need to protect headers with #ifdef _KERNEL if they're never installed
in /usr/include.
|
| 1.3 | 23-Nov-2001 |
uch | branches: 1.3.2;
add #ifndef _LOCORE.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 10-Nov-2001 |
uch | branches: 1.1.2;
file cache_r5900.h was initially added on branch thorpej-mips-cache.
|
| 1.1.2.1 | 10-Nov-2001 |
uch | new cache code for R5900 and playstation2
|
| 1.2.2.2 | 01-Feb-2002 |
gmcgarry | Pull-up cache ops from -current
|
| 1.2.2.1 | 14-Nov-2001 |
gmcgarry | file cache_r5900.h was added on branch nathanw_sa on 2002-02-01 04:57:44 +0000
|
| 1.3.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.3.2.1 | 23-Nov-2001 |
thorpej | file cache_r5900.h was added on branch kqueue on 2002-01-10 19:46:00 +0000
|
| 1.4.18.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.5.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.5.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.5.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.6.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.6.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.6.18.1 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.7.12.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.8.6.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.8.4.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.8.4.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.8.4.1 | 02-Jul-2014 |
tls | file cache_r5900.h was added on branch tls-maxphys on 2014-08-20 00:03:12 +0000
|
| 1.6 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.5 | 14-Jun-2020 |
tsutsui | Use proper "page" alignments for R5k Page Invalidate(S) op. PR/55139
According to NEC "User's Manual VR5000, VR1000 64-BIT MICROPROCESSOR
INSTRUCTION" (U12754EJ1V0UMJ1), R5000 Page Invalidate (S) op does
"a page invalidate by doing a burst of 128 line invalidates to
the secondary cache at the page specified by the effective address
generated by the CACHE instruction, which must be page aligned."
This description looks a bit confusing, but "page" used here
implies fixed 32 byte cacheline * 128 lines == 4096 bytes,
not our variable "PAGE_SIZE" used in VM paging ops. Note
the current default PAGE_SIZE for MIPS3 has been changed to 8192.
While here, also define and use proper macro for the "page" and CACHEOP
arg for the R5k Page_Invalidate_S op, as the manual also describes
the cache op field 10111 as "Page Invalidate" for the secondary cache.
No visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.4 | 11-Jul-2016 |
matt | branches: 1.4.22;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.96; 1.3.122; 1.3.142;
merge ktrace-lwp.
|
| 1.2 | 13-Dec-2004 |
sekiya | Add prototype for r5k_sdcache_wbinv_range_index()
|
| 1.1 | 08-Mar-2003 |
rafal | branches: 1.1.2;
Add support for R5k secondary caches, from code Chris Sekiya sent me a long
time ago, with small tweaks by me. Since the R5k doesn't do VCE, the pmap
still needs to be whacked for R5kSC CPUs to work correctly, but this is a
start.
|
| 1.1.2.1 | 18-Dec-2004 |
skrll | Sync with HEAD.
|
| 1.3.142.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.3.122.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.96.1 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.4.22.1 | 20-Jun-2020 |
martin | Pull up following revision(s) (requested by tsutsui in ticket #965):
sys/arch/mips/include/cache_r5k.h: revision 1.5
sys/arch/mips/mips/cache_r5k_subr.S: revision 1.4
sys/arch/mips/mips/cache_r5k.c: revision 1.21
Use proper "page" alignments for R5k Page Invalidate(S) op. PR/55139
According to NEC "User's Manual VR5000, VR1000 64-BIT MICROPROCESSOR
INSTRUCTION" (U12754EJ1V0UMJ1), R5000 Page Invalidate (S) op does
"a page invalidate by doing a burst of 128 line invalidates to
the secondary cache at the page specified by the effective address
generated by the CACHE instruction, which must be page aligned."
This description looks a bit confusing, but "page" used here
implies fixed 32 byte cacheline * 128 lines == 4096 bytes,
not our variable "PAGE_SIZE" used in VM paging ops. Note
the current default PAGE_SIZE for MIPS3 has been changed to 8192.
While here, also define and use proper macro for the "page" and CACHEOP
arg for the R5k Page_Invalidate_S op, as the manual also describes
the cache op field 10111 as "Page Invalidate" for the secondary cache.
No visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.7 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.6 | 28-Apr-2008 |
martin | branches: 1.6.18; 1.6.44; 1.6.64;
Remove clause 3 and 4 from TNF licenses
|
| 1.5 | 24-Dec-2005 |
perry | branches: 1.5.74; 1.5.76; 1.5.78;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.4 | 17-Feb-2003 |
simonb | branches: 1.4.18;
No need to protect headers with #ifdef _KERNEL if they're never installed
in /usr/include.
|
| 1.3 | 05-Mar-2002 |
simonb | Clean up #ifdef checks a little.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2; 1.2.4;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache_tx39.h was initially added on branch thorpej-mips-cache.
|
| 1.1.2.2 | 30-Oct-2001 |
uch | add #ifndef _LOCORE
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New style cache operations for TX39-style caches. XXX This is not
yet complete.
|
| 1.2.4.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.2.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.2.4.1 | 14-Nov-2001 |
thorpej | file cache_tx39.h was added on branch kqueue on 2002-01-10 19:46:00 +0000
|
| 1.2.2.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.2.2.1 | 14-Nov-2001 |
nathanw | file cache_tx39.h was added on branch nathanw_sa on 2002-04-01 07:40:57 +0000
|
| 1.4.18.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.5.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.5.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.5.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.6.64.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.6.44.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.18.1 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.11 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.10 | 29-Mar-2012 |
christos | - elide parameter tags
- make argument size_t as appropriate
- add begin/end decls
|
| 1.9 | 14-Mar-2009 |
dsl | branches: 1.9.12; 1.9.16;
Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.
|
| 1.8 | 28-Apr-2008 |
martin | branches: 1.8.8; 1.8.14;
Remove clause 3 and 4 from TNF licenses
|
| 1.7 | 11-Dec-2005 |
christos | branches: 1.7.74; 1.7.76; 1.7.78;
merge ktrace-lwp.
|
| 1.6 | 06-Nov-2004 |
christos | Don't use "int" to represent lengths; this is what size_t is for. This
does not change the ABI since we don't have 64 bit mips yet.
|
| 1.5 | 05-Mar-2002 |
simonb | branches: 1.5.14;
ANSIfy.
|
| 1.4 | 07-Jan-2001 |
simonb | branches: 1.4.4; 1.4.8;
Move prototypes for mips_user_cachectl() and mips_user_cacheflush()
to <mips/cachectl.h>.
|
| 1.3 | 18-Oct-1997 |
jonathan | branches: 1.3.18;
Prototype ANSI-safe gcc trampoline entrypoint.
|
| 1.2 | 09-Jun-1997 |
jonathan | Add sys_sysarch() calls for the standard mips userspace cache-control calls.
|
| 1.1 | 08-Jun-1997 |
jonathan | Declarations for standard MIPS-ABI cacheflush() and cachectl() calls,
as used by g++ trampoline code.
|
| 1.3.18.1 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.4.8.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.4.4.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.5.14.1 | 14-Nov-2004 |
skrll | Sync with HEAD.
|
| 1.7.78.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.7.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.7.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.7.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.8.14.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.8.8.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.9.16.1 | 05-Apr-2012 |
mrg | sync to latest -current.
|
| 1.9.12.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.17 | 24-Mar-2021 |
simonb | s/depreciated/deprecated/g
|
| 1.16 | 26-Jul-2020 |
simonb | branches: 1.16.2; 1.16.4;
#define<tab>
Nuke trailing whitespace.
|
| 1.15 | 18-Mar-2014 |
christos | Make all __ALIGNBYTES macros return the same type (size_t)
|
| 1.14 | 20-Jan-2012 |
joerg | branches: 1.14.6; 1.14.10;
Change CMSG_SPACE and CMSG_LEN to provide Integer Constant Expressions
again. This was changed in sys/socket.h r1.51 to work around fallout
from the IPv6 aux data migration. It broke the historic ABI on some
platforms. This commit restores compatibility for netbsd32 code on such
platforms and provides a template for future changes to the CMSG_*
alignment. Revert PCC/Clang workarounds in postfix and tmux.
|
| 1.13 | 14-Dec-2009 |
matt | branches: 1.13.12; 1.13.16;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.12 | 27-Aug-2006 |
matt | branches: 1.12.60; 1.12.78;
Define _MIPS_BSD_API correctly according to GCC builting __mips_n64,
__mips_n32, and __mips_o64.
|
| 1.11 | 24-Apr-1999 |
simonb | branches: 1.11.52; 1.11.66; 1.11.70;
Nuke register and remove trailling white space.
|
| 1.10 | 20-Mar-1999 |
thorpej | branches: 1.10.4;
Garbage-collect.
|
| 1.9 | 31-Jan-1999 |
castor | Remove genpubassym.cf stuff. The macro _MIPS_BSD_API allows selection of a
64-bit clean compilation model.
|
| 1.8 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.7 | 04-Nov-1997 |
thorpej | Bug fixes and cleanup from Chris Demetriou <cgd@pa.dec.com>:
- fix _C_LABEL so that it actually works.
- make __RENAME use _C_LABEL.
- fix __RENAME so that it expects an unquoted argument.
- fix __indr_reference and __warn_references so that they
supply their own final semicolon.
- define __warn_references to nothing if not GNU C (required
by the way it's used).
The __warn_references semicolon change has to be made
so that __warn_references can be defined into nothing.
(A ; all by itself isn't a great idea.) The __indr_reference
change was made for consistency.
|
| 1.6 | 22-Oct-1997 |
thorpej | Implement __RENAME() in <machine/cdefs.h>
|
| 1.5 | 15-May-1997 |
jonathan | branches: 1.5.8;
Add hooks for definiing kernel RCSId and copyright symbols,
via asm(".section"), for compatibility with Alpha tc and ioasic drivers.
Assumes ELF and binutils-2.8 toolchain.
|
| 1.4 | 15-Dec-1995 |
jonathan | Change mips __warn_references() macro to use the ELF warning features
in binutils 2.6 and (patched) gcc 2.7.2. Only works with gcc in ANSI C
mode, for now.
|
| 1.3 | 03-May-1995 |
mellon | Use Alpha cdefs.h
|
| 1.2 | 23-Mar-1995 |
jtc | Changed name of __weak_reference() to __indr_reference(). They really
are indirect references, and I want to add a real __weak_reference()
macro to <machine/cdefs.h> soon.
|
| 1.1 | 19-Jan-1995 |
jtc | This file, which will be included by <sys/cdefs.h>, will contain macros
such as __warn_references() and __weak_reference() which are actually
machine dependant. This will make it easier for ports that are being
bootstraped with ELF and ECOFF based toolchains.
This change also introduces a new macro, _C_LABEL(x). _C_LABEL expands
its argument, an identifier, to a character string of the identifier
name as it is represented in an object file.
For most ports, _C_LABEL(x) will expand to "_x", for ELF based ports
_C_LABEL(x) will expand to "x".
|
| 1.5.8.2 | 04-Nov-1997 |
thorpej | Pull up from trunk: bug fixes and cleaups.
|
| 1.5.8.1 | 22-Oct-1997 |
thorpej | Pull up from trunk: Implement __RENAME() in <machine/cdefs.h>
|
| 1.10.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.11.70.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.11.66.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.11.52.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.12.78.3 | 23-Aug-2009 |
matt | Use #if defined(__mips_xxx) not #if __mips_xxx
|
| 1.12.78.2 | 21-Aug-2009 |
matt | Add support for testing instruction sets and cleanup ABI a little.
|
| 1.12.78.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.12.60.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.13.16.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.13.12.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.13.12.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.14.10.1 | 18-May-2014 |
rmind | sync with head
|
| 1.14.6.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.16.4.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.16.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.2 | 15-Mar-1999 |
nisimura | - Nuke old leftover; round four. This file has little usefuls, and
target MIPS ports are expected to have 'machine/conf.h' if necessary.
|
| 1.1 | 24-May-1997 |
jonathan | lint: Create mips/include/conf.h with prototypes for {mem device.
Add 'struct proc *p' 4th arg to mmopen(), mmclose().
Delete unused variable.
|
| 1.135 | 23-Jul-2023 |
skrll | USE __BIT() for CPUF_* flags. NFCI.
|
| 1.134 | 31-Jan-2023 |
andvar | fix few typos in comments.
|
| 1.133 | 14-Aug-2021 |
ryo | Improved the performance of kernel profiling on MULTIPROCESSOR, and possible to get profiling data for each CPU.
In the current implementation, locks are acquired at the entrance of the mcount
internal function, so the higher the number of cores, the more lock conflict
occurs, making profiling performance in a MULTIPROCESSOR environment unusable
and slow. Profiling buffers has been changed to be reserved for each CPU,
improving profiling performance in MP by several to several dozen times.
- Eliminated cpu_simple_lock in mcount internal function, using per-CPU buffers.
- Add ci_gmon member to struct cpu_info of each MP arch.
- Add kern.profiling.percpu node in sysctl tree.
- Add new -c <cpuid> option to kgmon(8) to specify the cpuid, like openbsd.
For compatibility, if the -c option is not specified, the entire system can be
operated as before, and the -p option will get the total profiling data for
all CPUs.
|
| 1.132 | 29-Mar-2021 |
simonb | Include #include <mips/frame.h> to get lwp_trapframe() definition.
Needed for dtrace.
|
| 1.131 | 17-Aug-2020 |
mrg | branches: 1.131.2; 1.131.4;
port crash(8) to mips. (most of the kernel side.)
- expose parts of _KERNEL to _KMEMUSER as well
- hide more things for _KERNEL
- avoid DB_MACHINE_COMMANDS in crash(8)
- XXX add mips_label_t for !_KERNEL and use it in the pcb to
avoid conflicting with the ddb/crash one
- enable dumppcb
some changes to make stack trace fail instead of SEGV and
the userland changes to crash itself not part of this change.
|
| 1.130 | 09-Aug-2020 |
skrll | Don't kcpuset_clone every pmap_tlb_shootdown_bystanders. Instead allocate
a kcpuset_t per cpu_info and use that.
|
| 1.129 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.128 | 01-Dec-2019 |
ad | Fix false sharing problems with cpu_info. Identified with tprof(8).
This was a very nice win in my tests on a 48 CPU box.
- Reorganise cpu_data slightly according to usage.
- Put cpu_onproc into struct cpu_info alongside ci_curlwp (now is ci_onproc).
- On x86, put some items in their own cache lines according to usage, like
the IPI bitmask and ci_want_resched.
|
| 1.127 | 21-Nov-2019 |
ad | mi_userret(): take care of calling preempt(), set spc_curpriority directly,
and remove MD code that does the same.
|
| 1.126 | 16-Sep-2018 |
skrll | interrupt has two 'r's
fix another typo while I'm here (flsah)
|
| 1.125 | 22-Aug-2018 |
msaitoh | - Cleanup for dynamic sysctl:
- Remove unused *_NAMES macros for sysctl.
- Remove unused *_MAXID for sysctls.
- Move CTL_MACHDEP sysctl definitions for m68k into m68k/include/cpu.h and
use them on all m68k machines.
|
| 1.124 | 07-Mar-2018 |
maya | branches: 1.124.2;
Adjust ci on the second iteration.
Now a MULTIPROCESSOR+LOCKDEBUG ERLITE reaches userland again
|
| 1.123 | 22-Jan-2018 |
maya | branches: 1.123.2;
Don't attempt to dereference cpu_infos if ncpus == 0.
Instead use the already initialized cpu_info_store.
(Also, now we assume all ncpus have cpu_infos initialized. seems to work.)
fixes PR port-mips/52940: ERLITE multiprocessor hangs early
|
| 1.122 | 16-Dec-2017 |
mrg | CPU_INFO_FOREACH() must always iterate at least the boot cpu.
document this in sys/cpu.h and fix the arm and mips versions
to check ncpu is non zero before using it as an iterator max.
this should fix the new assert in init_main.c.
|
| 1.121 | 31-Oct-2016 |
skrll | branches: 1.121.8;
Pre-allocate some kcpuset_ts so that we don't try and allocate in the
wrong context.
|
| 1.120 | 16-Jul-2016 |
macallan | move sysctl-related #defines out of #ifdef _KERNEL so userland can see them
now pixman builds again on loongson
|
| 1.119 | 11-Jul-2016 |
skrll | branches: 1.119.2;
Remove commented #include
|
| 1.118 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.117 | 11-Jun-2015 |
matt | Define (but not use) separate kernel and user pagetables.
Move to the new names.
|
| 1.116 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.115 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.114 | 06-Jun-2015 |
matt | Reuse the ci_next to hold the nmi exception stack.
|
| 1.113 | 02-Jun-2015 |
matt | Fix CPU_INFO_FOREACH which had the MULTIPROCESSOR/!MULTIPROCESSOR definitions
reversed.
|
| 1.112 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.111 | 28-May-2015 |
matt | Use the lwp_getcpu() inline for curcpu().
|
| 1.110 | 02-May-2015 |
matt | Don't define MIPS1/MIPS32/MIPS32R2 if ABI is N32 or N64.
|
| 1.109 | 10-Nov-2013 |
christos | branches: 1.109.6;
fix unused
|
| 1.108 | 10-Nov-2013 |
christos | use __unused instead of __USE and void cast to mark iterator variable unused
where needed (from phone)
|
| 1.107 | 28-Feb-2013 |
macallan | branches: 1.107.6;
add sysctl machdep.loongson-mmi to indicate wether Loongson Multimedia
Instructions are supported
mostly for pixman
|
| 1.106 | 22-Sep-2011 |
macallan | branches: 1.106.2; 1.106.12;
support BUS_SPACE_MAP_PREFETCH in order to allow mapping device memory and
DMA buffers with cacheing disabled but things like write combining, relaxed
ordering etc. allowed when the CPU supports it
so far enabled only on Loongson, should work on R1xk and probably newer CPUs
|
| 1.105 | 16-Aug-2011 |
matt | Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.104 | 31-Jul-2011 |
matt | Add CPU_MIPS_LOONGSON2 flag (rather defining a CPU_ARCH_MIPS3_LOONGSON2).
This is much less intrusive and disruptive.
|
| 1.103 | 06-Jul-2011 |
matt | Add
uint32_t kfetch_32(volatile uint32_t *, uint32_t);
which fetches a 32-bit value from a provided addess or returns
an user supplied value on error.
|
| 1.102 | 02-May-2011 |
rmind | Extend PCU:
- Add pcu_ops_t::pcu_state_release() operation for PCU_RELEASE case.
- Add pcu_switchpoint() to perform release operation on context switch.
- Sprinkle const, misc. Also, sync MIPS with changes.
Per discussions with matt@.
|
| 1.101 | 14-Apr-2011 |
cliff | - MIPS CPU (COP0) watchpoint support moved from db_machdep.h to cpu.h
- CPU watchpoints are per-cpu; add ci_cpuwatch_count, ci_watchpoint_tab[]
to struct cpuinfo
|
| 1.100 | 06-Apr-2011 |
matt | Fix LKM/MODULAR case.
|
| 1.99 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.98 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.97 | 26-Jan-2011 |
pooka | Add support for the Extensible MIPS ("eMIPS") platform. The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.
eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing. eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.
NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman. Microsoft Corporation has
donated full copyright to The NetBSD Foundation.
Platform support for eMIPS is the first part of Microsoft's
contribution. The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.
|
| 1.96 | 22-Dec-2010 |
nisimura | branches: 1.96.2; 1.96.4;
PROC_PC() should have been changed to LWP_PC().
|
| 1.95 | 23-Jan-2010 |
mrg | branches: 1.95.4;
rename pridtab{}::cpu_name to cpu_displayname.
should fix a build error reported by he@.
|
| 1.94 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.93 | 27-Nov-2009 |
rmind | - Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
|
| 1.92 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.91 | 21-Oct-2009 |
rmind | Remove uarea swap-out functionality:
- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.
Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).
Discussed on <tech-kern>, reviewed by <ad>.
|
| 1.90 | 26-May-2008 |
tsutsui | branches: 1.90.16;
Remove all initialization of obsolete ci_divisor_recip in
mips struct cpu_info and related macroes.
The member was prepared for a hack in MD microtime(9) implementation
but it has been superseded by MI timecounter(9).
|
| 1.89 | 27-Feb-2008 |
xtraeme | branches: 1.89.2; 1.89.4; 1.89.6;
Remove CTL_MACHDEP_NAMES, it's not used anywhere.
Ok by martin@.
|
| 1.88 | 09-Jan-2008 |
wiz | branches: 1.88.2; 1.88.6;
Fix typo in macro name and comments.
|
| 1.87 | 04-Dec-2007 |
he | branches: 1.87.4;
Define the various MIPS* CPU macros also for _STANDALONE in addition
to for _LKM, so that we don't #error out in that case.
This fixes the build for sgimips boot programs, which wants to use
libkern, which now includes the atomic stuff, which for the mips ports
ends up including this file.
"simonb said OK"
|
| 1.86 | 03-Dec-2007 |
ad | branches: 1.86.2;
Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
|
| 1.85 | 19-Oct-2007 |
ad | branches: 1.85.2;
Merge from vmlocking: add CPU_INFO_ITERATOR.
|
| 1.84 | 17-Oct-2007 |
garbled | Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.83 | 04-Aug-2007 |
ad | branches: 1.83.2; 1.83.6;
Add ci_cpuid where it's missing.
|
| 1.82 | 17-May-2007 |
yamt | branches: 1.82.2; 1.82.4; 1.82.8;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.81 | 21-Feb-2007 |
simonb | branches: 1.81.4; 1.81.6; 1.81.12;
Fix a tyop.
|
| 1.80 | 16-Feb-2007 |
oster | branches: 1.80.2;
Fix typo from newlock2 merge, allowing MIPS64 to build again.
|
| 1.79 | 16-Feb-2007 |
ad | Remove spllowersoftclock() and CLKF_BASEPRI(), and always dispatch callouts
via a soft interrupt. In the near future, softclock will be run from process
context.
|
| 1.78 | 09-Feb-2007 |
ad | Merge newlock2 to head.
|
| 1.77 | 23-Mar-2006 |
tsutsui | branches: 1.77.8;
include/cpu.h: make sure MIPS3_PLUS properly defined even if _LOCORE is defined
mips/fp.S: include <mips/cpu.h> for #ifdef MIPS3_PLUS
Closes PR port-mips/27298.
|
| 1.76 | 24-Dec-2005 |
perry | branches: 1.76.4; 1.76.6; 1.76.8; 1.76.10; 1.76.12;
bare asm -> __asm
|
| 1.75 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.74 | 05-Nov-2005 |
tsutsui | Make MIPS3_PG_SHIFT a variable and initialize it accordingly
in mips_vector_init() if options MIPS3_4100 is specified
so that kernels which have options MIPS3_4100 also work
on other MIPS3 CPUs.
XXX: now should we rename options MIPS3_4100 to options ENABLE_MIPS_R4100,
XXX: or just make MIPS3_PG_SHIFT always a variable?
|
| 1.73 | 22-Sep-2004 |
yamt | branches: 1.73.10; 1.73.12; 1.73.18;
move some per-cpu data definitions to MI place so that they can be modified
without touching all ports. discussed on tech-kern@.
|
| 1.72 | 04-Jan-2004 |
jdolecek | Rearrange process exit path to avoid need to free resources from different
process context ('reaper').
From within the exiting process context:
* deactivate pmap and free vmspace while we can still block
* introduce MD cpu_lwp_free() - this cleans all MD-specific context (such
as FPU state), and is the last potentially blocking operation;
all of cpu_wait(), and most of cpu_exit(), is now folded into cpu_lwp_free()
* process is now immediatelly marked as zombie and made available for pickup
by parent; the remaining last lwp continues the exit as fully detached
* MI (rather than MD) code bumps uvmexp.swtch, cpu_exit() is now same
for both 'process' and 'lwp' exit
uvm_lwp_exit() is modified to never block; the u-area memory is now
always just linked to the list of available u-areas. Introduce (blocking)
uvm_uarea_drain(), which is called to release the excessive u-area memory;
this is called by parent within wait4(), or by pagedaemon on memory shortage.
uvm_uarea_free() is now private function within uvm_glue.c.
MD process/lwp exit code now always calls lwp_exit2() immediatelly after
switching away from the exiting lwp.
g/c now unneeded routines and variables, including the reaper kernel thread
|
| 1.71 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.70 | 17-Jan-2003 |
thorpej | branches: 1.70.2;
Merge the nathanw_sa branch.
|
| 1.69 | 17-Dec-2002 |
simonb | Add support for caches where the data cache is fully coherent, and
either requires flushing either only when the I cache ops are used
or not at all. Currently only used by MIPS32/MIPS64 cache code.
|
| 1.68 | 24-Nov-2002 |
simonb | Move the curpcb and segbase extern decls to cpu.h to better group together
what will need to change for SMP.
Hide 'struct cpu_info' and some macros in #ifdef _KERNEL/#endif.
|
| 1.67 | 05-Aug-2002 |
shin | ++CPU_MAXID for CPU_LLSC.
|
| 1.66 | 04-Aug-2002 |
gmcgarry | Add sysctl variable to represent native CPU support for LL/SC instructions.
|
| 1.65 | 23-Jun-2002 |
manu | Typo
|
| 1.64 | 04-Jun-2002 |
simonb | 3 ports are now using the reciprocal count divisor code now, move it
to <mips/cpu.h>, and add MIPS_SET_CI_RECIPRICAL and MIPS_COUNT_TO_MHZ
macros to use it.
|
| 1.63 | 01-Jun-2002 |
simonb | Add two new cpu capability flags: CPU_MIPS_USE_WAIT for CPUs that use a
"wait" instruction based cpu_idle(), and CPU_MIPS_NO_WAIT for specific
CPUs that don't use this (applicable to mips32/64 mainly).
|
| 1.62 | 05-Apr-2002 |
simonb | branches: 1.62.2;
Add a "CPU_MIPS_DOUBLE_COUNT" flag for CPUs where the cp0 count register
ticks over at half the CPU clock speed, and set this flag for the known
CPUs with this behaviour. Better names for this flag gratefully accepted!
Also adjust comment about known R4000/R4400 revisions.
|
| 1.61 | 03-Apr-2002 |
simonb | Add prototype for badaddr64().
|
| 1.60 | 19-Mar-2002 |
simonb | Define all CPU types if _LKM is defined; fixes problems building LKM's
as noted by FUKAUMI Naoki on port-mips.
|
| 1.59 | 06-Mar-2002 |
simonb | Add a field for the reciprocal of the divisor delay for use by microtime.
|
| 1.58 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Clean up (somewhat) mips1 vs mips3+ configuration.
XXX: this is still quite messy.
- Add cpu frequency info to struct cpu_info.
- ANSIfy.
|
| 1.57 | 14-Nov-2001 |
thorpej | branches: 1.57.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.56 | 16-Oct-2001 |
uch | branches: 1.56.2;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.55 | 04-Sep-2001 |
simonb | Oops, <sys/sched.h> isn't asm safe, move inside an "#ifndef LOCORE" block.
|
| 1.54 | 04-Sep-2001 |
simonb | May as well include <mips/cpuregs.h> in <mips/cpu.h> once rather than
in every MIPS port's <machine/cpu.h>.
|
| 1.53 | 04-Sep-2001 |
simonb | Centralise struct cpu_info declaration and related info to <mips/cpu.h>.
|
| 1.52 | 14-Jun-2001 |
thorpej | branches: 1.52.2;
Don't need to prototype child_return() here, it's in <sys/proc.h>.
|
| 1.51 | 11-Jun-2001 |
wiz | Fix various misspellings of compatible/compatibility.
|
| 1.50 | 14-Jan-2001 |
thorpej | branches: 1.50.2;
Make the astpending flag per-process.
|
| 1.49 | 14-Jan-2001 |
thorpej | - Make ast() loop around astpending; it's possible for a new
AST to be posted when delivering signals, or after a process
is preempted.
- Move all signal posting to ast(). userret() is now a one-liner.
|
| 1.48 | 11-Jan-2001 |
thorpej | Mmm, dependency problems. Add a cast to make PROC_PC() actually
work.
|
| 1.47 | 11-Jan-2001 |
thorpej | Modeled after mycroft's changes to the Alpha port, add PROC_PC() to
get profiling out of userret(), and move the preemption check to ast().
|
| 1.46 | 05-Oct-2000 |
cgd | always have to declare cpu_arch and the related constants (since setting
it isn't conditionalized). (d'oh!)
|
| 1.45 | 05-Oct-2000 |
cgd | tweak cpu_arch. Eliminate all direct checks of it (making them
use the macro CPUISMIPS3 -- which is badly misnamed), and set it
from #defines named CPU_ARCH_N (where N is 1..5, 32, 64).
|
| 1.44 | 25-Aug-2000 |
thorpej | Make need_resched() take a "struct cpu_info *" argument. This
causes gives a primitive form of processor affinity. Its use in
roundrobin() still needs some work.
|
| 1.43 | 13-Jul-2000 |
jeffs | Add comment that overriding the sysctl defines in machine/cpu.h
breaks userland binary compatiabiltiy between mips ports. Move
check down so common values are always defined here.
|
| 1.42 | 11-Jul-2000 |
jeffs | Only define machdep sysctls if CPU_MAXID is not defined by machine/cpu.h.
This lets mips ports have additional machdep sysctl. Define CPUISMIPS3
for MIPS1+MIPS2 as cpu_arch >= 3 to support mips4. Add cpu_intr()
prototype so this is defined in one place.
|
| 1.41 | 30-May-2000 |
nisimura | branches: 1.41.2;
savefpregs() and loadfpregs() are defined in mips_machdep.c
|
| 1.40 | 26-May-2000 |
thorpej | branches: 1.40.2;
First sweep at scheduler state cleanup. Collect MI scheduler
state into global and per-CPU scheduler state:
- Global state: sched_qs (run queues), sched_whichqs (bitmap
of non-empty run queues), sched_slpque (sleep queues).
NOTE: These may collectively move into a struct schedstate
at some point in the future.
- Per-CPU state, struct schedstate_percpu: spc_runtime
(time process on this CPU started running), spc_flags
(replaces struct proc's p_schedflags), and
spc_curpriority (usrpri of processes on this CPU).
- Every platform must now supply a struct cpu_info and
a curcpu() macro. Simplify existing cpu_info declarations
where appropriate.
- All references to per-CPU scheduler state now made through
curcpu(). NOTE: this will likely be adjusted in the future
after further changes to struct proc are made.
Tested on i386 and Alpha. Changes are mostly mechanical, but apologies
in advance if it doesn't compile on a particular platform.
|
| 1.39 | 15-Apr-2000 |
soda | remove following symbols which became unnecessary in recent cpu_intr() change:
mips_hardware_intr
MIPS3_INTERNAL_TIMER_INTERRUPT
mips3_intr_cycle_count
mips3_timer_delta
|
| 1.38 | 11-Apr-2000 |
nisimura | Introduce cpu_intr() whose body is now provided by target ports in
their own ways. Ugly fixup #define in machine/intr.h have gone.
mips_hardware_intr global variable patch work has gone.
|
| 1.37 | 28-Mar-2000 |
simonb | Move fpcurproc declaration to <mips/cpu.h>.
|
| 1.36 | 24-Mar-2000 |
soren | Revert previous.
|
| 1.35 | 24-Mar-2000 |
soren | Move sysctl definitions from arch/mips to arch/foo.
|
| 1.34 | 07-Mar-2000 |
soren | Garbage collect MIPS_SR_INT_ENAB/MIPS_SR_INT_ENA_CUR definitions.
|
| 1.33 | 09-Jan-2000 |
simonb | Use the badaddr() prototype in mips/include/cpu.h by including
<machine/cpu.h> in mips/include/mips_param.h. Remove duplicate
badaddr() prototypes from some pmax header files.
|
| 1.32 | 10-Aug-1999 |
thorpej | branches: 1.32.2;
Define cpu_number() as discussed on tech-smp.
|
| 1.31 | 20-May-1999 |
lukem | * convert to using MI allocsys(). most ports were using an MD allocsys(),
although a couple still used the old pre-4.4-lite (?) mechanism.
* use format_bytes() to format the various printf()s that print out memory sizes
|
| 1.30 | 18-May-1999 |
nisimura | - Move MachSetPID(1) call to pmap_bootstrap() adajacent to kernel pmap
initialization code.
- Abandon mips_init_proc0() and do the 4 lines straightly in MD mach_init().
- Restore a block of code accidentally lost in prevous commit.
- Change the term 'tlbpid' to a MIPS3 nomenclature 'asid'.
- Hide PTE size exposures by symbolic names in locore.S
|
| 1.29 | 23-Mar-1999 |
simonb | branches: 1.29.4;
Add CPU_BOOTED_KERNEL to CTL_MACHDEP definition.
|
| 1.28 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.27 | 11-Nov-1998 |
thorpej | Changes to support fork_kthread():
- cpu_set_kpc() now takes void *arg third argument, passed to the
entry point.
- cpu_fork() allows parent to be non-curproc iff parent is proc0.
When forking non-curproc, assume its state has already been saved.
- Adjust various pieces of machine-dependent code to account of all of this.
|
| 1.26 | 28-Oct-1998 |
jonathan | Add `struct proc;' to keep egcs warnings happy in userland.
XXX why are kernel prototypes visible here at all?
|
| 1.25 | 11-Sep-1998 |
jonathan | branches: 1.25.2;
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.24 | 25-Feb-1998 |
thorpej | Prototype allocsys(), mips_init_msgbuf(), and mips_init_proc0().
|
| 1.23 | 19-Feb-1998 |
thorpej | Prototype dumpsys() and savectx().
|
| 1.22 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.21 | 21-Jun-1997 |
jonathan | More mips1/mips3 changes to cpuregs.h and psl.h:
* cpuregs.h:
Delete unused VMMACH_ names (e.g., duplicates of PTE bits in pte.h).
Change remaining VMMACH_xxx names to MIPS1_xxx or MIPS3_xx.
Fold remaining compile-time definitions into a single #ifdef MIPS3.
* Use MIPS1_ names in locore_r2000.S, mips3_ names in locore_r4000.S
* Garbage-collect MachHitFlushDCache()
* psl.h:
use MIPS1_, MIPS3_ symbolic names for Cause register bits.
change _R3K to MIPS1_, _R4K to MIPS3. Conditionalize for mips1 only,
mips3 only, or when both are defined, use runtime CPUISMIPS3 test.
|
| 1.20 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.19 | 16-Jun-1997 |
jonathan | Garbage-collect redundant declarations:
mips/include/locore.h:
Add prototypes for HitFlushDCache() functions. Moe cpu_prid definition here.
mips/include/cpu.h:
remove cpu_prid definition.
pmax/pmax/machdep.c:
remove local protoypes of HitFlushDCache() functions.
mips/mips/vm_machdep.c, mips/mips/vm_machdep.c::
remove local protoypes of HitFlushDCache() functions.
|
| 1.18 | 16-Jun-1997 |
jonathan | Yet more merging:
* Move declaration of locore communcation variables (CPU family,
cache sizes, etc) to mips/include/locore.h. Delete from
pmax/include/cpu.h and older versions from pica/include/cpu.h.
* Move definitions of CLKF_BASEPRI, CLKF_USERMODE to mips/include/cpu.
* Delete duplicate definitions in pica/include/cpu.h, pmax/include/cpu.h.
|
| 1.17 | 16-Jun-1997 |
jonathan | Garbage-collect #include <machine/machConst.h>.
|
| 1.16 | 15-Jun-1997 |
mhitch | From Toru Nishimura: _FORKBRAINDAMAGE is gone, user process entered through
proc_trampoline().
|
| 1.15 | 23-Mar-1996 |
jonathan | fix case typo: CLKF_BASEPRI_R4k to _R4K
|
| 1.14 | 23-Mar-1996 |
jonathan | Factor out r3000 versus r4000 differences (CLKF_USERMODE() and CLKF_BASEPRI()),
provide r3k and r4k versions of each, and move to sys/arch/mips/include.
Note in comments where each mips-based port should provide
definitions in its own cpu.h after including this file.
|
| 1.13 | 19-Mar-1996 |
jonathan | Add additional mips CPU and FPU ids from Pica port:
IDT r3081 family, r4600, MIPS-IV architecture, others.
|
| 1.12 | 28-Jun-1995 |
cgd | remove unused cpu_exec() definitions. moved "broken swap" markers, for
ports that still need it, to types.h.
|
| 1.11 | 05-May-1995 |
cgd | define BROKEN_SWAP and/or cpu_swapout as appropriate.
|
| 1.10 | 22-Apr-1995 |
christos | - added sunos_machdep.c for sun3, atari, amiga and mac68k.
- changed machdep.c and trap.c to use struct emul.
- remove ep_setup references.
- added struct emul to all emulations.
|
| 1.9 | 28-Mar-1995 |
jtc | KERNEL -> _KERNEL
|
| 1.8 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.7 | 02-Jun-1994 |
glass | fix a few integration bugs, add vmfault debugging, more ultrix stuff
|
| 1.6 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.5 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.4 | 15-Jan-1994 |
deraadt | intrframe -> clockframe
|
| 1.3 | 14-Jan-1994 |
deraadt | some pmax updating (Terry Friedrichsen is helping on this now).
|
| 1.2 | 15-Oct-1993 |
deraadt | update from rick, tarfile of Oct 11 10:46
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.25.2.4 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.25.2.3 | 14-Nov-1998 |
drochner | fix egcs warnings
kdbpeek() prototype cleanup, ala PR port-mips/5252
|
| 1.25.2.2 | 30-Oct-1998 |
nisimura | - Make pm.c monochrome-aware and compilable with UVM.
- Make trap.c compilable with UVM.
- Place #ifdef _KERNEL guard in cpu.h
- Make asm.h more MIPS standard-alike while retaining current definitions.
|
| 1.25.2.1 | 15-Oct-1998 |
nisimura | - cpuregs.h was modifed a bit, then renamed with cpuarch.h.
- mips_cpu.h has gone.
- CPU's register mnemonics in regdef.h is now a part of asm.h.
|
| 1.29.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.32.2.2 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.32.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.40.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.41.2.1 | 19-Jul-2000 |
jeffs | Pull up cpu_intr() prototype + platform dependent machdeps.
(approved by thorepj).
|
| 1.50.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.52.2.5 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.52.2.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.52.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.52.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.52.2.1 | 13-Sep-2001 |
thorpej | Update the kqueue branch to HEAD.
|
| 1.56.2.1 | 11-Nov-2001 |
shin | delete obsolete variables.
mips_L2CacheSize
mips_L2CacheIsSnooping
mips_L2CacheMixed
|
| 1.57.2.13 | 19-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.57.2.12 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.57.2.11 | 13-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.57.2.10 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.57.2.9 | 02-Jul-2002 |
nathanw | Whitespace.
|
| 1.57.2.8 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.57.2.7 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.57.2.6 | 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.57.2.5 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.57.2.4 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.57.2.3 | 08-Dec-2001 |
thorpej | Add a cpu_proc_fork(), called from uvm_proc_fork(), which takes care
of machine-dependent handling a fork() time (this is different from
forking the actual context in an LWP world). #define it away on
platforms which do not need it.
Problem noted by Gregory McGarry.
|
| 1.57.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.57.2.1 | 14-Nov-2001 |
wdk | file cpu.h was added on branch nathanw_sa on 2001-11-17 23:43:41 +0000
|
| 1.62.2.3 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.62.2.2 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.62.2.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.70.2.5 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.70.2.4 | 24-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.70.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.70.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.70.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.73.18.1 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1259):
sys/arch/mips/mips/fp.S: revision 1.30
sys/arch/mips/include/cpu.h: revision 1.77
include/cpu.h: make sure MIPS3_PLUS properly defined even if _LOCORE is defined
mips/fp.S: include <mips/cpu.h> for #ifdef MIPS3_PLUS
Closes PR port-mips/27298.
|
| 1.73.12.7 | 17-Mar-2008 |
yamt | sync with head.
|
| 1.73.12.6 | 21-Jan-2008 |
yamt | sync with head
|
| 1.73.12.5 | 07-Dec-2007 |
yamt | sync with head
|
| 1.73.12.4 | 27-Oct-2007 |
yamt | sync with head.
|
| 1.73.12.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.73.12.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.73.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.73.10.1 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1259):
sys/arch/mips/mips/fp.S: revision 1.30
sys/arch/mips/include/cpu.h: revision 1.77
include/cpu.h: make sure MIPS3_PLUS properly defined even if _LOCORE is defined
mips/fp.S: include <mips/cpu.h> for #ifdef MIPS3_PLUS
Closes PR port-mips/27298.
|
| 1.76.12.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.76.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.76.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.76.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.76.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.77.8.2 | 11-Jan-2007 |
ad | Checkpoint work in progress.
|
| 1.77.8.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.80.2.3 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.80.2.2 | 21-Mar-2007 |
ad | Initial changes for MIPS. Not yet working under gxemul.
|
| 1.80.2.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.81.12.2 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.81.12.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.81.6.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.81.4.3 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.81.4.2 | 15-Jul-2007 |
ad | Get pmax working.
|
| 1.81.4.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.82.8.3 | 09-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.82.8.2 | 26-Oct-2007 |
joerg | Sync with HEAD.
Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.
|
| 1.82.8.1 | 04-Aug-2007 |
jmcneill | Sync with HEAD.
|
| 1.82.4.1 | 15-Aug-2007 |
skrll | Sync with HEAD.
|
| 1.82.2.2 | 07-Aug-2007 |
matt | Sync with HEAD.
|
| 1.82.2.1 | 18-Jul-2007 |
matt | Make sure to copy p_md in cpu_proc_fork. Generate an error if MULTIPROCESSOR
is defined.
|
| 1.83.6.1 | 25-Oct-2007 |
bouyer | Sync with HEAD.
|
| 1.83.2.3 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.83.2.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.83.2.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.85.2.2 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.85.2.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.86.2.1 | 08-Dec-2007 |
ad | Sync with head.
|
| 1.87.4.1 | 10-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.88.6.2 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.88.6.1 | 03-Apr-2008 |
mjf | Sync with HEAD.
|
| 1.88.2.1 | 24-Mar-2008 |
keiichi | sync with head.
|
| 1.89.6.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.89.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.89.4.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.89.2.1 | 04-Jun-2008 |
yamt | sync with head
|
| 1.90.16.46 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.90.16.45 | 09-Jul-2012 |
matt | Use a spinlock to protect the segtab queues. Use union pmap_segmap and
pmap_segmap_t to track -HEAD. Use KERNEL_PID for the same reason.
|
| 1.90.16.44 | 27-Feb-2012 |
matt | Count all traps types.
|
| 1.90.16.43 | 13-Feb-2012 |
matt | Add mm_md_direct_mapped_virt (inverse of mm_md_direct_mapped_phys). Add a
third argument, vsize_t *, which, if not NULL, returns the amount of virtual
space left in that direct mapped segment.
Get rid most of the individual direct_mapped assert and use the above
routines instead.
Improve kernel core dump code.
|
| 1.90.16.42 | 13-Feb-2012 |
matt | Fix emulation to not panic when it encounters something it doesn't like.
(so running crashme won't crash the system).
Centralize the trapsignal processing so we can print out the trap info if
so desired.
Add a machdep.printfataltraps sysctl knob.
|
| 1.90.16.41 | 28-Jan-2012 |
matt | Add mm_md_direct_mapped_phys from current.
|
| 1.90.16.40 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.90.16.39 | 23-Dec-2011 |
matt | Make CPUISMIPS3 deal with MIPS32R2 and MIPS64R2
Add mips_num_tlb_asids.
Allow a caller to cpu_identify to supply a cpuname (or NULL).
|
| 1.90.16.38 | 03-Dec-2011 |
matt | Rework things a bit for the XLR/XLS/XLP TLB. Before dealing with the TLB when
MP on the XL?, disable interrupts and take out a lock to prevent concurrent
updates to the TLB. In the TLB miss and invalid exception handlers, if the
lock is already owned by another CPU, simply return from the exception and
let it continue or restart as appropriate. This prevents concurrent TLB
exceptions in multiple threads from possibly updating the TLB multiple times
for a single address.
|
| 1.90.16.37 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.90.16.36 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.90.16.35 | 08-Feb-2011 |
cliff | - fix cpu_number() define for non- MULTIPROCESSOR case
|
| 1.90.16.34 | 08-Feb-2011 |
cliff | - re-define cpu_number() to now mean ci_index instead of ci_cpuid
- re-define CPU_IS_PRIMARY() to use CPUF_PRIMARY instead of ci_cpuid
|
| 1.90.16.33 | 05-Feb-2011 |
cliff | - include cpuset.h, we're using CPUSET_* macros now for cpus_running, cpus_paused, etc.
those data are now type mips_cpuset_t.
- move opt_* includes up above sys/* includes
- add declarations for IPI broadcast, multicast functions
- add declarations for cpu halt, pause, resume, etc functions useful for ddb
|
| 1.90.16.32 | 01-Sep-2010 |
matt | Fill cpu_data cpu_{node,core,smt}_id for RMI.
|
| 1.90.16.31 | 18-Aug-2010 |
matt | *** empty log message ***
|
| 1.90.16.30 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.90.16.29 | 09-Jun-2010 |
matt | Add support for setting/clearing PK_32 on _LP64 kernels. Make cpu_proc_fork
a real function and add it to vm_machdep.c and let it copy PK_32 on fork.
Properly clear/set PK_32 depending on ABI in setregs. Lack of PX_32 use
tracked down by Cliff Neighbors. [Ya! ps now works!]
|
| 1.90.16.28 | 21-Mar-2010 |
cliff | - add ci_next_cp0_clk_intr, ci_count_compare_evcnt, ci_count_compare_missed_evcnt
to struct cpu_info, for per-CPU count/compare clock programming
- add ci_request_ipis to struct cpu_info to allow passing IPI tags
on systems where hardware does not provide such feature; use atomic ops for this.
- declaration of mips_vector_init was moved from here to mips/include/locore.h
|
| 1.90.16.27 | 11-Mar-2010 |
matt | Add MP-aware icache support.
|
| 1.90.16.26 | 11-Mar-2010 |
matt | Add ci_softc member to cpu_info.
|
| 1.90.16.25 | 01-Mar-2010 |
matt | Add secondary processor spinup support (cpu_trampoline is in locore_mips3.S).
Nuke lse_boot_secondary_processors (not needed).
Move cpu_info_store to cpu_subr.C
|
| 1.90.16.24 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.90.16.23 | 27-Feb-2010 |
matt | Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
|
| 1.90.16.22 | 25-Feb-2010 |
matt | Remove ci_curpm since it isn't used.
|
| 1.90.16.21 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.90.16.20 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.90.16.19 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.90.16.18 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.90.16.17 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.90.16.16 | 30-Jan-2010 |
matt | Change MIPS_CURLWP from s7 to t8. In a MALTA64 kernel, s6 is used 9155 times
which means the compiler could really use s7 is was free to do so. The least
used temporary was t8 (288 times). Once the kernel was switched to use t8 for
MIPS_CURLWP, s7 was used 7524 times.
Additionally a MALTA32 kernel shrunk by 6205 instructions (24820 bytes) or
about 1% of its text size.
[For some reason, pre-change t1 was never used and post change t2 was never
used. Not sure why.]
|
| 1.90.16.15 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.90.16.14 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.90.16.13 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.90.16.12 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.90.16.11 | 14-Jan-2010 |
matt | More fixes for the CFATTAL_DECL_NEW changes and rmixl cpucore/cpu changes.
|
| 1.90.16.10 | 13-Jan-2010 |
cliff | - cpu_identify() now gets device_t arg
- add CIDFL's for RMI L2, cores, threads attributes
|
| 1.90.16.9 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.90.16.8 | 23-Nov-2009 |
cliff | fix types in struct clockframe and args to cpu_intr
to be corect for 32 or 64 bit kernel
|
| 1.90.16.7 | 15-Nov-2009 |
matt | Fix typo.
|
| 1.90.16.6 | 14-Nov-2009 |
matt | switch from fu*/su* to ufetch_*/ustore_*.
|
| 1.90.16.5 | 13-Nov-2009 |
cliff | - struct pridtab definition is moved here from mips_machdep.c
- 'mycpu' is now global (was static); uh, a name change might be nice?
- new bit for cpu_flags 'CPU_MIPS_HAVE_MxCR' denotes
mfcr, mtcr instructions are available on this CPU
- new field 'cpu_cp0flags' in pridtab tracks whether (some) CP0 regs exist
- define bits in cpu_cp0flags, including a "USE" bit that,
if clear means cpu_cp0flags can be ignored. common CP0 regs do not
need to be represented here, only newer optional ones are.
- new field 'cpu_cidflags' in pridtab allows defining company-specific flags
- some RMI company specific flags are defined to track chip family
|
| 1.90.16.4 | 15-Sep-2009 |
matt | Define MIPS_HAS_LLADDR everywhere it should be.
|
| 1.90.16.3 | 15-Sep-2009 |
matt | Add a CPU_MIPS_NO_LLADDR flag / MIPS_HAS_LLADDR macro. And use to determine
whether to printf lladdr COP0 register
|
| 1.90.16.2 | 08-Sep-2009 |
matt | Add and optimize MIPS_PHYS_TO_XKPHYS_{UN,}CACHED(pa).
Treat like mips3_pg_cached: add mips3_xkphys_cached which contains the
starting address of the cached XKPHYS region. It also respects SPECIAL_CCA.
|
| 1.90.16.1 | 21-Aug-2009 |
matt | Make cpu_proc_fork copy the abi from process to process.
|
| 1.95.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.95.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.95.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.96.4.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.96.4.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.96.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.106.12.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.106.12.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.106.12.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.106.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.107.6.1 | 18-May-2014 |
rmind | sync with head
|
| 1.109.6.4 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.109.6.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.109.6.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.109.6.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.119.2.2 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.119.2.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.121.8.1 | 26-Feb-2018 |
snj | Pull up following revision(s) (requested by skrll in ticket #566):
sys/arch/arm/include/cpu.h: 1.94
sys/arch/mips/include/cpu.h: 1.122
sys/arch/powerpc/include/cpu.h: 1.103
sys/sys/cpu.h: 1.42
CPU_INFO_FOREACH() must always iterate at least the boot cpu.
document this in sys/cpu.h and fix the arm and mips versions
to check ncpu is non zero before using it as an iterator max.
this should fix the new assert in init_main.c.
--
apply the same change for powerpc as mrg did for arm and mips:
CPU_INFO_FOREACH() must always iterate at least the boot cpu.
document this in sys/cpu.h and fix the arm and mips versions
to check ncpu is non zero before using it as an iterator max.
this should fix the new assert in init_main.c.
|
| 1.123.2.3 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
|
| 1.123.2.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.123.2.1 | 15-Mar-2018 |
pgoyette | Synch with HEAD
|
| 1.124.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.124.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.131.4.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.131.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.6 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.5 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.4 | 20-Feb-2011 |
matt | branches: 1.4.14; 1.4.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.3 | 16-Feb-2006 |
perry | branches: 1.3.90; 1.3.94; 1.3.100; 1.3.102;
Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.
As per core@.
|
| 1.2 | 24-Dec-2005 |
perry | branches: 1.2.2; 1.2.4; 1.2.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.1 | 05-Feb-2003 |
nakayama | Replace machine/rnd.h with more appropriate name to share it
with cycle counter based microtime in kern/kern_microtime.c.
|
| 1.2.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.3.102.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.100.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.94.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.90.2 | 22-Feb-2010 |
matt | Don't include <mips/locore.h>. Rely on the weak alias in locore_mips3.S
|
| 1.3.90.1 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.4.32.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.4.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3 | 16-Jan-1999 |
nisimura | - Update 'cpuregs.h' and decline 'cpuarch.h'.
|
| 1.2 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.1 | 15-Oct-1998 |
nisimura | branches: 1.1.2;
file cpuarch.h was initially added on branch nisimura-pmax-wscons.
|
| 1.1.2.3 | 19-Nov-1998 |
nisimura | - Forgot to commit most important changes.
|
| 1.1.2.2 | 30-Oct-1998 |
nisimura | - Make pm.c monochrome-aware and compilable with UVM.
- Make trap.c compilable with UVM.
- Place #ifdef _KERNEL guard in cpu.h
- Make asm.h more MIPS standard-alike while retaining current definitions.
|
| 1.1.2.1 | 15-Oct-1998 |
nisimura | - cpuregs.h was modifed a bit, then renamed with cpuarch.h.
- mips_cpu.h has gone.
- CPU's register mnemonics in regdef.h is now a part of asm.h.
|
| 1.116 | 16-Nov-2021 |
simonb | Use the architecture documented name ULR for the RDHWR user local
register.
|
| 1.115 | 16-Nov-2021 |
simonb | Add some comments for the RDHWR register numbers.
|
| 1.114 | 16-Nov-2021 |
simonb | Only need one #define for MIPS_HWR_CPUNUM.
|
| 1.113 | 01-Nov-2021 |
andvar | fix typos, mainly in words minimum and maximum, but also few others.
|
| 1.112 | 09-Aug-2021 |
andvar | s/definitons/definitions/
|
| 1.111 | 29-May-2021 |
simonb | Update the FPU register names and bit definitions to something somewhat
modern (MIPS32/MIPS64) and convert to __BIT/__BITS.
|
| 1.110 | 17-Mar-2021 |
simonb | branches: 1.110.4; 1.110.6;
Handle gas/gcc generating a break/trap 6 for integer overflow and
break/trap 7 for integer divide by zero and setting the SIGFPE
si_code of FPE_INTOVF or FPE_INTDIV respectively. The break/trap
6/7 seems to have existed since the early days of MIPS but not
well documented anywhere.
Fixes ATF lib/libc/gen/t_siginfo::sigfpe_int .
|
| 1.109 | 22-Aug-2020 |
simonb | branches: 1.109.2;
Remove bogus duplicate MIPS_COP_0_CONTEXT definition, it's not a MIPS32/64
specific reg and we already define MIPS_COP_0_TLB_CONTEXT elsewhere.
|
| 1.108 | 02-Aug-2020 |
simonb | Add a few more perfcnt CP0 registers.
|
| 1.107 | 31-Jul-2020 |
simonb | Add two cnMIPS III COP0 register names.
|
| 1.106 | 29-Jul-2020 |
simonb | Add definitions for the CP0 WatchLo/WatchHi registers.
|
| 1.105 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.104 | 26-Jul-2020 |
simonb | Add CP0 Config Registers 6 and 7.
|
| 1.103 | 26-Jul-2020 |
simonb | Remove mostly duplicate MIPS spec CP0 regs from octeon_corereg.h, move
the Cavium specific CP0 regs to <mips/cpuregs.h> as done for other core
specific regs.
|
| 1.102 | 20-Jul-2020 |
simonb | Expose the width of the MIPS_EBASE_CPUNUM bitfield for asm code.
|
| 1.101 | 20-Jul-2020 |
simonb | Add an extra bitfield in MIPS_COP_0_EBASE.
|
| 1.100 | 13-Jul-2020 |
simonb | Remove a magic number.
|
| 1.99 | 24-May-2020 |
simonb | Add mipsNN_cp0_rdhwr_cpunum() which returns the current CPU number
read from the CPUNum hardware register on MIPS{32,64}R2.
|
| 1.98 | 23-May-2020 |
simonb | Add CX73xx and CXF75xx Cavium Octeon PRIDs.
|
| 1.97 | 07-May-2020 |
simonb | Add PRID definition for newer SiByte SB1 cores (rev 0x11).
Add a constant for SiByte/BCRM cacheable coherent TLB cache attribute.
|
| 1.96 | 07-May-2017 |
skrll | Trailing whitespace
|
| 1.95 | 11-Jul-2016 |
matt | branches: 1.95.8;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.94 | 11-Jun-2015 |
matt | Add a few MIPS32 R3 bits
|
| 1.93 | 10-Jun-2015 |
matt | Add MIPS 1074K
|
| 1.92 | 07-Jun-2015 |
matt | Define COP0 register that use select value in <mips/cpuregs.h>
Use those new definitions
|
| 1.91 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.90 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.89 | 22-Nov-2014 |
macallan | branches: 1.89.2;
deal with Ingenic XBurst CPUs
|
| 1.88 | 29-Oct-2011 |
jakllsch | branches: 1.88.12;
Add Broadcom BCM3302 CPU to the table.
|
| 1.87 | 22-Sep-2011 |
macallan | support BUS_SPACE_MAP_PREFETCH in order to allow mapping device memory and
DMA buffers with cacheing disabled but things like write combining, relaxed
ordering etc. allowed when the CPU supports it
so far enabled only on Loongson, should work on R1xk and probably newer CPUs
|
| 1.86 | 27-Aug-2011 |
bouyer | loongson2f support:
- Add some loongson2 definitions to cpuregs.h, from OpenBSD
- Make sure that the at register is useable before every jump register
instruction (exept when register is k0 or k1) because -mfix-loongson2f-btb
needs the at register for its workaround
- add code to mips_fixup.c to handle the instructions added by
-mfix-loongson2f-btb
- Add a ls2-specific tlb miss handler: it doesn't have separate handler
for the xtlbmiss exeption.
- Fixes for some #ifdef MIPS3_LOONGSON2 assembly code (using the wrong
register)
|
| 1.85 | 02-Aug-2011 |
matt | Add Loongson2 DIAG register definitions (partial)
|
| 1.84 | 31-Jul-2011 |
matt | Add define for loongson2 DIAG register
|
| 1.83 | 06-Apr-2011 |
matt | Fix some comments.
|
| 1.82 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.81 | 03-Mar-2011 |
matt | Change MIPS_CP0FL_CONFIG*
Add MIPS_CP0FL_HWRENA and USERLOCAL
|
| 1.80 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.79 | 26-Jan-2011 |
pooka | Add support for the Extensible MIPS ("eMIPS") platform. The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.
eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing. eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.
NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman. Microsoft Corporation has
donated full copyright to The NetBSD Foundation.
Platform support for eMIPS is the first part of Microsoft's
contribution. The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.
|
| 1.78 | 27-Feb-2010 |
snj | branches: 1.78.2; 1.78.4; 1.78.6;
Spell "exception" properly.
|
| 1.77 | 14-Dec-2009 |
matt | branches: 1.77.2;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.76 | 06-Aug-2009 |
matt | LOONGSON2 is a MIPS III
|
| 1.75 | 01-Aug-2009 |
matt | Add Loongson2 chip ids
|
| 1.74 | 19-Feb-2008 |
simonb | branches: 1.74.10; 1.74.28;
Add PrID's for MIPS's 24K, 24KE, 34K and 74K cores.
From Alexander Voropay in mail to port-mips@.
|
| 1.73 | 17-Oct-2007 |
garbled | Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.72 | 16-Oct-2007 |
simonb | Recognise the R2000A cpu as found in some pmaxen.
From Dennis Grevenstein on port-pmax@.
|
| 1.71 | 26-Aug-2006 |
matt | branches: 1.71.6; 1.71.12; 1.71.20; 1.71.22; 1.71.30; 1.71.32; 1.71.34;
Don't cast pointers using unsigned and/or int. Use intptr_t or uintptr_t
as appropriate.
|
| 1.70 | 15-May-2006 |
simonb | Fix typo in MIPS3_SR_EIE.
From Anders Gavare.
|
| 1.69 | 20-Dec-2005 |
tron | branches: 1.69.4; 1.69.6; 1.69.8; 1.69.12;
Add basic support for Alchemy Au1550 processor (CPU and devices).
Patch contributed by Garrett D'Amore in PR port-evbmips/32030.
|
| 1.68 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.67 | 05-Nov-2005 |
tsutsui | Remove unused and incorrect MIPS_KSEG2_TO_PHYS() and MIPS_PHYS_TO_KSEG2()
macro.
|
| 1.66 | 04-Nov-2005 |
tsutsui | Check MIPS3_CONFIG_CS and adjust csizebase at runtime on MIPS_R4100 CPUs,
and remove "XXXCDC: THIS MIPS3_4100 SPECIAL CASE SHOULD GO AWAY" part
from cpuregs.h. Tested on gxemul.
BTW, cache.c doesn't have MIPS_RC32364 config which was added
in mips_machdep.c rev 1.101?
|
| 1.65 | 29-Oct-2003 |
simonb | branches: 1.65.14; 1.65.16;
Add some more MTI CPU ids.
|
| 1.64 | 28-Sep-2003 |
tsutsui | - Add MIPS_KSEG2_TO_PHYS() and MIPS_PHYS_TO_KSEG2() macro.
- Add definitions of the MIPS4 config register.
From Christopher SEKIYA.
|
| 1.63 | 28-Sep-2003 |
tsutsui | Add another R4000 CPU revision ID. From Christopher SEKIYA.
|
| 1.62 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.61 | 10-Jun-2003 |
simonb | branches: 1.61.2;
Change MIPS3_SR_FR_32 to MIPS3_SR_FR. Both the old R4000 manual and the
current MIPS64 manuals don't use the "32" in the bit name.
|
| 1.60 | 09-Jun-2003 |
simonb | Remove definitions and usage of MIPS_COP_0_STATUS_REG and
MIPS_COP_0_CAUSE_REG - use MIPS_COP_0_STATUS and MIPS_COP_0_CAUSE
instead.
|
| 1.59 | 10-Jan-2003 |
rafal | Add the MIPS3_CONFIG_SE (name taken from Rm52xx manual) bit, which is the
external cache enable bit -- this allows software to enable or disable the
(external) L2 cache on the R5k and Rm527x and the (external) L3 cache on
the Rm7k. If the (external) cache is disabled, treat it as if there were
no cache for the purposes of the cache setup code.
Also, update sgimips code to use the new name.
|
| 1.58 | 15-Nov-2002 |
simonb | Define COP0_HAZARD_FPUENABLE as four nops.
Include <mips/sb1regs.h> if MIPS64_SB1 is defined.
|
| 1.57 | 03-Nov-2002 |
nisimura | Add two PRiD values.
- 0x55 for NEC Vr5500. ISA might be MIPS64.
- 0x38 for Toshiba TX79. This has thirty-two 128bit GPRs while
maintaining 32bit only virtual address space. Any of pointer related
registers have 32bit.
|
| 1.56 | 28-Aug-2002 |
simonb | Add the Toshiba TX4927 CPU.
|
| 1.55 | 26-Jul-2002 |
simonb | Add support for detecting Alchemy Semiconductor CPUs. Alchemy use the
processor ID field to donote the CPU core revision and the company
options field do donate the SOC chip type, so we need to add an extra
field to the "pridtab" structure to identify these CPUs.
|
| 1.54 | 06-Jul-2002 |
gmcgarry | Overhaul the emulation facility. We do this by:
- accumulating all emulation code (including floating-point) in one place
- steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts
and traps from *real* FPUs
- introducing MachEmulateInst() as a common dispatch point for all
emulated instructions
- cleaning up emulation dispatch in trap()
Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1.
Tested on r3k with and without SOFTFLOAT enabled.
|
| 1.53 | 27-Jun-2002 |
simonb | Add the 20Kc processor ID.
|
| 1.52 | 05-Jun-2002 |
simonb | For the CP0 status register bit definitions- add the MX, PX and NMI bits
and rename TLB_SHUTDOWN and SOFT_RESET to TS and SR (the abbreviations
in the MIPS documentation).
XXX: this file really needs to be cleaned up one day...
|
| 1.51 | 01-Jun-2002 |
simonb | Standardise on the name "MIPS_SR_BEV" instead of a couple of different
#defines for the same status bit.
|
| 1.50 | 13-Mar-2002 |
simonb | branches: 1.50.4;
Add R4400 reg 0x60 to the MIPS CPU table.
From PR port-mips/15894 from Thilo Manske.
|
| 1.49 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Add XKPHYS macros (from Broadcom Corp).
- Add some r5900 register bit definitions.
- Add extra exception vector addresses for mips32/mips64 and r5900.
- Make the mips cp0 register definitions available from both asm and C.
- Add some Alchemy and Sandcraft CPU ids.
- Add r3000, tx39xx and r4x00 CPU revision ids.
- Remove defines for the number of TLBs on some CPUs.
|
| 1.48 | 28-Dec-2001 |
shin | R4000/R4400 always detects virtual alias as if
primary cache size is 32KB. Actual primary cache size
is ignored wrt VCED/VCEI.
|
| 1.47 | 16-Oct-2001 |
uch | branches: 1.47.4;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.46 | 17-Aug-2001 |
simonb | Describe the widths of various coprocessor 0 registers (for mips1,
mips3, mips32 and mips64).
|
| 1.45 | 15-Aug-2001 |
simonb | _Never_ make a cosmetic change to a comment without test-compiling...
|
| 1.44 | 15-Aug-2001 |
simonb | Add some MIPS, Alchemy and SiByte CPU PRIDs (from oss.sgi.com).
|
| 1.43 | 31-May-2001 |
nisimura | branches: 1.43.2;
PRiD 0x18 is shared by RC32334, 332 and 355. These SoCs are
distinguished by SYSID register in the system controller. Note
that PRiD 0x20 is for a standalone RC32364 processor which has the
same 32300 core inside. Rather better to name them MIPS32 ISA.
|
| 1.42 | 30-May-2001 |
soren | Pasto.
|
| 1.41 | 30-May-2001 |
nisimura | Add PRiD 0x18 for IDT RC32332/RC32334 processors.
|
| 1.40 | 15-May-2001 |
simonb | Add the processor IDs for the 4Kc and 5Kc CPUs and some MIPS32/64
coprocessor 0 registers.
|
| 1.39 | 24-Apr-2001 |
nisimura | Add PRiD register imp value 0x2d for Toshiba TX4900 family.
|
| 1.38 | 27-Nov-2000 |
soren | branches: 1.38.2;
Correct a few cpu/fpu ids.
|
| 1.37 | 27-Nov-2000 |
nisimura | Use only one TLB entry to wire down process's USPACE since it's
now guranteed to be aligned on 8KB boundary in kernel virutal
address. Retain one more free TLB entry.
|
| 1.36 | 16-Sep-2000 |
chuck | IDT32364's Config register uses a different base for IC/DC (instruction
and data cache sizes). R4000 uses 2^(12+IC) and 2^(12+DC). IDT32364
uses 2^(9+IC) and 2^(9+DC).
abstract around the problem by making the base a parameter to the
MIPS3_CONFIG_CACHE_SIZE macro. we pass the base down from mips_vector_init
to mips3_vector_init and to mips3_ConfigCache (where it is used).
XXX: someone with an MIPS3_4100 should switch to this and get rid
of the ugly ifdefs in cpuregs.h
|
| 1.35 | 17-Jul-2000 |
jeffs | if MIPS3_ENABLE_CLOCK_INTR is defined, set MIPS3_[HARD_]INT_MASK
appropriately. This supports ports that use the internal clock.
Add 2 diag register defines that are specific to QED processors.
|
| 1.34 | 09-Jun-2000 |
soda | branches: 1.34.2;
Decrease MIPS3_TLB_WIRED_ENTRIES from 8 to 2,
and rename it to MIPS3_TLB_WIRED_UPAGES.
The value of wired register becomes variable on arc port,
and arc is the only mips3 port which uses the wired TLB entries 2..7.
|
| 1.33 | 06-Jun-2000 |
soren | Typo.
|
| 1.32 | 23-May-2000 |
soren | branches: 1.32.2;
MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,
so remove references them, and do a little other cleanup.
|
| 1.31 | 21-May-2000 |
soren | Add R12K PRID.
|
| 1.30 | 25-Mar-2000 |
nisimura | Add QED RM7000 PrID.
|
| 1.29 | 24-Mar-2000 |
soren | Remove FPU PRIDs that are identical to the CPU ones.
|
| 1.28 | 19-Mar-2000 |
soren | Updated RM5231 cache code from Jeff Smith and Ethan Solomita at Geocast.
Many thanks.
|
| 1.27 | 07-Mar-2000 |
soren | Garbage collect MIPS_SR_INT_ENAB/MIPS_SR_INT_ENA_CUR definitions.
|
| 1.26 | 27-Dec-1999 |
castor | Add macro for MIPS_PHYS_MASK and document use of bits in system status
registers.
|
| 1.25 | 22-Dec-1999 |
jun | FIX:
port-mips/9016 [serious/medium]:
MIPS FPU emulator points wrong epc on exception case
Responsible: port-mips-maintainer (NetBSD/mips Portmasters)
State: open
Class: sw-bug
Originator: Shuichiro URATA
Release: current 12/11/1999
Arrival-Date: Fri Dec 17 10:18:00 1999
commit patch
http://www.a-r.org/~ur/softfloat1211.diff.gz
by Shuichiro URATA (ur@a-r.org)
|
| 1.24 | 29-Nov-1999 |
uch | TX3912/22 support. ENABLE_MIPS_TX3900 enables it.
|
| 1.23 | 25-Sep-1999 |
shin | branches: 1.23.2; 1.23.8;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.22 | 21-May-1999 |
nisimura | - Redefine symbols and parameters to represent CPU design with MIPS
nomenclature, retaining the old heritage.
- Remove API-related definitions for now obsolete utiltity routines.
|
| 1.21 | 26-Apr-1999 |
nisimura | - MIPS processors do not impose inclusive (nesting) interrupt levels with
their interrupt lines. The notion and implemention of 'spl' are left
for how target ports approach to it.
|
| 1.20 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.19 | 23-Jan-1999 |
nisimura | branches: 1.19.4;
- Add NEC Vr5400 processor ID.
|
| 1.18 | 16-Jan-1999 |
nisimura | - Update 'cpuregs.h' and decline 'cpuarch.h'.
|
| 1.17 | 04-Dec-1998 |
nisimura | - Fix an error in primary cache line size detection logic; when IC and/or DC
bit is 1, then line size is 32. Otherwise, 16.
|
| 1.16 | 01-Oct-1998 |
jonathan | branches: 1.16.2;
More patches for ARC from Noriyuki Soda:
* commit isapnpvar.h changes required for ARC to support plain isa.
* fixup mistake over mips/include/cpuregs.h.
* mips/mips_machdep.c:
set L2 cache-size for arc, cleanup use of L2cache present
vs L2 cache-size variables. check for no L2 cache on kernels
configured to require one. misc cleanups.
* mips/mpis/trap.c: more locore stack-traceback label cleanup.
XXX Locore callbacks for mips3, mips4, r4600 cacheflush need more work.
|
| 1.15 | 11-Sep-1998 |
jonathan | Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.14 | 23-Apr-1998 |
jonathan | define mips3 COUNT and COMPARE cp0 registers (onchip cycle counter)
|
| 1.13 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.12 | 22-Jun-1997 |
jonathan | Final changes for configuring MIPS1 and MIPS3 in a single kernel.
* cpuregs.h:
rename remaining VMMACH_xxx TLB macros to MIPS_TLB_xxx.
Add compile-time MIPS3-only, compile-time MIPS1-only, and
runtime (both) definitions for number of TLB ASIDs (tlb pids)
and shift count to extract a TLB pid.
* locore.h:
Delete unused vector slot for indexed TLB writes.
mips1 and mips3 TLBs are different enough that we have
to break them out at the caller anyway.
* Add compile-time MIPS3-only andcompile-time MIPS1-only
macros to call locore functions directly by name.
Use the existing method table only if
* mips/mips_machdep.c, mips/trap.c, mips/pmap.c, pmax/machdep.c:
Use MIPS3_ or MIPS1_ specific names for TLB pids in
mips3 and mips1 specific code paths (e.g., creating the kernel stack
for process 0).
Add `options MIPS3' to pmax/conf/GENERIC.
|
| 1.11 | 21-Jun-1997 |
jonathan | More mips1/mips3 changes to cpuregs.h and psl.h:
* cpuregs.h:
Delete unused VMMACH_ names (e.g., duplicates of PTE bits in pte.h).
Change remaining VMMACH_xxx names to MIPS1_xxx or MIPS3_xx.
Fold remaining compile-time definitions into a single #ifdef MIPS3.
* Use MIPS1_ names in locore_r2000.S, mips3_ names in locore_r4000.S
* Garbage-collect MachHitFlushDCache()
* psl.h:
use MIPS1_, MIPS3_ symbolic names for Cause register bits.
change _R3K to MIPS1_, _R4K to MIPS3. Conditionalize for mips1 only,
mips3 only, or when both are defined, use runtime CPUISMIPS3 test.
|
| 1.10 | 16-Jun-1997 |
jonathan | Fix idempotent inclusion test macro: _MACHCONST -> _MIPS_CPUREGS_H_
to avoid collision with obsolete Sprite-derived NetBSD/pica header file.
|
| 1.9 | 16-Jun-1997 |
jonathan | Garbage-collect MIPS_3K_xxx, MIPS_4K_xxx outidde mips/include/cpuregs.h:
MIPS_3K_xxx -> MIPS1_xxx
MIPS_4K_xxx -> MIPS3_xxx
|
| 1.8 | 15-Jun-1997 |
mhitch | More merged MIPS1/MIPS3 support: still only allows single-architecture
support.
|
| 1.7 | 19-May-1997 |
jonathan | Fix typo.
|
| 1.6 | 18-May-1997 |
jonathan | Add defines for increasing SPL levels, assuming devices are wired up
in to CPU interrupt pins in order of increasing priority.
|
| 1.5 | 28-Mar-1996 |
jonathan | Resolve all differences between the Pica and pmax versions of machConst.h:
* add "MIPS_3k_" for the MIPS-I r[23]000-specific register definitions.
* add "MIPS_4k_" for the MIPS-II/III r4000-specific register definitions.
* add #defines that provide the old values for locore and user
code, so the existing code continues to compile.
Regression-tested against the old headers by grepping for #define's,
editing out the defined symbols, and preprocessing with both the previous
machConst.h headers and this version.
Some unused symbols (CPU and FPU must-be-zero constants) are no longer defined.
Pica interrupt masks are now constant expressions instead of constant
values.
TODO:
* factor out the common #defines into src/sys/arch/mips.
* Get rid of the Sprite coding-style names (MACH_xxx).
* Separate out the r3k/r4k differences from the Pica/pmax differences.
* Figure out how to have a run-time choice of r3k vs. r4k support,
instead of a compile-time choice.
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.16.2.1 | 15-Oct-1998 |
nisimura | - cpuregs.h was modifed a bit, then renamed with cpuarch.h.
- mips_cpu.h has gone.
- CPU's register mnemonics in regdef.h is now a part of asm.h.
|
| 1.19.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.23.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.23.2.2 | 08-Dec-2000 |
bouyer | Sync with HEAD.
|
| 1.23.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.32.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.34.2.1 | 19-Jul-2000 |
jeffs | Pull up revision 1.35 (approved by thorpej):
if MIPS3_ENABLE_CLOCK_INTR is defined, set MIPS3_[HARD_]INT_MASK
appropriately. This supports ports that use the internal clock.
Add 2 diag register defines that are specific to QED processors.
|
| 1.38.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.43.2.5 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.43.2.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.43.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.43.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.43.2.1 | 25-Aug-2001 |
thorpej | Merge Aug 24 -current into the kqueue branch.
|
| 1.47.4.9 | 15-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.47.4.8 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.47.4.7 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.47.4.6 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.47.4.5 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.47.4.4 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.47.4.3 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.47.4.2 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.47.4.1 | 16-Oct-2001 |
nathanw | file cpuregs.h was added on branch nathanw_sa on 2002-01-08 00:26:16 +0000
|
| 1.50.4.3 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.50.4.2 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.50.4.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.61.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.61.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.61.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.61.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.65.16.4 | 27-Feb-2008 |
yamt | sync with head.
|
| 1.65.16.3 | 27-Oct-2007 |
yamt | sync with head.
|
| 1.65.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.65.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.65.14.1 | 19-Nov-2007 |
bouyer | Pull up following revision(s) (requested by simonb in ticket #1865):
sys/arch/mips/include/cpuregs.h: revision 1.72
sys/arch/mips/mips/mips_machdep.c: revision 1.195
Recognise the R2000A cpu as found in some pmaxen.
From Dennis Grevenstein on port-pmax@.
--
|
| 1.69.12.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.69.8.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.69.8.1 | 24-May-2006 |
yamt | sync with head.
|
| 1.69.6.1 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.69.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.71.34.1 | 18-Oct-2007 |
yamt | sync with head.
|
| 1.71.32.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.71.32.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.71.30.1 | 26-Oct-2007 |
joerg | Sync with HEAD.
Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.
|
| 1.71.22.1 | 06-Jan-2008 |
wrstuden | Catch up to netbsd-4.0 release.
|
| 1.71.20.1 | 16-Oct-2007 |
garbled | Sync with HEAD
|
| 1.71.12.1 | 23-Oct-2007 |
ad | Sync with head.
|
| 1.71.6.1 | 24-Oct-2007 |
xtraeme | Pull up following revision(s) (requested by simonb in ticket #936):
sys/arch/mips/include/cpuregs.h: revision 1.72
sys/arch/mips/mips/mips_machdep.c: revision 1.195
Recognise the R2000A cpu as found in some pmaxen.
From Dennis Grevenstein on port-pmax@.
|
| 1.74.28.26 | 15-Dec-2012 |
matt | Add initial support for XLP II (XLP2XX/XLP1XX).
|
| 1.74.28.25 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.74.28.24 | 27-Dec-2011 |
matt | Note that 1004K and 1074K are MT
|
| 1.74.28.23 | 23-Dec-2011 |
matt | Correct XLP processor ids, add 1074K processor id. Increase ASID space
to 10 bits for MIPS3+ cpus.
|
| 1.74.28.22 | 04-Nov-2011 |
matt | Add RMI XLP ids
|
| 1.74.28.21 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.74.28.20 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.74.28.19 | 29-Dec-2010 |
matt | Add MIPS_TLB_PID mask and use it apporpriately.
|
| 1.74.28.18 | 27-Apr-2010 |
cliff | seperate RMI CPU revision codes from RMI CPU processor codes
and improve comment
|
| 1.74.28.17 | 29-Mar-2010 |
cliff | - fix XLR Pid defines; RMI Pid meaning depends on
the Rev value (Stepping B2 or C4)
|
| 1.74.28.16 | 21-Mar-2010 |
cliff | - define MIPS_SR_COP_2_BIT to control enable/disable of coprocessor 2
|
| 1.74.28.15 | 27-Feb-2010 |
matt | Add the RMI COP0 OSSCRATCH register
|
| 1.74.28.14 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.74.28.13 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.74.28.12 | 14-Nov-2009 |
matt | Add MIPS_SR_PX
|
| 1.74.28.11 | 13-Nov-2009 |
cliff | - move #ifndef LOCORE up a few lines to wrap more XSEG, XKSEG stuff
|
| 1.74.28.10 | 09-Nov-2009 |
cliff | - fix some RMI XLR PRID typos (comments)
|
| 1.74.28.9 | 13-Sep-2009 |
cliff | include registers file for RMI XL chip family as needed
|
| 1.74.28.8 | 08-Sep-2009 |
matt | Add and optimize MIPS_PHYS_TO_XKPHYS_{UN,}CACHED(pa).
Treat like mips3_pg_cached: add mips3_xkphys_cached which contains the
starting address of the cached XKPHYS region. It also respects SPECIAL_CCA.
|
| 1.74.28.7 | 07-Sep-2009 |
matt | Use intptr_t in MIPS_KSEGx_P()
Use uintptr_t in MIPS_XKPHYS*
|
| 1.74.28.6 | 06-Sep-2009 |
matt | Add some more macros for XUSEG/XSSEK and for testing what segment an address
belongs to.
|
| 1.74.28.5 | 05-Sep-2009 |
matt | Define MIPS_KSEGn_START as friends as being long.
|
| 1.74.28.4 | 30-Aug-2009 |
simonb | Update comment for EBASE - this is a MIPS32/MIPS64 only register
|
| 1.74.28.3 | 30-Aug-2009 |
matt | Add RMI company id.
Add some RMI processor ids.
Add CP0 EBASE defintion.
|
| 1.74.28.2 | 21-Aug-2009 |
matt | Define manifest kernel addresses as negative so that proper sign extension
happens. This gives proper results for both 32bit and 64bit kernels.
|
| 1.74.28.1 | 20-Aug-2009 |
matt | Add a MIPS_XKPHYS_P(va) macro.
Define MIPS_XKSEG related macros
|
| 1.74.10.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.74.10.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.77.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.78.6.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.78.6.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.78.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.78.2.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.78.2.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.88.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.89.2.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.89.2.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.89.2.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.95.8.1 | 11-May-2017 |
pgoyette | Sync with HEAD
|
| 1.109.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.110.6.1 | 31-May-2021 |
cjep | sync with head
|
| 1.110.4.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.4 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.3 | 29-Mar-2015 |
macallan | use 32bit __cpuset_t in o32 kernels
ok matt@
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2; 1.2.4; 1.2.8; 1.2.20; 1.2.38;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 05-Feb-2011 |
cliff | branches: 1.1.2;
file cpuset.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.1 | 05-Feb-2011 |
cliff | add cpuset.h to allow abstracting bit-per-cpu run state variables (cpus_running et. al.)
|
| 1.2.38.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.38.1 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.2.20.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.8.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.8.1 | 20-Feb-2011 |
jruoho | file cpuset.h was added on branch jruoho-x86intr on 2011-06-06 09:06:03 +0000
|
| 1.2.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.1 | 20-Feb-2011 |
rmind | file cpuset.h was added on branch rmind-uvmplock on 2011-03-05 20:51:03 +0000
|
| 1.2.2.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.2.1 | 20-Feb-2011 |
bouyer | file cpuset.h was added on branch bouyer-quota2 on 2011-03-05 15:09:48 +0000
|
| 1.38 | 18-May-2021 |
skrll | Remove argument names from function declaration prototypes.
|
| 1.37 | 29-Mar-2021 |
simonb | branches: 1.37.2; 1.37.4;
Expose kdbpeek() and kdbrpeek() for dtrace.
|
| 1.36 | 29-Mar-2021 |
simonb | Move the cpu_reset_address() declaration inside #ifdef _KERNEL, add a
comment.
|
| 1.35 | 29-Mar-2021 |
simonb | Whitespace nits.
|
| 1.34 | 10-Feb-2021 |
simonb | branches: 1.34.2;
On MIPS use a helper function to work out the current PC and then
call stacktrace_subr() directly for displaying a stacktrace with
db_stacktrace() and friends.
|
| 1.33 | 17-Aug-2020 |
mrg | branches: 1.33.2;
port crash(8) to mips. (most of the kernel side.)
- expose parts of _KERNEL to _KMEMUSER as well
- hide more things for _KERNEL
- avoid DB_MACHINE_COMMANDS in crash(8)
- XXX add mips_label_t for !_KERNEL and use it in the pcb to
avoid conflicting with the ddb/crash one
- enable dumppcb
some changes to make stack trace fail instead of SEGV and
the userland changes to crash itself not part of this change.
|
| 1.32 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.31 | 13-Jul-2020 |
simonb | Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.
|
| 1.30 | 06-Nov-2017 |
christos | Cleanup and clarify the ELFSIZE mess:
We now have 2 variables automatically set in elf_machdep.h:
ARCH_ELFSIZE: the size for userland binaries
KERN_ELFSIZE: the size for the kernel binaries
DB_ELFSIZE has been deleted and KERN_ELFSIZE should have always the
same values DB_ELFSIZE used to have.
In sys/exec_elf.h, if ELFSIZE is not set, it is set to KERN_ELFSIZE
for the kernel and ARCH_ELFSIZE for userland. These defaults should
eliminate the need for most manual ELFSIZE setting.
|
| 1.29 | 06-Jun-2015 |
matt | Make db_expr_t long long when using the N32 ABI.
|
| 1.28 | 09-Jul-2011 |
matt | branches: 1.28.12; 1.28.30;
Default to DB_ELF_SYMBOLS and DB_ELFSIZE 32
|
| 1.27 | 26-May-2011 |
joerg | Introduce DDB_EXPR_FMT and replace the logic around DB_EXPR_T_IS_QUAD.
|
| 1.26 | 14-Apr-2011 |
cliff | - remove include <mips/proc.h>, unused
- db_mach_watch_set_all() is deprecated, removed,
superceded by cpuwatch_set_all()
|
| 1.25 | 06-Apr-2011 |
matt | minor cleanups. foo -> foo_p. add some whitespace.
|
| 1.24 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.23 | 14-Jan-2011 |
rmind | branches: 1.23.2; 1.23.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.22 | 28-Feb-2007 |
thorpej | branches: 1.22.62; 1.22.66;
TRUE -> true, FALSE -> false
|
| 1.21 | 22-Feb-2007 |
matt | Fix more boolean_t -> bool lossage
|
| 1.20 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.19 | 01-Sep-2006 |
matt | branches: 1.19.8;
Remove explicit cast which causes assignments to PC_REGS(f) to fail.
|
| 1.18 | 01-Apr-2006 |
cherry | closes: PR kern/32359
modifies machine/db_machdep.h: BKPT_SET(inst) to BKPT_SET(inst, addr) for all archs ie; passess the
breakpoint address as well.
Patch from cherry@mahiti.org
|
| 1.17 | 11-Dec-2005 |
christos | branches: 1.17.4; 1.17.6; 1.17.8; 1.17.10; 1.17.12;
merge ktrace-lwp.
|
| 1.16 | 26-Nov-2003 |
he | branches: 1.16.16;
Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.15 | 29-Apr-2003 |
scw | branches: 1.15.2;
Add a BKPT_ADDR() macro which gives MD code a chance to munge a
breakpoint address before it's used. Currently a no-op on all but sh5.
This is useful on sh5, for example, to mask off the instruction
type encoding in the bottom two address bits, and makes it possible
to do "db> break $rXX" instead of manually munging the address.
|
| 1.14 | 05-Mar-2002 |
simonb | ANSIfy.
|
| 1.13 | 15-Feb-2002 |
simonb | Make the ddb_regs declaration an extern in db_machdep.h and declare it on
db_interface.c.
|
| 1.12 | 09-Nov-2001 |
thorpej | branches: 1.12.2;
Remove unneeded declarations of the db_machine_init() function. The
ARM ports are the only ones that actually have one, and it is about
to change.
|
| 1.11 | 17-Jul-2000 |
jeffs | branches: 1.11.4; 1.11.6;
Move platform db_trap callback from arch/mips into ddb as suggested by
jhawk. This callback is used by platform code to manage things like
watchdogs that should be disabled while in ddb. Done as a callback
for processors such as mips that support lots of different systems.
|
| 1.10 | 17-Jul-2000 |
jeffs | Pull in geocast mips ddb improvements and start bringing in kgdb support.
Add ddb support for QED opcodes, fill in enough routines so "next" usually
works, kdbpoke support for any size. Add callback that ports can hook when
entering and leaving ddb. This can be used for things like turning
off watchdogs while in ddb.
|
| 1.9 | 26-Jun-2000 |
mrg | <vm/vm_param.h> -> <uvm/uvm_param.h>
|
| 1.8 | 10-Apr-1999 |
drochner | branches: 1.8.2;
while symbol support in DDB is good to have one _can_ live without it
|
| 1.7 | 23-Mar-1999 |
simonb | branches: 1.7.4;
Move DB_{AOUT,ELF}_SYMBOLS (and DB_ELFSIZE) definition to port-specific
db_machdep.h file.
|
| 1.6 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.5 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.4 | 18-Nov-1997 |
mhitch | branches: 1.4.4;
Define PC_ADVANCE() to advance the PC around the break instruction only
if the break instruction is still there. This works around a problem with
the software single step in DDB not recognizing the temporary breakpoint
set to emulate the single step.
|
| 1.3 | 19-Jul-1997 |
jonathan | branches: 1.3.6;
* Re-apply changes from rev 1.6 of sys/arch/mips/include/reg.h accidentally
undone by rev 1.7:
>redo pmax/include/reg.h
>so that the definitions needed by locore.S are in a separate file,
>pmax/include/regnum.h.
* Add explicit `#include <mips/regnum.h>' where symbolic offsets
into a mips trapframe or struct reg are used..
|
| 1.2 | 07-Jul-1997 |
jonathan | Typo in RCS id.
|
| 1.1 | 07-Jul-1997 |
jonathan | DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.3.6.1 | 20-Nov-1997 |
mellon | Pull rev 1.4 up from trunk (mhitch)
|
| 1.4.4.1 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.7.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.8.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.11.6.1 | 12-Nov-2001 |
thorpej | Sync the thorpej-mips-cache branch with -current.
|
| 1.11.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.11.4.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.12.2.3 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.12.2.2 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.12.2.1 | 09-Nov-2001 |
nathanw | file db_machdep.h was added on branch nathanw_sa on 2002-02-28 04:10:42 +0000
|
| 1.15.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.15.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.15.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.16.16.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.16.16.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.16.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.16.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.17.12.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.17.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.17.8.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.17.8.1 | 11-Apr-2006 |
yamt | sync with head
|
| 1.17.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.17.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.19.8.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.19.8.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.22.66.3 | 31-May-2011 |
rmind | sync with head
|
| 1.22.66.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.22.66.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.22.62.5 | 16-Feb-2012 |
matt | Change db_expr_t to an register_t so we can see the full register contents
on N32 kernels.
|
| 1.22.62.4 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.22.62.3 | 08-Feb-2011 |
cliff | - rename ddb_running_on_this_cpu to ddb_running_on_this_cpu_p
according to pedicate unction naming style convention
|
| 1.22.62.2 | 05-Feb-2011 |
cliff | - declare new md MP ddb functions.
|
| 1.22.62.1 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.23.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.23.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.28.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.28.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.33.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.34.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.37.4.1 | 31-May-2021 |
cjep | sync with head
|
| 1.37.2.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.6 | 26-Sep-1996 |
cgd | rename <machine/ecoff.h> to <machine/ecoff_machdep.h> for clarity and
consistency with the way machdep headers for other things are done.
(the creation of the ecoff_machdep.h files was done on the CVS server, to
keep the RCS logs intact.)
|
| 1.5 | 09-May-1996 |
cgd | change structure member names to be in line with what various ECOFF
documentation I have calls them, and update for new definitions in
sys/exec_ecoff.h.
|
| 1.4 | 16-Jun-1995 |
mellon | Put parentheses around macro arguments
|
| 1.3 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.2 | 28-May-1994 |
glass | more likely to work now, probably less knf...thats the next project
|
| 1.1 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.24 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.23 | 23-Feb-2017 |
christos | provide ecoff 32 defines.
|
| 1.22 | 11-Jul-2016 |
matt | branches: 1.22.2; 1.22.4;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.21 | 20-Mar-2012 |
nonaka | branches: 1.21.2; 1.21.14; 1.21.16;
fix build failure on mipsel.
>/usr/src/lib/libc/gen/nlist_ecoff.c(112): warning: constant in conditional context [161]
|
| 1.20 | 10-Dec-2009 |
matt | branches: 1.20.12; 1.20.16;
Change u_long to vaddr_t/vsize_t in exec code where appropriate (mostly
involves setregs and vmcmds). Should result in no code differences.
|
| 1.19 | 17-Jan-2003 |
thorpej | branches: 1.19.108; 1.19.126;
Merge the nathanw_sa branch.
|
| 1.18 | 05-Mar-2002 |
simonb | ANSIfy.
|
| 1.17 | 28-Mar-2000 |
simonb | branches: 1.17.8; 1.17.12;
Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.16 | 24-Apr-1999 |
simonb | branches: 1.16.2;
Nuke register and remove trailling white space.
|
| 1.15 | 08-Mar-1999 |
tsubai | branches: 1.15.4;
Add big-endian definitions.
|
| 1.14 | 05-Dec-1998 |
jonathan | #ifdef _KERNEL around cpu_exec_ecoff_setregs() prototype.
|
| 1.13 | 15-Oct-1997 |
mhitch | branches: 1.13.6;
Fix typo - list/libc/gen/nlist_ecoff.c still wasn't compiling.
|
| 1.12 | 10-Oct-1997 |
jonathan | Don't check the actual CPU type unless we're in the _KERNEL, or
src/lib/libc/gen/nlist_ecoff.c breaks.
|
| 1.11 | 08-Oct-1997 |
jonathan | Allow mips3 ECOFF binaries if running on a mips3 CPU.
|
| 1.10 | 24-Sep-1997 |
mhitch | Fix another missed *setregs() change.
|
| 1.9 | 20-Jul-1997 |
jonathan | branches: 1.9.2;
Add ecoff ``struct ext_ext'' header fields to ecoff_extsym.h.
Compatible with mips ECOFF nm from GNu binutils or MipsCo toolchain.
|
| 1.8 | 07-Jul-1997 |
jonathan | Rewrite struct ecoff_symhdr using the same field ordering as GNU
binutils and the MipsCo toolchain, not the Alpha ordering (which has a
block of int32_t symbol counts and a block of long offsets) .
|
| 1.7 | 25-May-1997 |
jonathan | Add ecoff symbol header definitions for mips1.
|
| 1.6 | 24-May-1997 |
jonathan | Add prototype for cpu_exec_ecoff_setregs() to mips/inuclde/ecoff_machdep.h.
Use it in compat/ultrix/ultrix_misc.c (setting emul type on mips).
|
| 1.5 | 09-May-1996 |
cgd | change structure member names to be in line with what various ECOFF
documentation I have calls them, and update for new definitions in
sys/exec_ecoff.h.
|
| 1.4 | 16-Jun-1995 |
mellon | Put parentheses around macro arguments
|
| 1.3 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.2 | 28-May-1994 |
glass | more likely to work now, probably less knf...thats the next project
|
| 1.1 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.9.2.2 | 14-Oct-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.9.2.1 | 29-Sep-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.13.6.1 | 06-Dec-1998 |
drochner | pull up 1.14 - protect cpu_exec_ecoff_setregs
|
| 1.15.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.16.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.17.12.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.17.12.1 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.17.8.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.19.126.1 | 26-Aug-2009 |
matt | Fixup (all but mipsco) to deal the new realities in mipsland.
|
| 1.19.108.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.20.16.1 | 05-Apr-2012 |
mrg | sync to latest -current.
|
| 1.20.12.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.21.16.2 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.21.16.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.21.14.1 | 12-May-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1406):
sys/arch/mips/include/ecoff_machdep.h: revision 1.23
sys/sys/exec_ecoff.h: revision 1.21
tools/Makefile.nbincludes: revision 1.5
tools/mips-elf2ecoff/Makefile: revision 1.3
tools/mips-elf2ecoff/machine/ecoff_machdep.h: revision 1.3
tools/mips-elf2ecoff/sys/exec_elf.h: file removal
tools/mips-elf2ecoff/sys/exec_ecoff.h: file removal
usr.bin/elf2ecoff/elf2ecoff.c: revision 1.30-1.33
use the nbcompat copies for those files
--
ignore the abiflags section
--
Add exec_ecoff.h
--
provide ecoff 32 defines.
--
This only works with 32 bit Elf and COFF files, make it specific this way
and use sized types so that it works on 64 bit systems (so it can become
a tool).
--
Provided sized definitions for ecoff 32 bit headers.
--
refresh
--
fix printf format.
--
fix printf format
|
| 1.21.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.22.4.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.22.2.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.5 | 09-Nov-1999 |
kleink | Per discussion on tech-toolchain, remove MIPS-specific <machine/elf.h> header;
all the information is available from <sys/exec_elf.h>.
|
| 1.4 | 26-Jun-1996 |
jonathan | branches: 1.4.30; 1.4.32; 1.4.36;
Rename unused macro ELF_HDR_SIZE -> MIPS_ELF_HDR_SIZE to avoid clash
with #define of ELF_HDR_SIZE in MI elf code.
|
| 1.3 | 19-May-1996 |
jonathan | branches: 1.3.4;
Declare mips_elf_makecmds(), not pmax_elf_makecmds().
|
| 1.2 | 28-Mar-1995 |
jtc | KERNEL -> _KERNEL
|
| 1.1 | 18-Jan-1995 |
mellon | ELF format (to be combined with elf header in sys/compat later)
|
| 1.3.4.1 | 26-Jun-1996 |
jtc | Pulled up from trunk by request of Jonathan Stone
|
| 1.4.36.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.4.32.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.4.30.1 | 20-Nov-2000 |
bouyer | Remove files that are no longer on the trunck
|
| 1.21 | 16-Apr-2025 |
riastradh | ld.elf_so: Teach this to handle MIPS PIE rtld debug data.
Adapt t_rtld_r_debug to handle the two MIPS cases too.
XXX t_rtld_r_debug should be tested both as PIE and non-PIE to
exercise both cases.
Context:
The value of a DT_DEBUG .dynamic entry is initialized at load-time,
by ld.elf_so, to a pointer to a data structure set up by ld.elf_so
describing the shared objects loaded by the executable, so debuggers
can find them from, e.g., core dumps. None of this is really
documented anywhere that I can find. Best reference is this post on
the gdb mailing list from a quarter century ago saying there's no
real documentation:
https://web.archive.org/web/20250414021320/https://sourceware.org/pipermail/gdb/2000-April/004509.html
However, on MIPS, the .dynamic section is mapped read-only, so
ld.elf_so can't properly modify it (I imagine technically it could
with some mprotect shenanigans but that's not how it's done on MIPS).
Instead, the linker reserves a location in read/write memory and uses
a DT_MIPS_RLD_MAP entry with a pointer to that location.
However, in position-independent executables, the .dynamic entry
can't have an absolute pointer to that location because it's not
known up front. Instead, the the linker uses a DT_MIPS_RLD_MAP_REL
entry with the relative offset to that location from the Elf_Dyn
entry itself.
I would add a reference for this but it's basically a matter of UTSL
plus some oblique mentions on the web and mailing list discussions:
https://web.archive.org/web/20250414024823/https://cygwin.com/legacy-ml/binutils/2016-04/msg00244.html
https://web.archive.org/web/20250403151803/https://maskray.me/blog/2023-09-04-toolchain-notes-on-mips
https://web.archive.org/web/20211024050833/https://reviews.llvm.org/D12794?id=34533
https://web.archive.org/web/20250407052145/https://wiki.debian.org/MIPSPort
https://web.archive.org/web/20250414024924/https://reviews.freebsd.org/D17867?id=50122
PR port-mips/59296: t_rtld_r_debug test is failing
|
| 1.20 | 06-Nov-2017 |
christos | branches: 1.20.40;
Handle 64 bit kernels.
|
| 1.19 | 06-Nov-2017 |
christos | Cleanup and clarify the ELFSIZE mess:
We now have 2 variables automatically set in elf_machdep.h:
ARCH_ELFSIZE: the size for userland binaries
KERN_ELFSIZE: the size for the kernel binaries
DB_ELFSIZE has been deleted and KERN_ELFSIZE should have always the
same values DB_ELFSIZE used to have.
In sys/exec_elf.h, if ELFSIZE is not set, it is set to KERN_ELFSIZE
for the kernel and ARCH_ELFSIZE for userland. These defaults should
eliminate the need for most manual ELFSIZE setting.
|
| 1.18 | 23-May-2013 |
christos | add generic copyrights so FreeBSD can use them.
|
| 1.17 | 30-Jan-2013 |
christos | whitespace police
|
| 1.16 | 30-Jan-2013 |
matt | Add two missing relocs and DT_MIPS_PLTGOT and DT_MIPS_RWPLT
|
| 1.15 | 15-Mar-2011 |
matt | branches: 1.15.4; 1.15.14;
Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.14 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.13 | 14-Dec-2009 |
mrg | branches: 1.13.4; 1.13.6; 1.13.8;
forward declare struct exec_package
|
| 1.12 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.11 | 30-May-2009 |
skrll | Add TLS relocation definitions.
|
| 1.10 | 11-Dec-2005 |
christos | branches: 1.10.42; 1.10.78; 1.10.96;
merge ktrace-lwp.
|
| 1.9 | 31-Oct-2003 |
drochner | don't need ELF_INTER_NON_RELOCATABLE anymore if no COMPAT_16, from simonb
|
| 1.8 | 09-Dec-2001 |
thorpej | branches: 1.8.16;
Add support for dumping ELF-cormat core files.
|
| 1.7 | 02-Apr-2000 |
minoura | branches: 1.7.8; 1.7.12;
Move dl* function definitions to libc on ELF.
Based on the patch supplied by Takuya Shiozaki <tshiozak@astec.co.jp>.
See http://mail-index.netbsd.org/tech-userlevel/2000/02/23/0000.html.
|
| 1.6 | 25-Oct-1999 |
kleink | Update to match new SVR4-style definition names in <sys/exec_elf.h>.
|
| 1.5 | 24-Apr-1999 |
simonb | branches: 1.5.2; 1.5.4; 1.5.6;
Nuke register and remove trailling white space.
|
| 1.4 | 25-Mar-1998 |
mhitch | branches: 1.4.12;
Define ELF dynamic types for MIPS (some will be used by ld.elf_so).
|
| 1.3 | 03-Mar-1997 |
jonathan | branches: 1.3.8;
Add architecture-specific ELf relocs for mips chips.
|
| 1.2 | 11-Nov-1996 |
jonathan | branches: 1.2.6;
Elf32 fixes for mips shared libraries:
* handle interpreters with nonzero virtual address of entry-point:
subtract p_vaddr from computed entrypoint, as the mips elf exec did.
* Add #ifdef ELF_INTERP_NON_RELOCATABLE/#endif around the code
that tries to choose a `good' address at which to load an interpreter,
if none was set by the emul probe function.
(the address chosen could be improved to avoid fragmenting the
process virtual address space).
* define ELF_INTERP_NON_RELOCATABLE in machine/elf_machdep.h for mips CPUs,
which currently use a GNU-derived ld.so.
ELF_INTERP_NON_RELOCATABLE is not necessary for native NetBSD/alpha ELF
binaries. It may be required for GNU-derived ELF dynamic loaders (Linux/i386?)
|
| 1.1 | 26-Sep-1996 |
cgd | add and use a machine-dependent header, which currently defines some
macros to use to remove #ifdefs from the machine ID case check.
Eventually, these headers will contain other information, e.g.
machine-dependent relocation information, etc.
|
| 1.2.6.1 | 12-Mar-1997 |
is | Merge in changes from Trunk
|
| 1.3.8.1 | 10-May-1998 |
mycroft | Pull up 1.4, per request of mhitch.
|
| 1.4.12.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.5.6.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.5.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.5.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.7.12.1 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.7.8.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.8.16.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.8.16.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.8.16.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.10.96.9 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.10.96.8 | 26-Jan-2010 |
matt | If ELFSIZE == 64, define ELF64_MACHDEP_ID_CASES regardless of _LP64
|
| 1.10.96.7 | 12-Sep-2009 |
matt | Fix for COMPAT_NETBSD32.
|
| 1.10.96.6 | 05-Sep-2009 |
matt | Fix EF_ARCH_*. (should be in high nibble)
|
| 1.10.96.5 | 23-Aug-2009 |
matt | Make sure we only don't run other sized ELFs.
|
| 1.10.96.4 | 22-Aug-2009 |
matt | Move ELF{32,64}_MACHDEP_ENDIANNESS to <mips/elf_machdep.h>
|
| 1.10.96.3 | 21-Aug-2009 |
matt | Add prototypes for mips_netbsd_elfXX_probe to verify the current kernel
and cpu support the ABI and architecture specified in the elf header.
Add prototypes for moredump_elfXX_setup which will set the core dump
elf flags to the current abi and what the architecture of the current cpu.
|
| 1.10.96.2 | 20-Aug-2009 |
matt | On _LP64 default to ELFSIZE=64
Add a ELF64 default case for EM_MIPS
|
| 1.10.96.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.10.78.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.10.78.1 | 20-Jun-2009 |
yamt | sync with head
|
| 1.10.42.1 | 18-Jul-2007 |
matt | Add MIPS EF_*. Add ELF64 stuff. Add hooks to check for ABI type.
|
| 1.13.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.13.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.13.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.13.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.15.14.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.15.14.2 | 23-Jun-2013 |
tls | resync from head
|
| 1.15.14.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.15.4.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.20.40.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.20 | 23-May-2013 |
christos | add generic copyrights so FreeBSD can use them.
|
| 1.19 | 17-Mar-2000 |
mycroft | branches: 1.19.168; 1.19.178;
In the `MY THAT'S GROSS' department...
Eliminate the recursive include of machine/endian.h from sys/endian.h.
|
| 1.18 | 16-Mar-2000 |
mycroft | Foolish consistency. Mainly, always use underscores and sys/endian.h.
|
| 1.17 | 21-Aug-1999 |
simonb | branches: 1.17.2;
Include <sys/endian.h> after defining whether where are little- or
big-endian. i386, pc532 and vax still include <machine/byte_swap.h>
and define macros for the {n,h}to{h,n}*() functions. mips also
defines some endian-independent assembly-code aliases for unaligned
memory accesses.
|
| 1.16 | 24-Jan-1999 |
mycroft | Mark [hn]to[nh][ls]() with __const__, so they are subject to CSE.
|
| 1.15 | 15-Jan-1999 |
bouyer | Move the bswap functions from libutil to libc (this bups the
minor of libc and the major of libutil). For little-endian architectures
merge the bnswap() assembly versions with nto* and hton* using symbols
aliasing. Use symbol renaming for the bswap function in this case to avoid
namespace pollution.
Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian
machines, common code for inline macros go in machine/byte_swap.h
Sync libkern with libc.
Adjust #include in kernel sources for machine/bswap.h.
|
| 1.14 | 31-Jul-1998 |
mycroft | (Always) (practice) (safe) (macro expansion).
|
| 1.13 | 30-Oct-1997 |
jonathan | branches: 1.13.2;
Add missing `(void)' cast to big-endian variant of {NTOH,HTON}{L,S}().
|
| 1.12 | 20-Oct-1997 |
jonathan | branches: 1.12.2;
Put back duplicate <XXX>_ENDIAN definitions. Defining them as _<XXX>_ENDIAN
loses on non-POSIX source that re-defines <XXX>_ENDIAN itself (e.g., gdb.)
|
| 1.11 | 20-Oct-1997 |
jonathan | * Use ANSI-clean names for host-specific byte-order definition
(_BYTE_ORDER, _BIG_ENDIAN, _LITTLE_ENDIAN).
Define old names from the ANSI ones if not _POSIX_SOURCE.
* Define _QUAD_HIGHWORD and _QUAD_LOWWORD properly when
_BYTE_ORDER == _BIG_ENDIAN.
|
| 1.10 | 17-Oct-1997 |
jonathan | Add bi-endian support to mips locore, <mips/endian.h>, and mips_opcode.h.
Derived from a change request (PR port-mips/4277) from
Tsubai Masanari, (tsubai@iri.co.jp).
|
| 1.9 | 09-Oct-1997 |
bouyer | Add byte-swapping functions (bswap16, bswap32, bswap64) to libkern.
Only assembly version for i386 bswap16 and bswap32 for now (bswap64 uses
bswap32). Contribution of assembly versions of these are welcome.
Add byte-swapping of ext2fs metadata for big-endian systems.
Tested on i386 and sparc.
|
| 1.8 | 13-Oct-1996 |
mhitch | branches: 1.8.10;
Fix error from in_addr_t changes by christos: htonl() takes in_addr_t
parameter, not in_port_t.
|
| 1.7 | 13-Oct-1996 |
christos | use in_addr_t and in_port_t
|
| 1.6 | 05-Jun-1996 |
jonathan | Include <mips/types.h> to bring u_int32_t and u_int16_t in scope for
the argument and return type of {n,h}to{h,n}{l,s}.
|
| 1.5 | 09-Apr-1996 |
jonathan | branches: 1.5.4;
Fixes for -Wall -Wmissing-prototypes:
Replace impliclty-sized types (u_long, u_short) used in
declarations of byteorder functions witho explicitly sized types
(u_int32_t, u_int16_t).
Avoids problems with using ntohl(foo) as (eg) an argument to printf().
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.5.4.1 | 05-Jun-1996 |
jonathan | Pull up u_int16_t and u_int32_t declaration fix from v1.6 of the main branch
|
| 1.8.10.1 | 14-Oct-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.12.2.1 | 30-Oct-1997 |
mellon | Pull rev 1.13 up from trunk (jonathan)
|
| 1.13.2.1 | 08-Aug-1998 |
eeh | Revert cdevsw mmap routines to return int.
|
| 1.17.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.19.178.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.19.168.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3 | 23-May-2013 |
christos | add generic copyrights so FreeBSD can use them.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.12; 1.2.22;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 17-Mar-2000 |
mycroft | branches: 1.1.6; 1.1.136; 1.1.154;
In the `MY THAT'S GROSS' department...
Eliminate the recursive include of machine/endian.h from sys/endian.h.
|
| 1.1.154.2 | 23-Aug-2009 |
matt | Add REG_SHI and REG_SLO
|
| 1.1.154.1 | 20-Aug-2009 |
matt | Add REG_LLO and REG_LHI macros which expand to the appropriate
lwl/lwr/ldl/ldr instruction
|
| 1.1.136.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.1.6.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.1.6.1 | 17-Mar-2000 |
bouyer | file endian_machdep.h was added on branch thorpej_scsipi on 2000-11-20 20:13:31 +0000
|
| 1.2.22.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.2.12.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.6 | 08-Oct-1996 |
cgd | moved to aout_machdep.h (via repository copy)
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 14-Jan-1994 |
deraadt | some pmax updating (Terry Friedrichsen is helping on this now).
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.7 | 30-Oct-2024 |
riastradh | Sprinkle <sys/featuretest.h> where _*_SOURCE macros are consulted.
Otherwise, the feature tests might come out wrong. For example,
header files that check for _NETBSD_SOURCE won't get the default when
no other _*_SOURCE macros are defined; header files that check for
_POSIX_C_SOURCE might miss _XOPEN_SOURCE, which is supposed to imply
a corresponding _POSIX_C_SOURCE.
PR lib/58752: various header files test _*_SOURCE macros but don't
include sys/featuretest.h
|
| 1.6 | 26-Jul-2020 |
simonb | branches: 1.6.26;
#define<tab>
Nuke trailing whitespace.
|
| 1.5 | 29-Oct-2019 |
christos | do the pragma dance to avoid -Wshadow
|
| 1.4 | 22-Mar-2017 |
chs | branches: 1.4.12; 1.4.16;
provide a common softfloat fenv implemenation and use it for softfloat builds.
restore ABI compatibility with previous releases for ieeefp.h on sh3.
add namespace.h protection for all the fenv interfaces.
use MKSOFTFLOAT on sh3 instead of assuming softfloat.
standardize on comparing MKSOFTFLOAT with "no".
remove the arm-specific softfloat fenv code (which also had several bugs).
fix logic errors in the arm hardfloat feraiseexcept() and feupdateenv().
|
| 1.3 | 27-Feb-2017 |
chs | fix fesetround() to set the FPSR to the desired value rather than
a pointer to a local variable. wrap the asm in inline functions so that
the compiler can do type checking for us.
|
| 1.2 | 13-Jan-2017 |
christos | branches: 1.2.2;
making this use mips assembly is a good start!
|
| 1.1 | 21-Dec-2015 |
christos | branches: 1.1.2; 1.1.4;
Add mips fenv.h (From FreeBSD)
|
| 1.1.4.2 | 26-Apr-2017 |
pgoyette | Sync with HEAD
|
| 1.1.4.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.1.2.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.1.2.3 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.1.2.1 | 21-Dec-2015 |
skrll | file fenv.h was added on branch nick-nhusb on 2015-12-27 12:09:38 +0000
|
| 1.2.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.4.16.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.4.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.12.1 | 22-Mar-2017 |
jdolecek | file fenv.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.6.26.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.20 | 30-Oct-2024 |
riastradh | Sprinkle <sys/featuretest.h> where _*_SOURCE macros are consulted.
Otherwise, the feature tests might come out wrong. For example,
header files that check for _NETBSD_SOURCE won't get the default when
no other _*_SOURCE macros are defined; header files that check for
_POSIX_C_SOURCE might miss _XOPEN_SOURCE, which is supposed to imply
a corresponding _POSIX_C_SOURCE.
PR lib/58752: various header files test _*_SOURCE macros but don't
include sys/featuretest.h
|
| 1.19 | 27-Apr-2024 |
rillig | branches: 1.19.2;
mips: fix syntax error in LDBL_MAX (since 2011)
|
| 1.18 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.17 | 23-May-2013 |
christos | add generic copyrights so FreeBSD can use them.
|
| 1.16 | 07-Jul-2011 |
matt | branches: 1.16.2; 1.16.12;
Include <sys/cdefs.h> to get __GNUC_PREREQ__
|
| 1.15 | 07-Jul-2011 |
matt | If GCC 4.1 or newer (or clang), use __LDBL__*__ builtins otherwise if C99
use hex floating point.
|
| 1.14 | 17-Jan-2011 |
matt | Make the MIPS N32/N64 ABIs properly support 128-bit long doubles. With this
change, we should be fully conformant with the N32 and N64 ABIs.
Add {fpclassify,infinity,isnan,ininf,signbit}l_ieee754.c back to lib/libc/gen.
Note that infinityl_ieee754.c will work with either 64-bit, 80-bit, or
128-bit long doubles.
|
| 1.13 | 12-May-2003 |
kleink | branches: 1.13.126; 1.13.130; 1.13.136;
Rename <sys/float_ieee.h> to <sys/float_ieee754.h>, following libc's
convention for these.
|
| 1.12 | 19-Apr-2003 |
christos | PR/3012: Greg A. Woods: Write all float.h files [except the vax of course]
in terms of float_ieee.h
|
| 1.11 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.10 | 18-Feb-1998 |
mycroft | branches: 1.10.16;
DBL_MIN and DBL_MAX were less precise than they should have been.
Other minor changes to match other float.h files.
|
| 1.9 | 18-Oct-1997 |
jonathan | branches: 1.9.2;
Prototype __flt_rounds().
|
| 1.8 | 18-Mar-1996 |
jonathan | NetBSD's ieee FP definitions for the pmax are valid for other mips cpus;
change preprocessor XXX_PMAX_YYY #defines to XXX_MIPS_YYY.
|
| 1.7 | 20-Jun-1995 |
jtc | Wrap with #ifndef _XXX_FLOAT_H_/#define _XXX_FLOAT_H_/ ... /#endif.
|
| 1.6 | 20-Jun-1995 |
jtc | #include <sys/cdefs.h>.
Wrap __flt_rounds() declaration with __BEGIN_DECLS/__END_DECLS.
|
| 1.5 | 11-Apr-1995 |
jtc | Changed FLT_ROUNDS from constant to a call to __flt_rounds(), so that the
current rounding mode is accurately reported.
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.9.2.1 | 08-May-1998 |
mycroft | Sync with trunk, per request of mycroft.
|
| 1.10.16.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.13.136.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.13.130.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.13.126.1 | 29-Apr-2011 |
matt | Pull in true (128-bit) long double support for MIPS from -current.
|
| 1.16.12.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.16.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.19.2.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.13 | 25-Apr-2025 |
riastradh | mips: Align stack pointer on entry to signal handler.
Based on a patch by rin@. The variant approach I took puts the stack
frame allocation and alignment logic in one place (getframe, used by
sendsig_siginfo for native (n64, on mips), netbsd32_sendsig_siginfo
for compat32 (n32/o32, on mips), and sendsig_sigcontext (compat 1.6))
and reduces the chance of provoking compiler exploitation of
undefined behaviour by doing arithmetic in uintptr_t rather than in
pointers to large aligned structs. This also ensures the resulting
pointer is aligned for the object (struct siginfo_sigframe, struct
siginfo_sigframe32, struct sigcontext), not just for the ABI stack
alignment.
PR kern/59327: user stack pointer is not aligned properly
|
| 1.12 | 29-Mar-2021 |
simonb | branches: 1.12.22;
Add an lwp_trapframe() interface to return an LWP's user trapframe.
Needed by dtrace.
|
| 1.11 | 24-Mar-2021 |
simonb | We don't really need a comment at the end of the file saying "this is
the end of the file".
|
| 1.10 | 26-Jul-2020 |
simonb | branches: 1.10.2; 1.10.4;
#define<tab>
Nuke trailing whitespace.
|
| 1.9 | 19-Feb-2012 |
rmind | Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.8 | 15-Oct-2008 |
wrstuden | branches: 1.8.28; 1.8.32;
Merge wrstuden-revivesa into HEAD.
|
| 1.7 | 28-Apr-2008 |
martin | branches: 1.7.2; 1.7.6;
Remove clause 3 and 4 from TNF licenses
|
| 1.6 | 09-Feb-2007 |
ad | branches: 1.6.44; 1.6.46; 1.6.48;
Merge newlock2 to head.
|
| 1.5 | 11-Dec-2005 |
christos | branches: 1.5.20;
merge ktrace-lwp.
|
| 1.4 | 24-Jan-2005 |
drochner | branches: 1.4.8;
-remove definition of "struct sigframe" -- haven't found a use of it
(should fix build problems w/o COMPAT_16 reported by Markus W Kilbinger
per PR port-mips/29041 and by Havard Eidnes)
-further shuffle COMPAT_* conditionals to allow COMPAT_ULTRIX
w/o COMPAT_16
|
| 1.3 | 29-Oct-2003 |
christos | branches: 1.3.8;
first pass siginfo for mips
|
| 1.2 | 17-Jan-2003 |
thorpej | branches: 1.2.2;
Merge the nathanw_sa branch.
|
| 1.1 | 28-Nov-2001 |
wdk | branches: 1.1.2;
file frame.h was initially added on branch nathanw_sa.
|
| 1.1.2.3 | 02-Aug-2002 |
nathanw | Remove unised members from struct sigframe (Parallel change to mainline).
|
| 1.1.2.2 | 29-Nov-2001 |
wdk | Mips calling convention requires stack space be allocated for the
register passed arguments. Update struct saframe definition to reflect
the calling convention. This ensures the 5th argument to the upcall
handler (which has to be passed on the stack) lands in the correct address.
|
| 1.1.2.1 | 28-Nov-2001 |
wdk | Add missing mips/frame.h header file.
Move struct siginfo definition from mips_machdep.c
Partially resolves PR#11871
|
| 1.2.2.4 | 04-Feb-2005 |
skrll | Sync with HEAD.
|
| 1.2.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.3.8.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.4.8.1 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.5.20.1 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.6.48.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.6.48.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.6.46.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.6.44.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.6.44.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.7.6.1 | 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.7.2.3 | 22-Jun-2008 |
wrstuden | Re-add cpu_upcall() and page fault code. i386 kernels now compile.
They don't boot, but that seems to be a consequence of current from the
day this branch was started.
|
| 1.7.2.2 | 14-May-2008 |
wrstuden | Per discussion with ad, remove most of the #include <sys/sa.h> lines
as they were including sa.h just for the type(s) needed for syscallargs.h.
Instead, create a new file, sys/satypes.h, which contains just the
types needed for syscallargs.h. Yes, there's only one now, but that
may change and it's probably more likely to change if it'd be difficult
to handle. :-)
Per discussion with matt at n dot o, add an include of satypes.h to
sigtypes.h. Upcall handlers are kinda signal handlers, and signalling
is the header file that's already included for syscallargs.h that
closest matches SA.
This shaves about 3000 lines off of the diff of the branch relative
to the base. That also represents about 18% of the total before this
checkin.
I think this reduction is very good thing.
|
| 1.7.2.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.8.32.1 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.8.28.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.10.4.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.10.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.12.22.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.11 | 31-Jan-2014 |
matt | Consolidate the 128-bit long double defintions to <sys/ieee754.h>
Each arch that uses it now defines __HAVE_LONG_DOUBLE to 128.
<machine/ieee.h> is now just include the machine's math.h followed
by <sys/ieee754.h>
|
| 1.10 | 31-Jan-2014 |
matt | Convert to uint64_t
|
| 1.9 | 14-Feb-2013 |
matt | branches: 1.9.2;
Define LDBL_IMPLICIT_NBIT
|
| 1.8 | 14-Feb-2013 |
matt | Make LDBL_NBIT and mask_nbit_l have no effect.
|
| 1.7 | 08-Jul-2011 |
matt | branches: 1.7.2; 1.7.12;
Add extu_fraclm and extu_frachm
|
| 1.6 | 17-Jan-2011 |
matt | Make the MIPS N32/N64 ABIs properly support 128-bit long doubles. With this
change, we should be fully conformant with the N32 and N64 ABIs.
Add {fpclassify,infinity,isnan,ininf,signbit}l_ieee754.c back to lib/libc/gen.
Note that infinityl_ieee754.c will work with either 64-bit, 80-bit, or
128-bit long doubles.
|
| 1.5 | 11-Dec-2005 |
christos | branches: 1.5.96; 1.5.100; 1.5.106;
merge ktrace-lwp.
|
| 1.4 | 15-Apr-2005 |
kleink | Push back the descriptions of NaN formats, and descriptions of the
distinction between signalling NaNs and quiet NaNs back into the
machine-dependent headers; treat the implementation of __nanf in the
same spirit.
IEEE 754 leaves the distinction between signalling NaNs and quiet NANs
to the implementation, and unlike our headers used to suggest they're
not identical in the interpretation of the fraction's MSb; in due
course, make those of hppa, mips, sh3, and sh5 reflect reality.
|
| 1.3 | 26-Oct-2003 |
kleink | branches: 1.3.8; 1.3.14;
Use <sys/ieee754.h> where applicable.
|
| 1.2 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.1 | 29-Aug-1999 |
mycroft | branches: 1.1.36;
Add ieee.h.
|
| 1.1.36.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.1.36.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.36.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.36.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.3.14.1 | 19-Apr-2005 |
tron | Pull up revision 1.4 (requested by kleink in ticket #163):
Push back the descriptions of NaN formats, and descriptions of the
distinction between signalling NaNs and quiet NaNs back into the
machine-dependent headers; treat the implementation of __nanf in the
same spirit.
IEEE 754 leaves the distinction between signalling NaNs and quiet NANs
to the implementation, and unlike our headers used to suggest they're
not identical in the interpretation of the fraction's MSb; in due
course, make those of hppa, mips, sh3, and sh5 reflect reality.
|
| 1.3.8.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.5.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.5.96.1 | 29-Apr-2011 |
matt | Pull in true (128-bit) long double support for MIPS from -current.
|
| 1.7.12.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.7.12.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.7.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.9.2.1 | 18-May-2014 |
rmind | sync with head
|
| 1.11 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.10 | 22-Mar-2017 |
chs | provide a common softfloat fenv implemenation and use it for softfloat builds.
restore ABI compatibility with previous releases for ieeefp.h on sh3.
add namespace.h protection for all the fenv interfaces.
use MKSOFTFLOAT on sh3 instead of assuming softfloat.
standardize on comparing MKSOFTFLOAT with "no".
remove the arm-specific softfloat fenv code (which also had several bugs).
fix logic errors in the arm hardfloat feraiseexcept() and feupdateenv().
|
| 1.9 | 27-Feb-2017 |
chs | the FP_* rounding constants need to be different from the new FE_* constants
to preserve the ABI, so shift them as needed when using them.
|
| 1.8 | 25-Dec-2015 |
christos | branches: 1.8.2; 1.8.4;
remove dup fenv
|
| 1.7 | 19-Mar-2012 |
matt | branches: 1.7.2; 1.7.16;
Use unsigned int instead of int fo the fp* typedefs.
|
| 1.6 | 27-Jan-2011 |
tsutsui | branches: 1.6.4; 1.6.8;
Fix swapped comments.
|
| 1.5 | 05-Aug-2008 |
matt | branches: 1.5.12; 1.5.16; 1.5.22; 1.5.24;
Update <machine/ieeefp.h> to use the C99 FE_* definitions instead of the
NetBSD defined ones. Redefine the NetBSD ones in terms of the C99 ones.
Step 1 to having <fenv.h>
|
| 1.4 | 24-Apr-1999 |
simonb | branches: 1.4.138; 1.4.142; 1.4.144; 1.4.148;
Nuke register and remove trailling white space.
|
| 1.3 | 05-Jan-1998 |
perry | branches: 1.3.12;
RCSID Police.
|
| 1.2 | 18-Mar-1996 |
jonathan | NetBSD's ieee FP definitions for the pmax are valid for other mips cpus;
change preprocessor XXX_PMAX_YYY #defines to XXX_MIPS_YYY.
|
| 1.1 | 11-Apr-1995 |
jtc | Mips specific portions of ieeefp.h (fp_rnd, fp_except, constants, etc.).
|
| 1.3.12.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.4.148.1 | 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.4.144.1 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.4.142.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.4.138.1 | 28-Sep-2008 |
mjf | Sync with HEAD.
|
| 1.5.24.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.5.22.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.16.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.5.12.1 | 29-Apr-2011 |
matt | Pull in true (128-bit) long double support for MIPS from -current.
|
| 1.6.8.1 | 05-Apr-2012 |
mrg | sync to latest -current.
|
| 1.6.4.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.7.16.2 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.7.16.1 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.7.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.8.4.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.8.2.2 | 26-Apr-2017 |
pgoyette | Sync with HEAD
|
| 1.8.2.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.6 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.5 | 13-Aug-2014 |
matt | Include <sys/common_int_const.h> if __INTMAX_C_SUFFIX__ is defined.
|
| 1.4 | 29-May-2010 |
tnozaki | branches: 1.4.18;
fix wrong integer promotion rule(removed U suffix from UINT{8,16}_C).
see ISO/IEC 9899:1999 7.18.4.3.
|
| 1.3 | 28-Apr-2008 |
martin | branches: 1.3.20; 1.3.22;
Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 03-Nov-2002 |
thorpej | branches: 1.2.108; 1.2.110; 1.2.112;
Add LP64 macros.
|
| 1.1 | 14-Apr-2001 |
kleink | branches: 1.1.2; 1.1.4; 1.1.12;
Add definitions of C99 integer constant macros.
|
| 1.1.12.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.12.1 | 14-Apr-2001 |
nathanw | file int_const.h was added on branch nathanw_sa on 2002-11-11 22:00:27 +0000
|
| 1.1.4.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.1.2.2 | 21-Apr-2001 |
bouyer | Sync with HEAD
|
| 1.1.2.1 | 14-Apr-2001 |
bouyer | file int_const.h was added on branch thorpej_scsipi on 2001-04-21 17:54:01 +0000
|
| 1.2.112.2 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.2.112.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.2.110.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.108.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.3.22.1 | 30-May-2010 |
rmind | sync with head
|
| 1.3.20.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.4.18.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.6 | 13-Aug-2014 |
matt | include <sys/common_int_fmtio.h> if __INTPTR_FMTd__ is defined
|
| 1.5 | 14-Dec-2009 |
matt | branches: 1.5.22;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.4 | 28-Apr-2008 |
martin | branches: 1.4.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.3 | 03-Nov-2002 |
thorpej | branches: 1.3.108; 1.3.110; 1.3.112;
Add LP64 types, limits, formats.
|
| 1.2 | 26-Apr-2001 |
kleink | branches: 1.2.2; 1.2.10;
Add definitions for C99 fastest minimum-width integer types.
|
| 1.1 | 15-Apr-2001 |
kleink | branches: 1.1.2;
Add definitions of C99 integer format conversion macros.
XXX Fastest minimum-width integer types haven't been decided upon yet.
|
| 1.1.2.2 | 21-Apr-2001 |
bouyer | Sync with HEAD
|
| 1.1.2.1 | 15-Apr-2001 |
bouyer | file int_fmtio.h was added on branch thorpej_scsipi on 2001-04-21 17:54:01 +0000
|
| 1.2.10.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.10.1 | 26-Apr-2001 |
nathanw | file int_fmtio.h was added on branch nathanw_sa on 2002-11-11 22:00:27 +0000
|
| 1.2.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.3.112.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.3.112.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.3.110.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.3.108.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.4.18.1 | 11-Dec-2009 |
matt | Unless we are in O32, use long int for size_t/ptrdiff_t/intptr_t. This
allows N32 and N64 use both use the same type.
|
| 1.5.22.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.9 | 13-Aug-2014 |
matt | Include <sys/common_init_limits.h> if __SIG_ATOMIC_MAX__ is defined.
|
| 1.8 | 28-Apr-2008 |
martin | branches: 1.8.44;
Remove clause 3 and 4 from TNF licenses
|
| 1.7 | 17-Oct-2007 |
garbled | branches: 1.7.16; 1.7.18; 1.7.20;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.6 | 31-Aug-2007 |
drochner | Fix definitions of UCHAR_MAX/USHRT_MAX and related
types. C99 requires that these definitions promote to (signed/unsigned)
integer the same way as the types the definition is for. And since
unsigned char/short fit into an "int" on all our archs and thus promote
to signed int, the definitions must not be unsigned.
Fixes PR lib/31306 by Neil Booth.
|
| 1.5 | 11-Dec-2005 |
christos | branches: 1.5.30; 1.5.38; 1.5.44; 1.5.48; 1.5.50;
merge ktrace-lwp.
|
| 1.4 | 08-May-2004 |
kleink | branches: 1.4.12;
Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
|
| 1.3 | 03-Nov-2002 |
thorpej | branches: 1.3.6;
Add LP64 types, limits, formats.
|
| 1.2 | 26-Apr-2001 |
kleink | branches: 1.2.2; 1.2.10;
Add definitions for C99 fastest minimum-width integer types.
|
| 1.1 | 15-Apr-2001 |
kleink | branches: 1.1.2;
Add definitions of C99 specified-width integer type limits.
XXX Fastest minimum-width integer types haven't been decided upon yet.
|
| 1.1.2.2 | 21-Apr-2001 |
bouyer | Sync with HEAD
|
| 1.1.2.1 | 15-Apr-2001 |
bouyer | file int_limits.h was added on branch thorpej_scsipi on 2001-04-21 17:54:01 +0000
|
| 1.2.10.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.10.1 | 26-Apr-2001 |
nathanw | file int_limits.h was added on branch nathanw_sa on 2002-11-11 22:00:27 +0000
|
| 1.2.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.3.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.3.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.3.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.4.12.1 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.5.50.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.5.48.1 | 03-Sep-2007 |
jmcneill | Sync with HEAD.
|
| 1.5.44.1 | 03-Sep-2007 |
skrll | Sync with HEAD.
|
| 1.5.38.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.5.30.1 | 09-Oct-2007 |
ad | Sync with head.
|
| 1.7.20.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.7.18.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.7.16.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.8.44.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.6 | 13-Aug-2014 |
matt | include <sys/common_int_mwgwtypes.h> if __UINT_FAST64_TYPE__ is defined.
|
| 1.5 | 28-Apr-2008 |
martin | branches: 1.5.44;
Remove clause 3 and 4 from TNF licenses
|
| 1.4 | 24-Dec-2005 |
perry | branches: 1.4.74; 1.4.76; 1.4.78;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.3 | 03-Nov-2002 |
thorpej | branches: 1.3.22;
Add LP64 types, limits, formats.
|
| 1.2 | 26-Apr-2001 |
kleink | branches: 1.2.2; 1.2.10;
Add definitions for C99 fastest minimum-width integer types.
|
| 1.1 | 14-Apr-2001 |
kleink | branches: 1.1.2;
Add definitions of C99 minimum-width and greatest-width integer types.
XXX Fastest minimum-width integer types haven't been decided upon yet.
|
| 1.1.2.2 | 21-Apr-2001 |
bouyer | Sync with HEAD
|
| 1.1.2.1 | 14-Apr-2001 |
bouyer | file int_mwgwtypes.h was added on branch thorpej_scsipi on 2001-04-21 17:54:01 +0000
|
| 1.2.10.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.10.1 | 26-Apr-2001 |
nathanw | file int_mwgwtypes.h was added on branch nathanw_sa on 2002-11-11 22:00:28 +0000
|
| 1.2.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.3.22.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.4.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.4.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.5.44.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.12 | 13-Aug-2014 |
matt | Include <sys/common_int_types.h> if __UINTPTR_TYPE__ is defined.
|
| 1.11 | 14-Dec-2009 |
matt | branches: 1.11.22;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.10 | 24-Dec-2005 |
perry | branches: 1.10.78; 1.10.96;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.9 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.8 | 25-May-2005 |
kleink | branches: 1.8.2;
Include <sys/cdefs.h> for __signed; related to lib/30072.
|
| 1.7 | 07-Aug-2003 |
agc | branches: 1.7.6; 1.7.14;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.6 | 03-Nov-2002 |
thorpej | branches: 1.6.6;
Add LP64 types.
|
| 1.5 | 28-Apr-2001 |
kleink | branches: 1.5.8;
* Move definitions of exact-width integer types from <machine/types.h>
to <sys/types.h> and <sys/stdint.h>.
* Add a new C99 <stdint.h> header, which provides integer types of
explicit width, related limits and integer constant macros.
* Extend <inttypes.h> to provide <stdint.h> definitions and format
macros for printf() and scanf().
* Add C99 strtoimax() and strtoumax() functions.
* Use the latter within scanf().
* Add C99 %j, %t and %z printf()/scanf() conversions for
intmax_t, pointer-type and size_t arguments.
|
| 1.4 | 12-Apr-2001 |
kleink | Replace the 'unsigned __COMPILER_INT64__' construct with a new name,
__COMPILER_UINT64__, to be supplied - if such a case is made, it shouldn't
be assumed that the unsigned type-specifier may be applied to it.
|
| 1.3 | 03-Jan-2001 |
takemura | branches: 1.3.2;
replace 'long long' with int64_t to compile stand alone program with
compiler other than GCC.
|
| 1.2 | 27-Jun-2000 |
kleink | branches: 1.2.2;
Resolve some formatting nits; add __intptr_t and __uintptr_t.
|
| 1.1 | 26-Jun-2000 |
kleink | Add <machine/int_types.h>, which provides namespace-pure definitions
of exact-width integer types.
|
| 1.2.2.4 | 21-Apr-2001 |
bouyer | Sync with HEAD
|
| 1.2.2.3 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.2.2.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.2.2.1 | 27-Jun-2000 |
bouyer | file int_types.h was added on branch thorpej_scsipi on 2000-11-20 20:13:31 +0000
|
| 1.3.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.5.8.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.5.8.1 | 28-Apr-2001 |
nathanw | file int_types.h was added on branch nathanw_sa on 2002-11-11 22:00:28 +0000
|
| 1.6.6.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.6.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.6.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.6.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.7.14.1 | 28-May-2005 |
tron | Pull up revision 1.8 (requested by klein in ticket #346):
Include <sys/cdefs.h> for __signed; related to lib/30072.
|
| 1.7.6.1 | 29-May-2005 |
riz | Pull up revision 1.8 (requested by kleink in ticket #1555):
Include <sys/cdefs.h> for __signed; related to lib/30072.
|
| 1.8.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.10.96.1 | 11-Dec-2009 |
matt | Unless we are in O32, use long int for size_t/ptrdiff_t/intptr_t. This
allows N32 and N64 use both use the same type.
|
| 1.10.78.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.11.22.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.13 | 16-Feb-2021 |
simonb | Add no-profiled attribute for splhigh_noprof() and splx_noprof().
|
| 1.12 | 17-Aug-2020 |
skrll | branches: 1.12.2;
Disable __HAVE_PREEMPTION. It is currently marked
#if defined(MULTIPROCESSOR) && defined(__HAVE_FAST_SOFTINTS)
but has no chance of working on OCTEON due to at least the spl functions
|
| 1.11 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.10 | 06-Jun-2015 |
matt | Add a IPI for watchdogs.
|
| 1.9 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.8 | 19-May-2014 |
rmind | branches: 1.8.4;
Implement MI IPI interface with cross-call support.
|
| 1.7 | 11-Mar-2012 |
mrg | branches: 1.7.2; 1.7.12;
normalise RCSID handling some.
|
| 1.6 | 03-Mar-2012 |
matt | define IPL_SAFEPRI which will be used by kern_synch.c to initialize safepri.
|
| 1.5 | 02-May-2011 |
matt | branches: 1.5.4; 1.5.8;
Add an IPI for xcalls.
|
| 1.4 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.3 | 11-Apr-2000 |
nisimura | branches: 1.3.96; 1.3.98; 1.3.104; 1.3.106;
Introduce cpu_intr() whose body is now provided by target ports in
their own ways. Ugly fixup #define in machine/intr.h have gone.
mips_hardware_intr global variable patch work has gone.
|
| 1.2 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.1 | 26-Mar-1998 |
jonathan | branches: 1.1.16;
* Create /sys/arch/mips/include/intr.h, with extern declaration of
interrupt-callout vector from mips locore dispatch code to port code.
* Move branch-emulation declaration to mips/include/trap.h.
* Garbage-collect pmax/pmax/trap.h.
Not needed now pmax/pmax_trap.c is gone, and after above tidy-up.
|
| 1.1.16.1 | 20-Nov-2000 |
bouyer | Remove files that are no longer on the trunck
|
| 1.3.106.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.104.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.98.2 | 31-May-2011 |
rmind | sync with head
|
| 1.3.98.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.96.18 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.3.96.17 | 31-Dec-2011 |
matt | Add IST_EDGE_RISING and IST_EDGE_FALLING.
|
| 1.3.96.16 | 05-Feb-2011 |
cliff | - protect option includes ("opt_multiprocessor.h") with #ifdef _KERNEL_OPT
|
| 1.3.96.15 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for MULTIPROCESSOR dependency
- add IPI tag defines for SUSPEND, HALT, and bump NIPIS
|
| 1.3.96.14 | 22-Dec-2010 |
matt | Cleanup definition of __HAVE_PREEMPTION
|
| 1.3.96.13 | 09-Jun-2010 |
matt | Add a _IPL_NAMES(pfx) which is a list of strings corresponding to the
IPL names.
|
| 1.3.96.12 | 16-May-2010 |
matt | Add IPL_DDB. This is needed for watchdog on sbmips and for IPIs used by DDB.
It's above IPL_SCHED but below IPL_HIGH.
|
| 1.3.96.11 | 15-May-2010 |
matt | Make sure we have a spare cell at the sr_map to make splintr will stop.
|
| 1.3.96.10 | 24-Mar-2010 |
cliff | - add IPI_AST variant of IPI_NOP to allow seperate event counting
|
| 1.3.96.9 | 21-Mar-2010 |
cliff | - if __INTR_PRIVATE is not defined, declare (but do not define) struct splsw
|
| 1.3.96.8 | 11-Mar-2010 |
matt | s/IPI_ISYNC/IPI_SYNCICACHE/
|
| 1.3.96.7 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.3.96.6 | 28-Feb-2010 |
matt | Now that we use stubs for the spl* calls, we no longer need to export
struct splsw or struct ipl_sr_map to the world. So we protect those with
__INTR_PRIVATE.
|
| 1.3.96.5 | 23-Feb-2010 |
matt | Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that
in the interrupt init routine. There's a default ipl_sr_map will operate
correctly, but isn't performant.
|
| 1.3.96.4 | 22-Feb-2010 |
matt | Add initial list of IPIs for MIPS SMP.
|
| 1.3.96.3 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.3.96.2 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.3.96.1 | 11-Apr-2000 |
matt | file intr.h was added on branch matt-nb5-mips64 on 2010-02-15 07:36:03 +0000
|
| 1.5.8.3 | 06-Mar-2012 |
mrg | sync to -current
|
| 1.5.8.2 | 06-Mar-2012 |
mrg | sync to -current
|
| 1.5.8.1 | 04-Mar-2012 |
mrg | sync to latest -current.
|
| 1.5.4.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.7.12.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.7.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.8.4.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.12.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.9 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.8 | 18-Oct-2016 |
jdolecek | add isa_intr_establish_xname() to MD isa headers so that it can be used
by MI drivers
|
| 1.7 | 30-Mar-2014 |
macallan | branches: 1.7.6; 1.7.10;
catch up with *_intr_string() changes
|
| 1.6 | 29-Mar-2014 |
christos | make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.
|
| 1.5 | 14-Dec-2009 |
matt | branches: 1.5.12; 1.5.22; 1.5.26;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.4 | 19-Aug-2009 |
dyoung | (Re-)define isa_detach_hook(), and define isa_dmadestroy(). Update
some isa_chipset_tag_t->ic_detach_hook() definitions.
|
| 1.3 | 28-Apr-2008 |
martin | branches: 1.3.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 09-May-2003 |
fvdl | branches: 1.2.104; 1.2.106; 1.2.108;
A few ISA sound drivers like to share dma channels, and hence deferred
isa_dmamap_create() calls to their open/close entrypoints. This worked
with some luck, but broke on i386 when _bus_dmamap_create started
to allocate bounce buffers upfront, since memory below 16M may well
not be available when the sound devices is opened for the Nth time.
To fix this, create a new simple interface, isa_drq_alloc/isa_drq_free,
wrappers around already existing bitmask macros. These are expected
to be used before an isa_dmamap_create call, and after an
isa_dmamap_destroy call, respectively. For the sb and ad1848 drivers,
they're deferred until open/close.
All isa_dmamap_create calls can now use BUS_DMA_ALLOCNOW and be done
at attach time.
|
| 1.1 | 18-Mar-2002 |
simonb | branches: 1.1.4; 1.1.10;
Generic PCI/ISA machdep headers for mips; copied from the algor port.
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 18-Mar-2002 |
jdolecek | file isa_machdep.h was added on branch kqueue on 2002-06-23 17:38:02 +0000
|
| 1.1.4.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.4.1 | 18-Mar-2002 |
nathanw | file isa_machdep.h was added on branch nathanw_sa on 2002-04-01 07:40:58 +0000
|
| 1.2.108.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.108.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.2.108.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.2.106.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.104.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.3.18.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.5.26.1 | 18-May-2014 |
rmind | sync with head
|
| 1.5.22.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.22.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.5.12.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.7.10.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.7.6.1 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.4 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.3 | 12-Jun-2015 |
matt | Add back sysmapsize
|
| 1.2 | 11-Jun-2015 |
matt | u_int32_t -> uint32_t
|
| 1.1 | 19-Feb-1998 |
thorpej | branches: 1.1.174; 1.1.200; 1.1.220;
New crash dump format definition for NetBSD/mips.
|
| 1.1.220.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.200.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.174.1 | 27-Dec-2011 |
matt | Add pg_size to the cpu_kcore_hdr_t as well support for ksegx.
|
| 1.9 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.8 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.7 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.6 | 05-Mar-2002 |
simonb | branches: 1.6.14;
ANSIfy.
|
| 1.5 | 22-Jun-1997 |
jonathan | branches: 1.5.38; 1.5.42;
* Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.5.42.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.5.38.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.6.14.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.6.14.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.6.14.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.29 | 16-Mar-2024 |
christos | make all QUAD constants look the same.
|
| 1.28 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.27 | 21-Jan-2019 |
dholland | Fix wrong scoping of {U,}LLONG_MAX. More cases, not just amd64.
PR 53298 from Roberto E. Vargas Caballero.
|
| 1.26 | 21-Apr-2014 |
matt | branches: 1.26.26; 1.26.28;
Since all our compilers support __DBL_* and __FLT_*, use them to define
{DBL,FLT}_{DIG,MIN,MAX}
|
| 1.25 | 11-Apr-2013 |
christos | branches: 1.25.4; 1.25.8;
add missing SSIZE_MIN
|
| 1.24 | 28-Mar-2012 |
christos | branches: 1.24.2;
- Normalize inclusion protection (remove)
- Move CHAR_{MIN,MAX} to a common file.
- Fix broken comments
|
| 1.23 | 07-Jun-2010 |
tnozaki | branches: 1.23.8; 1.23.12;
1. MB_LEN_MAX switch MD to MI.
2. unfortunately hppa's MB_LEN_MAX is defined incorrectly 6 instead of 32
so we have to add more setlocale(3) __RENAME func, __setlocale50.
3. move setlocale1.c and setlocale32.c to lib/libc/compat/locale/*
prepareing for next libc major crunk.
4. bump libc minor version.
|
| 1.22 | 17-Oct-2007 |
garbled | branches: 1.22.20; 1.22.40; 1.22.42;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.21 | 31-Aug-2007 |
drochner | Fix definitions of UCHAR_MAX/USHRT_MAX and related
types. C99 requires that these definitions promote to (signed/unsigned)
integer the same way as the types the definition is for. And since
unsigned char/short fit into an "int" on all our archs and thus promote
to signed int, the definitions must not be unsigned.
Fixes PR lib/31306 by Neil Booth.
|
| 1.20 | 11-Dec-2005 |
christos | branches: 1.20.30; 1.20.38; 1.20.44; 1.20.48; 1.20.50;
merge ktrace-lwp.
|
| 1.19 | 07-Aug-2003 |
agc | branches: 1.19.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.18 | 28-Apr-2003 |
bjh21 | branches: 1.18.2;
Add a new feature-test macro, _NETBSD_SOURCE. If this is defined
by the application, all NetBSD interfaces are made visible, even
if some other feature-test macro (like _POSIX_C_SOURCE) is defined.
<sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE,
_POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve
existing behaviour.
This has two major advantages:
+ Programs that require non-POSIX facilities but define _POSIX_C_SOURCE
can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS.
+ It makes most of the #ifs simpler, in that they're all now ORs of the
various macros, rather than having checks for (!defined(_ANSI_SOURCE) ||
!defined(_POSIX_C_SOURCE) || !defined(_XOPEN_SOURCE)) all over the place.
I've tried not to change the semantics of the headers in any case where
_NETBSD_SOURCE wasn't defined, but there were some places where the
current semantics were clearly mad, and retaining them was harder than
correcting them. In particular, I've mostly normalised things so that
_ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE,
_XOPEN_SOURCE and _NETBSD_SOURCE in that order.
Tested by building for vax, encouraged by thorpej, and uncontested in
tech-userlevel for a week.
|
| 1.17 | 30-Nov-2002 |
simonb | Standardise on #ifdef _MIPS_<header>_H_ for multiple inclusion tests.
|
| 1.16 | 03-Nov-2002 |
thorpej | Add LP64 limits.
|
| 1.15 | 04-May-2001 |
simonb | branches: 1.15.8;
Be consistent with limit constants:
- use "U" suffix for unsigned constants
- use "L" suffix for long constants
- use "UL" suffix for unsigned long constants
- use hexadecimal instead of decimal
Fixes build problems with vi (now that warnings/errors are enabled) on
mips, powerpc and arm platforms.
|
| 1.14 | 08-Aug-2000 |
tshiozak | branches: 1.14.2;
Preparation for the future introduction of multibyte locale.
- MB_LEN_MAX is increased to 32.
- To ensure binary compatibility for old executables
under multibyte locale, versioned setlocale is added.
- __mb_len_cur definision is added in setlocale.c
and enable it in stdlib.h .
It is also important for multibyte locale stuffs,
but I just forgot.
|
| 1.13 | 07-Mar-2000 |
kleink | branches: 1.13.2; 1.13.4;
Define ISO C99 (unsigned) long long (min, max) symbols.
VS: ----------------------------------------------------------------------
|
| 1.12 | 06-Aug-1998 |
kleink | branches: 1.12.14;
_POSIX_SOURCE -> _POSIX_C_SOURCE
|
| 1.11 | 21-Feb-1998 |
jonathan | Pull up duplicated CPP definitions from float.h rev 1.10:
>DBL_MIN and DBL_MAX were less precise than they should have been.
|
| 1.10 | 09-Jan-1998 |
perry | multiple include protect machine/limits.h, fixes pr 4473 (from Mika Nystrom)
|
| 1.9 | 19-Mar-1996 |
jonathan | branches: 1.9.16;
Remove pmax-specific CLK_TICK to prepare for moving to sys/arch/mips.
|
| 1.8 | 28-Mar-1995 |
jtc | KERNEL -> _KERNEL
|
| 1.7 | 15-Nov-1994 |
dean | put #ifdef KERNEL around CLK_TCK define
|
| 1.6 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.5 | 05-Oct-1994 |
jtc | Add constants required by XPG3
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 14-Jan-1994 |
deraadt | some pmax updating (Terry Friedrichsen is helping on this now).
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.9.16.1 | 10-May-1998 |
mycroft | Pull up 1.11, per request of mhitch.
|
| 1.12.14.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.13.4.1 | 09-Aug-2000 |
tshiozak | pull up the following changes (approved by thorpej):
> cvs rdiff -r1.9 -r1.10 basesrc/include/locale.h
> cvs rdiff -r1.45 -r1.46 basesrc/include/stdlib.h
> cvs rdiff -r1.16 -r1.17 basesrc/lib/libc/locale/Makefile.inc
> cvs rdiff -r1.17 -r1.18 basesrc/lib/libc/locale/setlocale.c
> cvs rdiff -r0 -r1.2 basesrc/lib/libc/locale/setlocale_sb.c
> cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/alpha/include/limits.h
> cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/arm26/include/limits.h
> cvs rdiff -r1.7 -r1.8 syssrc/sys/arch/arm32/include/limits.h
> cvs rdiff -r1.14 -r1.15 syssrc/sys/arch/i386/include/limits.h
> cvs rdiff -r1.12 -r1.13 syssrc/sys/arch/m68k/include/limits.h
> cvs rdiff -r1.13 -r1.14 syssrc/sys/arch/mips/include/limits.h
> cvs rdiff -r1.10 -r1.11 syssrc/sys/arch/pc532/include/limits.h
> cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/powerpc/include/limits.h
> cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/sh3/include/limits.h
> cvs rdiff -r1.11 -r1.12 syssrc/sys/arch/sparc/include/limits.h
> cvs rdiff -r1.7 -r1.8 syssrc/sys/arch/sparc64/include/limits.h
> cvs rdiff -r1.9 -r1.10 syssrc/sys/arch/vax/include/limits.h
>
> Outline:
>
> Preparation for the future introduction of multibyte locale.
> - MB_LEN_MAX is increased to 32.
> - To ensure binary compatibility for old executables
> under multibyte locale, versioned setlocale is added.
> - __mb_len_cur definision is added in setlocale.c
> and enable it in stdlib.h .
> It is also important for multibyte locale stuffs,
> but I just forgot.
|
| 1.13.2.1 | 28-May-2000 |
minoura | Citrus Project XPG4DL, an implementation of I18N (locale) framework,
is imported.
|
| 1.14.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.15.8.3 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.15.8.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.15.8.1 | 04-May-2001 |
nathanw | file limits.h was added on branch nathanw_sa on 2002-11-11 22:00:28 +0000
|
| 1.18.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.18.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.18.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.19.16.1 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.20.50.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.20.48.1 | 03-Sep-2007 |
jmcneill | Sync with HEAD.
|
| 1.20.44.1 | 03-Sep-2007 |
skrll | Sync with HEAD.
|
| 1.20.38.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.20.30.1 | 09-Oct-2007 |
ad | Sync with head.
|
| 1.22.42.1 | 03-Jul-2010 |
rmind | sync with head
|
| 1.22.40.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.22.20.1 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.23.12.1 | 05-Apr-2012 |
mrg | sync to latest -current.
|
| 1.23.8.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.23.8.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.24.2.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.24.2.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.25.8.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.25.4.1 | 18-May-2014 |
rmind | sync with head
|
| 1.26.28.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.26.26.1 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.23 | 09-Apr-2022 |
riastradh | mips: Convert lock.h to membar_release/acquire.
|
| 1.22 | 12-Feb-2022 |
riastradh | mips: Brush up __cpu_simple_lock.
- Eradicate last vestiges of mb_* barriers.
- In __cpu_simple_lock_init, omit needless barrier. It is the
caller's responsibility to ensure __cpu_simple_lock_init happens
before other operations on it anyway, so there was never any need
for a barrier here.
- In __cpu_simple_lock_try, leave comments about memory ordering
guarantees of the kernel's _atomic_cas_uint, which are inexplicably
different from the non-underscored atomic_cas_uint.
- In __cpu_simple_unlock, use membar_exit instead of mb_memory, and do
it unconditionally.
This ensures that in __cpu_simple_lock/.../__cpu_simple_unlock, all
memory operations in the ellipsis happen before the store that
releases the lock.
- On Octeon, the barrier was omitted altogether, which is a bug --
it needs to be there or else there is no happens-before relation
and whoever takes the lock next might see stale values stored or
even stomp over the unlocking CPU's delayed loads.
- On non-Octeon, the mb_memory was sync. Using membar_exit
preserves this.
XXX On Octeon, membar_exit only issues syncw -- this seems wrong,
only store-before-store and not load/store-before-store, unless the
CNMIPS architecture guarantees it is sufficient here like
SPARCv8/v9 PSO (`Partial Store Order').
- Leave an essay with citations about why we have an apparently
pointless syncw _after_ releasing a lock, to work around a design
bug^W^Wquirk in cnmips which sometimes buffers stores for hundreds
of thousands of cycles for fun unless you issue syncw.
|
| 1.21 | 05-Aug-2020 |
simonb | Indent branch delay slots in asm code (from skrll@).
Be consistent within this file with how asm code is formatted.
|
| 1.20 | 17-Sep-2017 |
christos | more const.
|
| 1.19 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.18 | 20-Feb-2011 |
matt | branches: 1.18.14; 1.18.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.17 | 12-Jan-2009 |
pooka | branches: 1.17.6; 1.17.8; 1.17.10;
Use userspace version unless _HARDKERNEL. Otherwise we use atomic
cas to implement spinlocks and spinlocks to implement atomic cas....
which might suck.
Since the userspace version uses ll/sc, which doesn't exist on
R2000/R3000, rump will not work on those platforms. *snif* (well,
pthread in general AFAICT).
|
| 1.16 | 28-Apr-2008 |
martin | branches: 1.16.8; 1.16.16;
Remove clause 3 and 4 from TNF licenses
|
| 1.15 | 29-Nov-2007 |
ad | branches: 1.15.14; 1.15.16; 1.15.18;
- Change _lock_cas and friends to do "compare and swap" instead of "compare
and set".
- Rename them to _atomic_cas_uint, _atomic_cas_ulong etc and provide strong
aliases for the other names CAS goes by.
|
| 1.14 | 17-Oct-2007 |
garbled | branches: 1.14.2;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.13 | 10-Sep-2007 |
skrll | Merge nick-csl-alignment.
|
| 1.12 | 15-Feb-2007 |
ad | branches: 1.12.6; 1.12.14; 1.12.18; 1.12.22; 1.12.24;
Pacify lint/gcc.
|
| 1.11 | 10-Feb-2007 |
nakayama | s/___asm/__asm/
|
| 1.10 | 09-Feb-2007 |
ad | Merge newlock2 to head.
|
| 1.9 | 03-Jun-2006 |
simonb | branches: 1.9.6;
Adjust asm constraints for more pickier gcc4.
|
| 1.8 | 28-Dec-2005 |
perry | branches: 1.8.4; 1.8.6; 1.8.8; 1.8.14;
inline -> __inline
|
| 1.7 | 24-Dec-2005 |
perry | Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.6 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.5 | 26-Sep-2003 |
nathanw | branches: 1.5.16;
Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
so that they can be used in a namespace-friendly way.
|
| 1.4 | 05-Dec-2002 |
simonb | branches: 1.4.6;
Drop the _KERNEL test; these functions are needed for SMP and other ports
don't bother with a _KERNEL check.
|
| 1.3 | 16-Sep-2002 |
gmcgarry | Bring down from nathanw_sa branch.
|
| 1.2 | 02-May-2000 |
thorpej | branches: 1.2.6; 1.2.10; 1.2.14;
Let each platform typedef the new __cpu_simple_lock_t, which should
be the most efficient type used for the atomic operations in the
simplelock structure, and should also be __volatile.
|
| 1.1 | 29-Apr-2000 |
thorpej | Require that each each MACHINE/MACHINE_ARCH supply a lock.h. This file
contains the values __SIMPLELOCK_LOCKED and __SIMPLELOCK_UNLOCKED, which
replace the old SIMPLELOCK_LOCKED and SIMPLELOCK_UNLOCKED. These files
are also required to supply inline functions __cpu_simple_lock(),
__cpu_simple_lock_try(), and __cpu_simple_unlock() if locking is to be
supported on that platform (i.e. if MULTIPROCESSOR is defined in the
_KERNEL case). Change these functions to take an int * (&alp->lock_data)
rather than the struct simplelock * itself.
These changes make it possible for userland to use the locking primitives
by including <machine/lock.h>.
|
| 1.2.14.4 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.2.14.3 | 14-Jul-2002 |
gmcgarry | Can't load the lock in the delay slot of its test. Also explicitly
include delay slots according to common convention.
|
| 1.2.14.2 | 29-Nov-2001 |
wdk | Fix branch instruction in delay slot. Ooops!!
|
| 1.2.14.1 | 28-Nov-2001 |
wdk | Add support for R4x00 locks using LL/SC. Needed by new libpthread
As discussed on Mips mailing list there is no equivalent functionality
for R3000 processors. Restartable Atomic Sequences will be implemented
in the future to provide similar functionality on R3000 uniprocessor
machines.
|
| 1.2.10.1 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.2.6.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.2.6.1 | 02-May-2000 |
bouyer | file lock.h was added on branch thorpej_scsipi on 2000-11-20 20:13:31 +0000
|
| 1.4.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.4.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.4.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.16.4 | 07-Dec-2007 |
yamt | sync with head
|
| 1.5.16.3 | 27-Oct-2007 |
yamt | sync with head.
|
| 1.5.16.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.5.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.8.14.1 | 19-Jun-2006 |
chap | Sync with head.
|
| 1.8.8.1 | 26-Jun-2006 |
yamt | sync with head.
|
| 1.8.6.1 | 07-Jun-2006 |
kardel | Sync with head.
|
| 1.8.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.9.6.2 | 27-Jan-2007 |
ad | Make mips systems work.
|
| 1.9.6.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.12.24.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.12.24.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.12.22.2 | 03-Dec-2007 |
joerg | Sync with HEAD.
|
| 1.12.22.1 | 02-Oct-2007 |
joerg | Sync with HEAD.
|
| 1.12.18.1 | 15-Aug-2007 |
skrll | Provide __SIMPLELOCK_{UN,}LOCKED_P and __cpu_simple_lock_{set,clear}
for all architectures.
|
| 1.12.14.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.12.6.2 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.12.6.1 | 09-Oct-2007 |
ad | Sync with head.
|
| 1.14.2.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.15.18.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.15.18.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.15.16.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.15.14.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.15.14.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.16.16.1 | 15-Feb-2010 |
matt | In SIMPLELOCK_LOCKED_P check against != UNLOCKED instead of == LOCKED.
This is so the compiler can emit a bnez instead of loading 1 into a register
and then doing beq.
|
| 1.16.8.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.17.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.17.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.17.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.18.32.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.18.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.119 | 27-May-2021 |
simonb | Rename the unhelpfully named mips_emul_lwc0() and mips_emul_swc0() to
mips_emul_ll() and mips_emul_sc(); make these static to mips_emul.c.
|
| 1.118 | 12-May-2021 |
simonb | Whitespace nit.
|
| 1.117 | 02-Mar-2021 |
skrll | branches: 1.117.4; 1.117.6;
Ensure the "memory" clobber is on inline assembly store operations
No binary change of note with this change in MALTA32
|
| 1.116 | 22-Aug-2020 |
simonb | branches: 1.116.2;
Invert the MIPS-I non-4kB page size check. The previous check doesn't
fail if both MIPS1 and MIPS3_PLUS are defined. Explictly check against
MIPS1.
|
| 1.115 | 17-Aug-2020 |
mrg | port crash(8) to mips. (most of the kernel side.)
- expose parts of _KERNEL to _KMEMUSER as well
- hide more things for _KERNEL
- avoid DB_MACHINE_COMMANDS in crash(8)
- XXX add mips_label_t for !_KERNEL and use it in the pcb to
avoid conflicting with the ddb/crash one
- enable dumppcb
some changes to make stack trace fail instead of SEGV and
the userland changes to crash itself not part of this change.
|
| 1.114 | 15-Aug-2020 |
mrg | move stacktrace_subr() from trap.c into new mips_stacktrace.c so
it can be shared between ddb, other mips kernel components (see
locore), and an upcoming crash(8) port.
remove second copy of kdbpeek() (hidden by old DDB_TRACE
option, but they're functionally equivalent.)
tested on octeon.
ok simonb@
|
| 1.113 | 31-Jul-2020 |
simonb | Fix a tyop. Thankfully this #define was unused.
|
| 1.112 | 31-Jul-2020 |
simonb | CP0 Config6 and Config7 aren't probeable. Adjust comments for these two.
|
| 1.111 | 27-Jul-2020 |
skrll | Fix typo _MODULAR -> _MODULE. Hopefully this fixes the builds.
|
| 1.110 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.109 | 23-Jul-2020 |
skrll | unifdef -U_LKM
|
| 1.108 | 23-Jul-2020 |
skrll | Trailing whitespace
|
| 1.107 | 14-Jun-2020 |
simonb | Retire MIPS_CP0FL_USERLOCAL and MIPS_CP0FL_HWRENA and the flawed
logic that tried to deal with a MIPS processor that supports the ULR
CP0 register. Probe correctly and save probed info somewhere we can
actually use it. Avoids problems where libc expects ULR set to a
value but the CPU definition in the CPU table didn't have the right
combination of magic flags and thus never set ULR in the first place.
|
| 1.106 | 13-Jun-2020 |
simonb | Note some hard-coded capabilties that can be probed.
XXX: Fix this and CPU table in mips/mips_machdep.c one day...
|
| 1.105 | 24-May-2020 |
simonb | Add mipsNN_cp0_rdhwr_cpunum() which returns the current CPU number
read from the CPUNum hardware register on MIPS{32,64}R2.
|
| 1.104 | 06-Apr-2019 |
thorpej | Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.103 | 08-Feb-2018 |
bouyer | branches: 1.103.4;
Allow kdbpeek() to return failure. If it does, stop the stack trace.
Prevents an infinite loop in ddb if something goes wrong.
|
| 1.102 | 16-Mar-2017 |
chs | allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.
|
| 1.101 | 13-Oct-2016 |
macallan | branches: 1.101.2;
sprinkle #ifndef __ASSEMBLER__ to make this file usable from .S - mostly for
macros like MIPS3_PLUS
|
| 1.100 | 11-Jul-2016 |
matt | branches: 1.100.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.99 | 09-Jun-2015 |
matt | Fix mips_fixup_zero_relative to have a third argument (ignored).
When reading COP0 EBASE, verify that the fixed bits have the right value.
|
| 1.98 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.97 | 02-May-2015 |
matt | mips_{l,s}d_a64 only valid for !O32
|
| 1.96 | 01-May-2015 |
christos | change #error to KASSERT
|
| 1.95 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.94 | 22-Nov-2014 |
macallan | branches: 1.94.2;
deal with Ingenic XBurst CPUs
|
| 1.93 | 19-Feb-2012 |
rmind | branches: 1.93.2;
Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.92 | 17-Aug-2011 |
matt | branches: 1.92.2; 1.92.6;
Redo mips_fixup so that it can handle indirect loads and deal with loongson2
extra instructions.
|
| 1.91 | 01-Jul-2011 |
dyoung | Don't #include "opt_cputype.h" unless _KERNEL_OPT is #defined.
|
| 1.90 | 29-Apr-2011 |
matt | ras atomicvec is no more.
|
| 1.89 | 14-Apr-2011 |
matt | Fix printing of watch{lo,hi} and make mipsNN_watchlo_* use intptr_t so that
sign extention happens.
|
| 1.88 | 14-Apr-2011 |
cliff | - add lsw_cpu_run function pointer to struct locoresw
|
| 1.87 | 12-Apr-2011 |
matt | Add prototypes for mipsNN_cp0_watch{lo,hi}_{read,write}
|
| 1.86 | 06-Apr-2011 |
matt | Add a tiny bit of whitespace.
|
| 1.85 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.84 | 03-Mar-2011 |
matt | Change MIPS_CP0FL_CONFIG*
Add MIPS_CP0FL_HWRENA and USERLOCAL
|
| 1.83 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.82 | 26-Jan-2011 |
pooka | Add support for the Extensible MIPS ("eMIPS") platform. The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.
eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing. eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.
NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman. Microsoft Corporation has
donated full copyright to The NetBSD Foundation.
Platform support for eMIPS is the first part of Microsoft's
contribution. The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.
|
| 1.81 | 27-Feb-2010 |
snj | branches: 1.81.2; 1.81.4; 1.81.6;
Fix a couple old typos in comments.
|
| 1.80 | 14-Dec-2009 |
matt | branches: 1.80.2;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.79 | 30-May-2009 |
martin | Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.78 | 17-Oct-2007 |
garbled | branches: 1.78.20; 1.78.30; 1.78.36;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.77 | 17-Jun-2007 |
tsutsui | branches: 1.77.10;
Move declaretions of _spl*() and _{clr,set}softintr() functions
(which are in mips/locore.S) into <mips/locore.h>
from various MD files.
|
| 1.76 | 17-May-2007 |
yamt | merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.75 | 04-Mar-2007 |
christos | branches: 1.75.2; 1.75.4; 1.75.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.74 | 16-Feb-2006 |
perry | branches: 1.74.20;
Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.
As per core@.
|
| 1.73 | 24-Dec-2005 |
perry | branches: 1.73.2; 1.73.4; 1.73.6;
__asm__ -> __asm
__const__ -> const
__inline__ -> inline
__volatile__ -> volatile
|
| 1.72 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.71 | 05-Nov-2005 |
tsutsui | Add MI mips3 wired map functions based on patch in port-mips/31915
from Garrett D'Amore of Tadpole Computer Inc.
Please refer discussion filed in the PR for details.
|
| 1.70 | 30-Oct-2005 |
tsutsui | Use #define<space> for consistency.
|
| 1.69 | 08-Sep-2005 |
tsutsui | branches: 1.69.2;
Add mips3_cp0_pg_mask_write() to initialize pagemask register.
|
| 1.68 | 13-Feb-2004 |
wiz | branches: 1.68.6; 1.68.14; 1.68.16;
Uppercase CPU, plural is CPUs.
|
| 1.67 | 29-Oct-2003 |
simonb | Add some more MIPS vendor IDs.
|
| 1.66 | 05-Oct-2003 |
tsutsui | No need to include opt_mips_cache.h here.
|
| 1.65 | 04-Nov-2002 |
thorpej | branches: 1.65.6;
Use named indices for RA, SR, MULLO, MULHI, and EPC in the
trapframe.
|
| 1.64 | 04-Nov-2002 |
thorpej | Define named constants for the trapframe register idices (they
are different from the normal register numbers). Use these names
in genassym.cf. (Wow, how ever did that test kernel boot before...)
|
| 1.63 | 03-Jun-2002 |
simonb | Add prototypes for the 64-bit pagezero functions.
Bracket some function prototypes with #ifdef/#endif.
|
| 1.62 | 01-Jun-2002 |
simonb | Use CPU_MIPS_USE_WAIT and CPU_MIPS_NO_WAIT in the CPU table, and use
the generic name "mips_wait_idle" for the old function that had both
rm52xx_idle and mipsNN_idle entry points.
|
| 1.61 | 13-May-2002 |
simonb | branches: 1.61.2;
Add a comment after an #endif to match up with an #ifdef.
|
| 1.60 | 11-Mar-2002 |
uch | make this compile and work with MIPS3_5900.
|
| 1.59 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Add mips32 and mips64 locore function prototypes.
- Add mips3_lw_a64() and mips3_sw_a64() for access data at any
64bit address (from Broadcom Corp).
- Add Broadcom and Sandcraft CPU company ids.
|
| 1.58 | 14-Nov-2001 |
thorpej | branches: 1.58.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.57 | 16-Oct-2001 |
uch | branches: 1.57.2;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.56 | 18-Aug-2001 |
simonb | Reorder some function prototypes more logically.
|
| 1.55 | 15-Aug-2001 |
simonb | Add Alchemy and SiByte company IDs (from oss.sgi.com).
|
| 1.54 | 15-Aug-2001 |
simonb | Remove parameter names from function prototypes.
|
| 1.53 | 11-Jun-2001 |
thorpej | branches: 1.53.2;
Always indirect through the "locoresw" to get the cache ops, since
there are just far too many combinations to handle with magic
#ifdefs in any sane way. Also, add a HitFlushDCache op to the
"locoresw", and fill it in as appropriate (it's NULL on MIPS-I,
so watch out).
These changes ensure that my R4600 Indy (with 2-way cache) gets
the correct cache ops when the kernel is built with only MIPS3
support, resulting in a kernel that is significantly more stable.
|
| 1.52 | 31-Oct-2000 |
jeffs | branches: 1.52.2;
Add mips_pagecopy/zero assembly loops for use by pmap_copy/zero_page*()
to allow the almost-64-bit compilation use ld/sd.
|
| 1.51 | 31-Oct-2000 |
jeffs | Add mips_indexof() macro to make code for checking the cache index
easier to read.
|
| 1.50 | 09-Oct-2000 |
nisimura | mips1_ConfigCache() has gone.
|
| 1.49 | 05-Oct-2000 |
cgd | clean up and consistency for CP0 Count, Compare, Wired, and Config
access function names and prototypes.
|
| 1.48 | 05-Oct-2000 |
cgd | nuke mips3_clearBEV(). There's really no point in coding a
special-purpose assembly routine for things like this.
|
| 1.47 | 05-Oct-2000 |
cgd | tweak cpu_arch. Eliminate all direct checks of it (making them
use the macro CPUISMIPS3 -- which is badly misnamed), and set it
from #defines named CPU_ARCH_N (where N is 1..5, 32, 64).
|
| 1.46 | 04-Oct-2000 |
cgd | rename mips_read_causereg -> mips_cp0_cause_read. nuke prototype
for mips_read_statusreg (which was apparently never implemented).
Provide prototypes and implementations for mips_cp0_cause_write,
mips_cp0_status_read, and mips_cp0_status_write. (Writing can, of
course, be quite dangerous.)
|
| 1.45 | 03-Oct-2000 |
cgd | add some additional info re: MIPS32 PRID encoding, derived from
the ``MIPS32 4K Processor Core Family Software User's Manual
Revision 01.07 June 19, 2000", available on the web from:
http://www.mips.com/declassified/Declassified_2000/MD00016-2B-4K-SUM-01.07.pdf
|
| 1.44 | 02-Oct-2000 |
cgd | provide mips3_ld() and mips3_sd(), functions which provide safe wrappers
for mips3 (and later) 'ld' and 'sd' instructions. These currently
only are properly implemented for the _MIPS_BSD_API_LP32 and
_MIPS_BSD_API_LP32_64CLEAN 'API's. They're pretty messy, but when you
need them, you really need them.
|
| 1.43 | 16-Sep-2000 |
nisimura | Introduce new MIPS1 direct mapped cache capacity detection logics.
|
| 1.42 | 16-Sep-2000 |
chuck | IDT32364's Config register uses a different base for IC/DC (instruction
and data cache sizes). R4000 uses 2^(12+IC) and 2^(12+DC). IDT32364
uses 2^(9+IC) and 2^(9+DC).
abstract around the problem by making the base a parameter to the
MIPS3_CONFIG_CACHE_SIZE macro. we pass the base down from mips_vector_init
to mips3_vector_init and to mips3_ConfigCache (where it is used).
XXX: someone with an MIPS3_4100 should switch to this and get rid
of the ugly ifdefs in cpuregs.h
|
| 1.41 | 13-Sep-2000 |
chuck | kill mips3_write_xcontext_upper
|
| 1.40 | 27-Jul-2000 |
cgd | convert PRID handling to use macros on an int, not bit-fields.
there's no reason to use bit-fields, and they just complexity to
the header.
|
| 1.39 | 20-Jul-2000 |
jeffs | Make pmap_prefer() use a global setting based on cache size
instead of assuming 64KB. This allows best fit and will
support bigger caches.
|
| 1.38 | 29-Jun-2000 |
cgd | un-__P, clean up spacing a little bit, put fwd struct decl(s) near top
rather than embedded. no functional changes.
|
| 1.37 | 26-Jun-2000 |
nisimura | Abandon {mips1,mips3}_TBRPL()s which have little gain. They were
expected to be better than MachTLBUpdate(). After all, TLBUpdate()
is rather harmful and should be replaced with TBIS().
|
| 1.36 | 20-Jun-2000 |
soda | branches: 1.36.2;
3rd argument of TBRPL() is not paddr_t but PTE.
XXX - mips3_TBRPL seems to be never called.
|
| 1.35 | 20-Jun-2000 |
soren | Add mips3_write_config().
|
| 1.34 | 06-Jun-2000 |
soren | Rename RM5200 cache ops to mips3_*_2way in anticipation of using them
for other CPUs with 2-way set associative L1 caches as well.
|
| 1.33 | 23-May-2000 |
soren | branches: 1.33.2;
MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,
so remove references them, and do a little other cleanup.
|
| 1.32 | 21-May-2000 |
soren | Include opt_cputype.h.
|
| 1.31 | 10-May-2000 |
nisimura | Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3. It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs. mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.
|
| 1.30 | 12-Apr-2000 |
nisimura | - Implement mips3_TBIAP().
- Remove obsoluted routines in locore_mips3.S
- addiu -> addu, andi -> and, ori -> or.
|
| 1.29 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.28 | 27-Mar-2000 |
nisimura | Have TBIA/TBIAP an argument refering to a global variable instead
of a compile time constant.
|
| 1.27 | 27-Mar-2000 |
nisimura | - Rename some of TLB ops to have handy abbrivations hired from VAX and
ALPHA; mips1_TBIA, mips1_TBIAP, mips1_TBIS.
- Make sure TBIA and TBIAP ops to have an argument for the size of TLB
which varies across even for MIPS1 implementations.
- Nuke the unused cpu_isa field from processor personality list.
- XXX XXX XXX
it's less-than-optimal and likely a mistake to have TLBUpdate().
It's costy to try to invalidate a single TLB entry whenver a certain
PTE is going to be modified by traversing the entire TLB looking
for the modified PTE because the PTE in question is not in TLB in
most cases. ASID bump could do the invalidation smartly. Solution
is planned for now.
|
| 1.26 | 23-Mar-2000 |
soren | Make MIPS1+MIPS3 compile again.
|
| 1.25 | 19-Mar-2000 |
soren | Updated RM5231 cache code from Jeff Smith and Ethan Solomita at Geocast.
Many thanks.
|
| 1.24 | 28-Jan-2000 |
takemura | CPU specific idle hook and VR idle routine.
|
| 1.23 | 09-Jan-2000 |
simonb | Prototype stacktrace() and logstacktrace().
|
| 1.22 | 12-Nov-1999 |
nisimura | Make sure wbflush symbol treated as a C function call.
|
| 1.21 | 25-Sep-1999 |
shin | branches: 1.21.2; 1.21.4; 1.21.8;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.20 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.19 | 27-Feb-1999 |
jonathan | branches: 1.19.4;
Define C structures (struct kernframe, struct trapframe)
for kernel-to-user trapframe. Use C structs in genassym.cf.
|
| 1.18 | 15-Jan-1999 |
castor | * Add prototype for mips1_clean_tlb
* Add the correct version of locore_mips1.S [ See previous revision for
description of changes ]
* Use defopt'ed MIPS3_L2CACHE_ABSENT in mips_machdep.c and pmap.c
to avoid generating extraneous code.
* GC pmap_set_referenced in pmap.c
|
| 1.17 | 15-Jan-1999 |
castor | Protect defopt against -D_LKM
|
| 1.16 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.15 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.14 | 11-Sep-1998 |
jonathan | branches: 1.14.2;
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.13 | 23-Apr-1998 |
jonathan | Commit change missed during Decsystem 5100 chagnes:
prototype declearation for method to override wbflush() callback
vector with model-specific code. Used on DEC r2000a machines with
writebuffers which indicate writebuffer drain via cp0 usability bit.
|
| 1.12 | 22-Jun-1997 |
jonathan | Fix typo mips3_mips_switch_exit.
|
| 1.11 | 22-Jun-1997 |
jonathan | Final changes for configuring MIPS1 and MIPS3 in a single kernel.
* cpuregs.h:
rename remaining VMMACH_xxx TLB macros to MIPS_TLB_xxx.
Add compile-time MIPS3-only, compile-time MIPS1-only, and
runtime (both) definitions for number of TLB ASIDs (tlb pids)
and shift count to extract a TLB pid.
* locore.h:
Delete unused vector slot for indexed TLB writes.
mips1 and mips3 TLBs are different enough that we have
to break them out at the caller anyway.
* Add compile-time MIPS3-only andcompile-time MIPS1-only
macros to call locore functions directly by name.
Use the existing method table only if
* mips/mips_machdep.c, mips/trap.c, mips/pmap.c, pmax/machdep.c:
Use MIPS3_ or MIPS1_ specific names for TLB pids in
mips3 and mips1 specific code paths (e.g., creating the kernel stack
for process 0).
Add `options MIPS3' to pmax/conf/GENERIC.
|
| 1.10 | 21-Jun-1997 |
mhitch | MachHitFlushDCache is gone.
|
| 1.9 | 19-Jun-1997 |
mhitch | More merged mips1/mips3 support:
Remove cpu-specific routines from locore.S and add them to locore_r2000.S
and locore_r4000.S. Add entries in locore jump vector table for switch_exit()
and the cpu_switch() context resume.
Add offsets into the jump vector to genassym.cf for use in locore.S.
|
| 1.8 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.7 | 16-Jun-1997 |
jonathan | Garbage-collect redundant declarations:
mips/include/locore.h:
Add prototypes for HitFlushDCache() functions. Moe cpu_prid definition here.
mips/include/cpu.h:
remove cpu_prid definition.
pmax/pmax/machdep.c:
remove local protoypes of HitFlushDCache() functions.
mips/mips/vm_machdep.c, mips/mips/vm_machdep.c::
remove local protoypes of HitFlushDCache() functions.
|
| 1.6 | 16-Jun-1997 |
jonathan | Yet more merging:
* Move declaration of locore communcation variables (CPU family,
cache sizes, etc) to mips/include/locore.h. Delete from
pmax/include/cpu.h and older versions from pica/include/cpu.h.
* Move definitions of CLKF_BASEPRI, CLKF_USERMODE to mips/include/cpu.
* Delete duplicate definitions in pica/include/cpu.h, pmax/include/cpu.h.
|
| 1.5 | 15-Jun-1997 |
mhitch | DECstation MIPS3 support: wbflush() is cpu-dependent, need declaration from
machine/locore.h.
From Toru Nishimura: _FORKBRAINDAMAGE is gone, user process entered through
proc_trampoline() [also cpu-dependent].
|
| 1.4 | 25-May-1997 |
jonathan | lint: prototype blkclr __P((caddr_t val, int size)). Used in pmap code.
|
| 1.3 | 13-Oct-1996 |
jonathan | Rename mips CPU-family locore prefixes for case-consistency:
mips_r2000_, mips_R2000_ -> mips1_
mips_r4000_, mips_R4000_ -> mips3_
(which are also, for mnemonic reasons, consistent with gcc flag usage,
rather than using mipsI_ and mipsIII_).
|
| 1.2 | 20-May-1996 |
jonathan | * Move the declarations of mips locore functions from the pmax tree
to the mips tree.
* Add declarations of functions used by vm_machdep.c.
* Add declarations of functions printed by name in stack tracebacks.
* Add declarations of functions used by the model-independnet mips machdep.c
code.
|
| 1.1 | 19-May-1996 |
jonathan | Define the conventional pmax locore entry-point names to be calls through
an vector (struct) of function pointers. Add prototype declarations for
each vector entry.
Add declarations for the r2000 (MIPS-I) and r4000 (MIPS-III) locore
versions of the relevant functions.
|
| 1.14.2.1 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.19.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.21.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.21.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.21.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.21.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.33.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.36.2.3 | 22-Jun-2000 |
soren | Apply lost section from previous pull-up.
|
| 1.36.2.2 | 22-Jun-2000 |
soren | Pull-up from trunk: correct _TBRPL() prototype and remove from pmap.c.
|
| 1.36.2.1 | 20-Jun-2000 |
soren | file locore.h was added on branch netbsd-1-5 on 2000-06-22 05:11:20 +0000
|
| 1.52.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.53.2.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.53.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.53.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.53.2.1 | 25-Aug-2001 |
thorpej | Merge Aug 24 -current into the kqueue branch.
|
| 1.57.2.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.58.2.4 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.58.2.3 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.58.2.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.58.2.1 | 14-Nov-2001 |
nathanw | file locore.h was added on branch nathanw_sa on 2002-04-01 07:40:58 +0000
|
| 1.61.2.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.65.6.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.65.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.65.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.65.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.68.16.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.68.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.68.14.1 | 11-Sep-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #758):
sys/arch/mips/include/locore.h: revision 1.69
sys/arch/mips/mips/locore_mips3.S: revision 1.87
Add mips3_cp0_pg_mask_write() to initialize pagemask register.
|
| 1.68.6.1 | 13-Sep-2005 |
riz | Pull up following revision(s) (requested by tsutsui in ticket #5829):
sys/arch/mips/include/locore.h: revision 1.69
sys/arch/mips/mips/locore_mips3.S: revision 1.87
Add mips3_cp0_pg_mask_write() to initialize pagemask register.
|
| 1.69.2.1 | 02-Nov-2005 |
yamt | sync with head.
|
| 1.73.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.73.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.73.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.74.20.2 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.74.20.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.75.10.2 | 26-Jun-2007 |
garbled | Sync with HEAD.
|
| 1.75.10.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.75.4.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.75.2.2 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.75.2.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.77.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.78.36.1 | 09-Jun-2009 |
snj | branches: 1.78.36.1.2;
Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.78.36.1.2.36 | 09-Jul-2012 |
matt | Add mips_cpu_switchto prototype.
|
| 1.78.36.1.2.35 | 14-Feb-2012 |
matt | Fix various LP64 thinkos.
|
| 1.78.36.1.2.34 | 13-Feb-2012 |
matt | Add mm_md_direct_mapped_virt (inverse of mm_md_direct_mapped_phys). Add a
third argument, vsize_t *, which, if not NULL, returns the amount of virtual
space left in that direct mapped segment.
Get rid most of the individual direct_mapped assert and use the above
routines instead.
Improve kernel core dump code.
|
| 1.78.36.1.2.33 | 13-Feb-2012 |
matt | Fix emulation to not panic when it encounters something it doesn't like.
(so running crashme won't crash the system).
Centralize the trapsignal processing so we can print out the trap info if
so desired.
Add a machdep.printfataltraps sysctl knob.
|
| 1.78.36.1.2.32 | 09-Feb-2012 |
matt | Update mips_fixup.c to version from -HEAD.
Move cpu_switchto to locore jumpvec and create a stub for it.
|
| 1.78.36.1.2.31 | 23-Dec-2011 |
matt | add more mipsNN_cp0_config{3,4,5,6,7}_{read,write}.
Add mips3_cp0_random_read().
Add L3 encoding for RMI.
|
| 1.78.36.1.2.30 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.78.36.1.2.29 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.78.36.1.2.28 | 29-Dec-2010 |
matt | Add wbflush to jumpvec while leaving it in locoresw. This allows to
overwrite wbflush in locoresw but still be able to call it via jumpvec.
|
| 1.78.36.1.2.27 | 29-Dec-2010 |
matt | Janitorial work.
Move emulation prototypes here and get rid of StudLyCaps.
Remove kludgery for lwp/setfunc trampoline and just grab them of the damn
structure.
Make mips_locore_jumpvec contain the routines that don't get reassigned
and move wbflush to mips_locoresw since it does get overridden.
|
| 1.78.36.1.2.26 | 22-Dec-2010 |
matt | Rework how fixups are processed. Inside of generating a table, we just
scan kernel text for jumps to locations between (__stub_start, __stub_end]
and if found, we actually decode the instructions in the stub to find out
where the stub would eventually jump to and then patch the original jump
to jump directly to it bypassing the stub. This is slightly slower than
the previous method but it's a simplier and new stubs get automagically
handled.
|
| 1.78.36.1.2.25 | 10-Jun-2010 |
cliff | - add lsw_bus_error to struct locoresw, provides hook to call
for chip-specific bus error handling/decode from e.g. trap()
|
| 1.78.36.1.2.24 | 11-May-2010 |
matt | Use assembly since deref a 64bit value as a pointer does not make a
32bit compiler happy.
|
| 1.78.36.1.2.23 | 11-May-2010 |
matt | Need to turn KX for N32 kernels with mips3_lw_a64 and mips3_sw_a64
|
| 1.78.36.1.2.22 | 21-Mar-2010 |
cliff | mips_vector_init now takes an argument to specify splsw.
NULL specifies use the default 'std_splsw'
|
| 1.78.36.1.2.21 | 01-Mar-2010 |
matt | Add a chip-dependent hook to locorew which cpu_hatch will call to do some
initialization that can only be done while running on the local CPU.
|
| 1.78.36.1.2.20 | 01-Mar-2010 |
matt | Add secondary processor spinup support (cpu_trampoline is in locore_mips3.S).
Nuke lse_boot_secondary_processors (not needed).
Move cpu_info_store to cpu_subr.C
|
| 1.78.36.1.2.19 | 01-Mar-2010 |
matt | Rework fixups support a bit (add a convience macro, require fixups to be
sorted).
|
| 1.78.36.1.2.18 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.78.36.1.2.17 | 28-Feb-2010 |
matt | Add code which can change a direct jump to stub with an indirect call to
a direct jump to the actual routine.
|
| 1.78.36.1.2.16 | 27-Feb-2010 |
matt | Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
|
| 1.78.36.1.2.15 | 25-Feb-2010 |
matt | Add mipsXX_tlb_record_asids - records what ASIDs have valid TLB entries in
the TLB.
Move some mips3 specific routines from locore.S to locore_mips3.S
|
| 1.78.36.1.2.14 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.78.36.1.2.13 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.78.36.1.2.12 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.78.36.1.2.11 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.78.36.1.2.10 | 20-Jan-2010 |
cyber | Correct argument to assembly dsrl32 $Lx -> %Lx
|
| 1.78.36.1.2.9 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.78.36.1.2.8 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.78.36.1.2.7 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.78.36.1.2.6 | 13-Dec-2009 |
matt | TLBUpdate (all forms) takes vaddr_t, uint32_t
|
| 1.78.36.1.2.5 | 23-Nov-2009 |
matt | mips3_ld/mips3_sd need to be passed a volatile uint64_t *
|
| 1.78.36.1.2.4 | 05-Sep-2009 |
matt | Change padding in kern_frame so it has quad-word (16 bytes) alignment.
Then when allocated on a stack, the stack keeps 16 byte alignment.
|
| 1.78.36.1.2.3 | 30-Aug-2009 |
matt | Add RMI company id.
Add some RMI processor ids.
Add CP0 EBASE defintion.
|
| 1.78.36.1.2.2 | 21-Aug-2009 |
matt | Define locoresw struct and use it.
Make tf_pad mips_reg_t since a register is stored in it.
remove argument save area from kernframe on NewABI.
|
| 1.78.36.1.2.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.78.30.1 | 09-Jun-2009 |
snj | Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.78.20.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.78.20.1 | 20-Jun-2009 |
yamt | sync with head
|
| 1.80.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.81.6.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.81.6.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.81.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.81.2.3 | 31-May-2011 |
rmind | sync with head
|
| 1.81.2.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.81.2.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.92.6.1 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.92.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.93.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.94.2.5 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.94.2.4 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.94.2.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.94.2.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.94.2.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.100.2.2 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.100.2.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.101.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.103.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.116.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.117.6.1 | 31-May-2021 |
cjep | sync with head
|
| 1.117.4.2 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.117.4.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.2 | 04-Nov-2024 |
christos | Undo previous lwp.h change.
|
| 1.1 | 03-Nov-2024 |
christos | Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate
lwp.h file.
|
| 1.1 | 30-Nov-2024 |
christos | branches: 1.1.4;
Create a new header lwp_private.h to contain _lwp_getprivate_fast,
_lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that:
1. we don't need special hacks to hide them
2. we can include <lwp.h> where needed to get the necessary prototypes
without redefining them locally.
|
| 1.1.4.2 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.1.4.1 | 30-Nov-2024 |
perseant | file lwp_private.h was added on branch perseant-exfatfs on 2025-08-02 05:55:53 +0000
|
| 1.8 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.7 | 31-Jan-2014 |
matt | Consolidate the 128-bit long double defintions to <sys/ieee754.h>
Each arch that uses it now defines __HAVE_LONG_DOUBLE to 128.
<machine/ieee.h> is now just include the machine's math.h followed
by <sys/ieee754.h>
|
| 1.6 | 23-May-2013 |
christos | branches: 1.6.2;
add generic copyrights so FreeBSD can use them.
|
| 1.5 | 17-Jan-2011 |
matt | branches: 1.5.6; 1.5.16;
Make the MIPS N32/N64 ABIs properly support 128-bit long doubles. With this
change, we should be fully conformant with the N32 and N64 ABIs.
Add {fpclassify,infinity,isnan,ininf,signbit}l_ieee754.c back to lib/libc/gen.
Note that infinityl_ieee754.c will work with either 64-bit, 80-bit, or
128-bit long doubles.
|
| 1.4 | 19-Feb-2002 |
simonb | branches: 1.4.140; 1.4.144; 1.4.150;
Clean up some rampant code duplication wrt ieee number handling:
- Add alignment-safe double and float unions.
- Use the above for the __infinity and __nan constants on all
architectures that use the standard ieee754 representation of
those constants.
- Add a single copy of various ieee754 math functions (frexp, isinf,
isnan, ldexp and modf) that had numerous duplicates among the
arch-specific directories.
- Use the above functions on all architectures where the generic C
versions where used. Architectures that had local assembly
routines are untouched (for those functions only).
|
| 1.3 | 05-Feb-2000 |
kleink | branches: 1.3.6; 1.3.10; 1.3.14;
Improve namespace test macros a bit.
|
| 1.2 | 04-Jan-2000 |
kleink | const -> __const and include <sys/cdefs.h> earlier; fixes PR lib/9052
by Takahiro Kambe.
|
| 1.1 | 23-Dec-1999 |
kleink | C99: Define a NAN macro in <math.h> which evaulates to a constant expression of
a single-precision quiet NaN; only to be defined on platforms that do support
this value.
|
| 1.3.14.1 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.3.10.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.3.6.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.3.6.1 | 05-Feb-2000 |
bouyer | file math.h was added on branch thorpej_scsipi on 2000-11-20 20:13:31 +0000
|
| 1.4.150.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.4.144.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.4.140.1 | 29-Apr-2011 |
matt | Pull in true (128-bit) long double support for MIPS from -current.
|
| 1.5.16.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.5.16.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.5.6.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.6.2.1 | 18-May-2014 |
rmind | sync with head
|
| 1.28 | 09-Apr-2025 |
rin | mips/mcontext.h: Fix wrong size in comment for __UCONTEXT_SIZE_N64, NFC
Value itself is confirmed to be correct (also for {O,N}32 variants).
|
| 1.27 | 30-Nov-2024 |
christos | Create a new header lwp_private.h to contain _lwp_getprivate_fast,
_lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that:
1. we don't need special hacks to hide them
2. we can include <lwp.h> where needed to get the necessary prototypes
without redefining them locally.
|
| 1.26 | 04-Nov-2024 |
christos | Undo previous lwp.h change.
|
| 1.25 | 03-Nov-2024 |
christos | Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate
lwp.h file.
|
| 1.24 | 03-Oct-2020 |
martin | branches: 1.24.26;
Add missing __BEGIN_DECLS/__END_DECLS to force function declarations into
the "C" namespace.
|
| 1.23 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.22 | 15-Feb-2018 |
kamil | Introduce _UC_MACHINE_FP() as a macro
_UC_MACHINE_FP() is a helper macro to extract from mcontext a frame pointer.
Don't rely on this interface as a compiler might strip frame pointer or
optimize it making this interface unreliable.
For hppa assume a small frame context, for larger frames FP might be located
in a different register (4 instead of 3).
For ia64 there is no strict frame pointer, and registers might rotate.
Reuse 79 following:
./gcc/config/ia64/ia64.h:#define HARD_FRAME_POINTER_REGNUM LOC_REG (79)
Once ia64 will mature, this should be revisited.
A macro can encapsulate a real function for extracting Frame Pointer on
more complex CPUs / ABIs.
For the remaining CPUs, reuse standard register as defined in appropriate ABI.
The direct users of this macro are LLVM and GCC with Sanitizers.
Proposed on tech-userlevel@.
Sponsored by <The NetBSD Foundation>
|
| 1.21 | 26-May-2015 |
matt | branches: 1.21.10;
Change _lwp_getprivate_fast to use a syscall instead of rdhwr since rdhwr
emulation is problematic for the CN50xx.
|
| 1.20 | 12-Sep-2012 |
matt | branches: 1.20.14;
N32 uses dadd instructions to manipulate stack (actually, all ABIs except
O32 use dadd).
|
| 1.19 | 05-Jul-2011 |
joerg | branches: 1.19.2; 1.19.12;
Ensure that _lwp_setprivate has a correct prototype.
|
| 1.18 | 03-Jul-2011 |
mrg | s/#elif/#else/ -- when there's nothing to check.
|
| 1.17 | 15-Mar-2011 |
matt | Add MIPS TLS support.
|
| 1.16 | 25-Feb-2011 |
joerg | Be nicer to software that insists on -ansi and use __inline.
|
| 1.15 | 24-Feb-2011 |
joerg | Allow storing and receiving the LWP private pointer via ucontext_t
on all platforms except VAX and IA64. Add fast access via register for
AMD64, i386 and SH3 ports. Use this fast access in libpthread to replace
the stack based pthread_self(). Implement skeleton support for Alpha,
HPPA, PowerPC, SPARC and SPARC64, but leave it disabled.
Ports that support this feature provide __HAVE____LWP_GETPRIVATE_FAST in
machine/types.h and a corresponding __lwp_getprivate_fast in
machine/mcontext.h.
This material is based upon work partially supported by
The NetBSD Foundation under a contract with Joerg Sonnenberger.
|
| 1.14 | 24-Feb-2011 |
matt | make sure to define _UC_MACHINE32_PAD
|
| 1.13 | 23-Feb-2011 |
matt | Add __UCONTEXT*_SIZE*
|
| 1.12 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.11 | 14-Dec-2009 |
matt | branches: 1.11.4; 1.11.6; 1.11.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.10 | 26-Nov-2009 |
matt | Back out unintended commit.
|
| 1.9 | 26-Nov-2009 |
matt | Kill proc0paddr. Use lwp0.l_addr instead.
|
| 1.8 | 28-Apr-2008 |
martin | branches: 1.8.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.7 | 11-Dec-2005 |
christos | branches: 1.7.74; 1.7.76; 1.7.78;
merge ktrace-lwp.
|
| 1.6 | 03-Jul-2004 |
simonb | Drop the "catchall" __fpregset_t, and use either a 32-bit or 64-bit
structure depending on the current ABI.
Part of fix for PR port-mips/25942. Thanks to Christos Zoulas and
Klaus Klein for help with debugging this.
|
| 1.5 | 29-Oct-2003 |
christos | branches: 1.5.2;
first pass siginfo for mips
|
| 1.4 | 08-Oct-2003 |
thorpej | Add some accessor macros for the ucontext:
* _UC_MACHINE_PC() - access the program counter
* _UC_MACHINE_INTRV() - access the integer return value register
* _UC_MACHINE_SET_PC() - set the program counter (this requires
special handling on some platforms).
|
| 1.3 | 01-Oct-2003 |
simonb | Quieten down lint a little with a /* LONGLONG */ comment.
|
| 1.2 | 17-Jan-2003 |
thorpej | branches: 1.2.2;
Merge the nathanw_sa branch.
|
| 1.1 | 17-Nov-2001 |
wdk | branches: 1.1.2;
file mcontext.h was initially added on branch nathanw_sa.
|
| 1.1.2.4 | 17-Dec-2002 |
thorpej | * Always include the SR in the gregset.
* Create space for the 32 64-bit double-precision registers used
in 64-bit ABIs.
This means we don't follow the SVR4 MIPS PS document, but that document
is somewhat out of date with regard to modern MIPS processors.
Per discussion with Chris Demetriou.
|
| 1.1.2.3 | 28-Dec-2001 |
nathanw | Add a macro, _UC_MACHINE_SP(), to fetch the user stack pointer from
a ucontext_t.
|
| 1.1.2.2 | 21-Nov-2001 |
wdk | Make __ASSEMBLER__ proof
|
| 1.1.2.1 | 17-Nov-2001 |
wdk | mcontext support for MIPS based ports.
|
| 1.2.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.2.1 | 04-Jul-2004 |
he | Pull up revision 1.6 (requested by simonb in ticket #589):
Changes fixing PR#25942:
o Drop the ``catchall'' __fpregset_t, and use either a
32-bit or 64-bit structure depending on the current ABI
|
| 1.7.78.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.7.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.7.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.7.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.8.18.5 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.8.18.4 | 30-Apr-2010 |
matt | Define mcontext_o32_t if !O32
|
| 1.8.18.3 | 13-Sep-2009 |
matt | Use __int32_t instead int32_t to make userland happy.
|
| 1.8.18.2 | 12-Sep-2009 |
matt | Add COMPAT_NETBSD32 support.
|
| 1.8.18.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.11.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.11.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.11.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.11.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.19.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.19.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.19.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.20.14.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.21.10.3 | 21-Mar-2018 |
martin | Pull up the following, requested by kamil in ticket #552:
external/gpl3/gcc{.old}/dist/libsanitizer/asan/asan_linux.cc 1.4
sys/arch/aarch64/include/mcontext.h 1.2
sys/arch/alpha/include/mcontext.h 1.9
sys/arch/amd64/include/mcontext.h 1.19
sys/arch/arm/include/mcontext.h 1.19
sys/arch/hppa/include/mcontext.h 1.9
sys/arch/i386/include/mcontext.h 1.14
sys/arch/ia64/include/mcontext.h 1.6
sys/arch/m68k/include/mcontext.h 1.10
sys/arch/mips/include/mcontext.h 1.22
sys/arch/or1k/include/mcontext.h 1.2
sys/arch/powerpc/include/mcontext.h 1.18
sys/arch/riscv/include/mcontext.h 1.5
sys/arch/sh3/include/mcontext.h 1.11
sys/arch/sparc/include/mcontext.h 1.14-1.17
sys/arch/sparc64/include/mcontext.h 1.10
sys/arch/vax/include/mcontext.h 1.9
tests/lib/libc/sys/Makefile 1.50
tests/lib/libc/sys/t_ucontext.c 1.2-1.5
sys/arch/hppa/include/mcontext.h 1.10
sys/arch/ia64/include/mcontext.h 1.7
- Introduce _UC_MACHINE_FP(). _UC_MACHINE_FP() is a helper
macro to extract from mcontext a frame pointer.
- Add new tests in lib/libc/sys/t_ucontext:
* ucontext_sp (testing _UC_MACHINE_SP)
* ucontext_fp (testing _UC_MACHINE_FP)
* ucontext_pc (testing _UC_MACHINE_PC)
* ucontext_intrv (testing _UC_MACHINE_INTRV)
Add a dummy implementation of _UC_MACHINE_INTRV() for ia64.
Implement _UC_MACHINE_INTRV() for hppa.
Make the t_ucontext.c test more portable.
We now have _UC_MACHINE_FP.
|
| 1.21.10.2 | 26-Feb-2018 |
snj | revert ticket 552, which broke the build
|
| 1.21.10.1 | 25-Feb-2018 |
snj | Pull up following revision(s) (requested by kamil in ticket #552):
sys/arch/aarch64/include/mcontext.h: 1.2
sys/arch/alpha/include/mcontext.h: 1.9
sys/arch/amd64/include/mcontext.h: 1.19
sys/arch/arm/include/mcontext.h: 1.19
sys/arch/hppa/include/mcontext.h: 1.9
sys/arch/i386/include/mcontext.h: 1.14
sys/arch/ia64/include/mcontext.h: 1.6
sys/arch/m68k/include/mcontext.h: 1.10
sys/arch/mips/include/mcontext.h: 1.22
sys/arch/or1k/include/mcontext.h: 1.2
sys/arch/powerpc/include/mcontext.h: 1.18
sys/arch/riscv/include/mcontext.h: 1.5
sys/arch/sh3/include/mcontext.h: 1.11
sys/arch/sparc/include/mcontext.h: 1.14-1.17
sys/arch/sparc64/include/mcontext.h: 1.10
sys/arch/vax/include/mcontext.h: 1.9
tests/lib/libc/sys/Makefile: 1.50
tests/lib/libc/sys/t_ucontext.c: 1.2
Introduce _UC_MACHINE_FP() as a macro
_UC_MACHINE_FP() is a helper macro to extract from mcontext a frame pointer.
Don't rely on this interface as a compiler might strip frame pointer or
optimize it making this interface unreliable.
For hppa assume a small frame context, for larger frames FP might be located
in a different register (4 instead of 3).
For ia64 there is no strict frame pointer, and registers might rotate.
Reuse 79 following:
./gcc/config/ia64/ia64.h:#define HARD_FRAME_POINTER_REGNUM LOC_REG (79)
Once ia64 will mature, this should be revisited.
A macro can encapsulate a real function for extracting Frame Pointer on
more complex CPUs / ABIs.
For the remaining CPUs, reuse standard register as defined in appropriate ABI.
The direct users of this macro are LLVM and GCC with Sanitizers.
Proposed on tech-userlevel@.
Sponsored by <The NetBSD Foundation>
--
Improve _UC_MACHINE_FP() for SPARC/SPARC64
Introduce a static inline function _uc_machine_fp() that contains improved
caluclation of a frame pointer.
Algorithm:
uptr *stk_ptr;
# if defined (__arch64__)
stk_ptr = (uptr *) (*sp + 2047);
# else
stk_ptr = (uptr *) *sp;
# endif
*bp = stk_ptr[15];
Noted by <mrg>
--
Make _UC_MACHINE_FP() compile again and fix it so that it does not add
the offset twice.
--
fix _UC_MACHINE32_FP() -- use 32 bit pointer value so that [15] is
the right offset. do this by using __greg32_t, which is only in
the sparc64 version, and these are only useful there, so move them.
--
Add new tests in lib/libc/sys/t_ucontext
New tests:
- ucontext_sp
- ucontext_fp
- ucontext_pc
- ucontext_intrv
They test respectively:
- _UC_MACHINE_SP
- _UC_MACHINE_FP
- _UC_MACHINE_PC
- _UC_MACHINE_INTRV
These tests attempt to access and print the values from ucontext, without
interpreting the values.
This is a follow up of the _UC_MACHINE_FP() introduction.
These tests use PRIxREGISTER, and require to be built with -D_KERNTYPES.
Sponsored by <The NetBSD Foundation>
|
| 1.24.26.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.21 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.20 | 26-Jun-2015 |
matt | ifdef out bitfield struct for pte (not used).
|
| 1.19 | 20-Feb-2011 |
matt | branches: 1.19.14; 1.19.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.18 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.17 | 17-Oct-2007 |
garbled | branches: 1.17.38; 1.17.42; 1.17.48; 1.17.50;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.16 | 17-Jul-2007 |
macallan | branches: 1.16.10;
add definitions for non-cached pages
|
| 1.15 | 11-Dec-2005 |
christos | branches: 1.15.30; 1.15.38;
merge ktrace-lwp.
|
| 1.14 | 07-Aug-2003 |
agc | branches: 1.14.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.13 | 09-Jun-2000 |
soda | branches: 1.13.26;
rename
vad_to_pfn() -> mips_paddr_to_tlbpfn()
pfn_to_vad() -> mips_tlbpfn_to_paddr()
as suggested by thorpej on port-mips Mar 27.
|
| 1.12 | 09-Jun-2000 |
soda | make paddr_t 64bit on arc port by introducing _MIPS_PADDR_T_64BIT.
|
| 1.11 | 27-May-1999 |
nisimura | branches: 1.11.2; 1.11.10;
- Change a symbolic name of TLB entrylo from 'PG_M' to 'PG_D' to reflect
processor design. MIPS 'dirty bit' is not the same as i386 'dirty bit'.
There is a growing concern of misuse in NetBSD/mips.
|
| 1.10 | 16-Jun-1997 |
jonathan | branches: 1.10.20;
Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.9 | 15-Jun-1997 |
mhitch | More merged MIPS1/MIPS3 support. The pte definitions still need work before
they can be support both MIPS1 and MIPS3.
|
| 1.8 | 13-Oct-1996 |
jonathan | Add (missing) PAGE_IS_RDONLY() macro to test for readonly pages,
in both mips-I and mips-II versions, and use it in arch/mips/mips/trap.c.
|
| 1.7 | 13-Oct-1996 |
jonathan | Merge mips1 and mips3 pte/pmap code, pass 0;
* Move mips-I pte (TLBlo) definitions from pmax/include/pte.h
to mips/include/mips1_pte.h
* Move mips-III pte (TLBlo) definitions from pica/include/pte.h
to mips/include/mips3_pte.h
* Add new mips/include/pte.h, which includes exactly one of
mips1_pte.h or mips3_pte.h (which still have namespace collisions),
depending on "options MIPS1" or "options MIPS3". (hack).
Move soft kvtopte(), ptetovk() definitions to mips/include/pte.h
* Add macro PTE_TO_PADDR() to hide the different hardware TLB formats
when mapping from pte to physical address.
* Add macro PTE_READONLY() to hide lack of SW read-only bit in mips-III
tlb. (mips1 pmap uses a sw bit in the PTE, mips3 looks up RO bit in
the kernel pmap.)
* Use macros (not direct TLB frobbing) in mips/trap.c, to make it
mips-1/mips-III indepenndet.
* Change {pmax,pica}/include/pte.h to just do #include <mips/pte.h>.
|
| 1.6 | 01-Feb-1996 |
mycroft | LOCORE -> _LOCORE
|
| 1.5 | 28-Mar-1995 |
jtc | KERNEL -> _KERNEL
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.10.20.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.11.10.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.11.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.13.26.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.13.26.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.13.26.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.14.16.1 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.15.38.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.15.30.1 | 20-Aug-2007 |
ad | Sync with HEAD.
|
| 1.16.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.17.50.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.17.50.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.17.48.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.17.42.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.17.38.1 | 22-Dec-2009 |
matt | Add multiple inclusion protection.
|
| 1.19.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.19.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5 | 08-Jan-2008 |
joerg | Remove __HAVE_TIMECOUNTER conditionals.
|
| 1.4 | 10-Sep-2006 |
tsutsui | branches: 1.4.6; 1.4.32; 1.4.38; 1.4.46;
Change mips3_clockintr() to take (struct clockframe *) rather than
pc and status since it calls hardclock(9) anyway.
OK'ed by gdamore on port-mips.
|
| 1.3 | 08-Sep-2006 |
gdamore | branches: 1.3.2;
Various improvements to make the common mips3 clock handling more generally
useful. The functions delay, cpu_initclocks, and setstatclcokrate have been
renamed to mips3_delay, mips3_initclocks, and mips3_setstatclockrate.
We provide weak aliases for the original names, so machdep code doesn't have
to provide wrapper routines. (Giving good performance.)
I've moved mips3_clockintr, mips3_initclocks, and mips3_setstatclockrate to
their own mips3_clockintr file, because some ports may not be able to use
these, and its senseless to carry that baggage.
|
| 1.2 | 08-Sep-2006 |
gdamore | Rename init_mips3_tc to mips3_init_tc() for consistency, and make it
extern.
|
| 1.1 | 02-Sep-2006 |
gdamore | branches: 1.1.2; 1.1.4;
Provide a common implementation for ports that use the MIPS CP0 counter
based clock interrupt.
This provides common implementations of: delay(), cpu_initclocks(), and a
timecounter based on the MIPS3 CP0. It also provides a new function,
mips3_clockintr(), that is intended to be called from a port's cpu_intr()
routine when INT5 is raised.
Hopefully many MIPS3 based machines can adopt this common interrupt framework.
The evbmips conversion will be committed separately, shortly.
|
| 1.1.4.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.1.2.3 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 02-Sep-2006 |
yamt | file mips3_clock.h was added on branch yamt-pdpolicy on 2006-09-03 15:23:21 +0000
|
| 1.3.2.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.2.1 | 08-Sep-2006 |
rpaulo | file mips3_clock.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:26 +0000
|
| 1.4.46.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.4.38.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.4.32.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.4.6.3 | 21-Jan-2008 |
yamt | sync with head
|
| 1.4.6.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.6.1 | 10-Sep-2006 |
yamt | file mips3_clock.h was added on branch yamt-lazymbuf on 2006-12-30 20:46:32 +0000
|
| 1.32 | 09-Sep-2023 |
andvar | change #define to #error for MIPS3_4100i 8KB page size build protection.
|
| 1.31 | 17-Aug-2020 |
mrg | port crash(8) to mips. (most of the kernel side.)
- expose parts of _KERNEL to _KMEMUSER as well
- hide more things for _KERNEL
- avoid DB_MACHINE_COMMANDS in crash(8)
- XXX add mips_label_t for !_KERNEL and use it in the pcb to
avoid conflicting with the ddb/crash one
- enable dumppcb
some changes to make stack trace fail instead of SEGV and
the userland changes to crash itself not part of this change.
|
| 1.30 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.29 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.28 | 22-Sep-2011 |
macallan | branches: 1.28.12; 1.28.30;
support BUS_SPACE_MAP_PREFETCH in order to allow mapping device memory and
DMA buffers with cacheing disabled but things like write combining, relaxed
ordering etc. allowed when the CPU supports it
so far enabled only on Loongson, should work on R1xk and probably newer CPUs
|
| 1.27 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.26 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.25 | 14-Dec-2009 |
matt | branches: 1.25.4; 1.25.6; 1.25.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.24 | 09-Aug-2009 |
matt | Add 16KB variants of MIPS3_PG_{ODDPG,HVN,SVN}
|
| 1.23 | 17-Oct-2007 |
garbled | branches: 1.23.20; 1.23.38;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.22 | 17-Jul-2007 |
macallan | branches: 1.22.10;
add definitions for non-cached pages
|
| 1.21 | 11-Dec-2005 |
christos | branches: 1.21.30; 1.21.38;
merge ktrace-lwp.
|
| 1.20 | 05-Nov-2005 |
tsutsui | Make MIPS3_PG_SHIFT a variable and initialize it accordingly
in mips_vector_init() if options MIPS3_4100 is specified
so that kernels which have options MIPS3_4100 also work
on other MIPS3 CPUs.
XXX: now should we rename options MIPS3_4100 to options ENABLE_MIPS_R4100,
XXX: or just make MIPS3_PG_SHIFT always a variable?
|
| 1.19 | 05-Nov-2005 |
tsutsui | Add MI mips3 wired map functions based on patch in port-mips/31915
from Garrett D'Amore of Tadpole Computer Inc.
Please refer discussion filed in the PR for details.
|
| 1.18 | 10-Oct-2005 |
tsutsui | Define MIPS3_PG_SIZE_MASK_TO_SIZE() macro in the MI mips header.
|
| 1.17 | 08-Sep-2005 |
tsutsui | Add definitions of Vr41xx specific pagemask values.
It supports 1k-256kbytes/page.
|
| 1.16 | 07-Aug-2003 |
agc | branches: 1.16.6; 1.16.14; 1.16.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.15 | 24-Jun-2002 |
simonb | branches: 1.15.6;
Add 64MB and 256MB tlb page masks.
|
| 1.14 | 05-Mar-2002 |
simonb | branches: 1.14.6;
Add support for MIPS32 and MIPS64 architectures:
Better cache coherency attribute macros (from Broadcom Corp).
|
| 1.13 | 09-Jun-2000 |
soda | branches: 1.13.6; 1.13.10;
rename
vad_to_pfn() -> mips_paddr_to_tlbpfn()
pfn_to_vad() -> mips_tlbpfn_to_paddr()
as suggested by thorpej on port-mips Mar 27.
|
| 1.12 | 09-Jun-2000 |
soda | make paddr_t 64bit on arc port by introducing _MIPS_PADDR_T_64BIT.
|
| 1.11 | 27-Mar-2000 |
nisimura | branches: 1.11.2;
Nuke MIPS_16K_PAGE conditional which should be commited in. It
was used for debugg'n purposes which only make senses on particular
hardware configurations and has never been intended to extend pagesize
of NetBSD/mips.
|
| 1.10 | 25-Sep-1999 |
shin | branches: 1.10.2;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.9 | 27-May-1999 |
nisimura | - Change a symbolic name of TLB entrylo from 'PG_M' to 'PG_D' to reflect
processor design. MIPS 'dirty bit' is not the same as i386 'dirty bit'.
There is a growing concern of misuse in NetBSD/mips.
|
| 1.8 | 11-Sep-1998 |
jonathan | branches: 1.8.10;
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.7 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.6 | 15-Jun-1997 |
mhitch | More merged MIPS1/MIPS3 support. The pte definitions still need work before
they can be support both MIPS1 and MIPS3.
|
| 1.5 | 13-Oct-1996 |
jonathan | Add (missing) PAGE_IS_RDONLY() macro to test for readonly pages,
in both mips-I and mips-II versions, and use it in arch/mips/mips/trap.c.
|
| 1.4 | 13-Oct-1996 |
jonathan | Merge mips1 and mips3 pte/pmap code, pass 0;
* Move mips-I pte (TLBlo) definitions from pmax/include/pte.h
to mips/include/mips1_pte.h
* Move mips-III pte (TLBlo) definitions from pica/include/pte.h
to mips/include/mips3_pte.h
* Add new mips/include/pte.h, which includes exactly one of
mips1_pte.h or mips3_pte.h (which still have namespace collisions),
depending on "options MIPS1" or "options MIPS3". (hack).
Move soft kvtopte(), ptetovk() definitions to mips/include/pte.h
* Add macro PTE_TO_PADDR() to hide the different hardware TLB formats
when mapping from pte to physical address.
* Add macro PTE_READONLY() to hide lack of SW read-only bit in mips-III
tlb. (mips1 pmap uses a sw bit in the PTE, mips3 looks up RO bit in
the kernel pmap.)
* Use macros (not direct TLB frobbing) in mips/trap.c, to make it
mips-1/mips-III indepenndet.
* Change {pmax,pica}/include/pte.h to just do #include <mips/pte.h>.
|
| 1.3 | 11-Aug-1996 |
jonathan | * Apply LOCORE -> _LOCORE change so locore.S doesn't #include struct
definitions.
* Include <mips/cpuregs.h> in <cpu.h> so kern_clock.c has user/kernel
status bits in scope. Still needs work; r2k/r4k previous-mode bits
are different.
* Include <mips/mips_param.h> in pica/include/param.h, for locore declarations,
and definitions of vm and other constants that should be shared across
NetBSD/mips systems to esnsure user-level binary compatibility.
|
| 1.2 | 16-Jul-1996 |
thorpej | RCS id police.
|
| 1.1 | 13-Mar-1996 |
jonathan | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 13-Mar-1996 |
jonathan | First commit of Per Fogelstrom's port to the Acer pica r4400/isa machine.
|
| 1.8.10.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.10.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.11.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.13.10.2 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.13.10.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.13.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.13.6.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.14.6.1 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.15.6.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.15.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.15.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.15.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.16.16.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.16.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.16.14.1 | 11-Sep-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #758):
sys/arch/mips/include/mips3_pte.h: revision 1.17
Add definitions of Vr41xx specific pagemask values.
It supports 1k-256kbytes/page.
|
| 1.16.6.1 | 13-Sep-2005 |
riz | Pull up following revision(s) (requested by tsutsui in ticket #5829):
sys/arch/mips/include/mips3_pte.h: revision 1.17
Add definitions of Vr41xx specific pagemask values.
It supports 1k-256kbytes/page.
|
| 1.21.38.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.21.30.1 | 20-Aug-2007 |
ad | Sync with HEAD.
|
| 1.22.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.23.38.8 | 23-Dec-2011 |
matt | Base various #defines, etc. on PAGE_SHIFT instead of using separate
ENABLE_MIPS_*_PAGE defines.
|
| 1.23.38.7 | 02-Dec-2011 |
matt | Add support for 8KB pages.
|
| 1.23.38.6 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.23.38.5 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.23.38.4 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.23.38.3 | 22-Dec-2009 |
matt | Add multiple inclusion protection.
|
| 1.23.38.2 | 08-Sep-2009 |
matt | Add and optimize MIPS_PHYS_TO_XKPHYS_{UN,}CACHED(pa).
Treat like mips3_pg_cached: add mips3_xkphys_cached which contains the
starting address of the cached XKPHYS region. It also respects SPECIAL_CCA.
|
| 1.23.38.1 | 20-Aug-2009 |
matt | Add a MIPS3_PG_TO_CCA() macro to get the CCA out of the saved page attributes.
|
| 1.23.20.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.23.20.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.25.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.25.8.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.25.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.25.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.28.30.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.28.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.14 | 06-May-2023 |
andvar | s/Regiser/Register/ and s/regester/register/ in comments.
|
| 1.13 | 08-Nov-2022 |
simonb | Fix tyop in __BITS for the MIPSNN_MTI_CFG7_PREF_MASK macro.
|
| 1.12 | 02-Aug-2020 |
simonb | Document the PerfCntCrl registers (CP0 Register 25, Selects 0, 2, 4, 6).
|
| 1.11 | 31-Jul-2020 |
simonb | Rename MIPSNN_CFG4_MMU_EXT_DEF_MMU_SIZE_EXT to MIPSNN_CFG4_MMU_SIZE_EXT.
|
| 1.10 | 31-Jul-2020 |
simonb | Bit definitions Config4 and Config5 registers.
|
| 1.9 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.8 | 13-Jun-2020 |
simonb | Move MIPSNN_CFG3_ULRI so that it doesn't appear in some random position
among the other config3 register definitions.
|
| 1.7 | 13-Jun-2020 |
simonb | Use the correct config3 field name (ULRI) for UserLocal register is
implemented bit.
|
| 1.6 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.5 | 16-Aug-2011 |
matt | branches: 1.5.12; 1.5.30;
Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.4 | 20-Mar-2006 |
gdamore | branches: 1.4.84;
Added support for MIPS architecture revision 2.
Added definitions for various rev 2 CP0 configuration register bits.
Added support for MIPS 4KEc Rev 2 (found in Atheros AR2316, for example).
|
| 1.3 | 07-Feb-2003 |
cgd | branches: 1.3.18; 1.3.32; 1.3.34; 1.3.36; 1.3.38; 1.3.40;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.2 | 24-Nov-2002 |
simonb | Add the VI bit in config 0.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.4; 1.1.8;
Values related to the MIPS32/MIPS64 Privileged Resource Architecture
(from Broadcom Corp).
|
| 1.1.8.3 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.1.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.8.1 | 05-Mar-2002 |
nathanw | file mipsNN.h was added on branch nathanw_sa on 2002-04-01 07:40:59 +0000
|
| 1.1.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.1 | 05-Mar-2002 |
jdolecek | file mipsNN.h was added on branch kqueue on 2002-03-16 15:58:35 +0000
|
| 1.3.40.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.3.38.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.3.36.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.3.34.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.3.32.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.18.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.4.84.1 | 23-Dec-2011 |
matt | Add CFG6/7 definitions for MIPS 24K/74K/34K/1004K/1074K and RMI XLP.
|
| 1.5.30.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.5.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5 | 11-Nov-1998 |
nisimura | - Withdraw a duplicated file. This has never been a part of distribution.
|
| 1.4 | 26-Sep-1998 |
nisimura | branches: 1.4.2;
Add one more new MIPS processor PRid 0x30 for IDT RC64474/64475. These
are successors of RC4640/RC4650, but fully brewed MIPS, then capable of
running NetBSD/mips.
|
| 1.3 | 26-Sep-1998 |
nisimura | Update the list of MIPS processor revision ID. PRids of Toshiba TX3900
and QED R4650 comflict each other.
|
| 1.2 | 07-Sep-1998 |
nisimura | Added more MIPS processor IDs.
|
| 1.1 | 03-Sep-1998 |
nisimura | An include file describes MIPS processor hardware nature, which will
supercedes cpuregs.h eventually.
|
| 1.4.2.1 | 15-Oct-1998 |
nisimura | - cpuregs.h was modifed a bit, then renamed with cpuarch.h.
- mips_cpu.h has gone.
- CPU's register mnemonics in regdef.h is now a part of asm.h.
|
| 1.26 | 05-Apr-2021 |
simonb | Some QED instructions are included in MIPS32 and MIPS64 instruction sets.
Update a few comments.
|
| 1.25 | 05-Apr-2021 |
simonb | Tidy up NOP disassembly, handle "pause" as well.
|
| 1.24 | 17-Aug-2020 |
mrg | branches: 1.24.4;
add a "special3 offset" type of decode to ddb disasm so we see the
offsets properly decoded. add mips r6 "cache" insn.
avoid signed/unsigned compare and ufetch_32() for upcoming crash(8).
|
| 1.23 | 15-Aug-2020 |
simonb | Fix value for SCE/SWE instructions.
Problem noticed by mrg@.
|
| 1.22 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.21 | 27-Jun-2015 |
matt | More instructions
|
| 1.20 | 04-Jun-2015 |
matt | Add a lot of missing mipsNNr2 instruction + cavium specific instructions.
|
| 1.19 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.18 | 18-Aug-2011 |
matt | branches: 1.18.12; 1.18.30;
Change bcond/BCOND to regimm/REGIMM to better match the MIPS nomenclature.
|
| 1.17 | 17-Aug-2011 |
matt | emulate the special3 opcode LX (lwx, ldx, lhx, lbux) instructions.
|
| 1.16 | 15-Mar-2011 |
matt | Remove redundant lines.
|
| 1.15 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.14 | 07-Jul-2010 |
chs | branches: 1.14.2; 1.14.4;
implement emulation of the "rdhwr" instruction for mips TLS.
|
| 1.13 | 06-Aug-2009 |
msaitoh | branches: 1.13.2; 1.13.4;
Add disassemble code for DMT, DMF, MTH and MFH.
|
| 1.12 | 11-Dec-2005 |
christos | branches: 1.12.78; 1.12.96;
merge ktrace-lwp.
|
| 1.11 | 15-Oct-2003 |
simonb | One defintion of OP_SYNC should be enough.
|
| 1.10 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.9 | 06-Jul-2002 |
gmcgarry | branches: 1.9.6;
Overhaul the emulation facility. We do this by:
- accumulating all emulation code (including floating-point) in one place
- steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts
and traps from *real* FPUs
- introducing MachEmulateInst() as a common dispatch point for all
emulated instructions
- cleaning up emulation dispatch in trap()
Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1.
Tested on r3k with and without SOFTFLOAT enabled.
|
| 1.8 | 13-Aug-2001 |
soda | branches: 1.8.6; 1.8.14;
OP_BLTZAL was defined twice.
|
| 1.7 | 11-Jul-2000 |
jeffs | branches: 1.7.4;
Add support for 3 QED special2 opcodes.
|
| 1.6 | 17-Oct-1997 |
jonathan | branches: 1.6.18;
Add bi-endian support to mips locore, <mips/endian.h>, and mips_opcode.h.
Derived from a change request (PR port-mips/4277) from
Tsubai Masanari, (tsubai@iri.co.jp).
|
| 1.5 | 23-Mar-1996 |
jonathan | Merge in additions of missing MIPS-I opcodes, and r4000-in-32-bit mode
opcodes from the Pica port. Per Fogelstrom claims the latter are all
supposedly MIPS-II (r6000) instructions, rather than MIPS-III (R4000),
but we haven't checked to be sure. Are LL/SC really in MIPS-II?
CVS:: ----------------------------------------------------------------------
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.6.18.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.7.4.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.7.4.1 | 25-Aug-2001 |
thorpej | Merge Aug 24 -current into the kqueue branch.
|
| 1.8.14.1 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.8.6.2 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.8.6.1 | 13-Aug-2001 |
nathanw | file mips_opcode.h was added on branch nathanw_sa on 2002-08-01 02:42:31 +0000
|
| 1.9.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.9.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.9.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.12.96.4 | 04-Aug-2012 |
matt | disasm special2 and special3 opcodes (and ehb and ssnop too).
|
| 1.12.96.3 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.12.96.2 | 29-Dec-2010 |
matt | Add OPC_PREF and OPC_RSVD073
|
| 1.12.96.1 | 15-May-2010 |
matt | Add kernel support for MIPS TLS. Use rdhwr rt, $29 as defined by the MIPS
TLS spec so that Linux MIPS binaries will work. Use sysarch(MIPS_TINFOSET, v)
to set the pointer.
|
| 1.12.78.2 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.12.78.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.13.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.13.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.13.2.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.14.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.14.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.18.30.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.18.30.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.18.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.24.4.1 | 17-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.56 | 03-May-2025 |
riastradh | mips_param.h: Add include guard.
Prompted by nearby fix for:
PR port-evbmips/59385: PGSHIFT is inconsistently defined on MIPS
|
| 1.55 | 03-May-2025 |
riastradh | mips: Include opt_cputype.h before any of the flags it defines.
PR port-evbmips/59385: PGSHIFT is inconsistently defined on MIPS
|
| 1.54 | 25-Apr-2025 |
riastradh | mips: Align stack pointer on entry to signal handler.
Based on a patch by rin@. The variant approach I took puts the stack
frame allocation and alignment logic in one place (getframe, used by
sendsig_siginfo for native (n64, on mips), netbsd32_sendsig_siginfo
for compat32 (n32/o32, on mips), and sendsig_sigcontext (compat 1.6))
and reduces the chance of provoking compiler exploitation of
undefined behaviour by doing arithmetic in uintptr_t rather than in
pointers to large aligned structs. This also ensures the resulting
pointer is aligned for the object (struct siginfo_sigframe, struct
siginfo_sigframe32, struct sigcontext), not just for the ABI stack
alignment.
PR kern/59327: user stack pointer is not aligned properly
|
| 1.53 | 20-Apr-2025 |
riastradh | t_signal_and_sp: Add mips support.
PR kern/59327: user stack pointer is not aligned properly
PR kern/58149: Cannot return from a signal handler if SP was
misaligned when the signal arrived
Stack pointer misaligment in some cases hypothesized to be a possible
cause of:
PR port-evbmips/59236: Multiple segfaults in erlite3 boot
|
| 1.52 | 04-Oct-2021 |
andvar | branches: 1.52.10;
remove duplicate the article in comments.
|
| 1.51 | 31-May-2021 |
simonb | Include "opt_param.h" (ifdef _KERNEL_OPT) everywhere that MSGBUFSIZE is
referenced since some sources include <machine/param.h>.
|
| 1.50 | 23-May-2021 |
mrg | fix "uname -p" on mips n32.
this has been returning "mipsn64eb" on my edgerouter4 with the
32 bit uname binary.
introduce o32, n32, and n64 versions of MACHINE_ARCH, and use
them appropriately in PROC_MACHINE_ARCH32(). now o32, n32 and
n64 "uname -p" all return different values.
|
| 1.49 | 08-May-2021 |
skrll | branches: 1.49.2;
KNG
|
| 1.48 | 26-Apr-2021 |
christos | Make MACHINE_ARCH for n64 binaries mipsn64e[bl] instead of mips64e[bl] to
differentiate them from n32/o32 binaries.
|
| 1.47 | 26-Aug-2020 |
simonb | branches: 1.47.6;
Define a UPAGES_MAX constant to size the a md_upte array in MIPS's
struct mdlwp. This is exposed to userland, so we can't use something
based on PAGE_SIZE.
|
| 1.46 | 23-Aug-2020 |
simonb | Use a 16kB USPACE (and larger kernel stack) for LP64 kernels. Invert
the logic for setting the USPACE size. Define a desired USPACE size
(16kB for LP64, 8kB otherwise) then divide by PAGE_SIZE to get UPAGES.
Fixes random segmap lossage, since the uarea usually sits immediately
above the segmap for a process. Thanks to mrg@, skrll@ and dholland@
for testing, debugging and general help tracking down this problem.
|
| 1.45 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.44 | 26-Jul-2020 |
simonb | Add a space in a comment.
|
| 1.43 | 23-Jul-2020 |
skrll | Add a comment to CACHE_LINE_SIZE / COHERENCY_UNIT size defines
|
| 1.42 | 23-Jul-2020 |
skrll | On second thoughts this can't be conditional so define CACHE_LINE_SIZE /
COHERENCY_UNIT as 128 for all mips.
|
| 1.41 | 23-Jul-2020 |
skrll | Define CACHE_LINE_SIZE / COHERENCY_UNIT as 128 for MIPS64_OCTEON
|
| 1.40 | 19-Jun-2019 |
skrll | Whitespace and whitespace consistency
|
| 1.39 | 11-May-2019 |
skrll | #define<tab> for consistency
|
| 1.38 | 11-Jul-2016 |
matt | branches: 1.38.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.37 | 11-Jun-2015 |
matt | Use (uint64_t) to avoid 32-bit overflow
|
| 1.36 | 11-Jun-2015 |
matt | Don't include <machine/param.h> in .S files, get the needed values from assym.h
Define NBPG as UL to avoid integer over with NBXSEG on LP64 systems.
(.S files don't like numbers with UL appended to them).
|
| 1.35 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.34 | 23-May-2013 |
christos | branches: 1.34.10;
add generic copyrights so FreeBSD can use them.
|
| 1.33 | 01-Feb-2012 |
matt | branches: 1.33.6;
Add ALIGNBYTES32/ALIGN32 for netbsd32.
|
| 1.32 | 24-Jan-2012 |
christos | Use and define ALIGN() ALIGN_POINTER() and STACK_ALIGN() consistently,
and avoid definining them in 10 different places if not needed.
|
| 1.31 | 20-Jan-2012 |
joerg | Change CMSG_SPACE and CMSG_LEN to provide Integer Constant Expressions
again. This was changed in sys/socket.h r1.51 to work around fallout
from the IPv6 aux data migration. It broke the historic ABI on some
platforms. This commit restores compatibility for netbsd32 code on such
platforms and provides a template for future changes to the CMSG_*
alignment. Revert PCC/Clang workarounds in postfix and tmux.
|
| 1.30 | 19-Jan-2012 |
matt | Add ALIGNBYTES32/ALIGN32 (same as ALIGNBYTES/ALIGN).
|
| 1.29 | 05-Mar-2011 |
matt | branches: 1.29.4; 1.29.8;
If _KERNEL is not defined, force MACHINE to be "mips". Userland should be
using uname/sysctl to get this value.
|
| 1.28 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.27 | 08-Feb-2010 |
joerg | branches: 1.27.2; 1.27.4; 1.27.6;
Remove separate mb_map. The nmbclusters is computed at boot time based
on the amount of physical memory and limited by NMBCLUSTERS if present.
Architectures without direct mapping also limit it based on the kmem_map
size, which is used as backing store. On i386 and ARM, the maximum KVA
used for mbuf clusters is limited to 64MB by default.
The old default limits and limits based on GATEWAY have been removed.
key_registered_sb_max is hard-wired to a value derived from 2048
clusters.
|
| 1.26 | 14-Dec-2009 |
matt | branches: 1.26.2;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.25 | 13-Aug-2009 |
matt | Move MID_MACHINE to <mips/mips_param.h> and use local values so we don't
need to include exec_aout.h
|
| 1.24 | 09-Aug-2009 |
matt | Beginning of large-page support.
|
| 1.23 | 28-Aug-2006 |
yamt | branches: 1.23.60; 1.23.78;
- remove unused bdbtofsb.
- move the following macros from MD headers to sys/param.h.
ctod
dtoc
ctob
btoc
dbtob
btodb
|
| 1.22 | 26-Aug-2006 |
matt | Don't cast pointers using unsigned and/or int. Use intptr_t or uintptr_t
as appropriate.
|
| 1.21 | 11-Dec-2000 |
tsutsui | branches: 1.21.40; 1.21.54; 1.21.58;
space -> TAB
|
| 1.20 | 09-Jun-2000 |
soda | make paddr_t 64bit on arc port by introducing _MIPS_PADDR_T_64BIT.
|
| 1.19 | 27-Mar-2000 |
nisimura | branches: 1.19.2;
Nuke MIPS_16K_PAGE conditional which should be commited in. It
was used for debugg'n purposes which only make senses on particular
hardware configurations and has never been intended to extend pagesize
of NetBSD/mips.
|
| 1.18 | 19-Feb-2000 |
mycroft | Don't pull in cpu.h in non-kernel code.
|
| 1.17 | 11-Feb-2000 |
thorpej | Update for the NKMEMPAGES changes.
|
| 1.16 | 09-Jan-2000 |
simonb | Use the badaddr() prototype in mips/include/cpu.h by including
<machine/cpu.h> in mips/include/mips_param.h. Remove duplicate
badaddr() prototypes from some pmax header files.
|
| 1.15 | 04-Dec-1999 |
ragge | CL* discarding.
|
| 1.14 | 25-Sep-1999 |
shin | branches: 1.14.2; 1.14.8;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.13 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.12 | 09-Feb-1999 |
tv | branches: 1.12.4;
Split the "mips" MACHINE_ARCH for 1.4. newsmips is "mipseb"; pmax is
"mipsel".
|
| 1.11 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.10 | 11-Sep-1998 |
jonathan | Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.9 | 25-Aug-1998 |
nisimura | Make spl(9) rountines target port dependent. delay() is also port
dependent anticipating a target with high resolution timer available
for on-the-fly re-programming. Enum decstation_t was removed from MI
trap.c.
|
| 1.8 | 19-Feb-1998 |
thorpej | Use a reasonable default for NKMEMCLUSTERS. Previous default value wouldn't
run multi-user for very long at all, and every kernel configuration file
overrides it!
|
| 1.7 | 20-Sep-1997 |
leo | Move the definition of MSGBUFSIZE up to the machine-arch level if
possible. Pointed out by Bernd Ernesti.
|
| 1.6 | 20-Aug-1997 |
jonathan | Move SSIZE and DELAY() definitions to sys/arch/mips/include/mips_param.h.
Update comment in pmax/include/param.h (pr 3988).
|
| 1.5 | 07-Jul-1997 |
jonathan | branches: 1.5.2;
DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.4 | 16-Jun-1997 |
jonathan | Garbage-collect non-jumptable prototype for wbflush().
|
| 1.3 | 08-Jun-1997 |
jonathan | Move MACHINE_ARCH and _MACHINE_ARCH from pmax/include/param.h to
mips/include/mips_param.h. (They should be common to all mips ports.)
|
| 1.2 | 28-Feb-1997 |
jonathan | Define ALIGNED_POINTER
(missed when other <arch>/include/param.h files were updated)
|
| 1.1 | 19-May-1996 |
jonathan | branches: 1.1.8;
Remove common-across-all-MIPS-cpu definitions (e.g., user-level-visible
page/segment size definitions and macros) from pmax/include/param.h,
and move them to mips/include/mips_param.h.
|
| 1.1.8.1 | 12-Mar-1997 |
is | Merge in changes from Trunk
|
| 1.5.2.2 | 22-Sep-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.5.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.12.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.14.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.14.2.2 | 13-Dec-2000 |
bouyer | Sync with HEAD (for UBC fixes).
|
| 1.14.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.19.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.21.58.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.21.54.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.21.40.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.23.78.13 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.23.78.12 | 27-Feb-2012 |
matt | Make sure we don't overflow a 32-bit integer.
|
| 1.23.78.11 | 27-Dec-2011 |
matt | Deal with not defining PAGE_SIZE or PAGE_SHIFT for non-kernel inclusion.
|
| 1.23.78.10 | 27-Dec-2011 |
matt | Make these play nice with modules.
|
| 1.23.78.9 | 23-Dec-2011 |
matt | Use MIPS_PAGE_SHIFT to define the page size to be used from a config file.
Add support for tracking which colors have been used for an EXECPAGE.
|
| 1.23.78.8 | 03-Dec-2011 |
matt | Add __cacheline_aligned and __read_mostly from -HEAD.
|
| 1.23.78.7 | 02-Dec-2011 |
matt | Add support for 8KB pages.
|
| 1.23.78.6 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.23.78.5 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.23.78.4 | 12-Sep-2009 |
matt | Add MACHINE32_ARCH definitions.
|
| 1.23.78.3 | 07-Sep-2009 |
matt | Derive NBSEG and SEGSHIFT from NBPG and PGSHIFT.
|
| 1.23.78.2 | 22-Aug-2009 |
matt | Move MACHINE_ARCH definition to <mips/mips_param.h>
Move mbuf related defines to <mips/mips_param.h>
|
| 1.23.78.1 | 20-Aug-2009 |
matt | Add a default MSIZE/MCLBYTES block here since each mips port does the same
thing.
|
| 1.23.60.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.23.60.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.26.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.27.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.27.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.27.2.2 | 06-Mar-2011 |
rmind | sync with head (and fix few botches with this)
|
| 1.27.2.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.29.8.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.29.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.29.4.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.33.6.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.33.6.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.34.10.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.34.10.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.38.18.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.38.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.47.6.2 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.47.6.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.49.2.1 | 31-May-2021 |
cjep | sync with head
|
| 1.52.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.11 | 12-Jul-2023 |
riastradh | machine/mutex.h: Sprinkle sys/types.h, omit machine/lock.h.
Turns out machine/lock.h is not needed for __cpu_simple_lock_t, which
always comes from sys/types.h. And, really, sys/types.h (or at least
sys/stdint.h) is needed for uintN_t and uintptr_t.
|
| 1.10 | 09-Jul-2023 |
riastradh | machine/mutex.h: Sprinkle includes so this can be used by crash(8).
XXX pullup-10
|
| 1.9 | 25-Aug-2021 |
thorpej | branches: 1.9.4;
- In kern_mutex.c, if MUTEX_CAS() is not defined, define it in terms of
atomic_cas_ulong().
- For arm, ia64, m68k, mips, or1k, riscv, vax: don't define our own
MUTEX_CAS(), as they either use atomic_cas_ulong() or equivalent
(atomic_cas_uint() on m68k).
- For alpha and sparc64, don't define MUTEX_CAS() in terms of their own
_lock_cas(), which has its own memory barriers; the call sites in
kern_mutex.c already have the appropriate memory barrier calls. Thus,
alpha and sparc64 can use default definition.
- For sh3, don't define MUTEX_CAS() in terms of its own _lock_cas();
atomic_cas_ulong() is strong-aliased to _lock_cas(), therefore defining
our own MUTEX_CAS() is redundant.
Per thread:
https://mail-index.netbsd.org/tech-kern/2021/07/25/msg027562.html
|
| 1.8 | 29-Nov-2019 |
riastradh | Nix now-unused definitions of MUTEX_GIVE/MUTEX_RECEIVE.
|
| 1.7 | 20-Feb-2011 |
matt | branches: 1.7.56;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.6 | 28-Apr-2008 |
martin | branches: 1.6.22; 1.6.28; 1.6.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.5 | 04-Jan-2008 |
ad | branches: 1.5.6; 1.5.8; 1.5.10;
Use new style memory barriers.
|
| 1.4 | 29-Nov-2007 |
ad | branches: 1.4.6;
- Change _lock_cas and friends to do "compare and swap" instead of "compare
and set".
- Rename them to _atomic_cas_uint, _atomic_cas_ulong etc and provide strong
aliases for the other names CAS goes by.
|
| 1.3 | 21-Nov-2007 |
yamt | make kmutex_t and krwlock_t smaller by killing lock id.
ok'ed by Andrew Doran.
|
| 1.2 | 09-Feb-2007 |
ad | branches: 1.2.4; 1.2.8; 1.2.24; 1.2.26; 1.2.30; 1.2.32;
Merge newlock2 to head.
|
| 1.1 | 11-Jan-2007 |
ad | branches: 1.1.2;
file mutex.h was initially added on branch newlock2.
|
| 1.1.2.3 | 01-Feb-2007 |
ad | Header file cleanup.
|
| 1.1.2.2 | 27-Jan-2007 |
ad | Make mips systems work.
|
| 1.1.2.1 | 11-Jan-2007 |
ad | Checkpoint work in progress.
|
| 1.2.32.2 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.2.32.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.2.30.1 | 21-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.2.26.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.2.24.2 | 03-Dec-2007 |
joerg | Sync with HEAD.
|
| 1.2.24.1 | 21-Nov-2007 |
joerg | Sync with HEAD.
|
| 1.2.8.1 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.2.4.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.2.4.3 | 07-Dec-2007 |
yamt | sync with head
|
| 1.2.4.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.2.4.1 | 09-Feb-2007 |
yamt | file mutex.h was added on branch yamt-lazymbuf on 2007-02-26 09:07:27 +0000
|
| 1.4.6.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.5.10.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.5.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.5.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.6.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.6.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.7.56.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.9.4.1 | 09-Aug-2023 |
martin | Pull up following revision(s) (requested by maya in ticket #316):
sys/arch/m68k/include/mutex.h: revision 1.13
sys/arch/arm/include/cpu.h: revision 1.125
sys/arch/sun68k/include/intr.h: revision 1.21
sys/arch/arm/include/mutex.h: revision 1.28
sys/sys/rwlock.h: revision 1.18
sys/arch/powerpc/include/mutex.h: revision 1.7
sys/arch/arm/include/mutex.h: revision 1.29
sys/arch/powerpc/include/mutex.h: revision 1.8
sys/uvm/uvm_param.h: revision 1.42
sys/sys/ksem.h: revision 1.16
sys/arch/x86/include/mutex.h: revision 1.10
sys/sys/proc.h: revision 1.372
sys/sys/ksem.h: revision 1.17
sys/arch/ia64/include/mutex.h: revision 1.8
sys/arch/evbarm/include/intr.h: revision 1.29
sys/sys/lua.h: revision 1.9
sys/arch/next68k/include/intr.h: revision 1.23
sys/arch/ia64/include/mutex.h: revision 1.9
sys/arch/hp300/include/intr.h: revision 1.35
sys/arch/hp300/include/intr.h: revision 1.36
sys/arch/sparc/include/cpu.h: revision 1.111
sys/arch/hppa/include/mutex.h: revision 1.16
sys/arch/vax/include/intr.h: revision 1.31
sys/arch/hppa/include/mutex.h: revision 1.17
sys/arch/news68k/include/intr.h: revision 1.28
sys/arch/hppa/include/mutex.h: revision 1.18
sys/arch/hppa/include/intr.h: revision 1.3
sys/arch/hppa/include/mutex.h: revision 1.19
sys/arch/hppa/include/intr.h: revision 1.4
sys/sys/sched.h: revision 1.92
sys/opencrypto/cryptodev.h: revision 1.51
sys/arch/vax/include/mutex.h: revision 1.20
sys/arch/sparc64/include/mutex.h: revision 1.10
sys/arch/ia64/include/sapicvar.h: revision 1.2
sys/arch/riscv/include/mutex.h: revision 1.5
sys/arch/amiga/dev/grfabs_cc.c: revision 1.39
sys/external/bsd/drm2/include/linux/idr.h: revision 1.11
sys/arch/riscv/include/mutex.h: revision 1.6
sys/ddb/files.ddb: revision 1.16
sys/arch/mac68k/include/intr.h: revision 1.32
share/man/man4/ddb.4: revision 1.203
sys/ddb/db_command.c: revision 1.183
sys/arch/mips/include/mutex.h: revision 1.10
sys/ddb/db_command.c: revision 1.184
sys/arch/x68k/include/intr.h: revision 1.22
sys/arch/sparc/include/psl.h: revision 1.51
sys/arch/or1k/include/mutex.h: revision 1.4
sys/arch/mips/include/mutex.h: revision 1.11
sys/arch/arm/xscale/pxa2x0_intr.h: revision 1.16
sys/arch/sparc64/include/cpu.h: revision 1.134
sys/arch/sparc/include/psl.h: revision 1.52
sys/arch/or1k/include/mutex.h: revision 1.5
sys/arch/mvme68k/include/intr.h: revision 1.22
sys/arch/luna68k/include/intr.h: revision 1.16
external/cddl/osnet/sys/sys/kcondvar.h: revision 1.6
sys/arch/sparc/include/mutex.h: revision 1.12
sys/arch/sparc/include/mutex.h: revision 1.13
sys/arch/usermode/include/mutex.h: revision 1.5
sys/arch/usermode/include/mutex.h: revision 1.6
sys/kern/kern_core.c: revision 1.38
usr.sbin/crash/Makefile: revision 1.49
sys/arch/amiga/include/intr.h: revision 1.23
sys/arch/alpha/include/mutex.h: revision 1.12
sys/arch/alpha/include/mutex.h: revision 1.13
sys/arch/evbarm/lubbock/sacc_obio.c: revision 1.16
sys/ddb/ddb.h: revision 1.6
sys/arch/sparc64/include/mutex.h: revision 1.8
sys/arch/sh3/include/mutex.h: revision 1.12
sys/arch/evbarm/lubbock/sacc_obio.c: revision 1.17
sys/ddb/db_syncobj.c: revision 1.1
sys/arch/vax/include/mutex.h: revision 1.18
sys/arch/sparc64/include/psl.h: revision 1.63
sys/arch/sparc64/include/mutex.h: revision 1.9
sys/arch/sh3/include/mutex.h: revision 1.13
sys/arch/evbarm/lubbock/obio.c: revision 1.13
sys/arch/atari/include/intr.h: revision 1.23
sys/ddb/db_syncobj.c: revision 1.2
sys/arch/vax/include/mutex.h: revision 1.19
sys/arch/evbarm/g42xxeb/obio.c: revision 1.14
sys/arch/evbarm/g42xxeb/obio.c: revision 1.15
sys/arch/cesfic/include/intr.h: revision 1.14
sys/ddb/db_syncobj.h: revision 1.1
sys/arch/x86/include/cpu.h: revision 1.134
sys/arch/evbarm/g42xxeb/obio.c: revision 1.16
sys/arch/cesfic/include/intr.h: revision 1.15
sys/arch/arm/xscale/pxa2x0_intr.c: revision 1.26
sys/sys/cpu_data.h: revision 1.54
sys/arch/m68k/include/mutex.h: revision 1.12
sys/arch/ia64/acpi/madt.c: revision 1.6
sys/rwlock.h: Make this more self-contained for bool.
machine/mutex.h: Sprinkle includes so this can be used by crash(8).
ddb: New `show all tstiles' command.
Shows who's waiting for which locks and what the owner is up to.
Include psl.h for ipl_cookie_t if __MUTEX_PRIVATE
sys: Rip <sys/resourcevar.h> out of <uvm/uvm_param.h>.
And thus out of <sys/param.h>, which is exceedingly overused and
fragile and delenda est.
Should fix (some) issues with the recent inclusion of machine/lock.h
in various machine/mutex.h files.
arm/mutex.h: Need machine/intr.h, machine/lock.h.
For ipl_cookie_t and __cpu_simple_lock_t.
evbarm/intr.h: Define ipl_cookie_t before including ARM_INTR_IMPL.
Otherwise arm/mutex.h doesn't work, due to a cyclic dependency which
should really be fixed.
opencrypto/cryptodev.h: Fix includes.
- Move sys/condvar.h under #ifdef _KERNEL.
- Add some other necessary includes and forward declarations.
- Sort.
hp300/intr.h: Fix missing includes.
linux/idr.h: Need <sys/mutex.h> for kmutex_t.
amiga/intr.h: Don't define spl*() functions if !_KERNEL.
This is used by crash(8) now, and what's important is ipl_cookie_t.
cesfic/intr.h: Expose ipl_cookie_t to userland for crash(8).
cesfic/intr.h: Expose ipl_cookie_t to userland only with _KMEMUSER.
Probably not necessary but let's be a little more cautious about
this.
atari/intr.h: Expose ipl_cookie_t with _KMEMUSER for crash(8).
arm/cpu.h: Need sys/param.h for COHERENCY_UNIT.
Nix machine/param.h -- not meant to be used directly, pulled in by
sys/param.h.
Move the definition of ipl_cookie_t out of the kernel-only sections,
some _KMEMUSER applications need it.
ddb: Cast pointer to uintptr_t first before db_expr_t.
hppa/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8).
luna68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8).
mvme68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8).
news68k/intr.h: Fix includes. Put some definitions under _KERNEL.
next68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8).
sys/ksem.h: Hack around fstat(8) abuse of _KERNEL.
sun68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8).
vax/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8).
x68k/intr.h: Put functions under _KERNEL so crash(8) can use this.
Make ipl_cookie_t visible for _KMEMUSER userland applications.
fix editor mishap in previous
Explicitly include <sys/mutex.h> for kmutex_t.
Replace kmutex_t * (which may be undefined here) with struct kmutex *,
suggested by Taylor.
hp300/intr.h: Put most of this under #ifdef _KERNEL.
Only ipl_cookie_t really needs to be exposed now, for crash(8).
mac68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8).
Make inclusion of sys/intr.h explicit for spl*.
fix hppa and vax builds.
machine/lock.h isn't necessary for __cpu_simple_lock_t, it's in
sys/types.h. avoids cpu_data.h vs sched.h include order issues.
move the hppa ipl_t typedef with the moved usage of it.
machine/mutex.h: Sprinkle sys/types.h, omit machine/lock.h.
Turns out machine/lock.h is not needed for __cpu_simple_lock_t, which
always comes from sys/types.h. And, really, sys/types.h (or at least
sys/stdint.h) is needed for uintN_t and uintptr_t.
ddb: Cast pointer to uintptr_t, then to db_expr_t.
Avoids warnings about conversion between pointer and integer of
different size on some architectures.
re-fix hppa builds.
this file uses __cpu_simple_lock(), not just the underlying type,
so it does need machine/lock.h.
Break cycle by using `struct kmutex *' instead of `kmutex_t *'.
sys/sched.h included sys/mutex.h
which includes sys/intr.h
which includes machine/intr.h
which on cats includes arm/footbridge/footbridge_intr.h
which includes arm/cpu.h
which includes sys/cpu_data.h
which includes sys/sched.h
But there was never any real need for sys/mutex.h in sys/sched.h,
because it only uses pointers to the opaque struct kmutex. Cycle
broken by using `struct kmutex *' instead of pulling in sys/mutex.h
for the definition of kmutex_t.
Side effect: This revealed that sys/cpu_data.h needed sys/intr.h
(which was pulled in accidentally by sys/mutex.h via sys/sched.h) for
SOFTINT_COUNT. Also revealed some other machine/cpu.h header files
were missing includes of sys/mutex.h for kmutex_t.
ia64: Need sys/types.h for u_int, vaddr_t; sys/mutex.h for kmutex_t.
explicitly include no longer implicitly included sys/mutex.h.
arm/xscale: Use sys/bitops.h fls32 - 1 instead of 31 - __builtin_clz.
Sidesteps namespace collision with `#define bits ...' in net/zlib.c.
complete the previous - there were two calls to find_first_bit() to fix.
arm/xscale: Missed a spot with previous find_first_bit commit.
evbarm/g42xxeb: Fix off-by-one in previous.
The original find_first_bit(x) was 31 - __builtin_clz((uint32_t)x),
which is equivalent to fls32(x) - 1, not to fls32(x).
Note that fls32 is 1-based and returns 0 for x=0.
|
| 1.7 | 23-May-2021 |
mrg | fix "uname -p" on mips n32.
this has been returning "mipsn64eb" on my edgerouter4 with the
32 bit uname binary.
introduce o32, n32, and n64 versions of MACHINE_ARCH, and use
them appropriately in PROC_MACHINE_ARCH32(). now o32, n32 and
n64 "uname -p" all return different values.
|
| 1.6 | 26-Jul-2020 |
simonb | branches: 1.6.6; 1.6.8;
#define<tab>
Nuke trailing whitespace.
|
| 1.5 | 31-Oct-2017 |
martin | Allow architectures to define a macro PROC_MACHINE_ARCH(P) and
PROC_MACHINE_ARCH32(P) to override the value for sysctl hw.machine_arch
(native and netbsd32 commpat resp.).
Use these for arm and mips instead of the (not working, noisy, in case
of arm) sysctl override and #ifdef __mips__ in architecture neutral
code.
|
| 1.4 | 17-May-2015 |
matt | machine_arch on mips depends on the ABI so we need a routine to return
the right value.
|
| 1.3 | 19-Feb-2012 |
rmind | branches: 1.3.2; 1.3.16;
Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.14; 1.2.18;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 12-Sep-2009 |
matt | branches: 1.1.2;
file netbsd32_machdep.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 12-Sep-2009 |
matt | Add support for COMPAT_NETBSD32
|
| 1.2.18.1 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.2.14.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file netbsd32_machdep.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:38 +0000
|
| 1.3.16.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.8.1 | 31-May-2021 |
cjep | sync with head
|
| 1.6.6.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.28 | 13-Mar-2021 |
skrll | s/pfi_faultpte/&p/ for consistency with arm / other uses of ptep
|
| 1.27 | 26-Sep-2020 |
simonb | branches: 1.27.2;
Whitespace consistency nit.
|
| 1.26 | 17-Aug-2020 |
mrg | mostly complete basic port of crash(8) to mips.
tested on mipsel and mips64eb. basic functionality works
on the running kernel, not yet tested on crash dumps.
|
| 1.25 | 17-Aug-2020 |
mrg | port crash(8) to mips. (most of the kernel side.)
- expose parts of _KERNEL to _KMEMUSER as well
- hide more things for _KERNEL
- avoid DB_MACHINE_COMMANDS in crash(8)
- XXX add mips_label_t for !_KERNEL and use it in the pcb to
avoid conflicting with the ddb/crash one
- enable dumppcb
some changes to make stack trace fail instead of SEGV and
the userland changes to crash itself not part of this change.
|
| 1.24 | 16-Aug-2011 |
matt | Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.23 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.22 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.21 | 14-Dec-2009 |
matt | branches: 1.21.4; 1.21.6; 1.21.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.20 | 04-Mar-2007 |
christos | branches: 1.20.44; 1.20.62;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.19 | 11-Dec-2005 |
christos | branches: 1.19.26;
merge ktrace-lwp.
|
| 1.18 | 26-Nov-2003 |
he | branches: 1.18.16;
Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.17 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.16 | 30-Nov-2002 |
tsutsui | branches: 1.16.6;
Fix botch in previous. This is pcb.h, not reg.h.
|
| 1.15 | 30-Nov-2002 |
simonb | Add multiple-inclusion protection.
|
| 1.14 | 24-Nov-2002 |
simonb | Move the curpcb and segbase extern decls to cpu.h to better group together
what will need to change for SMP.
Hide 'struct cpu_info' and some macros in #ifdef _KERNEL/#endif.
|
| 1.13 | 12-Jan-2002 |
enami | Define new macro to access FSR register and use it.
|
| 1.12 | 16-Oct-2001 |
uch | branches: 1.12.4;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.11 | 13-Sep-2000 |
nisimura | branches: 1.11.4;
Introduce 'segbase' global variable to hold the pointer to current
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
|
| 1.10 | 28-Mar-2000 |
simonb | Make declaration of curpcb variable extern.
|
| 1.9 | 16-Jan-1999 |
nisimura | branches: 1.9.8;
- User mode context held with pcb_regs[38] in 'struct pcb' was relocated
at the very bottom of process kernel stack. The address is pointed with
'curproc->p_md.md_regs'.
- Define 'struct md_coredump'.
|
| 1.8 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.7 | 15-Jun-1997 |
mhitch | branches: 1.7.12;
From Toru Nishimura: user pcb/proc changes for exception handling and
removing access through UADDR.
|
| 1.6 | 19-Mar-1996 |
jonathan | Change "pmax" -> "mips" before moving to sys/arch/mips/include.
|
| 1.5 | 18-Jan-1995 |
mellon | Make pcb_regs structure compatible with Ultrix
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.7.12.1 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.9.8.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.11.4.2 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.11.4.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.12.4.3 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.12.4.2 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.12.4.1 | 16-Oct-2001 |
nathanw | file pcb.h was added on branch nathanw_sa on 2002-02-28 04:10:43 +0000
|
| 1.16.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.16.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.16.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.18.16.1 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.19.26.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.20.62.5 | 16-Aug-2010 |
matt | fix a typo and add a few missing ifdefs.
Only worry about setting seg0tab if the faulting va would use it.
|
| 1.20.62.4 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.20.62.3 | 15-Feb-2010 |
matt | Put pcb_context first since it has the most interesting data (easier to
dump in debugger).
|
| 1.20.62.2 | 07-Sep-2009 |
matt | pcb_context is a label_t so use label_t as its type.
|
| 1.20.62.1 | 20-Aug-2009 |
matt | u_int32_t -> uint32_t
|
| 1.20.44.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.21.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.21.8.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.21.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.21.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.27.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.10 | 16-Aug-2022 |
skrll | Provide pci_intr_setattr
|
| 1.9 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.8 | 29-Mar-2014 |
christos | make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.
|
| 1.7 | 04-Apr-2011 |
dyoung | branches: 1.7.4; 1.7.14; 1.7.18;
Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.
For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:
Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.
siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.
slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.
viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.
While I'm here, make pci_mapreg_submap() static.
With these changes in place, I have tested the compilation of these
kernels:
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:
### evbmips-el GDIUM
nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop
### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'
### ia64 GENERIC
/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type
### sgimips GENERIC32_IP3x
crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
|
| 1.6 | 14-Dec-2009 |
matt | branches: 1.6.4; 1.6.6;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.5 | 09-Aug-2009 |
matt | s/struct device */device_t /;g
|
| 1.4 | 11-Dec-2005 |
christos | branches: 1.4.78; 1.4.96;
merge ktrace-lwp.
|
| 1.3 | 29-Jul-2004 |
drochner | remove now unnecessary "pci_enumerate_bus" definitions
|
| 1.2 | 15-May-2002 |
thorpej | branches: 1.2.6; 1.2.12;
Let machine-dependent code specify how to enumerate the bus.
Currently, everyone uses pci_enumerate_bus_generic().
|
| 1.1 | 18-Mar-2002 |
simonb | branches: 1.1.4;
Generic PCI/ISA machdep headers for mips; copied from the algor port.
|
| 1.1.4.3 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.1.4.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.4.1 | 18-Mar-2002 |
nathanw | file pci_machdep.h was added on branch nathanw_sa on 2002-04-01 07:40:59 +0000
|
| 1.2.12.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.12.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.12.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.2.6.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.2.6.1 | 15-May-2002 |
jdolecek | file pci_machdep.h was added on branch kqueue on 2002-06-23 17:38:02 +0000
|
| 1.4.96.3 | 23-Dec-2011 |
matt | Add conditional support for __PCI_BUS_DEVORDER, __HAVE_PCI_CONF_HOOK, and
__PCI_DEV_FUNCORDER (new).
|
| 1.4.96.2 | 13-Sep-2009 |
cliff | #ifdef to protect against recursive #include
|
| 1.4.96.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.4.78.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.4.78.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.4.1 | 21-Apr-2011 |
rmind | sync with head
|
| 1.7.18.1 | 18-May-2014 |
rmind | sync with head
|
| 1.7.14.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.7.4.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.77 | 26-Oct-2022 |
skrll | MI PMAP hardware page table walker support.
This is based on code given to me by Matt Thomas a long time ago with
many updates and bugs fixes from me.
|
| 1.76 | 04-Jan-2022 |
skrll | consistency. NFCI.
|
| 1.75 | 20-Dec-2020 |
skrll | Support __HAVE_PMAP_PV_TRACK in sys/uvm/pmap based pmaps (aka common pmap)
|
| 1.74 | 17-Aug-2020 |
mrg | branches: 1.74.2;
port crash(8) to mips. (most of the kernel side.)
- expose parts of _KERNEL to _KMEMUSER as well
- hide more things for _KERNEL
- avoid DB_MACHINE_COMMANDS in crash(8)
- XXX add mips_label_t for !_KERNEL and use it in the pcb to
avoid conflicting with the ddb/crash one
- enable dumppcb
some changes to make stack trace fail instead of SEGV and
the userland changes to crash itself not part of this change.
|
| 1.73 | 07-Aug-2020 |
skrll | Provide a pmap_segtab_deactivate for symmetry with pmap_segtab_activate
and use it in pmap_deactivate
Call pmap_md_xtab_{,de}activate from pmap_segtab_{,de}activate to be used
for PMAP_HWPAGEWALKER and any caches ops that might be required.
Provide empty (for now) pmap_md_xtab_{,de}activate functions on the
platforms that use sys/uvm/pmap
|
| 1.72 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.71 | 01-Apr-2019 |
msaitoh | s/adddress/address/
|
| 1.70 | 24-Jul-2017 |
mrg | branches: 1.70.4;
mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.
also test-built some other mips kernels.
|
| 1.69 | 23-Dec-2016 |
cherry | branches: 1.69.8;
"Make NetBSD great again!"
Introduce uvm_hotplug(9) to the kernel.
Many thanks, in no particular order to:
TNF, for funding the project.
Chuck Silvers - for multiple API reviews and feedback.
Nick Hudson - for testing on multiple architectures and bugfix patches.
Everyone who helped with boot testing.
KeK (http://www.kek.org.in) for hosting the primary developers.
|
| 1.68 | 11-Jul-2016 |
matt | branches: 1.68.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.67 | 11-Jun-2015 |
matt | Define (but not use) separate kernel and user pagetables.
Move to the new names.
|
| 1.66 | 11-Jun-2015 |
matt | Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_start to get the
VA space it needs.
pmap_segtab.c is almost identical to uvm/pmap/pmap_segtab.c now. It won't
be long until we switch to the uvm/pmap one.
|
| 1.65 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.64 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.63 | 11-May-2014 |
skrll | branches: 1.63.4;
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.62 | 05-Jul-2012 |
matt | branches: 1.62.2; 1.62.4; 1.62.12;
Change lockless segtab management to use a mutex for protection. Some minor
changes to make this closer to common/pmap/tlb/pmap_segtab.c
|
| 1.61 | 22-Sep-2011 |
macallan | branches: 1.61.2; 1.61.8;
support BUS_SPACE_MAP_PREFETCH in order to allow mapping device memory and
DMA buffers with cacheing disabled but things like write combining, relaxed
ordering etc. allowed when the CPU supports it
so far enabled only on Loongson, should work on R1xk and probably newer CPUs
|
| 1.60 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.59 | 14-Nov-2010 |
uebayasi | branches: 1.59.2; 1.59.4;
Move struct vm_page_md definition from vmparam.h to pmap.h, because
it's used only by pmap. vmparam.h has definitions for wider
audience.
All GENERIC kernels build tested, except ia64.
powerpc/include/booke/vmparam.h has one too, but it has no pmap.h,
so it's left as is.
|
| 1.58 | 06-Jul-2010 |
cegger | Turn PMAP_NOCACHE into MI flag.
Add MI flags PMAP_WRITE_COMBINE, PMAP_WRITE_BACK, PMAP_NOCACHE_OVR.
Update pmap(9) manpage.
hppa: Remove MD PMAP_NOCACHE flag as it exists as MI flag
mips: Rename MD PMAP_NOCACHE to PGC_NOCACHE.
x86: Implement new MI flags using Page-Attribute Tables.
x86: Implement BUS_SPACE_MAP_PREFETCHABLE.
Patch presented on tech-kern@:
http://mail-index.netbsd.org/tech-kern/2010/06/30/msg008458.html
No comments on this last version.
|
| 1.57 | 14-Dec-2009 |
matt | branches: 1.57.2; 1.57.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.56 | 29-Jun-2009 |
tsutsui | Since pmap.c rev 1.163, page attributes of PV_MODIFIED and PV_REFERENCED
have beem moved from pv_flags in struct pv_entry to pvh_attrs in
struct vm_page_md, so no need to copy pv_flags to keep these flags
in pv header in pmap_remove_pv(). Pointed out by uebayasi@ on port-mips.
Also rename those page attribute flags from PV_FOO to PGA_FOO like alpha.
While here, make pv_flags unsigned.
Briefly tested on sgimips O2.
|
| 1.55 | 09-Dec-2008 |
pooka | Make pmap_kernel() a MI macro for struct pmap *kernel_pmap_ptr,
which is now the "API" provided by the pmap module. pmap_kernel()
remains as the syntactic sugar.
Bonus cosmetics round: move all the pmap_t pointer typedefs into
uvm_pmap.h.
Thanks to Greg Oster for providing cpu muscle for doing test builds.
|
| 1.54 | 26-Dec-2007 |
ad | branches: 1.54.6; 1.54.10; 1.54.16; 1.54.18; 1.54.26;
Merge more changes from vmlocking2, mainly:
- Locking improvements.
- Use pool_cache for more items.
|
| 1.53 | 17-Oct-2007 |
garbled | branches: 1.53.2; 1.53.4; 1.53.8;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.52 | 17-Jul-2007 |
macallan | branches: 1.52.10;
if we have 64bit paddr_t add a flag which indicates non-cachable for use
with mmap*() and pmap_enter()
Mainly for allowing userland to mmap() the O2's framebuffer uncached
|
| 1.51 | 16-Jul-2007 |
macallan | change pmap_phys_address()s parameter to paddr_t since that's what it gets
fed from mmap*() anyway
approved by gimpy
|
| 1.50 | 16-Feb-2006 |
perry | branches: 1.50.24; 1.50.32;
Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.
As per core@.
|
| 1.49 | 24-Dec-2005 |
perry | branches: 1.49.2; 1.49.4; 1.49.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.48 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.47 | 26-Mar-2005 |
tsutsui | branches: 1.47.2;
Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.46 | 17-Jan-2005 |
atatat | branches: 1.46.2; 1.46.6;
Teach mips pmap_prefer() to deal with topdown.
Tested by simonb.
|
| 1.45 | 17-Jan-2005 |
atatat | Convert the PMAP_PREFER() macro from two arguments (offset and hint)
to four (adding size and direction).
In order for topdown uvm to be an option on ports using PMAP_PREFER,
they will need to "prefer" lower addresses if topdown is being used.
Additionally, at least one port also needs to know the size.
|
| 1.44 | 07-Aug-2003 |
agc | branches: 1.44.8;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.43 | 09-Apr-2003 |
thorpej | branches: 1.43.2;
Cast the arg to MIPS_KSEG0_TO_PHYS() in POOL_VTOPHYS() (thanks, nathan!).
|
| 1.42 | 09-Apr-2003 |
thorpej | Add the ability for pool caches to cache the physical address of
objects. Clients of the pool_cache API must consistently use
the "paddr" variants or not, otherwise behavior is undefined.
Enable this on Alpha, ARM, MIPS, and x86. Other platforms must
define POOL_VTOPHYS() in the appropriate manner in order to enable
the feature.
Part 1 of a series of simple patches contributed by Wasabi Systems
to improve network performance.
|
| 1.41 | 30-Nov-2002 |
simonb | Standardise on #ifdef _MIPS_<header>_H_ for multiple inclusion tests.
|
| 1.40 | 22-Sep-2002 |
chs | it really helps to get the stub right before cutting + pasting it 27 times.
alas, I did not. doh.
|
| 1.39 | 22-Sep-2002 |
chs | add pmap_remove_all() hook (empty on most platforms so far).
|
| 1.38 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
Better cache coherency attribute macros (from Broadcom Corp).
|
| 1.37 | 10-Sep-2001 |
chris | branches: 1.37.4;
Update pmap_update to now take the updated pmap as an argument.
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.
Currently this is a no-op on most platforms, so they should see no difference.
Reviewed by Jason.
|
| 1.36 | 04-Aug-2001 |
chs | branches: 1.36.2;
remove the uncached idle-loop page zeroing.
(to be replaced by a version that uses the cache...)
|
| 1.35 | 26-May-2001 |
chs | branches: 1.35.2;
replace vm_page_t with struct vm_page *.
|
| 1.34 | 26-May-2001 |
chs | replace {simple_,}lock{_data,}_t with struct {simple,}lock {,*}.
|
| 1.33 | 22-Apr-2001 |
thorpej | Undo a misguided previous change to the pmap_update() API.
|
| 1.32 | 22-Apr-2001 |
thorpej | Give pmap_update() an argument (a pmap_t) so that it knows which
pmap it should be updating.
|
| 1.31 | 21-Apr-2001 |
thorpej | #define away pmap_update() in <machine/pmap.h> so that no function
call overhead is incurred as we start sprinkling pmap_update() calls
throughout the source tree (no pmaps currently defer operations, but
we are adding the infrastructure to allow them to do so).
|
| 1.30 | 25-Dec-2000 |
nisimura | branches: 1.30.2;
- fix typos in mips_user_cacheflush() and mips_user_cachectl().
- relocate those function declarations from include/pmap.h.
|
| 1.29 | 21-Sep-2000 |
thorpej | Make PMAP_PAGEIDLEZERO() return a boolean value. FALSE indidcates
that the page being zero'd was not completed and that page zeroing
should be aborted. This may be used by machine-dependent code doing
slow page access to reduce the latency of running a process that has
become runnable while in the middle of doing a slow page zero.
|
| 1.28 | 28-Apr-2000 |
soren | Zero free pages in the idle loop.
|
| 1.27 | 18-May-1999 |
nisimura | branches: 1.27.2;
- Move MachSetPID(1) call to pmap_bootstrap() adajacent to kernel pmap
initialization code.
- Abandon mips_init_proc0() and do the 4 lines straightly in MD mach_init().
- Restore a block of code accidentally lost in prevous commit.
- Change the term 'tlbpid' to a MIPS3 nomenclature 'asid'.
- Hide PTE size exposures by symbolic names in locore.S
|
| 1.26 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.25 | 26-Feb-1999 |
is | branches: 1.25.4;
MIPS part of fix for PR 6152, sligtly changed from M.Hitch's version
|
| 1.24 | 18-Jan-1999 |
castor | Remove vestiges of cpuarch.h. Revert to using cpuregs.h instead.
|
| 1.23 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.22 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.21 | 29-Nov-1998 |
jonathan | Add PV_REFERENCED and track as for PV_MODIFIED,.
UVM relies on pmap modules keeping track of modified/referenced bits
after a page has been removed from all mappings. So *dont* clear
PV_REFERENCED or PV_MODIFIED flags in pmap_remove().
|
| 1.20 | 15-Nov-1998 |
mhitch | Change page modification emulation: don't fiddle with VM flags directly.
Track page modification status in the PV entry like the alpha, and let
pmap_is_modified() return current status back to the VM system. UVM now
works reliably.
Garbage collect the old pmap_attribute[] stuff.
|
| 1.19 | 26-Jul-1998 |
simonb | branches: 1.19.4;
Fix typo with new poolpage stuff
|
| 1.18 | 24-Jul-1998 |
thorpej | Provide PMAP_{,UN}MAP_POOLPAGE().
|
| 1.17 | 25-Feb-1998 |
thorpej | Implement and switch to MACHINE_NEW_NONCONTIG.
|
| 1.16 | 03-Jan-1998 |
thorpej | Now that all ports have pmap_activate(), and it has an identical interface,
prototype it in <vm/pmap.h>
|
| 1.15 | 09-Aug-1997 |
jonathan | mips pmap_activate:
* prototype and definition for pmap_activate(p). Updates the segtab,
and changes the active ASID if p == curproc.
* Make reserved fixed-address (UADDR) kernelstack PTEs global,
so we still have a kernel stack after pmap_activate() on curproc.
* make KSEG2 mappings for p_addr global (see above.)
Seems to detune contextswitch and NTP resolution (by 60 ms), but
thepmap_activate() interface is mandatory. Needs more thought.
|
| 1.14 | 29-Jul-1997 |
mhitch | branches: 1.14.2;
Resident count in pmap is now valid. I can now see RSS in ps.
|
| 1.13 | 16-Jun-1997 |
jonathan | Yet more mips1/mips3 merging:
Move mips-specific pmap definitions (PMAP_PREFER for mips3, declaratin
of pmap_bootstrap() for the system-specific machdep.c) from
arch/pmax/include/pmap.h to arch/mips/include/pmap.h.
|
| 1.12 | 09-Jun-1997 |
jonathan | Add sys_sysarch() calls for the standard mips userspace cache-control calls.
|
| 1.11 | 18-May-1997 |
mhitch | Eliminate vm_pmap.
|
| 1.10 | 16-May-1997 |
gwr | Add #define __VM_PMAP_HACK as a temporary measure.
|
| 1.9 | 19-Mar-1996 |
jonathan | Change "pmax_xxx" macros to "mips_xxx" macros, in preparation
for moving to src/sys/arch/mips/include/pmap.h.
|
| 1.8 | 12-Apr-1995 |
mellon | Use _KERNEL, not KERNEL
|
| 1.7 | 10-Apr-1995 |
mycroft | Bring back pmap_kernel(), for now always inlined as a pointer to
kernel_pmap_store.
|
| 1.6 | 28-Mar-1995 |
jtc | KERNEL -> _KERNEL
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 15-Oct-1993 |
deraadt | update from rick, tarfile of Oct 11 10:46
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.14.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.19.4.4 | 06-Dec-1998 |
drochner | pull up 1.21 - PV_REFERENCED
|
| 1.19.4.3 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.19.4.2 | 15-Nov-1998 |
drochner | sync to trunk (page modified bit handling, needed for UVM)
|
| 1.19.4.1 | 15-Oct-1998 |
nisimura | - cpuregs.h was modifed a bit, then renamed with cpuarch.h.
- mips_cpu.h has gone.
- CPU's register mnemonics in regdef.h is now a part of asm.h.
|
| 1.25.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.27.2.3 | 23-Apr-2001 |
bouyer | Sync with HEAD.
|
| 1.27.2.2 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.27.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.30.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.35.2.4 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.35.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.35.2.2 | 13-Sep-2001 |
thorpej | Update the kqueue branch to HEAD.
|
| 1.35.2.1 | 25-Aug-2001 |
thorpej | Merge Aug 24 -current into the kqueue branch.
|
| 1.36.2.1 | 01-Oct-2001 |
fvdl | Catch up with -current.
|
| 1.37.4.4 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.37.4.3 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.37.4.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.37.4.1 | 10-Sep-2001 |
nathanw | file pmap.h was added on branch nathanw_sa on 2002-04-01 07:40:59 +0000
|
| 1.43.2.5 | 01-Apr-2005 |
skrll | Sync with HEAD.
|
| 1.43.2.4 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.43.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.43.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.43.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.44.8.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.46.6.1 | 21-Nov-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #961):
sys/arch/mips/mips/cache.c: revision 1.27
sys/arch/mips/include/cache.h: revision 1.8
sys/arch/mips/mips/pmap.c: revision 1.158
sys/arch/mips/mips/vm_machdep.c: revision 1.106
sys/arch/mips/mips/mem.c: revision 1.30
sys/arch/mips/include/pmap.h: revision 1.47
Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.46.2.1 | 26-Mar-2005 |
yamt | sync with head.
|
| 1.47.2.2 | 21-Jan-2008 |
yamt | sync with head
|
| 1.47.2.1 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.49.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.49.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.49.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.50.32.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.50.24.2 | 20-Aug-2007 |
ad | Sync with HEAD.
|
| 1.50.24.1 | 15-Jul-2007 |
ad | Get pmax working.
|
| 1.52.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.52.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.53.8.1 | 02-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.53.4.1 | 04-Dec-2007 |
ad | Pull the vmlocking changes into a new branch.
|
| 1.53.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.54.26.28 | 08-Aug-2012 |
matt | Fix some LP64 bugs
|
| 1.54.26.27 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.54.26.26 | 09-Jul-2012 |
matt | Use a spinlock to protect the segtab queues. Use union pmap_segmap and
pmap_segmap_t to track -HEAD. Use KERNEL_PID for the same reason.
|
| 1.54.26.25 | 27-Feb-2012 |
matt | Add a page-table-page cache to keep reuse just released page table tables.
Actually remove the addresses in pmap_remove_all.
|
| 1.54.26.24 | 16-Feb-2012 |
matt | Move the ksegx tlb init code into its own function.
Fix a problem with concurrent shootdowns by tracking what cpus want a
shootdown for a pmap, and if anoter cpu wants a shootdown, perform the
shootdown on ourselves.
|
| 1.54.26.23 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.54.26.22 | 27-Dec-2011 |
matt | Deal with not defining PAGE_SIZE or PAGE_SHIFT for non-kernel inclusion.
|
| 1.54.26.21 | 27-Dec-2011 |
matt | Make these play nice with modules.
|
| 1.54.26.20 | 23-Dec-2011 |
matt | Split syncicache functions into separate file: pmap_syncicache.
Support up to 1024 ASIDs.
Always use atomic ops for manipulating pm_shootdown_pending
Nuke PMAP_POOLPAGE_DEBUG
defparam MIPS_PAGE_SHIFT
Track colors of execpages.
|
| 1.54.26.19 | 03-Dec-2011 |
matt | Rework things a bit for the XLR/XLS/XLP TLB. Before dealing with the TLB when
MP on the XL?, disable interrupts and take out a lock to prevent concurrent
updates to the TLB. In the TLB miss and invalid exception handlers, if the
lock is already owned by another CPU, simply return from the exception and
let it continue or restart as appropriate. This prevents concurrent TLB
exceptions in multiple threads from possibly updating the TLB multiple times
for a single address.
|
| 1.54.26.18 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.54.26.17 | 05-Feb-2011 |
cliff | - protect option includes ("opt_multiprocessor.h") with #ifdef _KERNEL_OPT
|
| 1.54.26.16 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for explicit MULTIPROCESSOR dependency
|
| 1.54.26.15 | 22-Dec-2010 |
matt | Add a pmap_asid_check which verifies the current ASID is in COP0 ENTRY_HI
|
| 1.54.26.14 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.54.26.13 | 04-May-2010 |
matt | Add pm_flags and PMAP_DEFERRED_ACTIVATE
|
| 1.54.26.12 | 11-Mar-2010 |
matt | Add MP-aware icache support.
|
| 1.54.26.11 | 27-Feb-2010 |
matt | Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
|
| 1.54.26.10 | 25-Feb-2010 |
matt | Make the UP and MP ASID allocation algorithm common. Significantly improve
the algorithm. Now when we exhaust the ASIDs, interrogate the TLB for active
ASIDS and release all the other for future allocations. This leaves the
TLB entries with ASIDs valid avoiding the need to re-incur TLB misses for
them.
|
| 1.54.26.9 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.54.26.8 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.54.26.7 | 22-Jan-2010 |
matt | Seperate the pmap TLB functions into their own file.
For 32 bit kernels, make sure that mips_virtual_end doesn't go past
VM_MAX_KERNEL_ADDRESS.
|
| 1.54.26.6 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.54.26.5 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.54.26.4 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.54.26.3 | 31-Dec-2009 |
matt | Use mips_page_physload and mips_init_lwp0_uarea.
|
| 1.54.26.2 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.54.26.1 | 07-Sep-2009 |
matt | Cleanup for LP64. XXX pv_entry needs work.
|
| 1.54.18.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.54.16.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.54.10.4 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.54.10.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.54.10.2 | 18-Jul-2009 |
yamt | sync with head.
|
| 1.54.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.54.6.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.57.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.57.2.2 | 16-Nov-2010 |
uebayasi | Sync with HEAD.
|
| 1.57.2.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.59.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.59.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.61.8.2 | 11-Jun-2014 |
msaitoh | Pull up following revision(s) (requested by skrll in ticket #1068):
sys/arch/mips/mips/pmap.c: revision 1.214
sys/arch/mips/include/pmap.h: revision 1.63
sys/arch/mips/mips/pmap_segtab.c: revision 1.8
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable/unusable on cobalt qube2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.61.8.1 | 05-Jul-2012 |
riz | branches: 1.61.8.1.4; 1.61.8.1.6;
Pull up following revision(s) (requested by matt in ticket #406):
sys/arch/mips/include/pmap.h: revision 1.62
sys/arch/mips/mips/pmap.c: revision 1.208
sys/arch/mips/mips/pmap_segtab.c: revision 1.5
Change lockless segtab management to use a mutex for protection. Some =
minor
changes to make this closer to common/pmap/tlb/pmap_segtab.c
=20
=20
|
| 1.61.8.1.6.1 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1068):
sys/arch/mips/include/pmap.h: revision 1.63
sys/arch/mips/mips/pmap.c: revision 1.214
sys/arch/mips/mips/pmap_segtab.c: revision 1.8
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.61.8.1.4.1 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1068):
sys/arch/mips/include/pmap.h: revision 1.63
sys/arch/mips/mips/pmap.c: revision 1.214
sys/arch/mips/mips/pmap_segtab.c: revision 1.8
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.61.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.61.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.62.12.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.62.4.1 | 18-May-2014 |
rmind | sync with head
|
| 1.62.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.62.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.63.4.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.63.4.3 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.63.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.63.4.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.68.2.1 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.69.8.1 | 30-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #231):
distrib/sets/lists/base/md.evbmips 1.3
doc/CHANGES 1.2303-1.2304
etc/etc.evbmips/MAKEDEV.conf 1.8
etc/etc.evbmips/Makefile.inc 1.22
etc/mtree/Makefile 1.37
etc/mtree/NetBSD.dist.evbmips 1.1
sys/arch/evbmips/Makefile 1.9
sys/arch/evbmips/conf/SBMIPS upto 1.2
sys/arch/evbmips/conf/SBMIPS.MP upto 1.2
sys/arch/evbmips/conf/SBMIPS64 upto 1.2
sys/arch/evbmips/conf/SBMIPS64.MP upto 1.2
sys/arch/evbmips/conf/files.sbmips upto 1.2
sys/arch/evbmips/conf/std.sbmips upto 1.2
sys/arch/evbmips/include/disklabel.h 1.6
sys/arch/evbmips/include/loadfile_machdep.h
sys/arch/evbmips/include/param.h 1.10
sys/arch/evbmips/include/pci_machdep.h 1.3
sys/arch/evbmips/sbmips/TODO
sys/arch/evbmips/sbmips/autoconf.c
sys/arch/evbmips/sbmips/autoconf.h
sys/arch/evbmips/sbmips/console.c
sys/arch/evbmips/sbmips/cpu.c upto 1.3
sys/arch/evbmips/sbmips/cpuvar.h
sys/arch/evbmips/sbmips/disksubr.c
sys/arch/evbmips/sbmips/leds.h
sys/arch/evbmips/sbmips/locore_machdep.S
sys/arch/evbmips/sbmips/machdep.c upto 1.2
sys/arch/evbmips/sbmips/rtc.c upto 1.2
sys/arch/evbmips/sbmips/sb1250_icu.c upto 1.2
sys/arch/evbmips/sbmips/swarm.h
sys/arch/evbmips/sbmips/systemsw.c upto 1.2
sys/arch/evbmips/sbmips/systemsw.h
sys/arch/evbmips/sbmips/zbbus.c upto 1.2
sys/arch/evbmips/stand/Makefile 1.1
sys/arch/evbmips/stand/sbmips/Makefile
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs upto 1.2
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs 1.3
sys/arch/evbmips/stand/sbmips/Makefile.bootxx
sys/arch/evbmips/stand/sbmips/Makefile.inc upto 1.3
sys/arch/evbmips/stand/sbmips/boot/Makefile
sys/arch/evbmips/stand/sbmips/boot/filesystem.c
sys/arch/evbmips/stand/sbmips/boot/version
sys/arch/evbmips/stand/sbmips/bootxx_cd9660/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_ffs/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_lfs/Makefile
sys/arch/evbmips/stand/sbmips/common/bbinfo.h
sys/arch/evbmips/stand/sbmips/common/blkdev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/blkdev.h
sys/arch/evbmips/stand/sbmips/common/boot.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/boot.ldscript
sys/arch/evbmips/stand/sbmips/common/booted_dev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/bootxx.c
sys/arch/evbmips/stand/sbmips/common/cfe.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.h
sys/arch/evbmips/stand/sbmips/common/cfe_api_int.h
sys/arch/evbmips/stand/sbmips/common/cfe_error.h
sys/arch/evbmips/stand/sbmips/common/cfe_ioctl.h
sys/arch/evbmips/stand/sbmips/common/checksize.sh
sys/arch/evbmips/stand/sbmips/common/common.h
sys/arch/evbmips/stand/sbmips/common/panic_putstr.c
sys/arch/evbmips/stand/sbmips/common/putstr.c
sys/arch/evbmips/stand/sbmips/common/start.S
sys/arch/evbmips/stand/sbmips/netboot/Makefile
sys/arch/evbmips/stand/sbmips/netboot/conf.c
sys/arch/evbmips/stand/sbmips/netboot/dev_net.c
sys/arch/evbmips/stand/sbmips/netboot/devopen.c
sys/arch/evbmips/stand/sbmips/netboot/getsecs.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/if_cfe.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/version
sys/arch/mips/conf/files.sibyte 1.8
sys/arch/mips/include/pmap.h 1.70
sys/arch/mips/sibyte/dev/sbbuswatch.c 1.4
sys/arch/mips/sibyte/dev/sbmac.c 1.49
sys/arch/mips/sibyte/dev/sbscn.c 1.43
sys/arch/mips/sibyte/dev/sbsmbus.c 1.17
sys/arch/mips/sibyte/dev/sbtimer.c 1.21
sys/arch/mips/sibyte/dev/sbwdog.c 1.15
sys/arch/mips/sibyte/pci/sbbrz_pci.c 1.8
usr.sbin/installboot/installboot.8 1.94
Move sys/arch/sbmips/* into sys/arch/evbmips/*/sbmips.
|
| 1.70.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.74.2.1 | 03-Jan-2021 |
thorpej | Sync w/ HEAD.
|
| 1.2 | 12-Jul-2018 |
maxv | Remove the kernel PMC code. Sent yesterday on tech-kern@.
This change:
* Removes "options PERFCTRS", the associated includes, and the associated
ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is
good.
* Removes the PMC code of ARM XSCALE.
* Removes all the pmc.h files. They were all empty, except for ARM XSCALE.
* Reorders the x86 PMC code not to rely on the legacy pmc.h file. The
definitions are put in sysarch.h.
* Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control
and sys_pmc_get_info syscalls. They are marked as OBSOL in kern,
netbsd32 and rump.
* Removes the pmc_evid_t and pmc_ctr_t types.
* Removes all the associated man pages. The sets are marked as obsolete.
|
| 1.1 | 07-Aug-2002 |
briggs | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.202; 1.1.204;
Implement pmc(9) -- An interface to hardware performance monitoring
counters. These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.
pmc(9) is meant to be a general interface. Initially, the Intel XScale
counters are the only ones supported.
|
| 1.1.204.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.202.1 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 07-Aug-2002 |
jdolecek | file pmc.h was added on branch kqueue on 2002-09-06 08:37:31 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 07-Aug-2002 |
gehenna | file pmc.h was added on branch gehenna-devsw on 2002-08-31 13:45:20 +0000
|
| 1.1.2.2 | 13-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 07-Aug-2002 |
nathanw | file pmc.h was added on branch nathanw_sa on 2002-08-13 02:18:29 +0000
|
| 1.33 | 06-Dec-2020 |
christos | don't expose vaddr_t to userland.
|
| 1.32 | 04-Sep-2020 |
mrg | branches: 1.32.2;
include machine/vmparam.h vs mips/vmparam.h to make sure we get
platform-specific defines first.
fixes build issue for playstation2.
|
| 1.31 | 26-Aug-2020 |
simonb | Define a UPAGES_MAX constant to size the a md_upte array in MIPS's
struct mdlwp. This is exposed to userland, so we can't use something
based on PAGE_SIZE.
|
| 1.30 | 23-Aug-2020 |
simonb | Use a 16kB USPACE (and larger kernel stack) for LP64 kernels. Invert
the logic for setting the USPACE size. Define a desired USPACE size
(16kB for LP64, 8kB otherwise) then divide by PAGE_SIZE to get UPAGES.
Fixes random segmap lossage, since the uarea usually sits immediately
above the segmap for a process. Thanks to mrg@, skrll@ and dholland@
for testing, debugging and general help tracking down this problem.
|
| 1.29 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.28 | 30-Jun-2015 |
matt | Make vmparam.h change work with RUMP
|
| 1.27 | 20-Feb-2011 |
matt | branches: 1.27.14; 1.27.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.26 | 14-Jan-2011 |
rmind | branches: 1.26.2; 1.26.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.25 | 14-Dec-2009 |
matt | branches: 1.25.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.24 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.23 | 20-Aug-2009 |
cliff | include mips/vmparam.h to get PAGE_SIZE
|
| 1.22 | 17-Aug-2009 |
matt | Only include md_uptes if USPACE > PAGE_SIZE
|
| 1.21 | 16-Nov-2007 |
skrll | branches: 1.21.18; 1.21.36;
s/proc/lwp/ in comment
|
| 1.20 | 09-Feb-2007 |
ad | branches: 1.20.6; 1.20.16; 1.20.22; 1.20.24; 1.20.28; 1.20.30;
Merge newlock2 to head.
|
| 1.19 | 24-Dec-2005 |
perry | branches: 1.19.20;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.18 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.17 | 07-Aug-2003 |
agc | branches: 1.17.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.16 | 17-Jan-2003 |
thorpej | branches: 1.16.2;
Merge the nathanw_sa branch.
|
| 1.15 | 09-Nov-2002 |
thorpej | Make md_ss_addr a vaddr_t.
|
| 1.14 | 05-Mar-2002 |
simonb | ANSIfy.
|
| 1.13 | 16-Oct-2001 |
uch | branches: 1.13.4;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.12 | 16-Jan-2001 |
thorpej | branches: 1.12.4;
New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
|
| 1.11 | 14-Jan-2001 |
thorpej | Make the astpending flag per-process.
|
| 1.10 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.9 | 14-Jan-1999 |
castor | branches: 1.9.8;
* Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.8 | 07-Jul-1997 |
jonathan | branches: 1.8.10;
DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.7 | 15-Jun-1997 |
mhitch | From Toru Nishimura: user pcb/proc changes for exception handling and
removing access through UADDR.
|
| 1.6 | 02-Jun-1997 |
jonathan | Add #ifdef _KERNEL/#endif around prototype of mips single-step emulator.
Add "struct proc;" inside the ifdef: <sys/proc.h> includes <machine/proc.h>
before declaring struct proc.
|
| 1.5 | 25-May-1997 |
jonathan | Rename cpu_singlstep() to mips_singlestep() and add prototype.
(it's not part of the standard interface to MD code.)
XXX Consider moving into process_machdep.c when the mips3 changes are merged.
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.8.10.1 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.9.8.2 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.9.8.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.12.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.12.4.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.13.4.7 | 20-Nov-2002 |
wdk | md_ss_addr is now vaddr_t.
|
| 1.13.4.6 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.13.4.5 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.13.4.4 | 28-Nov-2001 |
wdk | #include <sys/param.h> which is required for definition of UPAGES
|
| 1.13.4.3 | 19-Nov-2001 |
wdk | forward decl of "struct proc" should be "struct lwp"
|
| 1.13.4.2 | 17-Nov-2001 |
wdk | Split mdproc components into lwp-specific structure struct mdlwp
|
| 1.13.4.1 | 16-Oct-2001 |
wdk | file proc.h was added on branch nathanw_sa on 2001-11-17 23:18:22 +0000
|
| 1.16.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.16.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.16.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.17.16.3 | 07-Dec-2007 |
yamt | sync with head
|
| 1.17.16.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.17.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.19.20.3 | 02-Feb-2007 |
ad | The TLB miss handler doesn't need to worry about RAS, oops.
|
| 1.19.20.2 | 27-Jan-2007 |
ad | Make mips systems work.
|
| 1.19.20.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.20.30.1 | 19-Nov-2007 |
mjf | Sync with HEAD.
|
| 1.20.28.1 | 18-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.20.24.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.20.22.1 | 21-Nov-2007 |
joerg | Sync with HEAD.
|
| 1.20.16.1 | 18-Jul-2007 |
matt | Change last argument for plain/fancy syscall to vaddr_t (since it's the
address of the opcode). Add a md_abi field.
|
| 1.20.6.1 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.21.36.11 | 27-Dec-2011 |
matt | Make these play nice with modules.
|
| 1.21.36.10 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.21.36.9 | 09-Jun-2010 |
matt | Add support for setting/clearing PK_32 on _LP64 kernels. Make cpu_proc_fork
a real function and add it to vm_machdep.c and let it copy PK_32 on fork.
Properly clear/set PK_32 depending on ABI in setregs. Lack of PX_32 use
tracked down by Cliff Neighbors. [Ya! ps now works!]
|
| 1.21.36.8 | 15-May-2010 |
matt | Add kernel support for MIPS TLS. Use rdhwr rt, $29 as defined by the MIPS
TLS spec so that Linux MIPS binaries will work. Use sysarch(MIPS_TINFOSET, v)
to set the pointer.
|
| 1.21.36.7 | 11-Mar-2010 |
matt | Change md_astpending to u_int
|
| 1.21.36.6 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.21.36.5 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.21.36.4 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.21.36.3 | 05-Sep-2009 |
matt | Make sure this is quad-word (16 byte) aligned. Thus when one is allocated
on the stack, the stack stays 16 byte aligned.
|
| 1.21.36.2 | 21-Aug-2009 |
matt | No need for md_fancy anymore since p_trace_enabled already has what we want.
|
| 1.21.36.1 | 20-Aug-2009 |
matt | Change md_regs in mdlwp to struct frame * from void *. Every use just casts
it to struct frame * anyways so enforce the type.
Add p_abi which indicates the ABI of the process.
|
| 1.21.18.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.21.18.2 | 16-Sep-2009 |
yamt | sync with head
|
| 1.21.18.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.25.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.26.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.26.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.27.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.27.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.32.2.1 | 14-Dec-2020 |
thorpej | Sync w/ HEAD.
|
| 1.25 | 18-Feb-2021 |
skrll | Revert previous... somehow the register names aren't available apparently
|
| 1.24 | 17-Feb-2021 |
skrll | Use the register name and not its number in _PROF_CPLOAD.
"yes please!" from simon@
|
| 1.23 | 16-Feb-2021 |
simonb | Working kernel profiling for n32/n64:
- Different MCOUNT and _KERN_MCOUNT macros for n32/n64.
- Don't profile mipsXX_lwp_trampoline().
- Allow a few new instructions in the stub fixups.
|
| 1.22 | 26-Jul-2020 |
simonb | branches: 1.22.2;
#define<tab>
Nuke trailing whitespace.
|
| 1.21 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.20 | 24-Dec-2005 |
perry | branches: 1.20.96; 1.20.100; 1.20.106; 1.20.108;
__asm__ -> __asm
__const__ -> const
__inline__ -> inline
__volatile__ -> volatile
|
| 1.19 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.18 | 07-Aug-2003 |
agc | branches: 1.18.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.17 | 05-Mar-2002 |
simonb | branches: 1.17.14;
ANSIfy.
|
| 1.16 | 05-Feb-2002 |
thorpej | Don't put `frompc' into a0 in the delay slot of the __mcount
call; `jal __mcount' might be expanded by the assembler, and
thus a bogus `frompc' value could be passed.
|
| 1.15 | 18-Jul-2000 |
jeffs | branches: 1.15.4; 1.15.8;
Use spl*_noprof routines to raise and lower spl for kernel profiling.
This keeps the SR management more contained in locore, and should
be roughly the same performance as the .text size is less. Talked
to simonb and he was ok with this change.
|
| 1.14 | 25-May-2000 |
simonb | Fix kernel profiling so that it actually works:
- Add 16 bytes to the stack on entry to _mcount so we don't
overflow it.
- Use inline interrupt {dis,en}abling instead of calling
profiled function in locore.
|
| 1.13 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.12 | 11-Sep-1998 |
jonathan | branches: 1.12.14;
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.11 | 05-Nov-1997 |
thorpej | asm -> __asm__
|
| 1.10 | 18-Oct-1997 |
jonathan | branches: 1.10.2;
Make the __mcount entrypoint non-static for kernels, to avoid any
chance of gprof mis-report profile ticks in __mcount to the following
function in libkern (currently _qdivrem).
|
| 1.9 | 20-Jul-1997 |
jonathan | Use __attribute__((unused). From Chris G. Demetriou <cgd@pa.dec.com>.
|
| 1.8 | 19-Jul-1997 |
jonathan | Add pointer to _mcount to avoid bogus warnings about unused static function.
(calls from interpolated assembler are invisible to gcc.)
If _KERNEL, add prototypes for non-profiled entrypoints _splhigh(), _splx().
|
| 1.7 | 11-Nov-1996 |
jonathan | Change "___mcount" -> "__mcount" in asm() code in arch/mips/include/profile.h.
Fixes profiling for non-underscore-prepending toolchains
(elf, e.g., shared libs), and breaks a.out/ecoff toolchains.
May break mips kernel profiling too. Needs more thought, since the
original intent of __mcount vs ___mcount on mips date back to pre-1.0 days.
|
| 1.6 | 31-May-1995 |
jonathan | Change reference in asm code from ``__mcount'' to ``___mcount'', to be
consistent with the (default) prepending of underscores to identifiers.
Because this reference is inside an ASM string it's too hairy to
conditionalize to support different toolchains that don't prepend underscores.
(Just don't do profiling with such toolchains.)
|
| 1.5 | 28-Mar-1995 |
jtc | KERNEL -> _KERNEL
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.10.2.1 | 05-Nov-1997 |
thorpej | Update from trunk: asm -> __asm__
|
| 1.12.14.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.15.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.15.8.1 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.15.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.15.4.1 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.17.14.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.17.14.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.17.14.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.18.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.20.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.20.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.20.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.20.96.1 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.22.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.19 | 30-Jul-2016 |
matt | KX needs to set on !O32 kernels
|
| 1.18 | 14-Dec-2009 |
matt | branches: 1.18.22; 1.18.40; 1.18.44;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.17 | 11-Dec-2005 |
christos | branches: 1.17.78; 1.17.96;
merge ktrace-lwp.
|
| 1.16 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.15 | 05-Mar-2002 |
simonb | branches: 1.15.14;
Add support for MIPS32 and MIPS64 architectures:
Remove the unused PSL_USERCLR and BASEPRI macros.
|
| 1.14 | 11-Jul-2000 |
jeffs | branches: 1.14.4; 1.14.8;
For 64b clean 32b compilation, do not bother setting SX And KX.
The current code does not maintain these in SR, and they are not
needed by 32b kernel code for mips3/4 instructions.
|
| 1.13 | 15-May-2000 |
nisimura | branches: 1.13.4;
Remove unused PSL_USERCLR defines for processor status register.
|
| 1.12 | 31-Jan-1999 |
castor | branches: 1.12.8;
Remove genpubassym.cf stuff. The macro _MIPS_BSD_API allows selection of a
64-bit clean compilation model.
|
| 1.11 | 18-Jan-1999 |
castor | Remove vestiges of cpuarch.h. Revert to using cpuregs.h instead.
|
| 1.10 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.9 | 11-Sep-1998 |
jonathan | branches: 1.9.2;
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.8 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.7 | 21-Jun-1997 |
jonathan | More mips1/mips3 changes to cpuregs.h and psl.h:
* cpuregs.h:
Delete unused VMMACH_ names (e.g., duplicates of PTE bits in pte.h).
Change remaining VMMACH_xxx names to MIPS1_xxx or MIPS3_xx.
Fold remaining compile-time definitions into a single #ifdef MIPS3.
* Use MIPS1_ names in locore_r2000.S, mips3_ names in locore_r4000.S
* Garbage-collect MachHitFlushDCache()
* psl.h:
use MIPS1_, MIPS3_ symbolic names for Cause register bits.
change _R3K to MIPS1_, _R4K to MIPS3. Conditionalize for mips1 only,
mips3 only, or when both are defined, use runtime CPUISMIPS3 test.
|
| 1.6 | 16-Jun-1997 |
jonathan | Move merged pmax psl.h with mips1/mips3 support to mips/include/psl.h.
Change pmax/include/psl.h to just do #include <mips/psl.h>.
pmax/include/psl.h would go away completely if it wasn't stil required
by compat/common/kern_exit_43.c.
|
| 1.5 | 15-Jun-1997 |
mhitch | More merged MIPS1/MIPS3 support for DECstations.
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.9.2.2 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.9.2.1 | 15-Oct-1998 |
nisimura | - cpuregs.h was modifed a bit, then renamed with cpuarch.h.
- mips_cpu.h has gone.
- CPU's register mnemonics in regdef.h is now a part of asm.h.
|
| 1.12.8.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.13.4.1 | 18-Jul-2000 |
jeffs | Pull up revision 1.14 (approved by cgd).
Remove extraneous bits from MIPS3_PSL_XFLAGS.
|
| 1.14.8.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.14.4.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.15.14.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.15.14.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.15.14.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.17.96.3 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.17.96.2 | 07-Sep-2009 |
matt | Add MIPS_SR_KX to PSL_USERSET if _LP64
|
| 1.17.96.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.17.78.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.18.44.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.18.40.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.18.22.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.27 | 22-Aug-2020 |
skrll | Remove pte_zero_p and simply check against 0.
|
| 1.26 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.25 | 24-Jun-2017 |
skrll | Provide pte_set
|
| 1.24 | 04-Sep-2016 |
skrll | Fix pte_cached_p for MIPS_HAS_R4K_MMU
|
| 1.23 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.22 | 27-Jun-2015 |
matt | Remove unused struct pt_entry_t union.
|
| 1.21 | 11-Jun-2015 |
matt | Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_start to get the
VA space it needs.
pmap_segtab.c is almost identical to uvm/pmap/pmap_segtab.c now. It won't
be long until we switch to the uvm/pmap one.
|
| 1.20 | 20-Feb-2011 |
matt | branches: 1.20.14; 1.20.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.19 | 28-Apr-2008 |
martin | branches: 1.19.18; 1.19.22; 1.19.28; 1.19.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.18 | 17-Oct-2007 |
garbled | branches: 1.18.16; 1.18.18; 1.18.20;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.17 | 17-Jul-2007 |
macallan | branches: 1.17.10;
add definitions for non-cached pages
|
| 1.16 | 16-Feb-2006 |
perry | branches: 1.16.24; 1.16.32;
Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.
As per core@.
|
| 1.15 | 24-Dec-2005 |
perry | branches: 1.15.2; 1.15.4; 1.15.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.14 | 25-Nov-2005 |
simonb | More KNF.
|
| 1.13 | 14-Oct-2002 |
chs | branches: 1.13.6; 1.13.22; 1.13.30;
eliminate PT_ENTRY_NULL in favor of plain old NULL.
|
| 1.12 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
|
| 1.11 | 23-Mar-2001 |
simonb | branches: 1.11.2; 1.11.8;
Delete unused uvtopte() macro.
|
| 1.10 | 09-Jun-2000 |
soda | branches: 1.10.4;
rename
vad_to_pfn() -> mips_paddr_to_tlbpfn()
pfn_to_vad() -> mips_tlbpfn_to_paddr()
as suggested by thorpej on port-mips Mar 27.
|
| 1.9 | 09-Jun-2000 |
soda | make paddr_t 64bit on arc port by introducing _MIPS_PADDR_T_64BIT.
|
| 1.8 | 28-May-1999 |
nisimura | branches: 1.8.2; 1.8.10;
- Make this compilable with MIPS1 or MIPS3 only configuration.
|
| 1.7 | 27-May-1999 |
nisimura | - Change a symbolic name of TLB entrylo from 'PG_M' to 'PG_D' to reflect
processor design. MIPS 'dirty bit' is not the same as i386 'dirty bit'.
There is a growing concern of misuse in NetBSD/mips.
|
| 1.6 | 06-Jan-1999 |
nisimura | branches: 1.6.4;
- Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.5 | 21-Jun-1997 |
mhitch | branches: 1.5.12;
Cast mips1-only and mips3-only pfn_to_vad() macros to match the mips1/mips3
merged inline function. Fixes inconsist printf format usage in trap.c.
|
| 1.4 | 17-Jun-1997 |
mhitch | Remove stray macro definition; didn't hurt for MIPS1 only, but wrong for
MIPS3.
|
| 1.3 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.2 | 15-Jun-1997 |
mhitch | More merged MIPS1/MIPS3 support. The pte definitions still need work before
they can be support both MIPS1 and MIPS3.
|
| 1.1 | 13-Oct-1996 |
jonathan | Merge mips1 and mips3 pte/pmap code, pass 0;
* Move mips-I pte (TLBlo) definitions from pmax/include/pte.h
to mips/include/mips1_pte.h
* Move mips-III pte (TLBlo) definitions from pica/include/pte.h
to mips/include/mips3_pte.h
* Add new mips/include/pte.h, which includes exactly one of
mips1_pte.h or mips3_pte.h (which still have namespace collisions),
depending on "options MIPS1" or "options MIPS3". (hack).
Move soft kvtopte(), ptetovk() definitions to mips/include/pte.h
* Add macro PTE_TO_PADDR() to hide the different hardware TLB formats
when mapping from pte to physical address.
* Add macro PTE_READONLY() to hide lack of SW read-only bit in mips-III
tlb. (mips1 pmap uses a sw bit in the PTE, mips3 looks up RO bit in
the kernel pmap.)
* Use macros (not direct TLB frobbing) in mips/trap.c, to make it
mips-1/mips-III indepenndet.
* Change {pmax,pica}/include/pte.h to just do #include <mips/pte.h>.
|
| 1.5.12.2 | 19-Nov-1998 |
nisimura | - And one more line escaped.
|
| 1.5.12.1 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.6.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.8.10.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.8.2.2 | 27-Mar-2001 |
bouyer | Sync with HEAD.
|
| 1.8.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.10.4.1 | 09-Apr-2001 |
nathanw | Catch up with -current.
|
| 1.11.8.3 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.11.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.11.8.1 | 23-Mar-2001 |
nathanw | file pte.h was added on branch nathanw_sa on 2002-04-01 07:40:59 +0000
|
| 1.11.2.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.13.30.1 | 29-Nov-2005 |
yamt | sync with head.
|
| 1.13.22.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.13.22.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.13.6.1 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.15.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.15.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.15.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.16.32.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.16.24.1 | 20-Aug-2007 |
ad | Sync with HEAD.
|
| 1.17.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.18.20.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.18.18.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.18.16.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.19.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.19.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.19.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.19.18.5 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.19.18.4 | 11-Mar-2010 |
matt | Mark some inlines as __pure.
|
| 1.19.18.3 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.19.18.2 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.19.18.1 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.20.32.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.20.32.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.20.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.20.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.19 | 18-Mar-2021 |
simonb | Add PTRACE_ILLEGAL_ASM using the MIPS32r6/MIPS64r6 backwards and
forwards compatible "sigrie" instruction to generate a Reserved
Instruction trap.
|
| 1.18 | 26-Jul-2020 |
simonb | branches: 1.18.2;
#define<tab>
Nuke trailing whitespace.
|
| 1.17 | 18-Jun-2019 |
kamil | Introduce PTRACE_REG_FP() a helper macro to retrieve the frame pointer
The macro is dummy for ia64 (the FP register is unknown and can change
freely) and sparc/sparc64 (not stored in struct reg).
|
| 1.16 | 12-Apr-2017 |
kamil | branches: 1.16.12;
Add new macro PTRACE_BREAKPOINT_ASM in <sys/ptrace.h> MD part
This macro ships with a MD-specific assembly instruction triggering
a software breakpoint.
Missing instruction for powerpc targets.
This code is used in ATF tests (lib/libc/sys/t_ptrace_wait).
Original patch by Nick Hudson, thanks!
|
| 1.15 | 08-Apr-2017 |
kamil | Add new ptrace(2) API: PT_SETSTEP & PT_CLEARSTEP
These operations allow to mark thread as a single-stepping one.
This allows to i.a.:
- single step and emit a signal (PT_SETSTEP & PT_CONTINUE)
- single step and trace syscall entry and exit (PT_SETSTEP & PT_SYSCALL)
The former is useful for debuggers like GDB or LLDB. The latter can be used
to singlestep a usermode kernel. These examples don't limit use-cases of
this interface.
Define PT_*STEP only for platforms defining PT_STEP.
Add new ATF tests setstep[1234].
These ptrace(2) operations first appeared in FreeBSD.
Sponsored by <The NetBSD Foundation>
|
| 1.14 | 25-Sep-2015 |
christos | branches: 1.14.2; 1.14.4;
For processors that have memory breakpoints, add macros for them to help
libproc
|
| 1.13 | 15-Sep-2015 |
christos | Provide access to pc/sp/syscall-return registers like we have for mcontext
|
| 1.12 | 25-Jan-2008 |
skrll | branches: 1.12.54; 1.12.74;
Define PT_MACHDEP_STRINGS
|
| 1.11 | 11-Dec-2005 |
christos | branches: 1.11.50; 1.11.56;
merge ktrace-lwp.
|
| 1.10 | 07-Aug-2003 |
agc | branches: 1.10.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.9 | 20-Oct-1997 |
jonathan | branches: 1.9.52;
Comment out PT_STEP for 1.3. Defining it causes gdb 4.16 to break.
(inferior debugee children die immediately with SIGTRAP.)
|
| 1.8 | 19-Oct-1997 |
jonathan | Define PT_STEP.
|
| 1.7 | 19-Oct-1997 |
jonathan | Add PT_GETFPREGS, PT_SETFPREGS and process_{read,write}_fpregs.
|
| 1.6 | 21-Dec-1995 |
jonathan | Reserve a number in the machine-dependent range for PT_STEP, in
case the kernel-debugger implementation of single-stepping ever works
with user code.
|
| 1.5 | 20-Dec-1995 |
jonathan | Add support for ptrace PT_GETREGS and PT_SETREGS for NetBSD/pmax:
* define PT_GETREGS and PT_SETREGS in pmax/include/ptrace.h
* Flesh out the stubs in pmax/pmax/process_machdep.c to handle
those requests.
* Now that "struct reg" is actually used, remove the bogus
#ifdef LANGUAGE_C around its definition, and redo pmax/include/reg.h
so that the definitions needed by locore.S are in a separate file,
pmax/include/regnum.h.
* update locore.S to match.
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.9.52.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.9.52.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.9.52.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.10.16.1 | 04-Feb-2008 |
yamt | sync with head.
|
| 1.11.56.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.11.50.1 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.12.74.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.12.74.2 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.12.74.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.12.54.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.14.4.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.14.2.1 | 26-Apr-2017 |
pgoyette | Sync with HEAD
|
| 1.16.12.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.18.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.8 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.7 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.6 | 05-Mar-2002 |
simonb | branches: 1.6.116; 1.6.118; 1.6.120;
Remove the number of TLB entries for different rx39 CPUs - this info
is in the table in mips_machdep.c now.
|
| 1.5 | 02-Dec-2001 |
uch | TX39, R5900 cache configuration.
|
| 1.4 | 24-Aug-2000 |
uch | branches: 1.4.2; 1.4.6; 1.4.10;
Rewrote TX39 series cache routines.
|
| 1.3 | 10-Jul-2000 |
uch | use mips3 cache op.
invalidate -> write-back invalidate
(although NetBSD/hpcmips run on write-through mode.)
suggested by cgd.
|
| 1.2 | 23-May-2000 |
soren | MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,
so remove references them, and do a little other cleanup.
|
| 1.1 | 29-Nov-1999 |
uch | branches: 1.1.2;
TX3912/22 specific register defines.
|
| 1.1.2.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.4.10.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.4.10.1 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.4.6.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.4.6.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.4.2.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.4.2.1 | 24-Aug-2000 |
bouyer | file r3900regs.h was added on branch thorpej_scsipi on 2000-11-20 20:13:32 +0000
|
| 1.6.120.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.6.118.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.6.116.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.4 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.3 | 28-Apr-2008 |
martin | branches: 1.3.18; 1.3.22; 1.3.28; 1.3.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 15-Nov-2002 |
simonb | branches: 1.2.108; 1.2.110; 1.2.112;
White space nits.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.4; 1.1.8;
Rename <mips/r5900/cpuregs.h> to <mips/r5900regs.h> and remove some
content no longer needed.
|
| 1.1.8.3 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.1.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.8.1 | 05-Mar-2002 |
nathanw | file r5900regs.h was added on branch nathanw_sa on 2002-04-01 07:40:59 +0000
|
| 1.1.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.1 | 05-Mar-2002 |
jdolecek | file r5900regs.h was added on branch kqueue on 2002-03-16 15:58:36 +0000
|
| 1.2.112.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.2.110.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.108.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.3.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.18.1 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.19 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.18 | 29-Dec-2017 |
maya | Simplify, don't use ifdefs to optimize out DIAGNOSTIC assertions.
Make the test for the n32/n64 case meaningful.
tested on pmax (o32).
|
| 1.17 | 09-Dec-2017 |
christos | provide 32 and 64 bit register struct definitions.
|
| 1.16 | 24-Jan-2016 |
christos | use namespace protected types.
|
| 1.15 | 16-Aug-2011 |
matt | branches: 1.15.12; 1.15.30;
Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.14 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.13 | 14-Dec-2009 |
matt | branches: 1.13.4; 1.13.6; 1.13.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.12 | 11-Dec-2005 |
christos | branches: 1.12.78; 1.12.96;
merge ktrace-lwp.
|
| 1.11 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.10 | 30-Nov-2002 |
simonb | branches: 1.10.6;
Standardise on #ifdef _MIPS_<header>_H_ for multiple inclusion tests.
|
| 1.9 | 14-Jan-1999 |
castor | branches: 1.9.26;
* Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.8 | 19-Jul-1997 |
jonathan | branches: 1.8.10;
* Re-apply changes from rev 1.6 of sys/arch/mips/include/reg.h accidentally
undone by rev 1.7:
>redo pmax/include/reg.h
>so that the definitions needed by locore.S are in a separate file,
>pmax/include/regnum.h.
* Add explicit `#include <mips/regnum.h>' where symbolic offsets
into a mips trapframe or struct reg are used..
|
| 1.7 | 15-Jun-1997 |
mhitch | From Toru Nishimura: exception trapframe changes.
|
| 1.6 | 20-Dec-1995 |
jonathan | Add support for ptrace PT_GETREGS and PT_SETREGS for NetBSD/pmax:
* define PT_GETREGS and PT_SETREGS in pmax/include/ptrace.h
* Flesh out the stubs in pmax/pmax/process_machdep.c to handle
those requests.
* Now that "struct reg" is actually used, remove the bogus
#ifdef LANGUAGE_C around its definition, and redo pmax/include/reg.h
so that the definitions needed by locore.S are in a separate file,
pmax/include/regnum.h.
* update locore.S to match.
|
| 1.5 | 18-Jan-1995 |
mellon | Make register definitions compatible with Ultrix
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.8.10.1 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.9.26.1 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.10.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.10.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.10.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.12.96.1 | 23-Aug-2009 |
matt | Add a fpreg_oabi for the O32/O64 version of fpreg.
|
| 1.12.78.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.13.8.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.13.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.13.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.15.30.1 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.15.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.14 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.13 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.12 | 11-Dec-2005 |
christos | branches: 1.12.122; 1.12.142;
merge ktrace-lwp.
|
| 1.11 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.10 | 04-Nov-2002 |
thorpej | branches: 1.10.6;
Add SGI-compatible ta0-ta3 register names. These allow one to write
asm code which can be built easily in old-ABI and new-ABI environemnts.
In old-ABI, they map to t4-t7, and in new-ABI, they map to a4-a7. This
means that t0-t3,ta0-ta3,t8,t9 are available in both ABIs.
Because ta0-ta3 overlap with arg regs (albeit arg slots which are usually
unused), they should be used only if t0-t3,t8,t9 isn't enough.
|
| 1.9 | 02-Nov-2002 |
thorpej | Define N32/N64 register usage.
|
| 1.8 | 05-Mar-2002 |
simonb | Include <machine/cdefs.h> to select 32/64bit APIs.
|
| 1.7 | 30-Mar-1999 |
soda | branches: 1.7.22; 1.7.26;
- protect from multiple inclusion
- incorporate changes to comments from asm.h
|
| 1.6 | 24-Mar-1999 |
drochner | regdef.h is back
|
| 1.5 | 13-Mar-1999 |
drochner | g/c regdef.h (went into asm.h)
|
| 1.4 | 26-Oct-1994 |
cgd | branches: 1.4.20;
new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.4.20.1 | 15-Oct-1998 |
nisimura | - cpuregs.h was modifed a bit, then renamed with cpuarch.h.
- mips_cpu.h has gone.
- CPU's register mnemonics in regdef.h is now a part of asm.h.
|
| 1.7.26.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.7.26.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.7.22.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.10.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.10.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.10.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.12.142.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.12.122.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.12 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.11 | 16-Aug-2011 |
matt | Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.10 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.9 | 14-Dec-2009 |
matt | branches: 1.9.4; 1.9.6; 1.9.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.8 | 11-Dec-2005 |
christos | branches: 1.8.78; 1.8.96;
merge ktrace-lwp.
|
| 1.7 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.6 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.5 | 04-Nov-2002 |
thorpej | branches: 1.5.6;
Add TA0-TA3 register indices.
|
| 1.4 | 02-Nov-2002 |
thorpej | Define N32/N64 register usage.
|
| 1.3 | 05-Jul-1998 |
jonathan | branches: 1.3.34;
"PS" alias for "SR" clashes with netccitt/pk.h. ifdef out.
|
| 1.2 | 19-Mar-1996 |
jonathan | Remove #ifdef LANGUAGE_C - protected definition of "struct reg".
(It was a duplicate of the real definition reg.h and was never used.)
|
| 1.1 | 20-Dec-1995 |
jonathan | Add support for ptrace PT_GETREGS and PT_SETREGS for NetBSD/pmax:
* define PT_GETREGS and PT_SETREGS in pmax/include/ptrace.h
* Flesh out the stubs in pmax/pmax/process_machdep.c to handle
those requests.
* Now that "struct reg" is actually used, remove the bogus
#ifdef LANGUAGE_C around its definition, and redo pmax/include/reg.h
so that the definitions needed by locore.S are in a separate file,
pmax/include/regnum.h.
* update locore.S to match.
|
| 1.3.34.1 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.5.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.5.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.5.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.8.96.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.8.78.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.9.8.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.9.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.9.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.10 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.9 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.8 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.7 | 03-Apr-2000 |
simonb | branches: 1.7.28;
Removing trailing comma from enum declaration.
|
| 1.6 | 07-Oct-1996 |
jonathan | branches: 1.6.30;
Fix for elf{32,64} changes: make <mips/reloc.h> re-includable,
Use elf_xxx section names (not elf32_xxx)in mips/mips/elf.c
|
| 1.5 | 19-Mar-1996 |
jonathan | Change "XXX_pmax" to "XXX_mips" in preparation for merging with
Pica reloc.h.
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.6.30.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.7.28.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.7.28.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.7.28.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5 | 05-Feb-2003 |
nakayama | Replace machine/rnd.h with more appropriate name to share it
with cycle counter based microtime in kern/kern_microtime.c.
|
| 1.4 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- move away from using CPUISMIPS3; use MIPS_HAS_CLOCK instead.
|
| 1.3 | 05-Oct-2000 |
cgd | branches: 1.3.2; 1.3.6; 1.3.10;
clean up and consistency for CP0 Count, Compare, Wired, and Config
access function names and prototypes.
|
| 1.2 | 09-Jun-2000 |
soda | branches: 1.2.4;
this header don't have to include <machine/locore.h>,
include <mips/locore.h> instead.
|
| 1.1 | 06-Jun-2000 |
soren | Add rnd(4) glue for the MIPS3 cycle counter.
|
| 1.2.4.2 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.2.4.1 | 09-Jun-2000 |
minoura | file rnd.h was added on branch minoura-xpg4dl on 2000-06-22 17:01:31 +0000
|
| 1.3.10.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.3.6.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.3.2.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.3.2.1 | 05-Oct-2000 |
bouyer | file rnd.h was added on branch thorpej_scsipi on 2000-11-20 20:13:32 +0000
|
| 1.9 | 29-Nov-2019 |
riastradh | Largely eliminate the MD rwlock.h header file.
This was full of definitions that have been obsolete for over a
decade. The file still remains for __HAVE_RW_STUBS but that's all.
Used only internally in kern_rwlock.c now, not by <sys/rwlock.h>.
|
| 1.8 | 20-Feb-2011 |
matt | branches: 1.8.56;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.7 | 28-Apr-2008 |
martin | branches: 1.7.22; 1.7.28; 1.7.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.6 | 04-Jan-2008 |
ad | branches: 1.6.6; 1.6.8; 1.6.10;
Use new style memory barriers.
|
| 1.5 | 29-Nov-2007 |
ad | branches: 1.5.6;
RW_GIVE() needs to do a mb_memory() now.
|
| 1.4 | 29-Nov-2007 |
ad | - Change _lock_cas and friends to do "compare and swap" instead of "compare
and set".
- Rename them to _atomic_cas_uint, _atomic_cas_ulong etc and provide strong
aliases for the other names CAS goes by.
|
| 1.3 | 21-Nov-2007 |
yamt | make kmutex_t and krwlock_t smaller by killing lock id.
ok'ed by Andrew Doran.
|
| 1.2 | 09-Feb-2007 |
ad | branches: 1.2.4; 1.2.8; 1.2.24; 1.2.26; 1.2.30; 1.2.32;
Merge newlock2 to head.
|
| 1.1 | 29-Dec-2006 |
ad | branches: 1.1.2;
file rwlock.h was initially added on branch newlock2.
|
| 1.1.2.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.2.32.2 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.2.32.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.2.30.1 | 21-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.2.26.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.2.24.2 | 03-Dec-2007 |
joerg | Sync with HEAD.
|
| 1.2.24.1 | 21-Nov-2007 |
joerg | Sync with HEAD.
|
| 1.2.8.1 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.2.4.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.2.4.3 | 07-Dec-2007 |
yamt | sync with head
|
| 1.2.4.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.2.4.1 | 09-Feb-2007 |
yamt | file rwlock.h was added on branch yamt-lazymbuf on 2007-02-26 09:07:27 +0000
|
| 1.5.6.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.6.10.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.6.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.6.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.7.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.7.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.7.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.8.56.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.1 | 15-Nov-2002 |
simonb | branches: 1.1.2;
Declare some CP0 hazards for the SB1 core.
|
| 1.1.2.2 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.1.2.1 | 15-Nov-2002 |
thorpej | file sb1regs.h was added on branch nathanw_sa on 2002-12-11 06:11:05 +0000
|
| 1.10 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.9 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.8 | 12-Aug-2009 |
matt | If using the N32 ABI, define _BSD_JBSLOT_T as long long. Keep _JBLEN
constant since _BSD_JBSLOT_T will now change in size so _JBLEN doesn't
have to.
|
| 1.7 | 05-Mar-2002 |
simonb | branches: 1.7.120; 1.7.138;
Include <machine/cdefs.h> to select 32/64bit APIs.
|
| 1.6 | 24-Apr-1999 |
simonb | branches: 1.6.16; 1.6.20;
Nuke register and remove trailling white space.
|
| 1.5 | 31-Jan-1999 |
castor | branches: 1.5.4;
Remove genpubassym.cf stuff. The macro _MIPS_BSD_API allows selection of a
64-bit clean compilation model.
|
| 1.4 | 15-Jan-1999 |
castor | Avoid introducing new prefix '__JB' -- '_JB' is fine.
|
| 1.3 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.2 | 16-Sep-1998 |
thorpej | Need 87 longs for a jmp_buf now (we use sigcontext, which grew).
|
| 1.1 | 20-Dec-1994 |
cgd | make the definition of _JBLEN mach. dep. header-dependent.
|
| 1.5.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.6.20.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.6.16.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.7.138.2 | 21-Aug-2009 |
matt | Fix _JBLEN to be correct (why was i thinking mips64 has 64 fp regs?).
|
| 1.7.138.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.7.120.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.7.120.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.33 | 30-Oct-2021 |
thorpej | Adjust the rules for sigcontext visibility on MIPS:
- Define __HAVE_STRUCT_SIGCONTEXT if _KERNEL (because it's needed for
32-bit binary compatibility) or if the O32 ABI is active (because
that's the only ABI that ever used sigcontext for signal delivery).
- For _KERNEL, define a "struct sigcontext" suitable only for 32-bit
compatible signal delivery.
- For userspace, define a "struct sigcontext" appropriate for any ABI
if _LIBC is defined (it's used for setjmp / longjmp) or if O32 is
the active ABI (because it was part of the old BSD signal API).
|
| 1.32 | 27-Oct-2021 |
thorpej | Define __HAVE_STRUCT_SIGCONTEXT for _KERNEL in addition to _LIBC.
|
| 1.31 | 26-Oct-2021 |
christos | Merge all MD __sigaction14_sigtramp.c copies into one:
- sparc and sparc64 were not using version 0 sigcontext when there were
no arguments in the signal version. This was probably a bug.
- vax is using +1 the version numbers of the other archs.
- Only hppa was defining __LIBC12_SOURCE__ so it was getting a working
sigcontext before. all the other ports that supported sigcontext had
the compat code disabled.
[pointed out by thorpej, thanks!]
If we want to remove sigcontext support from userland at least now there
is less work to do so.
|
| 1.30 | 24-Jan-2016 |
christos | use namespace protected types.
|
| 1.29 | 14-Dec-2009 |
matt | branches: 1.29.22; 1.29.40;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.28 | 19-Nov-2008 |
ad | Make the emulations, exec formats, coredump, NFS, and the NFS server
into modules. By and large this commit:
- shuffles header files and ifdefs
- splits code out where necessary to be modular
- adds module glue for each of the components
- adds/replaces hooks for things that can be installed at runtime
|
| 1.27 | 11-Dec-2005 |
christos | branches: 1.27.74; 1.27.78; 1.27.84; 1.27.86; 1.27.92;
merge ktrace-lwp.
|
| 1.26 | 24-Jan-2005 |
drochner | -remove definition of "struct sigframe" -- haven't found a use of it
(should fix build problems w/o COMPAT_16 reported by Markus W Kilbinger
per PR port-mips/29041 and by Havard Eidnes)
-further shuffle COMPAT_* conditionals to allow COMPAT_ULTRIX
w/o COMPAT_16
|
| 1.25 | 20-Jan-2005 |
drochner | restrict visibility of sigcontext* as much as it appears
sensible for now
XXX there is more cleanup needed to make COMPAT_ULTRIX build
w/o COMPAT_16)
|
| 1.24 | 10-May-2004 |
drochner | branches: 1.24.4;
SIGTRAMP_VALID() should not pollute the user namespace
|
| 1.23 | 26-Mar-2004 |
drochner | nothing cares about __HAVE_SIGINFO anymore, so nuke it
|
| 1.22 | 25-Nov-2003 |
christos | bye, bye _MCONTEXT_TO_SIGCONTEXT and vice versa.
|
| 1.21 | 29-Oct-2003 |
christos | first pass siginfo for mips
|
| 1.20 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.19 | 28-Apr-2003 |
bjh21 | branches: 1.19.2;
Add a new feature-test macro, _NETBSD_SOURCE. If this is defined
by the application, all NetBSD interfaces are made visible, even
if some other feature-test macro (like _POSIX_C_SOURCE) is defined.
<sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE,
_POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve
existing behaviour.
This has two major advantages:
+ Programs that require non-POSIX facilities but define _POSIX_C_SOURCE
can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS.
+ It makes most of the #ifs simpler, in that they're all now ORs of the
various macros, rather than having checks for (!defined(_ANSI_SOURCE) ||
!defined(_POSIX_C_SOURCE) || !defined(_XOPEN_SOURCE)) all over the place.
I've tried not to change the semantics of the headers in any case where
_NETBSD_SOURCE wasn't defined, but there were some places where the
current semantics were clearly mad, and retaining them was harder than
correcting them. In particular, I've mostly normalised things so that
_ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE,
_XOPEN_SOURCE and _NETBSD_SOURCE in that order.
Tested by building for vax, encouraged by thorpej, and uncontested in
tech-userlevel for a week.
|
| 1.18 | 20-Jan-2003 |
thorpej | Fix typo in sigcontext conversion macros. From Christopher SEKIYA.
|
| 1.17 | 18-Jan-2003 |
tsutsui | Add '#define' for _MCONTEXT_TO_SIGCONTEXT().
|
| 1.16 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.15 | 05-Mar-2002 |
simonb | Include <machine/cdefs.h> to select 32/64bit APIs.
|
| 1.14 | 24-Apr-1999 |
simonb | branches: 1.14.16; 1.14.20;
Nuke register and remove trailling white space.
|
| 1.13 | 31-Jan-1999 |
castor | branches: 1.13.4;
Remove genpubassym.cf stuff. The macro _MIPS_BSD_API allows selection of a
64-bit clean compilation model.
|
| 1.12 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.11 | 14-Sep-1998 |
thorpej | branches: 1.11.2;
sigset13_t -> int.
|
| 1.10 | 13-Sep-1998 |
thorpej | Make signal delivery work again.
|
| 1.9 | 25-May-1998 |
kleink | Protect against multiple inclusions.
|
| 1.8 | 25-May-1998 |
kleink | If any of _ANSI_SOURCE, _POSIX_C_SOURCE or _XOPEN_SOURCE are defined, don't
provide any identifiers other than sig_atomic_t.
|
| 1.7 | 19-Mar-1996 |
jonathan | Add eight 32-bit (XXX) words of reserved space to struct sigcontext,
for binary compatibilty with the pica port.
|
| 1.6 | 18-Jan-1995 |
mellon | break mullo and mulhi out of gp regs in sigcontext
|
| 1.5 | 10-Jan-1995 |
jtc | Only define sig_atomic_t when _ANSI_SOURCE is defined.
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.11.2.1 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.13.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.14.20.2 | 16-Jan-2003 |
thorpej | * Include <sys/sigtypes.h> rather than <sys/signal.h> in <sys/ucontext.h>.
* Define _UCONTEXT_TO_SIGCONTEXT() and _SIGCONTEXT_TO_UCONTEXT()
macros for converting a ucontext -> sigcontext and back again.
These macros in turn use machine-dependent macros _MCONTEXT_TO_SIGCONTEXT()
and _SIGCONTEXT_TO_MCONTEXT() provided by <machine/signal.h>.
The conversion process is not 100% accurate, but should be close enough.
Also note that the mcontext conversion may not be enough for all platforms
(m68k is a good example of this). These macros should be used only if
you really know what you're doing.
|
| 1.14.20.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.14.16.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.19.2.5 | 04-Feb-2005 |
skrll | Sync with HEAD.
|
| 1.19.2.4 | 24-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.19.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.19.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.19.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.24.4.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.27.92.3 | 27-Aug-2009 |
matt | For the kernel (since we only use it in compability with O32) define
sigcontext with ints. For libc, define the way we want to use it for
jmpbuf since that will be the only consumer of it.
|
| 1.27.92.2 | 23-Aug-2009 |
matt | In non-O32 kernels, make these syscalls return ENOSYS or sigexit(l, SIGILL)
when called by non-O32 programs. Marshall the 64bits registers to and from
their 32bit equivs and deal with FP differences.
|
| 1.27.92.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.27.86.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.27.84.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.27.78.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.27.78.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.27.74.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.29.40.1 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.29.22.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.1 | 23-Jul-2014 |
alnsn | branches: 1.1.2; 1.1.6;
Rename sljitarch.h to sljit_machdep.h.
|
| 1.1.6.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.6.1 | 23-Jul-2014 |
tls | file sljit_machdep.h was added on branch tls-maxphys on 2014-08-20 00:03:12 +0000
|
| 1.1.2.2 | 10-Aug-2014 |
tls | Rebase.
|
| 1.1.2.1 | 23-Jul-2014 |
tls | file sljit_machdep.h was added on branch tls-earlyentropy on 2014-08-10 06:54:02 +0000
|
| 1.5 | 23-Jul-2014 |
alnsn | Rename sljitarch.h to sljit_machdep.h.
|
| 1.4 | 22-Jul-2014 |
alnsn | Define SLJIT_CACHE_FLUSH() for mips.
|
| 1.3 | 17-Nov-2013 |
alnsn | branches: 1.3.2;
Always define SLJIT_CACHE_FLUSH(), start include guards with '_' and use _LP64 guard.
|
| 1.2 | 25-Nov-2012 |
alnsn | branches: 1.2.2; 1.2.4; 1.2.6;
EVPMIPS -> MIPS in include guard.
|
| 1.1 | 25-Nov-2012 |
alnsn | Add sljitarch.h to all mips machines.
|
| 1.2.6.3 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.6.2 | 25-Feb-2013 |
tls | resync with head
|
| 1.2.6.1 | 25-Nov-2012 |
tls | file sljitarch.h was added on branch tls-maxphys on 2013-02-25 00:28:51 +0000
|
| 1.2.4.1 | 18-May-2014 |
rmind | sync with head
|
| 1.2.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.2 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.2.2.1 | 25-Nov-2012 |
yamt | file sljitarch.h was added on branch yamt-pagecache on 2013-01-16 05:33:01 +0000
|
| 1.3.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.5 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.4 | 28-Apr-2008 |
martin | branches: 1.4.18; 1.4.22; 1.4.28; 1.4.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.3 | 03-Dec-2007 |
ad | branches: 1.3.14; 1.3.16; 1.3.18;
Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
|
| 1.2 | 21-Dec-2006 |
yamt | branches: 1.2.6; 1.2.22; 1.2.24; 1.2.30;
merge yamt-splraiseipl branch.
- finish implementing splraiseipl (and makeiplcookie).
http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
- complete workqueue(9) and fix its ipl problem, which is reported
to cause audio skipping.
- fix netbt (at least compilation problems) for some ports.
- fix PR/33218.
|
| 1.1 | 25-May-2003 |
tsutsui | branches: 1.1.18; 1.1.48; 1.1.50;
Prepare common routines for MIPS generic software interrupt.
|
| 1.1.50.1 | 22-Sep-2006 |
yamt | fix softintr for following ports. (hopefully)
hpcmips
evbmips
algor
arc
ews4800mips
newsmips
|
| 1.1.48.1 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.1.18.2 | 07-Dec-2007 |
yamt | sync with head
|
| 1.1.18.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.2.30.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.2.24.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.2.22.1 | 09-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.2.6.2 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.2.6.1 | 15-Jul-2007 |
ad | Get pmax working.
|
| 1.3.18.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.3.16.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.3.14.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.4.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.4.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.4.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.4.18.1 | 06-Feb-2010 |
matt | <mips/softintr.h> is no longer needed.
|
| 1.2 | 11-Dec-2021 |
mrg | remove clause 3 from all my licenses that aren't conflicting with
another copyright claim line. again. (i did this in 2008 and then
did not update all of my personal templates.)
|
| 1.1 | 15-Aug-2020 |
mrg | move stacktrace_subr() from trap.c into new mips_stacktrace.c so
it can be shared between ddb, other mips kernel components (see
locore), and an upcoming crash(8) port.
remove second copy of kdbpeek() (hidden by old DDB_TRACE
option, but they're functionally equivalent.)
tested on octeon.
ok simonb@
|
| 1.31 | 17-Jul-2011 |
joerg | Retire varargs.h support. Move machine/stdarg.h logic into MI
sys/stdarg.h and expect compiler to provide proper builtins, defaulting
to the GCC interface. lint still has a special fallback.
Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and
derive va_list as required by standards.
|
| 1.30 | 03-Jul-2011 |
mrg | add GCC 4.5 support.
|
| 1.29 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.28 | 21-Jun-2008 |
gmcgarry | branches: 1.28.14;
Add stdargs support for pcc.
|
| 1.27 | 27-Aug-2006 |
matt | branches: 1.27.56; 1.27.60; 1.27.62; 1.27.64;
The prohibition about 64bit ABIs only applies to pre-gcc3 so move it there.
|
| 1.26 | 11-Dec-2005 |
christos | branches: 1.26.4; 1.26.8;
merge ktrace-lwp.
|
| 1.25 | 25-Oct-2003 |
mycroft | branches: 1.25.16;
Update for GCC3 (basically, use the __builtin_va_* implementation).
|
| 1.24 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.23 | 28-Apr-2003 |
bjh21 | branches: 1.23.2;
Add a new feature-test macro, _NETBSD_SOURCE. If this is defined
by the application, all NetBSD interfaces are made visible, even
if some other feature-test macro (like _POSIX_C_SOURCE) is defined.
<sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE,
_POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve
existing behaviour.
This has two major advantages:
+ Programs that require non-POSIX facilities but define _POSIX_C_SOURCE
can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS.
+ It makes most of the #ifs simpler, in that they're all now ORs of the
various macros, rather than having checks for (!defined(_ANSI_SOURCE) ||
!defined(_POSIX_C_SOURCE) || !defined(_XOPEN_SOURCE)) all over the place.
I've tried not to change the semantics of the headers in any case where
_NETBSD_SOURCE wasn't defined, but there were some places where the
current semantics were clearly mad, and retaining them was harder than
correcting them. In particular, I've mostly normalised things so that
_ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE,
_XOPEN_SOURCE and _NETBSD_SOURCE in that order.
Tested by building for vax, encouraged by thorpej, and uncontested in
tech-userlevel for a week.
|
| 1.22 | 05-Mar-2002 |
simonb | The 64-bit safe, ILP32 o32 model is safe with the current stdarg
implementation.
|
| 1.21 | 18-Aug-2001 |
simonb | branches: 1.21.6;
Fix lint problem introduced in last change - if `lint' is defined,
#define away __alignof__. Still produces some warnings, but at least
they're not fatal anymore.
Problem noted by Rafal Boni in private mail.
|
| 1.20 | 17-Aug-2001 |
simonb | Fix va_arg() problem when adjusting argument pointer when a structure is
passed which is larger than an int but has int alignment. As well as
fixing the described problem, this is the same way it is handled in the
Irix and Ultrix header files.
Problem and suggested solution by Uros Prestor in port-mips mailling
list.
|
| 1.19 | 19-Feb-2000 |
mycroft | branches: 1.19.8;
Add some CONSTCONDs to make lint happier.
|
| 1.18 | 03-Feb-2000 |
kleink | Add a C99-style va_copy macro.
|
| 1.17 | 08-Jun-1999 |
nisimura | branches: 1.17.2;
- Exterminate haunted evil soul of MIPS va_arg(). Verified OK with
either endian. Not a perfect solution which would be revealed on
a certain condition when va_arg() is applied to magical struct
arguments passed by value. format_bytes() is now saved. With the
help from Noriyuki Soda and Masanari Tsubai.
|
| 1.16 | 03-May-1999 |
christos | Define __builtin_*() for lint
|
| 1.15 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.14 | 22-Jan-1999 |
mycroft | branches: 1.14.4;
Use __builtin_next_arg(). Fixed PR 6862.
|
| 1.13 | 11-Sep-1998 |
jonathan | Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.12 | 27-Jul-1998 |
mycroft | Delint.
|
| 1.11 | 26-Feb-1996 |
jonathan | branches: 1.11.16;
Revert pmax stdarg.h and varargs.h to versions from 1995-11-13. Those
versions work correctly; at some point between then and the immediately
preceding revisions, the "stylistic" changes to one (or both) stdarg.h
and varargs.h broke passing doubles to printf().
|
| 1.10 | 25-Dec-1995 |
mycroft | Stylistic changes.
|
| 1.9 | 25-Dec-1995 |
mycroft | Stylistic changes.
|
| 1.8 | 25-Dec-1995 |
mycroft | Update for GCC 2.7, and fix bugs.
|
| 1.7 | 28-Mar-1995 |
jtc | KERNEL -> _KERNEL
|
| 1.6 | 28-Jan-1995 |
jtc | ANSI says that <stdarg.h>'s va_end macro must expand to a void expression.
For consistancy, I'm changing <varargs.h> too.
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 15-Oct-1994 |
cgd | make <stdarg.h> a symlink, and clean up ports' stdarg.h and varargs.h files.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.11.16.1 | 01-Feb-1999 |
cgd | pull up revs 1.12-1.14 from trunk (PR#6862). (mycroft)
|
| 1.14.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.17.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.19.8.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.19.8.1 | 25-Aug-2001 |
thorpej | Merge Aug 24 -current into the kqueue branch.
|
| 1.21.6.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.21.6.1 | 18-Aug-2001 |
nathanw | file stdarg.h was added on branch nathanw_sa on 2002-04-01 07:41:00 +0000
|
| 1.23.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.23.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.23.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.25.16.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.26.8.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.26.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.27.64.1 | 27-Jun-2008 |
simonb | Sync with head.
|
| 1.27.62.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.27.60.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.27.60.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.27.56.1 | 29-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.28.14.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.7 | 19-Dec-2018 |
maxv | Remove compat_svr4 and compat_svr4_32, as discussed on tech-kern@ recently,
but also as discussed several times in the past.
|
| 1.6 | 30-Jul-2017 |
maxv | branches: 1.6.2; 1.6.4;
Remove references to COMPAT_IRIX - does not exist anymore.
I believe svr4_machdep.h should be removed when the option is not
implemented on the target architecture; and we should also remove the
associated md.* entries.
|
| 1.5 | 28-Apr-2008 |
martin | branches: 1.5.44; 1.5.64;
Remove clause 3 and 4 from TNF licenses
|
| 1.4 | 17-Aug-2006 |
christos | branches: 1.4.56; 1.4.58; 1.4.60;
Fix all the -D*DEBUG* code that it was rotting away and did not even compile.
Mostly from Arnaud Lacombe, many thanks!
|
| 1.3 | 22-Jan-2003 |
rafal | branches: 1.3.18; 1.3.32; 1.3.36;
LWP'ify the svr4_mcontext stuff.
|
| 1.2 | 05-Mar-2002 |
simonb | ANSIfy.
|
| 1.1 | 28-Nov-2001 |
manu | branches: 1.1.2; 1.1.4;
Added support for COMPAT_IRIX
|
| 1.1.4.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.1.4.1 | 28-Nov-2001 |
thorpej | file svr4_machdep.h was added on branch kqueue on 2002-01-10 19:46:02 +0000
|
| 1.1.2.3 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.2.2 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 28-Nov-2001 |
nathanw | file svr4_machdep.h was added on branch nathanw_sa on 2002-01-08 00:26:17 +0000
|
| 1.3.36.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.3.32.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.3.18.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.60.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.4.58.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.4.56.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.5.64.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.5.44.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.6.2.1 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.11 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.10 | 23-May-2013 |
christos | add generic copyrights so FreeBSD can use them.
|
| 1.9 | 20-Feb-2011 |
matt | branches: 1.9.4; 1.9.14;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.8 | 11-Dec-2005 |
christos | branches: 1.8.96; 1.8.106;
merge ktrace-lwp.
|
| 1.7 | 06-Nov-2004 |
christos | Don't use "int" to represent lengths; this is what size_t is for. This
does not change the ABI since we don't have 64 bit mips yet.
|
| 1.6 | 11-Sep-2003 |
kleink | __{BEGIN,END}_DECLS-wrap prototypes.
|
| 1.5 | 19-Jul-2002 |
simonb | branches: 1.5.6;
White space nits, add a #endif comment.
|
| 1.4 | 05-Mar-2002 |
simonb | branches: 1.4.6;
ANSIfy.
|
| 1.3 | 06-Jan-1999 |
nisimura | branches: 1.3.22; 1.3.26;
- Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.2 | 25-Feb-1998 |
perry | branches: 1.2.4;
change second parm of sysarch() from char * to void *
|
| 1.1 | 09-Jun-1997 |
jonathan | Add sys_sysarch() calls for the standard mips userspace cache-control calls.
|
| 1.2.4.1 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.3.26.2 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.3.26.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.3.22.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.3.22.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.4.6.1 | 21-Jul-2002 |
gehenna | catch up with -current.
|
| 1.5.6.4 | 14-Nov-2004 |
skrll | Sync with HEAD.
|
| 1.5.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.5.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.5.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.8.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.8.96.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.8.96.1 | 15-May-2010 |
matt | Add kernel support for MIPS TLS. Use rdhwr rt, $29 as defined by the MIPS
TLS spec so that Linux MIPS binaries will work. Use sysarch(MIPS_TINFOSET, v)
to set the pointer.
|
| 1.9.14.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.9.4.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.19 | 06-Jun-2015 |
matt | Add missing but now defined trap types. (use define<tab> consistently)
|
| 1.18 | 16-Aug-2011 |
matt | branches: 1.18.12; 1.18.30;
Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.17 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.16 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.15 | 11-Dec-2005 |
christos | branches: 1.15.96; 1.15.100; 1.15.106; 1.15.108;
merge ktrace-lwp.
|
| 1.14 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.13 | 15-Sep-2000 |
jeffs | branches: 1.13.24;
Handle R4K trap faults in user mode like overflows (deliver SIGFPE). This
prevents a panic running crashme. Better comment for VCE define.
|
| 1.12 | 14-Jan-1999 |
castor | branches: 1.12.8;
* Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.11 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.10 | 24-Oct-1998 |
jonathan | Cleanup kdbpeek() definition as noted in PR port-mips/5252.
|
| 1.9 | 01-Oct-1998 |
jonathan | branches: 1.9.2;
More patches for ARC from Noriyuki Soda:
* commit isapnpvar.h changes required for ARC to support plain isa.
* fixup mistake over mips/include/cpuregs.h.
* mips/mips_machdep.c:
set L2 cache-size for arc, cleanup use of L2cache present
vs L2 cache-size variables. check for no L2 cache on kernels
configured to require one. misc cleanups.
* mips/mpis/trap.c: more locore stack-traceback label cleanup.
XXX Locore callbacks for mips3, mips4, r4600 cacheflush need more work.
|
| 1.8 | 19-May-1998 |
simonb | Change external declaration of kdbpeek to match reality.
|
| 1.7 | 26-Mar-1998 |
jonathan | * Create /sys/arch/mips/include/intr.h, with extern declaration of
interrupt-callout vector from mips locore dispatch code to port code.
* Move branch-emulation declaration to mips/include/trap.h.
* Garbage-collect pmax/pmax/trap.h.
Not needed now pmax/pmax_trap.c is gone, and after above tidy-up.
|
| 1.6 | 24-Mar-1996 |
jonathan | Change pmax T_USER bit (software only) to be 0x20, the same as the
Pica port. (The r4000 CPU used in the pica has more hardware execption types.)
|
| 1.5 | 19-Mar-1996 |
jonathan | Add trap definitions added for the r4000 port.
Note: T_USER is different in the pmax and pica ports!
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.9.2.1 | 15-Oct-1998 |
nisimura | - cpuregs.h was modifed a bit, then renamed with cpuarch.h.
- mips_cpu.h has gone.
- CPU's register mnemonics in regdef.h is now a part of asm.h.
|
| 1.12.8.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.13.24.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.13.24.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.13.24.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.15.108.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.15.108.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.15.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.15.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.15.96.2 | 23-Dec-2011 |
matt | Add various new exceptions from MTE/32R2/64R2/DSP.
|
| 1.15.96.1 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.18.30.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.18.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.78 | 28-Mar-2023 |
nakayama | Add missing PRIuBUSSIZE to mips.
|
| 1.77 | 07-Jul-2022 |
martin | branches: 1.77.4;
Add PRIuVSIZE
|
| 1.76 | 15-May-2021 |
simonb | The MIPS O64 ABI uses full 64-bit FP regs.
|
| 1.75 | 29-Mar-2021 |
simonb | branches: 1.75.2; 1.75.4;
Provide vm_offset_t and vm_size_t typedefs - used by dtrace.
|
| 1.74 | 23-Jan-2021 |
christos | branches: 1.74.2;
Document via __HAVE_BUS_SPACE_8 platforms that implement bus_space_*_8
|
| 1.73 | 06-Dec-2020 |
christos | don't expose vaddr_t to userland.
|
| 1.72 | 17-Aug-2020 |
mrg | branches: 1.72.2;
port crash(8) to mips. (most of the kernel side.)
- expose parts of _KERNEL to _KMEMUSER as well
- hide more things for _KERNEL
- avoid DB_MACHINE_COMMANDS in crash(8)
- XXX add mips_label_t for !_KERNEL and use it in the pcb to
avoid conflicting with the ddb/crash one
- enable dumppcb
some changes to make stack trace fail instead of SEGV and
the userland changes to crash itself not part of this change.
|
| 1.71 | 30-Jul-2020 |
skrll | Sort the #define __HAVEs. NFCI.
|
| 1.70 | 30-Apr-2020 |
skrll | G/C __HAVE_AST_PERPROC
|
| 1.69 | 22-Mar-2020 |
ad | Temporarily mark hppa, mips, powerpc and riscv with __HAVE_UNLOCKED_PMAP,
for the benefit of UVM.
These need some pmap changes to support concurrent faults on the same
object. I have changes to do just that, but they're a work in progress.
|
| 1.68 | 06-Apr-2019 |
thorpej | Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.67 | 09-Dec-2017 |
christos | branches: 1.67.4;
provide 32 and 64 bit register struct definitions.
|
| 1.66 | 27-Jan-2017 |
christos | remove __HAVE_COMPAT_NETBSD32
|
| 1.65 | 26-Jan-2017 |
christos | provide __HAVE_COMPAT_NETBSD32 and fix multiple include protection consistently.
|
| 1.64 | 11-Jul-2016 |
matt | branches: 1.64.2; 1.64.4;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.63 | 24-Jan-2016 |
christos | expose label_t for _KMEMUSER
|
| 1.62 | 24-Jan-2016 |
christos | expose __fpregister_t too, merge definitions.
|
| 1.61 | 23-Jan-2016 |
christos | expose the kernel types for standalone code.
|
| 1.60 | 23-Jan-2016 |
christos | Hide {p,v}{addr,size}_t and register_t (and a couple more types that
are machine-specific) from userland unless _KERNEL/_KMEMUSER and a
new _KERNTYPES variables is defined. The _KERNTYPES should be fixed
for many subsystems that should not be using it (rump)...
|
| 1.59 | 27-Aug-2015 |
pooka | Fix PTHREAD_FOO_INITIALIZER for C++ by not using volatile in the relevant
pthread types in C++ builds, attempt 2.
The problem with attempt 1 was making assumptions of what the MD
__cpu_simple_lock_t (declared volatile) looks like. To get a same type
except non-volatile, we change the MD type to __cpu_simple_lock_nv_t
and typedef __cpu_simple_lock_t as a volatile __cpu_simple_lock_nv_t.
IMO, __cpu_simple_lock_t should not be volatile at all, but changing it
now is too risky.
Fixes at least Rumprun w/ gcc 5.1/5.2. Furthermore, the mpd application
(and possibly others) will no longer require NetBSD-specific patches.
Tested: build.sh for i386, Rumprun for x86_64 w/ gcc 5.2.
Based on the patch from Christos in lib/49989.
|
| 1.58 | 11-Jun-2015 |
matt | Add tlb_asid_t
|
| 1.57 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.56 | 06-Jun-2015 |
macallan | introduce PRIxCPUSET to deal with 32bit __cpuset_t on o32
|
| 1.55 | 29-Mar-2015 |
macallan | use 32bit __cpuset_t in o32 kernels
ok matt@
|
| 1.54 | 04-Jan-2014 |
dsl | branches: 1.54.6;
Remove __HAVE_PROCESS_XFPREGS and add the extra parameter for the size
of the fp save area to all the process_read_fpregs() and
process_write_fpregs() functions.
None of the functions have been modified to use the new parameters.
The size is set for all the writes, but some of the arch-specific reads
just pass NULL.
The amd64 (and i386) need variable sized fp register save areas in order
to support AVX and other enhanced register areas.
These functions are rarely called - so the extra argument won't matter.
|
| 1.53 | 16-Aug-2011 |
matt | branches: 1.53.2; 1.53.12; 1.53.16;
Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.52 | 12-Jun-2011 |
rmind | Welcome to 5.99.53! Merge rmind-uvmplock branch:
- Reorganize locking in UVM and provide extra serialisation for pmap(9).
New lock order: [vmpage-owner-lock] -> pmap-lock.
- Simplify locking in some pmap(9) modules by removing P->V locking.
- Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share
the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs).
- Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner.
Add TLBSTATS option for x86 to collect statistics about TLB shootdowns.
- Unify /dev/mem et al in MI code and provide required locking (removes
kernel-lock on some ports). Also, avoid cache-aliasing issues.
Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches
formed the core changes of this branch.
|
| 1.51 | 29-Apr-2011 |
matt | branches: 1.51.2;
define<space> -> define<tab>
|
| 1.50 | 15-Mar-2011 |
matt | Add MIPS TLS support.
|
| 1.49 | 24-Feb-2011 |
joerg | Allow storing and receiving the LWP private pointer via ucontext_t
on all platforms except VAX and IA64. Add fast access via register for
AMD64, i386 and SH3 ports. Use this fast access in libpthread to replace
the stack based pthread_self(). Implement skeleton support for Alpha,
HPPA, PowerPC, SPARC and SPARC64, but leave it disabled.
Ports that support this feature provide __HAVE____LWP_GETPRIVATE_FAST in
machine/types.h and a corresponding __lwp_getprivate_fast in
machine/mcontext.h.
This material is based upon work partially supported by
The NetBSD Foundation under a contract with Joerg Sonnenberger.
|
| 1.48 | 20-Feb-2011 |
rmind | Minor fix of previous: remove __SWAP_BROKEN (it is no more in -current).
|
| 1.47 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.46 | 22-Dec-2010 |
matt | branches: 1.46.2; 1.46.4;
Add a define __HAVE_CPU_DATA_FIRST which means that cpu_data is the first
member in struct cpu_info.
|
| 1.45 | 14-Dec-2009 |
matt | branches: 1.45.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.44 | 21-Oct-2009 |
rmind | Remove uarea swap-out functionality:
- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.
Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).
Discussed on <tech-kern>, reviewed by <ad>.
|
| 1.43 | 29-Nov-2007 |
ad | branches: 1.43.18; 1.43.36;
__HAVE_ATOMIC64_OPS if 64-bit
|
| 1.42 | 24-Dec-2005 |
perry | branches: 1.42.30; 1.42.42; 1.42.48; 1.42.50; 1.42.56;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.41 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.40 | 18-Jan-2004 |
martin | branches: 1.40.16;
Do not export __HAVE_RAS to userland. Applications are supposed to try
rasctl() and detect failure with EOPNOTSUPP.
|
| 1.39 | 26-Sep-2003 |
nathanw | Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
so that they can be used in a namespace-friendly way.
|
| 1.38 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.37 | 28-Apr-2003 |
bjh21 | branches: 1.37.2;
Add a new feature-test macro, _NETBSD_SOURCE. If this is defined
by the application, all NetBSD interfaces are made visible, even
if some other feature-test macro (like _POSIX_C_SOURCE) is defined.
<sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE,
_POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve
existing behaviour.
This has two major advantages:
+ Programs that require non-POSIX facilities but define _POSIX_C_SOURCE
can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS.
+ It makes most of the #ifs simpler, in that they're all now ORs of the
various macros, rather than having checks for (!defined(_ANSI_SOURCE) ||
!defined(_POSIX_C_SOURCE) || !defined(_XOPEN_SOURCE)) all over the place.
I've tried not to change the semantics of the headers in any case where
_NETBSD_SOURCE wasn't defined, but there were some places where the
current semantics were clearly mad, and retaining them was harder than
correcting them. In particular, I've mostly normalised things so that
_ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE,
_XOPEN_SOURCE and _NETBSD_SOURCE in that order.
Tested by building for vax, encouraged by thorpej, and uncontested in
tech-userlevel for a week.
|
| 1.36 | 03-Nov-2002 |
thorpej | In the _MIPS_PADDR_T_64BIT case, only use "unsigned long long" if _LP64
is not defined.
|
| 1.35 | 03-Nov-2002 |
nisimura | Retire __HAVE_MD_RUNQUEUE from MD types.h and remove
setrunqueue/remrunqueue from locore.S. C codes are
compiled a bit shorter and provide better DIAGNOSTICs.
|
| 1.34 | 02-Nov-2002 |
thorpej | Make register_t == long long for N32, and == long for everthing else.
Use register_t in label_t.
|
| 1.33 | 22-Sep-2002 |
simonb | Use "#define\t" instead of "#define ".
|
| 1.32 | 22-Sep-2002 |
gmcgarry | Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives.
|
| 1.31 | 28-Aug-2002 |
gmcgarry | RAS support for MIPS. Tested on R3000.
|
| 1.30 | 05-Mar-2002 |
simonb | branches: 1.30.6;
Change a MIPS3 check to a MIPS3_PLUS check (XXX - still bogus!).
|
| 1.29 | 28-Feb-2002 |
simonb | Use "#define<tab>".
|
| 1.28 | 28-Apr-2001 |
kleink | branches: 1.28.2; 1.28.8;
* Move definitions of exact-width integer types from <machine/types.h>
to <sys/types.h> and <sys/stdint.h>.
* Add a new C99 <stdint.h> header, which provides integer types of
explicit width, related limits and integer constant macros.
* Extend <inttypes.h> to provide <stdint.h> definitions and format
macros for printf() and scanf().
* Add C99 strtoimax() and strtoumax() functions.
* Use the latter within scanf().
* Add C99 %j, %t and %z printf()/scanf() conversions for
intmax_t, pointer-type and size_t arguments.
|
| 1.27 | 16-Jan-2001 |
thorpej | branches: 1.27.2;
New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
|
| 1.26 | 14-Jan-2001 |
thorpej | Define __HAVE_AST_PERPROC.
|
| 1.25 | 03-Jan-2001 |
takemura | replace 'long long' with int64_t to compile stand alone program with
compiler other than GCC.
|
| 1.24 | 09-Jun-2000 |
soda | make paddr_t 64bit on arc port by introducing _MIPS_PADDR_T_64BIT.
|
| 1.23 | 06-Jun-2000 |
soren | Add rnd(4) glue for the MIPS3 cycle counter.
|
| 1.22 | 22-Feb-2000 |
soda | branches: 1.22.2;
mips is now vm_offset_t/vm_size_t clean
|
| 1.21 | 09-Dec-1999 |
castor | Fix typo on _MIPS_BSD_API switch.
|
| 1.20 | 24-Apr-1999 |
simonb | branches: 1.20.2; 1.20.8;
Nuke register and remove trailling white space.
|
| 1.19 | 31-Jan-1999 |
castor | branches: 1.19.4;
Remove genpubassym.cf stuff. The macro _MIPS_BSD_API allows selection of a
64-bit clean compilation model.
|
| 1.18 | 14-Jan-1999 |
castor | * Create mips_reg_t data type to allow register size to be
decoupled from long or int or long long. Define macros in asm.h to facilitate
choosing these on a port by port basis.
* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
to be calculated at system build time.
* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
for the architecture. For 64-bit oriented systems set the Status Register
to allow 64-bit instructions.
* Remove UADDR related macros because kernel U structure is now mapped
normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors
|
| 1.17 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.16 | 13-Aug-1998 |
eeh | branches: 1.16.2;
Merge paddr_t changes into the main branch.
|
| 1.15 | 14-Jun-1998 |
kleink | branches: 1.15.2;
GC the unused `physadr' type, which was not able to hold a complete physical
address on 2 architectures anyhow. Also, move the definition of the `label_t'
type inside _KERNEL protection, since it is specific to the in-kernel
setjmp()/longjmp() implementations.
|
| 1.14 | 05-Nov-1997 |
thorpej | Mark uses of long long with /* LONGLONG */ for lint. From
Chris Demetriou <cgd@pa.dec.com>.
|
| 1.13 | 15-Jun-1997 |
mhitch | branches: 1.13.8;
From Toru Nishimura: _FORKBRAINDAMAGE is gone, user process entered through
proc_trampoline().
|
| 1.12 | 09-Apr-1996 |
jonathan | Fixes for -Wall -Wmissing-prototypes:
Do not define __BDEVSW_DUMP_OLD_TYPE, as it breaks prototyping
of device dump functions, and should be port-dependent in any case.
The pmax 4.4bsd/pmax-derived drivers are being fixed, and the pica port
uses the MI scsi drivers already.
|
| 1.11 | 09-Dec-1995 |
mycroft | Define __FORK_BRAINDAMAGE.
|
| 1.10 | 06-Jul-1995 |
cgd | add <sys/cdefs.h> inclusions. namsspace-protect physadr, label_t
def'ns against _POSIX_SOURCE and _ANSI_SOURCE.
|
| 1.9 | 28-Jun-1995 |
cgd | remove unused cpu_exec() definitions. moved "broken swap" markers, for
ports that still need it, to types.h.
|
| 1.8 | 26-Jun-1995 |
cgd | define __BDEVSW_DUMP_OLD_TYPE for ports where it's true. clean up
some m68k ports inclusion of common header.
|
| 1.7 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.6 | 20-Oct-1994 |
cgd | update for new syscall args description mechanism
|
| 1.5 | 20-Jul-1994 |
cgd | define __BIT_TYPES_DEFINED__ for compatibility with things like BIND and nvi
|
| 1.4 | 27-May-1994 |
glass | branches: 1.4.2;
bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 14-Mar-1994 |
cgd | add basic integral types (a la sparc port) that new nvi wants.
mark old 'basic integral types' as XXX -- they should be squished
when whoever gets this port working.
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.4.2.1 | 20-Jul-1994 |
cgd | update from trunk.
|
| 1.13.8.1 | 05-Nov-1997 |
thorpej | Update from trunk: Mark usese of long long with /* LONGLONG */ for lint.
|
| 1.15.2.2 | 12-Aug-1998 |
eeh | Protect XOPEN and POSIX code from vm_offset_t, paddr_t, vaddr_t, vm_size_t, psize_t, and vsize_t.
|
| 1.15.2.1 | 30-Jul-1998 |
eeh | Split vm_offset_t and vm_size_t into paddr_t, psize_t, vaddr_t, and vsize_t.
|
| 1.16.2.1 | 19-Nov-1998 |
nisimura | - Forgot to commit most important changes.
|
| 1.19.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.20.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.20.2.3 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.20.2.2 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.20.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.22.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.27.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.28.8.5 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.28.8.4 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.28.8.3 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.28.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.28.8.1 | 28-Apr-2001 |
nathanw | file types.h was added on branch nathanw_sa on 2002-04-01 07:41:00 +0000
|
| 1.28.2.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.28.2.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.28.2.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.30.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.37.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.37.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.37.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.40.16.2 | 07-Dec-2007 |
yamt | sync with head
|
| 1.40.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.42.56.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.42.50.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.42.48.1 | 03-Dec-2007 |
joerg | Sync with HEAD.
|
| 1.42.42.1 | 18-Jul-2007 |
matt | Deal with n32/n64 ABIs too.
|
| 1.42.30.2 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.42.30.1 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.43.36.17 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.43.36.16 | 19-Aug-2010 |
matt | Use __HAVE_CPU_VMSPACE_EXEC instead of a mips-specific #ifdef.
|
| 1.43.36.15 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.43.36.14 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.43.36.13 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.43.36.12 | 30-Jan-2010 |
matt | Change MIPS_CURLWP from s7 to t8. In a MALTA64 kernel, s6 is used 9155 times
which means the compiler could really use s7 is was free to do so. The least
used temporary was t8 (288 times). Once the kernel was switched to use t8 for
MIPS_CURLWP, s7 was used 7524 times.
Additionally a MALTA32 kernel shrunk by 6205 instructions (24820 bytes) or
about 1% of its text size.
[For some reason, pre-change t1 was never used and post change t2 was never
used. Not sure why.]
|
| 1.43.36.11 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.43.36.10 | 12-Sep-2009 |
matt | Because of the N32 support, register32_t on mips is really 64-bits wide.
|
| 1.43.36.9 | 09-Sep-2009 |
matt | Expose label_t if NETBSD_SOURCE to make libkvm happy when including <mips/pcb.h>
|
| 1.43.36.8 | 07-Sep-2009 |
matt | Add symbolic constants for what's stored in label_t.
|
| 1.43.36.7 | 06-Sep-2009 |
matt | make label_t 2 registers larger.
|
| 1.43.36.6 | 05-Sep-2009 |
matt | ATOMIC64_OPS are available for all kernels except O32 ones.
|
| 1.43.36.5 | 23-Aug-2009 |
matt | Fix LP64 botch with vaddr_t/vsize_t
|
| 1.43.36.4 | 23-Aug-2009 |
matt | PRIxVADDR, PRIdVSIZE, PRIxVSIZE, or PRIxPADDR as appropriate.
Use __intXX_t or __uintXX_t as appropriate in <mips/types.h>
|
| 1.43.36.3 | 23-Aug-2009 |
matt | Change lazy fp load/save is done. fpcurlwp is never NULL.
If no current lwp has the FP, then fpcurlwp is set to lwp0.
this allows many check for NULL and avoids a few null-derefs.
Since savefpregs clear COP1, loadfpregs can be called to reload
fpregs. If it notices that situation, it just sets COP1 and returns
Save does not reset fpcurlwp, just clears COP1. load does set fpcurlwp.
If MIPS3_SR_FR is set, all 32 64-bit FP registers are saved/restored via Xdc1.
If MIPS3_SR_FR is clear, only 32 32-bit FP register are saved/restore via Xwc1.
This preserves the existing ABI.
|
| 1.43.36.2 | 21-Aug-2009 |
matt | Adapt to ABI variations. Make sure mips_reg_t == register_t.
Add PRIx{{P,V}{ADDR,SIZE}} and PRIxREGISTER{,32} macros to assist
printing out above types.
|
| 1.43.36.1 | 16-Aug-2009 |
matt | Kill use of _MIPS_BSD_ABI - switch to __mips_<abi>
Use device_t where appropriate.
Remove magic numbers.
|
| 1.43.18.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.45.4.5 | 31-May-2011 |
rmind | sync with head
|
| 1.45.4.4 | 21-Apr-2011 |
rmind | sync with head
|
| 1.45.4.3 | 05-Mar-2011 |
rmind | sync with head
|
| 1.45.4.2 | 02-Jun-2010 |
rmind | Add code, dev_mem_getva() and dev_mem_relva(), to deal with cache-aliasing
issues by allocating an appropriate KVA from physical address, according to
the colour. Used by architectures, which have such requirement. For now,
enable only for MIPS, others will follow. This renames previously invented
mm_md_getva() and mm_md_relva(), since we do this in MI way, instead of MD.
Architectures just need to define __HAVE_MM_MD_CACHE_ALIASING as indicator.
Reviewed by Matt Thomas.
|
| 1.45.4.1 | 18-Mar-2010 |
rmind | Unify /dev/{mem,kmem,zero,null} implementations in MI code. Based on patch
from Joerg Sonnenberger, proposed on tech-kern@, in February 2008.
Work and depression still in progress.
|
| 1.46.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.46.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.51.2.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.53.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.53.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.53.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.53.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.54.6.5 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.54.6.4 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.54.6.3 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.54.6.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.54.6.1 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.64.4.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.64.2.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.67.4.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.67.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.72.2.2 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.72.2.1 | 14-Dec-2020 |
thorpej | Sync w/ HEAD.
|
| 1.74.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.75.4.1 | 31-May-2021 |
cjep | sync with head
|
| 1.75.2.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.77.4.1 | 03-Apr-2023 |
martin | Additionally pull up following revision(s) for ticket #128
to unbreak the build:
sys/arch/mips/include/types.h: revision 1.78
sys/arch/mips/include/bus_space_defs.h: revision 1.5
Add missing PRIuBUSSIZE to mips.
|
| 1.13 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.12 | 05-Nov-2007 |
ad | branches: 1.12.42; 1.12.48; 1.12.50;
Don't set l_usrpri / spc_curpriority here. mi_userret() does it.
|
| 1.11 | 16-Feb-2006 |
perry | branches: 1.11.24; 1.11.42; 1.11.44; 1.11.48;
Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.
As per core@.
|
| 1.10 | 24-Dec-2005 |
perry | branches: 1.10.2; 1.10.4; 1.10.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.9 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.8 | 31-Oct-2003 |
cl | branches: 1.8.16;
Reduce code duplication by adding mi_userret() in sys/userret.h
containing signal posting, kernel-exit handling and sa_upcall processing.
XXX the pc532, sparc, sparc64 and vax ports should have their
XXX userret() code rearranged to use this.
|
| 1.7 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.6 | 17-Jan-2003 |
thorpej | branches: 1.6.2;
Merge the nathanw_sa branch.
|
| 1.5 | 18-Jan-2001 |
tv | branches: 1.5.8;
No-op commit to force update to a non-"-kk" revision.
|
| 1.4 | 14-Jan-2001 |
thorpej | branches: 1.4.2;
Now that we won't lose signotify()'s while we're asleep, go ahead
and to signal processing in ast() again.
|
| 1.3 | 14-Jan-2001 |
thorpej | Put signal posting back in userret() for now; for it to work
properly, we need to make astpending a per-process variable.
Pointed out by mycroft.
|
| 1.2 | 14-Jan-2001 |
thorpej | - Make ast() loop around astpending; it's possible for a new
AST to be posted when delivering signals, or after a process
is preempted.
- Move all signal posting to ast(). userret() is now a one-liner.
|
| 1.1 | 11-Jan-2001 |
thorpej | Move userret() into a header file, in preparation for splitting
syscall() into plain and fancy.
|
| 1.4.2.2 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.4.2.1 | 14-Jan-2001 |
bouyer | file userret.h was added on branch thorpej_scsipi on 2001-01-18 09:22:43 +0000
|
| 1.5.8.3 | 26-Sep-2002 |
nathanw | Change "if (l->l_flag & L_SA_UPCALL)" to "while (l->l_flag & L_SA_UPCALL)"
in userret() functions or equivalent, to permit delivery of multiple upcalls
in a single kernel entry.
XXX It's getting crowded in here. Collapsing posting signals, upcalls, and
XXX kernel-exit handling into one mechanism would be nice.
|
| 1.5.8.2 | 17-Dec-2001 |
nathanw | cpu_upcall() -> sa_upcall_userret().
|
| 1.5.8.1 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.6.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.6.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.6.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.8.16.1 | 15-Nov-2007 |
yamt | sync with head.
|
| 1.10.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.10.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.10.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.11.48.1 | 13-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.11.44.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.11.42.1 | 06-Nov-2007 |
joerg | Sync with HEAD.
|
| 1.11.24.1 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.12.50.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.12.48.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.12.42.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.19 | 17-Jul-2011 |
joerg | Retire varargs.h support. Move machine/stdarg.h logic into MI
sys/stdarg.h and expect compiler to provide proper builtins, defaulting
to the GCC interface. lint still has a special fallback.
Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and
derive va_list as required by standards.
|
| 1.18 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.17 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.16 | 22-Jan-1999 |
mycroft | branches: 1.16.42;
Clean up.
|
| 1.15 | 11-Sep-1998 |
jonathan | Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.14 | 27-Jul-1998 |
mycroft | Delint.
|
| 1.13 | 26-Feb-1996 |
jonathan | branches: 1.13.16;
Revert pmax stdarg.h and varargs.h to versions from 1995-11-13. Those
versions work correctly; at some point between then and the immediately
preceding revisions, the "stylistic" changes to one (or both) stdarg.h
and varargs.h broke passing doubles to printf().
|
| 1.12 | 26-Dec-1995 |
mycroft | Make the type of __builtin_va_list a long.
|
| 1.11 | 26-Dec-1995 |
mycroft | Use __builtin_va_alist.
|
| 1.10 | 25-Dec-1995 |
mycroft | Stylistic changes.
|
| 1.9 | 25-Dec-1995 |
mycroft | Update for GCC 2.7, and fix bugs.
|
| 1.8 | 28-Mar-1995 |
jtc | KERNEL -> _KERNEL
|
| 1.7 | 28-Jan-1995 |
jtc | ANSI says that <stdarg.h>'s va_end macro must expand to a void expression.
For consistancy, I'm changing <varargs.h> too.
|
| 1.6 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.5 | 15-Oct-1994 |
cgd | make <stdarg.h> a symlink, and clean up ports' stdarg.h and varargs.h files.
|
| 1.4 | 29-Jun-1994 |
deraadt | _MACHINE_VARGS_H_
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.13.16.1 | 01-Feb-1999 |
cgd | pull up revs 1.14-1.16 from trunk (PR#6862). (mycroft)
|
| 1.16.42.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.16.42.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.16.42.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.67 | 14-May-2023 |
he | Bump MAXTSIZ from 64MB to 128MB also for o32.
This so that the rather large cc1 from gcc12 can be run.
OK'ed by simonb@
|
| 1.66 | 23-Jun-2021 |
simonb | branches: 1.66.10;
Remove an unused #define.
|
| 1.65 | 26-Feb-2021 |
simonb | branches: 1.65.4;
Drop 64-bit default stack sizes back to 4MB.
|
| 1.64 | 06-Oct-2020 |
christos | branches: 1.64.2;
GC unused MAXTSIZ32
|
| 1.63 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.62 | 05-May-2019 |
christos | PR/54133: Sevan Janiyan: Binaries fail to execute
Define M{IN,AX}_PAGE_SHIFT to cover all page possibilities
|
| 1.61 | 31-May-2018 |
mrg | branches: 1.61.2;
it's called VM_MAXUSER_ADDRESS32 not VM_MAXUSER32_ADDRESS.
fixes mips64 builds, and likely fixes riscv when it happens again.
|
| 1.60 | 07-Sep-2017 |
skrll | branches: 1.60.2;
Don't define UVM_KM_VMFREELIST on mips as it excludes some memory
ranges unnecessarily.
PR/52501 - erlite quickly fails to allocate memory and processes wedge
|
| 1.59 | 24-Jun-2017 |
joerg | Update VM_DEFAULT_ADDRESS32_TOPDOWN to include guard area.
|
| 1.58 | 23-Jun-2017 |
joerg | Recommit exec_subr.c revision 1.79:
Always include a 1MB guard area beyond the end of stack. While ASLR will
normally create a guard area as well, this provides a deterministic area
for all binaries.
Mitigates the rest of CVE-2017-1000374 and CVE-2017-1000375 from
Qualys.
Additionally, change VM_DEFAULT_ADDRESS_TOPDOWN to include
user_stack_guard_size in the size reservation.
|
| 1.57 | 22-Nov-2016 |
skrll | branches: 1.57.8;
1TB is enough UVA for anyone... plus not all cpus can support more.
|
| 1.56 | 04-Nov-2016 |
skrll | Cmoment formatting. No functional change.
|
| 1.55 | 11-Jul-2016 |
matt | branches: 1.55.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.54 | 30-Jun-2015 |
matt | Make vmparam.h change work with RUMP
|
| 1.53 | 30-Jun-2015 |
matt | We support multiple page sizes so let modules know it.
|
| 1.52 | 25-Jan-2014 |
christos | branches: 1.52.4; 1.52.6; 1.52.8; 1.52.10;
delete VM_DEFAULT_ADDRESS; some of those should be GC'ed because they match
the default definition.
|
| 1.51 | 22-Jan-2014 |
christos | remove dup define (already defined in mips_param.h)
|
| 1.50 | 24-Aug-2011 |
matt | branches: 1.50.2; 1.50.12; 1.50.16;
When using 16KB pages in a 64 bit kernel, the amount of address space our page
table can address can be larger than the amount of address space the CPU
implementation supports. This change limits the amount address space to what
the CPU implementation provides.
|
| 1.49 | 21-Jul-2011 |
macallan | #include "opt_cputype.h"
for ENABLE_MIPS_16KB_PAGE
|
| 1.48 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.47 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.46 | 14-Nov-2010 |
uebayasi | branches: 1.46.2; 1.46.4;
Move struct vm_page_md definition from vmparam.h to pmap.h, because
it's used only by pmap. vmparam.h has definitions for wider
audience.
All GENERIC kernels build tested, except ia64.
powerpc/include/booke/vmparam.h has one too, but it has no pmap.h,
so it's left as is.
|
| 1.45 | 06-Nov-2010 |
uebayasi | Remove incomplete, never worked dynamic run-time memory registration
(uvm_page_physload(9)). This functionality will be re-added later.
|
| 1.44 | 14-Dec-2009 |
matt | branches: 1.44.2; 1.44.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.43 | 09-Aug-2009 |
matt | Beginning of large-page support.
|
| 1.42 | 06-Mar-2009 |
joerg | Remove SHMMAXPGS from all kernel configs. Dynamically compute the
initial limit as 1/4 of the physical memory. Ensure the limit is at
least 1024 pages, the old default on most platforms.
|
| 1.41 | 26-Dec-2007 |
ad | branches: 1.41.10; 1.41.18; 1.41.24; 1.41.28;
Merge more changes from vmlocking2, mainly:
- Locking improvements.
- Use pool_cache for more items.
|
| 1.40 | 03-Dec-2007 |
ad | branches: 1.40.2; 1.40.6;
Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
|
| 1.39 | 13-Dec-2005 |
tsutsui | branches: 1.39.30; 1.39.48; 1.39.50; 1.39.56;
Move pv_entry stuff from MD pmap_physseg to MD vm_page.
Suggested and OK'ed by thorpej, and tested on R3000/R4400/R5000/Rm5200 CPUs.
|
| 1.38 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.37 | 17-Jan-2005 |
simonb | branches: 1.37.8;
Now that countless UVM bugs have been fixed and the MIPS pmap_prefer()
can deal with topdown for CPUs that need to deal with cache alias
conflicts (thanks Andrew Brown!), enable "topdown" memory allocation by
default.
|
| 1.36 | 14-Jan-2005 |
simonb | branches: 1.36.2;
Revert the previous change of making topdown VM the default. While
topdown VM works on a MIPS64 bcm1125, it doesn't work on a Cobalt
(rm5231?) and a DEC 5000/260 (r4400). On both of these init dies and
we panic.
|
| 1.35 | 11-Jan-2005 |
simonb | Now that countless UVM bugs have been fixed, enable "topdown" memory
allocation by default.
|
| 1.34 | 26-Apr-2004 |
simonb | Enable top-down VM if USE_TOPDOWN_VM is defined.
|
| 1.33 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.32 | 02-Apr-2003 |
thorpej | branches: 1.32.2;
Use PAGE_SIZE rather than NBPG.
|
| 1.31 | 10-Dec-2002 |
thorpej | Use __LDPGSZ (which must be == USRTEXT) as the text address for a.out
executables, and eliminate the USRTEXT constant, which was only used
by the a.out exec code.
|
| 1.30 | 15-Nov-2001 |
soren | MAXSLP is defined to be a machine-independent scheduling parameter,
so move it into sys/param.h.
|
| 1.29 | 18-Jul-2001 |
simonb | branches: 1.29.6;
Modernise data and stack size limits.
|
| 1.28 | 01-May-2001 |
thorpej | branches: 1.28.2;
Per discussion w/ chuck and chuck, restructure the md page stuff
to use a structure called "vm_page_md", and use __HAVE_VM_PAGE_MD
and __HAVE_PMAP_PHYSSEG.
|
| 1.27 | 29-Apr-2001 |
thorpej | Add a VM_MDPAGE_MEMBERS macro that defines pmap-specific data for
each vm_page structure. Add a VM_MDPAGE_INIT() macro to init this
data when pages are initialized by UVM. These macros are mandatory,
but ports may #define them to nothing if they are not needed/used.
This deprecates struct pmap_physseg. As a transitional measure,
allow a port to #define PMAP_PHYSSEG so that it can continue to
use it until its pmap is converted to use VM_MDPAGE_MEMBERS.
Use all this stuff to eliminate a lot of extra work in the Alpha
pmap module (it's smaller and faster now). Changes to other pmap
modules will follow.
|
| 1.26 | 11-Dec-2000 |
tsutsui | branches: 1.26.2;
Set USPACE_ALIGN to USPACE on mips.
|
| 1.25 | 14-Nov-2000 |
thorpej | We use 4K pages on MIPS systems (see mips_param.h), so override
PAGE_SIZE and friends to be compile-time constants.
|
| 1.24 | 09-Jun-2000 |
soda | USRIOSIZE had to be changed from 32 to 128,
when MAXBSIZE was changed from 16KB to 64KB(MAXPHYS)
on <sys/param.h> revision 1.28.
|
| 1.23 | 06-May-2000 |
nisimura | branches: 1.23.2;
Remove unused mapin(pte, v, pfnum, prot) macro.
|
| 1.22 | 13-Apr-2000 |
soren | Typo; user stack only needs to start one page below 0x80000000.
|
| 1.21 | 07-Apr-2000 |
soren | Move the start of the user stack down a little to account for the
virtual address checking done by the R8000 and some QED CPUs.
From Jeff Smith.
|
| 1.20 | 11-Feb-2000 |
thorpej | Update for the NKMEMPAGES changes.
|
| 1.19 | 26-Jan-2000 |
tsutsui | Remove obsoleted macros.
|
| 1.18 | 09-Jan-2000 |
simonb | Clear up a comment a little.
|
| 1.17 | 04-Dec-1999 |
ragge | CL* discarding.
|
| 1.16 | 29-Nov-1999 |
uch | TX3912/22 support. ENABLE_MIPS_TX3900 enables it.
|
| 1.15 | 24-Apr-1999 |
simonb | branches: 1.15.2; 1.15.8;
Nuke register and remove trailling white space.
|
| 1.14 | 26-Mar-1999 |
thorpej | branches: 1.14.4;
Don't bother allocating mb_map on these systems. Mbuf clusters are
allocated from a pool, and the MIPS and Alpha use KSEG to map pool
pages. So, mb_map wasn't actually being used. Saves around 4MB of
kernel virtual address space in a typical configuration.
Garbage-collect the related VM_MBUF_SIZE constant.
|
| 1.13 | 18-Jan-1999 |
nisimura | - Nuke 90 lines of dead code inherited from 4.4BSD. They were mostly for
VAX BSD VM.
|
| 1.12 | 16-Jan-1999 |
chuck | MNN is no longer optional
|
| 1.11 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.10 | 25-Feb-1998 |
thorpej | branches: 1.10.4;
Implement and switch to MACHINE_NEW_NONCONTIG.
|
| 1.9 | 02-Feb-1998 |
jonathan | garbage-collect unused MMSEG. From PR# 3898.
|
| 1.8 | 12-Jul-1997 |
perry | update comment from 1981 on memory and disk prices -- pr-2754 from Curt Sampson
|
| 1.7 | 12-Jun-1997 |
mrg | bring mrg-vm-swap2 onto mainilne.
|
| 1.6 | 16-Oct-1996 |
jonathan | branches: 1.6.4; 1.6.8;
Increase MAXDSIZE to 256Mbytes.
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 01-Jun-1994 |
glass | VM_MIN_ADDR -> 0
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.6.8.1 | 04-May-1997 |
mrg | re-merge mrg-vm-swap into -current, and call it mrg-vm-swap2.
|
| 1.6.4.1 | 12-Feb-1997 |
mrg | initial work for dynamic swap additions.
|
| 1.10.4.1 | 19-Nov-1998 |
nisimura | - Forgot to commit many files for vm_offset_t purge last Monday.
|
| 1.14.4.2 | 06-Aug-1999 |
chs | take an initial guess at UBC parameters.
|
| 1.14.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.15.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.15.2.3 | 13-Dec-2000 |
bouyer | Sync with HEAD (for UBC fixes).
|
| 1.15.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.15.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.23.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.26.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.28.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.28.2.1 | 03-Aug-2001 |
lukem | update to -current
|
| 1.29.6.3 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.29.6.2 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.29.6.1 | 18-Jul-2001 |
nathanw | file vmparam.h was added on branch nathanw_sa on 2002-01-08 00:26:17 +0000
|
| 1.32.2.4 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.32.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.32.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.32.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.36.2.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.37.8.3 | 21-Jan-2008 |
yamt | sync with head
|
| 1.37.8.2 | 07-Dec-2007 |
yamt | sync with head
|
| 1.37.8.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.39.56.2 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.39.56.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.39.50.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.39.48.1 | 09-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.39.30.2 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.39.30.1 | 15-Jul-2007 |
ad | Get pmax working.
|
| 1.40.6.1 | 02-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.40.2.2 | 24-Dec-2007 |
ad | Fix merge error.
|
| 1.40.2.1 | 04-Dec-2007 |
ad | Pull the vmlocking changes into a new branch.
|
| 1.41.28.28 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.41.28.27 | 16-Feb-2012 |
matt | Add extern int mips_ksegx_tlb_slot;
|
| 1.41.28.26 | 09-Feb-2012 |
matt | Add mips_page_to_pggroup which return what pggroup a page belongs to.
Eradicate VM_FREELIST_MAX
When adding pages to the system, track what freelists get pages.
|
| 1.41.28.25 | 27-Dec-2011 |
matt | Deal with not defining PAGE_SIZE or PAGE_SHIFT for non-kernel inclusion.
|
| 1.41.28.24 | 27-Dec-2011 |
matt | Make these play nice with modules.
|
| 1.41.28.23 | 23-Dec-2011 |
matt | Use MIPS_PAGE_SHIFT to define the page size to be used from a config file.
Add support for tracking which colors have been used for an EXECPAGE.
|
| 1.41.28.22 | 02-Dec-2011 |
matt | Add support for 8KB pages.
|
| 1.41.28.21 | 29-Nov-2011 |
matt | Take part of the KSEG2 space and use it to "almost" direct another 256MB
of memory so that N32 kernels can make use of ram outside of KSEG0. This
allows N32 kernels to be useful on systems with 4GB of RAM or more.
|
| 1.41.28.20 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.41.28.19 | 05-Feb-2011 |
cliff | - protect option includes ("opt_multiprocessor.h") with #ifdef _KERNEL_OPT
|
| 1.41.28.18 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for explicit MULTIPROCESSOR dependency
|
| 1.41.28.17 | 19-Aug-2010 |
matt | Redefine VM_MAXUSER_ADDRESS in terms of PGSHIFT (no functional changes)
|
| 1.41.28.16 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.41.28.15 | 29-May-2010 |
matt | Increase *SSIZ/*DSIZ/*TSIZ for non-O32 environments since they will use
more stack and data than the old O32 environments.
|
| 1.41.28.14 | 28-May-2010 |
matt | Make sure that user stack starts 32KB below maximum so that accesses with
displacements will never cross the VM_MAXUSER_ADDRESS boundary.
|
| 1.41.28.13 | 11-Mar-2010 |
matt | Add MP-aware icache support.
|
| 1.41.28.12 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.41.28.11 | 06-Feb-2010 |
matt | Allow uvm_km_alloc to allocate from a specific vm freelist if the port wants
it to.
|
| 1.41.28.10 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.41.28.9 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.41.28.8 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.41.28.7 | 11-Dec-2009 |
matt | Use the default set of VM_FREELISTs in <mips/vmparam.h> but allow them to
be overridden (for pmax).
|
| 1.41.28.6 | 08-Dec-2009 |
matt | Define various vm freelists for different classes of memory.
|
| 1.41.28.5 | 09-Nov-2009 |
cliff | - fix definition of VM_MAXUSER32_ADDRESS as per Matt
|
| 1.41.28.4 | 12-Sep-2009 |
matt | Add some COMPAT_NETBSD32 definitions of common macros.
|
| 1.41.28.3 | 08-Sep-2009 |
matt | On LP64 kernels, move kernel mapped to XKSEG.
|
| 1.41.28.2 | 03-Sep-2009 |
matt | Double the default stack size to 4MB (since N32/N64 will use double the stack
space).
|
| 1.41.28.1 | 21-Aug-2009 |
matt | Define manifest kernel addresses as negative so that proper sign extension
happens. This gives proper results for both 32bit and 64bit kernels.
|
| 1.41.24.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.41.18.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.41.10.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.41.10.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.41.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.44.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.44.2.3 | 16-Nov-2010 |
uebayasi | Sync with HEAD.
|
| 1.44.2.2 | 26-Apr-2010 |
uebayasi | Remove the unfinished code to add a memory segment after uvm_page_init().
It doesn't even compile.
(In the future, we should allocate struct vm_page [] on the added memory
segment for NUMA's sake.)
|
| 1.44.2.1 | 23-Feb-2010 |
uebayasi | Convert all VM_MDPAGE_INIT()'s to take struct vm_page_md * and paddr_t.
|
| 1.46.4.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.46.4.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.46.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.50.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.50.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.50.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.50.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.52.10.1 | 18-Jan-2017 |
skrll | Sync with netbsd-5
|
| 1.52.8.1 | 03-Dec-2016 |
martin | Pull up following revision(s) (requested by mrg in ticket #1275):
sys/arch/mips/include/vmparam.h: revision 1.57
sys/uvm/pmap/pmap_segtab.c: revision 1.4
1TB is enough UVA for anyone... plus not all cpus can support more.
fix the start index generation in pmap_segtab_release() to
ensure it fits in the actual array. fixes N64 binaries from
triggering later panic. move the panic check itself into a
common function that is called from a couple of new places too.
|
| 1.52.6.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.52.6.3 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.52.6.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.52.6.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.52.4.1 | 03-Dec-2016 |
martin | Pull up following revision(s) (requested by mrg in ticket #1275):
sys/arch/mips/include/vmparam.h: revision 1.57
sys/uvm/pmap/pmap_segtab.c: revision 1.4
1TB is enough UVA for anyone... plus not all cpus can support more.
fix the start index generation in pmap_segtab_release() to
ensure it fits in the actual array. fixes N64 binaries from
triggering later panic. move the panic check itself into a
common function that is called from a couple of new places too.
|
| 1.55.2.2 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.55.2.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.57.8.2 | 11-Sep-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #267):
sys/arch/mips/include/vmparam.h: revision 1.60
Don't define UVM_KM_VMFREELIST on mips as it excludes some memory
ranges unnecessarily.
PR/52501 - erlite quickly fails to allocate memory and processes wedge
|
| 1.57.8.1 | 31-Aug-2017 |
bouyer | Pull up following revision(s) (requested by joerg in ticket #234):
sys/arch/amd64/include/vmparam.h: revision 1.43
sys/kern/exec_subr.c: revision 1.79
lib/libpthread/pthread_int.h: revision 1.94
sys/arch/mips/include/vmparam.h: revision 1.58
sys/arch/mips/include/vmparam.h: revision 1.59
lib/libpthread/TODO: revision 1.19
sys/arch/powerpc/include/vmparam.h: revision 1.20
sys/arch/riscv/include/vmparam.h: revision 1.2
sys/arch/riscv/include/vmparam.h: revision 1.3
sys/arch/i386/include/vmparam.h: revision 1.85
tests/lib/libpthread/t_join.c: revision 1.9
sys/uvm/uvm_meter.c: revision 1.66
sys/uvm/uvm_param.h: revision 1.36
sys/kern/exec_subr.c: revision 1.80
sys/uvm/uvm_param.h: revision 1.37
sys/kern/exec_subr.c: revision 1.81
sys/kern/exec_subr.c: revision 1.82
lib/libpthread/pthread_attr_getguardsize.3: revision 1.4
lib/libpthread/pthread.c: revision 1.148
lib/libpthread/pthread_attr.c: revision 1.17
sys/arch/amd64/include/vmparam.h: revision 1.42
Always include a 1MB guard area beyond the end of stack. While ASLR will
normally create a guard area as well, this provides a deterministic area
for all binaries.
Mitigates the rest of CVE-2017-1000374 and CVE-2017-1000375 from
Qualys.
Revert for the moment, creates problems on i386.
Recommit exec_subr.c revision 1.79:
Always include a 1MB guard area beyond the end of stack. While ASLR will
normally create a guard area as well, this provides a deterministic area
for all binaries.
Mitigates the rest of CVE-2017-1000374 and CVE-2017-1000375 from
Qualys.
Additionally, change VM_DEFAULT_ADDRESS_TOPDOWN to include
user_stack_guard_size in the size reservation.
Update VM_DEFAULT_ADDRESS32_TOPDOWN to include guard area.
Export the guard size of the main thread via vm.guard_size. Add a
complementary writable sysctl for the initial guard size of threads
created via pthread_create. Let the existing attribut accessors do the
right thing. Raise the default guard size for threads to 64KB.
|
| 1.60.2.1 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.61.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.64.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.65.4.1 | 01-Aug-2021 |
thorpej | Sync with HEAD.
|
| 1.66.10.1 | 15-May-2023 |
martin | Pull up following revision(s) (requested by he in ticket #169):
sys/arch/mips/include/vmparam.h: revision 1.67
Bump MAXTSIZ from 64MB to 128MB also for o32.
This so that the rather large cc1 from gcc12 can be run.
OK'ed by simonb@
|
| 1.4 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.3 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 11-Dec-2005 |
christos | branches: 1.2.74; 1.2.76; 1.2.78;
merge ktrace-lwp.
|
| 1.1 | 08-May-2004 |
kleink | branches: 1.1.2;
Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
|
| 1.1.2.4 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.2.3 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.2.2 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 08-May-2004 |
skrll | file wchar_limits.h was added on branch ktrace-lwp on 2004-08-03 10:37:39 +0000
|
| 1.2.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.2.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.5 | 02-Jun-2024 |
andvar | Fix various typos, mainly triple letters.
|
| 1.4 | 26-Jul-2020 |
simonb | #define<tab>
Nuke trailing whitespace.
|
| 1.3 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.2 | 11-Dec-2005 |
christos | branches: 1.2.18; 1.2.28;
merge ktrace-lwp.
|
| 1.1 | 05-Nov-2005 |
tsutsui | branches: 1.1.2;
Add MI mips3 wired map functions based on patch in port-mips/31915
from Garrett D'Amore of Tadpole Computer Inc.
Please refer discussion filed in the PR for details.
|
| 1.1.2.2 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.1.2.1 | 05-Nov-2005 |
skrll | file wired_map.h was added on branch ktrace-lwp on 2005-11-10 13:57:33 +0000
|
| 1.2.28.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.2.18.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.2.18.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.18.1 | 11-Dec-2005 |
yamt | file wired_map.h was added on branch yamt-lazymbuf on 2006-06-21 14:53:38 +0000
|
| 1.21 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.20 | 24-Apr-2021 |
thorpej | branches: 1.20.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.19 | 19-May-2017 |
skrll | branches: 1.19.8; 1.19.26;
Trailing whitespace
|
| 1.18 | 08-Oct-2015 |
macallan | add a driver for the chip's EFUSE interface, use it to find the MAC address
for the onboard ethernet controller
|
| 1.17 | 07-Aug-2015 |
macallan | add driver for jz4780 random number generator
From Michael McConville
|
| 1.16 | 11-Jul-2015 |
macallan | - get rid of private bus space in ingenic_com.c
- move com to apbus
- attach the other UARTs
|
| 1.15 | 18-May-2015 |
macallan | pass the appropriate clock register to devices so different instances of the
same driver don't have to guess
also wire the ddc2 part to iic4 for now so we can see the monitor
|
| 1.14 | 04-May-2015 |
macallan | - fix pclk calculation
- report CPU clock
- pass mclk to child devices
- wire up pins for MSC / sdmmc
|
| 1.13 | 28-Apr-2015 |
macallan | add entries for sdmmc hosts, no driver yet
|
| 1.12 | 21-Apr-2015 |
macallan | enable clocks as needed
|
| 1.11 | 25-Mar-2015 |
macallan | branches: 1.11.2;
- determine bus clock, pass it to devices
- more clock enabling / gpio setup
|
| 1.10 | 19-Mar-2015 |
macallan | spin up SMBus clocks before attaching drivers
TODO: only enable clocks for drivers that actually attach
|
| 1.9 | 17-Mar-2015 |
macallan | always print the child devices' address, print irq if not -1 and a driver
is actually attaching
|
| 1.8 | 17-Mar-2015 |
macallan | - keep a list of devices, addresses and interrupts in apbus.c
- pass irq numbers to devices
- reduce magic numbers in device drivers
- allow multiple instances of device drivers
|
| 1.7 | 09-Mar-2015 |
macallan | moar devices
|
| 1.6 | 27-Dec-2014 |
macallan | restrict DMA buffers to the lower 256MB -> now dwc2 DMA works
|
| 1.5 | 25-Dec-2014 |
macallan | un-gate yet another clock
|
| 1.4 | 23-Dec-2014 |
macallan | appease nick
|
| 1.3 | 23-Dec-2014 |
macallan | wake up the USB ports before attaching dwctwo
now it finds a root hub
|
| 1.2 | 23-Dec-2014 |
macallan | use defflag-ed debug options
enable USB clocks before attaching dwctwo
|
| 1.1 | 06-Dec-2014 |
macallan | peripheral bus, not really tested
|
| 1.11.2.5 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.11.2.4 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.11.2.3 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.11.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.11.2.1 | 25-Mar-2015 |
skrll | file apbus.c was added on branch nick-nhusb on 2015-04-06 15:17:59 +0000
|
| 1.19.26.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.19.8.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.19.8.1 | 19-May-2017 |
jdolecek | file apbus.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.20.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.9 | 11-Dec-2018 |
thorpej | Add a convenience function, com_init_regs_stride(), that shifts the register
offsets and size by the specified amount. Use in front-ends as appropriate.
|
| 1.8 | 08-Dec-2018 |
thorpej | Remove the COM_REGMAP option -- just use it all the time. While here,
garbage-collect the COM_FUNCMAP and COM_AU1X00 options, as there are
not used anywhere.
|
| 1.7 | 08-Dec-2018 |
thorpej | Clean up initialization of com_regs structure, in preparation for
some additional changers.
|
| 1.6 | 19-May-2017 |
skrll | branches: 1.6.8; 1.6.10; 1.6.12;
Trailing whitespace
|
| 1.5 | 11-Jul-2015 |
macallan | - get rid of private bus space in ingenic_com.c
- move com to apbus
- attach the other UARTs
|
| 1.4 | 07-Mar-2015 |
macallan | fix uart parameters, now speed setting actually works
|
| 1.3 | 23-Dec-2014 |
macallan | establish interrupt
|
| 1.2 | 06-Dec-2014 |
macallan | sprinkle static
|
| 1.1 | 22-Nov-2014 |
macallan | branches: 1.1.2;
initial support for CI20 / Ingenic JZ4780
not much there yet, it loads, attaches a serial port and you can drop into
ddb
|
| 1.1.2.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.6.12.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.6.10.1 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.6.8.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.8.1 | 19-May-2017 |
jdolecek | file ingenic_com.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.1 | 21-May-2017 |
skrll | branches: 1.1.6; 1.1.10;
Provide and use some CP0 accessor functions instead of M[TF]C0 macros
for readability.
While here convert some other M[TF]C0 uses to already exising accessor
functions, e.g. mipsNN_cp0_ebase_read
|
| 1.1.10.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.10.1 | 21-May-2017 |
jdolecek | file ingenic_coreregs.h was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.1.6.2 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.1.6.1 | 21-May-2017 |
skrll | file ingenic_coreregs.h was added on branch nick-nhusb on 2017-08-28 17:51:45 +0000
|
| 1.5 | 04-Oct-2025 |
thorpej | Add a shared function to query the common properties used for configuring
an Ethernet address.
|
| 1.4 | 02-Apr-2020 |
nisimura | add miivar.h and put a stop gap to compile.
|
| 1.3 | 19-May-2017 |
skrll | branches: 1.3.8; 1.3.12;
Trailing whitespace
|
| 1.2 | 08-Oct-2015 |
macallan | use the MAC address passed as a property if available instead of relying on
u-boot to program it into the chip for us ( which it may not do if we're not
netbooting )
|
| 1.1 | 10-Mar-2015 |
macallan | branches: 1.1.2;
support CI20's onboard Ethernet controller
|
| 1.1.2.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.1.2.3 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.1.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 10-Mar-2015 |
skrll | file ingenic_dme.c was added on branch nick-nhusb on 2015-04-06 15:17:59 +0000
|
| 1.3.12.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.3.8.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.8.1 | 19-May-2017 |
jdolecek | file ingenic_dme.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.15 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.14 | 24-Apr-2021 |
thorpej | branches: 1.14.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.13 | 23-Apr-2016 |
skrll | branches: 1.13.16; 1.13.34;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.12 | 30-Aug-2015 |
skrll | Update for latest dwc2
|
| 1.11 | 18-May-2015 |
macallan | explicitly un-suspend the OTG port after PHY reset
|
| 1.10 | 28-Apr-2015 |
macallan | 'USB' -> 'USB OTG' to distinguish this one from the other USB hosts
|
| 1.9 | 17-Mar-2015 |
macallan | branches: 1.9.2;
set root hub vendor IDs
|
| 1.8 | 17-Mar-2015 |
macallan | - keep a list of devices, addresses and interrupts in apbus.c
- pass irq numbers to devices
- reduce magic numbers in device drivers
- allow multiple instances of device drivers
|
| 1.7 | 10-Mar-2015 |
macallan | flash the LED to show we're doing something
( and as a side effect make sure the USB PHY is powered up )
|
| 1.6 | 09-Mar-2015 |
macallan | magic number reduction
|
| 1.5 | 27-Dec-2014 |
macallan | restrict DMA buffers to the lower 256MB -> now dwc2 DMA works
|
| 1.4 | 25-Dec-2014 |
macallan | - use the same parameter block as the linux driver, only with DMA disabled
- reset the chip before handing it to dwc2/
now it actually detects some devices
|
| 1.3 | 23-Dec-2014 |
macallan | appease nick
|
| 1.2 | 23-Dec-2014 |
macallan | establish interrupt
do some PHY setup, now the hardware actually responds
|
| 1.1 | 06-Dec-2014 |
macallan | dwc2 attachment, doesn't do much yet
|
| 1.9.2.4 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.9.2.3 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.9.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.9.2.1 | 17-Mar-2015 |
skrll | file ingenic_dwctwo.c was added on branch nick-nhusb on 2015-04-06 15:17:59 +0000
|
| 1.13.34.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.13.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.13.16.1 | 23-Apr-2016 |
jdolecek | file ingenic_dwctwo.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.14.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 14-Oct-2015 |
macallan | branches: 1.3.2; 1.3.18;
add some comments
|
| 1.2 | 08-Oct-2015 |
macallan | fix build with INGENIC_DEBUG
|
| 1.1 | 08-Oct-2015 |
macallan | add a driver for the chip's EFUSE interface, use it to find the MAC address
for the onboard ethernet controller
|
| 1.3.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.18.1 | 14-Oct-2015 |
jdolecek | file ingenic_efuse.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.3.2.2 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.3.2.1 | 14-Oct-2015 |
skrll | file ingenic_efuse.c was added on branch nick-nhusb on 2015-12-27 12:09:38 +0000
|
| 1.8 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.7 | 24-Apr-2021 |
thorpej | branches: 1.7.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.6 | 09-Apr-2018 |
jakllsch | branches: 1.6.16;
Stop potential misuse of vendor names and USB vendor IDs in root hub
device and string descriptors.
Firstly: Few vendors have identical PCI-SIG vendor IDs and USB-IF vendor
IDs. As such, using the PCI vendor ID as a USB vendor ID may trample
on whomever is allocated that USB vendor ID.
Secondly: The vendor of the host controller hardware implementation has
little to nothing to do with our usbroothub implementation. Thus we
should not potentially associate any problems therewith to such third
party.
This change will result in root hubs being identified by USB Vendor ID
0x0000. Root hub vendor string will now be "NetBSD" (or, specifically:
ostype). Product ID (0x0000) and product strings remain unchanged.
|
| 1.5 | 23-Apr-2016 |
skrll | branches: 1.5.16; 1.5.18;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.4 | 02-Jan-2016 |
macallan | properly initialize the EHCI
from Alexander Kabaev ( kan at freebsd.org )
|
| 1.3 | 17-Mar-2015 |
macallan | branches: 1.3.2;
set root hub vendor IDs
|
| 1.2 | 17-Mar-2015 |
macallan | - keep a list of devices, addresses and interrupts in apbus.c
- pass irq numbers to devices
- reduce magic numbers in device drivers
- allow multiple instances of device drivers
|
| 1.1 | 08-Mar-2015 |
macallan | drivers for on-chip ohci and ehci
ohci works fine, ehci doesn't like high speed devices
|
| 1.3.2.4 | 19-Mar-2016 |
skrll | Adapt to branch
|
| 1.3.2.3 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.3.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 17-Mar-2015 |
skrll | file ingenic_ehci.c was added on branch nick-nhusb on 2015-04-06 15:17:59 +0000
|
| 1.5.18.1 | 16-Apr-2018 |
pgoyette | Sync with HEAD, resolve some conflicts
|
| 1.5.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.16.1 | 23-Apr-2016 |
jdolecek | file ingenic_ehci.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.6.16.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.7.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 09-Apr-2018 |
jakllsch | branches: 1.5.16;
Stop potential misuse of vendor names and USB vendor IDs in root hub
device and string descriptors.
Firstly: Few vendors have identical PCI-SIG vendor IDs and USB-IF vendor
IDs. As such, using the PCI vendor ID as a USB vendor ID may trample
on whomever is allocated that USB vendor ID.
Secondly: The vendor of the host controller hardware implementation has
little to nothing to do with our usbroothub implementation. Thus we
should not potentially associate any problems therewith to such third
party.
This change will result in root hubs being identified by USB Vendor ID
0x0000. Root hub vendor string will now be "NetBSD" (or, specifically:
ostype). Product ID (0x0000) and product strings remain unchanged.
|
| 1.4 | 23-Apr-2016 |
skrll | branches: 1.4.16; 1.4.18;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.3 | 17-Mar-2015 |
macallan | branches: 1.3.2;
set root hub vendor IDs
|
| 1.2 | 17-Mar-2015 |
macallan | - keep a list of devices, addresses and interrupts in apbus.c
- pass irq numbers to devices
- reduce magic numbers in device drivers
- allow multiple instances of device drivers
|
| 1.1 | 08-Mar-2015 |
macallan | drivers for on-chip ohci and ehci
ohci works fine, ehci doesn't like high speed devices
|
| 1.3.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 17-Mar-2015 |
skrll | file ingenic_ohci.c was added on branch nick-nhusb on 2015-04-06 15:17:59 +0000
|
| 1.4.18.1 | 16-Apr-2018 |
pgoyette | Sync with HEAD, resolve some conflicts
|
| 1.4.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.16.1 | 23-Apr-2016 |
jdolecek | file ingenic_ohci.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.5.16.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.28 | 07-Jan-2025 |
andvar | s/maks/mask/ in comment.
|
| 1.27 | 10-Dec-2021 |
andvar | branches: 1.27.10;
s/occured/occurred/ in comments, log messages and man pages.
|
| 1.26 | 09-Aug-2020 |
skrll | Type consistency
|
| 1.25 | 21-May-2017 |
skrll | branches: 1.25.8;
Provide and use some CP0 accessor functions instead of M[TF]C0 macros
for readability.
While here convert some other M[TF]C0 uses to already exising accessor
functions, e.g. mipsNN_cp0_ebase_read
|
| 1.24 | 27-Aug-2016 |
skrll | Trailing whitespace
|
| 1.23 | 07-Apr-2016 |
macallan | moar registers, less tpyos
|
| 1.22 | 08-Oct-2015 |
macallan | add a driver for the chip's EFUSE interface, use it to find the MAC address
for the onboard ethernet controller
|
| 1.21 | 07-Aug-2015 |
macallan | - sprinkle volatile
- add RNG registers
- fix some comments
|
| 1.20 | 11-Jul-2015 |
macallan | fix tpyos
|
| 1.19 | 29-May-2015 |
macallan | fix pasto
|
| 1.18 | 18-May-2015 |
macallan | add some clock divider registers
|
| 1.17 | 04-May-2015 |
macallan | moar registers
( clock and gpio related )
|
| 1.16 | 28-Apr-2015 |
macallan | add sdmmc ('MSC') registers
|
| 1.15 | 23-Apr-2015 |
macallan | more bits & registers
|
| 1.14 | 21-Apr-2015 |
macallan | #define some bits in the clock gating registers
|
| 1.13 | 21-Apr-2015 |
macallan | fix comments, add LCDC*_BASEs
|
| 1.12 | 25-Mar-2015 |
macallan | more clock and gpio stuff
|
| 1.11 | 19-Mar-2015 |
macallan | add SMBus registers
|
| 1.10 | 17-Mar-2015 |
macallan | add SMBus base addresses
|
| 1.9 | 10-Mar-2015 |
macallan | add gpio registers
|
| 1.8 | 09-Mar-2015 |
macallan | moar registers
|
| 1.7 | 07-Mar-2015 |
macallan | add memory controller registers
|
| 1.6 | 25-Dec-2014 |
macallan | even more registers
|
| 1.5 | 23-Dec-2014 |
macallan | appease nick
|
| 1.4 | 23-Dec-2014 |
macallan | yet more registers
|
| 1.3 | 23-Dec-2014 |
macallan | moar registers
|
| 1.2 | 06-Dec-2014 |
macallan | moar registers!
|
| 1.1 | 22-Nov-2014 |
macallan | branches: 1.1.2;
initial support for CI20 / Ingenic JZ4780
not much there yet, it loads, attaches a serial port and you can drop into
ddb
|
| 1.1.2.7 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.1.2.6 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.2.5 | 22-Apr-2016 |
skrll | Sync with HEAD
|
| 1.1.2.4 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.1.2.3 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.25.8.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.25.8.1 | 21-May-2017 |
jdolecek | file ingenic_regs.h was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.27.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.7 | 19-Mar-2022 |
riastradh | rnd(9): Omit needless locks in various HWRNG drivers.
Now that the rnd(9) API guarantees serial callbacks, we can simplify
everything a bit more.
(Some drivers like hifn(4) and sun8icrypto(4) still use locks to
coordinate with other parts of the driver to submit requests to and
process responses from the device.)
|
| 1.6 | 19-Mar-2022 |
riastradh | rnd(9): Adjust IPL of locks used by rndsource callbacks.
These no longer ever run from hard interrupt context or with a spin
lock held, so there is no longer any need to have them at IPL_VM to
block hard interrupts. Instead, lower them to IPL_SOFTSERIAL.
|
| 1.5 | 30-Apr-2020 |
riastradh | rnd_attach_source calls the callback itself now.
No need for every driver to explicitly call it to prime the pool.
Eliminate now-unused <sys/rndpool.h>.
|
| 1.4 | 17-Feb-2016 |
macallan | branches: 1.4.16;
Adapt CI20 HWRNG to synchronous on-demand callback.
Omit needless softint/locking dance.
from riastradh@
|
| 1.3 | 17-Nov-2015 |
macallan | Long overdue suggestions from Taylor Campbell and a few syntax/style
tweaks from myself.
From Michael McConville
|
| 1.2 | 30-Aug-2015 |
macallan | branches: 1.2.2;
add attribution, no functional change.
from Michael McConville
|
| 1.1 | 07-Aug-2015 |
macallan | add driver for jz4780 random number generator
From Michael McConville
|
| 1.2.2.4 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.2.2.3 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.2.2.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 | 30-Aug-2015 |
skrll | file ingenic_rng.c was added on branch nick-nhusb on 2015-09-22 12:05:47 +0000
|
| 1.4.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.16.1 | 17-Feb-2016 |
jdolecek | file ingenic_rng.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.6 | 21-May-2017 |
skrll | branches: 1.6.8;
Provide and use some CP0 accessor functions instead of M[TF]C0 macros
for readability.
While here convert some other M[TF]C0 uses to already exising accessor
functions, e.g. mipsNN_cp0_ebase_read
|
| 1.5 | 18-May-2015 |
macallan | pass the appropriate clock register to devices so different instances of the
same driver don't have to guess
also wire the ddc2 part to iic4 for now so we can see the monitor
|
| 1.4 | 04-May-2015 |
macallan | - fix pclk calculation
- report CPU clock
- pass mclk to child devices
- wire up pins for MSC / sdmmc
|
| 1.3 | 25-Mar-2015 |
macallan | branches: 1.3.2;
- determine bus clock, pass it to devices
- more clock enabling / gpio setup
|
| 1.2 | 17-Mar-2015 |
macallan | - keep a list of devices, addresses and interrupts in apbus.c
- pass irq numbers to devices
- reduce magic numbers in device drivers
- allow multiple instances of device drivers
|
| 1.1 | 06-Dec-2014 |
macallan | peripheral bus, not really tested
|
| 1.3.2.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.3.2.3 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.3.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 25-Mar-2015 |
skrll | file ingenic_var.h was added on branch nick-nhusb on 2015-04-06 15:17:59 +0000
|
| 1.6.8.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.8.1 | 21-May-2017 |
jdolecek | file ingenic_var.h was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.2 | 19-May-2017 |
skrll | branches: 1.2.8;
Trailing whitespace
|
| 1.1 | 07-Apr-2016 |
macallan | branches: 1.1.2;
moar registers, less tpyos
|
| 1.1.2.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 22-Apr-2016 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 07-Apr-2016 |
skrll | file jzfb_regs.h was added on branch nick-nhusb on 2016-04-22 15:44:10 +0000
|
| 1.2.8.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.8.1 | 19-May-2017 |
jdolecek | file jzfb_regs.h was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.10 | 15-Sep-2025 |
thorpej | Encapsulate what's needed to attach an I2C bus into a iicbus_attach()
inline.
|
| 1.9 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.8 | 24-Apr-2021 |
thorpej | branches: 1.8.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.7 | 23-Dec-2019 |
thorpej | branches: 1.7.10;
No need to check cold ourselves; iic_exec() does it for us.
|
| 1.6 | 22-Dec-2019 |
thorpej | Cleanup i2c bus acquire / release, centralizing all of the logic into
iic_acquire_bus() / iic_release_bus(). "acquire" and "release" hooks
no longer need to be provided by back-end controller drivers (only if
they need special handling, e.g. powering on the i2c controller).
This results in the removal of a bunch of rendundant code from each
back-end controller driver.
Assert that we are not in hard interrupt context in iic_acquire_bus(),
iic_exec(), and iic_release_bus().
|
| 1.5 | 03-Sep-2018 |
riastradh | Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.
To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
|
| 1.4 | 19-May-2017 |
skrll | branches: 1.4.8; 1.4.10; 1.4.12;
Trailing whitespace
|
| 1.3 | 14-Dec-2015 |
macallan | zero out struct i2cbus_attach_args before messing with it
|
| 1.2 | 21-Apr-2015 |
macallan | support interrupt-driven transfers
|
| 1.1 | 04-Apr-2015 |
macallan | branches: 1.1.2;
preliminary driver for JZ4780's on-chip SMBus controllers
needs more work but it's good enough for talking to an RTC
|
| 1.1.2.4 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.1.2.3 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 04-Apr-2015 |
skrll | file jziic.c was added on branch nick-nhusb on 2015-04-06 15:17:59 +0000
|
| 1.4.12.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.4.12.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.4.10.1 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.4.8.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.8.1 | 19-May-2017 |
jdolecek | file jziic.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.7.10.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.8.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.10 | 06-Apr-2019 |
thorpej | Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.9 | 24-Aug-2017 |
mrg | branches: 1.9.4;
mips_emul_daddi and mips_emul_daddiu don't exist, but there are
bcemul_daddi and bcemul_daddiu here that should be used. however,
bcemul_daddi needed to be changed to use dadd not daddui.
fixes FPEMUL and N64 kernels. ok simonb.
|
| 1.8 | 09-Jun-2015 |
matt | branches: 1.8.10;
#include <sys/cpu.h> or <mips/cpuregs.h> as needed
|
| 1.7 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.6 | 25-Dec-2011 |
kiyohara | branches: 1.6.2; 1.6.6; 1.6.22; 1.6.24; 1.6.26; 1.6.30;
Fix TLB-miss. Don't overwrite t0 before use.
|
| 1.5 | 16-Aug-2011 |
matt | branches: 1.5.2; 1.5.6;
Only jump through t9/ra (or k0) to help avoid hitting
the Loongson2 jump problem.
|
| 1.4 | 26-Feb-2011 |
tsutsui | branches: 1.4.2;
Um, it's mips_fpuillinst(), not fpemul_fpuillinst().
|
| 1.3 | 26-Feb-2011 |
tsutsui | Use fpemul_fpuillinst() instead of fpemul_trapsignal() to deliver SIGILL.
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 29-Dec-2010 |
matt | branches: 1.1.2; 1.1.4; 1.1.6;
file bds_emul.S was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.1 | 29-Dec-2010 |
matt | Break out break slot instruction emualtion into its own .S file.
Redo that and simplify
|
| 1.4.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.4.2.1 | 26-Feb-2011 |
rmind | file bds_emul.S was added on branch rmind-uvmplock on 2011-03-05 20:51:04 +0000
|
| 1.5.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.5.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.6.30.1 | 24-Sep-2017 |
snj | Pull up following revision(s) (requested by mrg in ticket #1500):
sys/arch/evbmips/conf/MALTA64: revision 1.8
sys/arch/evbmips/conf/MALTA32: revision 1.4
sys/arch/mips/mips/bds_emul.S: revision 1.9
sys/arch/evbmips/conf/MALTA: revision 1.88
Re-enable the NOFPU and (renamed) FPEMUL options. None of the Malta
CPU daughter cards currently supported by NetBSD have an FPU.
Detected on real hardware. gxemul wrongly supports an FPU on the
4Kc and 5Kc CPUs.
--
Remove the NOFPU option. The main MALTA config file has this now.
--
mips_emul_daddi and mips_emul_daddiu don't exist, but there are
bcemul_daddi and bcemul_daddiu here that should be used. however,
bcemul_daddi needed to be changed to use dadd not daddui.
fixes FPEMUL and N64 kernels. ok simonb.
|
| 1.6.26.1 | 24-Sep-2017 |
snj | Pull up following revision(s) (requested by mrg in ticket #1500):
sys/arch/evbmips/conf/MALTA64: revision 1.8
sys/arch/evbmips/conf/MALTA32: revision 1.4
sys/arch/mips/mips/bds_emul.S: revision 1.9
sys/arch/evbmips/conf/MALTA: revision 1.88
Re-enable the NOFPU and (renamed) FPEMUL options. None of the Malta
CPU daughter cards currently supported by NetBSD have an FPU.
Detected on real hardware. gxemul wrongly supports an FPU on the
4Kc and 5Kc CPUs.
--
Remove the NOFPU option. The main MALTA config file has this now.
--
mips_emul_daddi and mips_emul_daddiu don't exist, but there are
bcemul_daddi and bcemul_daddiu here that should be used. however,
bcemul_daddi needed to be changed to use dadd not daddui.
fixes FPEMUL and N64 kernels. ok simonb.
|
| 1.6.24.2 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.6.24.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.6.22.1 | 24-Sep-2017 |
snj | Pull up following revision(s) (requested by mrg in ticket #1500):
sys/arch/evbmips/conf/MALTA64: revision 1.8
sys/arch/evbmips/conf/MALTA32: revision 1.4
sys/arch/mips/mips/bds_emul.S: revision 1.9
sys/arch/evbmips/conf/MALTA: revision 1.88
Re-enable the NOFPU and (renamed) FPEMUL options. None of the Malta
CPU daughter cards currently supported by NetBSD have an FPU.
Detected on real hardware. gxemul wrongly supports an FPU on the
4Kc and 5Kc CPUs.
--
Remove the NOFPU option. The main MALTA config file has this now.
--
mips_emul_daddi and mips_emul_daddiu don't exist, but there are
bcemul_daddi and bcemul_daddiu here that should be used. however,
bcemul_daddi needed to be changed to use dadd not daddui.
fixes FPEMUL and N64 kernels. ok simonb.
|
| 1.6.6.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.2.1 | 31-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #1499):
sys/arch/evbmips/conf/MALTA64: revision 1.8
sys/arch/evbmips/conf/MALTA32: revision 1.4
sys/arch/mips/mips/bds_emul.S: revision 1.9
sys/arch/evbmips/conf/MALTA: revision 1.88
Re-enable the NOFPU and (renamed) FPEMUL options. None of the Malta
CPU daughter cards currently supported by NetBSD have an FPU.
Detected on real hardware. gxemul wrongly supports an FPU on the
4Kc and 5Kc CPUs.
Remove the NOFPU option. The main MALTA config file has this now.
mips_emul_daddi and mips_emul_daddiu don't exist, but there are
bcemul_daddi and bcemul_daddiu here that should be used. however,
bcemul_daddi needed to be changed to use dadd not daddui.
fixes FPEMUL and N64 kernels. ok simonb.
|
| 1.8.10.1 | 31-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #239):
sys/arch/evbmips/conf/MALTA64: revision 1.8
sys/arch/evbmips/conf/MALTA32: revision 1.4
sys/arch/mips/mips/bds_emul.S: revision 1.9
sys/arch/evbmips/conf/MALTA: revision 1.88
Re-enable the NOFPU and (renamed) FPEMUL options. None of the Malta
CPU daughter cards currently supported by NetBSD have an FPU.
Detected on real hardware. gxemul wrongly supports an FPU on the
4Kc and 5Kc CPUs.
Remove the NOFPU option. The main MALTA config file has this now.
mips_emul_daddi and mips_emul_daddiu don't exist, but there are
bcemul_daddi and bcemul_daddiu here that should be used. however,
bcemul_daddi needed to be changed to use dadd not daddui.
fixes FPEMUL and N64 kernels. ok simonb.
|
| 1.9.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.49 | 21-Oct-2024 |
skrll | Use KASSERT instead if #ifdef DIAGNOSTIC + panic
|
| 1.48 | 04-Jun-2024 |
riastradh | branches: 1.48.2;
mips/bus_dma.c: KNF
No functional change intended.
|
| 1.47 | 26-Jul-2022 |
andvar | s/functin/function/ in copy pasted comment.
|
| 1.46 | 22-Jan-2022 |
skrll | Ensure bus_dmatag_subregion is called with an inclusive max_addr
everywhere.
|
| 1.45 | 22-Jan-2022 |
skrll | Trailing whitespace
|
| 1.44 | 07-Jan-2021 |
skrll | Fix build for non-_MIPS_NEED_BUS_DMA_BOUNCE platforms
|
| 1.43 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.42 | 16-Jul-2020 |
simonb | branches: 1.42.2;
Fix variable name for BUS_DMA_DEBUG.
|
| 1.41 | 14-Jun-2020 |
tsutsui | Fix inconsistent mips_o32, _mips_o32, and __mips_o32 macro. PR/54216
Not sure what the original intention was, but no responce for a year,
and no visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.40 | 14-Mar-2020 |
ad | - Hide the details of SPCF_SHOULDYIELD and related behind a couple of small
functions: preempt_point() and preempt_needed().
- preempt(): if the LWP has exceeded its timeslice in kernel, strip it of
any priority boost gained earlier from blocking.
|
| 1.39 | 13-Mar-2020 |
thorpej | Allow len == 0 in bus_dmamap_sync().
XXX pullup-9
|
| 1.38 | 17-Aug-2016 |
skrll | branches: 1.38.16; 1.38.20;
Spelling in comment
|
| 1.37 | 30-Jul-2016 |
matt | Supply lastvaddr to load_buffer. Fix printf formats.
|
| 1.36 | 22-Jul-2016 |
matt | When mapping a dmamem page, make sure to trunc_pae the starting address
|
| 1.35 | 16-Jul-2016 |
matt | When doing dmamap syncs, try to use KSEG0/XKPHYS address if possible.
XXX once hard page coloring is supported XKPHYS could be used all the time.
|
| 1.34 | 17-Feb-2015 |
macallan | branches: 1.34.2;
do as others do and mmap() DMA buffers uncached if we get
BUS_DMA_PREFETCHABLE passed in flags
|
| 1.33 | 16-Feb-2015 |
macallan | mmap() DMA buffers uncached if we know how.
From sgimips, needed for X on O2.
|
| 1.32 | 13-Feb-2015 |
skrll | Deal with 64-bit fallout from previous.
|
| 1.31 | 27-May-2014 |
skrll | branches: 1.31.2; 1.31.4;
Optimise the BUS_DMASYNC_PREREAD operation by only using wbinv for partial
cachelines. Full cachelines are now invalidated only.
From the same change in various mips ports not least cobalt.
|
| 1.30 | 05-Feb-2014 |
christos | branches: 1.30.2;
fix incorrect variable; (hi matt)
|
| 1.29 | 03-Feb-2014 |
matt | Provide a simple version of _bus_dmamap_load_raw. If each segments can
be mapped by XKPHYS/KSEGn, then the load will succeed. If it would
require a bounce buffer or being mapped into the kernel's address space,
the load will fail.
|
| 1.28 | 23-Aug-2013 |
matt | When decide to coalesce segments, if the d_cache isn't coherent also make
sure the VA is contiguous as well.
|
| 1.27 | 10-Jul-2011 |
matt | branches: 1.27.2; 1.27.8; 1.27.12; 1.27.16;
Fix machine/ includes
|
| 1.26 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.25 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.24 | 12-Nov-2010 |
uebayasi | branches: 1.24.2; 1.24.4;
Pull in uvm/uvm.h where UVM's page level interface is used.
|
| 1.23 | 14-Dec-2009 |
matt | branches: 1.23.2; 1.23.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.22 | 04-Jun-2008 |
ad | branches: 1.22.16;
vm_page: put TAILQ_ENTRY into a union with LIST_ENTRY, so we can use both.
|
| 1.21 | 28-Apr-2008 |
martin | branches: 1.21.2;
Remove clause 3 and 4 from TNF licenses
|
| 1.20 | 12-Apr-2007 |
matt | branches: 1.20.32; 1.20.34; 1.20.36;
Remove the BUS_DMA_COHERENT check from bus_dma_mmap
|
| 1.19 | 12-Apr-2007 |
matt | If bus_space_mmap is asked for a COHERENT page, make the phys addr is from
KSEG1.
|
| 1.18 | 04-Mar-2007 |
christos | branches: 1.18.2; 1.18.4;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.17 | 01-Mar-2006 |
yamt | branches: 1.17.20;
merge yamt-uio_vmspace branch.
- use vmspace rather than proc or lwp where appropriate.
the latter is more natural to specify an address space.
(and less likely to be abused for random purposes.)
- fix a swdmover race.
|
| 1.16 | 11-Dec-2005 |
christos | branches: 1.16.2; 1.16.4; 1.16.6;
merge ktrace-lwp.
|
| 1.15 | 24-Nov-2005 |
yamt | bus_dmamem_map: honour BUS_DMA_NOWAIT. noted by Manuel Bouyer.
bus_space_map: always do NOWAIT allocation as it used to be before yamt-km.
we have too many copies!
|
| 1.14 | 01-Apr-2005 |
yamt | branches: 1.14.2; 1.14.8;
merge yamt-km branch.
- don't use managed mappings/backing objects for wired memory allocations.
save some resources like pv_entry. also fix (most of) PR/27030.
- simplify kernel memory management API.
- simplify pmap bootstrap of some ports.
- some related cleanups.
|
| 1.13 | 09-Mar-2005 |
matt | Add a dm_maxsegsz public member to bus_dmamap_t. This allows a user of the API
to select the maximum segment size for each bus_dmamap_load (up to the maxsegsz
supplied to bus_dmamap_create). dm_maxsegsz is reset to the value supplied to
bus_dmamap_create when the dmamap is unloaded.
|
| 1.12 | 09-Mar-2005 |
simonb | Add an extra `i' to notifes/notifed.
|
| 1.11 | 28-Nov-2004 |
thorpej | branches: 1.11.4; 1.11.6;
bus_dmamap_load_mbuf(): Skip zero-length mbufs.
kern/24811
|
| 1.10 | 29-Oct-2003 |
simonb | Make this 64-bit paddr_t friendly.
|
| 1.9 | 29-Jun-2003 |
fvdl | branches: 1.9.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.8 | 29-Jun-2003 |
simonb | Don't use "extern" with functions.
|
| 1.7 | 28-Jun-2003 |
darrenr | Pass lwp pointers throughtout the kernel, as required, so that the lwpid can
be inserted into ktrace records. The general change has been to replace
"struct proc *" with "struct lwp *" in various function prototypes, pass
the lwp through and use l_proc to get the process pointer when needed.
Bump the kernel rev up to 1.6V
|
| 1.6 | 14-May-2003 |
simonb | Un-wrap a no-longer-too-long panic message, add some extra info to another
panic message.
|
| 1.5 | 11-Apr-2003 |
simonb | Fix a tyop in a comment.
|
| 1.4 | 02-Apr-2003 |
thorpej | Use PAGE_SIZE rather than NBPG.
|
| 1.3 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.2 | 02-Jun-2002 |
drochner | branches: 1.2.2;
move initialization of the "struct pglist" returned by uvm_pglistalloc()
from the calling code into uvm_pglistalloc() itself for consistency
and easier error handling
|
| 1.1 | 18-Mar-2002 |
simonb | branches: 1.1.4; 1.1.6;
Copy the algor bus_dma.c for use as a generic bus_dma implementation for
other MIPS ports.
|
| 1.1.6.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.1.4.6 | 02-Dec-2002 |
wdk | Tidy up for Scheduler Activations:
- Change curproc -> curlwp
- Display LWP id along with PID for kernel generated messages
|
| 1.1.4.5 | 02-Jul-2002 |
nathanw | curlwp back to curproc; curproc is the correct type here.
|
| 1.1.4.4 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.1.4.3 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.1.4.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.4.1 | 18-Mar-2002 |
nathanw | file bus_dma.c was added on branch nathanw_sa on 2002-04-01 07:41:01 +0000
|
| 1.2.2.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.2.2.1 | 02-Jun-2002 |
jdolecek | file bus_dma.c was added on branch kqueue on 2002-06-23 17:38:02 +0000
|
| 1.9.2.8 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.9.2.7 | 01-Apr-2005 |
skrll | Sync with HEAD.
|
| 1.9.2.6 | 19-Feb-2005 |
skrll | Don't deref a NULL struct lwp *. This shouldn't happen, but...
|
| 1.9.2.5 | 18-Dec-2004 |
skrll | Sync with HEAD.
|
| 1.9.2.4 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.9.2.3 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.9.2.2 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.9.2.1 | 02-Jul-2003 |
darrenr | Apply the aborted ktrace-lwp changes to a specific branch. This is just for
others to review, I'm concerned that patch fuziness may have resulted in some
errant code being generated but I'll look at that later by comparing the diff
from the base to the branch with the file I attempt to apply to it. This will,
at the very least, put the changes in a better context for others to review
them and attempt to tinker with removing passing of 'struct lwp' through
the kernel.
|
| 1.11.6.2 | 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.11.6.1 | 31-Jan-2005 |
yamt | convert arch/mips to new apis.
|
| 1.11.4.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.14.8.1 | 29-Nov-2005 |
yamt | sync with head.
|
| 1.14.2.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.14.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.16.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.16.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.16.2.3 | 18-Feb-2006 |
yamt | remove a variable which is now unused.
|
| 1.16.2.2 | 18-Feb-2006 |
yamt | _dm_proc -> _dm_vmspace.
|
| 1.16.2.1 | 18-Feb-2006 |
yamt | adapt bus_dma implementations.
|
| 1.17.20.2 | 15-Apr-2007 |
yamt | sync with head.
|
| 1.17.20.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.18.4.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.18.2.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.20.36.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.20.36.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.20.36.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.20.34.2 | 17-Jun-2008 |
yamt | sync with head.
|
| 1.20.34.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.20.32.2 | 05-Jun-2008 |
mjf | Sync with HEAD.
Also fix build.
|
| 1.20.32.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.21.2.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.22.16.22 | 13-Feb-2012 |
matt | Add mm_md_direct_mapped_virt (inverse of mm_md_direct_mapped_phys). Add a
third argument, vsize_t *, which, if not NULL, returns the amount of virtual
space left in that direct mapped segment.
Get rid most of the individual direct_mapped assert and use the above
routines instead.
Improve kernel core dump code.
|
| 1.22.16.21 | 06-Dec-2011 |
matt | Add missing KSEGX support.
|
| 1.22.16.20 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.22.16.19 | 25-May-2011 |
matt | Make uvm_map recognize UVM_FLAG_COLORMATCH which tells uvm_map that the
'align' argument specifies the starting color of the KVA range to be returned.
When calling uvm_km_alloc with UVM_KMF_VAONLY, also specify the starting
color of the kva range returned (UMV_KMF_COLORMATCH) and pass those to
uvm_map.
In uvm_pglistalloc, make sure the pages being returned have sequentially
advancing colors (so they can be mapped in a contiguous address range).
Add a few missing UVM_FLAG_COLORMATCH flags to uvm_pagealloc calls.
Make the socket and pipe loan color-safe.
Make the mips pmap enforce strict page color (color(VA) == color(PA)).
|
| 1.22.16.18 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.22.16.17 | 20-Apr-2010 |
matt | Fix formatting.
|
| 1.22.16.16 | 17-Apr-2010 |
cliff | - in _bus_dmamap_sync() replace complex/buggy mbuf bounce buffer copy
code with simple call to m_copyback
|
| 1.22.16.15 | 16-Apr-2010 |
cliff | - teach _bus_dmamem_map to handle PA > MIPS_PHYS_MASK for non-_LP64 kernel
- fix a debug print format for non-_LP32
|
| 1.22.16.14 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.22.16.13 | 14-Jan-2010 |
matt | More fixes for the CFATTAL_DECL_NEW changes and rmixl cpucore/cpu changes.
|
| 1.22.16.12 | 12-Jan-2010 |
cliff | - in _bus_dmatag_subregion fix comparison of max_addr vs. _BUS_AVAIL_END
- in _bus_dmamap_load_buffer use #ifdef BUS_DMA_DEBUG and PRIx formats
|
| 1.22.16.11 | 12-Jan-2010 |
matt | Add some evcnts for bounce buffers
|
| 1.22.16.10 | 12-Jan-2010 |
matt | Rework bounce buffers so that it can also deal with non-coherent buffers.
|
| 1.22.16.9 | 11-Jan-2010 |
matt | Mark dmamaps as coherent if the D cache is coherent.
|
| 1.22.16.8 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.22.16.7 | 15-Nov-2009 |
cliff | - use PRIxPADDR and PRIxPSIZE as needed when printing bus address, size
|
| 1.22.16.6 | 09-Nov-2009 |
cliff | - in _bus_dmamem_map() use uncached addressing when caller requests
BUS_DMA_COHERENT, but cpu does not have CPU_MIPS_D_CACHE_COHERENT
|
| 1.22.16.5 | 08-Sep-2009 |
matt | For LP64 kernels, only use KSEG0 for pmap_steal_memory. Everything else uses
XKPHYS. Use the new MIPS_PHYS_TO_XKPHYS_{,UN}CACHED macros.
|
| 1.22.16.4 | 07-Sep-2009 |
matt | Use/Compare CCA from MIPS3_PG_{UNCACHED,CACHED}
|
| 1.22.16.3 | 06-Sep-2009 |
matt | Don't refer to KSEG2 anymore. If LP64 kernel, use XKPHYS for addresses
that don't fit in into KSEG0/KSEG1.
|
| 1.22.16.2 | 21-Aug-2009 |
matt | Use PRIxPADDR
|
| 1.22.16.1 | 19-Aug-2009 |
matt | change casting pointer to u_long to uintptr_t
|
| 1.23.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.23.2.1 | 16-Nov-2010 |
uebayasi | Sync with HEAD.
|
| 1.24.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.24.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.27.16.2 | 18-May-2014 |
rmind | sync with head
|
| 1.27.16.1 | 28-Aug-2013 |
rmind | sync with head
|
| 1.27.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.27.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.27.8.1 | 21-May-2014 |
bouyer | Pull up following revision(s) (requested by skrll in ticket #1055):
sys/arch/mips/mips/bus_dma.c: revision 1.28
When decide to coalesce segments, if the d_cache isn't coherent also make
sure the VA is contiguous as well.
|
| 1.27.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.30.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.31.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.31.4.1 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.31.2.1 | 16-Feb-2015 |
martin | Pull up following revision(s) (requested by skrll in ticket #515):
sys/arch/mips/mips/bus_dma.c: revision 1.32
Deal with 64-bit fallout from previous.
|
| 1.34.2.3 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.34.2.2 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.34.2.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.38.20.2 | 20-Jun-2020 |
martin | Pull up following revision(s) (requested by tsutsui in ticket #963):
sys/arch/mips/mips/bus_dma.c: revision 1.41
Fix inconsistent mips_o32, _mips_o32, and __mips_o32 macro. PR/54216
Not sure what the original intention was, but no responce for a year,
and no visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.38.20.1 | 13-Mar-2020 |
martin | Pull up following revision(s) (requested by thorpej in ticket #779):
sys/arch/mips/mips/bus_dma.c: revision 1.39
Allow len == 0 in bus_dmamap_sync().
XXX pullup-9
|
| 1.38.16.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.42.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.48.2.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.32 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.31 | 22-Jan-2018 |
flxd | Use right variable as revealed by previous typo...
|
| 1.30 | 21-Jan-2018 |
flxd | fix typo
|
| 1.29 | 20-Jul-2016 |
macallan | fix tpyo, now n32 kernels have a chance to work again
|
| 1.28 | 13-Jul-2016 |
maya | branches: 1.28.2;
Removed unused variable
|
| 1.27 | 12-Jul-2016 |
matt | Use mips3_ld
|
| 1.26 | 11-Jul-2016 |
skrll | Trailing whitespace
|
| 1.25 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.24 | 21-Oct-2015 |
macallan | use mips3_ld() and mips3_sd() for all accesses if CHIP_ACCESS_SIZE == 8 and
we're on o32
Now serial console works on O2 with o32 kernels again
|
| 1.23 | 27-Feb-2015 |
macallan | on o32 kernels with MIPS3 use mips3_sd() and mips3_ld() in *read*_8()
and *write*_8() methods
needed by sgimips, some O2 registers can only be properly written in
64bit chunks
|
| 1.22 | 13-Feb-2015 |
macallan | fix previous for LP64
|
| 1.21 | 12-Feb-2015 |
macallan | in unmap():
- fix pasto in debug output
- shut up a set-but-not-used warning
|
| 1.20 | 08-Feb-2015 |
macallan | - add CHIP_WRONG_ENDIAN for things like PCI buses behind endianness
converting hardware that can't be turned off, like MACE PCI found in
the SGI O2
- when using CHIP_ACCESS_SIZE on a bus with CHIP_ALIGN_STRIDE > 0 make
sure we apply the stride when shifting data around
ok matt@ and my gdium still works
|
| 1.19 | 27-Jan-2012 |
para | branches: 1.19.6; 1.19.22; 1.19.24;
converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch
releng@ acknowledged
|
| 1.18 | 23-Sep-2011 |
macallan | branches: 1.18.2; 1.18.6;
make this build again with 32bit paddr_t
from he@
|
| 1.17 | 23-Sep-2011 |
macallan | remove accidentially committed debug output
|
| 1.16 | 22-Sep-2011 |
macallan | support BUS_SPACE_MAP_PREFETCH in order to allow mapping device memory and
DMA buffers with cacheing disabled but things like write combining, relaxed
ordering etc. allowed when the CPU supports it
so far enabled only on Loongson, should work on R1xk and probably newer CPUs
|
| 1.15 | 10-Jul-2011 |
matt | Fix machine/ includes
|
| 1.14 | 06-Jul-2011 |
matt | Make this play nicely with GCC 4.5. While there, make everything static,
get rid of global inlines, and move the init function to the end.
|
| 1.13 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.12 | 15-Dec-2009 |
rmind | branches: 1.12.4; 1.12.6; 1.12.8;
Fix MALTA32 builds, pmap_kenter_pa() needs additional argument in -current.
|
| 1.11 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.10 | 28-Apr-2008 |
martin | branches: 1.10.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.9 | 04-Mar-2007 |
christos | branches: 1.9.40; 1.9.42; 1.9.44;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.8 | 04-Feb-2006 |
gdamore | branches: 1.8.10; 1.8.20;
Provide streaming bus_space methods that don't swap if bus is otherwise
swapped from host byte order.
Closes PR port-mips/31910
Reviewed by <izumi>, <matt>, and <simonb>
|
| 1.7 | 11-Dec-2005 |
christos | branches: 1.7.2; 1.7.4; 1.7.6;
merge ktrace-lwp.
|
| 1.6 | 15-Jul-2003 |
lukem | branches: 1.6.16;
__KERNEL_RCSID()
|
| 1.5 | 13-Mar-2003 |
simonb | branches: 1.5.2;
Sprinkle some "volatile"; fixes problems with the {read,write}_{1,2}
functions big-endian Au1xxx CPUs.
|
| 1.4 | 19-Aug-2002 |
simonb | Fix printf format string for the EXTENT_DEBUG case.
|
| 1.3 | 05-Jun-2002 |
simonb | branches: 1.3.2;
Introduce CHIP_ACCESSTYPE which (if defined) is used as the type for
performing the accesses, regardless of the size of the data type
requested. Useful for chips which require fixed-width accesses to all
registers.
Cast arguments printed using %lx to u_long all the time, not just
sometimes.
Include a few extra files here so they don't need to be included by the
files that include this one.
|
| 1.2 | 23-Mar-2002 |
simonb | branches: 1.2.2; 1.2.4;
Remove the comment that says this is for PCI busses only.
|
| 1.1 | 23-Mar-2002 |
simonb | Add generic chipset memory and I/O "bus" functions for mips, based on
algor/pci/pci_alignstride_bus_{io,mem}_chipdep.c.
|
| 1.2.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.4.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.2.2.4 | 27-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.3 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.2.2.1 | 23-Mar-2002 |
nathanw | file bus_space_alignstride_chipdep.c was added on branch nathanw_sa on 2002-04-01 07:41:01 +0000
|
| 1.3.2.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.3.2.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.3.2.1 | 05-Jun-2002 |
jdolecek | file bus_space_alignstride_chipdep.c was added on branch kqueue on 2002-06-23 17:38:03 +0000
|
| 1.5.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.5.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.5.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.6.16.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.6.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.7.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.7.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.7.2.1 | 18-Feb-2006 |
yamt | sync with head.
|
| 1.8.20.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.8.10.1 | 13-Jul-2006 |
gdamore | Merge from HEAD.
|
| 1.9.44.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.9.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.9.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.9.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.10.18.16 | 16-Feb-2012 |
matt | Allow KSEG1 even on _LP64.
|
| 1.10.18.15 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.10.18.14 | 23-Dec-2011 |
matt | Add a fourth window
|
| 1.10.18.13 | 25-May-2011 |
matt | Make uvm_map recognize UVM_FLAG_COLORMATCH which tells uvm_map that the
'align' argument specifies the starting color of the KVA range to be returned.
When calling uvm_km_alloc with UVM_KMF_VAONLY, also specify the starting
color of the kva range returned (UMV_KMF_COLORMATCH) and pass those to
uvm_map.
In uvm_pglistalloc, make sure the pages being returned have sequentially
advancing colors (so they can be mapped in a contiguous address range).
Add a few missing UVM_FLAG_COLORMATCH flags to uvm_pagealloc calls.
Make the socket and pipe loan color-safe.
Make the mips pmap enforce strict page color (color(VA) == color(PA)).
|
| 1.10.18.12 | 14-Jan-2010 |
cliff | in BS(unmap), instead of assuming KSEG2 bsh address came from uvm_km_alloc,
check that the address is NOT (KSEG0 or KSEG1) address.
|
| 1.10.18.11 | 04-Dec-2009 |
cliff | in BS(init) use ~0UL instead of 0xffffffffUL as end addr
when creating and allocating the mega extent used for
the one or more windows belonging to a bus space.
|
| 1.10.18.10 | 03-Dec-2009 |
cliff | fix unused var warning when _LP64 is defined and CHIP_EXTENT is undefined
|
| 1.10.18.9 | 22-Nov-2009 |
cliff | in BS(unmap), uvm/pmap mappings only apply if _LP64, #ifdef as needed
|
| 1.10.18.8 | 18-Nov-2009 |
cliff | - in BS(unmap), if handle is for addr mapped in page table,
free up the pmap and uvm resources. Otherwise manage
kseg[0,1] mapped handle as usual.
- also in BS(unmamp), use bus_addr_t addr (not the handle)
when calculating offset in extent.
- use PRIxBUSADDR, PRIxBUSSIZE and PRIxBSH formats as needed
- use function names instead of "xxx" in printfs
|
| 1.10.18.7 | 17-Nov-2009 |
matt | Appease the extent routines and pass a u_long instead of a bus_addr_t.
(slightly bogus but then we really should kill extent and switch to vmem)
|
| 1.10.18.6 | 17-Nov-2009 |
matt | Add/use PRIxBUS{ADDR,SIZE} and PRIxBSH
|
| 1.10.18.5 | 15-Nov-2009 |
cliff | - use (intptr_t) as needed to make int to pointer casts work for N32 and N64
- in BS(map), when not _LP64, if the bus address cannot "fit"
in KSEG0/KSEG1, then use uvm_km_alloc() and pmap_kenter_pa()
to make page table mappings.
|
| 1.10.18.4 | 09-Nov-2009 |
cliff | revamp read_[1,2,4,8] and write_[1,2,4,8] functions
- fix bug in read_8 when Little Endian, Access Size 1, Stride 0
- fix bug in write_1 when Little Endian, Access Size 4, Stride 0
- fix bug in read_8 when Little Endian, Access Size 4, Stride 0
- fix bug in read_2 when Big Endian, Access Size 1, Stride 0
- fix bug in read_4 when Big Endian, Access Size 1, Stride 0
- fix bug in read_8 when Big Endian, Access Size 1, Stride 0
- fix bug in write_1 when Big Endian, Access Size 4, Stride 0
- fix bug in write_2 when Big Endian, Access Size 4, Stride 0
- fix bug in read_8 when Big Endian, Access Size 4, Stride 0
|
| 1.10.18.3 | 22-Sep-2009 |
cliff | make bus read_N and bus write_N routines swizzle correctly if
CHIP_LITTLE_ENDIAN or CHIP_BIG_ENDIAN is specified and CHIP_ACCESS_SIZE > 1
|
| 1.10.18.2 | 15-Sep-2009 |
cliff | fix 2 typos that show up when CHIP_LITTLE_ENDIAN or
CHIP_BIG_ENDIAN flag is used
|
| 1.10.18.1 | 08-Sep-2009 |
matt | For LP64 kernels, only use KSEG0 for pmap_steal_memory. Everything else uses
XKPHYS. Use the new MIPS_PHYS_TO_XKPHYS_{,UN}CACHED macros.
|
| 1.12.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.12.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.12.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.18.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.18.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.19.24.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.19.24.2 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.19.24.1 | 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.19.22.1 | 05-Nov-2015 |
riz | Apply patch (requested by nisimura in ticket #979):
sys/arch/mips/mips/bus_space_alignstride_chipdep.c: patch
__USE(addr) to fix unused variable warnings.
|
| 1.19.6.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.28.2.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.69 | 13-Mar-2022 |
andvar | s/hander/handler/ and s/hader/header/ in comments and documentation.
|
| 1.68 | 02-Aug-2020 |
skrll | Add all the Cavium Networks cpu ids
|
| 1.67 | 14-Jun-2020 |
tsutsui | Use 32 byte cacheline ops (not 16 byte ones) for R5000 picache. PR/55138
Commented "I think this is bad copy&paste" from skrll@.
No visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.66 | 14-Jun-2020 |
simonb | Support Octeon Cavium cnMIPS I, II and III cores that have various
non-standard cache configurations (in terms of following MIPS spec
for defining cache configurations).
Move (most) Octeon support into a single place.
|
| 1.65 | 14-Jun-2020 |
simonb | Move some "case 0" statements to be first in their switch statements.
|
| 1.64 | 14-Jun-2020 |
simonb | Adjust previous - move consolidated debug printfs _after_ core specific
overrides, not before them.
|
| 1.63 | 14-Jun-2020 |
simonb | Make core specific overrides a bit more readable / scalable (switch
instead of if / else / ...).
Move debug printfs to after core specific overrides in case any config
is updated.
|
| 1.62 | 14-Jun-2020 |
simonb | KNF police - long lines and comments.
|
| 1.61 | 27-Dec-2019 |
msaitoh | s/defintion/definition/ in comment.
|
| 1.60 | 03-Sep-2018 |
riastradh | branches: 1.60.4;
Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.
To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
|
| 1.59 | 03-Mar-2018 |
flxd | branches: 1.59.2; 1.59.4;
Add missing call to mips_dcache_compute_align() affecting "modern" MIPS
(MIPS32{,R2}/MIPS64{,R2}). Thanks jmcneill@; OK skrll@.
|
| 1.58 | 14-May-2017 |
skrll | branches: 1.58.2;
Set mci_{,i}cache_alias_mask for all variants that can have virtual cache
aliases
Set ncolors appropriately
These align to dcache and expect icache aliases to be dealt with by the
pmap directly.
|
| 1.57 | 14-May-2017 |
skrll | Really fix typo that got dcache alias mask set from icache way_mask
|
| 1.56 | 14-May-2017 |
skrll | Fix typo that got dcache alias mask set from icache way_mask
|
| 1.55 | 22-Apr-2017 |
skrll | branches: 1.55.2;
Comment indentation
|
| 1.54 | 04-Sep-2016 |
skrll | Remove old and incorrect comments
|
| 1.53 | 19-Aug-2016 |
skrll | Trailing whitespace
|
| 1.52 | 11-Jul-2016 |
matt | branches: 1.52.2;
Use sdcache routines.
Remove old cache support.
Switch to new cache routines.
|
| 1.51 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.50 | 10-Jun-2015 |
matt | mci_cache_virtual_alias is bool so use true and false, not 1 and 0.
|
| 1.49 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.48 | 24-Nov-2011 |
matt | branches: 1.48.8; 1.48.24; 1.48.26;
Add workaround for RMI cpus (not really needed but good for completeness)
|
| 1.47 | 08-Jun-2011 |
bouyer | branches: 1.47.2;
Make GDIUM build again after matt-nb5-mips64 merge. untested as I don't have
this hardware, but I'll use this as a base for Lemote Fulong support.
|
| 1.46 | 15-Mar-2011 |
matt | branches: 1.46.2;
Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.45 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.44 | 26-Jan-2011 |
uebayasi | Fix build of malta/sbmips.
|
| 1.43 | 26-Jan-2011 |
pooka | Add support for the Extensible MIPS ("eMIPS") platform. The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.
eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing. eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.
NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman. Microsoft Corporation has
donated full copyright to The NetBSD Foundation.
Platform support for eMIPS is the first part of Microsoft's
contribution. The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.
|
| 1.42 | 11-Aug-2009 |
matt | branches: 1.42.4; 1.42.6; 1.42.8;
Fix loongson2 sdcache init.
|
| 1.41 | 11-Aug-2009 |
matt | Flush by increasing way, then increasing addr. flush L1 before L2 (even
though according to the specification it should be needed). Reset
mips_sdcache_size to 0 so we will configure it.
|
| 1.40 | 09-Aug-2009 |
matt | If Loongson2 way size is <= page size, don't enable mips_virtual_alias
|
| 1.39 | 07-Aug-2009 |
matt | Add loongson2 specific cache ops
|
| 1.38 | 06-Aug-2009 |
matt | Use mips3_get_cache_config for Loongson2
|
| 1.37 | 06-Aug-2009 |
matt | Update Loongston. Set colors and mark it as having virtual aliases.
|
| 1.36 | 06-Aug-2009 |
matt | Change MIPS64_LOONGSON2 to MIP3_LOONGSON2 since it's a MIPS3 and not MIPS64.
|
| 1.35 | 06-Aug-2009 |
matt | The Loongson2 secondary cache is unified.
|
| 1.34 | 06-Aug-2009 |
matt | Add Loongson2 support.
|
| 1.33 | 24-Dec-2005 |
perry | branches: 1.33.78; 1.33.96;
__asm__ -> __asm
__const__ -> const
__inline__ -> inline
__volatile__ -> volatile
|
| 1.32 | 29-Nov-2005 |
tsutsui | Use PAGE_MASK macro instead of (PAGE_SIZE - 1).
|
| 1.31 | 10-Nov-2005 |
tsutsui | branches: 1.31.2;
Check possibility of virtual alias correctly in primaly_cache_is_2way case
(though I guess all those CPUs have L1 cache larger than 8KB).
|
| 1.30 | 08-Nov-2005 |
tsutsui | Partially revert change in sys/arch/mips/mips/cache.c rev 1.27,
i.e. override mips_cache_alias_mask and mips_cache_prefer_mask
with values which match MIPS3_MAX_PCACHE_SIZE (32KB), rather than
leave them actual primary virtual indexed cache size (8KB or 16KB).
Also add comments about what the value means there.
I thought the VCE on R4000/R4400 occurred only if actual virtual alias
was detected because there was an article which mentioned that VCE
detection logic was different according to primary cache size and
it looked reasonable. But all other articles I can find later
(http://www.linux-mips.org/archives/linux-mips/1998-05/msg00084.html etc.)
claimes that VCE detection logic always verifies all 3 bits
between vaddr[14:12] and PIdx[2:0] regardless of primary cache size
(i.e. VCE could occur even if there is no actual virtual alias), and
in fact VCED still happens with the mask values adjusted for 16KB L1
but it doesn't with ones for MIPS3_MAX_PCACHE_SIZE on my R4400 news5000.
|
| 1.29 | 04-Nov-2005 |
tsutsui | Check MIPS3_CONFIG_CS and adjust csizebase at runtime on MIPS_R4100 CPUs,
and remove "XXXCDC: THIS MIPS3_4100 SPECIAL CASE SHOULD GO AWAY" part
from cpuregs.h. Tested on gxemul.
BTW, cache.c doesn't have MIPS_RC32364 config which was added
in mips_machdep.c rev 1.101?
|
| 1.28 | 03-Jun-2005 |
he | branches: 1.28.2;
Cast the various uses of cache_noop to the proper function pointer
type of the target instead of (void*). Appeases -Wcast-qual.
|
| 1.27 | 26-Mar-2005 |
tsutsui | Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.26 | 01-Mar-2005 |
sekiya | branches: 1.26.2;
Add a hint variable (mips_sdcache_forceinv, explicitly initialized to zero)
that tells pmap_zero_page() and pmap_copy_page() to unconditionally invalidate
pages for r5k-class CPUs with secondary cache.
This behavior must be explicitly enabled by setting mips_sdcache_forceinv to 1.
This is the last bit of a patch that has been kicked around since 2000 between
rafal@, tsutsui@, and myself.
|
| 1.25 | 13-Dec-2004 |
sekiya | branches: 1.25.2; 1.25.4;
Implement r5k indexed writeback-invalidate, and fix usage of Page_Invalidate_S.
Originally written by rafal@ back in April 2003. Field-tested by many
people since.
(I am not committing the pmap hack at this time; although pmap changes are
necessary to fully address the r5k panic/coma problems, the implementation
needs further thought)
|
| 1.24 | 21-Dec-2003 |
nisimura | Vr4100 and Vr4300 are not capable of having external caches.
|
| 1.23 | 01-Nov-2003 |
shin | cache_r10k.c rev. 1.1 is broken. Because,
1) R10k uses VA0 to select cache ways, but in rev. 1.1, VA14
is used instead.
2) R10k does not support HitWriteBack and should map HitWriteBack
to HitWriteBackInvalidate, but in rev. 1.1, HitWriteBack is not
handled properly.
So, cache_r10k.c rev. 1.1 was replaced by new implementation.
|
| 1.22 | 11-Oct-2003 |
tsutsui | It seems r4k_sdcache_wb_range_NN() function can't handle
R10000 L2 cache (which is 2-way set-associative write-back),
so use r4k_sdcache_wbinv_range_NN() for workaround until someone
implement proper r10k_sdcache_*() ops.
Problem reported by Christopher SEKIYA.
|
| 1.21 | 05-Oct-2003 |
tsutsui | Add R10000 cache ops, written by KIYOHARA Takashi and posted on port-sgimips.
Enabled by options ENABLE_MIPS4_CACHE_R10K for now.
|
| 1.20 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.19 | 08-Mar-2003 |
rafal | branches: 1.19.2;
Protect uses of MIPS_R5000 with #ifndef ENABLE_MIPS_R3NKK in new code just
as the old code does.
|
| 1.18 | 08-Mar-2003 |
rafal | Add support for R5k secondary caches, from code Chris Sekiya sent me a long
time ago, with small tweaks by me. Since the R5k doesn't do VCE, the pmap
still needs to be whacked for R5kSC CPUs to work correctly, but this is a
start.
|
| 1.17 | 07-Feb-2003 |
cgd | Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.16 | 10-Jan-2003 |
rafal | Add the MIPS3_CONFIG_SE (name taken from Rm52xx manual) bit, which is the
external cache enable bit -- this allows software to enable or disable the
(external) L2 cache on the R5k and Rm527x and the (external) L3 cache on
the Rm7k. If the (external) cache is disabled, treat it as if there were
no cache for the purposes of the cache setup code.
Also, update sgimips code to use the new name.
|
| 1.15 | 17-Dec-2002 |
simonb | Add support for caches where the data cache is fully coherent, and
either requires flushing either only when the I cache ops are used
or not at all. Currently only used by MIPS32/MIPS64 cache code.
|
| 1.14 | 24-Nov-2002 |
simonb | New generic way-aware MIPS32/64 range-index cache functions with proper
handling for phyiscally-indexed caches where the way size is greater than
the page size.
These work fine with pass 1 SB1 cores, so g/c those workarounds.
Much thanks to Chris Demetriou for many suggestions and helping me get
my head around all this.
|
| 1.13 | 09-Nov-2002 |
thorpej | Make cache size/mask variables unsigned.
|
| 1.12 | 27-Sep-2002 |
provos | remove trailing \n in panic(). approved perry.
|
| 1.11 | 03-Apr-2002 |
simonb | Use the new 2way mips{32,64} cache ops.
|
| 1.10 | 05-Mar-2002 |
simonb | Add MIPS32/64 cache setup code (from Broadcom Corp).
|
| 1.9 | 30-Jan-2002 |
uch | move TX39 specific cache configuration code to cache.c
|
| 1.8 | 19-Jan-2002 |
shin | add VR4131 cache-op bug workaround code.
we can't use Hit_WriteBack_Invalidate.
|
| 1.7 | 28-Dec-2001 |
shin | branches: 1.7.2;
R4000/R4400 always detects virtual alias as if
primary cache size is 32KB. Actual primary cache size
is ignored wrt VCED/VCEI.
|
| 1.6 | 23-Dec-2001 |
takemura | Added Vr4131 support.
|
| 1.5 | 23-Nov-2001 |
tsutsui | Add 32B/l L1 D/I-cache ops for newer ARC machines.
|
| 1.4 | 19-Nov-2001 |
thorpej | Add mips_dcache_align and mips_dcache_align_mask variables that
contain information suitable for allowing other parts of the kernel
to determine if a memory region is aligned to the largest data cache
line size present in the system.
Add a mips_dcache_compute_align() function which must be called whenever
one of the data cache line size variables is changed, in order to
compute mips_dcache_align and mips_dcache_align_mask.
|
| 1.3 | 18-Nov-2001 |
thorpej | Add 128b/l L2 cache ops.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache.c was initially added on branch thorpej-mips-cache.
|
| 1.1.2.4 | 12-Nov-2001 |
shin | improve R4000/4400 secondary cache support.
add support for secondary cache line sizes 16, 64, 128.
|
| 1.1.2.3 | 10-Nov-2001 |
uch | new cache code for R5900 and playstation2
|
| 1.1.2.2 | 30-Oct-2001 |
uch | make this compile with TX39
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New MIPS cache primitives and code to configure which ones are used.
|
| 1.2.2.9 | 15-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.2.2.8 | 19-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.2.2.7 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.2.2.6 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.5 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.4 | 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.3 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.2.2.2 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.1 | 14-Nov-2001 |
nathanw | file cache.c was added on branch nathanw_sa on 2002-02-28 04:10:43 +0000
|
| 1.7.2.6 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.7.2.5 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.7.2.4 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.7.2.3 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.7.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.7.2.1 | 28-Dec-2001 |
thorpej | file cache.c was added on branch kqueue on 2002-01-10 19:46:03 +0000
|
| 1.19.2.8 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.19.2.7 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.19.2.6 | 01-Apr-2005 |
skrll | Sync with HEAD.
|
| 1.19.2.5 | 04-Mar-2005 |
skrll | Sync with HEAD.
Hi Perry!
|
| 1.19.2.4 | 18-Dec-2004 |
skrll | Sync with HEAD.
|
| 1.19.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.19.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.19.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.25.4.2 | 26-Mar-2005 |
yamt | sync with head.
|
| 1.25.4.1 | 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.25.2.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.26.2.3 | 21-Nov-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #961):
sys/arch/mips/mips/cache.c: revision 1.31
Check possibility of virtual alias correctly in primaly_cache_is_2way case
(though I guess all those CPUs have L1 cache larger than 8KB).
|
| 1.26.2.2 | 21-Nov-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #961):
sys/arch/mips/mips/cache.c: revision 1.30
Partially revert change in sys/arch/mips/mips/cache.c rev 1.27,
i.e. override mips_cache_alias_mask and mips_cache_prefer_mask
with values which match MIPS3_MAX_PCACHE_SIZE (32KB), rather than
leave them actual primary virtual indexed cache size (8KB or 16KB).
Also add comments about what the value means there.
I thought the VCE on R4000/R4400 occurred only if actual virtual alias
was detected because there was an article which mentioned that VCE
detection logic was different according to primary cache size and
it looked reasonable. But all other articles I can find later
(http://www.linux-mips.org/archives/linux-mips/1998-05/msg00084.html etc.)
claimes that VCE detection logic always verifies all 3 bits
between vaddr[14:12] and PIdx[2:0] regardless of primary cache size
(i.e. VCE could occur even if there is no actual virtual alias), and
in fact VCED still happens with the mask values adjusted for 16KB L1
but it doesn't with ones for MIPS3_MAX_PCACHE_SIZE on my R4400 news5000.
|
| 1.26.2.1 | 21-Nov-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #961):
sys/arch/mips/mips/cache.c: revision 1.27
sys/arch/mips/include/cache.h: revision 1.8
sys/arch/mips/mips/pmap.c: revision 1.158
sys/arch/mips/mips/vm_machdep.c: revision 1.106
sys/arch/mips/mips/mem.c: revision 1.30
sys/arch/mips/include/pmap.h: revision 1.47
Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.28.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.31.2.1 | 29-Nov-2005 |
yamt | sync with head.
|
| 1.33.96.12 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.33.96.11 | 12-Jan-2012 |
matt | Add an optimization for UP system with non-virtually tagged caches (which are
most of them these days).
If a page needs to be have an icache_sync performed and the page has a direct
map alias (XKPHYS or KSEG0), then don't do an index op; instead do a range op
on the XKPHYS or KSEG0 address. This results in unneeded fewer cache line
invalidations.
|
| 1.33.96.10 | 27-Dec-2011 |
matt | Use MIPS_*CACHE_VIRTUAL_ALIAS instead of mci->mci_*
|
| 1.33.96.9 | 27-Dec-2011 |
matt | Rework (rewrite) the cache code for MIPS32/MIPS64. Use an assembly stub
for generate the cache instructions. Add some more intern routines so that
cache_mipsNN.c only had the "generic" all/index routines.
|
| 1.33.96.8 | 23-Dec-2011 |
matt | Add code to deal SDcache settings in CFG2.
Add support for CFG7 handling for MTI cores.
Cleanup cache alias handling.
|
| 1.33.96.7 | 04-Nov-2011 |
matt | For RMI, use wbinv for wb ops since there is no wb.
|
| 1.33.96.6 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.33.96.5 | 25-May-2011 |
matt | Make uvm_map recognize UVM_FLAG_COLORMATCH which tells uvm_map that the
'align' argument specifies the starting color of the KVA range to be returned.
When calling uvm_km_alloc with UVM_KMF_VAONLY, also specify the starting
color of the kva range returned (UMV_KMF_COLORMATCH) and pass those to
uvm_map.
In uvm_pglistalloc, make sure the pages being returned have sequentially
advancing colors (so they can be mapped in a contiguous address range).
Add a few missing UVM_FLAG_COLORMATCH flags to uvm_pagealloc calls.
Make the socket and pipe loan color-safe.
Make the mips pmap enforce strict page color (color(VA) == color(PA)).
|
| 1.33.96.4 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.33.96.3 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.33.96.2 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.33.96.1 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.33.78.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.42.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.42.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.42.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.42.4.3 | 12-Jun-2011 |
rmind | sync with head
|
| 1.42.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.42.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.46.2.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.47.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.48.26.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.48.26.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.48.26.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.48.26.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.48.24.1 | 06-Mar-2018 |
martin | Pull up following revision(s) (requested by flxd in ticket #1578):
sys/arch/mips/mips/cache.c: revision 1.59
Add missing call to mips_dcache_compute_align() affecting "modern" MIPS
(MIPS32{,R2}/MIPS64{,R2}). Thanks jmcneill@; OK skrll@.
|
| 1.48.8.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.52.2.1 | 26-Apr-2017 |
pgoyette | Sync with HEAD
|
| 1.55.2.1 | 19-May-2017 |
pgoyette | Resolve conflicts from previous merge (all resulting from $NetBSD
keywork expansion)
|
| 1.58.2.1 | 06-Mar-2018 |
martin | Pull up following revision(s) (requested by flxd in ticket #601):
sys/arch/mips/mips/cache.c: revision 1.59
Add missing call to mips_dcache_compute_align() affecting "modern" MIPS
(MIPS32{,R2}/MIPS64{,R2}). Thanks jmcneill@; OK skrll@.
|
| 1.59.4.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.59.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.59.2.1 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.60.4.1 | 20-Jun-2020 |
martin | Pull up following revision(s) (requested by tsutsui in ticket #964):
sys/arch/mips/mips/cache.c: revision 1.67
Use 32 byte cacheline ops (not 16 byte ones) for R5000 picache. PR/55138
Commented "I think this is bad copy&paste" from skrll@.
No visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.5 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.4 | 08-Jun-2011 |
bouyer | branches: 1.4.12; 1.4.30;
Make GDIUM build again after matt-nb5-mips64 merge. untested as I don't have
this hardware, but I'll use this as a base for Lemote Fulong support.
|
| 1.3 | 11-Aug-2009 |
matt | branches: 1.3.2; 1.3.6; 1.3.12;
Flush by increasing way, then increasing addr. flush L1 before L2 (even
though according to the specification it should be needed). Reset
mips_sdcache_size to 0 so we will configure it.
|
| 1.2 | 07-Aug-2009 |
matt | Clean up a bit. No reason to use 4way on icache ops (it clears all ways).
|
| 1.1 | 07-Aug-2009 |
matt | Add loongson2 specific cache ops
|
| 1.3.12.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.3.6.1 | 12-Jun-2011 |
rmind | sync with head
|
| 1.3.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.3.2.1 | 11-Aug-2009 |
yamt | file cache_ls2.c was added on branch yamt-nfs-mp on 2009-08-19 18:46:30 +0000
|
| 1.4.30.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.4.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.16 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.15 | 20-May-2015 |
matt | Don't .set mips64 if we are already mips64
|
| 1.14 | 29-Apr-2011 |
matt | branches: 1.14.14; 1.14.32;
simplify. Don't limit data way size to a page.
|
| 1.13 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.12 | 14-Dec-2009 |
matt | branches: 1.12.4; 1.12.6; 1.12.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.11 | 26-Aug-2006 |
matt | branches: 1.11.60; 1.11.78;
If we are _LP64, we must be mips64, not mips32.
|
| 1.10 | 24-Dec-2005 |
perry | branches: 1.10.4; 1.10.8;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.9 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.8 | 15-Jul-2003 |
lukem | branches: 1.8.16;
__KERNEL_RCSID()
|
| 1.7 | 17-Dec-2002 |
simonb | branches: 1.7.6;
Add support for caches where the data cache is fully coherent, and
either requires flushing either only when the I cache ops are used
or not at all. Currently only used by MIPS32/MIPS64 cache code.
|
| 1.6 | 24-Nov-2002 |
simonb | New generic way-aware MIPS32/64 range-index cache functions with proper
handling for phyiscally-indexed caches where the way size is greater than
the page size.
These work fine with pass 1 SB1 cores, so g/c those workarounds.
Much thanks to Chris Demetriou for many suggestions and helping me get
my head around all this.
|
| 1.5 | 15-Nov-2002 |
simonb | Add a hack to mipsNN_pdcache_wbinv_range_index_32_4way() so that we
use the index ops at a offset of the page size as well, controlled by
an MIPS64_SB1 check. The SB1 D-cache way size is physically indexed
and twice as big as the page size (4k), so we weren't flushing all the
addresses we needed too.
XXX: This is kinda gross; will be cleaned up and made more generic soon.
There are still other SB1-specific issues to be cleaned up too...
|
| 1.4 | 10-Nov-2002 |
simonb | Make sure we use index ops (instead of hit ops) in the range index
functions.
Fix typos in the cache_r4k_op_32_4way_load_off macro.
Both problems reported by Chris Demetriou.
|
| 1.3 | 08-Nov-2002 |
cgd | Calculate end virtual address for cache ops before chopping low bits
(line mask) off of starting address. Otherwise, could miss the final
line that the ops should have been operating on. Reviewed by simonb.
|
| 1.2 | 03-Apr-2002 |
simonb | Include 2way cache ops for mips{32,64} CPUs.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.4; 1.1.8;
Cache ops for MIPS32/64 cpus.
|
| 1.1.8.6 | 19-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.1.8.5 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.1.8.4 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.8.3 | 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.1.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.8.1 | 05-Mar-2002 |
nathanw | file cache_mipsNN.c was added on branch nathanw_sa on 2002-04-01 07:41:01 +0000
|
| 1.1.4.3 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.1 | 05-Mar-2002 |
jdolecek | file cache_mipsNN.c was added on branch kqueue on 2002-03-16 15:58:37 +0000
|
| 1.7.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.7.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.7.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.8.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.8.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.10.8.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.10.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.11.78.8 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.11.78.7 | 27-Dec-2011 |
matt | Rework (rewrite) the cache code for MIPS32/MIPS64. Use an assembly stub
for generate the cache instructions. Add some more intern routines so that
cache_mipsNN.c only had the "generic" all/index routines.
|
| 1.11.78.6 | 24-Dec-2011 |
matt | Rototill. Commonize code when possible.
|
| 1.11.78.5 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.11.78.4 | 11-May-2010 |
matt | If icache_sync_index_range is > way size, limit to way size.
|
| 1.11.78.3 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.11.78.2 | 05-Sep-2009 |
matt | assign vaddr_t to unsigned int makes LP64 code very unhappy.
|
| 1.11.78.1 | 20-Aug-2009 |
matt | Default to mips64 mode unless compiled O32, then default to mips32.
|
| 1.11.60.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.12.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.12.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.12.4.2 | 31-May-2011 |
rmind | sync with head
|
| 1.12.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.14.32.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.14.32.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.14.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4 | 06-Jun-2020 |
simonb | Increase readability by reducing #ifdef using a macro.
|
| 1.3 | 13-Apr-2019 |
maya | Remove unused declaration of __BIT and __BITS
it's defined already, tested with #error.
|
| 1.2 | 11-Jul-2016 |
matt | branches: 1.2.16; 1.2.20;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1 | 29-Apr-2015 |
hikaru | branches: 1.1.2;
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.1.2.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 | 29-Apr-2015 |
skrll | file cache_octeon.c was added on branch nick-nhusb on 2015-06-06 14:40:02 +0000
|
| 1.2.20.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2.16.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.16.1 | 11-Jul-2016 |
jdolecek | file cache_octeon.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.8 | 13-Jul-2016 |
macallan | make this compile again
|
| 1.7 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.6 | 09-Jun-2015 |
macallan | yet another cpuregs.h
|
| 1.5 | 20-Feb-2011 |
matt | branches: 1.5.14; 1.5.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.4 | 24-Dec-2005 |
perry | branches: 1.4.96; 1.4.100; 1.4.106; 1.4.108;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.3 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.2 | 01-Nov-2003 |
shin | branches: 1.2.4; 1.2.18;
cache_r10k.c rev. 1.1 is broken. Because,
1) R10k uses VA0 to select cache ways, but in rev. 1.1, VA14
is used instead.
2) R10k does not support HitWriteBack and should map HitWriteBack
to HitWriteBackInvalidate, but in rev. 1.1, HitWriteBack is not
handled properly.
So, cache_r10k.c rev. 1.1 was replaced by new implementation.
|
| 1.1 | 05-Oct-2003 |
tsutsui | Add R10000 cache ops, written by KIYOHARA Takashi and posted on port-sgimips.
Enabled by options ENABLE_MIPS4_CACHE_R10K for now.
|
| 1.2.18.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.4.4 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.4.3 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.4.2 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.2.4.1 | 01-Nov-2003 |
skrll | file cache_r10k.c was added on branch ktrace-lwp on 2004-08-03 10:37:47 +0000
|
| 1.4.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.4.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.4.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.4.96.2 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.4.96.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.5.32.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.5.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.5.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.6 | 09-Jun-2015 |
macallan | yet another cpuregs.h
|
| 1.5 | 20-Feb-2011 |
matt | branches: 1.5.14; 1.5.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.4 | 11-Dec-2005 |
christos | branches: 1.4.96; 1.4.100; 1.4.106; 1.4.108;
merge ktrace-lwp.
|
| 1.3 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2; 1.2.4; 1.2.20;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache_r3k.c was initially added on branch thorpej-mips-cache.
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New style cache operations for R2000/R3000-style caches.
|
| 1.2.20.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.20.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.20.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.2.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.2.4.1 | 14-Nov-2001 |
thorpej | file cache_r3k.c was added on branch kqueue on 2002-01-10 19:46:04 +0000
|
| 1.2.2.2 | 14-Nov-2001 |
thorpej | Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.2.2.1 | 14-Nov-2001 |
thorpej | file cache_r3k.c was added on branch nathanw_sa on 2001-11-14 18:26:24 +0000
|
| 1.4.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.4.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.4.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.4.96.2 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.4.96.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.5.32.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.5.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.5.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6 | 08-Apr-2022 |
andvar | fix various typos, mainly in comments, but also log messages, docs, game text.
|
| 1.5 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.4 | 11-Dec-2005 |
christos | branches: 1.4.78; 1.4.96;
merge ktrace-lwp.
|
| 1.3 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2; 1.2.4; 1.2.20;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache_r3k_subr.S was initially added on branch thorpej-mips-cache.
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New style cache operations for R2000/R3000-style caches.
|
| 1.2.20.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.20.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.20.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.2.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.2.4.1 | 14-Nov-2001 |
thorpej | file cache_r3k_subr.S was added on branch kqueue on 2002-01-10 19:46:04 +0000
|
| 1.2.2.2 | 14-Nov-2001 |
thorpej | Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.2.2.1 | 14-Nov-2001 |
thorpej | file cache_r3k_subr.S was added on branch nathanw_sa on 2001-11-14 18:26:24 +0000
|
| 1.4.96.1 | 07-Sep-2009 |
matt | Need a #include "assym.h"
|
| 1.4.78.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.14 | 11-Jul-2016 |
matt | Use sdcache routines.
Remove old cache support.
Switch to new cache routines.
|
| 1.13 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.12 | 09-Jun-2015 |
macallan | include cpuregs.h
|
| 1.11 | 20-Feb-2011 |
matt | branches: 1.11.14; 1.11.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.10 | 24-Dec-2005 |
perry | branches: 1.10.96; 1.10.100; 1.10.106; 1.10.108;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.9 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.8 | 15-Jul-2003 |
lukem | branches: 1.8.16;
__KERNEL_RCSID()
|
| 1.7 | 07-Nov-2002 |
cgd | branches: 1.7.6;
fix errors in calculating the ending VA to use in r4k_icache_sync_range_16
and r5k_icache_sync_range_32. (reviewed by thorpej.)
|
| 1.6 | 23-Nov-2001 |
tsutsui | branches: 1.6.2;
Add 32B/l L1 D/I-cache ops for newer ARC machines.
|
| 1.5 | 20-Nov-2001 |
shin | improve r4k_sdcache_XXX_generic().
|
| 1.4 | 18-Nov-2001 |
thorpej | r4k_sdcache_wbinv_range_index_32(): fix a typo (16 -> 32).
|
| 1.3 | 18-Nov-2001 |
thorpej | Add 128b/l L2 cache ops.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache_r4k.c was initially added on branch thorpej-mips-cache.
|
| 1.1.2.3 | 12-Nov-2001 |
thorpej | icache_sync_range_index: wbinv the dcache before reducing the virtual
address to an index (in the event that the significant index bits for
the dcache are different than those for the icache).
|
| 1.1.2.2 | 12-Nov-2001 |
shin | improve R4000/4400 secondary cache support.
add support for secondary cache line sizes 16, 64, 128.
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New style cache operations for R4000/R4400-style caches.
|
| 1.2.2.3 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.2 | 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.1 | 14-Nov-2001 |
nathanw | file cache_r4k.c was added on branch nathanw_sa on 2002-04-17 00:03:47 +0000
|
| 1.6.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.6.2.1 | 23-Nov-2001 |
thorpej | file cache_r4k.c was added on branch kqueue on 2002-01-10 19:46:05 +0000
|
| 1.7.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.7.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.7.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.8.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.10.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.10.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.10.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.10.96.2 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.10.96.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.11.32.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.11.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.11.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1 | 11-Jul-2016 |
matt | branches: 1.1.4; 1.1.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 11-Jul-2016 |
jdolecek | file cache_r4k_pcache128.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.1.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.4.1 | 11-Jul-2016 |
skrll | file cache_r4k_pcache128.S was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.2 | 11-Jul-2016 |
matt | branches: 1.2.4; 1.2.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1 | 27-Dec-2011 |
matt | branches: 1.1.2;
file cache_r4k_pcache16.S was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 27-Dec-2011 |
matt | Rework (rewrite) the cache code for MIPS32/MIPS64. Use an assembly stub
for generate the cache instructions. Add some more intern routines so that
cache_mipsNN.c only had the "generic" all/index routines.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 11-Jul-2016 |
jdolecek | file cache_r4k_pcache16.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.2.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.4.1 | 11-Jul-2016 |
skrll | file cache_r4k_pcache16.S was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.2 | 11-Jul-2016 |
matt | branches: 1.2.4; 1.2.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1 | 27-Dec-2011 |
matt | branches: 1.1.2;
file cache_r4k_pcache32.S was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 27-Dec-2011 |
matt | Rework (rewrite) the cache code for MIPS32/MIPS64. Use an assembly stub
for generate the cache instructions. Add some more intern routines so that
cache_mipsNN.c only had the "generic" all/index routines.
|
| 1.2.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 | 11-Jul-2016 |
jdolecek | file cache_r4k_pcache32.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.2.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.4.1 | 11-Jul-2016 |
skrll | file cache_r4k_pcache32.S was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.1 | 11-Jul-2016 |
matt | branches: 1.1.4; 1.1.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 11-Jul-2016 |
jdolecek | file cache_r4k_pcache64.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.1.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.4.1 | 11-Jul-2016 |
skrll | file cache_r4k_pcache64.S was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.1 | 11-Jul-2016 |
matt | branches: 1.1.4; 1.1.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 11-Jul-2016 |
jdolecek | file cache_r4k_scache128.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.1.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.4.1 | 11-Jul-2016 |
skrll | file cache_r4k_scache128.S was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.1 | 11-Jul-2016 |
matt | branches: 1.1.4; 1.1.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 11-Jul-2016 |
jdolecek | file cache_r4k_scache16.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.1.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.4.1 | 11-Jul-2016 |
skrll | file cache_r4k_scache16.S was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.1 | 11-Jul-2016 |
matt | branches: 1.1.4; 1.1.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 11-Jul-2016 |
jdolecek | file cache_r4k_scache32.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.1.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.4.1 | 11-Jul-2016 |
skrll | file cache_r4k_scache32.S was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.1 | 11-Jul-2016 |
matt | branches: 1.1.4; 1.1.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1.18.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.18.1 | 11-Jul-2016 |
jdolecek | file cache_r4k_scache64.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.1.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.1.4.1 | 11-Jul-2016 |
skrll | file cache_r4k_scache64.S was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.3 | 27-Apr-2017 |
skrll | branches: 1.3.8;
Typo in comment
|
| 1.2 | 11-Jul-2016 |
matt | branches: 1.2.4; 1.2.10;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1 | 27-Dec-2011 |
matt | branches: 1.1.2;
file cache_r4k_subr.S was initially added on branch matt-nb5-mips64.
|
| 1.1.2.4 | 09-Jul-2012 |
matt | Add a .set mips32 so that O32 kernels can compile.
|
| 1.1.2.3 | 16-Feb-2012 |
matt | PTR_DSRL -> PTR_DSLL typo
|
| 1.1.2.2 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.1.2.1 | 27-Dec-2011 |
matt | Rework (rewrite) the cache code for MIPS32/MIPS64. Use an assembly stub
for generate the cache instructions. Add some more intern routines so that
cache_mipsNN.c only had the "generic" all/index routines.
|
| 1.2.10.1 | 02-May-2017 |
pgoyette | Sync with HEAD - tag prg-localcount2-base1
|
| 1.2.4.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.2.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.4.1 | 11-Jul-2016 |
skrll | file cache_r4k_subr.S was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.3.8.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.8.1 | 27-Apr-2017 |
jdolecek | file cache_r4k_subr.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.7 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.6 | 28-Apr-2008 |
martin | branches: 1.6.18; 1.6.22; 1.6.28; 1.6.30;
Remove clause 3 and 4 from TNF licenses
|
| 1.5 | 25-Nov-2005 |
simonb | branches: 1.5.74; 1.5.76; 1.5.78;
More KNF.
|
| 1.4 | 15-Jul-2003 |
lukem | branches: 1.4.16; 1.4.24;
__KERNEL_RCSID()
|
| 1.3 | 05-Mar-2002 |
simonb | branches: 1.3.14;
Adjust for 5900 include file changes.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2; 1.2.4;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 10-Nov-2001 |
uch | branches: 1.1.2;
file cache_r5900.c was initially added on branch thorpej-mips-cache.
|
| 1.1.2.1 | 10-Nov-2001 |
uch | new cache code for R5900 and playstation2
|
| 1.2.4.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.2.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.2.4.1 | 14-Nov-2001 |
thorpej | file cache_r5900.c was added on branch kqueue on 2002-01-10 19:46:05 +0000
|
| 1.2.2.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.2.2.1 | 14-Nov-2001 |
nathanw | file cache_r5900.c was added on branch nathanw_sa on 2002-04-01 07:41:01 +0000
|
| 1.3.14.4 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.3.14.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.3.14.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.3.14.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.4.24.1 | 29-Nov-2005 |
yamt | sync with head.
|
| 1.4.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.5.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.5.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.5.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.6.30.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.6.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.22.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.6.18.1 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.21 | 14-Jun-2020 |
tsutsui | Use proper "page" alignments for R5k Page Invalidate(S) op. PR/55139
According to NEC "User's Manual VR5000, VR1000 64-BIT MICROPROCESSOR
INSTRUCTION" (U12754EJ1V0UMJ1), R5000 Page Invalidate (S) op does
"a page invalidate by doing a burst of 128 line invalidates to
the secondary cache at the page specified by the effective address
generated by the CACHE instruction, which must be page aligned."
This description looks a bit confusing, but "page" used here
implies fixed 32 byte cacheline * 128 lines == 4096 bytes,
not our variable "PAGE_SIZE" used in VM paging ops. Note
the current default PAGE_SIZE for MIPS3 has been changed to 8192.
While here, also define and use proper macro for the "page" and CACHEOP
arg for the R5k Page_Invalidate_S op, as the manual also describes
the cache op field 10111 as "Page Invalidate" for the secondary cache.
No visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.20 | 27-Apr-2017 |
skrll | branches: 1.20.14;
Typo in comment
|
| 1.19 | 10-Oct-2016 |
skrll | branches: 1.19.6;
Trailing whitespace
|
| 1.18 | 10-Oct-2016 |
skrll | vaddr_t -> register_t in range cache ops
|
| 1.17 | 08-Oct-2016 |
macallan | - don't clear KX when disabling interrupts
- sign extend addresses as needed
- use PAGE_SIZE instead of blindly assuming 4KB
now n32 kernels work again on my R5k SGIs
thanks to skrll@ for helping me with this
|
| 1.16 | 11-Jul-2016 |
matt | branches: 1.16.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.15 | 29-Apr-2011 |
matt | branches: 1.15.14; 1.15.32;
whitespace cleanup
|
| 1.14 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.13 | 13-Nov-2010 |
uebayasi | branches: 1.13.2; 1.13.4;
Don't redefine famous round_page() / trunc_page() locally.
|
| 1.12 | 24-Dec-2005 |
perry | branches: 1.12.96; 1.12.98; 1.12.100;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.11 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.10 | 13-Dec-2004 |
sekiya | branches: 1.10.10;
Implement r5k indexed writeback-invalidate, and fix usage of Page_Invalidate_S.
Originally written by rafal@ back in April 2003. Field-tested by many
people since.
(I am not committing the pmap hack at this time; although pmap changes are
necessary to fully address the r5k panic/coma problems, the implementation
needs further thought)
|
| 1.9 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.8 | 08-Mar-2003 |
rafal | branches: 1.8.2;
Add support for R5k secondary caches, from code Chris Sekiya sent me a long
time ago, with small tweaks by me. Since the R5k doesn't do VCE, the pmap
still needs to be whacked for R5kSC CPUs to work correctly, but this is a
start.
|
| 1.7 | 17-Feb-2003 |
simonb | Make whitespace in multi-way loops line up a bit nicer.
|
| 1.6 | 07-Nov-2002 |
cgd | fix errors in calculating the ending VA to use in r4k_icache_sync_range_16
and r5k_icache_sync_range_32. (reviewed by thorpej.)
|
| 1.5 | 19-Jan-2002 |
shin | add VR4131 cache-op bug workaround code.
we can't use Hit_WriteBack_Invalidate.
|
| 1.4 | 07-Jan-2002 |
shin | branches: 1.4.2;
fix pasto.
s/trunc_line/trunc_line16/
|
| 1.3 | 23-Dec-2001 |
takemura | Added Vr4131 support.
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache_r5k.c was initially added on branch thorpej-mips-cache.
|
| 1.1.2.4 | 14-Nov-2001 |
thorpej | Be more conservative with interrupt blocking in the R4600 ops
that require chip bug work-arounds.
XXX Should probably just consider using Index ops where feasible on
the buggy R4600s.
|
| 1.1.2.3 | 12-Nov-2001 |
thorpej | icache_sync_range_index: wbinv the dcache before reducing the virtual
address to an index (in the event that the significant index bits for
the dcache are different than those for the icache).
|
| 1.1.2.2 | 11-Nov-2001 |
shin | * fix size calculation.
* add missing cache operation for 2nd way.
* fix pasto (s/CACHEOP_R4K_HIT_WB_INV/CACHEOP_R4K_INDEX_WB_INV/).
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New style cache operations for R4600/R5000-style caches.
|
| 1.2.2.5 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.4 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.3 | 01-Feb-2002 |
gmcgarry | Pull-up cache ops from -current
|
| 1.2.2.2 | 11-Jan-2002 |
nathanw | More catchup.
|
| 1.2.2.1 | 14-Nov-2001 |
nathanw | file cache_r5k.c was added on branch nathanw_sa on 2002-01-11 23:38:39 +0000
|
| 1.4.2.3 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.4.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.4.2.1 | 07-Jan-2002 |
thorpej | file cache_r5k.c was added on branch kqueue on 2002-01-10 19:46:05 +0000
|
| 1.8.2.4 | 18-Dec-2004 |
skrll | Sync with HEAD.
|
| 1.8.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.8.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.8.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.10.10.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.12.100.2 | 31-May-2011 |
rmind | sync with head
|
| 1.12.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.12.98.1 | 16-Nov-2010 |
uebayasi | Sync with HEAD.
|
| 1.12.96.3 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.12.96.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.12.96.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.13.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.13.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.15.32.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.15.32.2 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.15.32.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.15.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.16.2.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.19.6.1 | 02-May-2017 |
pgoyette | Sync with HEAD - tag prg-localcount2-base1
|
| 1.20.14.1 | 20-Jun-2020 |
martin | Pull up following revision(s) (requested by tsutsui in ticket #965):
sys/arch/mips/include/cache_r5k.h: revision 1.5
sys/arch/mips/mips/cache_r5k_subr.S: revision 1.4
sys/arch/mips/mips/cache_r5k.c: revision 1.21
Use proper "page" alignments for R5k Page Invalidate(S) op. PR/55139
According to NEC "User's Manual VR5000, VR1000 64-BIT MICROPROCESSOR
INSTRUCTION" (U12754EJ1V0UMJ1), R5000 Page Invalidate (S) op does
"a page invalidate by doing a burst of 128 line invalidates to
the secondary cache at the page specified by the effective address
generated by the CACHE instruction, which must be page aligned."
This description looks a bit confusing, but "page" used here
implies fixed 32 byte cacheline * 128 lines == 4096 bytes,
not our variable "PAGE_SIZE" used in VM paging ops. Note
the current default PAGE_SIZE for MIPS3 has been changed to 8192.
While here, also define and use proper macro for the "page" and CACHEOP
arg for the R5k Page_Invalidate_S op, as the manual also describes
the cache op field 10111 as "Page Invalidate" for the secondary cache.
No visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.5 | 08-Apr-2022 |
andvar | fix various typos, mainly in comments, but also log messages, docs, game text.
|
| 1.4 | 14-Jun-2020 |
tsutsui | Use proper "page" alignments for R5k Page Invalidate(S) op. PR/55139
According to NEC "User's Manual VR5000, VR1000 64-BIT MICROPROCESSOR
INSTRUCTION" (U12754EJ1V0UMJ1), R5000 Page Invalidate (S) op does
"a page invalidate by doing a burst of 128 line invalidates to
the secondary cache at the page specified by the effective address
generated by the CACHE instruction, which must be page aligned."
This description looks a bit confusing, but "page" used here
implies fixed 32 byte cacheline * 128 lines == 4096 bytes,
not our variable "PAGE_SIZE" used in VM paging ops. Note
the current default PAGE_SIZE for MIPS3 has been changed to 8192.
While here, also define and use proper macro for the "page" and CACHEOP
arg for the R5k Page_Invalidate_S op, as the manual also describes
the cache op field 10111 as "Page Invalidate" for the secondary cache.
No visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.3 | 20-Feb-2011 |
matt | branches: 1.3.60;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 08-Mar-2003 |
rafal | branches: 1.1.108; 1.1.126;
Add support for R5k secondary caches, from code Chris Sekiya sent me a long
time ago, with small tweaks by me. Since the R5k doesn't do VCE, the pmap
still needs to be whacked for R5kSC CPUs to work correctly, but this is a
start.
|
| 1.1.126.3 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.1.126.2 | 09-Sep-2009 |
matt | Make LP64 safe.
|
| 1.1.126.1 | 07-Sep-2009 |
matt | Need a #include "assym.h"
|
| 1.1.108.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.60.1 | 20-Jun-2020 |
martin | Pull up following revision(s) (requested by tsutsui in ticket #965):
sys/arch/mips/include/cache_r5k.h: revision 1.5
sys/arch/mips/mips/cache_r5k_subr.S: revision 1.4
sys/arch/mips/mips/cache_r5k.c: revision 1.21
Use proper "page" alignments for R5k Page Invalidate(S) op. PR/55139
According to NEC "User's Manual VR5000, VR1000 64-BIT MICROPROCESSOR
INSTRUCTION" (U12754EJ1V0UMJ1), R5000 Page Invalidate (S) op does
"a page invalidate by doing a burst of 128 line invalidates to
the secondary cache at the page specified by the effective address
generated by the CACHE instruction, which must be page aligned."
This description looks a bit confusing, but "page" used here
implies fixed 32 byte cacheline * 128 lines == 4096 bytes,
not our variable "PAGE_SIZE" used in VM paging ops. Note
the current default PAGE_SIZE for MIPS3 has been changed to 8192.
While here, also define and use proper macro for the "page" and CACHEOP
arg for the R5k Page_Invalidate_S op, as the manual also describes
the cache op field 10111 as "Page Invalidate" for the secondary cache.
No visible regression on Cobalt Qube 2700 (Rm5230) through
whole installation using netbsd-9 based Cobalt RestoreCD/USB.
|
| 1.9 | 06-Nov-2021 |
msaitoh | Fix typo in comment. s/phyiscally/physically/
|
| 1.8 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.7 | 20-Feb-2011 |
matt | branches: 1.7.14; 1.7.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.6 | 26-Jan-2008 |
tsutsui | branches: 1.6.28; 1.6.32; 1.6.38; 1.6.40;
Make these TX39xx stuff compile without "-mips2" option.
TX39xx has a sync instruction, but it doesn't support all mips2 instructions.
|
| 1.5 | 24-Dec-2005 |
perry | branches: 1.5.24; 1.5.40; 1.5.50; 1.5.56;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.4 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.3 | 15-Jul-2003 |
lukem | branches: 1.3.16;
__KERNEL_RCSID()
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2; 1.2.4; 1.2.20;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache_tx39.c was initially added on branch thorpej-mips-cache.
|
| 1.1.2.2 | 30-Oct-2001 |
uch | make this compile with TX39
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New style cache operations for TX39-style caches. XXX This is not
yet complete.
|
| 1.2.20.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.20.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.20.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.2.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.2.4.1 | 14-Nov-2001 |
thorpej | file cache_tx39.c was added on branch kqueue on 2002-01-10 19:46:06 +0000
|
| 1.2.2.2 | 14-Nov-2001 |
thorpej | Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.2.2.1 | 14-Nov-2001 |
thorpej | file cache_tx39.c was added on branch nathanw_sa on 2001-11-14 18:26:24 +0000
|
| 1.3.16.2 | 04-Feb-2008 |
yamt | sync with head.
|
| 1.3.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.5.56.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.5.50.1 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.5.40.1 | 03-Jun-2008 |
skrll | Sync with netbsd-4.
|
| 1.5.24.1 | 22-Feb-2008 |
bouyer | Pull up following revision(s) (requested by tsutsui in ticket #1065):
sys/arch/mips/mips/locore_mips1.S: revision 1.64
sys/arch/hpcmips/conf/TX3912: revision 1.68
sys/arch/hpcmips/conf/TX3922: revision 1.80
sys/arch/hpcmips/conf/GENERIC: revision 1.199
sys/arch/hpcmips/tx/tx39power.c: revision 1.18
sys/arch/mips/mips/cache_tx39.c: revision 1.6
Make these TX39xx stuff compile without "-mips2" option.
TX39xx has a sync instruction, but it doesn't support all mips2 instructions.
Add "-mdivide-breaks" to CPUFLAGS in GENERIC, and
use "-march=r3900" for CPUFLAGS in TX3912 and TX3922.
|
| 1.6.40.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.6.38.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.32.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.6.28.2 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.6.28.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.7.32.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.7.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 14-Nov-2001 |
thorpej | branches: 1.2.2; 1.2.4; 1.2.122; 1.2.124; 1.2.126;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.1 | 24-Oct-2001 |
thorpej | branches: 1.1.2;
file cache_tx39_subr.S was initially added on branch thorpej-mips-cache.
|
| 1.1.2.2 | 30-Oct-2001 |
uch | make this compile with TX39
|
| 1.1.2.1 | 24-Oct-2001 |
thorpej | New style cache operations for TX39-style caches. XXX This is not
yet complete.
|
| 1.2.126.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.2.124.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.122.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.2.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.2.4.1 | 14-Nov-2001 |
thorpej | file cache_tx39_subr.S was added on branch kqueue on 2002-01-10 19:46:06 +0000
|
| 1.2.2.2 | 14-Nov-2001 |
thorpej | Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.2.2.1 | 14-Nov-2001 |
thorpej | file cache_tx39_subr.S was added on branch nathanw_sa on 2001-11-14 18:26:24 +0000
|
| 1.23 | 24-Apr-2025 |
riastradh | mips: Fix compat_13_sys_sigreturn locking.
This had been broken back in rev. 1.13.20.1 (on the newlock2 branch,
merged into HEAD as 1.14) in 2007.
Should fix:
lib/libc/setjmp/t_setjmp (261/985): 10 test cases
_longjmp_zero: [0.078125s] Passed.
_setjmp: [0.093750s] Passed.
compat13_longjmp_zero: [ 7875.3945352] panic: kernel diagnostic assertion "mutex_owned(l->l_proc->p_lock)" failed: file "/tmp/build/2025.04.24.01.52.38-pmax/src/sys/kern/sys_sig.c", line 590
[ 7875.3984415] cpu0: Begin traceback...
[ 7875.4062540] pid -2135532376 not found
[ 7875.4140665] cpu0: End traceback...
[ 7875.6093790] 0x80b65c90: cpu_reboot+0x3c (0x80b64000,0,0x866e5400,0x805b6440) ra 0x803197c0 sz 24
[ 7875.7109415] 0x80b65ca8: kern_reboot+0xb0 (0x80b64000,0,0x866e5400,0x805b6440) ra 0x80369c80 sz 40
[ 7875.7109415] 0x80b65cd0: vpanic+0x1dc (0x80b64000,0,0x866e5400,0x805b6440) ra 0x804c085c sz 48
[ 7875.7109415] 0x80b65d00: kern_assert+0x3c (0x80b64000,0x804e6a3c,0x8051f7a8,0x8052e330) ra 0x8038df4c sz 32
[ 7875.7265665] 0x80b65d20: sigprocmask1+0x224 (0x80b64000,0x804e6a3c,0x8051f7a8,0x8052e330) ra 0x800616f0 sz 48
[ 7875.7265665] 0x80b65d50: compat_13_sys_sigreturn+0x1f0 (0x80b64000,0x804e6a3c,0x8051f7a8,0x8052e330) ra 0x80055178 sz 376
[ 7875.7265665] 0x80b65ec8: syscall+0x158 (0x80b64000,0x804e6a3c,0x8051f7a8,0x8052e330) ra 0x800450ac sz 128
[ 7875.7265665] 0x80b65f48: mips1_systemcall+0xec (0x80b64000,0x804e6a3c,0x8051f7a8,0x8052e330) ra 0x7923d090 sz 0
[ 7875.7265665] PC 0x7923d090: not in kernel space
[ 7875.7265665] 0x80b65f48: 0+0x7923d090 (0x80b64000,0x804e6a3c,0x8051f7a8,0x8052e330) ra 0 sz 0
[ 7875.7265665] User-level: pid 17290.17290
https://releng.netbsd.org/b5reports/pmax/2025/2025.04.24.01.52.38/test.log
(Probably won't do anything about `pid -2135532376 not found',
though!)
Prompted by adding tests for compat13 for:
PR port-mips/59285: _longjmp(..., 0) makes setjmp return 0, not 1
PR port-mips/59342: compat_setjmp.S is confused about delay slots
PR port-mips/59343: compat_sigsetjmp.S: missing RESTORE_GP64
|
| 1.22 | 28-May-2023 |
andvar | branches: 1.22.6;
s/Resture/Restore/ and s/restared/restarted/ in comments.
|
| 1.21 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.20 | 14-Jan-2011 |
rmind | branches: 1.20.2; 1.20.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.19 | 14-Dec-2009 |
uebayasi | branches: 1.19.4;
We don't declare variables in for () statement.
|
| 1.18 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.17 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.16 | 24-Apr-2008 |
ad | branches: 1.16.2; 1.16.4; 1.16.20;
Merge proc::p_mutex and proc::p_smutex into a single adaptive mutex, since
we no longer need to guard against access from hardware interrupt handlers.
Additionally, if cloning a process with CLONE_SIGHAND, arrange to have the
child process share the parent's lock so that signal state may be kept in
sync. Partially addresses PR kern/37437.
|
| 1.15 | 20-Dec-2007 |
dsl | branches: 1.15.6; 1.15.8;
Convert all the system call entry points from:
int foo(struct lwp *l, void *v, register_t *retval)
to:
int foo(struct lwp *l, const struct foo_args *uap, register_t *retval)
Fixup compat code to not write into 'uap' and (in some cases) to actually
pass a correctly formatted 'uap' structure with the right name to the
next routine.
A few 'compat' routines that just call standard ones have been deleted.
All the 'compat' code compiles (along with the kernels required to test
build it).
98% done by automated scripts.
|
| 1.14 | 09-Feb-2007 |
ad | branches: 1.14.24; 1.14.32; 1.14.36;
Merge newlock2 to head.
|
| 1.13 | 11-Dec-2005 |
christos | branches: 1.13.20;
merge ktrace-lwp.
|
| 1.12 | 14-Sep-2005 |
he | This file also needs <compat/sys/signal.h> and <compat/sys/signalvar.h>
for native_sigset13_to_sigset().
|
| 1.11 | 26-Nov-2003 |
he | branches: 1.11.16;
Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.10 | 17-Jan-2003 |
thorpej | branches: 1.10.2;
Merge the nathanw_sa branch.
|
| 1.9 | 09-Nov-2002 |
thorpej | Fix signed/unsigned comparison warnings.
|
| 1.8 | 22-Dec-2000 |
jdolecek | branches: 1.8.8;
split off thread specific stuff from struct sigacts to struct sigctx, leaving
only signal handler array sharable between threads
move other random signal stuff from struct proc to struct sigctx
This addresses kern/10981 by Matthew Orgass.
|
| 1.7 | 24-Apr-1999 |
simonb | branches: 1.7.2;
Nuke register and remove trailling white space.
|
| 1.6 | 06-Jan-1999 |
nisimura | branches: 1.6.4;
- Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.5 | 03-Dec-1998 |
nisimura | - Use explicite structure member reference with 'struct frame' to alter
register values of exception frame pointed with p->p_md.md_regs.
- Local auto variable 'cpustate' in cpu_coredump() was never used correctly.
|
| 1.4 | 02-Oct-1998 |
drochner | branches: 1.4.2;
change debugging output in compat_13_sigreturn to distinguish from native
sigreturn
|
| 1.3 | 26-Sep-1998 |
drochner | make it compile with DEBUG
|
| 1.2 | 14-Sep-1998 |
jonathan | Fix typos in signal rework (sc.regs -> sc-regs, rege -> regs).
|
| 1.1 | 13-Sep-1998 |
thorpej | Make signal delivery work again.
|
| 1.4.2.2 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.4.2.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.6.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.7.2.1 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.8.8.4 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.8.8.3 | 12-Jul-2002 |
nathanw | No longer need to pull in lwp.h; proc.h pulls it in for us.
|
| 1.8.8.2 | 29-May-2002 |
nathanw | #include <sys/sa.h> before <sys/syscallargs.h>, to provide sa_upcall_t
now that <sys/param.h> doesn't include <sys/sa.h>.
(Behold the Power of Ed)
|
| 1.8.8.1 | 02-Dec-2001 |
wdk | Apply standard set of struct proc -> struct lwp changes
|
| 1.10.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.10.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.10.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.10.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.11.16.3 | 21-Jan-2008 |
yamt | sync with head
|
| 1.11.16.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.11.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.13.20.2 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.13.20.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.14.36.1 | 02-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.14.32.1 | 26-Dec-2007 |
ad | Sync with head.
|
| 1.14.24.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.15.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.15.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.16.20.6 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.16.20.5 | 24-Dec-2010 |
matt | need to include <mips/locore.h> explicitly now.
Ansify cpu_exec.c
|
| 1.16.20.4 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.16.20.3 | 09-Sep-2009 |
matt | Fix tpyo (ABI -> API)
|
| 1.16.20.2 | 23-Aug-2009 |
matt | In non-O32 kernels, make these syscalls return ENOSYS or sigexit(l, SIGILL)
when called by non-O32 programs. Marshall the 64bits registers to and from
their 32bit equivs and deal with FP differences.
|
| 1.16.20.1 | 20-Aug-2009 |
matt | No need to cast to (struct frame *) anymore.
|
| 1.16.4.3 | 14-May-2008 |
wrstuden | Per discussion with ad at n dot o, revert signal mask handling
changes.
The l_sigstk changes are most likely totally un-needed as SA will
never use a signal stack - we send an upcall (or will as other
diffs are brought in).
The l_sigmask changes were too controvertial. In all honesty, I
think it's probably best to revert them. The main reason they were
there is the fact that in an SA process, we don't mask signals per
kernel thread, we mask them per user thread. In the kernel, we want
them all to get turned into upcalls. Thus the normal state of
l_sigmask in an SA process is for it to always be empty.
While we are in the process of delivering a signal, we want to
temporarily mask a signal (so we don't recursively exhaust our
upcall stacks). However signal delivery is rare (important, but
rare), and delivering back-to-back signals is even rarer. So rather
than cause every user of a signal mask to be prepared for this very
rare case, we will just add a second check later in the signal
delivery code. Said change is not in this diff.
This also un-compensates all of our compatability code for dealing
with SA. SA is a NetBSD-specific thing, so there's no need for
Irix, Linux, Solaris, SVR4 and so on to cope with it.
As previously, everything other than kern_sa.c compiles in i386
GENERIC as of this checkin. I will switch to ALL soon for compile
testing.
|
| 1.16.4.2 | 14-May-2008 |
wrstuden | Per discussion with ad, remove most of the #include <sys/sa.h> lines
as they were including sa.h just for the type(s) needed for syscallargs.h.
Instead, create a new file, sys/satypes.h, which contains just the
types needed for syscallargs.h. Yes, there's only one now, but that
may change and it's probably more likely to change if it'd be difficult
to handle. :-)
Per discussion with matt at n dot o, add an include of satypes.h to
sigtypes.h. Upcall handlers are kinda signal handlers, and signalling
is the header file that's already included for syscallargs.h that
closest matches SA.
This shaves about 3000 lines off of the diff of the branch relative
to the base. That also represents about 18% of the total before this
checkin.
I think this reduction is very good thing.
|
| 1.16.4.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.16.2.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.19.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.20.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.20.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.22.6.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.24 | 25-Apr-2025 |
riastradh | mips: Align stack pointer on entry to signal handler.
Based on a patch by rin@. The variant approach I took puts the stack
frame allocation and alignment logic in one place (getframe, used by
sendsig_siginfo for native (n64, on mips), netbsd32_sendsig_siginfo
for compat32 (n32/o32, on mips), and sendsig_sigcontext (compat 1.6))
and reduces the chance of provoking compiler exploitation of
undefined behaviour by doing arithmetic in uintptr_t rather than in
pointers to large aligned structs. This also ensures the resulting
pointer is aligned for the object (struct siginfo_sigframe, struct
siginfo_sigframe32, struct sigcontext), not just for the ABI stack
alignment.
PR kern/59327: user stack pointer is not aligned properly
|
| 1.23 | 27-Oct-2021 |
thorpej | branches: 1.23.10;
Use the signal trampoline version constants from <sys/signal.h>.
|
| 1.22 | 16-Mar-2017 |
chs | allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.
|
| 1.21 | 06-Dec-2013 |
mrg | branches: 1.21.6; 1.21.10; 1.21.14;
fix a register copy in compat_16_sys___sigreturn14() that GCC 4.8
picked up (would have read uninitialised, and possibly unmapped data,
but i doubt many people are running netbsd 1.6 mips apps on mips64
hosts yet.)
|
| 1.20 | 02-May-2011 |
rmind | branches: 1.20.4; 1.20.14; 1.20.18;
Extend PCU:
- Add pcu_ops_t::pcu_state_release() operation for PCU_RELEASE case.
- Add pcu_switchpoint() to perform release operation on context switch.
- Sprinkle const, misc. Also, sync MIPS with changes.
Per discussions with matt@.
|
| 1.19 | 29-Apr-2011 |
matt | constification.
|
| 1.18 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.17 | 14-Jan-2011 |
rmind | branches: 1.17.2; 1.17.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.16 | 14-Dec-2009 |
uebayasi | branches: 1.16.4;
We don't declare variables in for () statement.
|
| 1.15 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.14 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.13 | 21-Nov-2008 |
he | Only include opt_* headers under _KERNEL_OPT.
|
| 1.12 | 28-Apr-2008 |
martin | branches: 1.12.2; 1.12.6; 1.12.8; 1.12.14;
Remove clause 3 and 4 from TNF licenses
|
| 1.11 | 24-Apr-2008 |
ad | branches: 1.11.2;
Merge proc::p_mutex and proc::p_smutex into a single adaptive mutex, since
we no longer need to guard against access from hardware interrupt handlers.
Additionally, if cloning a process with CLONE_SIGHAND, arrange to have the
child process share the parent's lock so that signal state may be kept in
sync. Partially addresses PR kern/37437.
|
| 1.10 | 20-Dec-2007 |
dsl | branches: 1.10.6; 1.10.8;
Convert all the system call entry points from:
int foo(struct lwp *l, void *v, register_t *retval)
to:
int foo(struct lwp *l, const struct foo_args *uap, register_t *retval)
Fixup compat code to not write into 'uap' and (in some cases) to actually
pass a correctly formatted 'uap' structure with the right name to the
next routine.
A few 'compat' routines that just call standard ones have been deleted.
All the 'compat' code compiles (along with the kernels required to test
build it).
98% done by automated scripts.
|
| 1.9 | 04-Mar-2007 |
christos | branches: 1.9.20; 1.9.28; 1.9.32;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.8 | 09-Feb-2007 |
ad | branches: 1.8.2;
Merge newlock2 to head.
|
| 1.7 | 26-Aug-2006 |
matt | branches: 1.7.2;
Use vaddr_t for virtual addresses. Don't cast pointers with int or
unsigned, use intptr_t or uintptr_t as appropriate.
|
| 1.6 | 11-Dec-2005 |
christos | branches: 1.6.4; 1.6.8;
merge ktrace-lwp.
|
| 1.5 | 14-Sep-2005 |
he | Another file which needs <compat/sys/signal.h> and <compat/sys/signalvar.h>
for native_sigset_to_sigset13().
|
| 1.4 | 24-Jan-2005 |
drochner | branches: 1.4.8;
-remove definition of "struct sigframe" -- haven't found a use of it
(should fix build problems w/o COMPAT_16 reported by Markus W Kilbinger
per PR port-mips/29041 and by Havard Eidnes)
-further shuffle COMPAT_* conditionals to allow COMPAT_ULTRIX
w/o COMPAT_16
|
| 1.3 | 01-Jan-2005 |
simonb | branches: 1.3.2;
Use "NULL" instead of "(something-or-other *)0".
|
| 1.2 | 26-Nov-2003 |
he | branches: 1.2.4;
Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.1 | 29-Oct-2003 |
christos | first pass siginfo glue for mips
|
| 1.2.4.7 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.2.4.6 | 04-Feb-2005 |
skrll | Sync with HEAD.
|
| 1.2.4.5 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.2.4.4 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.4.3 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.4.2 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.2.4.1 | 26-Nov-2003 |
skrll | file compat_16_machdep.c was added on branch ktrace-lwp on 2004-08-03 10:37:47 +0000
|
| 1.3.2.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.4.8.5 | 21-Jan-2008 |
yamt | sync with head
|
| 1.4.8.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.4.8.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.4.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.8.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.6.8.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.6.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.7.2.3 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.7.2.2 | 11-Jan-2007 |
ad | Checkpoint work in progress.
|
| 1.7.2.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.8.2.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.9.32.1 | 02-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.9.28.1 | 26-Dec-2007 |
ad | Sync with head.
|
| 1.9.20.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.10.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.10.6.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.10.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.11.2.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.11.2.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.11.2.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.12.14.7 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.12.14.6 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.12.14.5 | 22-Feb-2010 |
matt | Explicitly include <mips/locore.h> since <mips/cpu.h> no longer includes it.
Use curcpu()->ci_data.cpu_nsyscall instead of uvmexp.syscalls.
|
| 1.12.14.4 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.12.14.3 | 29-Jan-2010 |
matt | Change mips kernel options SOFTFLOAT to FPEMUL. Allow a kernel to have
no FP emulation code. Fix insufficient SYMTAB_SPACE. When a kernel without
an FPU and with FPEMUL code, the application will trap with a SIGILL/ILL_ILLOPC
signal, not SIGSEGV/SEGV_MAPERR.
|
| 1.12.14.2 | 23-Aug-2009 |
matt | In non-O32 kernels, make these syscalls return ENOSYS or sigexit(l, SIGILL)
when called by non-O32 programs. Marshall the 64bits registers to and from
their 32bit equivs and deal with FP differences.
|
| 1.12.14.1 | 20-Aug-2009 |
matt | No need to cast to (struct frame *) anymore.
|
| 1.12.8.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.12.6.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.12.2.3 | 14-May-2008 |
wrstuden | Per discussion with ad at n dot o, revert signal mask handling
changes.
The l_sigstk changes are most likely totally un-needed as SA will
never use a signal stack - we send an upcall (or will as other
diffs are brought in).
The l_sigmask changes were too controvertial. In all honesty, I
think it's probably best to revert them. The main reason they were
there is the fact that in an SA process, we don't mask signals per
kernel thread, we mask them per user thread. In the kernel, we want
them all to get turned into upcalls. Thus the normal state of
l_sigmask in an SA process is for it to always be empty.
While we are in the process of delivering a signal, we want to
temporarily mask a signal (so we don't recursively exhaust our
upcall stacks). However signal delivery is rare (important, but
rare), and delivering back-to-back signals is even rarer. So rather
than cause every user of a signal mask to be prepared for this very
rare case, we will just add a second check later in the signal
delivery code. Said change is not in this diff.
This also un-compensates all of our compatability code for dealing
with SA. SA is a NetBSD-specific thing, so there's no need for
Irix, Linux, Solaris, SVR4 and so on to cope with it.
As previously, everything other than kern_sa.c compiles in i386
GENERIC as of this checkin. I will switch to ALL soon for compile
testing.
|
| 1.12.2.2 | 14-May-2008 |
wrstuden | Per discussion with ad, remove most of the #include <sys/sa.h> lines
as they were including sa.h just for the type(s) needed for syscallargs.h.
Instead, create a new file, sys/satypes.h, which contains just the
types needed for syscallargs.h. Yes, there's only one now, but that
may change and it's probably more likely to change if it'd be difficult
to handle. :-)
Per discussion with matt at n dot o, add an include of satypes.h to
sigtypes.h. Upcall handlers are kinda signal handlers, and signalling
is the header file that's already included for syscallargs.h that
closest matches SA.
This shaves about 3000 lines off of the diff of the branch relative
to the base. That also represents about 18% of the total before this
checkin.
I think this reduction is very good thing.
|
| 1.12.2.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.16.4.2 | 31-May-2011 |
rmind | sync with head
|
| 1.16.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.17.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.17.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.20.18.1 | 18-May-2014 |
rmind | sync with head
|
| 1.20.14.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.20.14.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.20.4.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.21.14.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.21.10.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.21.6.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.23.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.18 | 30-Jun-2020 |
maxv | Make copystr() a MI C function, part of libkern and shared on all
architectures.
Notes:
- On alpha and ia64 the function is kept but gets renamed locally to avoid
symbol collision. This is because on these two arches, I am not sure
whether the ASM callers do not rely on fixed registers, so I prefer to
keep the ASM body for now.
- On Vax, only the symbol is removed, because the body is used from other
functions.
- On RISC-V, this change fixes a bug: copystr() was just a wrapper around
strlcpy(), but strlcpy() makes the operation less safe (strlen on the
source beyond its size).
- The kASan, kCSan and kMSan wrappers are removed, because now that
copystr() is in C, the compiler transformations are applied to it,
without the need for manual wrappers.
Could test on amd64 only, but should be fine.
|
| 1.17 | 06-Apr-2019 |
thorpej | Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.16 | 07-Jun-2015 |
matt | branches: 1.16.18;
assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.15 | 16-Aug-2011 |
matt | branches: 1.15.12; 1.15.30;
Only jump through t9/ra (or k0) to help avoid hitting
the Loongson2 jump problem.
|
| 1.14 | 06-Jul-2011 |
matt | Add
uint32_t kfetch_32(volatile uint32_t *, uint32_t);
which fetches a 32-bit value from a provided addess or returns
an user supplied value on error.
|
| 1.13 | 05-Jul-2011 |
matt | Add a sync in badaddr to force an exception so trap can clean it up.
|
| 1.12 | 06-Apr-2011 |
matt | Indent delay slots by a space.
|
| 1.11 | 16-Mar-2011 |
tsutsui | Fix possible load delay hazard on R3000.
(probably no one has set breakpoint on R3000?)
|
| 1.10 | 07-Jul-2010 |
chs | branches: 1.10.2;
set error return value for user addresses in kernel space.
(this fixes a bug in my previous checkin here.)
|
| 1.9 | 20-Mar-2010 |
chs | fix copy{in,out}{,str}() to return the error returned by uvm_fault().
fixes PR 41813.
|
| 1.8 | 14-Dec-2009 |
matt | branches: 1.8.2; 1.8.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.7 | 10-Dec-2009 |
rmind | Rename L_ADDR to L_PCB and amend some comments accordingly.
|
| 1.6 | 27-Nov-2009 |
rmind | - Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
|
| 1.5 | 17-Oct-2007 |
garbled | branches: 1.5.20; 1.5.38;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.4 | 17-May-2007 |
yamt | branches: 1.4.2; 1.4.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.26; 1.3.30; 1.3.32; 1.3.38;
merge ktrace-lwp.
|
| 1.2 | 07-Aug-2003 |
agc | branches: 1.2.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.1 | 09-Nov-2002 |
nisimura | branches: 1.1.2; 1.1.8;
- Make monolistic files into smaller manageable pieces, resulting
three new files;
sig_machdep.c (from mips_machdep.c)
copy.S and sigcode.S (from locore.S)
- Nuke the local use of struct sigframe, which is now identical to
struct sigcontext, from sendsig() as the consequence of new signal
trampoline.
|
| 1.1.8.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.8.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.8.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.2.1 | 09-Nov-2002 |
nathanw | file copy.S was added on branch nathanw_sa on 2002-11-11 22:00:35 +0000
|
| 1.2.16.1 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.3.38.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.3.32.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.3.30.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.3.26.1 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.4.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.4.2.1 | 18-Jul-2007 |
matt | Make N32/N64 safe (XXX untested).
|
| 1.5.38.7 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.5.38.6 | 11-Dec-2009 |
matt | Cleanup/add some comments.
|
| 1.5.38.5 | 05-Dec-2009 |
cliff | - in copyinstr, drop a nop into delay slot as needed
- use <tab><space> indenting to make delay slot ops more obvious
|
| 1.5.38.4 | 14-Nov-2009 |
matt | switch from fu*/su* to ufetch_*/ustore_*.
|
| 1.5.38.3 | 24-Oct-2009 |
matt | fuword works on longs too.
|
| 1.5.38.2 | 24-Oct-2009 |
matt | suword stores a long, not a int.
|
| 1.5.38.1 | 20-Aug-2009 |
matt | Make ABI agnostic. (Almost identical O32 code; uses a different stack slot
for a temporary).
|
| 1.5.20.2 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.5.20.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.8.4.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.8.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.8.4.1 | 30-May-2010 |
rmind | sync with head
|
| 1.8.2.2 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.8.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.10.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.15.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.15.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.16.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.10 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.9 | 20-Nov-2019 |
pgoyette | Move all non-emulation-specific coredump code into the coredump module,
and remove all #ifdef COREDUMP conditional compilation. Now, the
coredump module is completely separated from the emulation modules, and
they can all be independently loaded and unloaded.
Welcome to 9.99.18 !
|
| 1.8 | 26-Jun-2015 |
matt | branches: 1.8.18;
Move <mips/locore.h> lower
|
| 1.7 | 01-Jan-2014 |
dsl | branches: 1.7.6;
Change the type of the 'cookie' that holds the state of the core dump file
from 'void *' to the actual type 'struct coredump_iostate *'.
In most of the code the contents of the structure are still unknown.
This just stops the wrong type of pointer being passed to the 'void *'
parameter.
I hope I've found everything, amd64 GENERIC and i386 GENERIC & ALL compile.
|
| 1.6 | 13-Jun-2011 |
matt | branches: 1.6.2; 1.6.12; 1.6.16;
Deal with PCU state when performing coredumps. As the kernel moves each LWP
into LSSUSPENDED state, have that LWP save its PCU state for the coredump and
release its PCU status since its probably going to be exiting very soon.
Make pcu_save_all tolerate for being called for non-curlwp if that lwp belongs
to the same process, has a state of LSSUSPENDED, and no PCUs are in use.
Make the MD coredump code use pcu_save_all(l) since it'll need to save all
the PCU state anyways and can take advantage of the above tests.
|
| 1.5 | 20-Feb-2011 |
matt | branches: 1.5.2;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.4 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.3 | 14-Jan-2011 |
rmind | branches: 1.3.2; 1.3.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.2 | 21-Nov-2009 |
rmind | branches: 1.2.4;
Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.1 | 19-Nov-2008 |
ad | branches: 1.1.4; 1.1.6; 1.1.8; 1.1.12;
Make the emulations, exec formats, coredump, NFS, and the NFS server
into modules. By and large this commit:
- shuffles header files and ifdefs
- splits code out where necessary to be modular
- adds module glue for each of the components
- adds/replaces hooks for things that can be installed at runtime
|
| 1.1.12.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.1.12.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.1.12.1 | 19-Nov-2008 |
yamt | file core_machdep.c was added on branch yamt-nfs-mp on 2009-05-04 08:11:31 +0000
|
| 1.1.8.2 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.1.8.1 | 19-Nov-2008 |
skrll | file core_machdep.c was added on branch nick-hppapmap on 2009-01-19 13:16:30 +0000
|
| 1.1.6.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.1.6.1 | 19-Nov-2008 |
mjf | file core_machdep.c was added on branch mjf-devfs2 on 2009-01-17 13:28:16 +0000
|
| 1.1.4.2 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.1.4.1 | 19-Nov-2008 |
haad | file core_machdep.c was added on branch haad-dm on 2008-12-13 01:13:18 +0000
|
| 1.2.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.4.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.4.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.3.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.2.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.6.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.6.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.6.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.7.6.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.8.18.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.70 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.69 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.68 | 23-May-2021 |
mrg | fix "uname -p" on mips n32.
this has been returning "mipsn64eb" on my edgerouter4 with the
32 bit uname binary.
introduce o32, n32, and n64 versions of MACHINE_ARCH, and use
them appropriately in PROC_MACHINE_ARCH32(). now o32, n32 and
n64 "uname -p" all return different values.
|
| 1.67 | 19-Aug-2018 |
mrg | branches: 1.67.16; 1.67.18;
fix a bug in the previous change: don't hide the break; behind DEBUG_EXEC.
should fix PR#53538. tested on erlite.
|
| 1.66 | 08-Aug-2018 |
simonb | Make change of ABI printf()s #ifdef DEBUG_EXEC.
|
| 1.65 | 16-Oct-2016 |
maxv | branches: 1.65.14; 1.65.16;
Remove unused (and buggy) function. Not even compile-tested, but I've
been told to go ahead anyway.
|
| 1.64 | 10-Jul-2011 |
matt | branches: 1.64.12; 1.64.30; 1.64.34;
More <machine/ include cleanup
|
| 1.63 | 29-Apr-2011 |
matt | fix mips32/mips64 program on mips32/mips64 r2 bug.
|
| 1.62 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.61 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.60 | 16-Jan-2011 |
tsutsui | branches: 1.60.2; 1.60.4;
Make pre-2.0 ELF binaries (with gcc-2.95.3/binutils-2.11.2) actually work
with options COMPAT_16.
Tested on R3000 pmax and R5000 sgimips, closes PR port-mips/44375.
|
| 1.59 | 14-Dec-2009 |
mrg | branches: 1.59.4;
replace mips:elf_check_itp() and ELFNAME2(netbsd32,probe_noteless) that
it's based upon with a common compat_elf_check_interp().
tested on MALTA64 and sparc64.
|
| 1.58 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.57 | 10-Dec-2009 |
matt | Change u_long to vaddr_t/vsize_t in exec code where appropriate (mostly
involves setregs and vmcmds). Should result in no code differences.
|
| 1.56 | 12-Aug-2009 |
matt | Nuke a.out support for MIPS.
|
| 1.55 | 29-Mar-2009 |
mrg | - add new RLIMIT_AS (aka RLIMIT_VMEM) resource that limits the total
address space available to processes. this limit exists in most other
modern unix variants, and like most of them, our defaults are unlimited.
remove the old mmap / rlimit.datasize hack.
- adds the VMCMD_STACK flag to all the stack-creation vmcmd callers.
it is currently unused, but was added a few years ago.
- add a pair of new process size values to kinfo_proc2{}. one is the
total size of the process memory map, and the other is the total size
adjusted for unused stack space (since most processes have a lot of
this...)
- patch sh, and csh to notice RLIMIT_AS. (in some cases, the alias
RLIMIT_VMEM was already present and used if availble.)
- patch ps, top and systat to notice the new k_vm_vsize member of
kinfo_proc2{}.
- update irix, svr4, svr4_32, linux and osf1 emulations to support
this information. (freebsd could be done, but that it's best left
as part of the full-update of compat/freebsd.)
this addresses PR 7897. it also gives correct memory usage values,
which have never been entirely correct (since mmap), and have been
very incorrect since jemalloc() was enabled.
tested on i386 and sparc64, build tested on several other platforms.
thanks to many folks for feedback and testing but most espcially
chuq and yamt for critical suggestions that lead to this patch not
having a special ugliness i wasn't happy with anyway :-)
|
| 1.54 | 14-Mar-2009 |
dsl | ANSIfy another 1261 function definitions.
The only ones left in sys are beyond by sed script!
(or in sys/dist or sys/external)
Mostly they have function pointer parameters.
|
| 1.53 | 24-Nov-2008 |
tsutsui | branches: 1.53.4;
<machine/bsd-aout.h> -> <mips/bsd-aout.h>, no MD bits in each port.
(who still has a.out for 4.4BSD pmax or news3400?)
|
| 1.52 | 19-Nov-2008 |
tsutsui | Fix errors which were hidden in #ifdef COMPAT_09:
- fix a typo in rev 1.43 (ep_setup_stack -> es_setup_stack)
- fix an arg missed on ktrace-lwp merge in rev 1.47
XXX Is it really worth to have COMPAT_09 code on mips?
XXX No mips port in 0.9 and quite few a.out MIPS binaries..
|
| 1.51 | 15-Nov-2008 |
ad | Remove compat ifdef.
|
| 1.50 | 04-Mar-2007 |
christos | branches: 1.50.12; 1.50.40; 1.50.44; 1.50.50; 1.50.52; 1.50.54;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.49 | 23-Jul-2006 |
ad | branches: 1.49.10;
Use the LWP cached credentials where sane.
|
| 1.48 | 14-May-2006 |
elad | integrate kauth.
|
| 1.47 | 11-Dec-2005 |
christos | branches: 1.47.4; 1.47.6; 1.47.8; 1.47.10; 1.47.12;
merge ktrace-lwp.
|
| 1.46 | 17-Sep-2004 |
skrll | branches: 1.46.12;
There's no need to pass a proc value when using UIO_SYSSPACE with
vn_rdwr(9) and uiomove(9).
OK'd by Jason Thorpe
|
| 1.45 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.44 | 29-Sep-2003 |
junyoung | Fix typo in comments.
|
| 1.43 | 11-Aug-2003 |
christos | Kill another stray setup_stack. Thanks @@@.
|
| 1.42 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.41 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.40 | 29-Jun-2003 |
fvdl | branches: 1.40.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.39 | 29-Jun-2003 |
simonb | Fix 'struct lwp *' lossage.
|
| 1.38 | 29-Jun-2003 |
simonb | Fix more needless 'struct proc *' to 'struct lwp *' fallout.
|
| 1.37 | 28-Jun-2003 |
darrenr | Pass lwp pointers throughtout the kernel, as required, so that the lwpid can
be inserted into ktrace records. The general change has been to replace
"struct proc *" with "struct lwp *" in various function prototypes, pass
the lwp through and use l_proc to get the process pointer when needed.
Bump the kernel rev up to 1.6V
|
| 1.36 | 02-Apr-2003 |
thorpej | Use PAGE_SIZE rather than NBPG.
|
| 1.35 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.34 | 05-Oct-2002 |
chs | count executable image pages as executable for vm-usage purposes.
also, always do the VTEXT vs. v_writecount mutual exclusion
(which we previously skipped if the text or data segment was empty).
|
| 1.33 | 27-Sep-2002 |
provos | remove trailing \n in panic(). approved perry.
|
| 1.32 | 06-Mar-2002 |
simonb | branches: 1.32.8;
Only include <sys/exec_ecoff.h> if EXEC_ECOFF is defined.
Note that ELF is mandatory.
|
| 1.31 | 05-Mar-2002 |
simonb | ANSIfy.
|
| 1.30 | 30-Oct-2001 |
thorpej | branches: 1.30.2;
- Add a new vnode flag VEXECMAP, which indicates that a vnode has
executable mappings. Stop overloading VTEXT for this purpose (VTEXT
also has another meaning).
- Rename vn_marktext() to vn_markexec(), and use it when executable
mappings of a vnode are established.
- In places where we want to set VTEXT, set it in v_flag directly, rather
than making a function call to do this (it no longer makes sense to
use a function call, since we no longer overload VTEXT with VEXECMAP's
meaning).
VEXECMAP suggested by Chuq Silvers.
|
| 1.29 | 18-Sep-2001 |
jdolecek | branches: 1.29.2;
Make the setregs hook emulation-specific, rather than executable
format specific.
Struct emul has a e_setregs hook back, which points to emulation-specific
setregs function. es_setregs of struct execsw now only points to
optional executable-specific setup function (this is only used for
ECOFF).
|
| 1.28 | 17-Sep-2001 |
jdolecek | only define the cpu_exec_ecoff_*() stuff #ifdef EXEC_ECOFF
|
| 1.27 | 07-Jul-2001 |
simonb | branches: 1.27.2; 1.27.4;
b{cmp,copy,zero} -> mem{cmp,cpy,set}
Also remove some unnecessary argument casts.
|
| 1.26 | 27-Nov-2000 |
tsutsui | Prepare cpu_exec_ecoff_probe() for mips which just returns ENOEXEC,
as per discussion on tech-kern.
|
| 1.25 | 21-Nov-2000 |
jdolecek | restructure struct emul and execsw, in preparation to make emulations LKMable:
* move all exec-type specific information from struct emul to execsw[] and
provide single struct emul per emulation
* elf:
- kern/exec_elf32.c:probe_funcs[] is gone, execsw[] how has one entry
per emulation and contains pointer to respective probe function
- interp is allocated via MALLOC() rather than on stack
- elf_args structure is allocated via MALLOC() rather than malloc()
* ecoff: the per-emulation hooks moved from alpha and mips specific code
to OSF1 and Ultrix compat code as appropriate, execsw[] has one entry per
emulation supporting ecoff with appropriate probe function
* the makecmds/probe functions don't set emulation, pointer to emulation is
part of appropriate execsw[] entry
* constify couple of structures
|
| 1.24 | 29-Jun-2000 |
mrg | remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.23 | 11-Apr-2000 |
chs | add a new function vn_marktext() for exec code to let others know
that the vnode is now being used as process text.
|
| 1.22 | 15-Nov-1999 |
kleink | G/c orphaned prototype.
|
| 1.21 | 27-Oct-1999 |
simonb | Use the new ELF macros and structures from <sys/exec_elf.h> and not the
old ones from <mips/elf.h>.
XXX: If there's no MIPS API issues, {pmax,pica,newsmips,hpcmips,mips}/elf.h
can be thrown away...
|
| 1.20 | 24-Apr-1999 |
simonb | branches: 1.20.2; 1.20.4; 1.20.6;
Nuke register and remove trailling white space.
|
| 1.19 | 06-Jan-1999 |
nisimura | branches: 1.19.4;
- Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.18 | 03-Dec-1998 |
nisimura | - Use explicite structure member reference with 'struct frame' to alter
register values of exception frame pointed with p->p_md.md_regs.
- Local auto variable 'cpustate' in cpu_coredump() was never used correctly.
|
| 1.17 | 28-Jul-1998 |
thorpej | Change the "aresid" argument of vn_rdwr() from an int * to a size_t *,
to match the new uio_resid type.
|
| 1.16 | 05-Jul-1998 |
jonathan | * defopt COMPAT_{09,10,11,12,13} and COMPAT_NOMID.
TODO: revisit interaction between native compat and emul compat usage.
|
| 1.15 | 25-Jun-1998 |
thorpej | defopt COMPAT_ULTRIX
|
| 1.14 | 11-Sep-1997 |
mycroft | Fix execve(2) and *setregs() interfaces so emulations can set registers in a
more correct way. (See tech-kern.)
|
| 1.13 | 19-Jul-1997 |
jonathan | branches: 1.13.2;
* Re-apply changes from rev 1.6 of sys/arch/mips/include/reg.h accidentally
undone by rev 1.7:
>redo pmax/include/reg.h
>so that the definitions needed by locore.S are in a separate file,
>pmax/include/regnum.h.
* Add explicit `#include <mips/regnum.h>' where symbolic offsets
into a mips trapframe or struct reg are used..
|
| 1.12 | 11-Nov-1996 |
jonathan | Eliminate old mips/mips/elf.c ELF exec code.
Don't call into from the a.out exec hook; don't configure it into kernels.
|
| 1.11 | 13-Oct-1996 |
christos | backout previous kprintf change
|
| 1.10 | 11-Oct-1996 |
christos | printf -> kprintf
|
| 1.9 | 07-Oct-1996 |
jonathan | Fix for elf{32,64} changes: make <mips/reloc.h> re-includable,
Use elf_xxx section names (not elf32_xxx)in mips/mips/elf.c
|
| 1.8 | 20-Jun-1996 |
jonathan | Explictly credit Per Fogelstrom for the mips shared library support in elf.c,
which was taken from OpenBSD/pica.
The previous revision of elf.c replaced Ted Lemon's elf exec machinery
with something closer to Christos' MI elf machinery. It turns out
that old NetBSD/pmax elf binaries have three segments, and the newer
elf exec machinery cannot exec them.
The old elf exec machinery is folded back into cpu_exec.c, which falls
back onto using the old machinery if the new machinery fails. The
old-style binaries will be deprecated at the 1.2 release.
|
| 1.7 | 17-Jun-1996 |
jonathan | Update mipspmax elf exec support:
* Update arch/mips/mips/cpu_exec.c to include MI exec_elf.h header,
and to use the MI interface exec_elf_makecmds().
* Replace arch/mips/mips/elf.c (Ted Lemon's elf code) with
a version of Christos's MI elf exec code, munged to support demand paging
and mips shared libraries.
|
| 1.6 | 09-May-1996 |
cgd | branches: 1.6.4;
update for changed ecoff headers. minor consistency changes for the
ecoff functions, as well.
|
| 1.5 | 23-Mar-1996 |
jonathan | Rename "pmax_elf_makecmds()" to "mips_elf_makecmds()".x
|
| 1.4 | 25-Apr-1995 |
mellon | Fix a few compat code casualties
|
| 1.3 | 22-Apr-1995 |
christos | - added sunos_machdep.c for sun3, atari, amiga and mac68k.
- changed machdep.c and trap.c to use struct emul.
- remove ep_setup references.
- added struct emul to all emulations.
|
| 1.2 | 10-Apr-1995 |
mellon | Put endif COMPAT_09 inside function definition
|
| 1.1 | 03-Apr-1995 |
mellon | Move cpu-specific exec support to cpu_exec.c; Support 4.4BSD a.out
|
| 1.6.4.2 | 24-Jun-1996 |
jtc | Pull up from trunk.
Restores some code removed ~10 days ago which turns out to be necessary
for running some old NetBSD executables.
|
| 1.6.4.1 | 17-Jun-1996 |
jonathan | Pull up elf changes from trunk:
>Update mipspmax elf exec support:
> * Update arch/mips/mips/cpu_exec.c to include MI exec_elf.h header,
> and to use the MI interface exec_elf_makecmds().
> * Replace arch/mips/mips/elf.c (Ted Lemon's elf code) with
> a version of Christos's MI elf exec code, munged to support demand paging
> and mips shared libraries.
|
| 1.13.2.1 | 16-Sep-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.19.4.2 | 04-Jul-1999 |
chs | after setting VTEXT on a vnode, flush any UBC mappings
to try to prevent unnecessary VAC aliases.
|
| 1.19.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.20.6.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.20.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.20.2.3 | 08-Dec-2000 |
bouyer | Sync with HEAD.
|
| 1.20.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.20.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.27.4.1 | 01-Oct-2001 |
fvdl | Catch up with -current.
|
| 1.27.2.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.27.2.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.27.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.29.2.1 | 12-Nov-2001 |
thorpej | Sync the thorpej-mips-cache branch with -current.
|
| 1.30.2.6 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.30.2.5 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.30.2.4 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.30.2.3 | 15-Dec-2001 |
gmcgarry | missed proc -> lwp conversion
|
| 1.30.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.30.2.1 | 30-Oct-2001 |
wdk | file cpu_exec.c was added on branch nathanw_sa on 2001-11-17 23:43:41 +0000
|
| 1.32.8.2 | 02-Oct-2003 |
tron | Pull up revision 1.34 (requested by junyoung in ticket #1488):
count executable image pages as executable for vm-usage purposes.
also, always do the VTEXT vs. v_writecount mutual exclusion
(which we previously skipped if the text or data segment was empty).
|
| 1.32.8.1 | 27-Sep-2003 |
tron | Pull up revision 1.33 (requested by junyoung in ticket #1466):
remove trailing \n in panic(). approved perry.
|
| 1.40.2.7 | 28-Nov-2004 |
skrll | Adapt to branch
|
| 1.40.2.6 | 24-Oct-2004 |
skrll | Somehow a conflict got committed - fix this.
|
| 1.40.2.5 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.40.2.4 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.40.2.3 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.40.2.2 | 03-Jul-2003 |
wrstuden | LWP-ify to get algor/P4032 working.
|
| 1.40.2.1 | 02-Jul-2003 |
darrenr | Apply the aborted ktrace-lwp changes to a specific branch. This is just for
others to review, I'm concerned that patch fuziness may have resulted in some
errant code being generated but I'll look at that later by comparing the diff
from the base to the branch with the file I attempt to apply to it. This will,
at the very least, put the changes in a better context for others to review
them and attempt to tinker with removing passing of 'struct lwp' through
the kernel.
|
| 1.46.12.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.46.12.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.46.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.47.12.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.47.10.1 | 08-Mar-2006 |
elad | Adapt to kernel authorization KPI.
I expect *some* lossage here...
|
| 1.47.8.2 | 11-Aug-2006 |
yamt | sync with head
|
| 1.47.8.1 | 24-May-2006 |
yamt | sync with head.
|
| 1.47.6.1 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.47.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.49.10.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.50.54.1 | 01-Apr-2009 |
snj | branches: 1.50.54.1.4;
Pull up following revision(s) (requested by mrg in ticket #622):
bin/csh/csh.1: revision 1.46
bin/csh/func.c: revision 1.37
bin/ps/print.c: revision 1.111
bin/ps/ps.c: revision 1.74
bin/sh/miscbltin.c: revision 1.38
bin/sh/sh.1: revision 1.92 via patch
external/bsd/top/dist/machine/m_netbsd.c: revision 1.7
lib/libkvm/kvm_proc.c: revision 1.82
sys/arch/mips/mips/cpu_exec.c: revision 1.55
sys/compat/darwin/darwin_exec.c: revision 1.57
sys/compat/ibcs2/ibcs2_exec.c: revision 1.73
sys/compat/irix/irix_resource.c: revision 1.15
sys/compat/linux/arch/amd64/linux_exec_machdep.c: revision 1.16
sys/compat/linux/arch/i386/linux_exec_machdep.c: revision 1.12
sys/compat/linux/common/linux_limit.h: revision 1.5
sys/compat/osf1/osf1_resource.c: revision 1.14
sys/compat/svr4/svr4_resource.c: revision 1.18
sys/compat/svr4_32/svr4_32_resource.c: revision 1.17
sys/kern/exec_subr.c: revision 1.62
sys/kern/init_sysctl.c: revision 1.160
sys/kern/kern_exec.c: revision 1.288
sys/kern/kern_resource.c: revision 1.151
sys/sys/param.h: patch
sys/sys/resource.h: revision 1.31
sys/sys/sysctl.h: revision 1.184
sys/uvm/uvm_extern.h: revision 1.153
sys/uvm/uvm_glue.c: revision 1.136
sys/uvm/uvm_mmap.c: revision 1.128
usr.bin/systat/ps.c: revision 1.32
- - add new RLIMIT_AS (aka RLIMIT_VMEM) resource that limits the total
address space available to processes. this limit exists in most other
modern unix variants, and like most of them, our defaults are unlimited.
remove the old mmap / rlimit.datasize hack.
- - adds the VMCMD_STACK flag to all the stack-creation vmcmd callers.
it is currently unused, but was added a few years ago.
- - add a pair of new process size values to kinfo_proc2{}. one is the
total size of the process memory map, and the other is the total size
adjusted for unused stack space (since most processes have a lot of
this...)
- - patch sh, and csh to notice RLIMIT_AS. (in some cases, the alias
RLIMIT_VMEM was already present and used if availble.)
- - patch ps, top and systat to notice the new k_vm_vsize member of
kinfo_proc2{}.
- - update irix, svr4, svr4_32, linux and osf1 emulations to support
this information. (freebsd could be done, but that it's best left
as part of the full-update of compat/freebsd.)
this addresses PR 7897. it also gives correct memory usage values,
which have never been entirely correct (since mmap), and have been
very incorrect since jemalloc() was enabled.
tested on i386 and sparc64, build tested on several other platforms.
thanks to many folks for feedback and testing but most espcially
chuq and yamt for critical suggestions that lead to this patch not
having a special ugliness i wasn't happy with anyway :-)
|
| 1.50.54.1.4.15 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.50.54.1.4.14 | 24-Dec-2010 |
matt | need to include <mips/locore.h> explicitly now.
Ansify cpu_exec.c
|
| 1.50.54.1.4.13 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.50.54.1.4.12 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.50.54.1.4.11 | 14-Dec-2009 |
mrg | pullup from -current:
>replace mips:elf_check_itp() and ELFNAME2(netbsd32,probe_noteless) that
>it's based upon with a common compat_elf_check_interp().
>
>tested on MALTA64 and sparc64.
|
| 1.50.54.1.4.10 | 08-Dec-2009 |
mrg | remove an unnecessary variable.
|
| 1.50.54.1.4.9 | 13-Sep-2009 |
matt | Try to find an exact interp match before defaulting to one supplied:
o32: ld.elf_so-32
n32: ld.elf_so-n32
o64: ld.elf_so-o64
n64: ld.elf_so-64
|
| 1.50.54.1.4.8 | 05-Sep-2009 |
matt | Fix a few C&P bugs
|
| 1.50.54.1.4.7 | 03-Sep-2009 |
matt | If loading O32, and COMPAT_16 is defined, set *startp to ELFS32_LINK_ADDR
so that the interpeter will be loaded at its link address.
|
| 1.50.54.1.4.6 | 02-Sep-2009 |
matt | s/entry_p/start_p/ in mips_netbsd_elfXX_probe
|
| 1.50.54.1.4.5 | 02-Sep-2009 |
matt | Add p_comm to printf
|
| 1.50.54.1.4.4 | 26-Aug-2009 |
matt | Fixup (all but mipsco) to deal the new realities in mipsland.
|
| 1.50.54.1.4.3 | 23-Aug-2009 |
matt | Only print the ABI when it changes.
|
| 1.50.54.1.4.2 | 21-Aug-2009 |
matt | Add mips_netbsd_elfXX_probe routines.
Add coredump_elfXX_setup routines
|
| 1.50.54.1.4.1 | 20-Aug-2009 |
matt | No need to cast to (struct frame *) anymore.
|
| 1.50.52.2 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.50.52.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.50.50.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.50.44.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.50.44.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.50.44.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.50.40.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.50.12.1 | 18-Jul-2007 |
matt | Add ELF 32/64 ABI sniffing routines.
|
| 1.53.4.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.59.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.59.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.59.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.60.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.60.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.64.34.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.64.30.1 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.64.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.65.16.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.65.14.1 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.67.18.1 | 31-May-2021 |
cjep | sync with head
|
| 1.67.16.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.66 | 06-Sep-2025 |
riastradh | mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
> /tmp/ccxgOmXc.s: Assembler messages:
> /tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
> --- cpu_subr.o ---
>
> *** Failed target: cpu_subr.o
PR kern/59618: occasional virtio block device lock ups/hangs
|
| 1.65 | 06-Sep-2025 |
riastradh | paravirt_membar_sync(9): New memory barrier.
For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.
This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.
PR kern/59618: occasional virtio block device lock ups/hangs
|
| 1.64 | 04-Oct-2023 |
ad | branches: 1.64.8;
Eliminate l->l_ncsw and l->l_nivcsw. From memory think they were added
before we had per-LWP struct rusage; the same is now tracked there.
|
| 1.63 | 26-Feb-2023 |
skrll | ci_data.cpu_kcpuset -> ci_kcpuset
NFCI.
|
| 1.62 | 20-Jul-2022 |
riastradh | branches: 1.62.4;
mips: Fix cpuids synchronization at boot.
|
| 1.61 | 28-Mar-2022 |
riastradh | sys: Split struct device into a private device_impl.h.
Include this only inside autoconf itself, and a few files that abuse
autoconf in ways I can't confidently make easy fixes for.
XXX kernel ABI change requires bump -- no more use of struct device
internals allowed, previously done by some drivers
|
| 1.60 | 03-Mar-2022 |
riastradh | mips: Carefully use device_set_private for cpuN.
But don't do it in cpu_attach_common because the callers aren't set
up right -- instead leave a comment about what's wrong, to be dealt
with later.
|
| 1.59 | 16-Nov-2021 |
simonb | Use the architecture documented name ULR for the RDHWR user local
register.
|
| 1.58 | 17-Aug-2020 |
skrll | Give a hint to what the IPI numbers are, i.e. "(A/R)" meaning active and
requested respectively
|
| 1.57 | 09-Aug-2020 |
skrll | Don't kcpuset_clone every pmap_tlb_shootdown_bystanders. Instead allocate
a kcpuset_t per cpu_info and use that.
|
| 1.56 | 21-Jul-2020 |
simonb | Support "boot -1" to start an MP kernel in uniprocessor mode.
Sort sys/* includes while here.
|
| 1.55 | 20-Jul-2020 |
jmcneill | No need for cpu_hatch_lock after all since we hatch secondaries one at a time
|
| 1.54 | 20-Jul-2020 |
skrll | Fix non-MULTIPROCESSOR build
|
| 1.53 | 20-Jul-2020 |
jmcneill | Serialize CPU hatch annoucement printfs and wait for CPUs to start before
returning from cpu_boot_secondary_processors.
|
| 1.52 | 20-Jul-2020 |
skrll | Move exc_step definition under MIPS64_OCTEON and use it in the zeroising
memset as length for correctness.
|
| 1.51 | 20-Jul-2020 |
simonb | Less magic numbers.
|
| 1.50 | 19-Jul-2020 |
simonb | A little KNF.
|
| 1.49 | 17-Jul-2020 |
jmcneill | Remove 2 CPU limit in OCTEON interrupt controller driver.
|
| 1.48 | 14-Jun-2020 |
simonb | Retire MIPS_CP0FL_USERLOCAL and MIPS_CP0FL_HWRENA and the flawed
logic that tried to deal with a MIPS processor that supports the ULR
CP0 register. Probe correctly and save probed info somewhere we can
actually use it. Avoids problems where libc expects ULR set to a
value but the CPU definition in the CPU table didn't have the right
combination of magic flags and thus never set ULR in the first place.
|
| 1.47 | 11-Jun-2020 |
ad | uvm_availmem(): give it a boolean argument to specify whether a recent
cached value will do, or if the very latest total must be fetched. It can
be called thousands of times a second and fetching the totals impacts not
only the calling LWP but other CPUs doing unrelated activity in the VM
system.
|
| 1.46 | 15-Feb-2020 |
skrll | Remove the 'slow' argument from cpu_topology_set and create a new
function cpu_topology_setspeed which sets the relative speed of the
cpu.
This allows cpu_topology_set is be used at cpu hatch time. The relative
speed is only known once all cpus have hatched/attached
OK ad@
|
| 1.45 | 09-Jan-2020 |
ad | - Many small tweaks to the SMT awareness in the scheduler. It does a much
better job now at keeping all physical CPUs busy, while using the extra
threads to help out. In particular, during preempt() if we're using SMT,
try to find a better CPU to run on and teleport curlwp there.
- Change the CPU topology stuff so it can work on asymmetric systems. This
mainly entails rearranging one of the CPU lists so it makes sense in all
configurations.
- Add a parameter to cpu_topology_set() to note that a CPU is "slow", for
where there are fast CPUs and slow CPUs, like with the Rockwell RK3399.
Extend the SMT awareness to try and handle that situation too (keep fast
CPUs busy, use slow CPUs as helpers).
|
| 1.44 | 31-Dec-2019 |
ad | branches: 1.44.2;
Rename uvm_free() -> uvm_availmem().
|
| 1.43 | 27-Dec-2019 |
msaitoh | s/sucess/success/ in comment.
|
| 1.42 | 21-Dec-2019 |
ad | uvmexp.free -> uvm_free()
|
| 1.41 | 20-Dec-2019 |
ad | Some more CPU topology stuff:
- Use cegger@'s ACPI SRAT parsing code to figure out NUMA node ID for each
CPU as it is attached.
- For scheduler experiments with SMT, flag CPUs with the lowest numbered SMT
IDs as "primaries", link back to the primaries from secondaries, and build
a circular list of CPUs in each package with identical SMT IDs.
- No need for package/core/smt/numa IDs to be anything other than a u_int.
|
| 1.40 | 03-Dec-2019 |
riastradh | Use __insn_barrier to enforce ordering in l_ncsw loops.
(Only need ordering observable by interruption, not by other CPUs.)
|
| 1.39 | 02-Dec-2019 |
ad | Take the basic CPU topology information we already collect, and use it
to make circular lists of CPU siblings in the same core, and in the
same package. Nothing fancy, just enough to have a bit of fun in the
scheduler trying out different tactics.
|
| 1.38 | 01-Dec-2019 |
ad | Make cpu_intr_p() safe to use anywhere, i.e. outside assertions:
Don't call kpreempt_disable() / kpreempt_enable() to make sure we're not
preempted while using the value of curcpu(). Instead, observe the value of
l_ncsw before and after the check to see if we have been preempted. If
we have been preempted, then we need to retry the read.
|
| 1.37 | 24-Nov-2019 |
ad | Typo.
|
| 1.36 | 23-Nov-2019 |
ad | cpu_need_resched():
- Remove all code that should be MI, leaving the bare minimum under arch/.
- Make the required actions very explicit.
- Pass in LWP pointer for convenience.
- When a trap is required on another CPU, have the IPI set it locally.
- Expunge cpu_did_resched().
|
| 1.35 | 21-Nov-2019 |
ad | mi_userret(): take care of calling preempt(), set spc_curpriority directly,
and remove MD code that does the same.
|
| 1.34 | 21-Jan-2019 |
skrll | branches: 1.34.4;
Use ci_{package,core,smt}_id instead of ci_data.cpu_{package,core,smt}_id
NFC
|
| 1.33 | 20-Aug-2017 |
maxv | branches: 1.33.2; 1.33.4;
spl leak, found by mootja
|
| 1.32 | 07-May-2017 |
skrll | branches: 1.32.2;
KNF
|
| 1.31 | 16-Mar-2017 |
chs | branches: 1.31.4;
allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.
|
| 1.30 | 31-Oct-2016 |
skrll | branches: 1.30.2;
Pre-allocate some kcpuset_ts so that we don't try and allocate in the
wrong context.
|
| 1.29 | 23-Aug-2016 |
skrll | Whitespcae
|
| 1.28 | 18-Aug-2016 |
skrll | Initialise ci_pmap_kern_segtab in cpu_info_alloc
|
| 1.27 | 11-Jul-2016 |
matt | branches: 1.27.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.26 | 11-Jun-2015 |
matt | Define (but not use) separate kernel and user pagetables.
Move to the new names.
|
| 1.25 | 11-Jun-2015 |
matt | Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_start to get the
VA space it needs.
pmap_segtab.c is almost identical to uvm/pmap/pmap_segtab.c now. It won't
be long until we switch to the uvm/pmap one.
|
| 1.24 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.23 | 06-Jun-2015 |
matt | Add more KASSERTs
After each CPU is marked running, wait a small of time or until it shows
up in kcpuset_running.
|
| 1.22 | 06-Jun-2015 |
macallan | use PRIxCPUSET
now this builds again on o32
|
| 1.21 | 04-Jun-2015 |
matt | Add a verbose message when booting secondary cpus.
Fix octeon cpu_info_alloc
|
| 1.20 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.19 | 26-May-2015 |
matt | Call cpu_attach_common to attach the per-cpu counters.
|
| 1.18 | 18-May-2015 |
matt | Print cpu_model after copyright.
|
| 1.17 | 19-May-2014 |
rmind | branches: 1.17.4;
Implement MI IPI interface with cross-call support.
|
| 1.16 | 21-May-2012 |
martin | branches: 1.16.2; 1.16.12;
Calling _lwp_create() with a bogus ucontext could trigger a kernel
assertion failure (and thus a crash in DIAGNOSTIC kernels). Independently
discovered by YAMAMOTO Takashi and Joel Sing.
To avoid this, introduce a cpu_mcontext_validate() function and move all
sanity checks from cpu_setmcontext() there. Also untangle the netbsd32
compat mess slightly and add a cpu_mcontext32_validate() cousin there.
Add an exhaustive atf test case, based partly on code from Joel Sing.
Should finally fix the remaining open part of PR kern/43903.
|
| 1.15 | 19-Feb-2012 |
rmind | Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.14 | 16-Aug-2011 |
matt | branches: 1.14.2; 1.14.6; 1.14.8;
Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.13 | 02-May-2011 |
rmind | Extend PCU:
- Add pcu_ops_t::pcu_state_release() operation for PCU_RELEASE case.
- Add pcu_switchpoint() to perform release operation on context switch.
- Sprinkle const, misc. Also, sync MIPS with changes.
Per discussions with matt@.
|
| 1.12 | 02-May-2011 |
matt | Add an IPI for xcalls.
|
| 1.11 | 29-Apr-2011 |
matt | whitespace cleanup
|
| 1.10 | 14-Apr-2011 |
matt | Only set userlocal register if l == curlwp in cpu_set_lwpprivate.
|
| 1.9 | 14-Apr-2011 |
cliff | cpuwatch_* stuff is #if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0
now cobalt can build
|
| 1.8 | 14-Apr-2011 |
cliff | - no need to check lsw_cpu_run != NULL before calling, nullop is default
|
| 1.7 | 14-Apr-2011 |
cliff | - MIPS CPU (COP0) watchpoint support moved from db_interface.c to cpu_subr.c
see the cpuwatch_* functions
- ci_cpuwatch_count in allocated cpu_info is inherited from cpu_info_store
- cpu_hatch() calls lsw_cpu_run (if not NULL)
to optionally allow running MIPS chip-specific code
after subordinate cpus have been set running
- #ifdef DDB cpu_debug_dump() to allow compile when DDB not defined
|
| 1.6 | 06-Apr-2011 |
matt | minor cleanups. foo -> foo_p. add some whitespace.
|
| 1.5 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.4 | 24-Feb-2011 |
joerg | Allow storing and receiving the LWP private pointer via ucontext_t
on all platforms except VAX and IA64. Add fast access via register for
AMD64, i386 and SH3 ports. Use this fast access in libpthread to replace
the stack based pthread_self(). Implement skeleton support for Alpha,
HPPA, PowerPC, SPARC and SPARC64, but leave it disabled.
Ports that support this feature provide __HAVE____LWP_GETPRIVATE_FAST in
machine/types.h and a corresponding __lwp_getprivate_fast in
machine/mcontext.h.
This material is based upon work partially supported by
The NetBSD Foundation under a contract with Joerg Sonnenberger.
|
| 1.3 | 20-Feb-2011 |
rmind | Sprinkle some RCS IDs.
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 28-Feb-2010 |
matt | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
file cpu_subr.c was initially added on branch matt-nb5-mips64.
|
| 1.1.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.1.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.26 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.1.2.25 | 27-Feb-2012 |
matt | Count all traps types.
|
| 1.1.2.24 | 16-Feb-2012 |
matt | When booting a N32 MP kernel, make sure to setup the ksegx mapping.
|
| 1.1.2.23 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.1.2.22 | 06-Dec-2011 |
matt | Allocate the locks from the same page we allocate the cpu_info and
pmap_tlb_info structure. This assures they will be in KSEG0.
|
| 1.1.2.21 | 03-Dec-2011 |
matt | Rework things a bit for the XLR/XLS/XLP TLB. Before dealing with the TLB when
MP on the XL?, disable interrupts and take out a lock to prevent concurrent
updates to the TLB. In the TLB miss and invalid exception handlers, if the
lock is already owned by another CPU, simply return from the exception and
let it continue or restart as appropriate. This prevents concurrent TLB
exceptions in multiple threads from possibly updating the TLB multiple times
for a single address.
|
| 1.1.2.20 | 29-Nov-2011 |
matt | Take part of the KSEG2 space and use it to "almost" direct another 256MB
of memory so that N32 kernels can make use of ram outside of KSEG0. This
allows N32 kernels to be useful on systems with 4GB of RAM or more.
|
| 1.1.2.19 | 28-May-2011 |
cliff | use "intr" instead of "int" for clock evcnt names
|
| 1.1.2.18 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.1.2.17 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.16 | 08-Feb-2011 |
cliff | - rename ddb_running_on_this_cpu to ddb_running_on_this_cpu_p
according to pedicate unction naming style convention
|
| 1.1.2.15 | 08-Feb-2011 |
cliff | - add cpuid column to table displayed by cpu_debug_dump()
|
| 1.1.2.14 | 05-Feb-2011 |
cliff | - add ddb related includes
- convert 'cpus_running' et. al. to mips_cpuset_t, and use CPUSET_* macros
- add IPI broadcast, multicast functions
- add IPI halt, pause, resume, functions and related, useful for MP ddb
|
| 1.1.2.13 | 22-Dec-2010 |
matt | Allocate page from anywhere in KSEG0, not just the first 256MB.
|
| 1.1.2.12 | 01-Sep-2010 |
matt | Fill cpu_data cpu_{node,core,smt}_id for RMI.
|
| 1.1.2.11 | 19-Aug-2010 |
matt | cpu_signotify can be if the lwp is in LSSTOP too.
|
| 1.1.2.10 | 18-Aug-2010 |
matt | *** empty log message ***
|
| 1.1.2.9 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.1.2.8 | 30-Apr-2010 |
matt | In N32 kernel, cpu_setmcontext needs to deal O32 mcontext
|
| 1.1.2.7 | 24-Mar-2010 |
cliff | - use IPI_AST instead of IPI_NOP when forcing ast
- remove residual debug ipi from cpu_boot_secondary_processors()
|
| 1.1.2.6 | 21-Mar-2010 |
cliff | - in cpu_info_alloc, move calling pmap_tlb_info_attach() to
after called mi_cpu_attach(), so we dont trigger assert on
(ci->ci_data.cpu_idlelwp != NULL) in pmap_tlb_info_attach()
|
| 1.1.2.5 | 19-Mar-2010 |
matt | When booting the secondary processors, try to make the cpu_counter is
close to cpu0's counter.
|
| 1.1.2.4 | 11-Mar-2010 |
matt | Add MP-aware icache support.
|
| 1.1.2.3 | 01-Mar-2010 |
matt | Add a chip-dependent hook to locorew which cpu_hatch will call to do some
initialization that can only be done while running on the local CPU.
|
| 1.1.2.2 | 01-Mar-2010 |
matt | Add secondary processor spinup support (cpu_trampoline is in locore_mips3.S).
Nuke lse_boot_secondary_processors (not needed).
Move cpu_info_store to cpu_subr.C
|
| 1.1.2.1 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.14.8.1 | 21-May-2012 |
riz | Pull up following revision(s) (requested by martin in ticket #274):
sys/arch/amd64/amd64/process_machdep.c: revision 1.20
sys/kern/sys_lwp.c: revision 1.54
sys/arch/sparc64/sparc64/machdep.c: revision 1.267
sys/arch/mips/mips/cpu_subr.c: revision 1.16
sys/arch/vax/vax/machdep.c: revision 1.188
sys/sys/lwp.h: revision 1.161
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.98
sys/arch/alpha/alpha/machdep.c: revision 1.339
sys/compat/sys/ucontext.h: revision 1.6
sys/arch/hppa/hppa/hppa_machdep.c: revision 1.28
distrib/sets/lists/tests/mi: revision 1.469
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.42
tests/lib/libc/sys/t_lwp_create.c: revision 1.1
tests/lib/libc/sys/Makefile: revision 1.23
sys/arch/arm/arm/sig_machdep.c: revision 1.42
sys/arch/amd64/include/mcontext.h: revision 1.15
sys/arch/amd64/amd64/machdep.c: revision 1.183
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.99
sys/arch/i386/i386/machdep.c: revision 1.727
sys/compat/netbsd32/netbsd32_lwp.c: revision 1.13
sys/arch/sparc/sparc/machdep.c: revision 1.319
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.76
sys/arch/m68k/m68k/sig_machdep.c: revision 1.49
sys/sys/ucontext.h: revision 1.16
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.9
lib/libc/sys/_lwp_create.2: revision 1.5
Calling _lwp_create() with a bogus ucontext could trigger a kernel
assertion failure (and thus a crash in DIAGNOSTIC kernels). Independently
discovered by YAMAMOTO Takashi and Joel Sing.
To avoid this, introduce a cpu_mcontext_validate() function and move all
sanity checks from cpu_setmcontext() there. Also untangle the netbsd32
compat mess slightly and add a cpu_mcontext32_validate() cousin there.
Add an exhaustive atf test case, based partly on code from Joel Sing.
Should finally fix the remaining open part of PR kern/43903.
|
| 1.14.6.2 | 02-Jun-2012 |
mrg | sync to latest -current.
|
| 1.14.6.1 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.14.2.2 | 23-May-2012 |
yamt | sync with head.
|
| 1.14.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.16.12.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.16.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.16.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.17.4.5 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.17.4.4 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.17.4.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.17.4.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.17.4.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.27.2.2 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.27.2.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.30.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.31.4.1 | 11-May-2017 |
pgoyette | Sync with HEAD
|
| 1.32.2.1 | 09-Apr-2018 |
bouyer | Pull up following revision(s) (requested by msaitoh in ticket #722):
sys/arch/mips/mips/cpu_subr.c: revision 1.33
spl leak, found by mootja
|
| 1.33.4.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.33.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.33.2.1 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.34.4.1 | 19-Oct-2025 |
martin | Pull up following revision(s) (requested by riastradh in ticket #60):
sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
(all via patch)
paravirt_membar_sync(9): New memory barrier.
For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.
This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.
PR kern/59618: occasional virtio block device lock ups/hangs
mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o
PR kern/59618: occasional virtio block device lock ups/hangs
|
| 1.44.2.2 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.44.2.1 | 17-Jan-2020 |
ad | Sync with head.
|
| 1.62.4.1 | 19-Oct-2025 |
martin | Pull up following revision(s) (requested by riastradh in ticket #60):
sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32
(all via patch)
paravirt_membar_sync(9): New memory barrier.
For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.
This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.
PR kern/59618: occasional virtio block device lock ups/hangs
mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o
PR kern/59618: occasional virtio block device lock ups/hangs
|
| 1.64.8.1 | 19-Oct-2025 |
martin | Pull up following revision(s) (requested by riastradh in ticket #60):
sys/arch/sparc/sparc/locore.s: revision 1.287
share/man/man9/Makefile: revision 1.475
sys/arch/mips/mips/cpu_subr.c: revision 1.65
sys/arch/riscv/riscv/cpu_subr.c: revision 1.6
sys/arch/mips/mips/cpu_subr.c: revision 1.66
sys/arch/amd64/amd64/cpufunc.S: revision 1.70
common/lib/libc/arch/i386/atomic/atomic.S: revision 1.38
common/lib/libc/arch/sparc/atomic/membar_ops.S: revision 1.9
sys/arch/hppa/hppa/support.S: revision 1.9
sys/arch/alpha/alpha/locore.s: revision 1.145
share/man/man9/paravirt_membar_sync.9: revision 1.1
sys/arch/sparc64/sparc64/locore.s: revision 1.436
distrib/sets/lists/comp/mi: revision 1.2499
sys/arch/i386/i386/cpufunc.S: revision 1.54
common/lib/libc/arch/sparc64/atomic/membar_ops.S: revision 1.10
sys/sys/paravirt_membar.h: revision 1.1
sys/arch/arm/arm/cpu_subr.c: revision 1.6
sys/arch/virt68k/virt68k/locore.s: revision 1.17
common/lib/libc/arch/x86_64/atomic/atomic.S: revision 1.32
paravirt_membar_sync(9): New memory barrier.
For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.
This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus. Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.
PR kern/59618: occasional virtio block device lock ups/hangs
mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync. Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o
PR kern/59618: occasional virtio block device lock ups/hangs
|
| 1.43 | 23-May-2021 |
dholland | Improve ddb disassembly for mips (and riscv, cribbed from mips).
- use db_read_bytes to get instructions
- move the address check logic previously attached only to fetching
instructions for disassembly to db_read_bytes (and db_write_bytes)
Motivated by related x86 changes this afternoon.
Note that the address check logic is not as sophisticated as what the
x86 code does, but it's what we had before. (Except that riscv will
now also try to fetch usermode instructions instead of just failing.)
|
| 1.42 | 12-Apr-2021 |
simonb | branches: 1.42.2; 1.42.4;
Print target addresses similar to aarch64 as "address <sym+off>"
instead of "<sym+off> [addr:address]". Uses less columns, a bit
easier on the eyes.
|
| 1.41 | 07-Apr-2021 |
simonb | Add a # to a %x printf format to get some 0x hex number prefixes.
|
| 1.40 | 05-Apr-2021 |
simonb | Some QED instructions are included in MIPS32 and MIPS64 instruction sets.
Update a few comments.
|
| 1.39 | 05-Apr-2021 |
simonb | Fix cut'n'paste typo - OP_CVM_DMUL is dmul, not baddu.
|
| 1.38 | 05-Apr-2021 |
simonb | Tidy up NOP disassembly, handle "pause" as well.
|
| 1.37 | 05-Apr-2021 |
simonb | gcc/gas also emits "or ...,zero" as well as "addu/daddu ...,zero" for a
"move" pseudo instruction. Disassemble the "or" case as a "move" too.
|
| 1.36 | 05-Apr-2021 |
simonb | Allow disassembly in XKSEG for LP64 kernels. Can now x/i on modules
with an N64 kernel.
|
| 1.35 | 05-Apr-2021 |
simonb | For bc{0,1,2}{t,f} check for the TRUE value not the MASK value (even
though they're the same).
|
| 1.34 | 16-Mar-2021 |
simonb | branches: 1.34.2;
Disassemble TEQ correctly.
XXX: May be others that use this format?
|
| 1.33 | 17-Aug-2020 |
mrg | branches: 1.33.2;
add a "special3 offset" type of decode to ddb disasm so we see the
offsets properly decoded. add mips r6 "cache" insn.
avoid signed/unsigned compare and ufetch_32() for upcoming crash(8).
|
| 1.32 | 06-Apr-2019 |
thorpej | Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.31 | 27-Feb-2017 |
chs | branches: 1.31.14;
the second operand to cfc1/ctc1 isn't an FPU data register
so don't make it look like one.
|
| 1.30 | 27-Jun-2015 |
matt | branches: 1.30.2; 1.30.4;
Decode jr.hb and ssnop and few more spec3 instructions
u_int32_t -> uint32_t
|
| 1.29 | 15-Jun-2015 |
matt | Add decoder for ehb. Fix ins/ext instruction decoding
|
| 1.28 | 06-Jun-2015 |
matt | Make db_expr_t long long when using the N32 ABI.
|
| 1.27 | 06-Jun-2015 |
matt | Fix disassembly of trap-immediate instructions
|
| 1.26 | 04-Jun-2015 |
matt | Fix J/JAL address calculation to not throw the top 32-bits.
|
| 1.25 | 04-Jun-2015 |
matt | Add a lot of missing mipsNNr2 instruction + cavium specific instructions.
|
| 1.24 | 18-Aug-2011 |
matt | branches: 1.24.12; 1.24.30;
Change bcond/BCOND to regimm/REGIMM to better match the MIPS nomenclature.
|
| 1.23 | 10-Jul-2011 |
matt | More <machine/ include cleanup
|
| 1.22 | 29-Apr-2011 |
matt | add cop2 instructions
|
| 1.21 | 14-Dec-2009 |
matt | branches: 1.21.4; 1.21.6;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.20 | 06-Aug-2009 |
msaitoh | Add disassemble code for DMT, DMF, MTH and MFH.
|
| 1.19 | 28-Feb-2007 |
thorpej | branches: 1.19.44; 1.19.62;
TRUE -> true, FALSE -> false
|
| 1.18 | 22-Feb-2007 |
matt | Fix more boolean_t -> bool lossage
|
| 1.17 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.16 | 11-Dec-2005 |
christos | branches: 1.16.26;
merge ktrace-lwp.
|
| 1.15 | 01-Jun-2005 |
drochner | branches: 1.15.2;
adapt to DDB constification, and fix a shadow warning
|
| 1.14 | 30-May-2005 |
simonb | Deal with extra constiness in ddb.
|
| 1.13 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.12 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.11 | 04-Nov-2002 |
thorpej | branches: 1.11.6;
Add N32/N64 reg names.
|
| 1.10 | 22-Feb-2002 |
simonb | Note that "addu $x, $y, $0" is a "move" only in 32-bit mode.
XXX: need to revisit this.
|
| 1.9 | 22-Nov-2001 |
simonb | KNF, ANSIfy.
Change print_addr() to take an db_addr_t argument instead of a long.
|
| 1.8 | 22-Nov-2001 |
simonb | Update the CP0 register names.
Make some tables line up nicely.
Make print_addr() static.
|
| 1.7 | 10-Aug-2000 |
jeffs | branches: 1.7.4; 1.7.8;
In db_disasm() use fuword() to fetch user addresses. Mainly to avoid
bad EPCs from losing the initial ddb context when panicing, but also
helps with typos.
|
| 1.6 | 17-Jul-2000 |
jeffs | Pull in geocast mips ddb improvements and start bringing in kgdb support.
Add ddb support for QED opcodes, fill in enough routines so "next" usually
works, kdbpoke support for any size. Add callback that ports can hook when
entering and leaving ddb. This can be used for things like turning
off watchdogs while in ddb.
|
| 1.5 | 27-Dec-1999 |
castor | Add code to ensure delay slot is printed when disassembling.
|
| 1.4 | 24-Apr-1999 |
simonb | branches: 1.4.2;
Nuke register and remove trailling white space.
|
| 1.3 | 23-Mar-1999 |
simonb | branches: 1.3.4;
Include <machine/db_machdep.h> instead of <mips/db_machdep.h>.
|
| 1.2 | 17-Aug-1997 |
mhitch | Display jump and branch target with symbols if available.
Clean up indentation - seems to have gotten messed up when the mini-debug
routine was added.
|
| 1.1 | 07-Jul-1997 |
jonathan | branches: 1.1.2;
DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.1.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.3.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.4.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.7.8.3 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.7.8.2 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.7.8.1 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.7.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.7.4.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.11.6.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.11.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.11.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.11.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.15.2.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.15.2.1 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.16.26.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.16.26.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.19.62.5 | 04-Aug-2012 |
matt | disasm special2 and special3 opcodes (and ehb and ssnop too).
|
| 1.19.62.4 | 16-Feb-2012 |
matt | Change db_expr_t to an register_t so we can see the full register contents
on N32 kernels.
|
| 1.19.62.3 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.19.62.2 | 14-Nov-2009 |
matt | Switch from fu*/su* to ufetch_*/ustore_*. This make netbsd32 compat root
on a LP64 BE kernel.
|
| 1.19.62.1 | 23-Aug-2009 |
matt | PRIxVADDR, PRIdVSIZE, PRIxVSIZE, or PRIxPADDR as appropriate.
Use __intXX_t or __uintXX_t as appropriate in <mips/types.h>
|
| 1.19.44.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.19.44.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.21.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.21.4.1 | 31-May-2011 |
rmind | sync with head
|
| 1.24.30.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.24.30.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.24.30.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.24.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.30.4.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.30.2.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.31.14.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.33.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.34.2.1 | 17-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.42.4.1 | 31-May-2021 |
cjep | sync with head
|
| 1.42.2.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.99 | 19-Feb-2023 |
simonb | Adjust userspace comments in db_read_bytes() and db_write_bytes() to
match current reality.
|
| 1.98 | 19-Feb-2023 |
mlelstv | Only copyin/copyout from and to user addresses.
|
| 1.97 | 26-Oct-2022 |
riastradh | ddb/db_active.h: New home for extern db_active.
This can be included unconditionally, and db_active can then be
queried unconditionally; if DDB is not in the kernel, then db_active
is a constant zero. Reduces need for #include opt_ddb.h, #ifdef DDB.
|
| 1.96 | 15-Jan-2022 |
skrll | Add 'mach cpuinfo' support
|
| 1.95 | 15-Jan-2022 |
skrll | sort
|
| 1.94 | 23-May-2021 |
dholland | Improve ddb disassembly for mips (and riscv, cribbed from mips).
- use db_read_bytes to get instructions
- move the address check logic previously attached only to fetching
instructions for disassembly to db_read_bytes (and db_write_bytes)
Motivated by related x86 changes this afternoon.
Note that the address check logic is not as sophisticated as what the
x86 code does, but it's what we had before. (Except that riscv will
now also try to fetch usermode instructions instead of just failing.)
|
| 1.93 | 12-Apr-2021 |
mrg | branches: 1.93.2; 1.93.4;
avoid duplicate "ddb_regs" in crash with GCC 10 and -fcommon default.
|
| 1.92 | 23-Feb-2021 |
mrg | branches: 1.92.2;
introduce DDB_END_CMD and replace more than 20 copies of the same
list of NULLs and 0. idea from rillig@.
all touched ports built, several booted.
|
| 1.91 | 23-Aug-2020 |
simonb | branches: 1.91.2;
Add /v to show only valid TLBs.
Align tlb display nicely if > 100 TLBs.
Sort commands in the command dispatch function.
|
| 1.90 | 17-Aug-2020 |
mrg | port crash(8) to mips. (most of the kernel side.)
- expose parts of _KERNEL to _KMEMUSER as well
- hide more things for _KERNEL
- avoid DB_MACHINE_COMMANDS in crash(8)
- XXX add mips_label_t for !_KERNEL and use it in the pcb to
avoid conflicting with the ddb/crash one
- enable dumppcb
some changes to make stack trace fail instead of SEGV and
the userland changes to crash itself not part of this change.
|
| 1.89 | 15-Aug-2020 |
mrg | move stacktrace_subr() from trap.c into new mips_stacktrace.c so
it can be shared between ddb, other mips kernel components (see
locore), and an upcoming crash(8) port.
remove second copy of kdbpeek() (hidden by old DDB_TRACE
option, but they're functionally equivalent.)
tested on octeon.
ok simonb@
|
| 1.88 | 12-Aug-2020 |
skrll | Don't include mips/asm.h from a C file
|
| 1.87 | 01-Aug-2020 |
skrll | Trailing whitespace
|
| 1.86 | 26-Jul-2020 |
simonb | Rework "machine cp0" command and support macros to use CP0 reg defines
instead of magic numbers for CP0 regs with a select number.
|
| 1.85 | 13-Jul-2020 |
simonb | Make sure declaration of db_mach_reset_cmd() is available always, not
just #ifdef OCTEON.
|
| 1.84 | 13-Jul-2020 |
simonb | Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.
|
| 1.83 | 14-Jun-2020 |
simonb | Retire MIPS_CP0FL_USERLOCAL and MIPS_CP0FL_HWRENA and the flawed
logic that tried to deal with a MIPS processor that supports the ULR
CP0 register. Probe correctly and save probed info somewhere we can
actually use it. Avoids problems where libc expects ULR set to a
value but the CPU definition in the CPU table didn't have the right
combination of magic flags and thus never set ULR in the first place.
|
| 1.82 | 06-Apr-2019 |
thorpej | Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.81 | 04-Apr-2019 |
simonb | Consistently use db_printf() instead of printf() for machine specific
commands.
|
| 1.80 | 08-Feb-2018 |
bouyer | branches: 1.80.4;
Allow kdbpeek() to return failure. If it does, stop the stack trace.
Prevents an infinite loop in ddb if something goes wrong.
|
| 1.79 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.78 | 09-Jun-2015 |
martin | Fix printf formats for db_expr_t on 32bit kernels
|
| 1.77 | 06-Jun-2015 |
matt | Make db_expr_t long long when using the N32 ABI.
|
| 1.76 | 06-Jun-2015 |
matt | Add octeon mach commands nmi and reset. Teach DDB about Cavium BBIT branch
instructions.
|
| 1.75 | 18-Aug-2011 |
matt | branches: 1.75.12; 1.75.30;
Change bcond/BCOND to regimm/REGIMM to better match the MIPS nomenclature.
|
| 1.74 | 29-Apr-2011 |
matt | KNF cleanup.
|
| 1.73 | 14-Apr-2011 |
matt | Fix printing of watch{lo,hi} and make mipsNN_watchlo_* use intptr_t so that
sign extention happens.
|
| 1.72 | 14-Apr-2011 |
matt | Use .set arch=xlr to access RMI specific instructions.
|
| 1.71 | 14-Apr-2011 |
cliff | - option MIPS_DDB_WATCH is dedprecated, removed; now using
(MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0 for conditional
compile of db_mach_watch stuff
- MIPS CPU (COP0) watchpoint support moved from db_interface.c
to cpu_subr.c, cpu.h; ddb_mach_watch &etc now use those cpu functions.
- ddb_cpu now volatile
- 'struct db_mach_watch' definition &etc moved to mips/include/db_machdep.h
- db_mach_watch_tab is replaced by curcpu()->ci_watch_tab
to allow per-cpu watchpoint control
- improve MP function in kdb_trap()
- fix conditions for printing cp0 regs
|
| 1.70 | 06-Apr-2011 |
matt | minor cleanups. foo -> foo_p. add some whitespace.
|
| 1.69 | 03-Mar-2011 |
matt | Change MIPS_CP0FL_CONFIG*
Add MIPS_CP0FL_HWRENA and USERLOCAL
|
| 1.68 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.67 | 07-Jul-2010 |
chs | branches: 1.67.2; 1.67.4;
fix db_{read,write}_bytes() for unaligned addresses
(just copy a byte at a time, this isn't a performance path).
|
| 1.66 | 14-Dec-2009 |
matt | branches: 1.66.2; 1.66.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.65 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.64 | 23-May-2008 |
tsutsui | branches: 1.64.16;
Add simple help messages for MD machine commands on ddb(4).
PR port-mips/38306
|
| 1.63 | 17-Oct-2007 |
garbled | branches: 1.63.16; 1.63.18; 1.63.20; 1.63.22;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.62 | 22-Sep-2007 |
martin | Add a new option DDB_VERBOSE_HELP that adds online help to ddb.
From Adam Hamsik.
Minor modifications by me, all bugs are probably mine.
|
| 1.61 | 28-Feb-2007 |
thorpej | branches: 1.61.2; 1.61.10; 1.61.18; 1.61.20;
TRUE -> true, FALSE -> false
|
| 1.60 | 22-Feb-2007 |
matt | Fix more boolean_t -> bool lossage
|
| 1.59 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.58 | 26-Aug-2006 |
matt | branches: 1.58.8;
Use PRIx64 instead of llx
|
| 1.57 | 10-May-2006 |
skrll | Fix a bunch of cast lvalues.
|
| 1.56 | 21-Feb-2006 |
gdamore | branches: 1.56.2; 1.56.4; 1.56.6;
Show all 36-bits of paddr_t.
Approved by simonb@
|
| 1.55 | 24-Dec-2005 |
perry | branches: 1.55.2; 1.55.4; 1.55.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.54 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.53 | 01-Jun-2005 |
drochner | branches: 1.53.2;
adapt to DDB constification, and fix a shadow warning
|
| 1.52 | 01-Jan-2005 |
simonb | Use "NULL" instead of "(something-or-other *)0".
|
| 1.51 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.50 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.49 | 29-Jun-2003 |
fvdl | branches: 1.49.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.48 | 29-Jun-2003 |
simonb | Don't use "extern" with functions.
|
| 1.47 | 24-May-2003 |
kristerw | Make lint happy by changing asm to __asm.
|
| 1.46 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.45 | 04-Nov-2002 |
thorpej | Use named indices for RA, SR, MULLO, MULHI, and EPC in the
trapframe.
|
| 1.44 | 04-Nov-2002 |
thorpej | Use named indices for trapframe slots, and use the TA0-TA3 names
where appropriate.
|
| 1.43 | 31-May-2002 |
thorpej | Fix printf format issues.
|
| 1.42 | 11-Mar-2002 |
uch | branches: 1.42.4;
make this compile and work with MIPS3_5900.
|
| 1.41 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
- Add a command to dump cp0 state.
|
| 1.40 | 15-Feb-2002 |
simonb | Make the ddb_regs declaration an extern in db_machdep.h and declare it on
db_interface.c.
|
| 1.39 | 12-Jan-2002 |
enami | Define new macro to access FSR register and use it.
|
| 1.38 | 14-Nov-2001 |
thorpej | branches: 1.38.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.37 | 27-Aug-2001 |
simonb | branches: 1.37.4;
ANSIfy, KNF.
|
| 1.36 | 30-May-2001 |
lukem | branches: 1.36.2;
add missing #include "opt_kgdb.h"
|
| 1.35 | 22-Jan-2001 |
jdolecek | branches: 1.35.2;
Require the machine-dependant DDB commands to be in db_machine_command_table[]
and link it directly to db_command_table[] so that it's not necessary
to do this at runtime. Make db_machine_command_table[] const on all ports.
g/c now unneded stuff, like db_machine_commands_install(), db_machine_init()
Patch written by enami.
|
| 1.34 | 09-Nov-2000 |
thorpej | Use 64-bit printf formats for paddr_t's (for arc port).
|
| 1.33 | 05-Oct-2000 |
cgd | tweak cpu_arch. Eliminate all direct checks of it (making them
use the macro CPUISMIPS3 -- which is badly misnamed), and set it
from #defines named CPU_ARCH_N (where N is 1..5, 32, 64).
|
| 1.32 | 10-Aug-2000 |
jeffs | Tweak to compile with printf format changes.
|
| 1.31 | 17-Jul-2000 |
jeffs | Move platform db_trap callback from arch/mips into ddb as suggested by
jhawk. This callback is used by platform code to manage things like
watchdogs that should be disabled while in ddb. Done as a callback
for processors such as mips that support lots of different systems.
|
| 1.30 | 17-Jul-2000 |
jeffs | Pull in geocast mips ddb improvements and start bringing in kgdb support.
Add ddb support for QED opcodes, fill in enough routines so "next" usually
works, kdbpoke support for any size. Add callback that ports can hook when
entering and leaving ddb. This can be used for things like turning
off watchdogs while in ddb.
|
| 1.29 | 29-Jun-2000 |
mrg | remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.28 | 09-Jun-2000 |
soda | rename
vad_to_pfn() -> mips_paddr_to_tlbpfn()
pfn_to_vad() -> mips_tlbpfn_to_paddr()
as suggested by thorpej on port-mips Mar 27.
|
| 1.27 | 21-May-2000 |
soren | branches: 1.27.2;
MIPS 'mach halt' does nothing MD, so nuke it.
|
| 1.26 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.25 | 18-Feb-2000 |
mycroft | Take a whack at allowing sN, sp and gp to be set from DDB, too.
|
| 1.24 | 17-Feb-2000 |
mycroft | Allow vN, aN, tN, ra, sr, mul[lo,hi] and pc to be set from DDB. sN requires
more work.
|
| 1.23 | 26-Jan-2000 |
soren | We don't really have 'mach trapdump'.
|
| 1.22 | 29-Nov-1999 |
uch | TX3912/22 support. ENABLE_MIPS_TX3900 enables it.
|
| 1.21 | 28-Oct-1999 |
lukem | sort mips_db_command_table
|
| 1.20 | 12-Oct-1999 |
jdolecek | branches: 1.20.2; 1.20.4;
rename the MD Debugger() to cpu_Debugger()
add MI Debugger() which switches to console if wscons is used prior
to calling cpu_Debugger()
|
| 1.19 | 11-Oct-1999 |
shin | fix mips3 TLB printf format
|
| 1.18 | 25-Sep-1999 |
shin | branches: 1.18.2;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.17 | 27-May-1999 |
nisimura | - Change a symbolic name of TLB entrylo from 'PG_M' to 'PG_D' to reflect
processor design. MIPS 'dirty bit' is not the same as i386 'dirty bit'.
There is a growing concern of misuse in NetBSD/mips.
|
| 1.16 | 20-May-1999 |
nisimura | - Make tlb dump DDB command have 'D' indication for TLB 'dirty bit'. MIPS
processor is one of processors with no 'referenced bit' nor 'modified bit'
processor machinary. Those functions are implemented combining two
hardware bits, 'dirty bit' and 'valid bit', with TLBmod exception handler.
|
| 1.15 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.14 | 23-Mar-1999 |
simonb | branches: 1.14.4;
Include <machine/db_machdep.h> instead of <mips/db_machdep.h>.
|
| 1.13 | 13-Mar-1999 |
drochner | pull in a part of [nisimura-pmax-wscons] rev 1.5.4.3: remove unneeded
kdbpeek() prototype
|
| 1.12 | 06-Mar-1999 |
jonathan | DDB command `mach kvotop' to map kernel-virtual addreses to physical addresses.
|
| 1.11 | 28-Jan-1999 |
nisimura | - Restore descriptive comments lost in the last commit.
- XXX Put a note that local DDB command 'trapdump' is not available. XXX
|
| 1.10 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.9 | 07-Jan-1999 |
nisimura | - Put comments on several DDB helper routines.
|
| 1.8 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.7 | 25-Nov-1998 |
nisimura | - Fix two bugs; inst_call() is supposed to check OP_SPECIAL opcode with
either OP_JR function code or *OP_JALR* function code (not OP_JAL opcode).
insn_unconditional_flow_transfer() was to read an unintialized variable.
Those MD DDB routines seems not useful work so far.
|
| 1.6 | 28-Oct-1998 |
jonathan | Add missing braces pointed out by egcs.
|
| 1.5 | 04-Jul-1998 |
jonathan | branches: 1.5.4;
defopt DDB.
|
| 1.4 | 06-Dec-1997 |
mhitch | Someone forgot to update db_tlbdump_cmd() when adding the printf routine
to the TLB dump routines arguements. Machines would die horibbly when
trying to dump the TLB entries in DDB. Also don't explicitly "page" the
output, since db_printf takes care of that.
|
| 1.3 | 11-Nov-1997 |
mhitch | The address used by mips1_FlushICache() is a virtual address, not a physical
address. This caused DDB to hang the machine hard when trying to set a
breakpoint.
|
| 1.2 | 07-Jul-1997 |
jonathan | branches: 1.2.6;
Force write-back of D-cache after doing DDB writes on mips3. Flushing
the Icache is not sufficient: a mips3 can write a new insn into
writeback L1 Dcache, leaving stale instructions in the mixed L2 cache.
|
| 1.1 | 07-Jul-1997 |
jonathan | DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.2.6.2 | 09-Dec-1997 |
thorpej | Sync w/ trunk: fix priting of TLB entries. (mhitch)
|
| 1.2.6.1 | 12-Nov-1997 |
mellon | Pull rev 1.3 up from trunk (mhitch)
|
| 1.5.4.4 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.5.4.3 | 14-Nov-1998 |
drochner | fix egcs warnings
kdbpeek() prototype cleanup, ala PR port-mips/5252
|
| 1.5.4.2 | 21-Oct-1998 |
nisimura | - Correct format errors in "machine tlb" DDB command.
|
| 1.5.4.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.14.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.18.2.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.20.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.20.2.3 | 11-Feb-2001 |
bouyer | Sync with HEAD.
|
| 1.20.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.20.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.27.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.35.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.36.2.5 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.36.2.4 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.36.2.3 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.36.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.36.2.1 | 13-Sep-2001 |
thorpej | Update the kqueue branch to HEAD.
|
| 1.37.4.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.38.2.9 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.38.2.8 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.38.2.7 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.38.2.6 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.38.2.5 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.38.2.4 | 01-Feb-2002 |
gmcgarry | Pull-up cache ops from -current
|
| 1.38.2.3 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.38.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.38.2.1 | 14-Nov-2001 |
wdk | file db_interface.c was added on branch nathanw_sa on 2001-11-17 23:43:41 +0000
|
| 1.42.4.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.49.2.5 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.49.2.4 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.49.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.49.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.49.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.53.2.5 | 27-Oct-2007 |
yamt | sync with head.
|
| 1.53.2.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.53.2.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.53.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.53.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.55.6.2 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.55.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.55.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.55.2.1 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.56.6.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.56.4.1 | 11-May-2006 |
elad | sync with head
|
| 1.56.2.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.56.2.1 | 24-May-2006 |
yamt | sync with head.
|
| 1.58.8.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.58.8.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.61.20.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.61.18.1 | 02-Oct-2007 |
joerg | Sync with HEAD.
|
| 1.61.10.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.61.2.1 | 09-Oct-2007 |
ad | Sync with head.
|
| 1.63.22.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.63.20.3 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.63.20.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.63.20.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.63.18.1 | 04-Jun-2008 |
yamt | sync with head
|
| 1.63.16.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.64.16.25 | 27-Feb-2012 |
matt | Make sure to properly cast pointers.
|
| 1.64.16.24 | 16-Feb-2012 |
matt | Change db_expr_t to an register_t so we can see the full register contents
on N32 kernels.
|
| 1.64.16.23 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.64.16.22 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.64.16.21 | 08-Feb-2011 |
cliff | - cpu index variables (ddb_cpu, cpu_me) are now type u_int
- can now cpu_number() instead of cpu_index(curcpu())
since they are the same.
|
| 1.64.16.20 | 08-Feb-2011 |
cliff | - rename ddb_running_on_this_cpu to ddb_running_on_this_cpu_p
according to pedicate unction naming style convention
|
| 1.64.16.19 | 05-Feb-2011 |
cliff | - add suport for MP ddb
- add 'mach watch' command and related to enable ddb use of MIPS CP0 watchpoint
operator may specify one or more of rwx access mode qualifiers,
optional mask, and optional asid. with no args, 'mach watch' dumps the
CP0 watchpoints table.
- 'mach unwatch' command deletes entries from the table; either
a) all entries matching an optional address, or
b) with no address specified, deletes all entries.
- fix 'mach cp0' dump of CP0 watchhi, watchlo regs
- fix opcode in 'mach mtcr' command function
|
| 1.64.16.18 | 29-Dec-2010 |
matt | Move away from StudlyCaps. Simply a few routines.
|
| 1.64.16.17 | 24-Dec-2010 |
matt | Just use the generic tlb_read_indexed instead of the mips1 specific version.
|
| 1.64.16.16 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.64.16.15 | 26-Jan-2010 |
cliff | fix macros used for printing cp0 regs
|
| 1.64.16.14 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.64.16.13 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.64.16.12 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.64.16.11 | 28-Dec-2009 |
matt | Use MIPS64_XLS for mtcr/mfcr commands
|
| 1.64.16.10 | 17-Nov-2009 |
matt | Made mfcr/mtcf dependent on MIPS64
|
| 1.64.16.9 | 16-Nov-2009 |
cliff | fix some typos in asm()'s
|
| 1.64.16.8 | 13-Nov-2009 |
cliff | - in SHOW64 macro remove extraneous 'x' in printf format
- in MIPS64_SHOW32 macro add push and pop directives
- use mycpu->cpu_cp0flags to determine whether various CP0 regs exist
- use CPU_MIPS_HAVE_MxCR to determine whether mfcr, mtcr insns are available
- use asm() to inline mfcr, mtcr ops instead of calling
MIPS-implementation-specific subroutines
|
| 1.64.16.7 | 09-Nov-2009 |
cliff | arch/mips/mips/db_interface.c
- add MIPS64_SHOW32() and MIPS64_SHOW64() macros
to show MIPS64 specific cp0 regs
- add EIRR, EIMR, EBASE, CONFIG[0,1,7] to show regs
>>> these switched by runtime vairable is_rmi_xls
is there a better variable to use ???
cpu_arch == 64 ??
- add mach mtcr, mfcr MD ddb commande
>>> these are not runtime switched based on cpu arch,
they are just 'there'
if you use them on the wrong CPU, it's your problem!
|
| 1.64.16.6 | 15-Sep-2009 |
matt | Add a CPU_MIPS_NO_LLADDR flag / MIPS_HAS_LLADDR macro. And use to determine
whether to printf lladdr COP0 register
|
| 1.64.16.5 | 13-Sep-2009 |
cliff | CP0 ECC and CACHE_ERR "not implemented" on RMI XLS, so avoid accessing them
|
| 1.64.16.4 | 07-Sep-2009 |
matt | Use the new symbolic constants for label_t.
Use label_t where appropriate.
Add some LP64 KASSERTs
|
| 1.64.16.3 | 06-Sep-2009 |
matt | Use VM_MIN_KERNEL_ADDRESS and VM_MAX_KERNEL_ADDRESS instead of MIPS_KSEG2_START
|
| 1.64.16.2 | 23-Aug-2009 |
matt | taken curlwp == NULL check.
|
| 1.64.16.1 | 20-Aug-2009 |
matt | No need to cast to (struct frame *) anymore.
|
| 1.66.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.66.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.66.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.66.2.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.67.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.67.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.75.30.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.75.30.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.75.30.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.75.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.80.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.91.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.92.2.1 | 17-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.93.4.1 | 31-May-2021 |
cjep | sync with head
|
| 1.93.2.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.50 | 10-Feb-2021 |
simonb | On MIPS use a helper function to work out the current PC and then
call stacktrace_subr() directly for displaying a stacktrace with
db_stacktrace() and friends.
|
| 1.49 | 09-Feb-2021 |
simonb | Remove a macro that has never been used.
|
| 1.48 | 09-Feb-2021 |
simonb | Trailing whitespace, remove extra blank line.
|
| 1.47 | 26-Sep-2020 |
mrg | branches: 1.47.2;
redo much of rev 1.45 and make the _KERNEL path look like it
used to before.
while it uses less total lines of code and looks less ugly,
the merged crash+ddb code here is less correct and harder to
follow for the kernel path.
|
| 1.46 | 26-Sep-2020 |
simonb | Including <ddb/db_access.h> once should be sufficient.
|
| 1.45 | 17-Aug-2020 |
mrg | mostly complete basic port of crash(8) to mips.
tested on mipsel and mips64eb. basic functionality works
on the running kernel, not yet tested on crash dumps.
|
| 1.44 | 15-Aug-2020 |
mrg | move stacktrace_subr() from trap.c into new mips_stacktrace.c so
it can be shared between ddb, other mips kernel components (see
locore), and an upcoming crash(8) port.
remove second copy of kdbpeek() (hidden by old DDB_TRACE
option, but they're functionally equivalent.)
tested on octeon.
ok simonb@
|
| 1.43 | 06-Jun-2015 |
matt | Make db_expr_t long long when using the N32 ABI.
|
| 1.42 | 29-Apr-2011 |
matt | branches: 1.42.14; 1.42.32;
Add whitespace
|
| 1.41 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.40 | 07-Jul-2010 |
chs | branches: 1.40.2; 1.40.4;
add "trace/a" to trace by LWP address.
|
| 1.39 | 01-Jul-2010 |
rmind | Remove pfind() and pgfind(), fix locking in various broken uses of these.
Rename real routines to proc_find() and pgrp_find(), remove PFIND_* flags
and have consistent behaviour. Provide proc_find_raw() for special cases.
Fix memory leak in sysctl_proc_corename().
COMPAT_LINUX: rework ptrace() locking, minimise differences between
different versions per-arch.
Note: while this change adds some formal cosmetics for COMPAT_DARWIN and
COMPAT_IRIX - locking there is utterly broken (for ages).
Fixes PR/43176.
|
| 1.38 | 14-Dec-2009 |
matt | branches: 1.38.2; 1.38.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.37 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.36 | 21-Oct-2009 |
rmind | Remove uarea swap-out functionality:
- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.
Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).
Discussed on <tech-kern>, reviewed by <ad>.
|
| 1.35 | 17-Oct-2007 |
garbled | branches: 1.35.20; 1.35.38;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.34 | 17-May-2007 |
yamt | branches: 1.34.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.33 | 22-Feb-2007 |
matt | branches: 1.33.4; 1.33.6; 1.33.12;
Fix more boolean_t -> bool lossage
|
| 1.32 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.31 | 17-Feb-2007 |
pavel | Change the process/lwp flags seen by userland via sysctl back to the
P_*/L_* naming convention, and rename the in-kernel flags to avoid
conflict. (P_ -> PK_, L_ -> LW_ ). Add back the (now unused) LSDEAD
constant.
Restores source compatibility with pre-newlock2 tools like ps or top.
Reviewed by Andrew Doran.
|
| 1.30 | 26-Dec-2006 |
martin | branches: 1.30.2;
Make the DDB_TRACE variant compilable
|
| 1.29 | 06-Sep-2006 |
ad | branches: 1.29.2;
Use p_find(addr, PFIND_LOCKED) in case the proclist_lock is held.
|
| 1.28 | 26-Aug-2006 |
tsutsui | No need #include <machine/param.h> since #include <sys/param.h> is enough.
|
| 1.27 | 11-Dec-2005 |
christos | branches: 1.27.4; 1.27.8;
merge ktrace-lwp.
|
| 1.26 | 30-May-2005 |
simonb | branches: 1.26.2;
Deal with extra constiness in ddb.
|
| 1.25 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.24 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.23 | 17-Jan-2003 |
thorpej | branches: 1.23.2;
Merge the nathanw_sa branch.
|
| 1.22 | 04-Nov-2002 |
thorpej | Add N32 register vars.
|
| 1.21 | 05-Mar-2002 |
simonb | ANSIfy.
|
| 1.20 | 22-Nov-2001 |
simonb | KNF, ANSIfy.
Change print_addr() to take an db_addr_t argument instead of a long.
|
| 1.19 | 06-May-2001 |
simonb | branches: 1.19.2; 1.19.8;
Remove prototype for non-existant function.
|
| 1.18 | 19-Jan-2001 |
shin | branches: 1.18.2;
- fix prototype of db_mips_variable_func().
|
| 1.17 | 18-Jan-2001 |
jdolecek | make db_[e]regs[] const
|
| 1.16 | 19-Sep-2000 |
jeffs | Add trace/t pid support for mips.
|
| 1.15 | 26-Jun-2000 |
mrg | <vm/vm_param.h> -> <uvm/uvm_param.h>
|
| 1.14 | 27-May-2000 |
enami | No longer need to include sys/types.h.
|
| 1.13 | 27-May-2000 |
soren | Include <sys/param.h> to make the new cpu.h happy.
|
| 1.12 | 26-May-2000 |
mhitch | Fix typo (stray " where it shouldn't be).
|
| 1.11 | 26-May-2000 |
jhawk | Rename the machine-specific stack trace printing functions
from db_stack_trace_cmd() to db_stack_trace_print(),
and add an additional argument, a function pointer for an
output routine (i.e. printf() or db_printf()).
Add db_stack_trace_cmd() in db_command.[ch], calling
db_stack_trace_print() with db_printf() as the printer.
Move count==-1 special handling from db_stack_trace_print() [nee
db_stack_trace_cmd()] to db_stack_trace_cmd() [nascent here].
Again, I'm unable to test compilation on all affected platforms,
so advance apologies for potential brokenness.
|
| 1.10 | 30-Mar-2000 |
simonb | Nuke register, diddle a bit of indentation in some function declarations.
|
| 1.9 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.8 | 24-Apr-1999 |
simonb | branches: 1.8.2;
Nuke register and remove trailling white space.
|
| 1.7 | 23-Mar-1999 |
simonb | branches: 1.7.4;
Include <machine/db_machdep.h> instead of <mips/db_machdep.h>.
|
| 1.6 | 16-Jan-1999 |
nisimura | - Replace the stub value of 'eret' instruction with correct one.
|
| 1.5 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.4 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.3 | 02-Feb-1998 |
jonathan | branches: 1.3.4;
Delete incorrect private declaration of db_maxoff.
|
| 1.2 | 05-Jan-1998 |
perry | RCSID Police.
|
| 1.1 | 07-Jul-1997 |
jonathan | DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.3.4.1 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.7.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.8.2.2 | 11-Feb-2001 |
bouyer | Sync with HEAD.
|
| 1.8.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.18.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.19.8.6 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.19.8.5 | 12-Jul-2002 |
nathanw | No longer need to pull in lwp.h; proc.h pulls it in for us.
|
| 1.19.8.4 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.19.8.3 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.19.8.2 | 15-Dec-2001 |
gmcgarry | lwp'ify
|
| 1.19.8.1 | 06-May-2001 |
gmcgarry | file db_trace.c was added on branch nathanw_sa on 2001-12-15 07:09:12 +0000
|
| 1.19.2.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.19.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.23.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.23.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.23.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.23.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.26.2.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.26.2.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.26.2.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.27.8.2 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.27.8.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.27.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.29.2.1 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.30.2.2 | 21-Mar-2007 |
ad | Initial changes for MIPS. Not yet working under gxemul.
|
| 1.30.2.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.33.12.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.33.6.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.33.4.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.34.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.35.38.6 | 16-Feb-2012 |
matt | Change db_expr_t to an register_t so we can see the full register contents
on N32 kernels.
|
| 1.35.38.5 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.35.38.4 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.35.38.3 | 07-Sep-2009 |
matt | Use the new symbolic constants for label_t.
Use label_t where appropriate.
Add some LP64 KASSERTs
|
| 1.35.38.2 | 23-Aug-2009 |
uebayasi | Make ddb(4) trace work on 64-bit ABIs.
For now:
- Values are shown in 32-bit.
- Only 4 arguments are shown.
- DDB_TRACE (heuristic version) is left as is.
Reviewed By: matt
|
| 1.35.38.1 | 21-Aug-2009 |
matt | Cleanup types for stacktrace_subr()
|
| 1.35.20.2 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.35.20.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.38.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.38.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.38.4.1 | 03-Jul-2010 |
rmind | sync with head
|
| 1.38.2.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.40.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.40.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.42.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.42.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.47.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.16 | 08-Apr-2000 |
soren | This file has been superseded by the MI ELF code.
|
| 1.15 | 25-Oct-1999 |
kleink | Update to match new SVR4-style definition names in <sys/exec_elf.h>.
|
| 1.14 | 30-Apr-1999 |
cgd | branches: 1.14.2; 1.14.4; 1.14.6;
ep_arglen is in units of 'sizeof (char *)', not in units of bytes. use
howmany(value, sizeof (char *)) to get the right value.
|
| 1.13 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.12 | 05-Sep-1998 |
christos | branches: 1.12.10;
Assign copyright to TNF.
|
| 1.11 | 28-Jul-1998 |
thorpej | Change the "aresid" argument of vn_rdwr() from an int * to a size_t *,
to match the new uio_resid type.
|
| 1.10 | 26-Jun-1998 |
thorpej | defopt COMPAT_SVR4
|
| 1.9 | 25-Jun-1998 |
thorpej | defopt COMPAT_LINUX
|
| 1.8 | 22-Jan-1998 |
thorpej | Generate dependencies on the exec format options EXEC_AOUT, EXEC_ECOFF,
EXEC_ELF32, EXEC_ELF64, and EXEC_SCRIPT.
|
| 1.7 | 13-Oct-1996 |
christos | backout previous kprintf change
|
| 1.6 | 11-Oct-1996 |
christos | printf -> kprintf
|
| 1.5 | 07-Oct-1996 |
jonathan | Fix for elf{32,64} changes: make <mips/reloc.h> re-includable,
Use elf_xxx section names (not elf32_xxx)in mips/mips/elf.c
|
| 1.4 | 20-Jun-1996 |
jonathan | Explictly credit Per Fogelstrom for the mips shared library support in elf.c,
which was taken from OpenBSD/pica.
The previous revision of elf.c replaced Ted Lemon's elf exec machinery
with something closer to Christos' MI elf machinery. It turns out
that old NetBSD/pmax elf binaries have three segments, and the newer
elf exec machinery cannot exec them.
The old elf exec machinery is folded back into cpu_exec.c, which falls
back onto using the old machinery if the new machinery fails. The
old-style binaries will be deprecated at the 1.2 release.
|
| 1.3 | 17-Jun-1996 |
jonathan | Update mipspmax elf exec support:
* Update arch/mips/mips/cpu_exec.c to include MI exec_elf.h header,
and to use the MI interface exec_elf_makecmds().
* Replace arch/mips/mips/elf.c (Ted Lemon's elf code) with
a version of Christos's MI elf exec code, munged to support demand paging
and mips shared libraries.
|
| 1.2 | 23-Mar-1996 |
jonathan | branches: 1.2.4;
Rename "pmax_elf_makecmds()" to "mips_elf_makecmds()".x
|
| 1.1 | 18-Jan-1995 |
mellon | Support for loading ELF on NetBSD/pmax - to be combined with elf loader under sys/compat later
|
| 1.2.4.2 | 24-Jun-1996 |
jtc | Pull up from trunk.
Restores some code removed ~10 days ago which turns out to be necessary
for running some old NetBSD executables.
|
| 1.2.4.1 | 17-Jun-1996 |
jonathan | Pull up elf changes from trunk:
>Update mipspmax elf exec support:
> * Update arch/mips/mips/cpu_exec.c to include MI exec_elf.h header,
> and to use the MI interface exec_elf_makecmds().
> * Replace arch/mips/mips/elf.c (Ted Lemon's elf code) with
> a version of Christos's MI elf exec code, munged to support demand paging
> and mips shared libraries.
|
| 1.12.10.2 | 04-Jul-1999 |
chs | after setting VTEXT on a vnode, flush any UBC mappings
to try to prevent unnecessary VAC aliases.
|
| 1.12.10.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.14.6.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.14.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.14.2.1 | 20-Nov-2000 |
bouyer | Remove files that are no longer on the trunck
|
| 1.60 | 03-May-2025 |
riastradh | mips: Include opt_cputype.h before any of the flags it defines.
PR port-evbmips/59385: PGSHIFT is inconsistently defined on MIPS
|
| 1.59 | 05-Dec-2021 |
msaitoh | branches: 1.59.10;
s/funtion/function/ in comment.
|
| 1.58 | 29-May-2021 |
simonb | Update the FPU register names and bit definitions to something somewhat
modern (MIPS32/MIPS64) and convert to __BIT/__BITS.
|
| 1.57 | 24-May-2021 |
simonb | Whitespace alignment nit.
|
| 1.56 | 13-May-2021 |
simonb | Update ISA for some "L" variant instructions after checking the R4400 UM.
|
| 1.55 | 13-May-2021 |
simonb | Note which ISA the unimplemented instructions belong to.
|
| 1.54 | 29-Apr-2021 |
simonb | branches: 1.54.2;
Fix another misplaced label for cvt_s_w() but use a named local label
and redo fix for cvt_d_w() in rev 1.52 the same way.
|
| 1.53 | 29-Apr-2021 |
simonb | Move a comment slighty so that it's before two #ifdef blocks that do the
same thing instead of in the middle of them.
|
| 1.52 | 29-Apr-2021 |
simonb | Move a branch target in cvt_d_w() to where it will be hit for either
case of an #ifdef block of code. Fixes an FP emulation problem if
compiled with -mips32 or -mips64.
|
| 1.51 | 25-Jun-2020 |
simonb | branches: 1.51.6;
Fix a tyop in a comment.
|
| 1.50 | 06-Apr-2019 |
thorpej | Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.49 | 19-Dec-2018 |
riastradh | Load curlwp into a0 to call fpu_save(curlwp), not fpu_save(garbage).
The lwp argument to fpu_save was added by chuq in revision 1.14 of
mips_fpu.c, but this call was not updated to pass it. This is the
correct lwp to pass because we are in the middle of executing a
kernel-emulated fp instruction, so curlwp must own the fpu state, and
we are trying to write the fp registers to memory so we can adjust
them there when ctc1 would fail.
Fixes PR port-cobalt/53090, PR port-sgimips/53791.
|
| 1.48 | 27-Feb-2017 |
chs | branches: 1.48.6; 1.48.12; 1.48.14;
in mips_emul_fp(), clear all pending FP exceptions rather than
just a particular one, otherwise the kernel can take another
FPU trap when it writes back the new FCSR value.
discovered via the fesetround() bug that wrote garbage to the FCSR.
|
| 1.47 | 13-Oct-2016 |
macallan | branches: 1.47.2;
include locore.h so MIPS3_PLUS is visible and we build support for MIPS-III
and newer FPUs as needed
no more SIGILLs on trunc.d.* with n32 userlands
|
| 1.46 | 08-Jun-2015 |
matt | branches: 1.46.2;
#include <mips/cpuregs.h>
|
| 1.45 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.44 | 16-Aug-2011 |
matt | branches: 1.44.12; 1.44.30;
Only jump through t9/ra (or k0) to help avoid hitting
the Loongson2 jump problem.
|
| 1.43 | 26-Feb-2011 |
tsutsui | Use mips_fpexcept() instead of fpemul_trapsignal() to deliver SIGFPE,
and remove now unused fpemul_trapsignal() introduced for PR port-mips/26410.
Fixes PR port-mips/35326 and now t_except unmasked tests in
/usr/tests/lib/libc/ieeefp pass.
Note t_subnormal double test still fails as mentioned in PR port-mips/44639.
|
| 1.42 | 26-Feb-2011 |
tsutsui | Use proper CALLFRAME_FRAME and CALLFRAME_CAUSE macro.
XXX: is it safe to use (CALLFRAME_SIZ + 3*SZREG(sp)) to save FSR?
|
| 1.41 | 26-Feb-2011 |
tsutsui | Use mips_fpuillinst() instead of fpemul_trapsignal() to deliver SIGILL.
|
| 1.40 | 25-Feb-2011 |
tsutsui | Fix cvt.d.s per analysis by Marcus Comstedt in PR port-mips/36251.
Confirmed on ews4800mips.
|
| 1.39 | 24-Feb-2011 |
tsutsui | Resurrect silently removed lines in rev 1.37 that update FPU_CSR
in double's inexact or overflow cases.
Now the following tests are passed:
---
tp-start: t_except, 6
tc-start: masked_double
tc-end: masked_double, passed
:
tc-start: masked_long_double
tc-end: masked_long_double, passed
:
tp-start: t_subnormal, 2
tc-start: test_double
tc-end: test_double, passed
---
The following ones still fail:
---
tp-start: t_except, 6
:
tc-start: unmasked_double
tc-se:*** Check failed: /usr/src/tests/lib/libc/ieeefp/t_except.c:269: sicode != t->sicode
tc-end: unmasked_double, failed, 1 checks failed; see output for more details
tc-start: unmasked_float
tc-se:*** Check failed: /usr/src/tests/lib/libc/ieeefp/t_except.c:269: sicode != t->sicode
tc-end: unmasked_float, failed, 1 checks failed; see output for more details
tc-start: unmasked_long_double
tc-se:*** Check failed: /usr/src/tests/lib/libc/ieeefp/t_except.c:269: sicode != t->sicode
tc-end: unmasked_long_double, failed, 1 checks failed; see output for more details
tp-end: t_except
:
tp-start: t_subnormal, 2
:
tc-start: test_float
tc-end: test_float, failed, Test program received signal 4 (core dumped)
tp-end: t_subnormal
---
- t_except unmasked failures are mentioned in PR port-mips/35327.
- t_subnormal float failure seems trap caused by a FP insn in BDslot
(I'm not sure if we can use TF_REG_CAUSE in trapframe to see BD bit)
|
| 1.38 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.37 | 14-Dec-2009 |
matt | branches: 1.37.4; 1.37.6; 1.37.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.36 | 10-Dec-2009 |
rmind | Rename L_ADDR to L_PCB and amend some comments accordingly.
|
| 1.35 | 27-Nov-2009 |
rmind | - Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
|
| 1.34 | 18-Aug-2009 |
matt | Fix a errant sw (should be lw) that ovewrites the saved [trap]frame
pointer with a possibly bogus value.
|
| 1.33 | 17-Oct-2007 |
garbled | branches: 1.33.20; 1.33.30; 1.33.38;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.32 | 17-May-2007 |
yamt | branches: 1.32.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.31 | 25-Mar-2006 |
tsutsui | branches: 1.31.14; 1.31.18; 1.31.20; 1.31.26;
Update FPE trapsignal functions for new siginfo,
based on a patch provided by Matthias Drochner.
Ok'ed by christos, and fixes PR port-mips/26410.
|
| 1.30 | 23-Mar-2006 |
tsutsui | include/cpu.h: make sure MIPS3_PLUS properly defined even if _LOCORE is defined
mips/fp.S: include <mips/cpu.h> for #ifdef MIPS3_PLUS
Closes PR port-mips/27298.
|
| 1.29 | 11-Dec-2005 |
christos | branches: 1.29.4; 1.29.6; 1.29.8; 1.29.10; 1.29.12;
merge ktrace-lwp.
|
| 1.28 | 25-Oct-2003 |
mycroft | branches: 1.28.14; 1.28.16; 1.28.26;
Oops, in the fpe_trap case, actually leave it storing $a2 in the $a3 stack
slot. This is a hack.
|
| 1.27 | 25-Oct-2003 |
mycroft | Store $a1 (and $a2 in another case) in the correct stack slot.
|
| 1.26 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.25 | 27-Jun-2003 |
simonb | branches: 1.25.2;
Use STATIC_LEAF and STATIC_XLEAF for the helper functions; there's no
need to export their symbols.
|
| 1.24 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.23 | 04-Nov-2002 |
thorpej | t4-t7 -> ta0-ta3
|
| 1.22 | 05-Mar-2002 |
simonb | Change MIPS3 checks to MIPS3_PLUS checks (XXX - still bogus!).
|
| 1.21 | 18-Jul-2000 |
jeffs | branches: 1.21.4; 1.21.8;
Fix FP exception handling that was recently broken and would not
run src/regress cleanly. Need to save and restore the frame pointer
for fpemul_sig*().
|
| 1.20 | 31-May-2000 |
nisimura | branches: 1.20.2;
Replace fpcurproc->p_addr-> references with curpcb->.
|
| 1.19 | 29-May-2000 |
simonb | A few more white-space bogons.
|
| 1.18 | 14-May-2000 |
castor | branches: 1.18.2;
Add fp emulation for sqrt_s and sqrt_d instructions
from Jeff Smith <jeffs@geocast.com>. These are needed to support
-mips2 compilation. With this change, on a QED 5231 we now pass the
paranoia tests, and are successfully using userlands built with -mips2.
|
| 1.17 | 11-Apr-2000 |
castor | Taken from Jeff Smith <jeffs@geocast.com>:
Fix regress/lib/libc/ieeefp/except for MIPS. Newer FPE handling code
did not generate SIGFPE, but always SIGILL. Add this back to the
assembly code. The QED 5231 requests the kernel emulates some of
the conditions that generate an SIGFPE, but when the emulation code
did a ctc1 to fsr with an exception the kernel got a FPE in kernel mode.
Fix this by saving the fp regs earlier, then saving the new FSR in
the context. This allows the FSR value to be seen by the SIGFPE
handler.
Add fp emulation for 8 mips2 fpu instructions to handle exceptions
(round.w.fmt, trunc.w.fmt, ceil.w.fmt, floor.w.fmt). This lets
perl5 run when compiled -mips2.
|
| 1.16 | 29-Dec-1999 |
castor | Make SOFTFLOAT emulation compatible with _MIPS_BSD_API_LP32_64CLEAN
|
| 1.15 | 22-Dec-1999 |
jun | FIX:
port-mips/9016 [serious/medium]:
MIPS FPU emulator points wrong epc on exception case
Responsible: port-mips-maintainer (NetBSD/mips Portmasters)
State: open
Class: sw-bug
Originator: Shuichiro URATA
Release: current 12/11/1999
Arrival-Date: Fri Dec 17 10:18:00 1999
commit patch
http://www.a-r.org/~ur/softfloat1211.diff.gz
by Shuichiro URATA (ur@a-r.org)
|
| 1.14 | 18-Nov-1999 |
jun | on port-mips@netbsd.org:
Shuichiro URATA <ur@a-r.org> makes kernel softfloat emulation code.
http://www.a-r.org/~ur/softfloat1116.diff.gz
is Patch for
sys/arch/mips/conf/files.mips
sys/arch/mips/mips/fp.S
sys/arch/mips/mips/fpemu.c
sys/arch/mips/mips/genassym.cf
sys/arch/mips/mips/locore.S
sys/arch/mips/mips/mips_machdep.c
sys/arch/mips/mips/process_machdep.c
sys/arch/mips/mips/trap.c
sys/arch/mips/mips/vm_machdep.c
After apply this patch,pmax package binary works on hpcmips!
|
| 1.13 | 30-Mar-1999 |
soda | branches: 1.13.8; 1.13.14;
ALIAS() is not needed, use XLEAF() or XNESTED() instead
|
| 1.12 | 16-Jan-1999 |
nisimura | - Restore 'cpuregs.h'.
|
| 1.11 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.10 | 22-Jun-1997 |
jonathan | branches: 1.10.12;
* Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.9 | 16-Jun-1997 |
jonathan | Remove all references to <machine/machAsmDefs.h>.
Use #include <mips/asm.h> instead.
|
| 1.8 | 15-Dec-1994 |
mycroft | More underscores...
|
| 1.7 | 15-Dec-1994 |
mycroft | Remove underscores from uses of *LEAF() and END(). Use _C_LABEL() in explicit
symbol references.
|
| 1.6 | 23-Nov-1994 |
dean | more underscore changes (from J. Stone)
|
| 1.5 | 14-Nov-1994 |
dean | Prepended underscores
|
| 1.4 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.10.12.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.13.14.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.13.8.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.18.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.20.2.1 | 18-Jul-2000 |
jeffs | Pull up revision 1.21 (approved by thorpej).
Fix FP exception handling not to panic.
|
| 1.21.8.3 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.21.8.2 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.21.8.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.21.4.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.25.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.25.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.25.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.28.26.2 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1260):
sys/arch/mips/mips/fp.S: revision 1.31
sys/arch/mips/mips/mips_fputrap.c: revision 1.3
sys/arch/mips/conf/files.mips: revision 1.54
Update FPE trapsignal functions for new siginfo,
based on a patch provided by Matthias Drochner.
Ok'ed by christos, and fixes PR port-mips/26410.
|
| 1.28.26.1 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1259):
sys/arch/mips/mips/fp.S: revision 1.30
sys/arch/mips/include/cpu.h: revision 1.77
include/cpu.h: make sure MIPS3_PLUS properly defined even if _LOCORE is defined
mips/fp.S: include <mips/cpu.h> for #ifdef MIPS3_PLUS
Closes PR port-mips/27298.
|
| 1.28.16.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.28.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.28.14.2 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1260):
sys/arch/mips/mips/fp.S: revision 1.31
sys/arch/mips/mips/mips_fputrap.c: revision 1.3
sys/arch/mips/conf/files.mips: revision 1.54
Update FPE trapsignal functions for new siginfo,
based on a patch provided by Matthias Drochner.
Ok'ed by christos, and fixes PR port-mips/26410.
|
| 1.28.14.1 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1259):
sys/arch/mips/mips/fp.S: revision 1.30
sys/arch/mips/include/cpu.h: revision 1.77
include/cpu.h: make sure MIPS3_PLUS properly defined even if _LOCORE is defined
mips/fp.S: include <mips/cpu.h> for #ifdef MIPS3_PLUS
Closes PR port-mips/27298.
|
| 1.29.12.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.29.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.29.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.29.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.29.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.31.26.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.31.20.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.31.18.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.31.14.1 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.32.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.33.38.13 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.33.38.12 | 29-Dec-2010 |
matt | Move away from StudlyCaps and switch to the new names.
Remove branch delay slot emulation to a different file.
|
| 1.33.38.11 | 11-May-2010 |
matt | Change to not use t8. Any former use of t8 is now t9.
Any former use of t9 is going to either AT or a to-be-overwritten register.
|
| 1.33.38.10 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.33.38.9 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.33.38.8 | 29-Jan-2010 |
matt | Change mips kernel options SOFTFLOAT to FPEMUL. Allow a kernel to have
no FP emulation code. Fix insufficient SYMTAB_SPACE. When a kernel without
an FPU and with FPEMUL code, the application will trap with a SIGILL/ILL_ILLOPC
signal, not SIGSEGV/SEGV_MAPERR.
|
| 1.33.38.7 | 22-Jan-2010 |
matt | In N32/N64, deal with the FP load/store as a 64bit quantity
|
| 1.33.38.6 | 05-Sep-2009 |
matt | Use INT_[LS] for dealing with the FRAME_FSR.
|
| 1.33.38.5 | 02-Sep-2009 |
uebayasi | Fix O32 build.
|
| 1.33.38.4 | 26-Aug-2009 |
matt | Add dmtc1 and dmfc1 emulations.
XXX NewABI support is going to cause much greif here.
|
| 1.33.38.3 | 26-Aug-2009 |
matt | Fixup (all but mipsco) to deal the new realities in mipsland.
|
| 1.33.38.2 | 23-Aug-2009 |
uebayasi | Storing a single register into the same address twise should be a typo.
|
| 1.33.38.1 | 20-Aug-2009 |
matt | Make ABI agnostic (O32 code is identical). Document missing FP instructions.
Note that the emulation doesn't cover any 64 bit instructions.
Those will need to be added.
|
| 1.33.30.1 | 20-Mar-2011 |
bouyer | Pull up following revision(s) (requested by tsutsui in ticket #1572):
sys/arch/mips/mips/fp.S: revision 1.40 via patch
Fix cvt.d.s per analysis by Marcus Comstedt in PR port-mips/36251.
Confirmed on ews4800mips.
|
| 1.33.20.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.33.20.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.37.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.37.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.37.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.44.30.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.44.30.2 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.44.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.44.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.46.2.2 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.46.2.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.47.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.48.14.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.48.12.1 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.48.6.1 | 25-Dec-2018 |
martin | Pull up following revision(s) (requested by sevan in ticket #1143):
sys/arch/mips/mips/fp.S: revision 1.49
Load curlwp into a0 to call fpu_save(curlwp), not fpu_save(garbage).
The lwp argument to fpu_save was added by chuq in revision 1.14 of
mips_fpu.c, but this call was not updated to pass it. This is the
correct lwp to pass because we are in the middle of executing a
kernel-emulated fp instruction, so curlwp must own the fpu state, and
we are trying to write the fp registers to memory so we can adjust
them there when ctc1 would fail.
Fixes PR port-cobalt/53090, PR port-sgimips/53791.
|
| 1.51.6.2 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.51.6.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.54.2.1 | 31-May-2021 |
cjep | sync with head
|
| 1.59.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.11 | 06-Jul-2002 |
gmcgarry | Overhaul the emulation facility. We do this by:
- accumulating all emulation code (including floating-point) in one place
- steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts
and traps from *real* FPUs
- introducing MachEmulateInst() as a common dispatch point for all
emulated instructions
- cleaning up emulation dispatch in trap()
Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1.
Tested on r3k with and without SOFTFLOAT enabled.
|
| 1.10 | 05-Mar-2002 |
simonb | branches: 1.10.6;
Check userland address and address alignent as two separate checks.
Fix for when mips_reg_t is 64-bits.
ANSIfy.
|
| 1.9 | 12-Jan-2002 |
enami | Define new macro to access FSR register and use it.
|
| 1.8 | 12-Jan-2002 |
enami | Access FSR register correctly in struct fpreg.r_regs[].
This fixes sshd (actually, libcrypto) failure with new-toolchain.
|
| 1.7 | 16-Oct-2001 |
uch | branches: 1.7.4;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.6 | 31-May-2000 |
nisimura | branches: 1.6.4; 1.6.8;
Replace fpcurproc->p_addr-> references with curpcb->.
|
| 1.5 | 28-Mar-2000 |
simonb | branches: 1.5.2;
Move fpcurproc declaration to <mips/cpu.h>.
|
| 1.4 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.3 | 22-Dec-1999 |
jun | branches: 1.3.2;
FIX:
port-mips/9016 [serious/medium]:
MIPS FPU emulator points wrong epc on exception case
Responsible: port-mips-maintainer (NetBSD/mips Portmasters)
State: open
Class: sw-bug
Originator: Shuichiro URATA
Release: current 12/11/1999
Arrival-Date: Fri Dec 17 10:18:00 1999
commit patch
http://www.a-r.org/~ur/softfloat1211.diff.gz
by Shuichiro URATA (ur@a-r.org)
|
| 1.2 | 22-Nov-1999 |
shin | add RCS Id.
add copyright & license notice.
|
| 1.1 | 18-Nov-1999 |
jun | and add sys/arch/mips/mips/fpemu.c
|
| 1.3.2.2 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.3.2.1 | 22-Dec-1999 |
wrstuden | file fpemu.c was added on branch wrstuden-devbsize on 1999-12-27 18:32:47 +0000
|
| 1.5.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.6.8.4 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.6.8.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.6.8.2 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.6.8.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.6.4.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.6.4.1 | 31-May-2000 |
bouyer | file fpemu.c was added on branch thorpej_scsipi on 2000-11-20 20:13:34 +0000
|
| 1.7.4.5 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.7.4.4 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.7.4.3 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.7.4.2 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.7.4.1 | 16-Oct-2001 |
nathanw | file fpemu.c was added on branch nathanw_sa on 2002-02-28 04:10:44 +0000
|
| 1.10.6.1 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.10 | 16-Jun-1997 |
jonathan | Remove genassym.c. (pmax has used genassym.cf for some time.)
|
| 1.9 | 07-Apr-1996 |
jonathan | Update arch/pmax/pmax/genassym.c to compile with -Wall: use offsetof().
Move to mips/pmax/genassym.c, as (most of) the assembler locore code is
being merged into a generic-MIPS locore.
Remove the redundant pmax/pmax/genassym.c.
|
| 1.8 | 02-Feb-1996 |
mycroft | Don't define _KERNEL here.
|
| 1.7 | 16-May-1995 |
jtc | Removing -DKERNEL, transition to _KERNEL has been completed
|
| 1.6 | 28-Mar-1995 |
jtc | Added #define _KERNEL
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 15-Oct-1993 |
deraadt | update from rick, tarfile of Oct 11 10:46
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.71 | 12-Aug-2020 |
skrll | No need for MIPS_EBASE_CPUNUM now that asm.h supports __BITS
|
| 1.70 | 20-Jul-2020 |
simonb | Expose MIPS_EBASE_CPUNUM.
|
| 1.69 | 20-Feb-2020 |
skrll | G/C
|
| 1.68 | 08-Jan-2020 |
ad | Hopefully fix some problems seen with MP support on non-x86, in particular
where curcpu() is defined as curlwp->l_cpu:
- mi_switch(): undo the ~2007ish optimisation to unlock curlwp before
calling cpu_switchto(). It's not safe to let other actors mess with the
LWP (in particular l->l_cpu) while it's still context switching. This
removes l->l_ctxswtch.
- Move the LP_RUNNING flag into l->l_flag and rename to LW_RUNNING since
it's now covered by the LWP's lock.
- Ditch lwp_exit_switchaway() and just call mi_switch() instead. Everything
is in cache anyway so it wasn't buying much by trying to avoid saving old
state. This means cpu_switchto() will never be called with prevlwp ==
NULL.
- Remove some KERNEL_LOCK handling which hasn't been needed for years.
|
| 1.67 | 11-Jul-2016 |
matt | branches: 1.67.18; 1.67.24;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.66 | 26-Aug-2015 |
uebayasi | Have MI genassym.cf.
|
| 1.65 | 25-Aug-2015 |
uebayasi | Replace a constant in ldscript.
|
| 1.64 | 09-Jul-2015 |
matt | More ifndef _MODULE
|
| 1.63 | 08-Jul-2015 |
matt | fix typo
|
| 1.62 | 08-Jul-2015 |
matt | Add ifndef _MODULE around VM parameters.
|
| 1.61 | 11-Jun-2015 |
matt | Define (but not use) separate kernel and user pagetables.
Move to the new names.
|
| 1.60 | 11-Jun-2015 |
matt | Add stuff from mips_param.h that the .S files need.
|
| 1.59 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.58 | 06-Jun-2015 |
matt | Use ci_nmi_stack
|
| 1.57 | 06-Jun-2015 |
matt | Backout last change.
|
| 1.56 | 06-Jun-2015 |
matt | Add IPI_WDOG
|
| 1.55 | 02-Jun-2015 |
matt | Add CPU_INFO_FLAGS / CPUF_PRESENT
|
| 1.54 | 06-Apr-2011 |
matt | branches: 1.54.14; 1.54.32;
Sort LWP fields
|
| 1.53 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.52 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.51 | 14-Jan-2011 |
rmind | branches: 1.51.2; 1.51.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.50 | 20-Dec-2010 |
matt | Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
|
| 1.49 | 14-Dec-2009 |
matt | branches: 1.49.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.48 | 10-Dec-2009 |
rmind | Rename L_ADDR to L_PCB and amend some comments accordingly.
|
| 1.47 | 27-Nov-2009 |
rmind | - Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
|
| 1.46 | 20-Aug-2009 |
cliff | when USPACE <= PAGE_SIZE, we don't have md_upte[] in struct mdlwp
|
| 1.45 | 24-Mar-2009 |
martin | Now that we compile the Atheros HAL from source we pass all the right
flags to the compiler so it obeys the same ABI as the rest of the kernel.
Remove the hacks used to work around the abi differences (using %s7 as
curlwp) intruduced for the binary hal.
|
| 1.44 | 20-Sep-2008 |
tsutsui | branches: 1.44.2; 1.44.8; 1.44.12;
Remove advertising clause for UCB in various genassym.cf files,
which were derived from genassym.c in 4.4BSD-Lite2 (or 386BSD).
Closes PR misc/39573. Approved by martin@.
|
| 1.43 | 04-Jun-2008 |
ad | branches: 1.43.4;
Remove ref to uvm.page_idle_zero
|
| 1.42 | 17-Oct-2007 |
garbled | branches: 1.42.16; 1.42.18; 1.42.20; 1.42.22;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.41 | 24-Aug-2007 |
ad | branches: 1.41.2;
The Atheros HAL on MIPS uses %s7 as a general purpose register, but the
rest of the kernel uses it to store the value of curlwp. Sam won't
recompile the HAL for us (fair enough), and we can't modify the HAL
to use another register because doing so could put us in breach of
the license (v. crappy). So, do a save/set/restore on %s7 in KernIntr()
and in the stubs that the HAL uses to call back into the kernel.
|
| 1.40 | 17-May-2007 |
yamt | branches: 1.40.4; 1.40.8;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.39 | 09-Feb-2007 |
ad | branches: 1.39.2; 1.39.6; 1.39.8; 1.39.14;
Merge newlock2 to head.
|
| 1.38 | 11-Dec-2005 |
christos | branches: 1.38.20;
merge ktrace-lwp.
|
| 1.37 | 26-Nov-2003 |
he | branches: 1.37.16;
Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.36 | 04-Nov-2003 |
dsl | Remove p_nras from struct proc - use LIST_EMPTY(&p->p_raslist) instead.
Remove p_raslock and rename p_lwplock p_lock (one lock is enough).
Simplify window test when adding a ras and correct test on VM_MAXUSER_ADDRESS.
Avoid unpredictable branch in i386 locore.S
(pad fields left in struct proc to avoid kernel bump)
|
| 1.35 | 29-Sep-2003 |
tsutsui | Remove '#' from if/endif, otherwise it fails on elf64 environment.
From Christopher SEKIYA.
|
| 1.34 | 08-Apr-2003 |
thorpej | branches: 1.34.2;
Use PAGE_SIZE rather than NBPG.
|
| 1.33 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.32 | 09-Nov-2002 |
nisimura | Nuke "mips_reg_t" exposures from here. "mips_reg_t" will be
corrected-back with "register_t" by completing the implementations
of N32 and LP64 environment.
|
| 1.31 | 04-Nov-2002 |
thorpej | Use named indices for RA, SR, MULLO, MULHI, and EPC in the
trapframe.
|
| 1.30 | 04-Nov-2002 |
thorpej | Define named constants for the trapframe register idices (they
are different from the normal register numbers). Use these names
in genassym.cf. (Wow, how ever did that test kernel boot before...)
|
| 1.29 | 04-Nov-2002 |
thorpej | Add FRAME_[TA0-TA3] and TF_REG_[TA0-TA3]. Change TF_REG_* to use
defined constants for register indices, rather than hard-coded numbers.
|
| 1.28 | 26-Sep-2002 |
thorpej | Remove <sys/map.h>
|
| 1.27 | 28-Aug-2002 |
gmcgarry | RAS support for MIPS. Tested on R3000.
|
| 1.26 | 06-Mar-2002 |
simonb | branches: 1.26.6;
Add the offset of ci_divisor_delay in struct cpu_info.
|
| 1.25 | 14-Nov-2001 |
thorpej | branches: 1.25.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.24 | 16-Oct-2001 |
uch | branches: 1.24.2;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.23 | 16-Jan-2001 |
thorpej | branches: 1.23.4;
New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
|
| 1.22 | 14-Jan-2001 |
thorpej | Make the astpending flag per-process.
|
| 1.21 | 13-Sep-2000 |
nisimura | Introduce 'segbase' global variable to hold the pointer to current
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
|
| 1.20 | 29-Jun-2000 |
mrg | remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.19 | 29-May-2000 |
simonb | A TAB after the define keyword instead of spaces.
|
| 1.18 | 26-May-2000 |
thorpej | branches: 1.18.2;
Introduce a new process state distinct from SRUN called SONPROC
which indicates that the process is actually running on a
processor. Test against SONPROC as appropriate rather than
combinations of SRUN and curproc. Update all context switch code
to properly set SONPROC when the process becomes the current
process on the CPU.
|
| 1.17 | 10-May-2000 |
nisimura | Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3. It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs. mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.
|
| 1.16 | 30-Apr-2000 |
simonb | Define offset for uvm.page_idle_zero.
|
| 1.15 | 24-Mar-2000 |
nisimura | Have ST_REG_SR mnemonic for status register consistent with others.
|
| 1.14 | 28-Jan-2000 |
takemura | CPU specific idle hook and VR idle routine.
|
| 1.13 | 18-Nov-1999 |
jun | on port-mips@netbsd.org:
Shuichiro URATA <ur@a-r.org> makes kernel softfloat emulation code.
http://www.a-r.org/~ur/softfloat1116.diff.gz
is Patch for
sys/arch/mips/conf/files.mips
sys/arch/mips/mips/fp.S
sys/arch/mips/mips/fpemu.c
sys/arch/mips/mips/genassym.cf
sys/arch/mips/mips/locore.S
sys/arch/mips/mips/mips_machdep.c
sys/arch/mips/mips/process_machdep.c
sys/arch/mips/mips/trap.c
sys/arch/mips/mips/vm_machdep.c
After apply this patch,pmax package binary works on hpcmips!
|
| 1.12 | 18-May-1999 |
nisimura | branches: 1.12.2; 1.12.8;
- Move MachSetPID(1) call to pmap_bootstrap() adajacent to kernel pmap
initialization code.
- Abandon mips_init_proc0() and do the 4 lines straightly in MD mach_init().
- Restore a block of code accidentally lost in prevous commit.
- Change the term 'tlbpid' to a MIPS3 nomenclature 'asid'.
- Hide PTE size exposures by symbolic names in locore.S
|
| 1.11 | 26-Mar-1999 |
tsubai | branches: 1.11.4;
Remove ifdef UVM.
|
| 1.10 | 25-Mar-1999 |
mrg | remove opt_uvm.h
|
| 1.9 | 27-Feb-1999 |
jonathan | Define C structures (struct kernframe, struct trapframe)
for kernel-to-user trapframe. Use C structs in genassym.cf.
|
| 1.8 | 31-Jan-1999 |
castor | Remove genpubassym.cf stuff. The macro _MIPS_BSD_API allows selection of a
64-bit clean compilation model.
|
| 1.7 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.6 | 12-Mar-1998 |
thorpej | branches: 1.6.4;
Add support for UVM.
|
| 1.5 | 05-Jan-1998 |
perry | RCSID Police.
|
| 1.4 | 17-Oct-1997 |
jonathan | Add explicit #include <vm/vm.h> before mips/pte.h is included.
|
| 1.3 | 19-Jun-1997 |
mhitch | More merged mips1/mips3 support:
Remove cpu-specific routines from locore.S and add them to locore_r2000.S
and locore_r4000.S. Add entries in locore jump vector table for switch_exit()
and the cpu_switch() context resume.
Add offsets into the jump vector to genassym.cf for use in locore.S.
|
| 1.2 | 15-Jun-1997 |
mhitch | From Toru Nishimura: adjust for struct user pcb changes.
|
| 1.1 | 16-Mar-1997 |
jonathan | Use genassym.sh script to make assym.h, for cross-compiling.
Remove dependencies on genassym.
|
| 1.6.4.2 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.6.4.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.11.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.12.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.12.2.2 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.12.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.18.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.23.4.4 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.23.4.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.23.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.23.4.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.24.2.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.25.2.9 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.25.2.8 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.25.2.7 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.25.2.6 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.25.2.5 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.25.2.4 | 18-Nov-2001 |
wdk | Fixup l->l_proc references in areas where p_md structures were
used in locore routines.
Can now boot multi-user on -sgimips machine.
Untested: upcall functions, R2000/3000 processors
|
| 1.25.2.3 | 18-Nov-2001 |
wdk | p_md.md_regs -> l_md.md_regs
p_md.md_upte -> l_md.md_upte
|
| 1.25.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.25.2.1 | 14-Nov-2001 |
wdk | file genassym.cf was added on branch nathanw_sa on 2001-11-17 23:43:42 +0000
|
| 1.26.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.34.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.34.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.34.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.37.16.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.37.16.1 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.38.20.3 | 01-Feb-2007 |
ad | Header file cleanup.
|
| 1.38.20.2 | 27-Jan-2007 |
ad | Make mips systems work.
|
| 1.38.20.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.39.14.2 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.39.14.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.39.8.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.39.6.2 | 09-Oct-2007 |
ad | Sync with head.
|
| 1.39.6.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.39.2.2 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.39.2.1 | 23-Mar-2007 |
yamt | remove L_FORW and L_BACK.
|
| 1.40.8.1 | 03-Sep-2007 |
jmcneill | Sync with HEAD.
|
| 1.40.4.1 | 03-Sep-2007 |
skrll | Sync with HEAD.
|
| 1.41.2.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.42.22.2 | 10-Oct-2008 |
skrll | Sync with HEAD.
|
| 1.42.22.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.42.20.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.42.20.2 | 16-Sep-2009 |
yamt | sync with head
|
| 1.42.20.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.42.18.1 | 17-Jun-2008 |
yamt | sync with head.
|
| 1.42.16.2 | 28-Sep-2008 |
mjf | Sync with HEAD.
|
| 1.42.16.1 | 05-Jun-2008 |
mjf | Sync with HEAD.
Also fix build.
|
| 1.43.4.1 | 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.44.12.34 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.44.12.33 | 09-Jul-2012 |
matt | Add L_FLAG / LW_SYSTEM
|
| 1.44.12.32 | 27-Feb-2012 |
matt | Count all traps types.
|
| 1.44.12.31 | 23-Dec-2011 |
matt | Add MIPS1_PG_SHIFT
|
| 1.44.12.30 | 03-Dec-2011 |
matt | Rework things a bit for the XLR/XLS/XLP TLB. Before dealing with the TLB when
MP on the XL?, disable interrupts and take out a lock to prevent concurrent
updates to the TLB. In the TLB miss and invalid exception handlers, if the
lock is already owned by another CPU, simply return from the exception and
let it continue or restart as appropriate. This prevents concurrent TLB
exceptions in multiple threads from possibly updating the TLB multiple times
for a single address.
|
| 1.44.12.29 | 02-Dec-2011 |
matt | Add support for 8KB pages.
|
| 1.44.12.28 | 29-Nov-2011 |
matt | Take part of the KSEG2 space and use it to "almost" direct another 256MB
of memory so that N32 kernels can make use of ram outside of KSEG0. This
allows N32 kernels to be useful on systems with 4GB of RAM or more.
|
| 1.44.12.27 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.44.12.26 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.44.12.25 | 29-Dec-2010 |
matt | Get rid of MIPSX_CPU_* since they aren't used.
|
| 1.44.12.24 | 22-Dec-2010 |
matt | If the first thing is a conditional item, and it doesn't actually get
defines, genassym get very unhappy. So move an item up so that never
happens.
|
| 1.44.12.23 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.44.12.22 | 16-May-2010 |
matt | Add IPL_DDB
|
| 1.44.12.21 | 01-Mar-2010 |
matt | Add secondary processor spinup support (cpu_trampoline is in locore_mips3.S).
Nuke lse_boot_secondary_processors (not needed).
Move cpu_info_store to cpu_subr.C
|
| 1.44.12.20 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.44.12.19 | 28-Feb-2010 |
matt | Add #define __INTR_PRIVATE
|
| 1.44.12.18 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.44.12.17 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.44.12.16 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.44.12.15 | 06-Feb-2010 |
matt | Allow __HAVE_FAST_SOFTINTS to be optional
|
| 1.44.12.14 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.44.12.13 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.44.12.12 | 30-Jan-2010 |
matt | Change MIPS_CURLWP from s7 to t8. In a MALTA64 kernel, s6 is used 9155 times
which means the compiler could really use s7 is was free to do so. The least
used temporary was t8 (288 times). Once the kernel was switched to use t8 for
MIPS_CURLWP, s7 was used 7524 times.
Additionally a MALTA32 kernel shrunk by 6205 instructions (24820 bytes) or
about 1% of its text size.
[For some reason, pre-change t1 was never used and post change t2 was never
used. Not sure why.]
|
| 1.44.12.11 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.44.12.10 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.44.12.9 | 16-Jan-2010 |
matt | Rework the exception code. All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy. This also allows us to branch to unused space space
since the relative locations will remain the same.
When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU. The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).
kill outofworld and just let trap panic, if it can. Allow for sb1_subr.S
or rmixl_subr.S in the future. Fix TLB read/write code.
|
| 1.44.12.8 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.44.12.7 | 09-Nov-2009 |
cliff | - add syms for MIPS_XKPHYS_START, MIPS_XKPHYS_UNCACHED, MIPS_XKPHYS_CCA3,
MIPS_XKPHYS_CCA4, MIPS_XKSEG_START.
|
| 1.44.12.6 | 07-Sep-2009 |
matt | Use the new symbolic constants for label_t.
Use label_t where appropriate.
Add some LP64 KASSERTs
|
| 1.44.12.5 | 06-Sep-2009 |
matt | Add SF_REG_GP
|
| 1.44.12.4 | 05-Sep-2009 |
matt | Instead of pulling MIPS_KSEG0_START and friends from cpuregs, put them here.
(asm doesn't constants with appended L)
|
| 1.44.12.3 | 02-Sep-2009 |
matt | If N32/N64, define FRAME_A[4-7]
|
| 1.44.12.2 | 21-Aug-2009 |
matt | Deal with locore.h changes.
|
| 1.44.12.1 | 21-Aug-2009 |
uebayasi | FRAME_ZERO -> FRAME_RZERO. Fix fp.S build.
|
| 1.44.8.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.44.2.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.49.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.49.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.51.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.51.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.54.32.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.54.32.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.54.32.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.54.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.67.24.2 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.67.24.1 | 17-Jan-2020 |
ad | Sync with head.
|
| 1.67.18.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.2 | 31-Jan-1999 |
castor | Remove genpubassym.cf stuff. The macro _MIPS_BSD_API allows selection of a
64-bit clean compilation model.
|
| 1.1 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.15 | 10-Jul-2011 |
matt | Fix machine/ includes
|
| 1.14 | 18-Sep-2010 |
tsutsui | Fix wrong checksum calculations of 32 bit unaligned two byte payloads.
Analyzed in PR port-mips/43882, but applied slightly different patch.
Also put some changes for readability.
Note netbsd-5 doesn't use this MD version but netbsd-4 needs a pullup.
(though it's unclear if it's really faster even on modern aggressive gcc4)
|
| 1.13 | 24-Jan-2007 |
hubertf | branches: 1.13.48; 1.13.66; 1.13.68; 1.13.70;
Remove duplicate #includes, patch contributed in private mail
by Slava Semushin <slava.semushin@gmail.com>.
To verify that no nasty side effects of duplicate includes (or their
removal) have an effect here, I've compiled an i386/ALL kernel with
and without the patch, and the only difference in the resulting .o
files was in shifted line numbers in some assert() calls.
The comparison of the .o files was based on the output of "objdump -D".
Thanks to martin@ for the input on testing.
|
| 1.12 | 25-Mar-2006 |
matt | branches: 1.12.8; 1.12.12;
Increment to the next byte after fetching.
Spotted by Dan Krejsa.
|
| 1.11 | 11-Dec-2005 |
christos | branches: 1.11.4; 1.11.6; 1.11.8; 1.11.10; 1.11.12;
merge ktrace-lwp.
|
| 1.10 | 15-Jul-2003 |
lukem | branches: 1.10.16;
__KERNEL_RCSID()
|
| 1.9 | 29-Jul-2002 |
itojun | branches: 1.9.6;
be friendly with gcc-3.1.1 -O2, which takes advantage of ANSI C
pointer aliasing rule (gcc optimization/7427). from tsubai, sync w/kame
|
| 1.8 | 01-Jun-2002 |
simonb | Use the current MIPS in_cksum for in4_cksum too.
|
| 1.7 | 05-Mar-2002 |
simonb | branches: 1.7.6;
ANSIfy.
|
| 1.6 | 17-Aug-2001 |
simonb | branches: 1.6.6;
Fix for single-byte mbufs.
|
| 1.5 | 24-Apr-1999 |
simonb | branches: 1.5.16;
Nuke register and remove trailling white space.
|
| 1.4 | 02-Feb-1998 |
jonathan | branches: 1.4.12;
Finish bi-endian support: add code to sum odd start/end bytes
correctly on both big and little endian systems.
From Tsubai Masanari <tsubai@iri.co.jp> in PR# 4434.
|
| 1.3 | 12-Aug-1997 |
jonathan | branches: 1.3.4;
Fix for mbufs that start on odd-byte-aligned boundaries, and use.
|
| 1.2 | 22-Jul-1997 |
jonathan | branches: 1.2.2;
Fix for chains containing interior mbufs with odd length.
|
| 1.1 | 20-Jul-1997 |
jonathan | mips-tuned bcopy from Jon Kay (UCSD) released under BSD copyright,
with standard BSD in_cksum() interface by Jonathan Stone.
|
| 1.2.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.3.4.1 | 07-Feb-1998 |
mellon | Pull up 1.4 (jonathan)
|
| 1.4.12.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.5.16.4 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.5.16.3 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.5.16.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.5.16.1 | 25-Aug-2001 |
thorpej | Merge Aug 24 -current into the kqueue branch.
|
| 1.6.6.4 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.6.6.3 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.6.6.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.6.6.1 | 17-Aug-2001 |
nathanw | file in_cksum.c was added on branch nathanw_sa on 2002-04-01 07:41:04 +0000
|
| 1.7.6.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.7.6.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.9.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.9.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.9.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.10.16.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.10.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.11.12.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.11.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.11.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.11.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.11.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.12.12.1 | 12-Oct-2010 |
bouyer | Pull up following revision(s) (requested by tsutsui in ticket #1407):
sys/arch/mips/mips/in_cksum.c: revision 1.14
Fix wrong checksum calculations of 32 bit unaligned two byte payloads.
Analyzed in PR port-mips/43882, but applied slightly different patch.
Also put some changes for readability.
Note netbsd-5 doesn't use this MD version but netbsd-4 needs a pullup.
(though it's unclear if it's really faster even on modern aggressive gcc4)
|
| 1.12.8.1 | 01-Feb-2007 |
ad | Sync with head.
|
| 1.13.70.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.13.68.1 | 22-Oct-2010 |
uebayasi | Sync with HEAD (-D20101022).
|
| 1.13.66.1 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.13.48.1 | 09-Oct-2010 |
yamt | sync with head
|
| 1.14 | 22-Jul-2020 |
jmcneill | Handle IPI_KPREEMPT
|
| 1.13 | 01-Dec-2019 |
ad | Fix false sharing problems with cpu_info. Identified with tprof(8).
This was a very nice win in my tests on a 48 CPU box.
- Reorganise cpu_data slightly according to usage.
- Put cpu_onproc into struct cpu_info alongside ci_curlwp (now is ci_onproc).
- On x86, put some items in their own cache lines according to usage, like
the IPI bitmask and ci_want_resched.
|
| 1.12 | 23-Nov-2019 |
ad | cpu_need_resched():
- Remove all code that should be MI, leaving the bare minimum under arch/.
- Make the required actions very explicit.
- Pass in LWP pointer for convenience.
- When a trap is required on another CPU, have the IPI set it locally.
- Expunge cpu_did_resched().
|
| 1.11 | 26-Jun-2015 |
matt | branches: 1.11.18;
#include <mips/locore.h>
|
| 1.10 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.9 | 06-Jun-2015 |
matt | Add IPI_WDOG
|
| 1.8 | 14-Apr-2015 |
jmcneill | __HAVE_PREEEMPTION -> __HAVE_PREEMPTION
|
| 1.7 | 19-May-2014 |
rmind | branches: 1.7.4;
Implement MI IPI interface with cross-call support.
|
| 1.6 | 02-May-2011 |
matt | branches: 1.6.14; 1.6.28;
Add an IPI for xcalls.
|
| 1.5 | 14-Apr-2011 |
matt | cpu_number() returns a u_int
|
| 1.4 | 14-Apr-2011 |
matt | Increment correct counter.
|
| 1.3 | 20-Feb-2011 |
rmind | Sprinkle some RCS IDs.
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 28-Feb-2010 |
matt | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
file ipifuncs.c was initially added on branch matt-nb5-mips64.
|
| 1.1.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.1.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.7 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.1.2.6 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.5 | 05-Feb-2011 |
cliff | - add support for MP ddb
- add IPI halt func
|
| 1.1.2.4 | 22-Dec-2010 |
matt | Don't signal a preemption if we aren't enabling it.
|
| 1.1.2.3 | 24-Mar-2010 |
cliff | - add ipi name for IPI_AST
- in ipi_process(), add event counting, and process IPI_AST
|
| 1.1.2.2 | 11-Mar-2010 |
matt | s/IPI_ISYNC/IPI_SYNCICACHE/
|
| 1.1.2.1 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.6.28.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.6.14.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.14.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.7.4.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.7.4.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.11.18.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.5 | 26-Apr-2011 |
joerg | Remove IRIX emulation
|
| 1.4 | 28-Apr-2008 |
martin | branches: 1.4.22; 1.4.28;
Remove clause 3 and 4 from TNF licenses
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.74; 1.3.76; 1.3.78;
merge ktrace-lwp.
|
| 1.2 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.1 | 28-Nov-2001 |
manu | branches: 1.1.2; 1.1.4; 1.1.20;
Added support for COMPAT_IRIX
|
| 1.1.20.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.20.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.20.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.1.4.1 | 28-Nov-2001 |
thorpej | file irix_syscall.c was added on branch kqueue on 2002-01-10 19:46:08 +0000
|
| 1.1.2.2 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 28-Nov-2001 |
nathanw | file irix_syscall.c was added on branch nathanw_sa on 2002-01-08 00:26:20 +0000
|
| 1.3.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.3.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.3.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.4.28.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.4.22.1 | 31-May-2011 |
rmind | sync with head
|
| 1.22 | 25-Oct-2023 |
skrll | <spaces> -> <tabs>
|
| 1.21 | 25-Oct-2023 |
skrll | Trailing whitespace
|
| 1.20 | 24-Oct-2023 |
andvar | add two blocks of db_regs_t to gdb translation, according to regnum.h
definitions and if either __mips_n32 or __mips_n64 is defined.
Fixes compilation of this file in case one those is defined.
|
| 1.19 | 24-Oct-2023 |
andvar | move locore.h include above pte.h, which uses some of its definitions.
fix typo in pte_valid_p() argument, *pte->*ptep.
makes this file build with KGDB option enabled on MIPS archs.
|
| 1.18 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.17 | 20-Feb-2011 |
matt | branches: 1.17.14; 1.17.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.16 | 21-Nov-2009 |
rmind | branches: 1.16.4; 1.16.6; 1.16.8;
Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.15 | 18-Oct-2009 |
snj | Move Matthias Pfaller's files to 2-clause license. OK matthias@.
|
| 1.14 | 14-Mar-2009 |
dsl | Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)
|
| 1.13 | 11-Jan-2009 |
cegger | branches: 1.13.2;
adaption for making kgdb_dev a dev_t
|
| 1.12 | 28-Apr-2008 |
martin | branches: 1.12.8; 1.12.16;
Remove clause 3 and 4 from TNF licenses
|
| 1.11 | 24-Dec-2005 |
perry | branches: 1.11.74; 1.11.76; 1.11.78;
bare asm -> __asm
|
| 1.10 | 25-Nov-2005 |
simonb | More KNF.
|
| 1.9 | 13-Feb-2004 |
wiz | branches: 1.9.16; 1.9.24;
Uppercase CPU, plural is CPUs.
|
| 1.8 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.7 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.6 | 02-Apr-2003 |
thorpej | branches: 1.6.2;
Use PAGE_SIZE rather than NBPG.
|
| 1.5 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.4 | 07-Jul-2001 |
simonb | branches: 1.4.8;
b{cmp,copy,zero} -> mem{cmp,cpy,set}
Also remove some unnecessary argument casts.
|
| 1.3 | 20-Jul-2000 |
jeffs | branches: 1.3.2;
Include kgdb hooks in trap.c. Include bits of DDB code for kgdb also. Remove
some local prototypes that are in headers now.
|
| 1.2 | 17-Jul-2000 |
jeffs | Use <uvm/uvm_extern.h> instead of vm/vm.h
|
| 1.1 | 17-Jul-2000 |
jeffs | Pull in geocast mips ddb improvements and start bringing in kgdb support.
Add ddb support for QED opcodes, fill in enough routines so "next" usually
works, kdbpoke support for any size. Add callback that ports can hook when
entering and leaving ddb. This can be used for things like turning
off watchdogs while in ddb.
|
| 1.3.2.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.3.2.1 | 20-Jul-2000 |
bouyer | file kgdb_machdep.c was added on branch thorpej_scsipi on 2000-11-20 20:13:34 +0000
|
| 1.4.8.2 | 02-Dec-2002 |
wdk | Remove debugger override
|
| 1.4.8.1 | 07-Jul-2001 |
wdk | file kgdb_machdep.c was added on branch nathanw_sa on 2002-12-02 06:09:48 +0000
|
| 1.6.2.4 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.6.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.6.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.6.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.9.24.1 | 29-Nov-2005 |
yamt | sync with head.
|
| 1.9.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.11.78.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.11.78.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.11.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.11.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.11.74.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.11.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.12.16.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.12.16.1 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.12.8.2 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.12.8.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.13.2.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.16.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.16.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.16.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.17.32.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.17.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2 | 28-Apr-2023 |
skrll | Pass local symbols relocations in both passes and provide the kobj_reloc
implementation visibility of these relocations.
Currently all implementations resolve local symbol relocations in the first
pass and simply skip them in the second. The RISC-V implementation will
make use of this visiblity.
|
| 1.1 | 23-Mar-2021 |
simonb | branches: 1.1.2; 1.1.4;
Work in progress for MIPS modules. Only tested on mipseb64, not yet
enabled anywhere.
|
| 1.1.4.2 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.1.4.1 | 23-Mar-2021 |
thorpej | file kobj_machdep.c was added on branch thorpej-futex on 2021-04-03 22:28:31 +0000
|
| 1.1.2.2 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.1.2.1 | 23-Mar-2021 |
thorpej | file kobj_machdep.c was added on branch thorpej-cfargs on 2021-04-03 21:44:45 +0000
|
| 1.4 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.74; 1.3.76; 1.3.78;
merge ktrace-lwp.
|
| 1.2 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.1 | 22-Sep-2001 |
manu | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.24;
Added Linux emulation support to Mips port
|
| 1.1.24.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.24.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.24.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.8.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.1.8.1 | 22-Sep-2001 |
thorpej | file linux_syscall.c was added on branch kqueue on 2002-01-10 19:46:08 +0000
|
| 1.1.6.2 | 22-Sep-2001 |
manu | Added Linux emulation support to Mips port
|
| 1.1.6.1 | 22-Sep-2001 |
manu | file linux_syscall.c was added on branch nathanw_sa on 2001-09-22 21:29:21 +0000
|
| 1.1.2.2 | 01-Oct-2001 |
fvdl | Catch up with -current.
|
| 1.1.2.1 | 22-Sep-2001 |
fvdl | file linux_syscall.c was added on branch thorpej-devvp on 2001-10-01 12:40:46 +0000
|
| 1.3.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.3.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.3.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.10 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.9 | 28-Apr-2008 |
martin | branches: 1.9.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.8 | 25-Apr-2008 |
christos | branches: 1.8.2;
fix signature
|
| 1.7 | 11-Dec-2005 |
christos | branches: 1.7.74; 1.7.76;
merge ktrace-lwp.
|
| 1.6 | 26-Mar-2004 |
drochner | all ports define __HAVE_SIGINFO now, so remove the CPP conditionals
|
| 1.5 | 30-Oct-2003 |
simonb | KNF.
|
| 1.4 | 29-Oct-2003 |
christos | first pass siginfo glue for mips
|
| 1.3 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.2 | 17-Jan-2003 |
thorpej | branches: 1.2.2;
Merge the nathanw_sa branch.
|
| 1.1 | 22-Sep-2001 |
manu | branches: 1.1.2; 1.1.6; 1.1.8;
Added Linux emulation support to Mips port
|
| 1.1.8.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.1.8.1 | 22-Sep-2001 |
thorpej | file linux_trap.c was added on branch kqueue on 2002-01-10 19:46:08 +0000
|
| 1.1.6.3 | 12-Jul-2002 |
nathanw | No longer need to pull in lwp.h; proc.h pulls it in for us.
|
| 1.1.6.2 | 06-Dec-2001 |
wdk | struct proc -> struct lwp changes for COMPAT_LINUX support on Mips
processors.
|
| 1.1.6.1 | 22-Sep-2001 |
wdk | file linux_trap.c was added on branch nathanw_sa on 2001-12-06 09:30:52 +0000
|
| 1.1.2.2 | 01-Oct-2001 |
fvdl | Catch up with -current.
|
| 1.1.2.1 | 22-Sep-2001 |
fvdl | file linux_trap.c was added on branch thorpej-devvp on 2001-10-01 12:40:46 +0000
|
| 1.2.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.7.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.7.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.8.2.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.8.2.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.9.18.1 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.15 | 10-Jul-2011 |
matt | More <machine/ include cleanup
|
| 1.14 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.13 | 09-Jul-2010 |
chs | branches: 1.13.2; 1.13.4;
fix build problems on MIPS32-only configurations:
define ucas{int,ptr}() directly here using the INT_* and PTR_* macros
instead of defining ucas_{32,64}() and aliasing them to the public names.
|
| 1.12 | 07-Jul-2010 |
chs | implement ucas_* for mips.
|
| 1.11 | 09-Jan-2010 |
simonb | branches: 1.11.2; 1.11.4;
Don't always use ".set mips3" - that explicitly uses 64-bit instructions
and we may be on a 32-bit CPU. Instead use .set mips3/mips32/mips64
depending on current build arch.
Should fix boot problems on a Alchemy CPU reported by KIYOHARA Takashi
on port-mips.
A couple of niggles/concerns:
* XXX Clean up with a macro? Same code fragment is in mipsX_subr.S too.
* XXX Key off build abi instead of processor type?
|
| 1.10 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.9 | 28-Apr-2008 |
martin | branches: 1.9.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.8 | 10-Feb-2008 |
ad | branches: 1.8.6; 1.8.8; 1.8.10;
Add aliases for atomic_cas_foo_ni().
|
| 1.7 | 29-Nov-2007 |
ad | Add alias for atomic_cas_64() if available.
|
| 1.6 | 29-Nov-2007 |
ad | - Change _lock_cas and friends to do "compare and swap" instead of "compare
and set".
- Rename them to _atomic_cas_uint, _atomic_cas_ulong etc and provide strong
aliases for the other names CAS goes by.
|
| 1.5 | 17-Oct-2007 |
garbled | branches: 1.5.2;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.4 | 17-May-2007 |
yamt | branches: 1.4.2; 1.4.8; 1.4.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.3 | 19-Feb-2007 |
simonb | branches: 1.3.2; 1.3.6; 1.3.8; 1.3.14;
Fix checks for 64-bit MIPS (MIPS64 _doesn't_ mean 64-bit MIPS(!)).
|
| 1.2 | 09-Feb-2007 |
ad | branches: 1.2.2;
Merge newlock2 to head.
|
| 1.1 | 11-Jan-2007 |
ad | branches: 1.1.2;
file lock_stubs.S was initially added on branch newlock2.
|
| 1.1.2.4 | 28-Jan-2007 |
ad | Fix build for MIPS3.
|
| 1.1.2.3 | 28-Jan-2007 |
ad | - Fix sequence error between saving/raising the SPL.
- Changes for JavaStation.
- Fix bugs with mips & sparc support routines.
|
| 1.1.2.2 | 27-Jan-2007 |
ad | Make mips systems work.
|
| 1.1.2.1 | 11-Jan-2007 |
ad | Checkpoint work in progress.
|
| 1.2.2.4 | 19-Apr-2007 |
ad | _lock_ras: fix a couple of problems with this.
|
| 1.2.2.3 | 18-Apr-2007 |
ad | Fix a typo on the mips3 mutex_spin_enter.
|
| 1.2.2.2 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.2.2.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.3.14.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.3.8.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.3.6.2 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.3.6.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.3.2.5 | 11-Feb-2008 |
yamt | sync with head.
|
| 1.3.2.4 | 07-Dec-2007 |
yamt | sync with head
|
| 1.3.2.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.3.2.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.3.2.1 | 19-Feb-2007 |
yamt | file lock_stubs.S was added on branch yamt-lazymbuf on 2007-02-26 09:07:28 +0000
|
| 1.4.10.3 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.4.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.4.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.4.8.1 | 03-Dec-2007 |
joerg | Sync with HEAD.
|
| 1.4.2.1 | 18-Jul-2007 |
matt | Don't use t6/t7 since they don't exist in N32/N64; use t8/t9 instead.
Don't use load LDPTR/STPTR, use common PTR_L/PTR_S instead.
|
| 1.5.2.2 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.5.2.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.8.10.3 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.8.10.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.8.10.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.8.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.8.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.9.18.13 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.9.18.12 | 28-Dec-2010 |
matt | Fix MIPS1 corruption problem (wrong register written to ci->ci_mtx_oldspl).
|
| 1.9.18.11 | 24-Dec-2010 |
matt | MIPS1 needs load delay nops. Fix a problem in the RAS mips_spin_enter
where we weren't actually decrementing ci_mtx_count.
|
| 1.9.18.10 | 28-Feb-2010 |
matt | Change from indirect calls to direct calls to spl* routines.
|
| 1.9.18.9 | 27-Feb-2010 |
snj | Fix whitespace in previous.
|
| 1.9.18.8 | 27-Feb-2010 |
snj | Fix comment gimplish.
|
| 1.9.18.7 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.9.18.6 | 26-Jan-2010 |
matt | Add ucas_{32,64}
|
| 1.9.18.5 | 06-Sep-2009 |
matt | Fix more LP64 bugs:
Don't use addu to move between registers, use the move macro instead.
Use XXX_ADDU macros.
|
| 1.9.18.4 | 05-Sep-2009 |
matt | Resolve some conflicts.
|
| 1.9.18.3 | 21-Aug-2009 |
uebayasi | Fix temporary register conversion botch. Should unbreak O32 kernel.
|
| 1.9.18.2 | 20-Aug-2009 |
matt | Make ABI agnostic. (generates same identical code for O32)
|
| 1.9.18.1 | 20-Aug-2009 |
uebayasi | Use t8/t9 instead of t6/t7 which are not available in N32/N64.
|
| 1.11.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.11.2.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.13.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.13.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.18 | 05-Dec-2023 |
andvar | Add missing PTR_WORD command in front of 0.
Likely accidentally missed in the commit, since rev 1.9.
In theory needs pull-ups for netbsd-9, -10, but nobody noticed for 4 years...
|
| 1.17 | 27-Feb-2022 |
riastradh | branches: 1.17.4;
mips: Issue a sync plunger at the end of mutex_spin_exit.
Same as mutex_exit. Relevant only on cnMIPS where the store buffers
get clogged. Recommended by the Cavium documentation. No semantic
change, only performance -- this only adds a barrier in some cases
where there was none before, so it can't hurt correctness.
|
| 1.16 | 27-Feb-2022 |
riastradh | mips: Omit needless SYNC in mutex_exit.
This change deletes a memory barrier. However, it should be safe:
The semantic requirement for this is already provided by the SYNC_REL
above, before the ll. And as currently defined, SYNC_REL is at least
as strong as SYNC, so this change can't hurt correctness on its own
(barring CPU errata, which would apply to other users of SYNC_REL and
can be addressed in the definition of SYNC_REL).
Later, perhaps we can relax SYNC_REL to syncw on Octeon if we prove
that it is correct (e.g., if Octeon follows the SPARCv9 partial store
order semantics).
Nix now-unused SYNC macro in asm.h.
|
| 1.15 | 27-Feb-2022 |
riastradh | mips: Membar audit.
This change should be safe because it doesn't remove or weaken any
memory barriers, but does add, clarify, or strengthen barriers.
Goals:
- Make sure mutex_enter/exit and mutex_spin_enter/exit have
acquire/release semantics.
- New macros make maintenance easier and purpose clearer:
. SYNC_ACQ is for load-before-load/store barrier, and BDSYNC_ACQ
for a branch delay slot -- currently defined as plain sync for MP
and nothing, or nop, for UP; thus it is no weaker than SYNC and
BDSYNC as currently defined, which is syncw on Octeon, plain sync
on non-Octeon MP, and nothing/nop on UP.
It is not clear to me whether load-then-syncw or ll/sc-then-syncw
or even bare load provides load-acquire semantics on Octeon -- if
no, this will fix bugs; if yes (like it is on SPARC PSO), we can
relax SYNC_ACQ to be syncw or nothing later.
. SYNC_REL is for load/store-before-store barrier -- currently
defined as plain sync for MP and nothing for UP.
It is not clear to me whether syncw-then-store is enough for
store-release on Octeon -- if no, we can leave this as is; if
yes, we can relax SYNC_REL to be syncw on Octeon.
. SYNC_PLUNGER is there to flush clogged Cavium store buffers, and
BDSYNC_PLUNGER for a branch delay slot -- syncw on Octeon,
nothing or nop on non-Octeon.
=> This is not necessary (or, as far as I'm aware, sufficient)
for acquire semantics -- it serves only to flush store buffers
where stores might otherwise linger for hundreds of thousands
of cycles, which would, e.g., cause spin locks to be held for
unreasonably long durations.
Newerish revisions of the MIPS ISA also have finer-grained sync
variants that could be plopped in here.
Mechanism:
Insert these barriers in the right places, replacing only those where
the definition is currently equivalent, so this change is safe.
- Replace #ifdef _MIPS_ARCH_OCTEONP / syncw / #endif at the end of
atomic_cas_* by SYNC_PLUNGER, which is `sync 4' (a.k.a. syncw) if
__OCTEON__ and empty otherwise.
=> From what I can tell, __OCTEON__ is defined in at least as many
contexts as _MIPS_ARCH_OCTEONP -- i.e., there are some Octeons
with no _MIPS_ARCH_OCTEONP, but I don't know if any of them are
relevant to us or ever saw the light of day outside Cavium; we
seem to buid with `-march=octeonp' so this is unlikely to make a
difference. If it turns out that we do care, well, now there's
a central place to make the distinction for sync instructions.
- Replace post-ll/sc SYNC by SYNC_ACQ in _atomic_cas_*, which are
internal kernel versions used in sys/arch/mips/include/lock.h where
it assumes they have load-acquire semantics. Should move this to
lock.h later, since we _don't_ define __HAVE_ATOMIC_AS_MEMBAR on
MIPS and so the extra barrier might be costly.
- Insert SYNC_REL before ll/sc, and replace post-ll/sc SYNC by
SYNC_ACQ, in _ucas_*, which is used without any barriers in futex
code and doesn't mention barriers in the man page so I have to
assume it is required to be a release/acquire barrier.
- Change BDSYNC to BDSYNC_ACQ in mutex_enter and mutex_spin_enter.
This is necessary to provide load-acquire semantics -- unclear if
it was provided already by syncw on Octeon, but it seems more
likely that either (a) no sync or syncw is needed at all, or (b)
syncw is not enough and sync is needed, since syncw is only a
store-before-store ordering barrier.
- Insert SYNC_REL before ll/sc in mutex_exit and mutex_spin_exit.
This is currently redundant with the SYNC already there, but
SYNC_REL more clearly identifies the necessary semantics in case we
want to define it differently on different systems, and having a
sync in the middle of an ll/sc is a bit weird and possibly not a
good idea, so I intend to (carefully) remove the redundant SYNC in
a later change.
- Change BDSYNC to BDSYNC_PLUNGER at the end of mutex_exit. This has
no semantic change right now -- it's syncw on Octeon, sync on
non-Octeon MP, nop on UP -- but we can relax it later to nop on
non-Cavium MP.
- Leave LLSCSYNC in for now -- it is apparently there for a Cavium
erratum, but I'm not sure what the erratum is, exactly, and I have
no reference for it. I suspect these can be safely removed, but we
might have to double up some other syncw instructions -- Linux uses
it only in store-release sequences, not at the head of every ll/sc.
|
| 1.14 | 27-Feb-2022 |
riastradh | mips: Make sure that mutex_spin_exit works even if !DIAGNOSTIC.
The critical store has been under #ifdef DIAGNOSTIC since, uh, 2011.
|
| 1.13 | 26-Sep-2020 |
simonb | Expose the atomicvec vectors via EXPORT_OBJECT so ksyms(4) address
lookups can find them.
|
| 1.12 | 09-Aug-2020 |
skrll | This file is only ever used when MULTIPROCESSOR so unifdef MULTIPROCESSOR
|
| 1.11 | 06-Aug-2020 |
skrll | Centralise SYNC/BDSYNC in asm.h and introduce a new LLCSCSYNC and use it
before any ll/sc sequences.
Define LLSCSYNC as syncw; syncw for cnMIPS - issue two as early cnMIPS
has errat{um,a} that means the first can fail.
|
| 1.10 | 01-Aug-2020 |
simonb | Add a comment to say that an Octeon "sync 4" is "syncw" - sync all writes.
|
| 1.9 | 06-Apr-2019 |
thorpej | branches: 1.9.4;
Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.8 | 24-Aug-2017 |
maya | branches: 1.8.4;
Eliminate redundant load delays.
Machines that need load delays do not have ll/sc instructions.
|
| 1.7 | 19-Aug-2016 |
skrll | Trailing whitespace
|
| 1.6 | 27-Jul-2016 |
skrll | Sprinle RCSID
|
| 1.5 | 11-Jul-2016 |
matt | branches: 1.5.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.4 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.3 | 04-Jun-2015 |
matt | Use syncw on OCTEON
|
| 1.2 | 10-Jul-2011 |
matt | branches: 1.2.12; 1.2.30;
More <machine/ include cleanup
|
| 1.1 | 20-Feb-2011 |
matt | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1.10.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.10.1 | 20-Feb-2011 |
jruoho | file lock_stubs_llsc.S was added on branch jruoho-x86intr on 2011-06-06 09:06:06 +0000
|
| 1.1.6.3 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.1.6.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.6.1 | 20-Feb-2011 |
matt | file lock_stubs_llsc.S was added on branch matt-nb5-mips64 on 2011-04-29 08:26:26 +0000
|
| 1.1.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.4.1 | 20-Feb-2011 |
rmind | file lock_stubs_llsc.S was added on branch rmind-uvmplock on 2011-03-05 20:51:06 +0000
|
| 1.1.2.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.2.1 | 20-Feb-2011 |
bouyer | file lock_stubs_llsc.S was added on branch bouyer-quota2 on 2011-03-05 15:09:49 +0000
|
| 1.2.30.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.2.30.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.30.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.30.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.2.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.8.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.9.4.1 | 09-Dec-2023 |
martin | Pull up following revision(s) (requested by andvar in ticket #1773):
sys/arch/mips/mips/lock_stubs_llsc.S: revision 1.18
Add missing PTR_WORD command in front of 0.
Likely accidentally missed in the commit, since rev 1.9.
|
| 1.17.4.1 | 09-Dec-2023 |
martin | Pull up following revision(s) (requested by andvar in ticket #484):
sys/arch/mips/mips/lock_stubs_llsc.S: revision 1.18
Add missing PTR_WORD command in front of 0.
Likely accidentally missed in the commit, since rev 1.9.
|
| 1.12 | 08-Sep-2024 |
rillig | fix a/an grammar in obvious cases
|
| 1.11 | 26-Sep-2020 |
simonb | branches: 1.11.26;
Expose the atomicvec vectors via EXPORT_OBJECT so ksyms(4) address
lookups can find them.
|
| 1.10 | 06-Apr-2019 |
thorpej | Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.9 | 01-Mar-2017 |
skrll | branches: 1.9.14;
Can't profile ras_atomic_cas_noupdate
|
| 1.8 | 19-Aug-2016 |
skrll | branches: 1.8.2;
Trailing whitespace
|
| 1.7 | 27-Jul-2016 |
skrll | Sprinle RCSID
|
| 1.6 | 11-Jul-2016 |
matt | branches: 1.6.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.5 | 07-Jun-2015 |
matt | assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
| 1.4 | 27-Aug-2011 |
bouyer | branches: 1.4.12; 1.4.30;
loongson2f support:
- Add some loongson2 definitions to cpuregs.h, from OpenBSD
- Make sure that the at register is useable before every jump register
instruction (exept when register is k0 or k1) because -mfix-loongson2f-btb
needs the at register for its workaround
- add code to mips_fixup.c to handle the instructions added by
-mfix-loongson2f-btb
- Add a ls2-specific tlb miss handler: it doesn't have separate handler
for the xtlbmiss exeption.
- Fixes for some #ifdef MIPS3_LOONGSON2 assembly code (using the wrong
register)
|
| 1.3 | 29-Apr-2011 |
matt | branches: 1.3.4;
Since the RAS lock stubs are the default, don't bother assigning them just
make the default.
|
| 1.2 | 08-Mar-2011 |
tsutsui | branches: 1.2.2;
Put NOPs to avoid load delay hazard on R3000.
Fixes TLB miss panic in ras_mutex_spin_exit() on NWS-3470D.
|
| 1.1 | 20-Feb-2011 |
matt | branches: 1.1.2; 1.1.4;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1.4.4 | 31-May-2011 |
rmind | sync with head
|
| 1.1.4.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.4.1 | 20-Feb-2011 |
rmind | file lock_stubs_ras.S was added on branch rmind-uvmplock on 2011-03-05 20:51:06 +0000
|
| 1.1.2.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.2.1 | 20-Feb-2011 |
bouyer | file lock_stubs_ras.S was added on branch bouyer-quota2 on 2011-03-05 15:09:49 +0000
|
| 1.2.2.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.2.2.1 | 08-Mar-2011 |
matt | file lock_stubs_ras.S was added on branch matt-nb5-mips64 on 2011-04-29 08:26:26 +0000
|
| 1.3.4.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.4.1 | 29-Apr-2011 |
jruoho | file lock_stubs_ras.S was added on branch jruoho-x86intr on 2011-06-06 09:06:06 +0000
|
| 1.4.30.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.4.30.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.4.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.4.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.2.2 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.6.2.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.8.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.9.14.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.11.26.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.231 | 24-Jun-2023 |
msaitoh | Fix typo in comment.
|
| 1.230 | 01-Mar-2023 |
riastradh | mips: Optimization: Omit needless membar when triggering softint.
When we are triggering a softint, it can't already hold any mutexes.
So any path to mutex_exit(mtx) must go via mutex_enter(mtx), which is
always done with atomic r/m/w, and we need not issue any explicit
barrier between ci->ci_curlwp = softlwp and a potential load of
mtx->mtx_owner in mutex_exit.
PR kern/57240
XXX pullup-8
XXX pullup-9
XXX pullup-10
|
| 1.229 | 23-Feb-2023 |
riastradh | mips: Add missing barriers in cpu_switchto.
Details in comments.
PR kern/57240
XXX pullup-8
XXX pullup-9
XXX pullup-10
|
| 1.228 | 29-May-2021 |
simonb | branches: 1.228.12;
Update the FPU register names and bit definitions to something somewhat
modern (MIPS32/MIPS64) and convert to __BIT/__BITS.
|
| 1.227 | 18-Apr-2021 |
mrg | branches: 1.227.2; 1.227.4;
move softint_cleanup, which is a part of softint_fast_dispatch(),
into the section of code known as softint_fast_dispatch().
previous:
db> x/i softint_cleanup
netbsd:cpu_switchto+0xd4: ld t0,0(t8)
except that cpu_switchto() ends at cpu_switchto+0xd0.
now:
db> x/i softint_cleanup
netbsd:softint_fast_dispatch+0xa4: ld t0,0(t8)
tested on OCTEON.
|
| 1.226 | 26-Sep-2020 |
simonb | Use EXPORT for start and EXPORT_OBJECT for kernel_text instead of
by-hand exporting. Using EXPORT_OBJECT for kernel_text also fixes
"bt/a" from DDB.
|
| 1.225 | 31-Jul-2020 |
skrll | Whitespace / comment alignment
|
| 1.224 | 31-Jul-2020 |
skrll | Trailing whitespace
|
| 1.223 | 20-Jul-2020 |
simonb | Use MIPS_EBASE_CPUNUM instead of magic numbers.
|
| 1.222 | 08-Jan-2020 |
skrll | oldlwp is always non-NULL in cpu_switchto so remove the test for NULL.
|
| 1.221 | 08-Jan-2020 |
ad | Hopefully fix some problems seen with MP support on non-x86, in particular
where curcpu() is defined as curlwp->l_cpu:
- mi_switch(): undo the ~2007ish optimisation to unlock curlwp before
calling cpu_switchto(). It's not safe to let other actors mess with the
LWP (in particular l->l_cpu) while it's still context switching. This
removes l->l_ctxswtch.
- Move the LP_RUNNING flag into l->l_flag and rename to LW_RUNNING since
it's now covered by the LWP's lock.
- Ditch lwp_exit_switchaway() and just call mi_switch() instead. Everything
is in cache anyway so it wasn't buying much by trying to avoid saving old
state. This means cpu_switchto() will never be called with prevlwp ==
NULL.
- Remove some KERNEL_LOCK handling which hasn't been needed for years.
|
| 1.220 | 05-Sep-2019 |
skrll | branches: 1.220.2;
Fix a maya fix so that cobalt boots again.
Set MIPS_COP_0_CAUSE to zero before the rest of the initialisation
|
| 1.219 | 07-Sep-2018 |
macallan | branches: 1.219.4;
re-enable 64bit addressing in n32 kernels
Now these work again, at least on my Indy.
|
| 1.218 | 28-Mar-2018 |
maya | branches: 1.218.2;
Leave TS and RE alone for the benefit of emips, which failed
to boot even earlier after locore.S:1.211.
Do this unconditionally to avoid introducing more ifdefs.
Also tested on ci20 and erlite.
|
| 1.217 | 07-Mar-2018 |
maya | Remove now duplicate code for enabling FPU before reading FPU_ID
|
| 1.216 | 07-Mar-2018 |
maya | Remove now duplicate code to read FPU_ID into t1
|
| 1.215 | 07-Mar-2018 |
maya | Remove duplicate confused code for enabling 64bit addressing
|
| 1.214 | 07-Mar-2018 |
maya | Add duplicate code to read the FPU ID.
enable & disable the FPU around it.
|
| 1.213 | 07-Mar-2018 |
maya | Move the hpcmips L1 cache disable hack up
where another machine-specific hacks exists.
Note that no existing kernel seems to enable this option.
|
| 1.212 | 07-Mar-2018 |
maya | Add duplicate code that enables 64bit addressing under the right
macro conditions that is, _LP64.
The existing, previous code uses NOFPU as a condition for it.
This adds duplicated code (and later removes) for easy bisecting.
|
| 1.211 | 07-Mar-2018 |
maya | Replace early interrupt disable code.
As suggested by dh, carefully disable interrupts before frobbing
interrupt mask, which might trigger more interrupts.
Don't bother with keeping BEV and such.
Note that we are zeroing out STATUS later on in the (NOFPU || emips)
case right now.
This change is risky for emips which wasn't tested and didn't reach
userland before.
|
| 1.210 | 24-Jan-2018 |
maya | branches: 1.210.2;
Clarify this is a load delay nop.
|
| 1.209 | 24-Jan-2018 |
maya | Add whitespace for clarity.
|
| 1.208 | 09-Nov-2016 |
maya | branches: 1.208.8;
Move MFC0_HAZARD definition to asm.h instead of defining it twice
|
| 1.207 | 13-Oct-2016 |
macallan | include locore.h for MIPS3_PLUS, while there annotate some #else and #endif
|
| 1.206 | 19-Aug-2016 |
skrll | Trailing whitespace
|
| 1.205 | 13-Aug-2016 |
skrll | Move the NOP_L macro into asm.h
|
| 1.204 | 27-Jul-2016 |
skrll | Sprinle RCSID
|
| 1.203 | 26-Jul-2016 |
skrll | Set the cause register to zero after disabling interrupts now that spl0
doesn't do it.
My cobalt now boots (again again)
|
| 1.202 | 11-Jul-2016 |
matt | branches: 1.202.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.201 | 04-Jul-2016 |
maya | Always get cop0 STATUS register for savectx, not just in PARANOIA case.
We later save this value in PCB_CONTEXT+SF_REG_SR, it needs to be valid.
ok dholland@
|
| 1.200 | 02-Jul-2016 |
maya | Sprinkle MFC0_HAZARD everywhere.
ok dholland@
|
| 1.199 | 02-Jul-2016 |
maya | Another mfc hazard
|
| 1.198 | 13-Jun-2016 |
dholland | Add missing nops after mfc0 on mips1-3. Mostly from coypu; should fix
an issue posted a month ago or so on port-pmax.
|
| 1.197 | 11-Jun-2015 |
matt | Don't include <machine/param.h> in .S files, get the needed values from assym.h
Define NBPG as UL to avoid integer over with NBXSEG on LP64 systems.
(.S files don't like numbers with UL appended to them).
|
| 1.196 | 07-Jun-2015 |
matt | Define COP0 register that use select value in <mips/cpuregs.h>
Use those new definitions
|
| 1.195 | 06-Jun-2015 |
matt | On mipsNN use the trap instruction to panic or pop into ddb instead of
looping forever in the PARANOIA chunks.
|
| 1.194 | 03-Jun-2015 |
matt | Save a few instructions and use ei on mipsNNr2.
|
| 1.193 | 02-Jun-2015 |
matt | Indent branch delay slot instructions.
|
| 1.192 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.191 | 19-May-2015 |
matt | u-boot on the ERLITE will call the kernel entry point on each cpu specified
in the coremask argument. Add code to deal with that.
|
| 1.190 | 01-Mar-2013 |
joerg | branches: 1.190.14;
Retire OSI network stack. OK core@
|
| 1.189 | 13-Nov-2011 |
tsutsui | branches: 1.189.10;
Read-modify-write instead of read-modify-read. (not sure if this was fatal)
|
| 1.188 | 16-Aug-2011 |
matt | branches: 1.188.2;
Only jump through t9/ra (or k0) to help avoid hitting
the Loongson2 jump problem.
|
| 1.187 | 06-Apr-2011 |
tsutsui | Fix build error in previous:
>> ../arch/mips/mips/locore.S:632: Error: register value used as expression
|
| 1.186 | 06-Apr-2011 |
matt | Don't bother saving T8 (MIPS_CURLWP).
Avoid branches when determining delay slot.
|
| 1.185 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.184 | 08-Mar-2011 |
tsutsui | Sprinkle NOPs to avoid load delay hazard on R3000.
|
| 1.183 | 26-Feb-2011 |
tsutsui | - clear MIPS_FPU_EXCEPTION_BITS in MIPS_FPU_CSR in SIGILL case
as noted in commit log of rev 1.158
- update comment to reflect changes in rev 1.109
|
| 1.182 | 26-Feb-2011 |
tsutsui | Fix comment about mips_emul_fp() call.
|
| 1.181 | 24-Feb-2011 |
tsutsui | - use correct address to fetch an instruction that causes FP trap
not in BDslot (broken since the first mips64 partial merge)
- also fix leftover confusing comment that should have been removed
when rev 1.82 was committed back in 1999.
Previously the most ieeefp tests dump core:
---
tp-start: t_except, 6
tc-start: masked_double
tc-end: masked_double, failed, Test program received signal 4 (core dumped)
tc-start: masked_float
tc-end: masked_float, failed, Test program received signal 4 (core dumped)
tc-start: masked_long_double
tc-end: masked_long_double, failed, Test program received signal 4 (core dumped)
tc-start: unmasked_double
tc-end: unmasked_double, failed, Test program received signal 4 (core dumped)
tc-start: unmasked_float
tc-end: unmasked_float, failed, Test program received signal 4 (core dumped)
tc-start: unmasked_long_double
tc-end: unmasked_long_double, failed, Test program received signal 4 (core dumped)
tp-end: t_except
:
tp-start: t_subnormal, 2
tc-start: test_double
tc-end: test_double, failed, Test program received signal 4 (core dumped)
tc-start: test_float
tc-end: test_float, failed, Test program received signal 4 (core dumped)
tp-end: t_subnormal
---
Now they fail differently:
---
tp-start: t_except, 6
tc-start: masked_double
tc-end: masked_double, failed, Test program received signal 4 (core dumped)
tc-start: masked_float
tc-end: masked_float, passed
tc-start: masked_long_double
tc-se:*** Check failed: /usr/src/tests/lib/libc/ieeefp/t_except.c:227: ex1 & t->mask != t->mask
tc-end: masked_long_double, failed, 1 checks failed; see output for more details
tc-start: unmasked_double
tc-se:*** Check failed: /usr/src/tests/lib/libc/ieeefp/t_except.c:269: sicode != t->sicode
tc-end: unmasked_double, failed, 1 checks failed; see output for more details
tc-start: unmasked_float
tc-se:*** Check failed: /usr/src/tests/lib/libc/ieeefp/t_except.c:269: sicode != t->sicode
tc-end: unmasked_float, failed, 1 checks failed; see output for more details
tc-start: unmasked_long_double
tc-se:*** Check failed: /usr/src/tests/lib/libc/ieeefp/t_except.c:269: sicode != t->sicode
tc-end: unmasked_long_double, failed, 1 checks failed; see output for more details
tp-end: t_except
:
tp-start: t_subnormal, 2
tc-start: test_double
tc-end: test_double, failed, Test program received signal 4 (core dumped)
tc-start: test_float
tc-end: test_float, failed, Test program received signal 4 (core dumped)
tp-end: t_subnormal
---
|
| 1.180 | 24-Feb-2011 |
tsutsui | Fix wrong register usage in mips_fpu_trap():
- trapframe is the second arg a1, not a3
- cause is now loaded in a2, not t0 or t3
Fixes kernel panic during tests/lib/libc/ieeefp:
---
tps-count: 4
tp-start: t_except, 6
tc-start: masked_double
pid 645(t_except): trap: cpu0, TLB modification in kernel mode
status=0x2000ff03, cause=0x4, epc=0x80001420, vaddr=0x4026c8
tf=0xc8b15d00 ksp=0xc8b15da0 ra=0x8024af80 ppl=0x7fff5cd0
kernel: TLB modification trap
Stopped in pid 645.1 (t_except) at \
netbsd:mips_fpu_intr+0x74: sw t3,144(a3)
db>
----
though the ieeefp tests still fail in various places.
|
| 1.179 | 24-Feb-2011 |
tsutsui | MachEmulateInst() -> mips_emul_inst() in comment.
|
| 1.178 | 24-Feb-2011 |
tsutsui | Fix comment mangled in rev 1.142 back in 2002.
|
| 1.177 | 20-Feb-2011 |
matt | Make sure to pass cause as the 3rd arg to mips_emul_fp
|
| 1.176 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.175 | 26-Jan-2011 |
pooka | Add support for the Extensible MIPS ("eMIPS") platform. The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.
eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing. eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.
NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman. Microsoft Corporation has
donated full copyright to The NetBSD Foundation.
Platform support for eMIPS is the first part of Microsoft's
contribution. The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.
|
| 1.174 | 22-Jan-2011 |
tsutsui | Fix a fatal typo that causes TLB miss panic in MachFPInterrupt().
Reported in followups of PR port-cobalt/44292.
|
| 1.173 | 22-Dec-2010 |
nisimura | branches: 1.173.2; 1.173.4;
- make sure cpu_switchto() not to touch MIPS_CURLWP register at newlwp
switchframe restoration stage.
- discard MIPS_CURLWP assignments exposed in cpu_lwp_fork() and
cpu_setfunc().
- use plain 'jal' instruction to call lwp_startup().
|
| 1.172 | 20-Dec-2009 |
rmind | branches: 1.172.4;
Slightly improve the comment.
|
| 1.171 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.170 | 10-Dec-2009 |
rmind | Rename L_ADDR to L_PCB and amend some comments accordingly.
|
| 1.169 | 27-Nov-2009 |
rmind | - Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
|
| 1.168 | 26-Nov-2009 |
matt | Kill proc0paddr. Use lwp0.l_addr instead.
|
| 1.167 | 17-Oct-2007 |
garbled | branches: 1.167.20; 1.167.38;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.166 | 17-May-2007 |
yamt | branches: 1.166.2; 1.166.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.165 | 23-Feb-2007 |
tsutsui | branches: 1.165.4; 1.165.6; 1.165.12;
uvm.page_idle_zero now is a bool, not a 32bit value any more.
BTW, is it still worth to have uvm_pageidlezero()? Which port uses it?
|
| 1.164 | 09-Feb-2007 |
ad | branches: 1.164.2;
Merge newlock2 to head.
|
| 1.163 | 19-Dec-2006 |
simonb | Fix a tyop, and a few other little punctuation nits while here.
|
| 1.162 | 07-Sep-2006 |
dogcow | branches: 1.162.2; 1.162.4;
remove more vestiges of CCITT, LLC, HDLC, NS, and NSIP.
|
| 1.161 | 12-May-2006 |
skrll | Fix some comments.
|
| 1.160 | 13-Nov-2005 |
simonb | branches: 1.160.6; 1.160.8; 1.160.10; 1.160.14;
Switch to the libkern C versions of _insque()/_remque().
Problems building -current and pointers to the libkern versions of
these functions from Izumi Tsutsui.
|
| 1.159 | 26-Feb-2005 |
simonb | branches: 1.159.4;
Another macro in a branch delay slot problem. Pad with a nop.
Pointed out again by Izumi Tsutsui on port-mips.
|
| 1.158 | 04-Mar-2004 |
drochner | branches: 1.158.8; 1.158.10;
fix some problems with FPU exception signaling:
-The MachFPTrap did generate pre-siginfo arguments to trapsignal(),
leading to an immediate crash.
Put the siginfo generation into a separate .c file for simplicity.
-The exception bits in MIPS_FPU_CSR didn't get cleared, leading to
trouble later ("kernel used FPU" on pmax).
XXX This should probably be done for the "unimplemented fpu instruction"
case as well, but I don't know how to test this. Or, even better -
centralize the CSR clearing before the branch in MachFPTrap.
|
| 1.157 | 04-Nov-2003 |
dsl | Remove p_nras from struct proc - use LIST_EMPTY(&p->p_raslist) instead.
Remove p_raslock and rename p_lwplock p_lock (one lock is enough).
Simplify window test when adding a ras and correct test on VM_MAXUSER_ADDRESS.
Avoid unpredictable branch in i386 locore.S
(pad fields left in struct proc to avoid kernel bump)
|
| 1.156 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.155 | 23-Jun-2003 |
martin | branches: 1.155.2;
Make sure to include opt_foo.h if a defflag option FOO is used.
|
| 1.154 | 04-May-2003 |
simonb | Remove a duplicate load of "a1" in page_zero (a PAGE_SIZE vs NBPG botch).
|
| 1.153 | 04-May-2003 |
simonb | Use 64-bit "sd" in mips_pagezero() if we're compiled for MIPS{3,4,64}
(the actual check is !MIPS1 && !MIPS32).
Do the ".set push", ".set mips3", ".set pop" dance if we use 64-bit
instructions.
|
| 1.152 | 08-Apr-2003 |
thorpej | Use PAGE_SIZE rather than NBPG.
|
| 1.151 | 08-Feb-2003 |
cgd | use COP0_HAZARD_FPUENABLE in a couple more places when turning on FP:
In start (noticed after looking for more COP_1_BIT uses, and note
that there are extra nops here but really they don't hurt), and in
MachFPTrap (noticed by ... running regress!).
|
| 1.150 | 21-Jan-2003 |
simonb | Fix a tyop and some white-space nits.
|
| 1.149 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.148 | 09-Nov-2002 |
nisimura | branches: 1.148.4;
- Make monolistic files into smaller manageable pieces, resulting
three new files;
sig_machdep.c (from mips_machdep.c)
copy.S and sigcode.S (from locore.S)
- Nuke the local use of struct sigframe, which is now identical to
struct sigcontext, from sendsig() as the consequence of new signal
trampoline.
|
| 1.147 | 04-Nov-2002 |
thorpej | t4-t7 -> ta0-ta3
|
| 1.146 | 04-Nov-2002 |
thorpej | Rearrange mips_pagecopy() and mips_pagezero() for N32/LP64.
XXX Does not yet use the correct reg names for new-ABI.
|
| 1.145 | 03-Nov-2002 |
nisimura | Retire __HAVE_MD_RUNQUEUE from MD types.h and remove
setrunqueue/remrunqueue from locore.S. C codes are
compiled a bit shorter and provide better DIAGNOSTICs.
|
| 1.144 | 09-Sep-2002 |
simonb | In the idle functions, set curproc to NULL and (#ifdef LOCKDEBUG) call
sched_unlock_idle before enabling interrupts. LOCKDEBUG kernels now
boot successfully.
Thanks to Chris Gilbert for helping fix this.
|
| 1.143 | 28-Aug-2002 |
gmcgarry | RAS support for MIPS. Tested on R3000.
|
| 1.142 | 06-Jul-2002 |
gmcgarry | Overhaul the emulation facility. We do this by:
- accumulating all emulation code (including floating-point) in one place
- steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts
and traps from *real* FPUs
- introducing MachEmulateInst() as a common dispatch point for all
emulated instructions
- cleaning up emulation dispatch in trap()
Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1.
Tested on r3k with and without SOFTFLOAT enabled.
|
| 1.141 | 04-Jul-2002 |
thorpej | Eliminate 4 unused sigframe members.
|
| 1.140 | 01-Jun-2002 |
simonb | Standardise on the name "MIPS_SR_BEV" instead of a couple of different
#defines for the same status bit.
|
| 1.139 | 25-Apr-2002 |
simonb | branches: 1.139.2;
In the LOCKDEBUG case, call exit2() before sched_lock_idle() so
that the exitting process pointer in a0 doesn't get overwritten by
sched_lock_idle().
|
| 1.138 | 14-Apr-2002 |
manu | Removed the IRIX signal trampoline, which is useless now we use the signal
trampoline provided by IRIX libc.
|
| 1.137 | 13-Apr-2002 |
manu | More comments on the new signal frame/trampoline
|
| 1.136 | 12-Apr-2002 |
manu | Reworked IRIX signal delivery so that ucontext is used instead of sigcontext
when SA_SIGINFO is used. The IRIX process will hence find the expected
information using the third argument of the signal handler.
We do not provide code and siginfo yet.
|
| 1.135 | 03-Apr-2002 |
simonb | Backout the .sdata to .data change for now; this broke compiling of
hpcmips kernels.
|
| 1.134 | 03-Apr-2002 |
simonb | Put a couple of variables in the data section, not the sdata section.
|
| 1.133 | 01-Apr-2002 |
manu | undef SYSCALL_SHIFT after using it so that it is possible to define both
COMPAT_IRIX and COMPAT_LINUX without getting warnings about SYSCALL_SHIFT
being redefined.
|
| 1.132 | 05-Mar-2002 |
simonb | Change a MIPS3 check to a MIPS3_PLUS check.
XXX: I'm not 100% sure of the intent of this code - it would seem that
it needs a run-time check of CPU ISA to be completely correct...
|
| 1.131 | 30-Jan-2002 |
uch | move TX39 specific cache configuration code to cache.c
|
| 1.130 | 04-Jan-2002 |
takemura | Modify only K0 bits and save other bits. (HPCMIPS_L1CACHE_DISABLE)
|
| 1.129 | 08-Dec-2001 |
manu | Added IRIX signal trampoline
|
| 1.128 | 26-Nov-2001 |
shin | fix pasteo.
|
| 1.127 | 20-Nov-2001 |
manu | Fixed the Linux signal trampoline and linux_sys_sigreturn(). Linux signal
delivery now seems fully functionnal.
|
| 1.126 | 14-Nov-2001 |
thorpej | branches: 1.126.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.125 | 12-Nov-2001 |
simonb | Fix pasto in a comment.
|
| 1.124 | 16-Oct-2001 |
uch | branches: 1.124.2;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.123 | 22-Sep-2001 |
manu | Added Linux emulation support to Mips port
|
| 1.122 | 09-Jul-2001 |
simonb | branches: 1.122.2; 1.122.4;
bcopy -> memcpy
|
| 1.121 | 30-May-2001 |
lukem | add missing #include "opt_kgdb.h"
|
| 1.120 | 14-Dec-2000 |
jeffs | branches: 1.120.2;
For MIPS software masking option, when returning to user mode apply
the mask to all interrupts to catch changes in the mask state faster.
Does not affect platforms w/o this option enabled.
|
| 1.119 | 31-Oct-2000 |
jeffs | Add mips_pagecopy/zero assembly loops for use by pmap_copy/zero_page*()
to allow the almost-64-bit compilation use ld/sd.
|
| 1.118 | 05-Oct-2000 |
cgd | add two blank lines
|
| 1.117 | 05-Oct-2000 |
cgd | tweak cpu_arch. Eliminate all direct checks of it (making them
use the macro CPUISMIPS3 -- which is badly misnamed), and set it
from #defines named CPU_ARCH_N (where N is 1..5, 32, 64).
|
| 1.116 | 04-Oct-2000 |
cgd | rename mips_read_causereg -> mips_cp0_cause_read. nuke prototype
for mips_read_statusreg (which was apparently never implemented).
Provide prototypes and implementations for mips_cp0_cause_write,
mips_cp0_status_read, and mips_cp0_status_write. (Writing can, of
course, be quite dangerous.)
|
| 1.115 | 05-Sep-2000 |
soren | Back out (most of) previous. I was using an 1.5 asm.h and hadn't
noticed cgd's fix..
|
| 1.114 | 05-Sep-2000 |
soren | Add nop after PANIC macros.
|
| 1.113 | 20-Aug-2000 |
thorpej | Add a lock around the scheduler, and use it as necessary, including
in the non-MULTIPROCESSOR case (LOCKDEBUG requires it). Scheduler
lock is held upon entry to mi_switch() and cpu_switch(), and
cpu_switch() releases the lock before returning.
Largely from Bill Sommerfeld, with some minor bug fixes and
machine-dependent code hacking from me.
|
| 1.112 | 09-Aug-2000 |
jeffs | To be safe when called from interupt, [fs]uswintr need to preserve
cpu_onfault. By Etan Solomita (ethan@geocast.com).
|
| 1.111 | 25-Jul-2000 |
jeffs | Add option to apply additional mask to the SR at run-time for MIPS3 platforms.
By default this is off, and only slightly changes the code to load SR when
a temp register is available. This can be used by the platform code to
handle slow to clear interrupts (our case) or to mask off any interrupt
any interrupt at run-time. This can be very useful for embedded platforms
that have less than desirable interrupt properties.
|
| 1.110 | 20-Jul-2000 |
jeffs | Make pmap_prefer() use a global setting based on cache size
instead of assuming 64KB. This allows best fit and will
support bigger caches.
|
| 1.109 | 19-Jul-2000 |
jeffs | In FPU excepton code, send SIGILL if no one claims the instruction.
SIGFPE is still delivered where appropriate.
|
| 1.108 | 19-Jul-2000 |
jeffs | Fix stacktrace() to have an 8 byte aligned stack. On our platform previously
it would hang-up. logstacktrace() actually was the same as stacktrace() so
just make it an XLEAF() for now. Include some DDB code for KGDB compilation.
|
| 1.107 | 19-Jul-2000 |
jeffs | At the start of the kernel, keep the MIPS3_SR_DIAG_BEV setting
on mips3 systems, until the kernel actually hooks the vectors.
This makes it easier to debug early problems if the firmware
has provides an exception handler.
|
| 1.106 | 18-Jul-2000 |
jeffs | Use spl*_noprof routines to raise and lower spl for kernel profiling.
This keeps the SR management more contained in locore, and should
be roughly the same performance as the .text size is less. Talked
to simonb and he was ok with this change.
|
| 1.105 | 17-Jul-2000 |
jeffs | Make memcpy() the favored interface an swizzle the args for ovbcopy. Also
move bcopy XLEAF here from locore.S. For 64b clean compilation add a
ld/sd section to the block copy.
|
| 1.104 | 10-Jun-2000 |
soren | branches: 1.104.2;
Post a SIGFPE rather than SIGILL on floating point exceptions.
|
| 1.103 | 31-May-2000 |
thorpej | Add a comment about needing to initialize p_cpu when multiple
processors are supported.
|
| 1.102 | 30-May-2000 |
nisimura | - Have savefpregs() and loadfpregs() in C codes with lengthy inlined
asm statements, obsoluting asm routines in locore.S. They are
designed to work in symmetry as names suggests. savefpregs()
does not clear a global variable fpcurproc. Both would be noops when
NOFPU global symbol is defined.
- MDP_FPUSED flag is not turned on for FPA-less processors like Vr4100
and TX3900 even when processes execute FP insns.
|
| 1.101 | 29-May-2000 |
simonb | A few more white-space bogons.
|
| 1.100 | 26-May-2000 |
thorpej | branches: 1.100.2;
First sweep at scheduler state cleanup. Collect MI scheduler
state into global and per-CPU scheduler state:
- Global state: sched_qs (run queues), sched_whichqs (bitmap
of non-empty run queues), sched_slpque (sleep queues).
NOTE: These may collectively move into a struct schedstate
at some point in the future.
- Per-CPU state, struct schedstate_percpu: spc_runtime
(time process on this CPU started running), spc_flags
(replaces struct proc's p_schedflags), and
spc_curpriority (usrpri of processes on this CPU).
- Every platform must now supply a struct cpu_info and
a curcpu() macro. Simplify existing cpu_info declarations
where appropriate.
- All references to per-CPU scheduler state now made through
curcpu(). NOTE: this will likely be adjusted in the future
after further changes to struct proc are made.
Tested on i386 and Alpha. Changes are mostly mechanical, but apologies
in advance if it doesn't compile on a particular platform.
|
| 1.99 | 26-May-2000 |
thorpej | Introduce a new process state distinct from SRUN called SONPROC
which indicates that the process is actually running on a
processor. Test against SONPROC as appropriate rather than
combinations of SRUN and curproc. Update all context switch code
to properly set SONPROC when the process becomes the current
process on the CPU.
|
| 1.98 | 21-May-2000 |
uch | change TX3922 D-cache mode to write-through.
|
| 1.97 | 10-May-2000 |
nisimura | Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3. It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs. mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.
|
| 1.96 | 30-Apr-2000 |
simonb | Only call uvm_pageidlezero() if uvm.page_idle_zero is set.
|
| 1.95 | 29-Apr-2000 |
soren | Move free page zeroing to before the whichqs spinner. Pointed out by simonb.
|
| 1.94 | 28-Apr-2000 |
soren | Zero free pages in the idle loop.
|
| 1.93 | 10-Apr-2000 |
nisimura | Make (sure) ASID management same as what NetBSD/alpha does for ASN.
ASID#0 is reserved for pmap0 shared between proc0 and kthreads,
and every TLB for KSEG2 has G (global) bit to have wildcard match
regardless of the process' ASID. MIPS1 would flush TLBs belong
to user spaces upon ASID generation bump. Change for MIPS3 is
to be done.
|
| 1.92 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.91 | 28-Mar-2000 |
nisimura | Change 'goto cpu_switch1' to 'goto cpu_switch_queuescan' in vr_idle.S
and make the jump destination global.
|
| 1.90 | 27-Mar-2000 |
nisimura | Rename sw1 label found in cpu_switch() to cpu_switch_queuescan,
abandoning unnecessary .globl because switch_exit() is handsomely
common between MIPS1 and MIPS3.
|
| 1.89 | 24-Mar-2000 |
soren | One instruction per line.
|
| 1.88 | 24-Mar-2000 |
nisimura | Have ST_REG_SR mnemonic for status register consistent with others.
|
| 1.87 | 01-Feb-2000 |
thorpej | Fix a bug in cpu_switch() introduced with the MIPSX_CPU_IDLE changes; we
have a 1 instruction delay after a load before the register contents are
valid on the R2000/R3000.
|
| 1.86 | 28-Jan-2000 |
takemura | Delete unused lines.
|
| 1.85 | 28-Jan-2000 |
takemura | CPU specific idle hook and VR idle routine.
|
| 1.84 | 09-Jan-2000 |
shin | split 'options SOFTFLOAT' to
NOFP don't touch FPU registers in kernel
SOFTFLOAT emulate FPU instructions in kernel
|
| 1.83 | 29-Dec-1999 |
castor | Make SOFTFLOAT emulation compatible with _MIPS_BSD_API_LP32_64CLEAN
|
| 1.82 | 22-Dec-1999 |
jun | FIX:
port-mips/9016 [serious/medium]:
MIPS FPU emulator points wrong epc on exception case
Responsible: port-mips-maintainer (NetBSD/mips Portmasters)
State: open
Class: sw-bug
Originator: Shuichiro URATA
Release: current 12/11/1999
Arrival-Date: Fri Dec 17 10:18:00 1999
commit patch
http://www.a-r.org/~ur/softfloat1211.diff.gz
by Shuichiro URATA (ur@a-r.org)
|
| 1.81 | 03-Dec-1999 |
nisimura | Add _splrestore() to manipulate processor interrupt control bits.
|
| 1.80 | 29-Nov-1999 |
uch | TX3912/22 support. ENABLE_MIPS_TX3900 enables it.
|
| 1.79 | 18-Nov-1999 |
jun | on port-mips@netbsd.org:
Shuichiro URATA <ur@a-r.org> makes kernel softfloat emulation code.
http://www.a-r.org/~ur/softfloat1116.diff.gz
is Patch for
sys/arch/mips/conf/files.mips
sys/arch/mips/mips/fp.S
sys/arch/mips/mips/fpemu.c
sys/arch/mips/mips/genassym.cf
sys/arch/mips/mips/locore.S
sys/arch/mips/mips/mips_machdep.c
sys/arch/mips/mips/process_machdep.c
sys/arch/mips/mips/trap.c
sys/arch/mips/mips/vm_machdep.c
After apply this patch,pmax package binary works on hpcmips!
|
| 1.78 | 03-Nov-1999 |
mycroft | In copy*str(), explicitly check for maxlen==0, rather than implicitly making it
act like 2^32.
Tested by: simonb
|
| 1.77 | 25-Sep-1999 |
shin | branches: 1.77.2; 1.77.4; 1.77.6;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.76 | 16-Aug-1999 |
nisimura | - Fix a severe bug I introduced May 7th. MIPS kernel ran for long time
in kernel mode after master interrupt (MIPS_SR_INT_IE) disabled. Tons
of appreciation for Noriyuki Soda and Masanari Tsubai for almost full
time help to spot of the issue.
|
| 1.75 | 30-Jun-1999 |
nisimura | - _insque()/_remque() used by CODA.
|
| 1.74 | 04-Jun-1999 |
castor | in switch_exit() previous fix forgot to guard REG_L with REG_PROLOGUE and
REG_EPILOGUE.
|
| 1.73 | 04-Jun-1999 |
castor | fix register restore to be safe for n32 model.
|
| 1.72 | 18-May-1999 |
nisimura | - Move MachSetPID(1) call to pmap_bootstrap() adajacent to kernel pmap
initialization code.
- Abandon mips_init_proc0() and do the 4 lines straightly in MD mach_init().
- Restore a block of code accidentally lost in prevous commit.
- Change the term 'tlbpid' to a MIPS3 nomenclature 'asid'.
- Hide PTE size exposures by symbolic names in locore.S
|
| 1.71 | 07-May-1999 |
nisimura | - Introduce MIPS processor interrupt control routines;
_splraise, _spllower, _splset, _splget, _setsoftintr, _clrsoftintr, _splnone.
They manipulate MIPS processor's 8 interrupt sources and are used
as building blocks for NetBSD spl(9) kernel interface. Note that
MIPS processor doesn't enforce inclusive 'interrupt levels' found
in other processors, then the hierarchal nature of IPL must be
implemented by composing MIPS processor interrupt masks appropriately.
With the simplest target port in which small number of devices are
independently assigned with 6 external interrupt signal lines,
spl(9) kernel interface will be implemented with #define's of
processor interrupt controls mentioned above. In more general
cases, in which target computers have many devices and 'system
registers' indicating pending interrupt sources at any moment,
spl(9) will be implemented with more complex machinary manipulating
processor interrupts and system registers in target port dependent
ways.
- Nuke unused code and reorder locore definitions. XXX Following
routines will be replaced with C language version; setrunqueue,
remrunqueue, switchfpregs, savefpregs, MachFPInterrupt.
|
| 1.70 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.69 | 15-Apr-1999 |
ad | Disable ntohl/htonl due to duplication in libkern/arch/mips.
|
| 1.68 | 30-Mar-1999 |
soda | branches: 1.68.2;
fix error in previous my change
|
| 1.67 | 30-Mar-1999 |
soda | ALIAS() is not needed, use XLEAF() or XNESTED() instead
|
| 1.66 | 24-Mar-1999 |
mrg | completely remove Mach VM support. all that is left is the all the
header files as UVM still uses (most of) these.
|
| 1.65 | 23-Mar-1999 |
simonb | If on entry the stack is within 4kB of _start, don't reset the stack
pointer to just underneath _start. Allows bootblocks (or other kernel
calling programs) to pass more than 4 arguments if it sets up the stack
properly.
The 4kB figure may be overkill - on the pmax it only needs to be a dozen
of so bytes.
|
| 1.64 | 28-Feb-1999 |
mhitch | Change switch_exit() to use the *current* proc0 stack pointer, instead of
the *initial* stack pointer. The proc0 stack is being used by proc0 (i.e.
uvm_scheduler). This had been working because switch_exit() wasn't
overwriting any critical areas of the stack - unless kernel profiling
was turned on.
|
| 1.63 | 16-Jan-1999 |
nisimura | - Make cpu_switch() a normal call; formally it was splitted into halves.
- Fix an error in mips3_cpu_switch_resume(); ASID was not set correctly.
- Remove global variable 'curpcb' reference in mips1_proc_trampoline().
- Restore 'cpuregs.h'.
|
| 1.62 | 16-Jan-1999 |
nisimura | - Fix errors involving proc0's kernel stack usage. Fortunately it made
no error so far...
|
| 1.61 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.60 | 26-Nov-1998 |
thorpej | Erg, fix the non-error code path, too.
|
| 1.59 | 26-Nov-1998 |
thorpej | Oops, in some delay slot confusion, I ended up clobbering s0 before it
restored pcb_onfault. Make it the way I wrote it originally, which was
correct. Pointed out by Michael Hitch and Charles Hannum.
|
| 1.58 | 24-Oct-1998 |
jonathan | Fix stacktrace alignment, in case of 64-bit stores into stackframes.
From pr port-mips/5536 from Castor Fu <castor@geocast.com>
|
| 1.57 | 02-Oct-1998 |
drochner | branches: 1.57.2;
implement a separate ultrix_sigcode[]
|
| 1.56 | 13-Sep-1998 |
thorpej | Make signal delivery work again.
|
| 1.55 | 11-Sep-1998 |
jonathan | Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.54 | 25-Aug-1998 |
nisimura | Make spl(9) rountines target port dependent. delay() is also port
dependent anticipating a target with high resolution timer available
for on-the-fly re-programming. Enum decstation_t was removed from MI
trap.c.
|
| 1.53 | 05-Jul-1998 |
jonathan | defopt NS, NSIP.
|
| 1.52 | 05-Jul-1998 |
jonathan | defopt ISO TPIP.
|
| 1.51 | 05-Jul-1998 |
jonathan | _inqsue and _remque are used by ccitt and iso networking code:
Add #ifdefs to enable them. (compiles and links, but untested.)
|
| 1.50 | 04-Jul-1998 |
jonathan | defopt DDB.
|
| 1.49 | 23-Mar-1998 |
thorpej | Fix some obvious problems in my MIPS kcopy() implementation (a significant
typo, plus get delay slots right on the R3000).
|
| 1.48 | 12-Mar-1998 |
thorpej | Add support for UVM.
|
| 1.47 | 02-Mar-1998 |
thorpej | Remove the memcpy() alternate entry point for bcopy(), a temporary measure
until the memcpy()/bcopy() thing is worked out.
|
| 1.46 | 17-Oct-1997 |
jonathan | Add bi-endian support to mips locore, <mips/endian.h>, and mips_opcode.h.
Derived from a change request (PR port-mips/4277) from
Tsubai Masanari, (tsubai@iri.co.jp).
|
| 1.45 | 09-Aug-1997 |
jonathan | mips pmap_activate:
* prototype and definition for pmap_activate(p). Updates the segtab,
and changes the active ASID if p == curproc.
* Make reserved fixed-address (UADDR) kernelstack PTEs global,
so we still have a kernel stack after pmap_activate() on curproc.
* make KSEG2 mappings for p_addr global (see above.)
Seems to detune contextswitch and NTP resolution (by 60 ms), but
thepmap_activate() interface is mandatory. Needs more thought.
|
| 1.44 | 08-Aug-1997 |
jonathan | Add mips_read_causereg()
|
| 1.43 | 23-Jul-1997 |
jonathan | branches: 1.43.2;
Substitute Mach 3.0 MK84 mips kernel bcopy() for Sprite bcopy().
Has unrolled loop for aligned-to-aligned copy.
Notes:
1. this code tuned for DEC 5000/200. ioasic decstations do more unaligned
copies. Better than old non-unrolled loop, but could be improved.
2. Undoes changes made for MIPS3 with comment implying an r4000 TLB bug.
We can't reproduce this on 5000/150 (jonathan) or 5000/50 (mhitch).
Calls to previous bcopy with a bad address show similar symptoms,
reporting a trap in bcopy() after bcopy() has returned. Same thing??
Needs re-checking on an r4000 with no L2 cache.
|
| 1.42 | 20-Jul-1997 |
jonathan | Add ddb to mips/conf/files.mips. Garbage-collect mdb.
|
| 1.41 | 20-Jul-1997 |
jonathan | Kernel profiling. Don't profile the following:
sigcode():
executed from user-space stack.
mips1_cpu_switch_resume, mips3_cpu_switch_resume:
arguments passed in via v0, t0, t1 (outlined from cpu_switch())
mips3_VCED(), mips3_VCEI():
called from exception-vector code without any register save,
$at, $ra are live.
|
| 1.40 | 20-Jul-1997 |
jonathan | Conditionalize mips1-speciifc locore code on #ifdef MIPS1
|
| 1.39 | 07-Jul-1997 |
jonathan | DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.38 | 30-Jun-1997 |
jonathan | Enable stack tracebacks if MDB is configured.
|
| 1.37 | 28-Jun-1997 |
mhitch | Mini-debugger now included by options MDB.
Cpu_regs() is included by options DEBUG, as are the stacktrace routines,
so move it inside the #ifdef DEBUG along with stacktrace().
|
| 1.36 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.35 | 21-Jun-1997 |
mhitch | Move the CPU-specific shift of the TLB PID into mips_r?000.S.
|
| 1.34 | 19-Jun-1997 |
mhitch | More merged mips1/mips3 support:
Remove cpu-specific routines from locore.S and add them to locore_r2000.S
and locore_r4000.S. Add entries in locore jump vector table for switch_exit()
and the cpu_switch() context resume.
Add offsets into the jump vector to genassym.cf for use in locore.S.
Use same cachesize variables for mips1 and mips3, and rename the variables
per Jonathan's request.
|
| 1.33 | 17-Jun-1997 |
jonathan | Fix locore cache variables. (Should these be exported from locore at all?)
|
| 1.32 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.31 | 15-Jun-1997 |
mhitch | From Toru Nishimura: _FORKBRAINDAMAGE is gone, user process entered through
proc_trampoline(); move away from UADDR access to user structure.
From Toru Nishimura: exception trapframe changes, mini-debugger from pica
port, separate out syscall exception.
DECstation MIPS3 support: wbflush() is cpu-dependent, MIPS3 level 2 cache
support.
|
| 1.30 | 15-Jun-1997 |
jonathan | Use standard symbolic register names in stacktrace() and logstacktrace().
|
| 1.29 | 15-Jun-1997 |
jonathan | Rewrite stack traceback printing (stacktrace()) and logging(logstacktrace()
wrappers for stacktrace_subr() in assembly code to avoid prototype conflicts.
|
| 1.28 | 19-May-1997 |
jonathan | Add cpu_spl[012345]() definitions to locore. These clear the given
interrupt-enable bit in the status register, and all lower bits.
Can be used for spl{bio,net,tty,clock,statclock} on machines where
devices are wried to mips hard-interrupt levels in ascending bit order
so as to match the BSD spl.9 ordering.
|
| 1.27 | 23-Dec-1996 |
jonathan | Pander to "kernel_text" kludge.
|
| 1.26 | 06-Nov-1996 |
cgd | Fix an inconsistency that came in with Lite: setrq() was renamed to
setrunqueue(), but remrq() was never renamed. Rename remrq() to
remrunqueue().
|
| 1.25 | 13-Oct-1996 |
jonathan | Rename mips CPU-family locore prefixes for case-consistency:
mips_r2000_, mips_R2000_ -> mips1_
mips_r4000_, mips_R4000_ -> mips3_
(which are also, for mnemonic reasons, consistent with gcc flag usage,
rather than using mipsI_ and mipsIII_).
|
| 1.24 | 30-Sep-1996 |
jonathan | Include <mips/asm.h>, not the Sprite header names.
|
| 1.23 | 30-Sep-1996 |
jonathan | Move Decstation-specific locore code (sii DMA copy, vmstat -i counters)
from arch/mips/mips/locore.S to arch/pmax/pmax/locore_machdep.S.
|
| 1.22 | 21-May-1996 |
jonathan | Copy the pmax locore.S code into the arch/mips hierarchy and split
it into three pieces:
* locore.S, which contains generic mips locore code,
applicable for both r2000/r3000 and r4000s (in 32-bit mode).
* locore_r2000.S, which contains r2000/r3000 (MIPS-I) versions
of the locore functions that need mips-generation-specific
instructions or handling.
* locore_r4000.S, which contains r4000/r4400/r4600 (MIPS-III?) versions
of the locore functions that need mips-generation-specific
instructions or handling.
Much of the code in locore_r4000.S is derived from Per Fogelstrom's Pica port.
locore.S still contains some pmax-specific DMA-buffer copy functions.
|
| 1.21 | 19-May-1996 |
jonathan | Add alternate "mips_r2000_<XXX>" entry points for the r2000/r3000-specific
locore functions. The new names are used by C code to construct a jump-table,.
making it less infeasible to have a single kernel image work on both
r3000 and r4000 systems.
|
| 1.20 | 31-Mar-1996 |
jonathan | merge mips and pica locore.S, pass 0:
* cut-and-paste all the code for both r2000 (MIPS-I) and r4000 (MIPS-III)
into both the pica and pmax locore.S.
* Change the names of the small segments of vector code that are
bcopied to the machine vector locations, to avoid clashing.
Get rid of the Sprite MachXXX names for the vector code, and
use use mips_r2000_xxx and mips_r4000_xxx instead.
Update the names used in the vector-copying code and trap handlers
to match.
* Most of the rest of the pica locore.S was copied from the pmax
locore.S, and then edited to work on an r4000. The names of
functions and of manifest constants stayed the same, although
both assmbler code and constant values changed.
cut-and-paste such code into contiguous blocks protected by
#if / #endif. Much of the cache and trap-handling code
needs r3000-only register fields, on the r3000, and r4000-only
insns and registers on the r4000.
* change the pmax r2000 exception-handling code to extract a trap
code with the user/kernel bit at 0x20 rather than 0x10.
(r2000s have 4-bit execption codes, r4000s have 5-bit.)
Use the a 16 from-user-space + 16-from-kernel space jump table,
just like on the r4000 pica port.
* add NOPs to the common code where required by the r4000 pipeline
constraints.
* add _C_LABEL() macros to the r4000 locore.
Comitted to provide a snapshot for others to test, and work on a cleaner merge.
|
| 1.19 | 25-Mar-1996 |
jonathan | Random additions from the Pica r4k port:
* Add spl4() and spl5() functions from the Pica port.
* Add MachFPTrap() as an alternate entry point for MachFPInterrupt.
The r4k reports floating-point execptions as a trap, not an interrupt,
and the Pica port uses the name MachFPTrap().
* Add nops to the Mach_spl?() functions and MachFPInterrupt, as required
for the r4k port.
Commit "floppy" interrupt counter for vmstat -i.
|
| 1.18 | 04-Feb-1996 |
jonathan | Redo the locore interrupt counters reported by vmstat -i:
* add a new enum decstation_intr_t to trap.c, naming each instrumented
interrupt symbolically, and used to index into intrcnt[]. Change the
model-specific interrupt handlers to use the decstation_intr_t when
updating interrupt counters.
* add instrumentation to the kmin and maxine interrupt handlers.
* fix a bug that counted each hardclock interrupts on the kn02 twice.
The hardcoded mapping from locore names to units is gross; but these
counters will hopefully be useful in identifying interrupt hot-spots
and PPP problems on the 3MIN.
|
| 1.17 | 20-Dec-1995 |
jonathan | Add support for ptrace PT_GETREGS and PT_SETREGS for NetBSD/pmax:
* define PT_GETREGS and PT_SETREGS in pmax/include/ptrace.h
* Flesh out the stubs in pmax/pmax/process_machdep.c to handle
those requests.
* Now that "struct reg" is actually used, remove the bogus
#ifdef LANGUAGE_C around its definition, and redo pmax/include/reg.h
so that the definitions needed by locore.S are in a separate file,
pmax/include/regnum.h.
* update locore.S to match.
|
| 1.16 | 28-Sep-1995 |
jonathan | Add a missing "nop" in a delay slot in the floating-point exception
handler. Gradual underflow and fp emulation now work correctly.
Proper denorms also fix strtod() inaccuracies and Gcc's "enquire" program.
|
| 1.15 | 21-Sep-1995 |
jonathan | Rename the force-all-pending-writes to memory function to wbflush().
Keep the old Mach-derived name "MachEmptyWriteBuffer()" as an alternate
entry point.
|
| 1.14 | 13-Aug-1995 |
mycroft | Add splsoftnet().
|
| 1.13 | 05-May-1995 |
mellon | Don't conditionalize utility routines based on DEBUG flag
|
| 1.12 | 28-Apr-1995 |
jonathan | Fix performance bug in pmax MachFlushDCache(). Old code disabled icache
and wasn't unrolled. This code runs cached and unrolled, giving an order
of magnitude improvement in some cases (e.g., DMA-capable network devices).
In use at Stanford DSG since late January 1995.
|
| 1.11 | 28-Apr-1995 |
jonathan | Check in changes suggested by Ralph Campbell: update variable names
to use turbochannel slot numbers, add a couple of extra slots, just
in case.
|
| 1.10 | 09-Mar-1995 |
mycroft | copy*str() should use size_t.
|
| 1.9 | 18-Jan-1995 |
mellon | Add conditional gp support; add interrupt disable before setting or clearing soft ints
|
| 1.8 | 15-Dec-1994 |
mycroft | Remove underscores from uses of *LEAF() and END(). Use _C_LABEL() in explicit
symbol references.
|
| 1.7 | 23-Nov-1994 |
dean | more underscore changes (from J. Stone)
|
| 1.6 | 14-Nov-1994 |
dean | Prepended underscores
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 25-Jun-1994 |
glass | assembler problem
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.43.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.57.2.3 | 06-Dec-1998 |
drochner | pull up 1.59/1.60 - kcopy asm ordering
|
| 1.57.2.2 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.57.2.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.68.2.1 | 26-Apr-1999 |
perry | branches: 1.68.2.1.2;
pullup 1.68->1.69 (Andy Doran)
|
| 1.68.2.1.2.2 | 01-Jul-1999 |
thorpej | Sync w/ -current.
|
| 1.68.2.1.2.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.77.6.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.77.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.77.2.3 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.77.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.77.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.100.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.104.2.1 | 19-Jul-2000 |
jeffs | Pull up revision memcpy.S 1.4-1.5 and locore.S 1.105 (approved by thorpej).
Make memcpy() the favored interface an swizzle the args for ovbcopy. Also
move bcopy XLEAF here from locore.S. For 64b clean compilation add a
ld/sd section to the block copy.
|
| 1.120.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.122.4.1 | 01-Oct-2001 |
fvdl | Catch up with -current.
|
| 1.122.2.6 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.122.2.5 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.122.2.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.122.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.122.2.2 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.122.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.124.2.3 | 12-Nov-2001 |
thorpej | Sync the thorpej-mips-cache branch with -current.
|
| 1.124.2.2 | 11-Nov-2001 |
shin | delete obsolete variables.
mips_L1DCacheSize mips_L1ICacheSize
mips_L1DCacheLSize mips_L1ICacheLSize
mips_CacheAliasMask mips_CachePreferMask
mips_L2CacheSize mips_L2CacheLSize
mips_L2CachePresent
|
| 1.124.2.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.126.2.19 | 03-Jan-2003 |
thorpej | Merge switch_exit() and switch_lwp_exit().
|
| 1.126.2.18 | 31-Dec-2002 |
thorpej | Rename cpu_preempt() to cpu_switchto(), and make the caller remove the
new process from its run queue before calling cpu_switchto().
While here, make a few cpu_switch() and cpu_switchto() implementations
get the outgoing LWP from the args, rather than looking at the curlwp
variable.
|
| 1.126.2.17 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.126.2.16 | 17-Sep-2002 |
nathanw | Rearrange slightly and pass p, not l, to ras_lookup().
|
| 1.126.2.15 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.126.2.14 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.126.2.13 | 07-Jul-2002 |
simonb | Fix a spelo in a comment.
|
| 1.126.2.12 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.126.2.11 | 22-Jun-2002 |
gmcgarry | Pass the new LWP to mipsX_cpu_switch_resume(). Do this is the required
delay slot.
|
| 1.126.2.10 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.126.2.9 | 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.126.2.8 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.126.2.7 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.126.2.6 | 11-Jan-2002 |
nathanw | More catchup.
|
| 1.126.2.5 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.126.2.4 | 28-Nov-2001 |
wdk | Fix several bugs related to SA upcalls:
* Move upcall trampoline code to be just after the signal trampoline code
so it is copied to the user stack correctly.
* cpu_preempt: correctly remove process from sched_qs queue
* switch_lwp_exit: Call lwp_exit2() instead of exit2()
|
| 1.126.2.3 | 18-Nov-2001 |
wdk | Update cpu_switch() to return 0 if no better LWP was found to switch to.
returns 1 if there was a context switch to another LWP
Complete implementation of cpu_preempt()
|
| 1.126.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.126.2.1 | 14-Nov-2001 |
wdk | file locore.S was added on branch nathanw_sa on 2001-11-17 23:43:42 +0000
|
| 1.139.2.3 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.139.2.2 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.139.2.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.148.4.1 | 18-Dec-2002 |
gmcgarry | Remove the scheduler semantics from machine-dependent context switch.
|
| 1.155.2.5 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.155.2.4 | 04-Mar-2005 |
skrll | Sync with HEAD.
Hi Perry!
|
| 1.155.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.155.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.155.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.158.10.1 | 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.158.8.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.159.4.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.159.4.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.159.4.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.159.4.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.160.14.1 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.160.10.2 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.160.10.1 | 24-May-2006 |
yamt | sync with head.
|
| 1.160.8.1 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.160.6.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.162.4.1 | 21-Dec-2006 |
yamt | sync with head.
|
| 1.162.2.3 | 30-Jan-2007 |
ad | For now always call sched_unlock_idle/sched_lock_idle. They will be
removed by yamt's cpu_switchto() changes.
|
| 1.162.2.2 | 28-Jan-2007 |
ad | - Fix sequence error between saving/raising the SPL.
- Changes for JavaStation.
- Fix bugs with mips & sparc support routines.
|
| 1.162.2.1 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.164.2.4 | 19-Apr-2007 |
ad | Set up curlwp/curcpu very early, before calling mach_init. Avoids a null
pointer deref on curcpu().
|
| 1.164.2.3 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.164.2.2 | 21-Mar-2007 |
ad | Initial changes for MIPS. Not yet working under gxemul.
|
| 1.164.2.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.165.12.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.165.6.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.165.4.3 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.165.4.2 | 15-Jul-2007 |
ad | Get pmax working.
|
| 1.165.4.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.166.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.166.2.1 | 07-Aug-2007 |
matt | Sync with HEAD.
|
| 1.167.38.25 | 09-Feb-2012 |
matt | Update mips_fixup.c to version from -HEAD.
Move cpu_switchto to locore jumpvec and create a stub for it.
|
| 1.167.38.24 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.167.38.23 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.167.38.22 | 29-Dec-2010 |
matt | Move from StudlyCaps to more normal names.
|
| 1.167.38.21 | 22-Dec-2010 |
matt | Rework how fixups are processed. Inside of generating a table, we just
scan kernel text for jumps to locations between (__stub_start, __stub_end]
and if found, we actually decode the instructions in the stub to find out
where the stub would eventually jump to and then patch the original jump
to jump directly to it bypassing the stub. This is slightly slower than
the previous method but it's a simplier and new stubs get automagically
handled.
|
| 1.167.38.20 | 18-Aug-2010 |
matt | Set SR UX when we first set KX. (XLS416 now boot multiuser again with
>32 bit VAs).
|
| 1.167.38.19 | 16-Aug-2010 |
matt | Add lwp_oncpu
|
| 1.167.38.18 | 16-May-2010 |
matt | If IPL_SCHED != IPL_HIGH we need to raise ourselves back to IPL_HIGH before
we return from a fast softint that was switchedaway from.
|
| 1.167.38.17 | 28-Feb-2010 |
matt | Change from indirect calls to direct calls to spl* routines.
|
| 1.167.38.16 | 25-Feb-2010 |
matt | Add mipsXX_tlb_record_asids - records what ASIDs have valid TLB entries in
the TLB.
Move some mips3 specific routines from locore.S to locore_mips3.S
|
| 1.167.38.15 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.167.38.14 | 16-Feb-2010 |
matt | Fix typo.
|
| 1.167.38.13 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.167.38.12 | 06-Feb-2010 |
matt | Split spl functions into their own sources.
Make sure fast softints clear l_ctxswtch in the softint thread, not their own.
|
| 1.167.38.11 | 06-Feb-2010 |
matt | Save curlwp in context (even though it should already be there).
|
| 1.167.38.10 | 06-Feb-2010 |
matt | Allow __HAVE_FAST_SOFTINTS to be optional
|
| 1.167.38.9 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.167.38.8 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.167.38.7 | 30-Jan-2010 |
matt | Change MIPS_CURLWP from s7 to t8. In a MALTA64 kernel, s6 is used 9155 times
which means the compiler could really use s7 is was free to do so. The least
used temporary was t8 (288 times). Once the kernel was switched to use t8 for
MIPS_CURLWP, s7 was used 7524 times.
Additionally a MALTA32 kernel shrunk by 6205 instructions (24820 bytes) or
about 1% of its text size.
[For some reason, pre-change t1 was never used and post change t2 was never
used. Not sure why.]
|
| 1.167.38.6 | 29-Jan-2010 |
matt | Change mips kernel options SOFTFLOAT to FPEMUL. Allow a kernel to have
no FP emulation code. Fix insufficient SYMTAB_SPACE. When a kernel without
an FPU and with FPEMUL code, the application will trap with a SIGILL/ILL_ILLOPC
signal, not SIGSEGV/SEGV_MAPERR.
|
| 1.167.38.5 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.167.38.4 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.167.38.3 | 11-Sep-2009 |
matt | Add code to probe TLB for VA/PA/PG_MASK sizes
Increase waynames to include 8-way.
|
| 1.167.38.2 | 07-Sep-2009 |
matt | On N32/N64 save/restore gp since it's a callee-saved register.
Don't use proc0paddr, use lwp0->l_addr
|
| 1.167.38.1 | 20-Aug-2009 |
matt | Make ABI agnostic (O32 code identical).
|
| 1.167.20.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.172.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.172.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.173.4.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.173.4.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.173.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.188.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.188.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.189.10.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.189.10.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.190.14.5 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.190.14.4 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.190.14.3 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.190.14.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.190.14.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.202.2.3 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.202.2.2 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.202.2.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.208.8.1 | 31-Jul-2023 |
martin | Pull up following revision(s) (requested by riastradh in ticket #1859):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
(applied also to sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/cortex_init.S)
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/alpha/include/asm.h: revision 1.45
(applied to sys/arch/alpha/alpha/multiproc.s)
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
|
| 1.210.2.3 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
|
| 1.210.2.2 | 30-Mar-2018 |
pgoyette | Resolve conflicts between branch and HEAD
|
| 1.210.2.1 | 15-Mar-2018 |
pgoyette | Synch with HEAD
|
| 1.218.2.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.218.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.218.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.219.4.2 | 31-Jul-2023 |
martin | Pull up following revision(s) (requested by riastradh in ticket #1676):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
sys/arch/alpha/include/asm.h: revision 1.45
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
|
| 1.219.4.1 | 13-Sep-2019 |
martin | Pull up following revision(s) (requested by skrll in ticket #199):
sys/arch/mips/mips/locore.S: revision 1.220
Fix a maya fix so that cobalt boots again.
Set MIPS_COP_0_CAUSE to zero before the rest of the initialisation
|
| 1.220.2.1 | 17-Jan-2020 |
ad | Sync with head.
|
| 1.227.4.1 | 31-May-2021 |
cjep | sync with head
|
| 1.227.2.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.228.12.1 | 31-Jul-2023 |
martin | Pull up following revision(s) (requested by riastradh in ticket #264):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
sys/arch/alpha/include/asm.h: revision 1.45
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/riscv/riscv/cpu_switch.S: revision 1.3
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
riscv: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
|
| 1.1 | 21-May-2017 |
skrll | branches: 1.1.6; 1.1.10;
Provide and use some CP0 accessor functions instead of M[TF]C0 macros
for readability.
While here convert some other M[TF]C0 uses to already exising accessor
functions, e.g. mipsNN_cp0_ebase_read
|
| 1.1.10.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.10.1 | 21-May-2017 |
jdolecek | file locore_ingenic.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.1.6.2 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.1.6.1 | 21-May-2017 |
skrll | file locore_ingenic.S was added on branch nick-nhusb on 2017-08-28 17:51:45 +0000
|
| 1.99 | 09-Feb-2024 |
andvar | fix spelling mistakes, mainly in comments and log messages.
|
| 1.98 | 13-Mar-2022 |
andvar | s/entreed/entered/
|
| 1.97 | 13-Mar-2022 |
andvar | s/hander/handler/ and s/hader/header/ in comments and documentation.
|
| 1.96 | 19-Sep-2021 |
andvar | fix various typos in comments, messages and documentation.
|
| 1.95 | 22-Aug-2020 |
simonb | Change previous LP64 check to n32/n64.
|
| 1.94 | 22-Aug-2020 |
simonb | Explicitly #error if this is compiled with _LP64.
|
| 1.93 | 08-Jun-2017 |
skrll | Add a missing ".set at" to make previous build
|
| 1.92 | 07-Jun-2017 |
skrll | fix tlb_record_asids 2nd arg to match usage - it's a maximum asid value
and not a mask
|
| 1.91 | 27-Jul-2016 |
skrll | branches: 1.91.8;
Sprinle RCSID
|
| 1.90 | 21-Jul-2016 |
skrll | Fix typo in comment
|
| 1.89 | 11-Jul-2016 |
skrll | branches: 1.89.2;
Correct a comment
|
| 1.88 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.87 | 04-Jul-2016 |
dholland | More of previous, so both kern_intr and user_intr have the comment.
|
| 1.86 | 04-Jul-2016 |
dholland | Improve comments after some discussion with Nick.
|
| 1.85 | 11-Jun-2015 |
matt | Don't include <machine/param.h> in .S files, get the needed values from assym.h
Define NBPG as UL to avoid integer over with NBXSEG on LP64 systems.
(.S files don't like numbers with UL appended to them).
|
| 1.84 | 19-Feb-2012 |
rmind | branches: 1.84.2; 1.84.16;
Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.83 | 23-Dec-2011 |
tsutsui | - use correct ASID bits in MIPS_COP_0_TLB_HI
- save/restore current PID in tlb_invalidate_all() and cpu_switch_resume()
as mipsX_subr.S does
|
| 1.82 | 07-May-2011 |
tsutsui | branches: 1.82.4; 1.82.8;
Use a correct register to save/restore MIPS_COP_0_TLB_HI in
mips1_tlb_record_asids().
|
| 1.81 | 07-May-2011 |
tsutsui | Tweak some comments in mipsN_tlb_record_asids() to reduce diffs.
|
| 1.80 | 07-May-2011 |
tsutsui | Remove trailing spaces and tabs.
|
| 1.79 | 07-May-2011 |
tsutsui | Fix misc comments.
|
| 1.78 | 14-Apr-2011 |
cliff | - add loocoresw slot for lsw_cpu_run
- fix comments for locoresw entries
|
| 1.77 | 06-Apr-2011 |
tsutsui | Sync with mipsX_subr.S:
>> Rename kernel_tlb_miss to kern_tlb_miss (everything else kern_xxx)
|
| 1.76 | 06-Apr-2011 |
matt | Load pc into ta0 instead of ra and then saving to ta0.
misc comments fixes.
|
| 1.75 | 08-Mar-2011 |
tsutsui | Pass correct exception PC value to cpu_intr() as mipsX_subr.S does.
Fixes SIGILL on all FPU exceptions on R3000.
XXX: cpu_intr() may require cause value as mentioned in PR port-mips/44639
|
| 1.74 | 08-Mar-2011 |
tsutsui | Sprinkle NOPs to avoid load delay hazard on R3000.
|
| 1.73 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.72 | 26-Jan-2011 |
pooka | Add support for the Extensible MIPS ("eMIPS") platform. The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.
eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing. eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.
NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman. Microsoft Corporation has
donated full copyright to The NetBSD Foundation.
Platform support for eMIPS is the first part of Microsoft's
contribution. The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.
|
| 1.71 | 22-Dec-2010 |
nisimura | branches: 1.71.2; 1.71.4;
- make sure cpu_switchto() not to touch MIPS_CURLWP register at newlwp
switchframe restoration stage.
- discard MIPS_CURLWP assignments exposed in cpu_lwp_fork() and
cpu_setfunc().
- use plain 'jal' instruction to call lwp_startup().
|
| 1.70 | 25-Nov-2010 |
matt | Save t0-t2 on MIPS1 syscalls.
|
| 1.69 | 10-Nov-2010 |
dholland | Amplify comments per thread in source-changes-d about the previous
commit to this file: we must restore the PID value (that is, the
current address space ID) before touching memory, or the memory writes
might go to arbitrary wrong places or fault.
I'm not completely convinced this function (or other functions in this
file) are handling pipeline hazards safely, but I don't have
authoritative mips1 documentation any more so I'm not going to meddle.
|
| 1.68 | 08-Nov-2010 |
pooka | In TLBRead, restore PID before doing the saves so that the caller's
TLB entries are used instead of the PID given as the argument.
from Alessandro Forin
|
| 1.67 | 14-Dec-2009 |
matt | branches: 1.67.2; 1.67.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.66 | 10-Dec-2009 |
rmind | Rename L_ADDR to L_PCB and amend some comments accordingly.
|
| 1.65 | 30-May-2009 |
martin | Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.64 | 26-Jan-2008 |
tsutsui | branches: 1.64.10; 1.64.20; 1.64.26;
Make these TX39xx stuff compile without "-mips2" option.
TX39xx has a sync instruction, but it doesn't support all mips2 instructions.
|
| 1.63 | 17-Oct-2007 |
garbled | branches: 1.63.2;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.62 | 17-May-2007 |
yamt | branches: 1.62.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.61 | 09-Feb-2007 |
ad | branches: 1.61.2; 1.61.6; 1.61.8; 1.61.14;
Merge newlock2 to head.
|
| 1.60 | 03-Jan-2006 |
rumble | branches: 1.60.18; 1.60.22; 1.60.24;
Fix a little comment typo.
|
| 1.59 | 11-Dec-2005 |
christos | branches: 1.59.2;
merge ktrace-lwp.
|
| 1.58 | 07-Aug-2003 |
agc | branches: 1.58.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.57 | 08-Apr-2003 |
thorpej | branches: 1.57.2;
Use PAGE_SIZE rather than NBPG.
|
| 1.56 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.55 | 12-Nov-2002 |
nisimura | Remove o32 stack layout exposure form cpu_fork().
Tested on R4000 and R3000.
|
| 1.54 | 05-Mar-2002 |
simonb | Cosmestic changes (more like the mips3+ code).
|
| 1.53 | 14-Nov-2001 |
thorpej | branches: 1.53.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.52 | 30-May-2001 |
lukem | branches: 1.52.2; 1.52.6;
add missing #include "opt_kgdb.h"
|
| 1.51 | 16-Jan-2001 |
thorpej | branches: 1.51.2;
New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
|
| 1.50 | 14-Jan-2001 |
thorpej | Make the astpending flag per-process.
|
| 1.49 | 13-Jan-2001 |
thorpej | Check for ASTs in Syscall and UserGenException, too; AST processing
must be done on *every* return to userland.
|
| 1.48 | 09-Oct-2000 |
nisimura | Add mtc0 insn to load TX3900 config register value to determine Dcache size.
|
| 1.47 | 04-Oct-2000 |
nisimura | Merge exception return path of SystemCall and UserGenException into
proc_trampoline.
|
| 1.46 | 26-Sep-2000 |
jeffs | No longer save $at on syscall entry. v1 does appear to be used as if
you do not save it and pass it along in rval the system will start
to fail running user programs. This finishes the suggestion by cgd to
not save some registers on syscall entry.
|
| 1.45 | 26-Sep-2000 |
uch | fix R3900 FlushCache bug.
|
| 1.44 | 18-Sep-2000 |
uch | [R3900/R3920] sync with
| Module Name: syssrc
| Committed By: nisimura
| Date: Sat Sep 16 07:20:17 UTC 2000
|
| 1.43 | 16-Sep-2000 |
nisimura | - Reimplement MIPS1 cache size dectection logic taking advantage of the
fact the direct mapped cache makes address alias effect.
- Just turn on processor master interrupt mask IEc (SR_INT_IE) bit prior
to call syscall() kernel entry point. IEp is always 1 in this case
by defition.
|
| 1.42 | 13-Sep-2000 |
jeffs | Do not save t* registers in syscall stub as suggested by cgd. Saves
a whole 0.01us in lmbench lat_syscall null on our 250Mhz QED system.
$at is still saved just to be safe, although it looks like it does
not need to be. $v1 is used in syscall(), although I'm not sure why.
|
| 1.41 | 13-Sep-2000 |
nisimura | Introduce 'segbase' global variable to hold the pointer to current
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
|
| 1.40 | 05-Sep-2000 |
soren | Back out (most of) previous. I was using an 1.5 asm.h and hadn't
noticed cgd's fix..
|
| 1.39 | 05-Sep-2000 |
soren | Add nop after PANIC macros.
|
| 1.38 | 24-Aug-2000 |
uch | Rewrote TX39 series cache routines.
|
| 1.37 | 20-Jul-2000 |
jeffs | Include kgdb hooks in trap.c. Include bits of DDB code for kgdb also. Remove
some local prototypes that are in headers now.
|
| 1.36 | 10-Jul-2000 |
uch | use mips3 cache op.
invalidate -> write-back invalidate
(although NetBSD/hpcmips run on write-through mode.)
suggested by cgd.
|
| 1.35 | 26-Jun-2000 |
nisimura | Abandon {mips1,mips3}_TBRPL()s which have little gain. They were
expected to be better than MachTLBUpdate(). After all, TLBUpdate()
is rather harmful and should be replaced with TBIS().
|
| 1.34 | 29-May-2000 |
simonb | A few more white-space bogons.
|
| 1.33 | 27-May-2000 |
soren | branches: 1.33.2;
Match a comment with the MIPS3 version.
|
| 1.32 | 21-May-2000 |
soren | Include opt_cputype.h.
|
| 1.31 | 10-May-2000 |
nisimura | Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3. It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs. mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.
|
| 1.30 | 16-Apr-2000 |
nisimura | Introduce MIPS_TBRPL() which replaces a TLB entry of given vaddr
with new entryHi and entryLo pair iff found in TLB. Works only
for KSEG2 this moment. mips3 version will follow.
|
| 1.29 | 11-Apr-2000 |
nisimura | Abandon rather random distinctions in andi/addiu coding and make
them consistent with and/addu instrunction mnemonics which produce
exactly same binaries.
|
| 1.28 | 11-Apr-2000 |
nisimura | Introduce cpu_intr() whose body is now provided by target ports in
their own ways. Ugly fixup #define in machine/intr.h have gone.
mips_hardware_intr global variable patch work has gone.
|
| 1.27 | 11-Apr-2000 |
nisimura | Remove various TLB manipulation routines which have been unused
long time, commented out and is unlikely useful; TLBWriteIndexed(),
TLBWriteRandom(), TLBFlush(), TLBFlushPID() and TLBFind().
|
| 1.26 | 10-Apr-2000 |
nisimura | - Fix a bug in mips1_TBIAP() misbehaving like as mips1_TBIA().
- Adjust comments to reflect what it does.
|
| 1.25 | 10-Apr-2000 |
nisimura | Make (sure) ASID management same as what NetBSD/alpha does for ASN.
ASID#0 is reserved for pmap0 shared between proc0 and kthreads,
and every TLB for KSEG2 has G (global) bit to have wildcard match
regardless of the process' ASID. MIPS1 would flush TLBs belong
to user spaces upon ASID generation bump. Change for MIPS3 is
to be done.
|
| 1.24 | 27-Mar-2000 |
nisimura | - Rename some of TLB ops to have handy abbrivations hired from VAX and
ALPHA; mips1_TBIA, mips1_TBIAP, mips1_TBIS.
- Make sure TBIA and TBIAP ops to have an argument for the size of TLB
which varies across even for MIPS1 implementations.
- Nuke the unused cpu_isa field from processor personality list.
- XXX XXX XXX
it's less-than-optimal and likely a mistake to have TLBUpdate().
It's costy to try to invalidate a single TLB entry whenver a certain
PTE is going to be modified by traversing the entire TLB looking
for the modified PTE because the PTE in question is not in TLB in
most cases. ASID bump could do the invalidation smartly. Solution
is planned for now.
|
| 1.23 | 04-Mar-2000 |
nisimura | Remove #ifdef'ed out PMAX_CACHEFLUSH_FORCES_WBFLUSH codes in cache
flush ops which has had no effect for long time.
|
| 1.22 | 23-Feb-2000 |
mhitch | Loading the exception return PC in k0 before restoring the status register
(which disables the interrupts) is *not* a good idea. k0 (and k1) is used
by the kernel code such as the TLB miss handler, and the interrupt entry.
If an interrupt occurs after loading k0 and before the SR gets interrupts
disabled, k0 will be clobbered and when used to load the PC on exit from
the exception handler, results in various hangs and crashes.
|
| 1.21 | 19-Feb-2000 |
mycroft | Disable the sN,sp,gp register restore code for now, as it seems to collide with
something else.
|
| 1.20 | 18-Feb-2000 |
thorpej | On exception return, use k1 to restore the saved registers, so that we
don't stomp on the return address in k0. Also, don't need to account
for any load delays, as the last register restored (gp) isn't used in
the subsequent instruction.
|
| 1.19 | 18-Feb-2000 |
mycroft | Adjust previous change for R3000 load delay slot.
|
| 1.18 | 18-Feb-2000 |
mycroft | Make the MIPS1 and MIPS3 code more similar.
XXX Needs testing on MIPS1.
|
| 1.17 | 29-Nov-1999 |
uch | TX3912/22 support. ENABLE_MIPS_TX3900 enables it.
|
| 1.16 | 10-Nov-1999 |
nisimura | Remove a small scale 'improvement' for TLB mod exception which is now
found harmful. Fix panics on MIPS1 only kernels.
|
| 1.15 | 18-Jun-1999 |
nisimura | branches: 1.15.2; 1.15.4; 1.15.8;
- Fix an large error I made last month in TLB mod improvement, still
wondering why not I was immediately blown away.
- Continuing invastigations on VM related panics on very high loads.
|
| 1.14 | 31-May-1999 |
nisimura | - A little attention for TLBUpdate().
|
| 1.13 | 29-May-1999 |
nisimura | - Make a modification to reduce the cost of TLBmod exception handling.
TLBUpdate() routine is used for dual purposes. In TLBmod case, just ok
to call 'tlbwi' (as designed). Result in saving of extraneous execution
path. MIPS1 only this moment.
|
| 1.12 | 22-May-1999 |
nisimura | - Backout the last code change. I found it broke pmax kernel. It's
retained for future use of pmap.new.c, though.
> New codes always use current ASID holded in EntryHi register.
|
| 1.11 | 21-May-1999 |
nisimura | - Typos, I made...
|
| 1.10 | 21-May-1999 |
nisimura | - Now completing MIPS1 side change. Introduce MIPS_TBIS and MIPS_TBDATA
(correct name, vax?) replacing mips1_TLBFlushAddr and mips1_TLBUpdate,
respectively. New codes always use current ASID holded in EntryHi
register. In most occations, the register already contains a necessary
value before (re-)written, ugh. 'sva | asid' ops for their arguments are
now verbose, to be removed when MIPS3 side changes are done.
|
| 1.9 | 19-May-1999 |
nisimura | - Implement MIPS_TBIAP() which invalidates all TLB entries belong to
per process user spaces, replacing mips1_TBLFlush(). This reserves
kernel space TLB entries when TLBPID generation number about to wrap.
- Correct comments a bit, nuke unused routines.
|
| 1.8 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.7 | 28-Feb-1999 |
jonathan | branches: 1.7.4;
Garbage-collect pmax writebuffer drain when invalidating caches, pass 0:
Change `#ifdef pmax' to `#ifdef PMAX_CACHEFLUSH_FORCES_WBFLUSH'.
|
| 1.6 | 22-Feb-1999 |
jonathan | Cannot do mcount() profiling in TLB exception-handler code.
|
| 1.5 | 16-Feb-1999 |
jonathan | Use VECTOR() and VECTOR_END() in mips1 locore code.
|
| 1.4 | 16-Jan-1999 |
nisimura | - Make cpu_switch() a normal call; formally it was splitted into halves.
- Fix an error in mips3_cpu_switch_resume(); ASID was not set correctly.
- Remove global variable 'curpcb' reference in mips1_proc_trampoline().
- Restore 'cpuregs.h'.
|
| 1.3 | 15-Jan-1999 |
castor | * Add prototype for mips1_clean_tlb
* Add the correct version of locore_mips1.S [ See previous revision for
description of changes ]
* Use defopt'ed MIPS3_L2CACHE_ABSENT in mips_machdep.c and pmap.c
to avoid generating extraneous code.
* GC pmap_set_referenced in pmap.c
|
| 1.2 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.1 | 15-Oct-1998 |
nisimura | branches: 1.1.2;
file locore_mips1.S was initially added on branch nisimura-pmax-wscons.
|
| 1.1.2.2 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.1.2.1 | 15-Oct-1998 |
nisimura | - locore_mips1.S and locore_mips3.S are free standing files indepedent from
locore.S.
|
| 1.7.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.15.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.15.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.15.2.2 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.15.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.33.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.51.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.52.6.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.52.2.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.52.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.53.2.8 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.53.2.7 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.53.2.6 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.53.2.5 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.53.2.4 | 18-Nov-2001 |
wdk | Fixup l->l_proc references in areas where p_md structures were
used in locore routines.
Can now boot multi-user on -sgimips machine.
Untested: upcall functions, R2000/3000 processors
|
| 1.53.2.3 | 18-Nov-2001 |
wdk | p_md.md_regs -> l_md.md_regs
p_md.md_upte -> l_md.md_upte
|
| 1.53.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.53.2.1 | 14-Nov-2001 |
wdk | file locore_mips1.S was added on branch nathanw_sa on 2001-11-17 23:43:42 +0000
|
| 1.57.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.57.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.57.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.58.16.4 | 04-Feb-2008 |
yamt | sync with head.
|
| 1.58.16.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.58.16.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.58.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.59.2.1 | 15-Jan-2006 |
yamt | sync with head.
|
| 1.60.24.1 | 03-Jun-2008 |
skrll | Sync with netbsd-4.
|
| 1.60.22.1 | 22-Feb-2008 |
bouyer | Pull up following revision(s) (requested by tsutsui in ticket #1065):
sys/arch/mips/mips/locore_mips1.S: revision 1.64
sys/arch/hpcmips/conf/TX3912: revision 1.68
sys/arch/hpcmips/conf/TX3922: revision 1.80
sys/arch/hpcmips/conf/GENERIC: revision 1.199
sys/arch/hpcmips/tx/tx39power.c: revision 1.18
sys/arch/mips/mips/cache_tx39.c: revision 1.6
Make these TX39xx stuff compile without "-mips2" option.
TX39xx has a sync instruction, but it doesn't support all mips2 instructions.
Add "-mdivide-breaks" to CPUFLAGS in GENERIC, and
use "-march=r3900" for CPUFLAGS in TX3912 and TX3922.
|
| 1.60.18.5 | 02-Feb-2007 |
ad | The TLB miss handler doesn't need to worry about RAS, oops.
|
| 1.60.18.4 | 28-Jan-2007 |
ad | - Fix sequence error between saving/raising the SPL.
- Changes for JavaStation.
- Fix bugs with mips & sparc support routines.
|
| 1.60.18.3 | 27-Jan-2007 |
ad | Make mips systems work.
|
| 1.60.18.2 | 11-Jan-2007 |
ad | Checkpoint work in progress.
|
| 1.60.18.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.61.14.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.61.8.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.61.6.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.61.2.3 | 19-Apr-2007 |
ad | Fix another screwup with the RAS stuff.
|
| 1.61.2.2 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.61.2.1 | 21-Mar-2007 |
ad | Initial changes for MIPS. Not yet working under gxemul.
|
| 1.62.10.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.62.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.63.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.64.26.1 | 09-Jun-2009 |
snj | branches: 1.64.26.1.2;
Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.64.26.1.2.16 | 09-Jul-2012 |
matt | Add code to panic if/when a kthread return to lwp_startup.
Add a workaround for the XLP which requires a EHB at the start of the interrupt
vector.
|
| 1.64.26.1.2.15 | 09-Feb-2012 |
matt | Update mips_fixup.c to version from -HEAD.
Move cpu_switchto to locore jumpvec and create a stub for it.
|
| 1.64.26.1.2.14 | 23-Dec-2011 |
matt | Add support for >4KB pages.
|
| 1.64.26.1.2.13 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.64.26.1.2.12 | 29-Dec-2010 |
matt | Add wbflush to jumpvec while leaving it in locoresw. This allows to
overwrite wbflush in locoresw but still be able to call it via jumpvec.
|
| 1.64.26.1.2.11 | 29-Dec-2010 |
matt | Janitorial work.
Move emulation prototypes here and get rid of StudLyCaps.
Remove kludgery for lwp/setfunc trampoline and just grab them of the damn
structure.
Make mips_locore_jumpvec contain the routines that don't get reassigned
and move wbflush to mips_locoresw since it does get overridden.
|
| 1.64.26.1.2.10 | 24-Dec-2010 |
matt | Bring locore_mips1.S into the new world order. You can diff locore_mips1.S
against mipsX_subr.S and have reasonable output. A lot of comments have
been changed to be common between the two. The ordering of vectors/functions
have also changed to improve diff output.
|
| 1.64.26.1.2.9 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.64.26.1.2.8 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.64.26.1.2.7 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.64.26.1.2.6 | 30-Jan-2010 |
matt | Change MIPS_CURLWP from s7 to t8. In a MALTA64 kernel, s6 is used 9155 times
which means the compiler could really use s7 is was free to do so. The least
used temporary was t8 (288 times). Once the kernel was switched to use t8 for
MIPS_CURLWP, s7 was used 7524 times.
Additionally a MALTA32 kernel shrunk by 6205 instructions (24820 bytes) or
about 1% of its text size.
[For some reason, pre-change t1 was never used and post change t2 was never
used. Not sure why.]
|
| 1.64.26.1.2.5 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.64.26.1.2.4 | 16-Jan-2010 |
matt | Rework the exception code. All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy. This also allows us to branch to unused space space
since the relative locations will remain the same.
When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU. The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).
kill outofworld and just let trap panic, if it can. Allow for sb1_subr.S
or rmixl_subr.S in the future. Fix TLB read/write code.
|
| 1.64.26.1.2.3 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.64.26.1.2.2 | 07-Sep-2009 |
matt | Use VM_MIN_KERNEL_ADDRESS instead of MIPS_KSEG2_START
|
| 1.64.26.1.2.1 | 20-Aug-2009 |
matt | Move mips1_locoresw to .rdata
|
| 1.64.20.1 | 09-Jun-2009 |
snj | Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.64.10.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.64.10.1 | 20-Jun-2009 |
yamt | sync with head
|
| 1.67.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.67.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.67.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.67.2.1 | 09-Nov-2010 |
uebayasi | Sync with HEAD.
|
| 1.71.4.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.71.4.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.71.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.82.8.2 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.82.8.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.82.4.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.84.16.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.84.16.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.84.16.2 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.84.16.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.84.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.89.2.2 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.89.2.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.91.8.1 | 10-Jun-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #25):
sys/arch/mips/mips/locore_mips1.S: revision 1.92, 1.93
fix tlb_record_asids 2nd arg to match usage - it's a maximum asid value
and not a mask
--
Add a missing ".set at" to make previous build
|
| 1.116 | 23-Feb-2023 |
riastradh | mips: Add missing barriers in cpu_switchto.
Details in comments.
PR kern/57240
XXX pullup-8
XXX pullup-9
XXX pullup-10
|
| 1.115 | 24-May-2020 |
simonb | branches: 1.115.20;
Add mipsNN_cp0_rdhwr_cpunum() which returns the current CPU number
read from the CPUNum hardware register on MIPS{32,64}R2.
|
| 1.114 | 26-Jan-2018 |
maya | branches: 1.114.8;
Don't warn about MIPS1 MULTIPROCESSOR in a mips3 file.
|
| 1.113 | 27-Jul-2016 |
skrll | branches: 1.113.8;
Sprinle RCSID
|
| 1.112 | 11-Jul-2016 |
matt | branches: 1.112.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.111 | 30-Jun-2015 |
skrll | Fix logic inversion in 1.107
|
| 1.110 | 16-Jun-2015 |
macallan | .set mips3 for __mips_o32
now o32 kernels boot again on my O2
|
| 1.109 | 11-Jun-2015 |
matt | Don't include <machine/param.h> in .S files, get the needed values from assym.h
Define NBPG as UL to avoid integer over with NBXSEG on LP64 systems.
(.S files don't like numbers with UL appended to them).
|
| 1.108 | 07-Jun-2015 |
matt | Define COP0 register that use select value in <mips/cpuregs.h>
Use those new definitions
|
| 1.107 | 06-Jun-2015 |
matt | On mipsNN use trap instructions when inconsistent status register settings
are found.
|
| 1.106 | 04-Jun-2015 |
matt | Don't compile the mips64 stuff if we being compiled as mips32
|
| 1.105 | 04-Jun-2015 |
matt | Don't .set mips3 if we are >= mips3 already
Use dins if we have it rather than two shifts.
|
| 1.104 | 02-Jun-2015 |
matt | In cpu_trampoline, load the ksp from the idlelwp after we enable KX.
|
| 1.103 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.102 | 16-Aug-2011 |
matt | branches: 1.102.12; 1.102.30;
Only jump through t9/ra (or k0) to help avoid hitting
the Loongson2 jump problem.
|
| 1.101 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.100 | 10-Jul-2011 |
matt | More <machine/ include cleanup
|
| 1.99 | 12-Apr-2011 |
matt | Add mipsNN_cp0_watch{lo,hi}_{read,write}
|
| 1.98 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.97 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.96 | 14-Dec-2009 |
matt | branches: 1.96.4; 1.96.6; 1.96.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.95 | 10-Dec-2009 |
rmind | Rename L_ADDR to L_PCB and amend some comments accordingly.
|
| 1.94 | 27-Nov-2009 |
rmind | - Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
|
| 1.93 | 17-Oct-2007 |
garbled | branches: 1.93.20; 1.93.38;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.92 | 27-Jun-2007 |
uebayasi | branches: 1.92.2; 1.92.10;
Fix typo.
|
| 1.91 | 17-May-2007 |
yamt | merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.90 | 23-Feb-2007 |
tsutsui | branches: 1.90.4; 1.90.6; 1.90.12;
uvm.page_idle_zero now is a bool, not a 32bit value any more.
BTW, is it still worth to have uvm_pageidlezero()? Which port uses it?
|
| 1.89 | 09-Feb-2007 |
ad | branches: 1.89.2;
Merge newlock2 to head.
|
| 1.88 | 11-Dec-2005 |
christos | branches: 1.88.20;
merge ktrace-lwp.
|
| 1.87 | 08-Sep-2005 |
tsutsui | Add mips3_cp0_pg_mask_write() to initialize pagemask register.
|
| 1.86 | 07-Aug-2003 |
agc | branches: 1.86.6; 1.86.14; 1.86.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.85 | 17-Jan-2003 |
thorpej | branches: 1.85.2;
Merge the nathanw_sa branch.
|
| 1.84 | 08-Nov-2002 |
simonb | branches: 1.84.4;
Sprinkle a little more COP0_SYNC (in an unused function...).
|
| 1.83 | 09-Sep-2002 |
simonb | In the idle functions, set curproc to NULL and (#ifdef LOCKDEBUG) call
sched_unlock_idle before enabling interrupts. LOCKDEBUG kernels now
boot successfully.
Thanks to Chris Gilbert for helping fix this.
|
| 1.82 | 09-Sep-2002 |
simonb | Include "opt_lockdebug.h" here to #ifdef LOCKDEBUG actually does something.
|
| 1.81 | 17-Jun-2002 |
simonb | Fix tyop.
|
| 1.80 | 05-Jun-2002 |
simonb | White space nits.
|
| 1.79 | 01-Jun-2002 |
simonb | Use CPU_MIPS_USE_WAIT and CPU_MIPS_NO_WAIT in the CPU table, and use
the generic name "mips_wait_idle" for the old function that had both
rm52xx_idle and mipsNN_idle entry points.
|
| 1.78 | 01-Jun-2002 |
simonb | Remove some unnecessary nops after some mfc0's.
|
| 1.77 | 11-Mar-2002 |
uch | branches: 1.77.4;
make this compile and work with MIPS3_5900.
|
| 1.76 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Remove all mmu-related code that may use 32 register on mips32-style
implementatios and move them to mipsX_subr.S - which is then included
from mips{3,32,64,5900}_subr.S with various control defines enabled.
- Remove local cache instruction flags
- Add badaddr64 (from Broadcom Corp).
|
| 1.75 | 27-Dec-2001 |
shin | add #ifdef DEBUG around VCED_count etc.
|
| 1.74 | 27-Dec-2001 |
shin | split VCED and VCEI.
|
| 1.73 | 27-Dec-2001 |
shin | simplify VCED processing.
just write back and invalidate secondary cache line and fetch data again.
|
| 1.72 | 14-Nov-2001 |
thorpej | branches: 1.72.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.71 | 16-Oct-2001 |
uch | branches: 1.71.2;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.70 | 24-Jul-2001 |
rafal | Fix bug in mips3_proc_trampoline: SR wasn't disabled on entry, allowing an
interrupt to sneak in after EXL had been set; the interrupt EPC was stale
as PC isn't saved if EXL is set, causing the eret to return to the wrong
place and leading to kernel-mode TLB misses on user addresses. The bug
was discovered by the japanese NetBSD/*mips folks and the same fix was
found independently by shinohara-san (shin@netbsd.org).
|
| 1.69 | 11-Jun-2001 |
thorpej | branches: 1.69.2;
Always indirect through the "locoresw" to get the cache ops, since
there are just far too many combinations to handle with magic
#ifdefs in any sane way. Also, add a HitFlushDCache op to the
"locoresw", and fill it in as appropriate (it's NULL on MIPS-I,
so watch out).
These changes ensure that my R4600 Indy (with 2-way cache) gets
the correct cache ops when the kernel is built with only MIPS3
support, resulting in a kernel that is significantly more stable.
|
| 1.68 | 30-May-2001 |
lukem | add missing #include "opt_kgdb.h"
|
| 1.67 | 29-May-2001 |
thorpej | Add an idle loop routine for the QED RM52xx family. This uses the
RM52xx `wait' insn to power down the pipeline.
|
| 1.66 | 20-Jan-2001 |
ur | branches: 1.66.2;
Fix register name typo.
|
| 1.65 | 16-Jan-2001 |
thorpej | New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
|
| 1.64 | 14-Jan-2001 |
thorpej | Make the astpending flag per-process.
|
| 1.63 | 13-Jan-2001 |
thorpej | Check for ASTs in Syscall and UserGenException, too; AST processing
must be done on *every* return to userland.
|
| 1.62 | 20-Dec-2000 |
jeffs | Hook mips3 cache error vector. No real handler, only set-up for a panic.
A real handler is hard.
|
| 1.61 | 14-Dec-2000 |
jeffs | For MIPS software masking option, when returning to user mode apply
the mask to all interrupts to catch changes in the mask state faster.
Does not affect platforms w/o this option enabled.
|
| 1.60 | 27-Nov-2000 |
nisimura | Use only one TLB entry to wire down process's USPACE since it's
now guranteed to be aligned on 8KB boundary in kernel virutal
address. Retain one more free TLB entry.
|
| 1.59 | 29-Oct-2000 |
shin | fix cp0 hazard.
R4000 requires 3 nops between tlbr and dmfc0.
|
| 1.58 | 24-Oct-2000 |
castor | In mips3_TBIS(va) do not invalidate the other half of the JTLB entry if
the page is wired down. Flushing both halves of a wired TLB entry resulted
in hangs when in programs called for and released kernel memory
soon after being invoked. In particular, we see this when single-stepping
a process using GDB.
It would be better if we could arrange to use both halves of the TLB
entry for the PCB, but for some reason we frequently end up with things
on an odd page boundary.
|
| 1.57 | 05-Oct-2000 |
cgd | clean up and consistency for CP0 Count, Compare, Wired, and Config
access function names and prototypes.
|
| 1.56 | 05-Oct-2000 |
cgd | nuke mips3_clearBEV(). There's really no point in coding a
special-purpose assembly routine for things like this.
|
| 1.55 | 02-Oct-2000 |
cgd | provide mips3_ld() and mips3_sd(), functions which provide safe wrappers
for mips3 (and later) 'ld' and 'sd' instructions. These currently
only are properly implemented for the _MIPS_BSD_API_LP32 and
_MIPS_BSD_API_LP32_64CLEAN 'API's. They're pretty messy, but when you
need them, you really need them.
|
| 1.54 | 26-Sep-2000 |
jeffs | No longer save $at on syscall entry. v1 does appear to be used as if
you do not save it and pass it along in rval the system will start
to fail running user programs. This finishes the suggestion by cgd to
not save some registers on syscall entry.
|
| 1.53 | 16-Sep-2000 |
jeffs | Re-enable SR IE bit before calling syscall(). Matches Tohru's mips1 change.
|
| 1.52 | 13-Sep-2000 |
jeffs | Do not save t* registers in syscall stub as suggested by cgd. Saves
a whole 0.01us in lmbench lat_syscall null on our 250Mhz QED system.
$at is still saved just to be safe, although it looks like it does
not need to be. $v1 is used in syscall(), although I'm not sure why.
|
| 1.51 | 13-Sep-2000 |
nisimura | Introduce 'segbase' global variable to hold the pointer to current
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
|
| 1.50 | 13-Sep-2000 |
chuck | modify mips3 locore to elminate the abuse of XContext
so that we can run on systems that do not have XContext
(e.g. IDT 32364).
|
| 1.49 | 12-Sep-2000 |
soren | Remove old comment.
|
| 1.48 | 08-Sep-2000 |
jeffs | In outofworld, keep $sp for DDB case if it looks like a kernel address
so the stacktrace is ok.
|
| 1.47 | 07-Sep-2000 |
jeffs | Shuichiro URATA pointed out that the R4000 needs 3 nops. Other OSs make
it look at casual inspection like 1 nop is needed but play other tricks.
Still have reduced by 1 nop. Hopefully this covers the NEC 41[x]1. Could
not find info for those processors.
|
| 1.46 | 06-Sep-2000 |
jeffs | Remove 3 of the nops between tlbwr and eret in tlb miss handlers. They
were added early when adding the QED support. RM5231 seems to work fine
w/o the extra nops. Noticed by Chuck Cranor.
|
| 1.45 | 06-Aug-2000 |
shin | protect doubleword register from interrupt.
|
| 1.44 | 01-Aug-2000 |
jeffs | Make mips3_FlushICache() convert a0 into a KSEG0 + virtual index like
the _2way and mips3_FlushDCache(). This lets all mips3 cache ops accept
user virtual addresss w/o a tlb miss. Since this is now done in both
ICache flush routines, no need to do it in pmap.c. Fixed R4400
stability problems with setregs() cache flushing.
|
| 1.43 | 25-Jul-2000 |
jeffs | Fix mips3 outofworld to panic cleanly even if shutdown path misses K2.
Previously we jal to panic which never cleared the tlb fault, so if
on the course of shutdown (like a doshutdownhooks() callback) missed
K2, it would panic again. Fix by setting EPC to panic() and eret.
|
| 1.42 | 25-Jul-2000 |
jeffs | Add option to apply additional mask to the SR at run-time for MIPS3 platforms.
By default this is off, and only slightly changes the code to load SR when
a temp register is available. This can be used by the platform code to
handle slow to clear interrupts (our case) or to mask off any interrupt
any interrupt at run-time. This can be very useful for embedded platforms
that have less than desirable interrupt properties.
|
| 1.41 | 20-Jul-2000 |
jeffs | Include kgdb hooks in trap.c. Include bits of DDB code for kgdb also. Remove
some local prototypes that are in headers now.
|
| 1.40 | 20-Jul-2000 |
jeffs | Move masked status and instr into jal cpu_intr delay slot.
|
| 1.39 | 19-Jul-2000 |
jeffs | Improve outofworld: to include the vaddr. Removed unused mips3_Set64bit
and an #if 1.
|
| 1.38 | 26-Jun-2000 |
nisimura | Abandon {mips1,mips3}_TBRPL()s which have little gain. They were
expected to be better than MachTLBUpdate(). After all, TLBUpdate()
is rather harmful and should be replaced with TBIS().
|
| 1.37 | 21-Jun-2000 |
soren | Fix pasto.
|
| 1.36 | 20-Jun-2000 |
soren | branches: 1.36.2;
Add mips3_write_config().
|
| 1.35 | 17-Jun-2000 |
cgd | put cache op #defines up at the top of the file, so all cache ops can
use them. Rename them to match the names in See Mips Run; they're not
as orthogonal as values or'd together might make you think... Finally,
actually use them for every bloody cache op.
|
| 1.34 | 09-Jun-2000 |
soda | Decrease MIPS3_TLB_WIRED_ENTRIES from 8 to 2,
and rename it to MIPS3_TLB_WIRED_UPAGES.
The value of wired register becomes variable on arc port,
and arc is the only mips3 port which uses the wired TLB entries 2..7.
|
| 1.33 | 09-Jun-2000 |
soda | typo in comment
|
| 1.32 | 06-Jun-2000 |
soren | Rename RM5200 cache ops to mips3_*_2way in anticipation of using them
for other CPUs with 2-way set associative L1 caches as well.
|
| 1.31 | 29-May-2000 |
simonb | A few more white-space bogons.
|
| 1.30 | 23-May-2000 |
soren | branches: 1.30.2;
MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,
so remove references them, and do a little other cleanup.
|
| 1.29 | 21-May-2000 |
soren | Include opt_cputype.h.
|
| 1.28 | 17-May-2000 |
soren | mips5200_FlushCache(): flush L2 cache too.
|
| 1.27 | 10-May-2000 |
nisimura | Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3. It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs. mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.
|
| 1.26 | 09-May-2000 |
nisimura | Introduce mips3_TBRPL(); not used in this moment, to be useful to
discard MachTLBUpdate() calls, however, the necessity of TLB entry
modification in such a way is under question because implementation
glitches on ASID management was straightened, those calls can be
sanely removed after all.
|
| 1.25 | 21-Apr-2000 |
shin | delete unused function mips3_TLBReadVPS().
reorder insns to avoid mtc0/mfc0 hazard (for VR4100/R4700/RM52xx).
save/restore PageMask in mips3_TLBRead().
|
| 1.24 | 21-Apr-2000 |
nisimura | Effort to have consistent comments, fixing one error.
|
| 1.23 | 21-Apr-2000 |
nisimura | - Address PR#9907. u_pte[1] wired down is left not global sometimes.
The brokenness is revealed sporadorically by memory usage on runtime.
- Avoid Vr4100 incompatibilty by making sure to retain default pgMask
value for TLB invalidation routines.
|
| 1.22 | 12-Apr-2000 |
nisimura | - Implement mips3_TBIAP().
- Remove obsoluted routines in locore_mips3.S
- addiu -> addu, andi -> and, ori -> or.
|
| 1.21 | 11-Apr-2000 |
nisimura | Load delay slot is automagically adjusted at runtime since MIPS II
architecture.
|
| 1.20 | 11-Apr-2000 |
nisimura | Introduce cpu_intr() whose body is now provided by target ports in
their own ways. Ugly fixup #define in machine/intr.h have gone.
mips_hardware_intr global variable patch work has gone.
|
| 1.19 | 10-Apr-2000 |
nisimura | Make (sure) ASID management same as what NetBSD/alpha does for ASN.
ASID#0 is reserved for pmap0 shared between proc0 and kthreads,
and every TLB for KSEG2 has G (global) bit to have wildcard match
regardless of the process' ASID. MIPS1 would flush TLBs belong
to user spaces upon ASID generation bump. Change for MIPS3 is
to be done.
|
| 1.18 | 19-Mar-2000 |
soren | Updated RM5231 cache code from Jeff Smith and Ethan Solomita at Geocast.
Many thanks.
|
| 1.17 | 19-Feb-2000 |
mycroft | Disable the sN,sp,gp register restore code for now, as it seems to collide with
something else.
|
| 1.16 | 18-Feb-2000 |
mycroft | Make the MIPS1 and MIPS3 code more similar.
XXX Needs testing on MIPS1.
|
| 1.15 | 18-Feb-2000 |
mycroft | Take a whack at allowing sN, sp and gp to be set from DDB, too.
|
| 1.14 | 22-Dec-1999 |
tsubai | * news5000 support.
* mips3_VCE[DI] now support L2CacheLSize != 32.
|
| 1.13 | 30-Nov-1999 |
shin | reorder instructions in mips3_TLBFlush() to avoid coprocessor hazard
for R4600/R4700/VR4100.
|
| 1.12 | 06-Nov-1999 |
mhitch | Try to document the use of the XContext register in the TLBMiss and XTLBMiss
exception handlers.
|
| 1.11 | 29-Oct-1999 |
simonb | Fix cut'n'pasto in comment.
|
| 1.10 | 25-Sep-1999 |
shin | branches: 1.10.2; 1.10.4; 1.10.6;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.9 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.8 | 30-Mar-1999 |
soda | branches: 1.8.4;
ALIAS() is not needed, use XLEAF() or XNESTED() instead
|
| 1.7 | 22-Feb-1999 |
jonathan | Cannot do mcount() profiling in TLB exception-handler code.
|
| 1.6 | 16-Feb-1999 |
jonathan | Add VECTOR() and VECTOR_END() macros for declaring exception-vector
code. Fold in <xxx>End names used to copy exception code to vector
locations. Use in mips3 locore code.
|
| 1.5 | 29-Jan-1999 |
castor | Copy previous fix for TLB miss routine to XTLB miss routine to avoid
processor-dependent behavior in 32-bit ops on 64-bit operands.
|
| 1.4 | 28-Jan-1999 |
mhitch | Fix the TLBMiss handler to not use an undefined operation (32 bit operation
on 64 bit register that's not correctly signed extended. The R4x00 support
works again on DECstations. A similar change to the XTLBMiss handler probably
needs to be made, but I have not done that since I am unable to test any
changes to that.
Also re-order a couple of instructions to allow for delay with mfc0.
|
| 1.3 | 16-Jan-1999 |
nisimura | - Make cpu_switch() a normal call; formally it was splitted into halves.
- Fix an error in mips3_cpu_switch_resume(); ASID was not set correctly.
- Remove global variable 'curpcb' reference in mips1_proc_trampoline().
- Restore 'cpuregs.h'.
|
| 1.2 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.1 | 15-Oct-1998 |
nisimura | branches: 1.1.2;
file locore_mips3.S was initially added on branch nisimura-pmax-wscons.
|
| 1.1.2.2 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.1.2.1 | 15-Oct-1998 |
nisimura | - locore_mips1.S and locore_mips3.S are free standing files indepedent from
locore.S.
|
| 1.8.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.10.6.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.10.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.10.2.6 | 11-Feb-2001 |
bouyer | Sync with HEAD.
|
| 1.10.2.5 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.10.2.4 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.10.2.3 | 08-Dec-2000 |
bouyer | Sync with HEAD.
|
| 1.10.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.10.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.30.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.36.2.5 | 16-Aug-2001 |
tv | Pullup [shin]:
sys/arch/mips/mips/locore_mips3.S 1.70
sys/arch/mips/mips/vm_machdep.c 1.77-1.78
Fix bugs in handling of SR on mips3 machines, causing TLB miss panics.
|
| 1.36.2.4 | 07-Jun-2001 |
he | Pull up revision 1.67 (requested by hubertf, reviewed by thorpej):
Implement power saving for RM5200 and RM7000 CPUs, as used in
e.g. Cobalt RaQ2.
|
| 1.36.2.3 | 10-Aug-2000 |
shin | pull up revision 1.45 (Approved by relent-1-5):
protect doubleword register from interrupt.
|
| 1.36.2.2 | 21-Jun-2000 |
soren | Pull up rev 1.37: Fix pasto.
|
| 1.36.2.1 | 20-Jun-2000 |
soren | file locore_mips3.S was added on branch netbsd-1-5 on 2000-06-21 19:42:06 +0000
|
| 1.66.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.69.2.6 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.69.2.5 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.69.2.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.69.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.69.2.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.69.2.1 | 03-Aug-2001 |
lukem | update to -current
|
| 1.71.2.3 | 11-Nov-2001 |
shin | use new cache parameter variables.
|
| 1.71.2.2 | 04-Nov-2001 |
shin | add missing #ifdef to compile.
|
| 1.71.2.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.72.2.11 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.72.2.10 | 05-Oct-2002 |
gmcgarry | LWPify
|
| 1.72.2.9 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.72.2.8 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.72.2.7 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.72.2.6 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.72.2.5 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.72.2.4 | 18-Nov-2001 |
wdk | Fixup l->l_proc references in areas where p_md structures were
used in locore routines.
Can now boot multi-user on -sgimips machine.
Untested: upcall functions, R2000/3000 processors
|
| 1.72.2.3 | 18-Nov-2001 |
wdk | p_md.md_regs -> l_md.md_regs
p_md.md_upte -> l_md.md_upte
|
| 1.72.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.72.2.1 | 14-Nov-2001 |
wdk | file locore_mips3.S was added on branch nathanw_sa on 2001-11-17 23:43:43 +0000
|
| 1.77.4.2 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.77.4.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.84.4.1 | 18-Dec-2002 |
gmcgarry | Remove the scheduler semantics from machine-dependent context switch.
|
| 1.85.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.85.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.85.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.85.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.86.16.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.86.16.2 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.86.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.86.14.1 | 11-Sep-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #758):
sys/arch/mips/include/locore.h: revision 1.69
sys/arch/mips/mips/locore_mips3.S: revision 1.87
Add mips3_cp0_pg_mask_write() to initialize pagemask register.
|
| 1.86.6.1 | 13-Sep-2005 |
riz | Pull up following revision(s) (requested by tsutsui in ticket #5829):
sys/arch/mips/include/locore.h: revision 1.69
sys/arch/mips/mips/locore_mips3.S: revision 1.87
Add mips3_cp0_pg_mask_write() to initialize pagemask register.
|
| 1.88.20.1 | 30-Jan-2007 |
ad | For now always call sched_unlock_idle/sched_lock_idle. They will be
removed by yamt's cpu_switchto() changes.
|
| 1.89.2.3 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.89.2.2 | 21-Mar-2007 |
ad | Initial changes for MIPS. Not yet working under gxemul.
|
| 1.89.2.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.90.12.2 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.90.12.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.90.6.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.90.4.2 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.90.4.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.92.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.92.2.1 | 07-Aug-2007 |
matt | Sync with HEAD.
|
| 1.93.38.16 | 10-Feb-2012 |
matt | Fix comment.
|
| 1.93.38.15 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.93.38.14 | 23-Dec-2011 |
matt | Add mips3_cp0_random_read.
Add mipsNN_cp0_config{1-7}_{read,write}.
|
| 1.93.38.13 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.93.38.12 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.93.38.11 | 18-Aug-2010 |
matt | Set SR UX when we first set KX. (XLS416 now boot multiuser again with
>32 bit VAs).
|
| 1.93.38.10 | 16-Aug-2010 |
matt | Improve panic message in mips_wait_idle.
|
| 1.93.38.9 | 14-May-2010 |
matt | Make badaddr64 work on O32. Add a few syncs to force errors.
|
| 1.93.38.8 | 01-Mar-2010 |
matt | Add secondary processor spinup support (cpu_trampoline is in locore_mips3.S).
Nuke lse_boot_secondary_processors (not needed).
Move cpu_info_store to cpu_subr.C
|
| 1.93.38.7 | 25-Feb-2010 |
matt | Add mipsXX_tlb_record_asids - records what ASIDs have valid TLB entries in
the TLB.
Move some mips3 specific routines from locore.S to locore_mips3.S
|
| 1.93.38.6 | 22-Feb-2010 |
matt | Add a weak alias of cpu_counter32 to mips3_cp0_count_read. This allows
<mips/cpu_counter.h> to avoid including <mips/locore.h>.
|
| 1.93.38.5 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.93.38.4 | 06-Feb-2010 |
matt | wait idle also needs to see if at least one interrupt is unmasked.
|
| 1.93.38.3 | 21-Aug-2009 |
matt | Make ABI agnostic. Move locoresw to .rdata
|
| 1.93.38.2 | 20-Aug-2009 |
matt | Make ABI agnostic. (O32 produces identical code).
|
| 1.93.38.1 | 20-Aug-2009 |
uebayasi | Build mips3_ld / mips3_sd for N32/N64.
64-bit arguments are stored in single registers in these ABIs. No special
treatment needed.
|
| 1.93.20.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.96.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.96.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.96.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.96.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.102.30.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.102.30.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.102.30.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.102.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.112.2.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.113.8.1 | 31-Jul-2023 |
martin | Pull up following revision(s) (requested by riastradh in ticket #1859):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
(applied also to sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/cortex_init.S)
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/alpha/include/asm.h: revision 1.45
(applied to sys/arch/alpha/alpha/multiproc.s)
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
|
| 1.114.8.1 | 31-Jul-2023 |
martin | Pull up following revision(s) (requested by riastradh in ticket #1676):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
sys/arch/alpha/include/asm.h: revision 1.45
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
|
| 1.115.20.1 | 31-Jul-2023 |
martin | Pull up following revision(s) (requested by riastradh in ticket #264):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
sys/arch/alpha/include/asm.h: revision 1.45
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/riscv/riscv/cpu_switch.S: revision 1.3
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
riscv: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
|
| 1.14 | 20-Jul-2022 |
riastradh | mips: Fix cpuids synchronization at boot.
|
| 1.13 | 28-Jul-2020 |
simonb | Change cpus_booted back to a simple variable instead of a kcpuset.
octeon_cpu_spinup() was trying to set CPU status immediately on kernel
startup _well_ before the kcpuset was initialised.
|
| 1.12 | 26-Jul-2020 |
simonb | Adjust for new CP0 reg names, comment out most of the Cavium CP0
specific functions that are unused.
|
| 1.11 | 20-Jul-2020 |
simonb | Remove check/limit for only 2 cores.
Use MIPS_EBASE_CPUNUM instead of magic numbers.
|
| 1.10 | 27-Jul-2016 |
skrll | branches: 1.10.14;
Sprinle RCSID
|
| 1.9 | 11-Jul-2016 |
matt | branches: 1.9.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.8 | 11-Jul-2016 |
skrll | Use the correct register (s0) for the cpu number to copy to the second
argument (a1)
|
| 1.7 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.6 | 08-Jun-2015 |
matt | Fix octeon_reset_vector to work in non-MP kernels.
|
| 1.5 | 07-Jun-2015 |
matt | Define COP0 register that use select value in <mips/cpuregs.h>
Use those new definitions
|
| 1.4 | 06-Jun-2015 |
matt | Add octeon_reset_vector which handles soft resets and nmi that comes through
the boot vector @ 0xbfc00000.
|
| 1.3 | 02-Jun-2015 |
matt | branches: 1.3.2;
Fix octeon spinup code to branch to right instruction and to jump to the
right routine.
|
| 1.2 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.3.2.4 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.3.2.3 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.3.2.2 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.3.2.1 | 02-Jun-2015 |
skrll | file locore_octeon.S was added on branch nick-nhusb on 2015-06-06 14:40:02 +0000
|
| 1.9.2.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.10.14.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.14.1 | 27-Jul-2016 |
jdolecek | file locore_octeon.S was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.47 | 23-Apr-1999 |
thorpej | These are no longer used: replaced by locore_mips1.S and locore_mips3.S.
|
| 1.46 | 25-Dec-1998 |
msaitoh | branches: 1.46.4;
s/are are/are/
|
| 1.45 | 11-Sep-1998 |
jonathan | branches: 1.45.2;
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.44 | 09-Sep-1998 |
thorpej | Adjust for the new "reaper" kernel thread: do not free the vmspace and
u-area in machine-dependent code. Instead, call exit2() to schedule
the reaper to free them for us, once it is safe to do so (i.e. we are
no longer running on the dead proc's vmspace and stack).
|
| 1.43 | 12-Mar-1998 |
thorpej | Add support for UVM.
|
| 1.42 | 06-Mar-1998 |
tsubai | label 1: within #ifdef pmax is referenced from outside.
so it didn't work without -Dpmax.
|
| 1.41 | 01-Nov-1997 |
jonathan | Incorporate a 4.4BSD-Lite workaround for a bug in cache invalidation.
From /sys/news3400/news3400/locore.s, with id
@(#)locore.s 8.3 (Berkeley) 9/23/93
Kazumasa Utashiro notes that the pmax cacheflush routines don't work:
#ifndef NOTDEF /* I don't know why Ralph's code doesn't work. KU:XXX */
It's because pmax hardware wries the COP0 bit to external branch
logic. news3400s don't, and so the bc0f loop fails. It will also
fail on some other models of pmax, but we dont' support them.
Surround the relevant framgents in locore_r200.S with "#ifdef pmax".
Longer-term, the cacheflush entry in the locore callback may have
to be a CPU baseboard-specific entry, not just CPU-version specific.
|
| 1.40 | 09-Aug-1997 |
jonathan | branches: 1.40.4;
mips pmap_activate:
* prototype and definition for pmap_activate(p). Updates the segtab,
and changes the active ASID if p == curproc.
* Make reserved fixed-address (UADDR) kernelstack PTEs global,
so we still have a kernel stack after pmap_activate() on curproc.
* make KSEG2 mappings for p_addr global (see above.)
Seems to detune contextswitch and NTP resolution (by 60 ms), but
thepmap_activate() interface is mandatory. Needs more thought.
|
| 1.39 | 20-Jul-1997 |
jonathan | branches: 1.39.2;
Kernel profiling. Don't profile the following:
sigcode():
executed from user-space stack.
mips1_cpu_switch_resume, mips3_cpu_switch_resume:
arguments passed in via v0, t0, t1 (outlined from cpu_switch())
mips3_VCED(), mips3_VCEI():
called from exception-vector code without any register save,
$at, $ra are live.
|
| 1.38 | 07-Jul-1997 |
jonathan | DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.37 | 25-Jun-1997 |
mhitch | Someday I'll learn how the MIPS cpu works; add some delay after the tlbp
when switching to a new process. This was causing a ktlbmiss and stack
overflow panic on R3000 machines.
|
| 1.36 | 23-Jun-1997 |
mhitch | Remove an incorrect store of the SP when displaying information about a
ktlbmiss on the kernel stack. It was showing the temporary SP, not the
original SP.
Add a display of the first few wired entries of the TLB so when the ktblmiss
occurs, the TLB entries mapping the kernel stack can be verified.
|
| 1.35 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.34 | 21-Jun-1997 |
mhitch | Move the CPU-specific shift of the TLB PID into mips_r?000.S.
|
| 1.33 | 21-Jun-1997 |
jonathan | More mips1/mips3 changes to cpuregs.h and psl.h:
* cpuregs.h:
Delete unused VMMACH_ names (e.g., duplicates of PTE bits in pte.h).
Change remaining VMMACH_xxx names to MIPS1_xxx or MIPS3_xx.
Fold remaining compile-time definitions into a single #ifdef MIPS3.
* Use MIPS1_ names in locore_r2000.S, mips3_ names in locore_r4000.S
* Garbage-collect MachHitFlushDCache()
* psl.h:
use MIPS1_, MIPS3_ symbolic names for Cause register bits.
change _R3K to MIPS1_, _R4K to MIPS3. Conditionalize for mips1 only,
mips3 only, or when both are defined, use runtime CPUISMIPS3 test.
|
| 1.32 | 19-Jun-1997 |
mhitch | More merged mips1/mips3 support:
Remove cpu-specific routines from locore.S and add them to locore_r2000.S
and locore_r4000.S. Add entries in locore jump vector table for switch_exit()
and the cpu_switch() context resume.
Add offsets into the jump vector to genassym.cf for use in locore.S.
Use same cachesize variables for mips1 and mips3, and rename the variables
per Jonathan's request.
|
| 1.31 | 18-Jun-1997 |
mhitch | Save and restore usermode PC to/from current pcb instead of the RA slot of
the stack frame when usermode interrupt occurs. The interrupt may have
modified the PC [such as sendsig()]. This got dropped with the stackframe
changes.
|
| 1.30 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.29 | 16-Jun-1997 |
jonathan | Garbage-collect MIPS_3K_xxx, MIPS_4K_xxx outidde mips/include/cpuregs.h:
MIPS_3K_xxx -> MIPS1_xxx
MIPS_4K_xxx -> MIPS3_xxx
|
| 1.28 | 15-Jun-1997 |
mhitch | From Toru Nishimura: _FORKBRAINDAMAGE is gone, user process entered through
proc_trampoline(); move away from UADDR access to user structure.
From Toru Nishimura: exception trapframe changes, mini-debugger from pica
port, separate out syscall exception.
DECstation MIPS3 support: wbflush() is cpu-dependent, MIPS3 level 2 cache
support.
|
| 1.27 | 13-Oct-1996 |
jonathan | Rename mips CPU-family locore prefixes for case-consistency:
mips_r2000_, mips_R2000_ -> mips1_
mips_r4000_, mips_R4000_ -> mips3_
(which are also, for mnemonic reasons, consistent with gcc flag usage,
rather than using mipsI_ and mipsIII_).
|
| 1.26 | 13-Oct-1996 |
jonathan | Add marker labels to the end of the exception-vector (and exception
jump-table) locore entrypoints, so the stack traceback code can use
the end marker to handle entry points specially when doing tracebacks,
even if it doesn't know about them explicitly.
|
| 1.25 | 13-Oct-1996 |
jonathan | Apply
>backout previous kprintf change
change.
|
| 1.24 | 11-Oct-1996 |
christos | printf -> kprintf
|
| 1.23 | 20-Sep-1996 |
jonathan | * Add missing `UADDR' argument to RESTORE_USER_REGS() macro calls.
* Add back copyright notice and rcs ID from parent of previous
revision (pre-merge).
|
| 1.22 | 21-May-1996 |
jonathan | Copy the pmax locore.S code into the arch/mips hierarchy and split
it into three pieces:
* locore.S, which contains generic mips locore code,
applicable for both r2000/r3000 and r4000s (in 32-bit mode).
* locore_r2000.S, which contains r2000/r3000 (MIPS-I) versions
of the locore functions that need mips-generation-specific
instructions or handling.
* locore_r4000.S, which contains r4000/r4400/r4600 (MIPS-III?) versions
of the locore functions that need mips-generation-specific
instructions or handling.
Much of the code in locore_r4000.S is derived from Per Fogelstrom's Pica port.
locore.S still contains some pmax-specific DMA-buffer copy functions.
|
| 1.21 | 19-May-1996 |
jonathan | Add alternate "mips_r2000_<XXX>" entry points for the r2000/r3000-specific
locore functions. The new names are used by C code to construct a jump-table,.
making it less infeasible to have a single kernel image work on both
r3000 and r4000 systems.
|
| 1.20 | 31-Mar-1996 |
jonathan | merge mips and pica locore.S, pass 0:
* cut-and-paste all the code for both r2000 (MIPS-I) and r4000 (MIPS-III)
into both the pica and pmax locore.S.
* Change the names of the small segments of vector code that are
bcopied to the machine vector locations, to avoid clashing.
Get rid of the Sprite MachXXX names for the vector code, and
use use mips_r2000_xxx and mips_r4000_xxx instead.
Update the names used in the vector-copying code and trap handlers
to match.
* Most of the rest of the pica locore.S was copied from the pmax
locore.S, and then edited to work on an r4000. The names of
functions and of manifest constants stayed the same, although
both assmbler code and constant values changed.
cut-and-paste such code into contiguous blocks protected by
#if / #endif. Much of the cache and trap-handling code
needs r3000-only register fields, on the r3000, and r4000-only
insns and registers on the r4000.
* change the pmax r2000 exception-handling code to extract a trap
code with the user/kernel bit at 0x20 rather than 0x10.
(r2000s have 4-bit execption codes, r4000s have 5-bit.)
Use the a 16 from-user-space + 16-from-kernel space jump table,
just like on the r4000 pica port.
* add NOPs to the common code where required by the r4000 pipeline
constraints.
* add _C_LABEL() macros to the r4000 locore.
Comitted to provide a snapshot for others to test, and work on a cleaner merge.
|
| 1.19 | 25-Mar-1996 |
jonathan | Random additions from the Pica r4k port:
* Add spl4() and spl5() functions from the Pica port.
* Add MachFPTrap() as an alternate entry point for MachFPInterrupt.
The r4k reports floating-point execptions as a trap, not an interrupt,
and the Pica port uses the name MachFPTrap().
* Add nops to the Mach_spl?() functions and MachFPInterrupt, as required
for the r4k port.
Commit "floppy" interrupt counter for vmstat -i.
|
| 1.18 | 04-Feb-1996 |
jonathan | Redo the locore interrupt counters reported by vmstat -i:
* add a new enum decstation_intr_t to trap.c, naming each instrumented
interrupt symbolically, and used to index into intrcnt[]. Change the
model-specific interrupt handlers to use the decstation_intr_t when
updating interrupt counters.
* add instrumentation to the kmin and maxine interrupt handlers.
* fix a bug that counted each hardclock interrupts on the kn02 twice.
The hardcoded mapping from locore names to units is gross; but these
counters will hopefully be useful in identifying interrupt hot-spots
and PPP problems on the 3MIN.
|
| 1.17 | 20-Dec-1995 |
jonathan | Add support for ptrace PT_GETREGS and PT_SETREGS for NetBSD/pmax:
* define PT_GETREGS and PT_SETREGS in pmax/include/ptrace.h
* Flesh out the stubs in pmax/pmax/process_machdep.c to handle
those requests.
* Now that "struct reg" is actually used, remove the bogus
#ifdef LANGUAGE_C around its definition, and redo pmax/include/reg.h
so that the definitions needed by locore.S are in a separate file,
pmax/include/regnum.h.
* update locore.S to match.
|
| 1.16 | 28-Sep-1995 |
jonathan | Add a missing "nop" in a delay slot in the floating-point exception
handler. Gradual underflow and fp emulation now work correctly.
Proper denorms also fix strtod() inaccuracies and Gcc's "enquire" program.
|
| 1.15 | 21-Sep-1995 |
jonathan | Rename the force-all-pending-writes to memory function to wbflush().
Keep the old Mach-derived name "MachEmptyWriteBuffer()" as an alternate
entry point.
|
| 1.14 | 13-Aug-1995 |
mycroft | Add splsoftnet().
|
| 1.13 | 05-May-1995 |
mellon | Don't conditionalize utility routines based on DEBUG flag
|
| 1.12 | 28-Apr-1995 |
jonathan | Fix performance bug in pmax MachFlushDCache(). Old code disabled icache
and wasn't unrolled. This code runs cached and unrolled, giving an order
of magnitude improvement in some cases (e.g., DMA-capable network devices).
In use at Stanford DSG since late January 1995.
|
| 1.11 | 28-Apr-1995 |
jonathan | Check in changes suggested by Ralph Campbell: update variable names
to use turbochannel slot numbers, add a couple of extra slots, just
in case.
|
| 1.10 | 09-Mar-1995 |
mycroft | copy*str() should use size_t.
|
| 1.9 | 18-Jan-1995 |
mellon | Add conditional gp support; add interrupt disable before setting or clearing soft ints
|
| 1.8 | 15-Dec-1994 |
mycroft | Remove underscores from uses of *LEAF() and END(). Use _C_LABEL() in explicit
symbol references.
|
| 1.7 | 23-Nov-1994 |
dean | more underscore changes (from J. Stone)
|
| 1.6 | 14-Nov-1994 |
dean | Prepended underscores
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 25-Jun-1994 |
glass | assembler problem
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.39.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.40.4.1 | 01-Nov-1997 |
mellon | Pull rev 1.41 up from trunk (jonathan)
|
| 1.45.2.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.46.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.47 | 23-Apr-1999 |
thorpej | These are no longer used: replaced by locore_mips1.S and locore_mips3.S.
|
| 1.46 | 28-Dec-1998 |
nisimura | branches: 1.46.4;
- Eliminate dead code in TLB miss handler. Fortunately it has never been
executed. Once execunted, the result would be castrophic because it has
addressing error.
|
| 1.45 | 11-Sep-1998 |
jonathan | branches: 1.45.2;
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.44 | 09-Sep-1998 |
thorpej | Adjust for the new "reaper" kernel thread: do not free the vmspace and
u-area in machine-dependent code. Instead, call exit2() to schedule
the reaper to free them for us, once it is safe to do so (i.e. we are
no longer running on the dead proc's vmspace and stack).
|
| 1.43 | 19-Apr-1998 |
jonathan | Add locore assembler functions to read mips3 cycle counter, and
read and write compare register (controls cycle-driven periodic interrupt).
Use cycle counter for microsecond time on mips3, but for now only on
3min motherboards (5000/150). the MAXINE baseboard microsecond
counter is more stable and I don't ave no 5000/260 to test.
XXX clkread() is a mess, it should be rewritten.
XXX should add nanotime() to give inkernel nanosecond resolution,
and then microtime() reworked to use nanotime().
|
| 1.42 | 12-Mar-1998 |
thorpej | Add support for UVM.
|
| 1.41 | 09-Aug-1997 |
jonathan | mips pmap_activate:
* prototype and definition for pmap_activate(p). Updates the segtab,
and changes the active ASID if p == curproc.
* Make reserved fixed-address (UADDR) kernelstack PTEs global,
so we still have a kernel stack after pmap_activate() on curproc.
* make KSEG2 mappings for p_addr global (see above.)
Seems to detune contextswitch and NTP resolution (by 60 ms), but
thepmap_activate() interface is mandatory. Needs more thought.
|
| 1.40 | 20-Jul-1997 |
jonathan | branches: 1.40.2;
Kernel profiling. Don't profile the following:
sigcode():
executed from user-space stack.
mips1_cpu_switch_resume, mips3_cpu_switch_resume:
arguments passed in via v0, t0, t1 (outlined from cpu_switch())
mips3_VCED(), mips3_VCEI():
called from exception-vector code without any register save,
$at, $ra are live.
|
| 1.39 | 07-Jul-1997 |
jonathan | DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.38 | 25-Jun-1997 |
mhitch | Someday I'll learn how the MIPS cpu works; add some delay after the tlbp
when switching to a new process. This was causing a ktlbmiss and stack
overflow panic on R3000 machines.
|
| 1.37 | 23-Jun-1997 |
mhitch | Remove an incorrect store of the SP when displaying information about a
ktlbmiss on the kernel stack. It was showing the temporary SP, not the
original SP.
Add a display of the first few wired entries of the TLB so when the ktblmiss
occurs, the TLB entries mapping the kernel stack can be verified.
|
| 1.36 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.35 | 21-Jun-1997 |
mhitch | Move the CPU-specific shift of the TLB PID into mips_r?000.S.
|
| 1.34 | 21-Jun-1997 |
jonathan | More mips1/mips3 changes to cpuregs.h and psl.h:
* cpuregs.h:
Delete unused VMMACH_ names (e.g., duplicates of PTE bits in pte.h).
Change remaining VMMACH_xxx names to MIPS1_xxx or MIPS3_xx.
Fold remaining compile-time definitions into a single #ifdef MIPS3.
* Use MIPS1_ names in locore_r2000.S, mips3_ names in locore_r4000.S
* Garbage-collect MachHitFlushDCache()
* psl.h:
use MIPS1_, MIPS3_ symbolic names for Cause register bits.
change _R3K to MIPS1_, _R4K to MIPS3. Conditionalize for mips1 only,
mips3 only, or when both are defined, use runtime CPUISMIPS3 test.
|
| 1.33 | 19-Jun-1997 |
mhitch | More merged mips1/mips3 support:
Remove cpu-specific routines from locore.S and add them to locore_r2000.S
and locore_r4000.S. Add entries in locore jump vector table for switch_exit()
and the cpu_switch() context resume.
Add offsets into the jump vector to genassym.cf for use in locore.S.
Use same cachesize variables for mips1 and mips3, and rename the variables
per Jonathan's request.
|
| 1.32 | 18-Jun-1997 |
jonathan | typo.
|
| 1.31 | 18-Jun-1997 |
jonathan | RCS id police.
Add a copyright, and a copy of the copyright from the 4.4BSD locore,
from which this is a derived work (as the CVS logs show).
|
| 1.30 | 17-Jun-1997 |
mhitch | Virtual coeherency exception handler fixes:
Remove old code now that the new version is working.
Correct typo for 16K cache (R4400).
Align the saved AT register location; seems to hang if not aligned on 8
byte boundry.
|
| 1.29 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.28 | 16-Jun-1997 |
jonathan | Garbage-collect MIPS_3K_xxx, MIPS_4K_xxx outidde mips/include/cpuregs.h:
MIPS_3K_xxx -> MIPS1_xxx
MIPS_4K_xxx -> MIPS3_xxx
|
| 1.27 | 15-Jun-1997 |
mhitch | From Toru Nishimura: _FORKBRAINDAMAGE is gone, user process entered through
proc_trampoline(); move away from UADDR access to user structure.
From Toru Nishimura: exception trapframe changes, mini-debugger from pica
port, separate out syscall exception.
DECstation MIPS3 support: wbflush() is cpu-dependent, MIPS3 level 2 cache
support.
|
| 1.26 | 13-Oct-1996 |
jonathan | Rename mips CPU-family locore prefixes for case-consistency:
mips_r2000_, mips_R2000_ -> mips1_
mips_r4000_, mips_R4000_ -> mips3_
(which are also, for mnemonic reasons, consistent with gcc flag usage,
rather than using mipsI_ and mipsIII_).
|
| 1.25 | 13-Oct-1996 |
jonathan | Add marker labels to the end of the exception-vector (and exception
jump-table) locore entrypoints, so the stack traceback code can use
the end marker to handle entry points specially when doing tracebacks,
even if it doesn't know about them explicitly.
|
| 1.24 | 13-Oct-1996 |
jonathan | Apply
>backout previous kprintf change
change.
|
| 1.23 | 11-Oct-1996 |
christos | printf -> kprintf
|
| 1.22 | 21-May-1996 |
jonathan | Copy the pmax locore.S code into the arch/mips hierarchy and split
it into three pieces:
* locore.S, which contains generic mips locore code,
applicable for both r2000/r3000 and r4000s (in 32-bit mode).
* locore_r2000.S, which contains r2000/r3000 (MIPS-I) versions
of the locore functions that need mips-generation-specific
instructions or handling.
* locore_r4000.S, which contains r4000/r4400/r4600 (MIPS-III?) versions
of the locore functions that need mips-generation-specific
instructions or handling.
Much of the code in locore_r4000.S is derived from Per Fogelstrom's Pica port.
locore.S still contains some pmax-specific DMA-buffer copy functions.
|
| 1.21 | 19-May-1996 |
jonathan | Add alternate "mips_r2000_<XXX>" entry points for the r2000/r3000-specific
locore functions. The new names are used by C code to construct a jump-table,.
making it less infeasible to have a single kernel image work on both
r3000 and r4000 systems.
|
| 1.20 | 31-Mar-1996 |
jonathan | merge mips and pica locore.S, pass 0:
* cut-and-paste all the code for both r2000 (MIPS-I) and r4000 (MIPS-III)
into both the pica and pmax locore.S.
* Change the names of the small segments of vector code that are
bcopied to the machine vector locations, to avoid clashing.
Get rid of the Sprite MachXXX names for the vector code, and
use use mips_r2000_xxx and mips_r4000_xxx instead.
Update the names used in the vector-copying code and trap handlers
to match.
* Most of the rest of the pica locore.S was copied from the pmax
locore.S, and then edited to work on an r4000. The names of
functions and of manifest constants stayed the same, although
both assmbler code and constant values changed.
cut-and-paste such code into contiguous blocks protected by
#if / #endif. Much of the cache and trap-handling code
needs r3000-only register fields, on the r3000, and r4000-only
insns and registers on the r4000.
* change the pmax r2000 exception-handling code to extract a trap
code with the user/kernel bit at 0x20 rather than 0x10.
(r2000s have 4-bit execption codes, r4000s have 5-bit.)
Use the a 16 from-user-space + 16-from-kernel space jump table,
just like on the r4000 pica port.
* add NOPs to the common code where required by the r4000 pipeline
constraints.
* add _C_LABEL() macros to the r4000 locore.
Comitted to provide a snapshot for others to test, and work on a cleaner merge.
|
| 1.19 | 25-Mar-1996 |
jonathan | Random additions from the Pica r4k port:
* Add spl4() and spl5() functions from the Pica port.
* Add MachFPTrap() as an alternate entry point for MachFPInterrupt.
The r4k reports floating-point execptions as a trap, not an interrupt,
and the Pica port uses the name MachFPTrap().
* Add nops to the Mach_spl?() functions and MachFPInterrupt, as required
for the r4k port.
Commit "floppy" interrupt counter for vmstat -i.
|
| 1.18 | 04-Feb-1996 |
jonathan | Redo the locore interrupt counters reported by vmstat -i:
* add a new enum decstation_intr_t to trap.c, naming each instrumented
interrupt symbolically, and used to index into intrcnt[]. Change the
model-specific interrupt handlers to use the decstation_intr_t when
updating interrupt counters.
* add instrumentation to the kmin and maxine interrupt handlers.
* fix a bug that counted each hardclock interrupts on the kn02 twice.
The hardcoded mapping from locore names to units is gross; but these
counters will hopefully be useful in identifying interrupt hot-spots
and PPP problems on the 3MIN.
|
| 1.17 | 20-Dec-1995 |
jonathan | Add support for ptrace PT_GETREGS and PT_SETREGS for NetBSD/pmax:
* define PT_GETREGS and PT_SETREGS in pmax/include/ptrace.h
* Flesh out the stubs in pmax/pmax/process_machdep.c to handle
those requests.
* Now that "struct reg" is actually used, remove the bogus
#ifdef LANGUAGE_C around its definition, and redo pmax/include/reg.h
so that the definitions needed by locore.S are in a separate file,
pmax/include/regnum.h.
* update locore.S to match.
|
| 1.16 | 28-Sep-1995 |
jonathan | Add a missing "nop" in a delay slot in the floating-point exception
handler. Gradual underflow and fp emulation now work correctly.
Proper denorms also fix strtod() inaccuracies and Gcc's "enquire" program.
|
| 1.15 | 21-Sep-1995 |
jonathan | Rename the force-all-pending-writes to memory function to wbflush().
Keep the old Mach-derived name "MachEmptyWriteBuffer()" as an alternate
entry point.
|
| 1.14 | 13-Aug-1995 |
mycroft | Add splsoftnet().
|
| 1.13 | 05-May-1995 |
mellon | Don't conditionalize utility routines based on DEBUG flag
|
| 1.12 | 28-Apr-1995 |
jonathan | Fix performance bug in pmax MachFlushDCache(). Old code disabled icache
and wasn't unrolled. This code runs cached and unrolled, giving an order
of magnitude improvement in some cases (e.g., DMA-capable network devices).
In use at Stanford DSG since late January 1995.
|
| 1.11 | 28-Apr-1995 |
jonathan | Check in changes suggested by Ralph Campbell: update variable names
to use turbochannel slot numbers, add a couple of extra slots, just
in case.
|
| 1.10 | 09-Mar-1995 |
mycroft | copy*str() should use size_t.
|
| 1.9 | 18-Jan-1995 |
mellon | Add conditional gp support; add interrupt disable before setting or clearing soft ints
|
| 1.8 | 15-Dec-1994 |
mycroft | Remove underscores from uses of *LEAF() and END(). Use _C_LABEL() in explicit
symbol references.
|
| 1.7 | 23-Nov-1994 |
dean | more underscore changes (from J. Stone)
|
| 1.6 | 14-Nov-1994 |
dean | Prepended underscores
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 25-Jun-1994 |
glass | assembler problem
|
| 1.3 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.2 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.40.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.45.2.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.46.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.1 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.40 | 12-Jun-2011 |
rmind | Welcome to 5.99.53! Merge rmind-uvmplock branch:
- Reorganize locking in UVM and provide extra serialisation for pmap(9).
New lock order: [vmpage-owner-lock] -> pmap-lock.
- Simplify locking in some pmap(9) modules by removing P->V locking.
- Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share
the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs).
- Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner.
Add TLBSTATS option for x86 to collect statistics about TLB shootdowns.
- Unify /dev/mem et al in MI code and provide required locking (removes
kernel-lock on some ports). Also, avoid cache-aliasing issues.
Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches
formed the core changes of this branch.
|
| 1.39 | 20-Feb-2011 |
matt | branches: 1.39.2;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.38 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.37 | 14-Dec-2009 |
matt | branches: 1.37.4; 1.37.6; 1.37.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.36 | 14-Mar-2009 |
dsl | Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)
|
| 1.35 | 17-Oct-2007 |
garbled | branches: 1.35.16; 1.35.20; 1.35.28; 1.35.34; 1.35.38;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.34 | 21-Jul-2007 |
ad | branches: 1.34.6;
Don't depend on uvm_extern.h pulling in proc.h.
|
| 1.33 | 04-Mar-2007 |
tsutsui | branches: 1.33.2; 1.33.10; 1.33.12; 1.33.14;
Use (char *) cast on pointer arith.
|
| 1.32 | 04-Mar-2007 |
christos | Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.31 | 11-Dec-2005 |
christos | branches: 1.31.26;
merge ktrace-lwp.
|
| 1.30 | 26-Mar-2005 |
tsutsui | branches: 1.30.2;
Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.29 | 07-Aug-2003 |
agc | branches: 1.29.8; 1.29.10; 1.29.14;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.28 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.27 | 02-Apr-2003 |
thorpej | branches: 1.27.2;
Use PAGE_SIZE rather than NBPG.
|
| 1.26 | 23-Oct-2002 |
jdolecek | merge kqueue branch into -current
kqueue provides a stateful and efficient event notification framework
currently supported events include socket, file, directory, fifo,
pipe, tty and device changes, and monitoring of processes and signals
kqueue is supported by all writable filesystems in NetBSD tree
(with exception of Coda) and all device drivers supporting poll(2)
based on work done by Jonathan Lemon for FreeBSD
initial NetBSD port done by Luke Mewburn and Jason Thorpe
|
| 1.25 | 06-Sep-2002 |
gehenna | Merge the gehenna-devsw branch into the trunk.
This merge changes the device switch tables from static array to
dynamically generated by config(8).
- All device switches is defined as a constant structure in device drivers.
- The new grammer ``device-major'' is introduced to ``files''.
device-major <prefix> char <num> [block <num>] [<rules>]
- All device major numbers must be listed up in port dependent majors.<arch>
by using this grammer.
- Added the new naming convention.
The name of the device switch must be <prefix>_[bc]devsw for auto-generation
of device switch tables.
- The backward compatibility of loading block/character device
switch by LKM framework is broken. This is necessary to convert
from block/character device major to device name in runtime and vice versa.
- The restriction to assign device major by LKM is completely removed.
We don't need to reserve LKM entries for dynamic loading of device switch.
- In compile time, device major numbers list is packed into the kernel and
the LKM framework will refer it to assign device major number dynamically.
|
| 1.24 | 27-Feb-2002 |
christos | branches: 1.24.8;
- Use DEV_ constants, instead of documenting the numbers!
- Delete cdev_decl(mm); where appropriate, and other hand-crufting [hi powerpc!]
|
| 1.23 | 29-Jun-2000 |
mrg | branches: 1.23.2; 1.23.4; 1.23.8;
remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.22 | 26-Jun-2000 |
simonb | Change the kernel mmap interface so that the offset to map is an
"off_t" and the return value is a "paddr_t" to allow mappings
at offsets past 2^31 bytes. Somewhat inspired by FreeBSD, which
only changed the offset to a "vm_offset_t".
Includes updates for the i386, pc532 and sh3 mmmmap from Jason Thorpe.
|
| 1.21 | 23-May-2000 |
soren | branches: 1.21.4;
MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,
so remove references them, and do a little other cleanup.
|
| 1.20 | 03-Mar-2000 |
castor | Fix a /dev/kmem crash when vaddr + count wrapped and snuck through
the error check, courtesy of Jeff Smith <jeffs@geocast.com>.
|
| 1.19 | 04-Dec-1999 |
ragge | CL* discarding.
|
| 1.18 | 24-Mar-1999 |
mrg | branches: 1.18.8; 1.18.14;
completely remove Mach VM support. all that is left is the all the
header files as UVM still uses (most of) these.
|
| 1.17 | 15-Mar-1999 |
nisimura | - Adjust function declarations.
|
| 1.16 | 10-Feb-1999 |
kleink | Use of casts as lvalues is a GNU C extension; rearrange slightly.
|
| 1.15 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.14 | 19-Nov-1998 |
mrg | fix problems in many d_mmap routines:
- returned EOPNOTSUPP rather than -1.
- no check for negative offset.
many of these fix potential security problems in these drivers.
XXX XXX XXX
the d_mmap cdev routine should be changed to have a prototype like:
paddr_t (*d_mmap) __P((dev_t, off_t, int));
by someone!
|
| 1.13 | 07-May-1998 |
kleink | branches: 1.13.4;
Fix some arithmetics lossage on typeless pointers.
|
| 1.12 | 12-Mar-1998 |
thorpej | Add support for UVM.
|
| 1.11 | 24-Sep-1997 |
mhitch | branches: 1.11.2;
Fix error in msgbuf change: add missing '&&'.
|
| 1.10 | 19-Sep-1997 |
leo | Implement the kernel part of pr-1891. This allows for a more flexible sized
msgbuf. Note that old 'dmesg' and 'syslogd' binaries will continue running,
though old 'dmesg' binaries will output a few bytes of junk at the start of
the buffer, and will miss a few bytes at the end of the buffer.
|
| 1.9 | 22-Jun-1997 |
jonathan | branches: 1.9.4;
* Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.8 | 24-May-1997 |
jonathan | lint: Create mips/include/conf.h with prototypes for {mem device.
Add 'struct proc *p' 4th arg to mmopen(), mmclose().
Delete unused variable.
|
| 1.7 | 29-Sep-1995 |
jonathan | Fix btoc()/ctob() typo in reading physical memory that stopped ps
from reading process argument lists.
Allow kernel-virtual memory reads to read the message buffer, since
dmesg needs it.
|
| 1.6 | 10-Apr-1995 |
mycroft | Add mmopen(), mmclose(), and mmmmap() where appropriate. Lock vmmap when
needed. Make types consistent.
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 16-Jan-1994 |
deraadt | pullin vm_statistics.h
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.9.4.2 | 29-Sep-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.9.4.1 | 22-Sep-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.11.2.1 | 23-Nov-1998 |
cgd | Fix many real and potential security problems with character device
driver mmap routines that did not properly bounds check offsets.
See NetBSD security advisory NetBSD-SA1998-005 for details. Done
as a patch because it's large, and a fair number of bits are different
in -current. (mrg)
|
| 1.13.4.2 | 06-Dec-1998 |
drochner | pull up 1.14 - mmap() return value
|
| 1.13.4.1 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.18.14.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.18.8.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.21.4.1 | 30-Jun-2000 |
simonb | Pull up mmap paddr_t/off_t changes from trunk.
|
| 1.23.8.3 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.23.8.2 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.23.8.1 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.23.4.2 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.23.4.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.23.2.1 | 10-Oct-2001 |
fvdl | Convert all remaining devices.
|
| 1.24.8.2 | 08-Jun-2002 |
gehenna | add cdevsw
|
| 1.24.8.1 | 17-May-2002 |
gehenna | Add the character device switch.
|
| 1.27.2.4 | 01-Apr-2005 |
skrll | Sync with HEAD.
|
| 1.27.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.27.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.27.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.29.14.1 | 21-Nov-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #961):
sys/arch/mips/mips/cache.c: revision 1.27
sys/arch/mips/include/cache.h: revision 1.8
sys/arch/mips/mips/pmap.c: revision 1.158
sys/arch/mips/mips/vm_machdep.c: revision 1.106
sys/arch/mips/mips/mem.c: revision 1.30
sys/arch/mips/include/pmap.h: revision 1.47
Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.29.10.1 | 26-Mar-2005 |
yamt | sync with head.
|
| 1.29.8.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.30.2.1 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.31.26.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.33.14.1 | 15-Aug-2007 |
skrll | Sync with HEAD.
|
| 1.33.12.1 | 07-Aug-2007 |
matt | Sync with HEAD.
|
| 1.33.10.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.33.2.1 | 15-Jul-2007 |
ad | Get pmax working.
|
| 1.34.6.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.35.38.12 | 14-Feb-2012 |
matt | Fix various LP64 thinkos.
|
| 1.35.38.11 | 13-Feb-2012 |
matt | Add mm_md_direct_mapped_virt (inverse of mm_md_direct_mapped_phys). Add a
third argument, vsize_t *, which, if not NULL, returns the amount of virtual
space left in that direct mapped segment.
Get rid most of the individual direct_mapped assert and use the above
routines instead.
Improve kernel core dump code.
|
| 1.35.38.10 | 10-Jan-2012 |
matt | Fix gimplish in a comment.
|
| 1.35.38.9 | 10-Jan-2012 |
matt | Deal with KMEM reading KSEG0 addresses and limit those reads to available
memory. Also deal with the case that there may be memory beyond the end
of KSEG0 so compare the physical address against mips_avail_end.
|
| 1.35.38.8 | 10-Jan-2012 |
matt | Allow access to KSEGX from /dev/mem
|
| 1.35.38.7 | 29-Nov-2011 |
matt | Take part of the KSEG2 space and use it to "almost" direct another 256MB
of memory so that N32 kernels can make use of ram outside of KSEG0. This
allows N32 kernels to be useful on systems with 4GB of RAM or more.
|
| 1.35.38.6 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.35.38.5 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.35.38.4 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.35.38.3 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.35.38.2 | 08-Sep-2009 |
matt | For LP64 kernels, only use KSEG0 for pmap_steal_memory. Everything else uses
XKPHYS. Use the new MIPS_PHYS_TO_XKPHYS_{,UN}CACHED macros.
|
| 1.35.38.1 | 08-Sep-2009 |
matt | Use XKPHYS to read mem on _LP64.
|
| 1.35.34.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.35.28.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.35.20.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.35.20.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.35.16.1 | 29-Mar-2008 |
mjf | Add a mem_init() function for each architecture that requests a device
node for /dev/mem, /dev/null, /dev/zero, etc.
This will disappear when I move this code (and others) to be a
pseudo-device. When we have machine-independent mem code this will all be
unnecessary anyway.
|
| 1.37.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.37.8.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.37.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.37.4.1 | 18-Mar-2010 |
rmind | Unify /dev/{mem,kmem,zero,null} implementations in MI code. Based on patch
from Joerg Sonnenberger, proposed on tech-kern@, in February 2008.
Work and depression still in progress.
|
| 1.39.2.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.4 | 20-Jul-1997 |
jonathan | Add ddb to mips/conf/files.mips. Garbage-collect mdb.
|
| 1.3 | 19-Jul-1997 |
jonathan | * Re-apply changes from rev 1.6 of sys/arch/mips/include/reg.h accidentally
undone by rev 1.7:
>redo pmax/include/reg.h
>so that the definitions needed by locore.S are in a separate file,
>pmax/include/regnum.h.
* Add explicit `#include <mips/regnum.h>' where symbolic offsets
into a mips trapframe or struct reg are used..
|
| 1.2 | 30-Jun-1997 |
jonathan | Enable stack tracebacks if MDB is configured.
|
| 1.1 | 28-Jun-1997 |
mhitch | Moved the mini-debug routines out of trap.c into their own file, like the
original pica port.
|
| 1.6 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.5 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.4 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.96; 1.3.100; 1.3.106; 1.3.108;
merge ktrace-lwp.
|
| 1.2 | 05-Nov-2005 |
tsutsui | Remove #undef MIPS3_4100 from these files since mipsX_subr.S no longer has
#if defined(MIPS3_4100) statements.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.4; 1.1.8; 1.1.18; 1.1.34;
Add support for MIPS32 and MIPS64 architectures:
- Remove all mmu-related code that may use 32 register on mips32-style
implementatios and move them to mipsX_subr.S - which is then included
from mips{3,32,64,5900}_subr.S with various control defines enabled.
- Remove local cache instruction flags
- Add badaddr64 (from Broadcom Corp).
|
| 1.1.34.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.18.1 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.1.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.8.1 | 05-Mar-2002 |
nathanw | file mips32_subr.S was added on branch nathanw_sa on 2002-04-01 07:41:07 +0000
|
| 1.1.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.1 | 05-Mar-2002 |
jdolecek | file mips32_subr.S was added on branch kqueue on 2002-03-16 15:58:41 +0000
|
| 1.3.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.100.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.3.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.96.3 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.3.96.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.3.96.1 | 16-Jan-2010 |
matt | Rework the exception code. All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy. This also allows us to branch to unused space space
since the relative locations will remain the same.
When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU. The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).
kill outofworld and just let trap panic, if it can. Allow for sb1_subr.S
or rmixl_subr.S in the future. Fix TLB read/write code.
|
| 1.2 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.1 | 15-Mar-2011 |
matt | branches: 1.1.2; 1.1.4; 1.1.8;
Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.1.8.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.8.1 | 15-Mar-2011 |
jruoho | file mips32r2_subr.S was added on branch jruoho-x86intr on 2011-06-06 09:06:07 +0000
|
| 1.1.4.3 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.1.4.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.4.1 | 15-Mar-2011 |
matt | file mips32r2_subr.S was added on branch matt-nb5-mips64 on 2011-04-29 08:26:27 +0000
|
| 1.1.2.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.2.1 | 15-Mar-2011 |
rmind | file mips32r2_subr.S was added on branch rmind-uvmplock on 2011-04-21 01:41:12 +0000
|
| 1.15 | 29-May-2020 |
rin | For struct timecounter, use C99 initializers.
Compile tested. No functional changes intended.
|
| 1.14 | 07-May-2017 |
skrll | opt_multiprocessor.h police
|
| 1.13 | 10-Jul-2011 |
matt | branches: 1.13.12; 1.13.30; 1.13.44;
Fix machine/ includes
|
| 1.12 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.11 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.10 | 31-Jan-2008 |
tsutsui | branches: 1.10.28; 1.10.32; 1.10.38; 1.10.40;
Avoid using division ops in delay(9).
|
| 1.9 | 10-Jan-2008 |
tsutsui | The MIPS3 CP0 counter is not cleared at compare-match and
it always counts upto UINT32_MAX, so no need to handle
wrapped around case with ci_cycles_per_hz value.
|
| 1.8 | 09-Jan-2008 |
tsutsui | Fix another botch on migration to MI mips3_clock.c for algor in 2006:
- in algor_p????_cal_timer() functions, initialize ci_divisor_delay
and ci_cycles_per_hz values in curcpu() for MI mips3_clock.c:mips3_delay()
rather than obsolete and homegrown delay_divisor
- remove old _delay() stuff from locore_machdep.S
- make MI mips3_delay() work even before frequency values in curcpu()
are initialized
Now NetBSD/algor P5064 kernel works on gxemul.
While here, add a hack for emulators:
- ignore a measured CPU frequency if the value looks unlikely
Pullup request for netbsd-4 will be sent later.
|
| 1.7 | 08-Jan-2008 |
joerg | Remove __HAVE_TIMECOUNTER conditionals.
|
| 1.6 | 17-Oct-2007 |
garbled | branches: 1.6.2; 1.6.8;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.5 | 17-May-2007 |
yamt | branches: 1.5.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.4 | 08-Sep-2006 |
gdamore | branches: 1.4.2; 1.4.6; 1.4.8; 1.4.10; 1.4.14; 1.4.16; 1.4.22; 1.4.24;
Various improvements to make the common mips3 clock handling more generally
useful. The functions delay, cpu_initclocks, and setstatclcokrate have been
renamed to mips3_delay, mips3_initclocks, and mips3_setstatclockrate.
We provide weak aliases for the original names, so machdep code doesn't have
to provide wrapper routines. (Giving good performance.)
I've moved mips3_clockintr, mips3_initclocks, and mips3_setstatclockrate to
their own mips3_clockintr file, because some ports may not be able to use
these, and its senseless to carry that baggage.
|
| 1.3 | 08-Sep-2006 |
gdamore | Rename init_mips3_tc to mips3_init_tc() for consistency, and make it
extern.
|
| 1.2 | 07-Sep-2006 |
simonb | branches: 1.2.2;
Use a non-zero quality - 100 is an arbitrary number.
|
| 1.1 | 02-Sep-2006 |
gdamore | branches: 1.1.2;
Provide a common implementation for ports that use the MIPS CP0 counter
based clock interrupt.
This provides common implementations of: delay(), cpu_initclocks(), and a
timecounter based on the MIPS3 CP0. It also provides a new function,
mips3_clockintr(), that is intended to be called from a port's cpu_intr()
routine when INT5 is raised.
Hopefully many MIPS3 based machines can adopt this common interrupt framework.
The evbmips conversion will be committed separately, shortly.
|
| 1.1.2.3 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.1.2.1 | 02-Sep-2006 |
yamt | file mips3_clock.c was added on branch yamt-pdpolicy on 2006-09-03 15:23:21 +0000
|
| 1.2.2.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.4.24.1 | 03-Jun-2008 |
skrll | Sync with netbsd-4.
|
| 1.4.22.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.4.16.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.4.14.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.4.10.1 | 18-Apr-2007 |
ad | Pull in sys/cpu.h.
|
| 1.4.8.5 | 04-Feb-2008 |
yamt | sync with head.
|
| 1.4.8.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.4.8.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.4.8.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.8.1 | 08-Sep-2006 |
yamt | file mips3_clock.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:33 +0000
|
| 1.4.6.1 | 21-Jan-2008 |
bouyer | Pull up following revision(s) (requested by tsutsui in ticket #1040):
sys/arch/algor/isa/mcclock_isa.c: revision 1.9
sys/arch/algor/algor/algor_p5064_intr.c: revision 1.18, 1.20 via patch
sys/arch/algor/algor/algor_p4032_intr.c: revision 1.15, 1.17 via patch
sys/arch/algor/algor/algor_p6032_intr.c: revision 1.12, 1.14 via patch
sys/arch/mips/mips/mips3_clock.c: revision 1.8, 1.9
sys/arch/algor/dev/mcclock_mainbus.c: revision 1.7
sys/arch/algor/algor/locore_machdep.S: revision 1.4
Fix botch on MI todr(9) migration of algor on September 2006:
- year0 should be 1980, not 80
- put a newline after MI mc146818_attach()
- call todr_attach(9)
- in algor_p????_cal_timer() functions, initialize ci_divisor_delay
and ci_cycles_per_hz values in curcpu() for MI mips3_clock.c:mips3_delay()
rather than obsolete and homegrown delay_divisor
- remove old _delay() stuff from locore_machdep.S
- make MI mips3_delay() work even before frequency values in curcpu()
are initialized
Now NetBSD/algor P5064 kernel works on gxemul.
While here, add a hack for emulators:
- ignore a measured CPU frequency if the value looks unlikely
|
| 1.4.2.2 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.4.2.1 | 08-Sep-2006 |
rpaulo | file mips3_clock.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:41:26 +0000
|
| 1.5.10.3 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.5.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.5.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.6.8.2 | 10-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.6.8.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.6.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.10.40.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.10.40.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.10.38.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.10.32.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.10.28.3 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.10.28.2 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for explicit MULTIPROCESSOR dependency
|
| 1.10.28.1 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.13.44.1 | 11-May-2017 |
pgoyette | Sync with HEAD
|
| 1.13.30.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.13.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.13 | 13-Dec-2011 |
macallan | add a hook to mips3_initclocks() to allow for time counters other than the
cp0 cycle counter
|
| 1.12 | 10-Jul-2011 |
matt | branches: 1.12.2; 1.12.6;
Fix machine/ includes
|
| 1.11 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.10 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.9 | 07-Aug-2009 |
matt | branches: 1.9.4; 1.9.6; 1.9.8;
attach the missed evcnt too
|
| 1.8 | 03-Aug-2008 |
tsutsui | branches: 1.8.12;
Remove __weak_alias() for mips3_delay(). It's in mips3_clock.c.
|
| 1.7 | 08-Jan-2008 |
joerg | branches: 1.7.6; 1.7.10; 1.7.12; 1.7.16;
Remove __HAVE_TIMECOUNTER conditionals.
|
| 1.6 | 04-Jan-2008 |
ad | Correct headers.
|
| 1.5 | 17-Oct-2007 |
garbled | branches: 1.5.2; 1.5.8;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.4 | 17-May-2007 |
yamt | branches: 1.4.10;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.3 | 17-Nov-2006 |
tsutsui | branches: 1.3.2; 1.3.6; 1.3.8; 1.3.12; 1.3.14; 1.3.20;
Defer _spl0() or _splnone() calls (which enable hardware interrupts)
from cpu_configure(9) to cpu_initclocks(9) on mips ports which use
mips3_clockintr.c:mips3_clockintr() (i.e. CPU INT5 clock) to avoid
hardclock(9) before softclock interrupt is initialized in initclocks().
This should be harmless because initclocks() is a part of configure()
in these days and there is no MI function which expects hardware
interrupts between cpu_configure(9) and cpu_initclocks(9).
Disccussed on tech-kern and port-mips.
|
| 1.2 | 10-Sep-2006 |
tsutsui | branches: 1.2.2; 1.2.4;
Change mips3_clockintr() to take (struct clockframe *) rather than
pc and status since it calls hardclock(9) anyway.
OK'ed by gdamore on port-mips.
|
| 1.1 | 08-Sep-2006 |
gdamore | Various improvements to make the common mips3 clock handling more generally
useful. The functions delay, cpu_initclocks, and setstatclcokrate have been
renamed to mips3_delay, mips3_initclocks, and mips3_setstatclockrate.
We provide weak aliases for the original names, so machdep code doesn't have
to provide wrapper routines. (Giving good performance.)
I've moved mips3_clockintr, mips3_initclocks, and mips3_setstatclockrate to
their own mips3_clockintr file, because some ports may not be able to use
these, and its senseless to carry that baggage.
|
| 1.2.4.1 | 10-Dec-2006 |
yamt | sync with head.
|
| 1.2.2.2 | 14-Sep-2006 |
yamt | sync with head.
|
| 1.2.2.1 | 10-Sep-2006 |
yamt | file mips3_clockintr.c was added on branch yamt-pdpolicy on 2006-09-14 12:31:12 +0000
|
| 1.3.20.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.3.14.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.3.12.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.3.8.1 | 18-Apr-2007 |
ad | Pull in sys/cpu.h.
|
| 1.3.6.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.3.6.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.3.6.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.3.6.1 | 17-Nov-2006 |
yamt | file mips3_clockintr.c was added on branch yamt-lazymbuf on 2006-12-30 20:46:33 +0000
|
| 1.3.2.3 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.3.2.2 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.3.2.1 | 17-Nov-2006 |
ad | file mips3_clockintr.c was added on branch newlock2 on 2006-11-18 21:29:25 +0000
|
| 1.4.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.4.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.5.8.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.5.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.7.16.1 | 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.7.12.1 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.7.10.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.7.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.7.6.1 | 28-Sep-2008 |
mjf | Sync with HEAD.
|
| 1.8.12.3 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.8.12.2 | 21-Mar-2010 |
cliff | - mips_int5_evcnt, mips_int5_missed_evcnt and next_cp0_clk_intr
were moved to struct cpu_info to allow per-CPU MIPS count/compare
clock programming
|
| 1.8.12.1 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.9.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.9.8.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.9.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.9.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.12.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.12.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.6 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.5 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.4 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.96; 1.3.100; 1.3.106; 1.3.108;
merge ktrace-lwp.
|
| 1.2 | 05-Nov-2005 |
tsutsui | Remove #undef MIPS3_4100 from these files since mipsX_subr.S no longer has
#if defined(MIPS3_4100) statements.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.4; 1.1.8; 1.1.18; 1.1.34;
Add support for MIPS32 and MIPS64 architectures:
- Remove all mmu-related code that may use 32 register on mips32-style
implementatios and move them to mipsX_subr.S - which is then included
from mips{3,32,64,5900}_subr.S with various control defines enabled.
- Remove local cache instruction flags
- Add badaddr64 (from Broadcom Corp).
|
| 1.1.34.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.18.1 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.1.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.8.1 | 05-Mar-2002 |
nathanw | file mips3_subr.S was added on branch nathanw_sa on 2002-04-01 07:41:08 +0000
|
| 1.1.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.1 | 05-Mar-2002 |
jdolecek | file mips3_subr.S was added on branch kqueue on 2002-03-16 15:58:41 +0000
|
| 1.3.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.100.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.3.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.96.3 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.3.96.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.3.96.1 | 16-Jan-2010 |
matt | Rework the exception code. All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy. This also allows us to branch to unused space space
since the relative locations will remain the same.
When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU. The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).
kill outofworld and just let trap panic, if it can. Allow for sb1_subr.S
or rmixl_subr.S in the future. Fix TLB read/write code.
|
| 1.5 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.4 | 11-Dec-2005 |
christos | branches: 1.4.96; 1.4.100; 1.4.106; 1.4.108;
merge ktrace-lwp.
|
| 1.3 | 05-Nov-2005 |
tsutsui | Remove #undef MIPS3_4100 from these files since mipsX_subr.S no longer has
#if defined(MIPS3_4100) statements.
|
| 1.2 | 09-Jun-2003 |
simonb | branches: 1.2.2; 1.2.18;
Remove definitions and usage of MIPS_COP_0_STATUS_REG and
MIPS_COP_0_CAUSE_REG - use MIPS_COP_0_STATUS and MIPS_COP_0_CAUSE
instead.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.4; 1.1.8;
Add support for MIPS32 and MIPS64 architectures:
- Remove all mmu-related code that may use 32 register on mips32-style
implementatios and move them to mipsX_subr.S - which is then included
from mips{3,32,64,5900}_subr.S with various control defines enabled.
- Remove local cache instruction flags
- Add badaddr64 (from Broadcom Corp).
|
| 1.1.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.8.1 | 05-Mar-2002 |
nathanw | file mips5900_subr.S was added on branch nathanw_sa on 2002-04-01 07:41:08 +0000
|
| 1.1.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.1 | 05-Mar-2002 |
jdolecek | file mips5900_subr.S was added on branch kqueue on 2002-03-16 15:58:41 +0000
|
| 1.2.18.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.2.1 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.4.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.4.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.4.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.4.96.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.4.96.1 | 16-Jan-2010 |
matt | Rework the exception code. All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy. This also allows us to branch to unused space space
since the relative locations will remain the same.
When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU. The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).
kill outofworld and just let trap panic, if it can. Allow for sb1_subr.S
or rmixl_subr.S in the future. Fix TLB read/write code.
|
| 1.1 | 26-May-2011 |
matt | branches: 1.1.2;
file mips64_rmixl_subr.S was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.6 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.5 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.4 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.96; 1.3.100; 1.3.106; 1.3.108;
merge ktrace-lwp.
|
| 1.2 | 05-Nov-2005 |
tsutsui | Remove #undef MIPS3_4100 from these files since mipsX_subr.S no longer has
#if defined(MIPS3_4100) statements.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.4; 1.1.8; 1.1.18; 1.1.34;
Add support for MIPS32 and MIPS64 architectures:
- Remove all mmu-related code that may use 32 register on mips32-style
implementatios and move them to mipsX_subr.S - which is then included
from mips{3,32,64,5900}_subr.S with various control defines enabled.
- Remove local cache instruction flags
- Add badaddr64 (from Broadcom Corp).
|
| 1.1.34.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.18.1 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.1.8.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.8.1 | 05-Mar-2002 |
nathanw | file mips64_subr.S was added on branch nathanw_sa on 2002-04-01 07:41:09 +0000
|
| 1.1.4.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.1 | 05-Mar-2002 |
jdolecek | file mips64_subr.S was added on branch kqueue on 2002-03-16 15:58:41 +0000
|
| 1.3.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.100.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.3.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.96.3 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.3.96.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.3.96.1 | 16-Jan-2010 |
matt | Rework the exception code. All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy. This also allows us to branch to unused space space
since the relative locations will remain the same.
When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU. The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).
kill outofworld and just let trap panic, if it can. Allow for sb1_subr.S
or rmixl_subr.S in the future. Fix TLB read/write code.
|
| 1.1 | 26-May-2011 |
matt | branches: 1.1.2;
file mips64r2_rmixl_subr.S was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.2 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.1 | 15-Mar-2011 |
matt | branches: 1.1.2; 1.1.4; 1.1.8;
Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.1.8.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.8.1 | 15-Mar-2011 |
jruoho | file mips64r2_subr.S was added on branch jruoho-x86intr on 2011-06-06 09:06:07 +0000
|
| 1.1.4.3 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.1.4.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.4.1 | 15-Mar-2011 |
matt | file mips64r2_subr.S was added on branch matt-nb5-mips64 on 2011-04-29 08:26:28 +0000
|
| 1.1.2.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.2.1 | 15-Mar-2011 |
rmind | file mips64r2_subr.S was added on branch rmind-uvmplock on 2011-04-21 01:41:12 +0000
|
| 1.116 | 24-Apr-2025 |
riastradh | mips: Disable rdhwr emulation fast path on Octeon CPUs.
They are haunted.
PR kern/59064: jemalloc switch to 5.3 broke userland
PR kern/59236: Multiple segfaults in erlite3 boot
|
| 1.115 | 31-May-2022 |
andvar | branches: 1.115.10;
fix various typos in comments, documentation and messages.
|
| 1.114 | 13-Mar-2022 |
andvar | s/hander/handler/ and s/hader/header/ in comments and documentation.
|
| 1.113 | 16-Feb-2021 |
simonb | Working kernel profiling for n32/n64:
- Different MCOUNT and _KERN_MCOUNT macros for n32/n64.
- Don't profile mipsXX_lwp_trampoline().
- Allow a few new instructions in the stub fixups.
|
| 1.112 | 27-Sep-2020 |
mrg | branches: 1.112.2;
only look for cpunode.h on OCTEON. that's the only direct
caller of *_kern_nonmaskable_intr().
|
| 1.111 | 24-Sep-2020 |
mrg | fix build on non rmx or octeon systems.
|
| 1.110 | 24-Sep-2020 |
mrg | fix octeon !DDB builds.
|
| 1.109 | 23-Aug-2020 |
simonb | Use a 16kB USPACE (and larger kernel stack) for LP64 kernels. Invert
the logic for setting the USPACE size. Define a desired USPACE size
(16kB for LP64, 8kB otherwise) then divide by PAGE_SIZE to get UPAGES.
Fixes random segmap lossage, since the uarea usually sits immediately
above the segmap for a process. Thanks to mrg@, skrll@ and dholland@
for testing, debugging and general help tracking down this problem.
|
| 1.108 | 13-Jun-2020 |
simonb | Add a comment to say that instruction encoding 0x7c03e83b is "rdhwr $3,$29".
|
| 1.107 | 15-Feb-2020 |
skrll | Fix two comments
|
| 1.106 | 15-Feb-2020 |
skrll | typo in comment
|
| 1.105 | 25-Jun-2019 |
skrll | branches: 1.105.4;
s/cpulwp/curlwp/
|
| 1.104 | 20-Aug-2017 |
maya | branches: 1.104.4;
use meaningful name for errata hack, dedup
|
| 1.103 | 20-Aug-2017 |
maya | Don't need the errata workaround on user return
It's reported that the MMU will block such invalid reads in userland,
and it's only needed on entry.
|
| 1.102 | 08-Aug-2017 |
maya | Remove whitespace I just introduced
|
| 1.101 | 08-Aug-2017 |
maya | In working around loongson errata clear BTB and RAS, same as
other operating systems.
15 Errata: Issue of Out-of-order in loongson (translated)
In loongson 2F, because of the branch prediction, sometimes the CPU
may fetch the instructions from some unexpected area (for example I/O
space). It is an invalid operation. There are two ways for the CPU to
choose the branch target. The first one is predicting the branch
target according to the branch target history. The second one is
calculating the branch target by the ALU. There are most 8
instructions in the instruction window at the same time in loongson2f
(Remember the loongson 2f is superscalar, right?). Hence, the
branch target of an indirect branch(such as jr) could be got(may be
predicted by the branch target history) earlier and the instrctions of
the branch target could be prefetched even if there are branch
instructions before it. As a result, it is possible to fetch the
instructions from I/O region( say out-of the physical address range of
[0- 0x100000]) in kernel model because of the instruction prefetch of
the branch target.
There are some suggestions to prevent prefetching instructions from
the I/O region in kernel mode.
(1) When switching from user model to kernel model, you should flush
the branch target history such as BTB and RAS.
(2) Doing some tricks to the indirect branch target to make sure that
the indirect branch target can not be in the I/O region.
|
| 1.100 | 15-May-2017 |
skrll | branches: 1.100.2;
Fix off-by-one in tlb_record_asids
|
| 1.99 | 07-May-2017 |
skrll | Check the TLB entry ASID against base (a0) and limit (a1), and not
limit (a1) and random register value (a2)
While here shave an instruction off
|
| 1.98 | 07-May-2017 |
skrll | Save/restore pgMask in tlb_record_asids
|
| 1.97 | 07-May-2017 |
skrll | Call an ASID an ASID in comments
|
| 1.96 | 19-Nov-2016 |
skrll | branches: 1.96.6;
Optimise the interrupt vector a litte. From matt@
|
| 1.95 | 09-Nov-2016 |
maya | Move MFC0_HAZARD definition to asm.h instead of defining it twice
|
| 1.94 | 02-Oct-2016 |
maya | Simplify. LOONGSON2 and MIPSNNR2 not possible.
|
| 1.93 | 27-Aug-2016 |
skrll | Comment consistency. No functional change.
|
| 1.92 | 17-Aug-2016 |
skrll | loongson whack-a-mole.
- clear the top bits so the legal address check is correct.
- need to sign-extend the seg offset for kernel fault check
|
| 1.91 | 16-Aug-2016 |
skrll | Code consistency. No functional change.
|
| 1.90 | 15-Aug-2016 |
skrll | Fix copy&pasto shift value - hopefully this will fix LOONGSON/GDIUM
|
| 1.89 | 15-Aug-2016 |
skrll | Typo in comment
|
| 1.88 | 15-Aug-2016 |
skrll | Fix an instruction number in a comment
|
| 1.87 | 09-Aug-2016 |
skrll | Disable the USPACE cpu_switch_resume optimisation for 16KB PAGE_SIZE
Always check for existing TLB entry and remove it
Add a comment to say what's going on
|
| 1.86 | 09-Aug-2016 |
skrll | Fixup the #if to reflect when we can have non-direct mappable USPACE
|
| 1.85 | 09-Aug-2016 |
skrll | Correct a comment
|
| 1.84 | 08-Aug-2016 |
skrll | Use MFC0_HAZARD - no functional change
|
| 1.83 | 07-Aug-2016 |
skrll | Fix two bugs for tlb_invalidate_addr for (PGSHIFT & 1) == 0
- t0/t1 weren't being updated when both lo0/lo1 become invalid
- the global bit (G) needs to be preserved if the entry becomes invalid
The MIPSNN optimisation is disabled for now as it needs to be updated
appropriately
|
| 1.82 | 07-Aug-2016 |
skrll | Restore a MFC0_HAZARD lost in r1.68
|
| 1.81 | 07-Aug-2016 |
skrll | Fix incorrect register usage in #if (PGSHIFT & 1) == 0 code
|
| 1.80 | 05-Aug-2016 |
skrll | Fix register usage in the swap operation in tlb_update_addr.
This should help LOONGSON and hpcmips
|
| 1.79 | 05-Aug-2016 |
skrll | Fix a comment
|
| 1.78 | 05-Aug-2016 |
skrll | Whitespace (comment alignment)
|
| 1.77 | 05-Aug-2016 |
skrll | Typo in comments
|
| 1.76 | 30-Jul-2016 |
skrll | Correct comment
|
| 1.75 | 30-Jul-2016 |
skrll | Don't always include PARANOIA code
|
| 1.74 | 21-Jul-2016 |
skrll | Fix typo in comment
|
| 1.73 | 17-Jul-2016 |
skrll | Fixup some Loongson code after recent changes to pmap and PAGE_SIZE
|
| 1.72 | 17-Jul-2016 |
skrll | Update instruction numbers in comments
|
| 1.71 | 12-Jul-2016 |
matt | branches: 1.71.2;
Fix busted #if/endif
|
| 1.70 | 11-Jul-2016 |
skrll | Trailing whitespace
|
| 1.69 | 11-Jul-2016 |
matt | Remove extra #endif
|
| 1.68 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.67 | 04-Jul-2016 |
dholland | More of previous, so both kern_intr and user_intr have the comment.
|
| 1.66 | 04-Jul-2016 |
dholland | Improve comments after some discussion with Nick.
|
| 1.65 | 04-Jul-2016 |
dholland | typo in comment
|
| 1.64 | 04-Jul-2016 |
skrll | Fix code inversion in an #ifdef NOFPU case
|
| 1.63 | 02-Jul-2016 |
maya | Sprinkle MFC0_HAZARD everywhere.
ok dholland@
|
| 1.62 | 11-Jun-2015 |
matt | Don't include <machine/param.h> in .S files, get the needed values from assym.h
Define NBPG as UL to avoid integer over with NBXSEG on LP64 systems.
(.S files don't like numbers with UL appended to them).
|
| 1.61 | 09-Jun-2015 |
matt | Fix corruption of EntryHi (restored from wrong register).
|
| 1.60 | 07-Jun-2015 |
matt | Define COP0 register that use select value in <mips/cpuregs.h>
Use those new definitions
|
| 1.59 | 06-Jun-2015 |
matt | Add mipsX_nonmaskable_intr if DDB is defined.
Add missing */ at end of comment.
Use trap instructon on mipsNN in paranoia sections instead of endless loop.
|
| 1.58 | 04-Jun-2015 |
matt | Use ei/di on mipsNNr2 where possible.
|
| 1.57 | 26-May-2015 |
matt | Use COP0_SYNC after writing the exception PC.
|
| 1.56 | 19-Feb-2012 |
rmind | branches: 1.56.2; 1.56.16;
Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.55 | 03-Nov-2011 |
matt | branches: 1.55.4;
Fix brain fart.
|
| 1.54 | 27-Aug-2011 |
bouyer | branches: 1.54.2;
loongson2f support:
- Add some loongson2 definitions to cpuregs.h, from OpenBSD
- Make sure that the at register is useable before every jump register
instruction (exept when register is k0 or k1) because -mfix-loongson2f-btb
needs the at register for its workaround
- add code to mips_fixup.c to handle the instructions added by
-mfix-loongson2f-btb
- Add a ls2-specific tlb miss handler: it doesn't have separate handler
for the xtlbmiss exeption.
- Fixes for some #ifdef MIPS3_LOONGSON2 assembly code (using the wrong
register)
|
| 1.53 | 16-Aug-2011 |
matt | Only jump through t9/ra (or k0) to help avoid hitting
the Loongson2 jump problem.
|
| 1.52 | 02-Aug-2011 |
matt | Clear the BTB on user->kernel entry on Loongson2
|
| 1.51 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.50 | 10-Jul-2011 |
matt | More <machine/ include cleanup
|
| 1.49 | 28-May-2011 |
matt | Since we mostly use RAS (even if we have LL/SC), need to check for lock ras
addresses even on ll/sc capable CPUs.
|
| 1.48 | 07-May-2011 |
tsutsui | Tweak some comments in mipsN_tlb_record_asids() to reduce diffs.
|
| 1.47 | 07-May-2011 |
tsutsui | Remove trailing spaces and tabs.
|
| 1.46 | 29-Apr-2011 |
matt | Add/move some COP0_SYNC. increment tlb miss counter on mips3 and mips64r2
#ifdef MIPS3 / #endif more nops
|
| 1.45 | 14-Apr-2011 |
matt | Use .set arch=xlr to access RMI specific instructions.
|
| 1.44 | 14-Apr-2011 |
cliff | - add loocoresw slot for lsw_cpu_run
- fix comments for locoresw fields
|
| 1.43 | 06-Apr-2011 |
tsutsui | Sync with locore_mips1.S:
>> Load pc into ta0 instead of ra and then saving to ta0.
|
| 1.42 | 06-Apr-2011 |
matt | Rename kernel_tlb_miss to kern_tlb_miss (everything else kern_xxx)
Don't load k1 in delay slot to MIPS_CURLWP before branching to
kern_gen_exception since that doesn't use the lwp pointer in k1
(since it can the lwp in MIPS_CURLWP instead). Use nop instead.
Rework tlb_invalid_exception a bit so the result of the tlbp is
done before seeing if the tlb slot was even or odd. Makes the
routine slightly smaller.
|
| 1.41 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.40 | 23-Feb-2011 |
matt | Remove a few more lines that should have been removed in the previous commit
|
| 1.39 | 22-Feb-2011 |
matt | Always include mipsX_tlb_write_indexed.
|
| 1.38 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.37 | 22-Dec-2010 |
nisimura | branches: 1.37.2; 1.37.4;
- make sure cpu_switchto() not to touch MIPS_CURLWP register at newlwp
switchframe restoration stage.
- discard MIPS_CURLWP assignments exposed in cpu_lwp_fork() and
cpu_setfunc().
- use plain 'jal' instruction to call lwp_startup().
|
| 1.36 | 22-Jun-2010 |
simonb | Restore (and update) half of the TLB miss handler that went missing
during the mips64 merge. This gets my sbmips kernel booting to the
login prompt. This code could not possibly have been tested after
the merge.
Should fix PR port-mips/43431.
|
| 1.35 | 14-Dec-2009 |
matt | branches: 1.35.2; 1.35.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.34 | 10-Dec-2009 |
rmind | Rename L_ADDR to L_PCB and amend some comments accordingly.
|
| 1.33 | 24-Oct-2009 |
he | Fix the previous by terminating the comment.
|
| 1.32 | 21-Oct-2009 |
rmind | Remove uarea swap-out functionality:
- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.
Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).
Discussed on <tech-kern>, reviewed by <ad>.
|
| 1.31 | 09-Aug-2009 |
matt | If using 16KB pages and VMSWAP_UAREA isn't defined, then cpu_switch_resume
becomes a empty routine since the UAREA is now mapped via KSEG0 instead of
via TLB.
|
| 1.30 | 09-Aug-2009 |
matt | Use PGSHIFT + 1 instead hardcoding 13.
Don't set Page Mask to 0 when invalidating a TLB entry.
|
| 1.29 | 09-Aug-2009 |
matt | Change TLBMiss to use values based on NBPG and PGSHIFT instead of magic
numbers.
Use REG_S instead of sw in a few more places. Use _MFCO as well.
|
| 1.28 | 30-May-2009 |
martin | Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.27 | 24-Mar-2009 |
martin | Now that we compile the Atheros HAL from source we pass all the right
flags to the compiler so it obeys the same ABI as the rest of the kernel.
Remove the hacks used to work around the abi differences (using %s7 as
curlwp) intruduced for the binary hal.
|
| 1.26 | 17-Oct-2007 |
garbled | branches: 1.26.20; 1.26.28; 1.26.30; 1.26.34; 1.26.36;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.25 | 24-Aug-2007 |
ad | branches: 1.25.2;
The Atheros HAL on MIPS uses %s7 as a general purpose register, but the
rest of the kernel uses it to store the value of curlwp. Sam won't
recompile the HAL for us (fair enough), and we can't modify the HAL
to use another register because doing so could put us in breach of
the license (v. crappy). So, do a save/set/restore on %s7 in KernIntr()
and in the stubs that the HAL uses to call back into the kernel.
|
| 1.24 | 27-May-2007 |
tsutsui | branches: 1.24.2; 1.24.4; 1.24.8;
Pass correct args to lwp_startup() in lwp_trampoline().
Should fix "panic: TLB out of universe" on MIPS3 machines.
|
| 1.23 | 17-May-2007 |
yamt | merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.22 | 09-Feb-2007 |
ad | branches: 1.22.2; 1.22.6; 1.22.8; 1.22.14;
Merge newlock2 to head.
|
| 1.21 | 12-Dec-2006 |
simonb | Fix a grammatical nit near the previous typo fix.
Left the now somewhat bogus mips3_ prefixes in comments as is for now...
Thanks Pooka.
|
| 1.20 | 12-Dec-2006 |
simonb | Fix a tyop in a comment.
|
| 1.19 | 11-Dec-2005 |
christos | branches: 1.19.20; 1.19.22;
merge ktrace-lwp.
|
| 1.18 | 05-Nov-2005 |
tsutsui | Add MI mips3 wired map functions based on patch in port-mips/31915
from Garrett D'Amore of Tadpole Computer Inc.
Please refer discussion filed in the PR for details.
|
| 1.17 | 08-Sep-2005 |
tsutsui | This file no longer has "#if defined(MIPS3_4100)" so remove
"XXX MIPS3_4100 is still special" comment.
(though some other files still have "special" code which should go away)
|
| 1.16 | 30-Apr-2005 |
chs | branches: 1.16.2;
change *_TLBUpdate for the MIPS3-style two-entry TLBs to only update existing
entries and not create new ones. the problem with creating an entry is that
we only have the data for one side of the entry, so the other side could be
out of sync with the software PTEs, which the fault handlers are not prepared
to deal with. fixes PR 14801.
|
| 1.15 | 26-Feb-2005 |
simonb | branches: 1.15.2;
Add some nops in branch delay slots to stop a warning because we
previously had a macro in those slots. No side effects this time,
so we got lucky.
Pointed out by Izumi Tsutsui on port-mips.
|
| 1.14 | 01-Jan-2005 |
simonb | branches: 1.14.2; 1.14.4;
Spell "available" correctly.
|
| 1.13 | 07-Aug-2003 |
agc | branches: 1.13.6;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.12 | 08-Apr-2003 |
thorpej | branches: 1.12.2;
Use PAGE_SIZE rather than NBPG.
|
| 1.11 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.10 | 12-Nov-2002 |
nisimura | Remove o32 stack layout exposure form cpu_fork().
Tested on R4000 and R3000.
|
| 1.9 | 08-Nov-2002 |
simonb | Whitespace nit.
|
| 1.8 | 07-Nov-2002 |
cgd | don't under COP0_SYNC. (approved by simonb.)
|
| 1.7 | 04-Nov-2002 |
thorpej | A few more t4-t7 -> ta0-ta3 that I missed before.
|
| 1.6 | 04-Nov-2002 |
thorpej | t4-t7 -> ta0-ta3
|
| 1.5 | 24-Jun-2002 |
simonb | White space nits: space after a comma.
|
| 1.4 | 04-Jun-2002 |
thorpej | Make this work with an ISO C preprocessor.
|
| 1.3 | 01-Jun-2002 |
simonb | Split USE_64BIT_FUNCTIONS into USE_64BIT_INSTRUCTIONS and
USE_64BIT_CP0_FUNCTIONS.
Add 64-bit pagezero function.
|
| 1.2 | 11-Mar-2002 |
uch | branches: 1.2.2; 1.2.6; 1.2.8;
make this compile and work with MIPS3_5900.
|
| 1.1 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Remove all mmu-related code that may use 32 register on mips32-style
implementatios and move them to mipsX_subr.S - which is then included
from mips{3,32,64,5900}_subr.S with various control defines enabled.
- Remove local cache instruction flags
- Add badaddr64 (from Broadcom Corp).
|
| 1.2.8.2 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.2.8.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.2.6.10 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.2.6.9 | 24-Nov-2002 |
wdk | P_MD_ASTPENDING checks were passed curlwp instead of curlwp->l_proc
|
| 1.2.6.8 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.6.7 | 27-Aug-2002 |
simonb | md_syscall is in the proc, not the lwp; fixes syscalls on non-mips1.
|
| 1.2.6.6 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.2.6.5 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.2.6.4 | 21-Jun-2002 |
gmcgarry | LWPify (compile-tested only)
|
| 1.2.6.3 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.2.6.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.2.6.1 | 11-Mar-2002 |
nathanw | file mipsX_subr.S was added on branch nathanw_sa on 2002-04-01 07:41:09 +0000
|
| 1.2.2.4 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.2.2.3 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.2.2.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.2.2.1 | 11-Mar-2002 |
jdolecek | file mipsX_subr.S was added on branch kqueue on 2002-03-16 15:58:41 +0000
|
| 1.12.2.6 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.12.2.5 | 04-Mar-2005 |
skrll | Sync with HEAD.
Hi Perry!
|
| 1.12.2.4 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.12.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.12.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.12.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.13.6.2 | 13-Sep-2005 |
riz | Pull up following revision(s) (requested by tsutsui in ticket #5829):
sys/arch/mips/mips/mipsX_subr.S: revision 1.17
This file no longer has "#if defined(MIPS3_4100)" so remove
"XXX MIPS3_4100 is still special" comment.
(though some other files still have "special" code which should go away)
|
| 1.13.6.1 | 16-May-2005 |
riz | Pull up revision 1.16 (requested by chs in ticket #1508):
change *_TLBUpdate for the MIPS3-style two-entry TLBs to only update existing
entries and not create new ones. the problem with creating an entry is that
we only have the data for one side of the entry, so the other side could be
out of sync with the software PTEs, which the fault handlers are not prepared
to deal with. fixes PR 14801.
|
| 1.14.4.1 | 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.14.2.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.15.2.2 | 11-Sep-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #758):
sys/arch/mips/mips/mipsX_subr.S: revision 1.17
This file no longer has "#if defined(MIPS3_4100)" so remove
"XXX MIPS3_4100 is still special" comment.
(though some other files still have "special" code which should go away)
|
| 1.15.2.1 | 10-May-2005 |
tron | Pull up revision 1.16 (requested by chs in ticket #269):
change *_TLBUpdate for the MIPS3-style two-entry TLBs to only update existing
entries and not create new ones. the problem with creating an entry is that
we only have the data for one side of the entry, so the other side could be
out of sync with the software PTEs, which the fault handlers are not prepared
to deal with. fixes PR 14801.
|
| 1.16.2.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.16.2.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.16.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.16.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.19.22.1 | 18-Dec-2006 |
yamt | sync with head.
|
| 1.19.20.5 | 02-Feb-2007 |
ad | The TLB miss handler doesn't need to worry about RAS, oops.
|
| 1.19.20.4 | 27-Jan-2007 |
ad | Make mips systems work.
|
| 1.19.20.3 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.19.20.2 | 11-Jan-2007 |
ad | Checkpoint work in progress.
|
| 1.19.20.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.22.14.3 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.22.14.2 | 26-Jun-2007 |
garbled | Sync with HEAD.
|
| 1.22.14.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.22.8.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.22.6.3 | 09-Oct-2007 |
ad | Sync with head.
|
| 1.22.6.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.22.6.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.22.2.3 | 18-Apr-2007 |
ad | Fix a typo.
|
| 1.22.2.2 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.22.2.1 | 21-Mar-2007 |
ad | Initial changes for MIPS. Not yet working under gxemul.
|
| 1.24.8.1 | 03-Sep-2007 |
jmcneill | Sync with HEAD.
|
| 1.24.4.1 | 03-Sep-2007 |
skrll | Sync with HEAD.
|
| 1.24.2.2 | 20-Mar-2009 |
uebayasi | Fix wrong ADDR_L in some places.
|
| 1.24.2.1 | 07-Aug-2007 |
matt | Sync with HEAD.
|
| 1.25.2.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.26.36.1 | 09-Jun-2009 |
snj | branches: 1.26.36.1.2;
Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.26.36.1.2.58 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.26.36.1.2.57 | 09-Jul-2012 |
matt | Add code to panic if/when a kthread return to lwp_startup.
Add a workaround for the XLP which requires a EHB at the start of the interrupt
vector.
|
| 1.26.36.1.2.56 | 27-Feb-2012 |
matt | Count all traps types.
|
| 1.26.36.1.2.55 | 09-Feb-2012 |
matt | Update mips_fixup.c to version from -HEAD.
Move cpu_switchto to locore jumpvec and create a stub for it.
|
| 1.26.36.1.2.54 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.26.36.1.2.53 | 03-Jan-2012 |
matt | If MIPS64R2_XLP, just let MIPSX(exception) do the work on cache exceptions.
(this might be generalized to all mipsNN with more testing).
|
| 1.26.36.1.2.52 | 23-Dec-2011 |
matt | Rework the tlb routines to more consistend on register usage.
Always try to keep TLB_INDEX invalid (to cause unintended tlbwi to fail).
|
| 1.26.36.1.2.51 | 13-Dec-2011 |
matt | Make MIPS64R2_RMIXL use .set arch=xlp
|
| 1.26.36.1.2.50 | 03-Dec-2011 |
matt | Rework things a bit for the XLR/XLS/XLP TLB. Before dealing with the TLB when
MP on the XL?, disable interrupts and take out a lock to prevent concurrent
updates to the TLB. In the TLB miss and invalid exception handlers, if the
lock is already owned by another CPU, simply return from the exception and
let it continue or restart as appropriate. This prevents concurrent TLB
exceptions in multiple threads from possibly updating the TLB multiple times
for a single address.
|
| 1.26.36.1.2.49 | 02-Dec-2011 |
matt | Add support for 8KB pages.
|
| 1.26.36.1.2.48 | 01-Dec-2011 |
matt | When trying to map the stack of the current lwp into TLB, if the stack was
mapped via KSEGX skip the load.
|
| 1.26.36.1.2.47 | 03-Nov-2011 |
matt | Fix brain fart
|
| 1.26.36.1.2.46 | 01-Jul-2011 |
matt | Some RMI TLB locking fixes.
|
| 1.26.36.1.2.45 | 06-Jun-2011 |
matt | Make sure to free the TLB when exiting from tlb_invalid_exception
|
| 1.26.36.1.2.44 | 28-May-2011 |
matt | Since we mostly use RAS (even if we have LL/SC), need to check for lock ras
addresses even on ll/sc capable CPUs.
|
| 1.26.36.1.2.43 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.26.36.1.2.42 | 26-May-2011 |
matt | Fix cut & paste error in previous commit.
|
| 1.26.36.1.2.41 | 26-May-2011 |
matt | Use some mipsNNr2 instructions to extract the non-wired bits from a pte.
(Saves on instruction per use).
|
| 1.26.36.1.2.40 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.26.36.1.2.39 | 29-Dec-2010 |
matt | Add wbflush to jumpvec while leaving it in locoresw. This allows to
overwrite wbflush in locoresw but still be able to call it via jumpvec.
|
| 1.26.36.1.2.38 | 29-Dec-2010 |
matt | Janitorial work.
Move emulation prototypes here and get rid of StudLyCaps.
Remove kludgery for lwp/setfunc trampoline and just grab them of the damn
structure.
Make mips_locore_jumpvec contain the routines that don't get reassigned
and move wbflush to mips_locoresw since it does get overridden.
|
| 1.26.36.1.2.37 | 24-Dec-2010 |
matt | Bring locore_mips1.S into the new world order. You can diff locore_mips1.S
against mipsX_subr.S and have reasonable output. A lot of comments have
been changed to be common between the two. The ordering of vectors/functions
have also changed to improve diff output.
|
| 1.26.36.1.2.36 | 22-Dec-2010 |
matt | Just call splcheck directly. The stub fixer will make it right.
|
| 1.26.36.1.2.35 | 20-Aug-2010 |
matt | Save and restore TLB_HI in cpu_switch_resume
|
| 1.26.36.1.2.34 | 19-Aug-2010 |
matt | in the xtlb miss handler, make sure the user address is below
VM_MAXUSER_ADDRESS
|
| 1.26.36.1.2.33 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.26.36.1.2.32 | 10-Jun-2010 |
cliff | in MIPSX(kern_intr), before "Call the interrupt handler",
store s1 to TF_BASE+TF_REG_SR(sp) to save STATUS there.
no big deal, it seems to be unused; at least now it is unused correctly.
|
| 1.26.36.1.2.31 | 28-Apr-2010 |
matt | Now that the Atheros HAL is gone, remove the hacks in place for it.
(also fixes a stupid bug).
|
| 1.26.36.1.2.30 | 01-Mar-2010 |
matt | Add secondary processor spinup support (cpu_trampoline is in locore_mips3.S).
Nuke lse_boot_secondary_processors (not needed).
Move cpu_info_store to cpu_subr.C
|
| 1.26.36.1.2.29 | 28-Feb-2010 |
matt | Change from indirect calls to direct calls to spl* routines.
|
| 1.26.36.1.2.28 | 27-Feb-2010 |
snj | Fix some typos in comments.
|
| 1.26.36.1.2.27 | 27-Feb-2010 |
matt | Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
|
| 1.26.36.1.2.26 | 25-Feb-2010 |
matt | Add mipsXX_tlb_record_asids - records what ASIDs have valid TLB entries in
the TLB.
Move some mips3 specific routines from locore.S to locore_mips3.S
|
| 1.26.36.1.2.25 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.26.36.1.2.24 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.26.36.1.2.23 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.26.36.1.2.22 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.26.36.1.2.21 | 30-Jan-2010 |
matt | Change MIPS_CURLWP from s7 to t8. In a MALTA64 kernel, s6 is used 9155 times
which means the compiler could really use s7 is was free to do so. The least
used temporary was t8 (288 times). Once the kernel was switched to use t8 for
MIPS_CURLWP, s7 was used 7524 times.
Additionally a MALTA32 kernel shrunk by 6205 instructions (24820 bytes) or
about 1% of its text size.
[For some reason, pre-change t1 was never used and post change t2 was never
used. Not sure why.]
|
| 1.26.36.1.2.20 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.26.36.1.2.19 | 17-Jan-2010 |
cliff | fix print format for EPC in cache error format string
|
| 1.26.36.1.2.18 | 16-Jan-2010 |
matt | Rework the exception code. All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy. This also allows us to branch to unused space space
since the relative locations will remain the same.
When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU. The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).
kill outofworld and just let trap panic, if it can. Allow for sb1_subr.S
or rmixl_subr.S in the future. Fix TLB read/write code.
|
| 1.26.36.1.2.17 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.26.36.1.2.16 | 31-Dec-2009 |
matt | Indicate that some RMI mfcr/mtcr can't be used in O32
|
| 1.26.36.1.2.15 | 04-Dec-2009 |
matt | Be consistent in use of _SLL/_SRL and WIRED_SHIFT
|
| 1.26.36.1.2.14 | 04-Dec-2009 |
matt | Repeat after me: Hardwired constants are bad.
|
| 1.26.36.1.2.13 | 22-Nov-2009 |
cyber | Correct register renaming oversight.
This makes sbmips GENERIC run again.
|
| 1.26.36.1.2.12 | 14-Nov-2009 |
matt | Fix comment.
|
| 1.26.36.1.2.11 | 13-Nov-2009 |
cliff | - KSEG and XK labels, useful for address representation in ddb,
moved here from RMI specific code
- replace .word XXX with proper mnemonics for mfcr ops in cacheException
now that binutils knows these ops
|
| 1.26.36.1.2.10 | 09-Nov-2009 |
cliff | - in cacheException, pass L1D_CACHE_ERROR_LOG and L1D_CACHE_INTERRUPT,
to the panic call
>>> TBD make this runtime, not ifdef switched per PRID
|
| 1.26.36.1.2.9 | 13-Sep-2009 |
cliff | CP0 ECC and CACHE_ERR "not implemented" on RMI XLS, so avoid accessing them
|
| 1.26.36.1.2.8 | 08-Sep-2009 |
matt | Teach cpu_switch_resume to deal with upages in XKSEG/KSEG0/XKSEG.
(don't use s0, use t0)
|
| 1.26.36.1.2.7 | 07-Sep-2009 |
matt | Make sure KX is set on LP64 kernels. Use VM_MIN_KERNEL_ADDRESS instead of
MIPS_KSEG2_START. Deal with VM_MIN_KERNEL_ADDRESS being below KSEG0 in
addition to being above it.
|
| 1.26.36.1.2.6 | 05-Sep-2009 |
matt | More LP64 cleanup.
|
| 1.26.36.1.2.5 | 02-Sep-2009 |
matt | If N32/N64, in SystemCall save and restore A4-A7 into/from the frame.
|
| 1.26.36.1.2.4 | 02-Sep-2009 |
matt | t3 needs to be saved in the frame so that when a lwp is forked, it can be
restored from the frame instead of the saved regsters
|
| 1.26.36.1.2.3 | 24-Aug-2009 |
matt | Don't bother saving/restore t0-t3/ta0-ta3 in the trapframe. Instead use
the just saved s0-s7 to hold them. any function we call will preserve
them and we just do moves on the way back.
|
| 1.26.36.1.2.2 | 24-Aug-2009 |
matt | SyscallCall exception didn't save the temporaries which libc no longer likes.
So now it saves them.
|
| 1.26.36.1.2.1 | 21-Aug-2009 |
matt | Make ABI agnostic. Move locoresw to .rdata
|
| 1.26.34.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.26.30.1 | 09-Jun-2009 |
snj | Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.26.28.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.26.20.5 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.26.20.4 | 11-Mar-2010 |
yamt | sync with head
|
| 1.26.20.3 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.26.20.2 | 20-Jun-2009 |
yamt | sync with head
|
| 1.26.20.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.35.4.4 | 31-May-2011 |
rmind | sync with head
|
| 1.35.4.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.35.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.35.4.1 | 03-Jul-2010 |
rmind | sync with head
|
| 1.35.2.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.37.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.37.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.54.2.2 | 17-Apr-2012 |
yamt | sync with head
|
| 1.54.2.1 | 10-Nov-2011 |
yamt | sync with head
|
| 1.55.4.1 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.56.16.6 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.56.16.5 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.56.16.4 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.56.16.3 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.56.16.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.56.16.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.56.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.71.2.4 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.71.2.3 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.71.2.2 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.71.2.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.96.6.2 | 19-May-2017 |
pgoyette | Resolve conflicts from previous merge (all resulting from $NetBSD
keywork expansion)
|
| 1.96.6.1 | 11-May-2017 |
pgoyette | Sync with HEAD
|
| 1.100.2.1 | 29-Aug-2017 |
martin | Pull up following revision(s) (requested by maya in ticket #246):
sys/arch/evbmips/conf/std.loongson: revision 1.2
usr.sbin/sysinst/arch/evbmips/md.h: revision 1.2
sys/arch/mips/mips/mipsX_subr.S: revision 1.101
sys/arch/mips/mips/mipsX_subr.S: revision 1.102
sys/arch/mips/mips/mipsX_subr.S: revision 1.103
sys/arch/mips/mips/mipsX_subr.S: revision 1.104
In working around loongson errata clear BTB and RAS, same as
other operating systems.
15 Errata: Issue of Out-of-order in loongson (translated)
In loongson 2F, because of the branch prediction, sometimes the CPU
may fetch the instructions from some unexpected area (for example I/O
space). It is an invalid operation. There are two ways for the CPU to
choose the branch target. The first one is predicting the branch
target according to the branch target history. The second one is
calculating the branch target by the ALU. There are most 8
instructions in the instruction window at the same time in loongson2f
(Remember the loongson 2f is superscalar, right?). Hence, the
branch target of an indirect branch(such as jr) could be got(may be
predicted by the branch target history) earlier and the instrctions of
the branch target could be prefetched even if there are branch
instructions before it. As a result, it is possible to fetch the
instructions from I/O region( say out-of the physical address range of
[0- 0x100000]) in kernel model because of the instruction prefetch of
the branch target.
There are some suggestions to prevent prefetching instructions from
the I/O region in kernel mode.
(1) When switching from user model to kernel model, you should flush
the branch target history such as BTB and RAS.
(2) Doing some tricks to the indirect branch target to make sure that
the indirect branch target can not be in the I/O region.
Remove whitespace I just introduced
Build the loongson kernels with all the binutils loongson2f errata workarounds
From Zhang Fuxin via <a rel="nofollow" href="https://sourceware.org/ml/binutils/2009-11/msg00387.html">https://sourceware.org/ml/binutils/2009-11/msg00387.html</a>
- The NOP issue
"The nature of the erratum is deeply related to the microarchitecture of
Loongson-2. It uses roughly a 4-way superscalar dynamically scheduled core,
instructions are excuted as much as possible in parallel with technics like
branch prediction etc. We use a 8-entry internal branch prediction queue to
keep track of each predicted branches, if some branches are proved to be
wrongly predicted, all the instructions following it will be cancelled,together
with the resources used by them, including the registers used for renaming, and
the queue entry will be freeed. There is a bug that might cause a hang when the
queue is full(some resources might been leaked due to conflict branch entries),
the workaround is to reduce the possiblity of branch queue full by using
renaming registers(they are also limited, can prevent too many simutaneos
branches). In theory this is still not enough to fully eliminate possible
hangs, but the possiblity is extremely low now and hard to be hit in real
code."
- The JUMP instructions issue
"The Loongson-2 series processors have quite complex micro-architecture, it will
try to execute instructions from the predicated branch of coming instruction
stream before they are confirmed to be run, if the predication of branch
direction is proved wrong later, the instructions will be cancelled, but if the
instructions is a read from memory, the read action might not be cancelled(but
the changes to register will) to enable some prefetch. This will lead to some
problems when compining with some chipsets. E.g. the AMD CS5536 used in
Yeeloong/Fuloong will hang if it gets an address in the physical address range
of 0x100000-0x200000(might be more other ranges). Speculative reads can perform
read at any address in theory(due to wrong prediction of branch directions and
the use of branch target buffer), thus in very few occasions they might cause a
hard lock of the machine.
To prevent this, we need to prevent some addresses from entering branch
target buffers. A way to do this is that to modify all jump targets, e.g.,
calulations of t9
...
jalr t9 =>
calculations of t9
or t9, t9, 0x80000000; // to make sure t9 is in kseg0
jalr t9
Of course, we have to consider 64/32bit, and modules addresses etc.
This only need to be performed on kernel code, because only there we can have
accesses not translated/limited by TLB. For user code, it is impossible to
generate accesses to unwanted physical address. So it is safe.
Also, to prevent addresses generated by user mode code to be used by the
kernel, we add a few empty jumps to flush the BTB upon entrance to kernel."
evbmips can "boot root FFSv2"
It typically uses a non-NetBSD bootloader (PMON, u-boot...) and those
don't differentiate from v1 from v2 - both are unsupported and it requires
a separate boot partition.
Don't need the errata workaround on user return
It's reported that the MMU will block such invalid reads in userland,
and it's only needed on entry.
use meaningful name for errata hack, dedup
|
| 1.104.4.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.104.4.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.105.4.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.112.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.115.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.6 | 07-May-2017 |
skrll | opt_multiprocessor.h police
|
| 1.5 | 16-Mar-2017 |
chs | branches: 1.5.4;
allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.
|
| 1.4 | 16-May-2014 |
rmind | branches: 1.4.4; 1.4.8; 1.4.12;
pcu(9):
- Remove PCU_KERNEL (hi matt!) and significantly simplify the code.
This experimental feature was tried on ARM did not meet the expectations.
It may be revived one day, but it should be done in a much simpler way.
- Add a message structure for xcall function, pass the LWP ower and thus
optimise a race condition: if LWP is discarding its state on a remote CPU,
but another LWP already did it - do not cause an unecessary re-faulting.
- Reduce the variety of flags for PCU operations (only PCU_VALID and
PCU_REENABLE are used now), pass them only to the pcu_state_load().
- Rename pcu_used_p() to pcu_valid_p(); hopefully it is less confusing.
- pcu_save_all_on_cpu: SPL ought to be used here.
- Update and improve the pcu(9) man page; it needs wizd(8) though.
|
| 1.3 | 22-Aug-2013 |
drochner | branches: 1.3.2;
-extend the pcu(9) API by a function which saves all context on the
current CPU, and use it if a CPU is taken offline
-add a bool argument to pcu_discard which tells whether the internal
"LWP has used the coprocessor" flag should be set or reset. The flag
is reported by pcu_used_p(). If set, future accesses should use the
state stored in the PCB. If reset, it should be reset to default.
The former case is useful for setmcontext().
With that, it should not be necessary anymore to manage the "FPU used"
state by an additional MD variable.
approved by matt
|
| 1.2 | 26-Dec-2012 |
matt | branches: 1.2.2;
Update to use new pcu_state_{load,save,release} definitions
|
| 1.1 | 16-Aug-2011 |
matt | branches: 1.1.2; 1.1.12;
Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.1.12.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.12.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.12.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.1.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.2.1 | 23-Jan-2013 |
yamt | sync with head
|
| 1.2.2.2 | 18-May-2014 |
rmind | sync with head
|
| 1.2.2.1 | 28-Aug-2013 |
rmind | sync with head
|
| 1.3.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.4.12.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.4.8.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.4.4.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.5.4.1 | 11-May-2017 |
pgoyette | Sync with HEAD
|
| 1.32 | 03-May-2025 |
riastradh | mips: Include opt_cputype.h before any of the flags it defines.
PR port-evbmips/59385: PGSHIFT is inconsistently defined on MIPS
|
| 1.31 | 16-Nov-2021 |
simonb | branches: 1.31.10;
Use the register define MIPS_HWR_ULR instead of a magic number.
|
| 1.30 | 29-May-2021 |
simonb | Update the FPU register names and bit definitions to something somewhat
modern (MIPS32/MIPS64) and convert to __BIT/__BITS.
|
| 1.29 | 27-May-2021 |
simonb | Rename the unhelpfully named mips_emul_lwc0() and mips_emul_swc0() to
mips_emul_ll() and mips_emul_sc(); make these static to mips_emul.c.
|
| 1.28 | 27-May-2021 |
simonb | Print the CP0 status register too in the debug trap code.
|
| 1.27 | 06-Apr-2019 |
thorpej | branches: 1.27.16; 1.27.18;
Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.26 | 01-Nov-2012 |
skrll | branches: 1.26.38;
We need to jump out of two switches to emulate rdhwr rt,$29 correctly.
Only one would result in segv.
Fixes pthread apps on mips1. Tested using gxemul.
|
| 1.25 | 18-Aug-2011 |
matt | branches: 1.25.2; 1.25.8; 1.25.12;
Change bcond/BCOND to regimm/REGIMM to better match the MIPS nomenclature.
|
| 1.24 | 17-Aug-2011 |
matt | emulate the special3 opcode LX (lwx, ldx, lhx, lbux) instructions.
|
| 1.23 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.22 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.21 | 01-Feb-2011 |
matt | Cast to intptr_t before changing size of type.
|
| 1.20 | 14-Jan-2011 |
rmind | branches: 1.20.2; 1.20.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.19 | 07-Jul-2010 |
chs | implement emulation of the "rdhwr" instruction for mips TLS.
|
| 1.18 | 27-Jun-2010 |
simonb | Use the address of the instruction instead of the contents of the
instruction to calculate a relative branch target address from that
instruction.
Not sure what the intention of this change was, or if it could possibly
have been tested.
Fixes awk on my dbau1500.
|
| 1.17 | 14-Dec-2009 |
matt | branches: 1.17.2; 1.17.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.16 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.15 | 14-Mar-2009 |
dsl | Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)
|
| 1.14 | 26-Aug-2006 |
matt | branches: 1.14.60; 1.14.68; 1.14.74; 1.14.78;
Use vaddr_t for virtual addresses, not u_int32_t.
|
| 1.13 | 24-Dec-2005 |
perry | branches: 1.13.4; 1.13.8;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.12 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.11 | 26-Apr-2004 |
simonb | branches: 1.11.12;
Print the address of a problem instruction when we panic.
|
| 1.10 | 26-Mar-2004 |
drochner | all ports define __HAVE_SIGINFO now, so remove the CPP conditionals
|
| 1.9 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.8 | 29-Oct-2003 |
christos | first pass siginfo glue for mips
|
| 1.7 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.6 | 29-Jun-2003 |
fvdl | branches: 1.6.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.5 | 29-Jun-2003 |
simonb | Show current PC in an panic message.
|
| 1.4 | 29-Jun-2003 |
simonb | Don't use "extern" with functions.
|
| 1.3 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.2 | 21-Jul-2002 |
gmcgarry | branches: 1.2.2; 1.2.4;
Implement true LL/SC emulation. Mostly from Jason Thorpe in PR17548.
|
| 1.1 | 06-Jul-2002 |
gmcgarry | branches: 1.1.2;
Overhaul the emulation facility. We do this by:
- accumulating all emulation code (including floating-point) in one place
- steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts
and traps from *real* FPUs
- introducing MachEmulateInst() as a common dispatch point for all
emulated instructions
- cleaning up emulation dispatch in trap()
Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1.
Tested on r3k with and without SOFTFLOAT enabled.
|
| 1.1.2.3 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.2.2 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.1.2.1 | 06-Jul-2002 |
gehenna | file mips_emul.c was added on branch gehenna-devsw on 2002-07-16 08:50:50 +0000
|
| 1.2.4.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.2.4.1 | 21-Jul-2002 |
jdolecek | file mips_emul.c was added on branch kqueue on 2002-09-06 08:37:37 +0000
|
| 1.2.2.4 | 02-Dec-2002 |
wdk | Tidy up for Scheduler Activations:
- Change curproc -> curlwp
- Display LWP id along with PID for kernel generated messages
|
| 1.2.2.3 | 02-Aug-2002 |
gmcgarry | LWPify.
|
| 1.2.2.2 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.2.2.1 | 21-Jul-2002 |
nathanw | file mips_emul.c was added on branch nathanw_sa on 2002-08-01 02:42:34 +0000
|
| 1.6.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.6.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.6.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.11.12.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.11.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.13.8.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.13.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.14.78.17 | 29-Feb-2012 |
matt | Fix $NetBSD$
|
| 1.14.78.16 | 29-Feb-2012 |
matt | Improve conditions for send_sigsegv.
|
| 1.14.78.15 | 27-Feb-2012 |
matt | Add option NOMIPSEMUL so disable (almost) all emulation.
|
| 1.14.78.14 | 13-Feb-2012 |
matt | Fix emulation to not panic when it encounters something it doesn't like.
(so running crashme won't crash the system).
Centralize the trapsignal processing so we can print out the trap info if
so desired.
Add a machdep.printfataltraps sysctl knob.
|
| 1.14.78.13 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.14.78.12 | 29-Dec-2010 |
matt | Move from StudlyCaps to more normal names.
|
| 1.14.78.11 | 01-Jun-2010 |
matt | From Manuel Bouyer:
In the matt-nb5-mips64 branch, in mips_emul.c:MachEmulateBranch(), the
BRANCHTARGET macro was changed to take the value instead of a pointer to
instruction. But the effect of this change is that now, the instruction's word
value is used to compute the new PC, instead of the instruction's address. Of
course this can't give good results, and in my case this gave an unaligned PC.
|
| 1.14.78.10 | 15-May-2010 |
matt | Add kernel support for MIPS TLS. Use rdhwr rt, $29 as defined by the MIPS
TLS spec so that Linux MIPS binaries will work. Use sysarch(MIPS_TINFOSET, v)
to set the pointer.
|
| 1.14.78.9 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.14.78.8 | 29-Jan-2010 |
matt | Change mips kernel options SOFTFLOAT to FPEMUL. Allow a kernel to have
no FP emulation code. Fix insufficient SYMTAB_SPACE. When a kernel without
an FPU and with FPEMUL code, the application will trap with a SIGILL/ILL_ILLOPC
signal, not SIGSEGV/SEGV_MAPERR.
|
| 1.14.78.7 | 22-Jan-2010 |
matt | Use ufetch/ustore for all user access
|
| 1.14.78.6 | 22-Jan-2010 |
matt | in MachEmulateBranch, print useful information on panics
|
| 1.14.78.5 | 14-Nov-2009 |
matt | Switch from fu*/su* to ufetch_*/ustore_*. This make netbsd32 compat root
on a LP64 BE kernel.
|
| 1.14.78.4 | 24-Aug-2009 |
uebayasi | No variable name in function declaration. ANSI'fy.
|
| 1.14.78.3 | 24-Aug-2009 |
uebayasi | Dereferencing a given PC address (to a branch instruction) to know the target
address doesn't work if the address is in user space. Use the fetched branch
instruction instead.
Reviewed By: matt
|
| 1.14.78.2 | 21-Aug-2009 |
matt | Add sd/sdl/sdr ld/ldr/ldl emulation.
Use intptr_t for addresses.
|
| 1.14.78.1 | 20-Aug-2009 |
uebayasi | Cast register_t to intptr_t before casting to (void *) because
sizeof(register_t) == 64 and sizeof(void *) == 32 in N32 ABI.
|
| 1.14.74.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.14.68.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.14.60.3 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.14.60.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.14.60.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.17.4.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.17.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.17.4.1 | 03-Jul-2010 |
rmind | sync with head
|
| 1.17.2.1 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.20.4.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.20.4.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.20.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.25.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.25.8.1 | 18-Nov-2012 |
msaitoh | Pull up following revision(s) (requested by skrll in ticket #661):
sys/arch/mips/mips/mips_emul.c: revision 1.26
We need to jump out of two switches to emulate rdhwr rt,$29 correctly.
Only one would result in segv.
Fixes pthread apps on mips1. Tested using gxemul.
|
| 1.25.2.1 | 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.26.38.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.27.18.1 | 31-May-2021 |
cjep | sync with head
|
| 1.27.16.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.31.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.24 | 03-May-2025 |
riastradh | mips: Include opt_cputype.h before any of the flags it defines.
PR port-evbmips/59385: PGSHIFT is inconsistently defined on MIPS
|
| 1.23 | 02-Jan-2022 |
christos | branches: 1.23.10;
fix KASSERT issue
|
| 1.22 | 02-Oct-2021 |
skrll | Pass the pmap in tlb_set_asid for the benefit of aarch64.
|
| 1.21 | 16-Feb-2021 |
simonb | Working kernel profiling for n32/n64:
- Different MCOUNT and _KERN_MCOUNT macros for n32/n64.
- Don't profile mipsXX_lwp_trampoline().
- Allow a few new instructions in the stub fixups.
|
| 1.20 | 06-Apr-2019 |
thorpej | branches: 1.20.12;
Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.19 | 08-Oct-2016 |
skrll | branches: 1.19.16;
Sign extend VA for cache operations.
OK matt@
|
| 1.18 | 18-Aug-2016 |
skrll | Trailing whitespace
|
| 1.17 | 18-Aug-2016 |
skrll | Make the fixup code play nicely with the current exception handlers.
From matt@
|
| 1.16 | 11-Jul-2016 |
skrll | branches: 1.16.2;
Fix a comment
|
| 1.15 | 11-Jul-2016 |
skrll | Trailing whitespace
|
| 1.14 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.13 | 09-Jun-2015 |
matt | Fix mips_fixup_zero_relative to have a third argument (ignored).
When reading COP0 EBASE, verify that the fixed bits have the right value.
|
| 1.12 | 02-Jun-2015 |
matt | Deal with cpu_info_store that spans a 32KB boundary.
|
| 1.11 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.10 | 09-Nov-2011 |
matt | branches: 1.10.10; 1.10.28;
Make sure to invalidate correct size.
|
| 1.9 | 27-Aug-2011 |
bouyer | branches: 1.9.2;
loongson2f support:
- Add some loongson2 definitions to cpuregs.h, from OpenBSD
- Make sure that the at register is useable before every jump register
instruction (exept when register is k0 or k1) because -mfix-loongson2f-btb
needs the at register for its workaround
- add code to mips_fixup.c to handle the instructions added by
-mfix-loongson2f-btb
- Add a ls2-specific tlb miss handler: it doesn't have separate handler
for the xtlbmiss exeption.
- Fixes for some #ifdef MIPS3_LOONGSON2 assembly code (using the wrong
register)
|
| 1.8 | 24-Aug-2011 |
matt | On N32 kernels, cast offset to (intptr_t) to shrink it back to 32-bits.
|
| 1.7 | 17-Aug-2011 |
matt | Redo mips_fixup so that it can handle indirect loads and deal with loongson2
extra instructions.
|
| 1.6 | 29-Apr-2011 |
matt | Remove redundant opt_multiprocessor.h include
|
| 1.5 | 18-Mar-2011 |
tsutsui | Make this compile with options DEBUG and MIPS1 only config.
|
| 1.4 | 22-Feb-2011 |
matt | Always have a stub for tlb_write_indexed
|
| 1.3 | 20-Feb-2011 |
rmind | Sprinkle some RCS IDs.
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 27-Feb-2010 |
matt | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
file mips_fixup.c was initially added on branch matt-nb5-mips64.
|
| 1.1.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.1.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.14 | 16-Feb-2012 |
matt | Use (intptr_t) when casting pointers to get proper sign extension.
|
| 1.1.2.13 | 09-Feb-2012 |
matt | Update mips_fixup.c to version from -HEAD.
Move cpu_switchto to locore jumpvec and create a stub for it.
|
| 1.1.2.12 | 04-Nov-2011 |
matt | Correct a thinko. (but since these rarely cross a cacheline, the bug isn't
that serious).
|
| 1.1.2.11 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.1.2.10 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.9 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for explicit MULTIPROCESSOR dependency
|
| 1.1.2.8 | 29-Dec-2010 |
matt | Add stub for tlb_write_indexed.
|
| 1.1.2.7 | 24-Dec-2010 |
matt | If compiling for MIPS1, deal with the presence of load delay slots.
|
| 1.1.2.6 | 22-Dec-2010 |
matt | Rework how fixups are processed. Inside of generating a table, we just
scan kernel text for jumps to locations between (__stub_start, __stub_end]
and if found, we actually decode the instructions in the stub to find out
where the stub would eventually jump to and then patch the original jump
to jump directly to it bypassing the stub. This is slightly slower than
the previous method but it's a simplier and new stubs get automagically
handled.
|
| 1.1.2.5 | 01-Mar-2010 |
matt | Rework fixups support a bit (add a convience macro, require fixups to be
sorted).
|
| 1.1.2.4 | 28-Feb-2010 |
snj | Fix some minor errors in comments.
|
| 1.1.2.3 | 28-Feb-2010 |
matt | Add code which can change a direct jump to stub with an indirect call to
a direct jump to the actual routine.
|
| 1.1.2.2 | 27-Feb-2010 |
snj | Fix a couple typos in comments.
|
| 1.1.2.1 | 27-Feb-2010 |
matt | Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
|
| 1.9.2.1 | 10-Nov-2011 |
yamt | sync with head
|
| 1.10.28.4 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.10.28.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.10.28.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.10.28.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.10.10.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.16.2.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.19.16.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.20.12.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.23.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.17 | 29-May-2021 |
simonb | Update the FPU register names and bit definitions to something somewhat
modern (MIPS32/MIPS64) and convert to __BIT/__BITS.
|
| 1.16 | 11-May-2021 |
simonb | Use "static" in the function intro if the function is static.
|
| 1.15 | 07-May-2017 |
skrll | branches: 1.15.26; 1.15.28;
opt_multiprocessor.h police
|
| 1.14 | 16-Mar-2017 |
chs | branches: 1.14.4;
allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.
|
| 1.13 | 26-Mar-2016 |
martin | branches: 1.13.2; 1.13.4;
Do not touch FP register on softfloat kernels.
|
| 1.12 | 16-May-2014 |
rmind | branches: 1.12.4;
pcu(9):
- Remove PCU_KERNEL (hi matt!) and significantly simplify the code.
This experimental feature was tried on ARM did not meet the expectations.
It may be revived one day, but it should be done in a much simpler way.
- Add a message structure for xcall function, pass the LWP ower and thus
optimise a race condition: if LWP is discarding its state on a remote CPU,
but another LWP already did it - do not cause an unecessary re-faulting.
- Reduce the variety of flags for PCU operations (only PCU_VALID and
PCU_REENABLE are used now), pass them only to the pcu_state_load().
- Rename pcu_used_p() to pcu_valid_p(); hopefully it is less confusing.
- pcu_save_all_on_cpu: SPL ought to be used here.
- Update and improve the pcu(9) man page; it needs wizd(8) though.
|
| 1.11 | 22-Aug-2013 |
drochner | branches: 1.11.2;
-extend the pcu(9) API by a function which saves all context on the
current CPU, and use it if a CPU is taken offline
-add a bool argument to pcu_discard which tells whether the internal
"LWP has used the coprocessor" flag should be set or reset. The flag
is reported by pcu_used_p(). If set, future accesses should use the
state stored in the PCB. If reset, it should be reset to default.
The former case is useful for setmcontext().
With that, it should not be necessary anymore to manage the "FPU used"
state by an additional MD variable.
approved by matt
|
| 1.10 | 26-Dec-2012 |
matt | branches: 1.10.2;
Fix typo
|
| 1.9 | 26-Dec-2012 |
matt | Update to use new pcu_state_{load,save,release} definitions.
|
| 1.8 | 27-Feb-2012 |
matt | branches: 1.8.2;
Remove an incorrect KASSERT
|
| 1.7 | 29-Oct-2011 |
christos | branches: 1.7.2; 1.7.6; 1.7.8;
- make noat-at noreorder-reorder sequences consistent.
- add nop hack to fix assembler internal error.
|
| 1.6 | 16-Aug-2011 |
matt | Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.5 | 02-May-2011 |
rmind | Extend PCU:
- Add pcu_ops_t::pcu_state_release() operation for PCU_RELEASE case.
- Add pcu_switchpoint() to perform release operation on context switch.
- Sprinkle const, misc. Also, sync MIPS with changes.
Per discussions with matt@.
|
| 1.4 | 29-Apr-2011 |
matt | minor cleanup (remove redundant static, fix whitespace).
|
| 1.3 | 20-Feb-2011 |
rmind | Sprinkle some RCS IDs.
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 28-Feb-2010 |
matt | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
file mips_fpu.c was initially added on branch matt-nb5-mips64.
|
| 1.1.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.4.2 | 31-May-2011 |
rmind | sync with head
|
| 1.1.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.5 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.4 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for explicit MULTIPROCESSOR dependency
|
| 1.1.2.3 | 15-May-2010 |
cliff | make it compile when DIAGNOSTIC is defined
|
| 1.1.2.2 | 01-Mar-2010 |
matt | Put fp_lock and fp_cv in a common structure.
|
| 1.1.2.1 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.7.8.1 | 02-Mar-2012 |
riz | Pull up following revision(s) (requested by skrll in ticket #66):
sys/arch/mips/mips/mips_fpu.c: revision 1.8
Remove an incorrect KASSERT
|
| 1.7.6.3 | 06-Mar-2012 |
mrg | sync to -current
|
| 1.7.6.2 | 06-Mar-2012 |
mrg | sync to -current
|
| 1.7.6.1 | 04-Mar-2012 |
mrg | sync to latest -current.
|
| 1.7.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.7.2.2 | 23-Jan-2013 |
yamt | sync with head
|
| 1.7.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.8.2.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.8.2.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.8.2.1 | 25-Feb-2013 |
tls | resync with head
|
| 1.10.2.2 | 18-May-2014 |
rmind | sync with head
|
| 1.10.2.1 | 28-Aug-2013 |
rmind | sync with head
|
| 1.11.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.12.4.2 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.12.4.1 | 22-Apr-2016 |
skrll | Sync with HEAD
|
| 1.13.4.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.13.2.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.14.4.1 | 11-May-2017 |
pgoyette | Sync with HEAD
|
| 1.15.28.1 | 31-May-2021 |
cjep | sync with head
|
| 1.15.26.2 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.15.26.1 | 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.13 | 03-May-2025 |
riastradh | mips: Include opt_cputype.h before any of the flags it defines.
PR port-evbmips/59385: PGSHIFT is inconsistently defined on MIPS
|
| 1.12 | 29-May-2021 |
simonb | branches: 1.12.18;
Update the FPU register names and bit definitions to something somewhat
modern (MIPS32/MIPS64) and convert to __BIT/__BITS.
|
| 1.11 | 13-May-2021 |
simonb | If we're going to print a number in hex, at least put a 0x in front of it.
|
| 1.10 | 26-Feb-2011 |
tsutsui | branches: 1.10.72; 1.10.74;
Use mips_fpexcept() instead of fpemul_trapsignal() to deliver SIGFPE,
and remove now unused fpemul_trapsignal() introduced for PR port-mips/26410.
Fixes PR port-mips/35326 and now t_except unmasked tests in
/usr/tests/lib/libc/ieeefp pass.
Note t_subnormal double test still fails as mentioned in PR port-mips/44639.
|
| 1.9 | 26-Feb-2011 |
tsutsui | mips_fpu_trap() no longer passes pc to mips_fpuillinst().
Use _R_PC value in trapframe instead for ksi_addr of siginfo.
|
| 1.8 | 26-Feb-2011 |
tsutsui | - #if DEBUG -> #ifdef FPEMUL_DEBUG
- use __func__ to print function name
- add debug printf()s in mips_fpuexcept() and mips_fpuillinst() too
|
| 1.7 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.6 | 14-Dec-2009 |
matt | branches: 1.6.4; 1.6.6; 1.6.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.5 | 26-Dec-2006 |
martin | branches: 1.5.48; 1.5.66;
When converting FP exception codes, prefer overflow/underflow over
inexact result - this makes regress/lib/libc/ieeefp/except a bit happier.
|
| 1.4 | 26-Mar-2006 |
tsutsui | branches: 1.4.8;
Wrap a debug printf with #ifdef DEBUG/#endif.
|
| 1.3 | 25-Mar-2006 |
tsutsui | Update FPE trapsignal functions for new siginfo,
based on a patch provided by Matthias Drochner.
Ok'ed by christos, and fixes PR port-mips/26410.
|
| 1.2 | 11-Dec-2005 |
christos | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10; 1.2.12;
merge ktrace-lwp.
|
| 1.1 | 04-Mar-2004 |
drochner | branches: 1.1.4; 1.1.16; 1.1.18; 1.1.28;
fix some problems with FPU exception signaling:
-The MachFPTrap did generate pre-siginfo arguments to trapsignal(),
leading to an immediate crash.
Put the siginfo generation into a separate .c file for simplicity.
-The exception bits in MIPS_FPU_CSR didn't get cleared, leading to
trouble later ("kernel used FPU" on pmax).
XXX This should probably be done for the "unimplemented fpu instruction"
case as well, but I don't know how to test this. Or, even better -
centralize the CSR clearing before the branch in MachFPTrap.
|
| 1.1.28.2 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1260):
sys/arch/mips/mips/mips_fputrap.c: revision 1.4
Wrap a debug printf with #ifdef DEBUG/#endif.
|
| 1.1.28.1 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1260):
sys/arch/mips/mips/fp.S: revision 1.31
sys/arch/mips/mips/mips_fputrap.c: revision 1.3
sys/arch/mips/conf/files.mips: revision 1.54
Update FPE trapsignal functions for new siginfo,
based on a patch provided by Matthias Drochner.
Ok'ed by christos, and fixes PR port-mips/26410.
|
| 1.1.18.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.1.18.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.1.16.2 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1260):
sys/arch/mips/mips/mips_fputrap.c: revision 1.4
Wrap a debug printf with #ifdef DEBUG/#endif.
|
| 1.1.16.1 | 19-Apr-2006 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #1260):
sys/arch/mips/mips/fp.S: revision 1.31
sys/arch/mips/mips/mips_fputrap.c: revision 1.3
sys/arch/mips/conf/files.mips: revision 1.54
Update FPE trapsignal functions for new siginfo,
based on a patch provided by Matthias Drochner.
Ok'ed by christos, and fixes PR port-mips/26410.
|
| 1.1.4.4 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.4.3 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.4.2 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.4.1 | 04-Mar-2004 |
skrll | file mips_fputrap.c was added on branch ktrace-lwp on 2004-08-03 10:37:49 +0000
|
| 1.2.12.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.2.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.2.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.2.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.4.8.1 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.5.66.7 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.5.66.6 | 29-Dec-2010 |
matt | Move from StudlyCaps to more normal names.
|
| 1.5.66.5 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.5.66.4 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.5.66.3 | 29-Jan-2010 |
matt | Change mips kernel options SOFTFLOAT to FPEMUL. Allow a kernel to have
no FP emulation code. Fix insufficient SYMTAB_SPACE. When a kernel without
an FPU and with FPEMUL code, the application will trap with a SIGILL/ILL_ILLOPC
signal, not SIGSEGV/SEGV_MAPERR.
|
| 1.5.66.2 | 26-Aug-2009 |
matt | s/emul_/fpemul_/ indicate this was a fpemul trap.
|
| 1.5.66.1 | 26-Aug-2009 |
matt | If you are going to print the instruction, print the PC of the instruction too!
|
| 1.5.48.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.6.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.6.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.6.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.10.74.1 | 31-May-2021 |
cjep | sync with head
|
| 1.10.72.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.12.18.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.308 | 24-Apr-2025 |
riastradh | mips: Make sure stack is aligned on exec.
The only caller of setregs, sys/kern/kern_exec.c execve_runproc,
already guarantees STACK_ALIGNBYTES alignment, so let's assert it but
out of paranoia also clear the bits anyway just in case for non-
DIAGNOSTIC builds.
Based on a patch by rin@.
PR kern/59327: user stack pointer is not aligned properly
|
| 1.307 | 16-Mar-2025 |
riastradh | Clear trapframe on exec.
Do this for all architectures, even if the trapframe is fully
initialized -- makes it easier to audit and be confident it's
correct, and most likely (with the exception of sh3 which has an
intermediate call to ufetch_int in the middle) the compiler can
eliminate redundant stores in these routines.
PR kern/59084: exec/spawn leaks register content
|
| 1.306 | 06-Jan-2024 |
simonb | branches: 1.306.2;
Remove funny blank line.
|
| 1.305 | 06-Jan-2024 |
simonb | Add Cavium CN68xx to list of known CPUs.
|
| 1.304 | 23-Oct-2022 |
skrll | Trailing whitespace.
|
| 1.303 | 09-Aug-2021 |
andvar | s/fist/first/
|
| 1.302 | 02-Jun-2021 |
simonb | s/leading spaces/tabs/
|
| 1.301 | 23-Mar-2021 |
simonb | branches: 1.301.2;
Work in progress for MIPS modules. Only tested on mipseb64, not yet
enabled anywhere.
|
| 1.300 | 02-Sep-2020 |
simonb | branches: 1.300.2; 1.300.4;
Octeon CN70XX CPUs have a COP0 config5 register.
XXX: The presense of these are defined by the MIPS architecture, should probe.
|
| 1.299 | 17-Aug-2020 |
mrg | enable dumppcb.
|
| 1.298 | 31-Jul-2020 |
simonb | Fix TLB count probe on MIPS32R2+/MIPS64R2+ for CPUs that have a Config4
register with a Config4[MMUExtDef] value.
|
| 1.297 | 31-Jul-2020 |
simonb | CN70XX also has Config6 (CvmMemCtl2) and Config7 (CvmVMConfig) registers.
|
| 1.296 | 31-Jul-2020 |
simonb | CN70XX has a config4 CP0 register.
|
| 1.295 | 13-Jul-2020 |
simonb | Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.
|
| 1.294 | 28-Jun-2020 |
simonb | Fix mm_md_kernacc() for 64 bit kernels (including n32):
- FAULT for any physical address less than start of cached XKPHY address.
- Pass any remaining physical address less then end of RAM.
- Pass any remaining physical address within the KEGS0 kernel address range.
Ignore all remaining addresses and fall back to uvm_kernacc() for checking
virtual address ranges.
Fixes pmap(1) (and probably other kmem grovellers).
|
| 1.293 | 15-Jun-2020 |
simonb | KNF- wrap some long lines.
|
| 1.292 | 15-Jun-2020 |
simonb | Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)
|
| 1.291 | 15-Jun-2020 |
simonb | Remove mips32r2 error introduced in previous commit; there no MP support
at all for 32-bit MIPSNN kernels.
|
| 1.290 | 14-Jun-2020 |
simonb | Revert thinko in previous.
|
| 1.289 | 14-Jun-2020 |
simonb | Include room for the trailing NUL in the way name string.
|
| 1.288 | 14-Jun-2020 |
simonb | Retire MIPS_CP0FL_USERLOCAL and MIPS_CP0FL_HWRENA and the flawed
logic that tried to deal with a MIPS processor that supports the ULR
CP0 register. Probe correctly and save probed info somewhere we can
actually use it. Avoids problems where libc expects ULR set to a
value but the CPU definition in the CPU table didn't have the right
combination of magic flags and thus never set ULR in the first place.
|
| 1.287 | 13-Jun-2020 |
simonb | Correct a comment (or at least comment on what we do instead of half of
what we do).
|
| 1.286 | 13-Jun-2020 |
simonb | Use the correct config3 field name (ULRI) for UserLocal register is
implemented bit.
|
| 1.285 | 10-Jun-2020 |
simonb | Protect using mipsNN_foo() functions with an #ifdef MIPSNN.
Fixes non-MIPSNN kernel compiles pointed out by tsutsui@.
|
| 1.284 | 09-Jun-2020 |
simonb | If we are on a SiByte or Cavium CPU with an FPU, report as "built-in FPU"
instead of saying it's an unknown FPU type.
XXX - add any other CPUs to this list?
|
| 1.283 | 09-Jun-2020 |
simonb | Dynamically build the wayname strings instead of using a sparse array
populated with random N-ways entries. Not only results in smaller code,
but also handles cases with 39-way caches without extra work.
|
| 1.282 | 04-Jun-2020 |
simonb | Tidy up some ugly output from mips_page_physload() when a segment starts
and finishes in the same page.
|
| 1.281 | 23-May-2020 |
simonb | The Cavium CN70xx PRID covers both the CN70xx and CN71xx CPU families.
|
| 1.280 | 23-May-2020 |
simonb | Add SiByte SB-1 rev 0x11 cores and CN70xx CPUs to the CPU table.
|
| 1.279 | 29-Mar-2019 |
simonb | branches: 1.279.4;
Add entry for MIPS 25Kf.
|
| 1.278 | 09-Jun-2017 |
skrll | branches: 1.278.6;
Maintain the split of physical memory into the defined freelists, but
only force pool pages to VM_FREELIST_FIRST512M for non _LP64
|
| 1.277 | 07-May-2017 |
skrll | branches: 1.277.2;
opt_multiprocessor.h police
|
| 1.276 | 23-Dec-2016 |
cherry | branches: 1.276.6;
"Make NetBSD great again!"
Introduce uvm_hotplug(9) to the kernel.
Many thanks, in no particular order to:
TNF, for funding the project.
Chuck Silvers - for multiple API reviews and feedback.
Nick Hudson - for testing on multiple architectures and bugfix patches.
Everyone who helped with boot testing.
KeK (http://www.kek.org.in) for hosting the primary developers.
|
| 1.275 | 22-Dec-2016 |
mrg | fix lp64 kvm access for many kernel addresses.
in mm_md_kernacc() allow an address if it matches MIPS_KSEG0_P().
now a static n64 kvm-using binary runs sanely on an n64 kernel.
(dynamic n64 has problems with non-trivial programs.)
ok matt@.
|
| 1.274 | 30-Jul-2016 |
matt | Fix typo. N32 doesn't want UX on.
|
| 1.273 | 25-Jul-2016 |
macallan | xburst needs CPU_MIPS_D_CACHE_COHERENT
|
| 1.272 | 11-Jul-2016 |
skrll | branches: 1.272.2;
Trailing whitespace
|
| 1.271 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.270 | 11-Jul-2016 |
matt | Add machdep.fpu_present sysctl node
|
| 1.269 | 11-Jun-2015 |
matt | No more sysmapsize.
|
| 1.268 | 11-Jun-2015 |
matt | Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_start to get the
VA space it needs.
pmap_segtab.c is almost identical to uvm/pmap/pmap_segtab.c now. It won't
be long until we switch to the uvm/pmap one.
|
| 1.267 | 10-Jun-2015 |
matt | Add entry for MIPS 1074K
|
| 1.266 | 08-Jun-2015 |
macallan | sync _MTC0_V0_USERLOCAL with cpuregs.h
now CI20 boots again
|
| 1.265 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.264 | 25-May-2015 |
matt | Enable HWRENA for the CN50xx even though it doesn't support USERLOCAL.
Enable the MIPS64R2 locoresw.
|
| 1.263 | 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.262 | 25-Nov-2014 |
macallan | branches: 1.262.2;
fix _MTC0_V0_USERLOCAL for _LP64 as well
ok matt@
|
| 1.261 | 22-Nov-2014 |
macallan | deal with Ingenic XBurst CPUs
|
| 1.260 | 02-Jun-2014 |
mrg | apply __diagused.
|
| 1.259 | 24-Mar-2014 |
christos | branches: 1.259.2;
use cpu_{g,s}etmodel
|
| 1.258 | 10-Nov-2013 |
christos | fix unused variable warnings
|
| 1.257 | 30-Oct-2013 |
uebayasi | G/C struct user *proc0paddr.
|
| 1.256 | 28-Feb-2013 |
macallan | branches: 1.256.6;
add sysctl machdep.loongson-mmi to indicate wether Loongson Multimedia
Instructions are supported
mostly for pixman
|
| 1.255 | 11-Mar-2012 |
mrg | branches: 1.255.2;
normalise RCSID handling some.
|
| 1.254 | 03-Mar-2012 |
matt | remove safepri declaration since it's defined in kern_synch.c
|
| 1.253 | 19-Feb-2012 |
rmind | Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.252 | 11-Feb-2012 |
martin | Add a posix_spawn syscall, as discussed on tech-kern.
Based on the summer of code project by Charles Zhang, heavily reworked
later by me - all bugs are likely mine.
Ok: core, releng.
|
| 1.251 | 12-Dec-2011 |
mrg | implement bdev_size(9) wrapper around d_psize() routine, so we can take
the device lock in relevant places. avoid doing so while actually dumping.
tested i386 crash dumps still work, and that all touched files compile.
fixes PR#45705.
|
| 1.250 | 29-Oct-2011 |
jakllsch | branches: 1.250.2; 1.250.6;
Add Broadcom BCM3302 CPU to the table.
|
| 1.249 | 22-Sep-2011 |
macallan | support BUS_SPACE_MAP_PREFETCH in order to allow mapping device memory and
DMA buffers with cacheing disabled but things like write combining, relaxed
ordering etc. allowed when the CPU supports it
so far enabled only on Loongson, should work on R1xk and probably newer CPUs
|
| 1.248 | 27-Aug-2011 |
bouyer | There are non-writable bits in MIPS_COP_0_TLB_HI between ASID and VPN, so
mips3_cp0_tlb_entry_hi_probe() returns a value with some 0 in the low 12 bits.
Thus the computed mips_vm_maxuser_address is wrong. Fix by oring PAGE_MASK to
return value of mips3_cp0_tlb_entry_hi_probe().
|
| 1.247 | 24-Aug-2011 |
matt | When using 16KB pages in a 64 bit kernel, the amount of address space our page
table can address can be larger than the amount of address space the CPU
implementation supports. This change limits the amount address space to what
the CPU implementation provides.
|
| 1.246 | 16-Aug-2011 |
matt | Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.245 | 31-Jul-2011 |
matt | Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
|
| 1.244 | 14-Jun-2011 |
matt | Fix mm_md_direct_mapped_phys
|
| 1.243 | 12-Jun-2011 |
rmind | Welcome to 5.99.53! Merge rmind-uvmplock branch:
- Reorganize locking in UVM and provide extra serialisation for pmap(9).
New lock order: [vmpage-owner-lock] -> pmap-lock.
- Simplify locking in some pmap(9) modules by removing P->V locking.
- Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share
the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs).
- Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner.
Add TLBSTATS option for x86 to collect statistics about TLB shootdowns.
- Unify /dev/mem et al in MI code and provide required locking (removes
kernel-lock on some ports). Also, avoid cache-aliasing issues.
Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches
formed the core changes of this branch.
|
| 1.242 | 07-Jun-2011 |
matt | Remove unused variable pcb.
|
| 1.241 | 07-Jun-2011 |
matt | Switch alpha to use PCU to manage the FPU.
Tested by mhitch and review by rmind.
|
| 1.240 | 29-Apr-2011 |
matt | branches: 1.240.2;
Since the RAS lock stubs are the default, don't bother assigning them just
make the default.
|
| 1.239 | 14-Apr-2011 |
cliff | - add mips_watchpoint_init() to discover number of CPU watchpoints,
and call that from {mips32,mips32r2,mips64,mips64r2}_vector_init()
|
| 1.238 | 06-Apr-2011 |
matt | A little constification.
Add MIPS 1004K entry.
|
| 1.237 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.236 | 04-Mar-2011 |
joerg | Refactor ps_strings access. Based on PK_32, write either the normal
version or the 32bit compat layout in execve1. Introduce a new function
copyin_psstrings for reading it back from userland and converting it to
the native layout. Refactor procfs to share most of the code with the
kern.proc_args sysctl handler.
This material is based upon work partially supported by
The NetBSD Foundation under a contract with Joerg Sonnenberger.
|
| 1.235 | 03-Mar-2011 |
matt | Change MIPS_CP0FL_CONFIG*
Add MIPS_CP0FL_HWRENA and USERLOCAL
|
| 1.234 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.233 | 26-Jan-2011 |
pooka | Add support for the Extensible MIPS ("eMIPS") platform. The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.
eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing. eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.
NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman. Microsoft Corporation has
donated full copyright to The NetBSD Foundation.
Platform support for eMIPS is the first part of Microsoft's
contribution. The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.
|
| 1.232 | 22-Jan-2011 |
tsutsui | Whitespace nits.
|
| 1.231 | 14-Jan-2011 |
rmind | branches: 1.231.2; 1.231.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.230 | 02-Jan-2011 |
he | Make this build again by removing the const qualifier on the
local pcb0 variable in mips_init_lwp0_uarea().
|
| 1.229 | 01-Jan-2011 |
nisimura | - leave lwp0 trapframe zerod since it's never used.
- 64bit op SR[KX] bit is for !o32 cases.
- build struct sigframe_siginfo locally and then operate single copyout()
to user stack as other ports do.
|
| 1.228 | 10-Nov-2010 |
uebayasi | Use more VM_PHYSMEM_*() accessors. No functional changes.
|
| 1.227 | 06-Nov-2010 |
uebayasi | Machine dependent code is considered as part of UVM. Include
internal API header.
|
| 1.226 | 23-Apr-2010 |
rmind | Remove lwp_uc_pool, replace it with kmem(9), plus add some consistency.
As discussed, a while ago, with ad@.
|
| 1.225 | 23-Jan-2010 |
mrg | branches: 1.225.2; 1.225.4;
rename pridtab{}::cpu_name to cpu_displayname.
should fix a build error reported by he@.
|
| 1.224 | 15-Dec-2009 |
matt | Make sure the pcb and initial frame area of lwp0 are zeroed since these will
be the basis for all future lwps.
|
| 1.223 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.222 | 10-Dec-2009 |
matt | Change u_long to vaddr_t/vsize_t in exec code where appropriate (mostly
involves setregs and vmcmds). Should result in no code differences.
|
| 1.221 | 27-Nov-2009 |
rmind | - Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
|
| 1.220 | 27-Nov-2009 |
rmind | Revert unrelated/unintended changes from previous commit.
Should fix MIPS builds (hi matt@).
|
| 1.219 | 26-Nov-2009 |
matt | Kill proc0paddr. Use lwp0.l_addr instead.
|
| 1.218 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.217 | 09-Aug-2009 |
matt | If using 16KB pages, don't enable special CCA for loongson2 cpus.
|
| 1.216 | 09-Aug-2009 |
matt | Initialize Page Mask register based on PAGE_SIZE, don't assume it's always
going to be 4KB. (And this change, I can boot a GDIUM kernel with 16KB
pages as far as I could with 4KB).
|
| 1.215 | 09-Aug-2009 |
matt | Add disabled code to set K0 CCA if CCA_SPECIAL is being used.
|
| 1.214 | 07-Aug-2009 |
matt | Mark LOONGSON as uncached for the moment.
|
| 1.213 | 06-Aug-2009 |
matt | Make cidnames const
|
| 1.212 | 06-Aug-2009 |
matt | Add ICT Loongson2 identification.
|
| 1.211 | 30-May-2009 |
martin | Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.210 | 16-Mar-2009 |
dsl | ANSIfy functions with function-pointer arguments
|
| 1.209 | 14-Mar-2009 |
dsl | Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)
|
| 1.208 | 22-Jan-2009 |
dogcow | branches: 1.208.2;
major() and minor() are now int32_t.
|
| 1.207 | 11-Jan-2009 |
rumble | Make this compile.
|
| 1.206 | 25-Nov-2008 |
ad | dumpsys: don't spew numbers into the log.
|
| 1.205 | 17-Oct-2008 |
uebayasi | branches: 1.205.2; 1.205.4;
Oops; redo previous.
|
| 1.204 | 17-Oct-2008 |
uebayasi | p_smutex was merged into p_lock some time ago.
|
| 1.203 | 15-Oct-2008 |
wrstuden | Merge wrstuden-revivesa into HEAD.
|
| 1.202 | 03-Aug-2008 |
tsutsui | Add CPU_MIPS_DOUBLE_COUNT to R10K family CPUs and
also remove (unused?) MIPS_NOT_SUPP flag from them.
Problem on R10k O2 is reported by martin@ on port-sgimips.
|
| 1.201 | 28-Apr-2008 |
martin | branches: 1.201.2; 1.201.6;
Remove clause 3 and 4 from TNF licenses
|
| 1.200 | 24-Apr-2008 |
ad | branches: 1.200.2;
Merge proc::p_mutex and proc::p_smutex into a single adaptive mutex, since
we no longer need to guard against access from hardware interrupt handlers.
Additionally, if cloning a process with CLONE_SIGHAND, arrange to have the
child process share the parent's lock so that signal state may be kept in
sync. Partially addresses PR kern/37437.
|
| 1.199 | 19-Feb-2008 |
simonb | branches: 1.199.6; 1.199.8;
Add entries for MIPS's 24K, 24KE, 34K and 74K cores.
From Alexander Voropay in mail to port-mips@.
|
| 1.198 | 03-Dec-2007 |
ad | Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
|
| 1.197 | 19-Nov-2007 |
ad | Fix cpu_need_resched().
|
| 1.196 | 17-Oct-2007 |
garbled | branches: 1.196.2;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.195 | 16-Oct-2007 |
simonb | branches: 1.195.2;
Recognise the R2000A cpu as found in some pmaxen.
From Dennis Grevenstein on port-pmax@.
|
| 1.194 | 17-May-2007 |
yamt | branches: 1.194.8; 1.194.10; 1.194.12;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.193 | 04-Mar-2007 |
christos | branches: 1.193.2; 1.193.4; 1.193.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.192 | 09-Feb-2007 |
ad | branches: 1.192.2;
Merge newlock2 to head.
|
| 1.191 | 24-Jan-2007 |
hubertf | Remove duplicate #includes, patch contributed in private mail
by Slava Semushin <slava.semushin@gmail.com>.
To verify that no nasty side effects of duplicate includes (or their
removal) have an effect here, I've compiled an i386/ALL kernel with
and without the patch, and the only difference in the resulting .o
files was in shifted line numbers in some assert() calls.
The comparison of the .o files was based on the output of "objdump -D".
Thanks to martin@ for the input on testing.
|
| 1.190 | 23-Oct-2006 |
he | branches: 1.190.2; 1.190.4;
Constify, since the new gcc propagates constness to struct members.
|
| 1.189 | 21-Oct-2006 |
mrg | fix errors in the previous changes.
|
| 1.188 | 21-Oct-2006 |
mrg | in cpu_dumpconf(), don't panic() if we can't bdevsw_lookup() the
dumpdev. this occurs when we try to set the dumpdev to a device
with no driver loaded. this fixes PR#34872.
in sys_swapctl, if bdevsw_lookup() fails, set dumpdev = NODEV
before calling cpu_dumpconf(). (this also fixes PR#34872.)
XXX: cpu_dumpconf() should probably be changed to take a dumpdev
XXX: and return an error in such cases, but that is a much more
XXX: intrusive change.
XXX2: this is only run-tested on sparc64 and compile tested on a
XXX2: couple of platforms.
|
| 1.187 | 26-Aug-2006 |
matt | branches: 1.187.2; 1.187.4;
Use vaddr_t for virtual addresses. Don't cast pointers with int or
unsigned, use intptr_t or uintptr_t as appropriate.
|
| 1.186 | 21-Mar-2006 |
simonb | Reorder a few entries in the CPU table.
|
| 1.185 | 20-Mar-2006 |
gdamore | Added support for MIPS architecture revision 2.
Added definitions for various rev 2 CP0 configuration register bits.
Added support for MIPS 4KEc Rev 2 (found in Atheros AR2316, for example).
|
| 1.184 | 24-Dec-2005 |
perry | branches: 1.184.4; 1.184.6; 1.184.8; 1.184.10; 1.184.12;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.183 | 20-Dec-2005 |
tron | Add basic support for Alchemy Au1550 processor (CPU and devices).
Patch contributed by Garrett D'Amore in PR port-evbmips/32030.
|
| 1.182 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.181 | 05-Nov-2005 |
tsutsui | Make MIPS3_PG_SHIFT a variable and initialize it accordingly
in mips_vector_init() if options MIPS3_4100 is specified
so that kernels which have options MIPS3_4100 also work
on other MIPS3 CPUs.
XXX: now should we rename options MIPS3_4100 to options ENABLE_MIPS_R4100,
XXX: or just make MIPS3_PG_SHIFT always a variable?
|
| 1.180 | 05-Nov-2005 |
tsutsui | Check MIPS_PRID_IMPL(cpu_id) for MIPS3_4100 CPUs at runtime to
initialize the MIPS_COP_0_TLB_PG_MASK register with their specific value.
|
| 1.179 | 08-Sep-2005 |
tsutsui | Initilize CP0 pagemask register properly.
Fixes PR 30590 and some other mips port.
|
| 1.178 | 01-Jun-2005 |
drochner | branches: 1.178.2;
cast-qual fallout
|
| 1.177 | 01-Jan-2005 |
simonb | branches: 1.177.8;
Use "NULL" instead of "(something-or-other *)0".
|
| 1.176 | 03-Jul-2004 |
simonb | In cpu_{set,get}context(), copy the FP registers themselves and the FP
CSR separately (and now from the correctly sized __fpregset_t). The
FP CSR is copied separately to avoid endianness/alignment issues.
Part of fix for PR port-mips/25942. Thanks to Christos Zoulas and
Klaus Klein for help with debugging this.
|
| 1.175 | 24-Mar-2004 |
atatat | branches: 1.175.2;
Tango on sysctl_createv() and flags. The flags have all been renamed,
and sysctl_createv() now uses more arguments.
|
| 1.174 | 09-Mar-2004 |
cgd | proper name for SB-1 is ... SB-1 (not SB1).
|
| 1.173 | 13-Feb-2004 |
wiz | Uppercase CPU, plural is CPUs.
|
| 1.172 | 06-Dec-2003 |
simonb | Only compile in sysctl_machdep_booted_kernel() if __HAVE_BOOTINFO_H
is defined.
|
| 1.171 | 04-Dec-2003 |
atatat | Dynamic sysctl.
Gone are the old kern_sysctl(), cpu_sysctl(), hw_sysctl(),
vfs_sysctl(), etc, routines, along with sysctl_int() et al. Now all
nodes are registered with the tree, and nodes can be added (or
removed) easily, and I/O to and from the tree is handled generically.
Since the nodes are registered with the tree, the mapping from name to
number (and back again) can now be discovered, instead of having to be
hard coded. Adding new nodes to the tree is likewise much simpler --
the new infrastructure handles almost all the work for simple types,
and just about anything else can be done with a small helper function.
All existing nodes are where they were before (numerically speaking),
so all existing consumers of sysctl information should notice no
difference.
PS - I'm sorry, but there's a distinct lack of documentation at the
moment. I'm working on sysctl(3/8/9) right now, and I promise to
watch out for buses.
|
| 1.170 | 04-Dec-2003 |
keihan | netbsd.org -> NetBSD.org
All "netbsd.org" is now gone from src/sys/arch.
|
| 1.169 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.168 | 30-Oct-2003 |
christos | set the onstack flag if requested.
|
| 1.167 | 05-Oct-2003 |
tsutsui | Update comment to follow the previous R4000 ID addtion.
|
| 1.166 | 28-Sep-2003 |
tsutsui | Add another R4000 CPU revision ID. From Christopher SEKIYA.
|
| 1.165 | 29-Jun-2003 |
fvdl | branches: 1.165.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.164 | 29-Jun-2003 |
simonb | Fix more needless 'struct proc *' to 'struct lwp *' fallout.
|
| 1.163 | 12-Jun-2003 |
simonb | Consistency nit- always use "#if defined(foo)" for checking MIPSn.
|
| 1.162 | 11-Jun-2003 |
simonb | Don't use "return;" as last statement of a void function.
|
| 1.161 | 09-Jun-2003 |
simonb | Don't use magic numbers in asm code (use MIPS_COP_0_STATUS instead
of "12").
|
| 1.160 | 11-Apr-2003 |
nathanw | Make cpu_getmcontext() run the PC through ras_lookup() so that kernel
getcontext() plus userlevel setcontext() (as used in libpthread) respects
the atomicity of RAS regions.
|
| 1.159 | 02-Apr-2003 |
thorpej | Use PAGE_SIZE rather than NBPG.
|
| 1.158 | 07-Feb-2003 |
cgd | Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.157 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.156 | 17-Dec-2002 |
simonb | Mark the Au1x00 CPUs as having a fully coherent data cache that doesn't
require flushing (even in the instruction cache handlers). This gives
about a 4% improvement in a "make depend" benchmark.
Mark the SB-1 CPUs as having a fully coherent data cache that only
require flushing in the instruction cache handlers. This gives about
a 5% improvement in a "make depend" benchmark.
|
| 1.155 | 15-Nov-2002 |
simonb | Use COP0_HAZARD_FPUENABLE instead of a hard-coded 4 NOPs when enabling
the FPU.
|
| 1.154 | 09-Nov-2002 |
simonb | Include <sys/device.h> so this compiles again.
|
| 1.153 | 09-Nov-2002 |
nisimura | - Make monolistic files into smaller manageable pieces, resulting
three new files;
sig_machdep.c (from mips_machdep.c)
copy.S and sigcode.S (from locore.S)
- Nuke the local use of struct sigframe, which is now identical to
struct sigcontext, from sendsig() as the consequence of new signal
trampoline.
|
| 1.152 | 27-Sep-2002 |
provos | remove trailing \n in panic(). approved perry.
|
| 1.151 | 19-Sep-2002 |
ragge | Do not include <sys/clist.h>, it's not used in NetBSD at all.
|
| 1.150 | 13-Sep-2002 |
simonb | Add CPU_MIPS_DOUBLE_COUNT for the TX49xx cpus.
|
| 1.149 | 09-Sep-2002 |
simonb | Fix the order of the CPU revision and company options fields in the cpu
table for the Alchemy CPUs; successfully recognises an Au1500 now.
|
| 1.148 | 06-Sep-2002 |
gehenna | Merge the gehenna-devsw branch into the trunk.
This merge changes the device switch tables from static array to
dynamically generated by config(8).
- All device switches is defined as a constant structure in device drivers.
- The new grammer ``device-major'' is introduced to ``files''.
device-major <prefix> char <num> [block <num>] [<rules>]
- All device major numbers must be listed up in port dependent majors.<arch>
by using this grammer.
- Added the new naming convention.
The name of the device switch must be <prefix>_[bc]devsw for auto-generation
of device switch tables.
- The backward compatibility of loading block/character device
switch by LKM framework is broken. This is necessary to convert
from block/character device major to device name in runtime and vice versa.
- The restriction to assign device major by LKM is completely removed.
We don't need to reserve LKM entries for dynamic loading of device switch.
- In compile time, device major numbers list is packed into the kernel and
the LKM framework will refer it to assign device major number dynamically.
|
| 1.147 | 28-Aug-2002 |
simonb | Add the Toshiba TX4927 CPU.
|
| 1.146 | 19-Aug-2002 |
simonb | Remove CPU_MIPS_DOUBLE_COUNT for the MIPS 20Kc - it's cycle counter runs
at the normel CPU frequency.
|
| 1.145 | 06-Aug-2002 |
shin | fix CPU_ROOT_DEVICE implementation.
|
| 1.144 | 05-Aug-2002 |
shin | * add CPU_MIPS_NO_LLSC to Toshiba TX3912, TX3922, TX3927.
* fix mips_has_llsc calculation logic.
|
| 1.143 | 05-Aug-2002 |
simonb | The TX79 core in the R5900 doesn't support LL/SC.
XXX: Others in this table will need to be updated.
|
| 1.142 | 05-Aug-2002 |
simonb | Use a __HAVE_BOOTINFO_H define to check for bootinfo support instead of
speading port names in arch-dependant code.
|
| 1.141 | 04-Aug-2002 |
gmcgarry | mipsco and sgimips also implement bootinfo, but didn't provide
the CPU_BOOTED_KERNEL sysctl variable.
|
| 1.140 | 04-Aug-2002 |
gmcgarry | Move LLSC feature test for mips1 to cputab[].
|
| 1.139 | 04-Aug-2002 |
gmcgarry | Add sysctl variable to represent native CPU support for LL/SC instructions.
|
| 1.138 | 04-Aug-2002 |
gmcgarry | mips1 doesn't have native LL/SC instructions.
|
| 1.137 | 04-Aug-2002 |
gmcgarry | Merge cpu_sysctl() for all mips ports, based on powerpc and m68k precedent.
For now, only pmax implements CPU_BOOTED_KERNEL. Need to revisit.
|
| 1.136 | 26-Jul-2002 |
simonb | Add support for detecting Alchemy Semiconductor CPUs. Alchemy use the
processor ID field to donote the CPU core revision and the company
options field do donate the SOC chip type, so we need to add an extra
field to the "pridtab" structure to identify these CPUs.
|
| 1.135 | 04-Jul-2002 |
thorpej | Add kernel support for having userland provide the signal trampoline:
* struct sigacts gets a new sigact_sigdesc structure, which has the
sigaction and the trampoline/version. Version 0 means "legacy kernel
provided trampoline". Other versions are coordinated with machine-
dependent code in libc.
* sigaction1() grows two more arguments -- the trampoline pointer and
the trampoline version.
* A new __sigaction_sigtramp() system call is provided to register a
trampoline along with a signal handler.
* The handler is no longer passed to sensig() functions. Instead,
sendsig() looks up the handler by peeking in the sigacts for the
process getting the signal (since it has to look in there for the
trampoline anyway).
* Native sendsig() functions now select the appropriate trampoline and
its arguments based on the trampoline version in the sigacts.
Changes to libc to use the new facility will be checked in later. Kernel
version not bumped; we will ride the 1.6C bump made recently.
|
| 1.134 | 04-Jul-2002 |
thorpej | Eliminate 4 unused sigframe members.
|
| 1.133 | 27-Jun-2002 |
simonb | Add the 20Kc processor ID.
|
| 1.132 | 07-Jun-2002 |
simonb | Add some ifdef's around the usage of mips_wait_idle; fixes builds for
playstations2 and MIPS1-only kernels.
Based on patch from Bill Squier.
|
| 1.131 | 01-Jun-2002 |
simonb | Use CPU_MIPS_USE_WAIT and CPU_MIPS_NO_WAIT in the CPU table, and use
the generic name "mips_wait_idle" for the old function that had both
rm52xx_idle and mipsNN_idle entry points.
|
| 1.130 | 01-Jun-2002 |
simonb | Standardise on the name "MIPS_SR_BEV" instead of a couple of different
#defines for the same status bit.
|
| 1.129 | 03-May-2002 |
rafal | branches: 1.129.2;
R4600 and R5000 count registers count at half-cpu-speed as well.
|
| 1.128 | 05-Apr-2002 |
simonb | Add a "CPU_MIPS_DOUBLE_COUNT" flag for CPUs where the cp0 count register
ticks over at half the CPU clock speed, and set this flag for the known
CPUs with this behaviour. Better names for this flag gratefully accepted!
Also adjust comment about known R4000/R4400 revisions.
|
| 1.127 | 03-Apr-2002 |
simonb | Remove a commented-out debug printf.
|
| 1.126 | 17-Mar-2002 |
manu | Replaced PS_STRINGS by p->p_psstr
|
| 1.125 | 13-Mar-2002 |
simonb | Add R4400 reg 0x60 to the MIPS CPU table.
From PR port-mips/15894 from Thilo Manske.
|
| 1.124 | 11-Mar-2002 |
uch | make this compile and work with MIPS3_5900.
|
| 1.123 | 06-Mar-2002 |
tsutsui | Change type of dumpmag to u_int32_t since it is actually
a 32bit unsigned magic number.
As per discussion on tech-kern, and fixes port-sparc64/11949.
|
| 1.122 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Use a table-driven CPU detection algorithm instead of multiple
case statements.
- Add MIPS32/64 feature detection using the architected CP0 registers
(from Broadcom Corp).
- Call MD mips_machdep_cache_config() function if
__HAVE_MIPS_MACHDEP_CACHE_CONFIG is defined - used to set up the
L2 cache on some ports.
|
| 1.121 | 30-Jan-2002 |
uch | remove unused variable.
|
| 1.120 | 14-Nov-2001 |
thorpej | branches: 1.120.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.119 | 16-Oct-2001 |
uch | branches: 1.119.2;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.118 | 11-Jun-2001 |
thorpej | branches: 1.118.2;
Always indirect through the "locoresw" to get the cache ops, since
there are just far too many combinations to handle with magic
#ifdefs in any sane way. Also, add a HitFlushDCache op to the
"locoresw", and fill it in as appropriate (it's NULL on MIPS-I,
so watch out).
These changes ensure that my R4600 Indy (with 2-way cache) gets
the correct cache ops when the kernel is built with only MIPS3
support, resulting in a kernel that is significantly more stable.
|
| 1.117 | 31-May-2001 |
nisimura | PRiD 0x18 is shared by RC32334, 332 and 355. These SoCs are
distinguished by SYSID register in the system controller. Note
that PRiD 0x20 is for a standalone RC32364 processor which has the
same 32300 core inside. Rather better to name them MIPS32 ISA.
|
| 1.116 | 30-May-2001 |
nisimura | Add a case clause for IDT RC32332/RC32334 processor personality
inside a commented-out block.
|
| 1.115 | 29-May-2001 |
thorpej | The QED RM7000 can use the same idle routine as the QED RM52xx.
|
| 1.114 | 29-May-2001 |
thorpej | Install power-saving idle routines at the end of cpu_identify(). We
currently handle the QED RM52xx here.
|
| 1.113 | 02-May-2001 |
thorpej | Size the number of initial color bins based on the size and
associativity of the L1 cache.
Note, doesn't really do anything for virtually-indexed caches,
but it doesn't hurt them, either.
|
| 1.112 | 31-Dec-2000 |
castor | branches: 1.112.2;
Fix sendsig/sigreturn for SOFTFLOAT case.
|
| 1.111 | 28-Dec-2000 |
castor | Disable FPU in sys___sigreturn14() so floating point registers are
properly restored.
|
| 1.110 | 22-Dec-2000 |
jdolecek | split off thread specific stuff from struct sigacts to struct sigctx, leaving
only signal handler array sharable between threads
move other random signal stuff from struct proc to struct sigctx
This addresses kern/10981 by Matthew Orgass.
|
| 1.109 | 20-Dec-2000 |
jeffs | Hook mips3 cache error vector. No real handler, only set-up for a panic.
A real handler is hard.
|
| 1.108 | 27-Nov-2000 |
soren | Correct a few cpu/fpu ids.
|
| 1.107 | 05-Oct-2000 |
cgd | clean up and consistency for CP0 Count, Compare, Wired, and Config
access function names and prototypes.
|
| 1.106 | 05-Oct-2000 |
cgd | nuke mips3_clearBEV(). There's really no point in coding a
special-purpose assembly routine for things like this.
|
| 1.105 | 05-Oct-2000 |
cgd | tweak cpu_arch. Eliminate all direct checks of it (making them
use the macro CPUISMIPS3 -- which is badly misnamed), and set it
from #defines named CPU_ARCH_N (where N is 1..5, 32, 64).
|
| 1.104 | 04-Oct-2000 |
cgd | the generic MIPS code doesn't even play at doing anything useful
with a MIPS4 option at this point -- all the code except for one single
spot is conditionalized with MIPS3. So, don't even pretend about
MIPS4 for now, until it all gets cleaned up.
|
| 1.103 | 18-Sep-2000 |
uch | [R3900/R3920] sync with
| Module Name: syssrc
| Committed By: nisimura
| Date: Sat Sep 16 07:20:17 UTC 2000
|
| 1.102 | 16-Sep-2000 |
nisimura | Introduce new MIPS1 direct mapped cache capacity detection logics.
|
| 1.101 | 16-Sep-2000 |
chuck | IDT32364's Config register uses a different base for IC/DC (instruction
and data cache sizes). R4000 uses 2^(12+IC) and 2^(12+DC). IDT32364
uses 2^(9+IC) and 2^(9+DC).
abstract around the problem by making the base a parameter to the
MIPS3_CONFIG_CACHE_SIZE macro. we pass the base down from mips_vector_init
to mips3_vector_init and to mips3_ConfigCache (where it is used).
XXX: someone with an MIPS3_4100 should switch to this and get rid
of the ugly ifdefs in cpuregs.h
|
| 1.100 | 13-Sep-2000 |
nisimura | Introduce 'segbase' global variable to hold the pointer to current
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
|
| 1.99 | 02-Aug-2000 |
jeffs | setregs() cache sync turns out not to be needed with kern_exec 1.104
(which was 2 weeks after our internal trees full sync).
|
| 1.98 | 27-Jul-2000 |
cgd | convert PRID handling to use macros on an int, not bit-fields.
there's no reason to use bit-fields, and they just complexity to
the header.
|
| 1.97 | 27-Jul-2000 |
jeffs | Fix to actually compile MIPS1 only.
|
| 1.96 | 27-Jul-2000 |
jeffs | Do not attempt mips3 style cache flush on mips1 in setregs() as it
is illegal to flush on user addresses. In theory the race exists
on MIPS1, but it is rather unlikely in common use. I have
seen it with regress/sys/kern/sigtramp on a QED 5231 system.
|
| 1.95 | 20-Jul-2000 |
jeffs | Make pmap_prefer() use a global setting based on cache size
instead of assuming 64KB. This allows best fit and will
support bigger caches.
|
| 1.94 | 10-Jul-2000 |
jeffs | Update mips3_locore_vec cache functions for mips3_L1TwoWayCache. Add cast
for clean compilation with _MIPS_BSD_API_LP32_64CLEAN set.
|
| 1.93 | 10-Jul-2000 |
jeffs | In setregs() flush sigreturn trampoline code from the d (MIPS3) and i cache.
Tested on geocast RM5231 platform. This fixes a race in
regress/sys/kern/sigtramp. Some other ports do the same thing.
|
| 1.92 | 29-Jun-2000 |
mrg | remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.91 | 26-Jun-2000 |
nisimura | Abandon {mips1,mips3}_TBRPL()s which have little gain. They were
expected to be better than MachTLBUpdate(). After all, TLBUpdate()
is rather harmful and should be replaced with TBIS().
|
| 1.90 | 17-Jun-2000 |
cgd | branches: 1.90.2;
cod: any of various bottom-dwelling fishes (family Gadidae, the cod
family) that usually occur in cold marine waters and often have barbels
and three dorsal fins.
code: a set of instructions for a computer.
The latter is more appropriate in the comment corrected here.
|
| 1.89 | 15-Jun-2000 |
cgd | when printing the cpu_id (because it's unknown or not supported),
print the whole PRID value. Also, print the PRID value in addition to
the name, when the CPU is known (for data collection purposes).
|
| 1.88 | 09-Jun-2000 |
soda | Decrease MIPS3_TLB_WIRED_ENTRIES from 8 to 2,
and rename it to MIPS3_TLB_WIRED_UPAGES.
The value of wired register becomes variable on arc port,
and arc is the only mips3 port which uses the wired TLB entries 2..7.
|
| 1.87 | 08-Jun-2000 |
mhitch | Fix loadfpregs(): the register used to access the floating point registers
was not getting loaded, and the floating point registers were being loaded
from the proc structure rather than the FP registers in the pcb.
|
| 1.86 | 06-Jun-2000 |
soren | R12K has 64 TLBs too.
|
| 1.85 | 05-Jun-2000 |
jhawk | Do not clear msgbufenabled in dumpsys(). Dump messages will now go to
the message buffer. This can be invaluable in debugging if the dump
fails (assuming a persistant message buffer)
|
| 1.84 | 30-May-2000 |
nisimura | FPA ownership is now guarded by MDP_FPUSED flag and there is no necessity
to have #if ... around savefpregs() calls.
|
| 1.83 | 30-May-2000 |
nisimura | - Have savefpregs() and loadfpregs() in C codes with lengthy inlined
asm statements, obsoluting asm routines in locore.S. They are
designed to work in symmetry as names suggests. savefpregs()
does not clear a global variable fpcurproc. Both would be noops when
NOFPU global symbol is defined.
- MDP_FPUSED flag is not turned on for FPA-less processors like Vr4100
and TX3900 even when processes execute FP insns.
|
| 1.82 | 29-May-2000 |
nisimura | Put an additional check to see curproc was an FPA owner process.
|
| 1.81 | 23-May-2000 |
soren | branches: 1.81.2;
MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,
so remove references them, and do a little other cleanup.
|
| 1.80 | 21-May-2000 |
soren | R10K has 64 TLBs.
|
| 1.79 | 21-May-2000 |
soren | Add R12K PRID.
|
| 1.78 | 17-May-2000 |
soren | Make cache printing a little more consistent.
|
| 1.77 | 10-May-2000 |
nisimura | Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3. It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs. mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.
|
| 1.76 | 12-Apr-2000 |
nisimura | - Implement mips3_TBIAP().
- Remove obsoluted routines in locore_mips3.S
- addiu -> addu, andi -> and, ori -> or.
|
| 1.75 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.74 | 28-Mar-2000 |
simonb | Use the recent alpha solution to getting the printf() format right in
mips_init_msgbuf().
|
| 1.73 | 28-Mar-2000 |
simonb | Remove duplication declarations of Sysmap and Sysmapsize - these are
in <mips/pte.h>
|
| 1.72 | 27-Mar-2000 |
nisimura | Have TBIA/TBIAP an argument refering to a global variable instead
of a compile time constant.
|
| 1.71 | 27-Mar-2000 |
nisimura | - Rename some of TLB ops to have handy abbrivations hired from VAX and
ALPHA; mips1_TBIA, mips1_TBIAP, mips1_TBIS.
- Make sure TBIA and TBIAP ops to have an argument for the size of TLB
which varies across even for MIPS1 implementations.
- Nuke the unused cpu_isa field from processor personality list.
- XXX XXX XXX
it's less-than-optimal and likely a mistake to have TLBUpdate().
It's costy to try to invalidate a single TLB entry whenver a certain
PTE is going to be modified by traversing the entire TLB looking
for the modified PTE because the PTE in question is not in TLB in
most cases. ASID bump could do the invalidation smartly. Solution
is planned for now.
|
| 1.70 | 27-Mar-2000 |
nisimura | Nuke MIPS_16K_PAGE conditional which should be commited in. It
was used for debugg'n purposes which only make senses on particular
hardware configurations and has never been intended to extend pagesize
of NetBSD/mips.
|
| 1.69 | 24-Mar-2000 |
soren | Missing in previous; set cache alias mask properly on processors with
two-way set associative L1 caches.
|
| 1.68 | 19-Mar-2000 |
soren | Updated RM5231 cache code from Jeff Smith and Ethan Solomita at Geocast.
Many thanks.
|
| 1.67 | 03-Mar-2000 |
soda | use callback function to set up secondary cache related things on arc.
XXX - perhaps it is better to separate cache related initialization
from mips_vector_init().
|
| 1.66 | 19-Feb-2000 |
mycroft | Don't print an extra cpu0: prefix.
|
| 1.65 | 01-Feb-2000 |
thorpej | No need for mips_locore_jumpvec to be initialized data.
|
| 1.64 | 28-Jan-2000 |
takemura | CPU specific idle hook and VR idle routine.
|
| 1.63 | 19-Jan-2000 |
thorpej | Move callout initialization to a single location; no need to duplicate
that code all over the place.
|
| 1.62 | 09-Jan-2000 |
shin | split 'options SOFTFLOAT' to
NOFP don't touch FPU registers in kernel
SOFTFLOAT emulate FPU instructions in kernel
|
| 1.61 | 22-Dec-1999 |
tsubai | * news5000 support.
* mips3_VCE[DI] now support L2CacheLSize != 32.
|
| 1.60 | 29-Nov-1999 |
uch | TX3912/22 support. ENABLE_MIPS_TX3900 enables it.
|
| 1.59 | 18-Nov-1999 |
jun | on port-mips@netbsd.org:
Shuichiro URATA <ur@a-r.org> makes kernel softfloat emulation code.
http://www.a-r.org/~ur/softfloat1116.diff.gz
is Patch for
sys/arch/mips/conf/files.mips
sys/arch/mips/mips/fp.S
sys/arch/mips/mips/fpemu.c
sys/arch/mips/mips/genassym.cf
sys/arch/mips/mips/locore.S
sys/arch/mips/mips/mips_machdep.c
sys/arch/mips/mips/process_machdep.c
sys/arch/mips/mips/trap.c
sys/arch/mips/mips/vm_machdep.c
After apply this patch,pmax package binary works on hpcmips!
|
| 1.58 | 20-Oct-1999 |
simonb | Remove unused variable.
|
| 1.57 | 18-Oct-1999 |
soren | branches: 1.57.2; 1.57.4;
Shorten fpuname for built-in FPUs.
|
| 1.56 | 25-Sep-1999 |
shin | branches: 1.56.2;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.55 | 24-Sep-1999 |
nisimura | 'KB' for kilo-bytes as humanize_number().
|
| 1.54 | 16-Aug-1999 |
simonb | Spell "privilege" correctly (correct spelling from Jonathan Stone).
|
| 1.53 | 20-May-1999 |
lukem | * convert to using MI allocsys(). most ports were using an MD allocsys(),
although a couple still used the old pre-4.4-lite (?) mechanism.
* use format_bytes() to format the various printf()s that print out memory sizes
|
| 1.52 | 18-May-1999 |
nisimura | - Move MachSetPID(1) call to pmap_bootstrap() adajacent to kernel pmap
initialization code.
- Abandon mips_init_proc0() and do the 4 lines straightly in MD mach_init().
- Restore a block of code accidentally lost in prevous commit.
- Change the term 'tlbpid' to a MIPS3 nomenclature 'asid'.
- Hide PTE size exposures by symbolic names in locore.S
|
| 1.51 | 25-Apr-1999 |
simonb | g/c REAL_CLISTS.
|
| 1.50 | 24-Apr-1999 |
simonb | Oops, deleted a register_t instead of register in previous.
|
| 1.49 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.48 | 24-Mar-1999 |
mrg | branches: 1.48.4;
completely remove Mach VM support. all that is left is the all the
header files as UVM still uses (most of) these.
|
| 1.47 | 27-Feb-1999 |
scottr | defopt BUFCACHE and BUFPAGES.
|
| 1.46 | 23-Jan-1999 |
nisimura | - Add NEC Vr5400 processor ID.
|
| 1.45 | 15-Jan-1999 |
thorpej | __pmax__ -> pmax, __arc__ -> arc, like other ports.
|
| 1.44 | 15-Jan-1999 |
castor | * Add prototype for mips1_clean_tlb
* Add the correct version of locore_mips1.S [ See previous revision for
description of changes ]
* Use defopt'ed MIPS3_L2CACHE_ABSENT in mips_machdep.c and pmap.c
to avoid generating extraneous code.
* GC pmap_set_referenced in pmap.c
|
| 1.43 | 15-Jan-1999 |
castor | Fix typo in mips3_ConfigCache() -- mips3_L2CachePresent
|
| 1.42 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.41 | 07-Dec-1998 |
nisimura | - Remove improper casts mistakenly creeped in the last commit.
|
| 1.40 | 03-Dec-1998 |
nisimura | - Use explicite structure member reference with 'struct frame' to alter
register values of exception frame pointed with p->p_md.md_regs.
- Local auto variable 'cpustate' in cpu_coredump() was never used correctly.
|
| 1.39 | 02-Nov-1998 |
simonb | Implement the new BUFCACHE option.
|
| 1.38 | 19-Oct-1998 |
tron | Defopt SYSVMSG, SYSVSEM and SYSVSHM.
|
| 1.37 | 18-Oct-1998 |
drochner | Zero-initialize the initial u-area. This cures the "random process killed
by SIGPROF or SIGVTALRM" syndrome.
|
| 1.36 | 05-Oct-1998 |
nisimura | branches: 1.36.2;
* Make cpu_identify() routine table-driven.
* MIPS3 sanity check now allow MIPS1 models to boot.
|
| 1.35 | 02-Oct-1998 |
drochner | set up old style sigmask on COMPAT_ULTRIX too
|
| 1.34 | 01-Oct-1998 |
jonathan | More patches for ARC from Noriyuki Soda:
* commit isapnpvar.h changes required for ARC to support plain isa.
* fixup mistake over mips/include/cpuregs.h.
* mips/mips_machdep.c:
set L2 cache-size for arc, cleanup use of L2cache present
vs L2 cache-size variables. check for no L2 cache on kernels
configured to require one. misc cleanups.
* mips/mpis/trap.c: more locore stack-traceback label cleanup.
XXX Locore callbacks for mips3, mips4, r4600 cacheflush need more work.
|
| 1.33 | 14-Sep-1998 |
jonathan | Fix typos in signal rework (sc.regs -> sc-regs, rege -> regs).
|
| 1.32 | 13-Sep-1998 |
mycroft | Fix omission in previous; remember to record that we're on the signal stack.
|
| 1.31 | 13-Sep-1998 |
thorpej | Make signal delivery work again.
|
| 1.30 | 11-Sep-1998 |
jonathan | Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.29 | 02-Sep-1998 |
nisimura | - kernel boot flag 'd' now means "enter DDB asap" like as other ports.
- bump cpu_model[] length as the longest name occupies over 30 characters.
- place machine_arch[] beside machine[] for clearity.
- nuke useless #include directives.
- small scale cleanup in vm_machdep.c
|
| 1.28 | 14-Jul-1998 |
mhitch | PS -> SR: PS as alias to SR was removed due to conflict with other usage.
|
| 1.27 | 08-May-1998 |
kleink | Fix some arithmetics lossage on typeless pointers.
|
| 1.26 | 27-Apr-1998 |
jonathan | Commit definition of mips_set_wbflush().
|
| 1.25 | 22-Mar-1998 |
mhitch | Set the PID before setting up the wired TLB entries for proc0. The
mips3_HitFlushDCache() fails with a TLB miss otherwise.
|
| 1.24 | 12-Mar-1998 |
thorpej | Add support for UVM.
|
| 1.23 | 25-Feb-1998 |
thorpej | Pull some code out of N mach_init() functions, and place it in a
common place:
- allocsys(), which computes space for and assigns addresses
to kernel data structures at boot time.
- mips_init_msgbuf(), which initializes the error message
buffer at the end of core.
- mips_init_proc0(), which initializes the U-area for proc0
and nullproc.
|
| 1.22 | 19-Feb-1998 |
thorpej | Implement new style crash dumps for NetBSD/mips, lifted from NetBSD/alpha.
|
| 1.21 | 17-Oct-1997 |
jonathan | Add explicit #include <vm/vm.h> before mips/pte.h is included.
|
| 1.20 | 11-Sep-1997 |
mycroft | Fix execve(2) and *setregs() interfaces so emulations can set registers in a
more correct way. (See tech-kern.)
|
| 1.19 | 09-Aug-1997 |
jonathan | branches: 1.19.2;
Definition of cpu_mhz.
|
| 1.18 | 19-Jul-1997 |
jonathan | branches: 1.18.2;
* Re-apply changes from rev 1.6 of sys/arch/mips/include/reg.h accidentally
undone by rev 1.7:
>redo pmax/include/reg.h
>so that the definitions needed by locore.S are in a separate file,
>pmax/include/regnum.h.
* Add explicit `#include <mips/regnum.h>' where symbolic offsets
into a mips trapframe or struct reg are used..
|
| 1.17 | 01-Jul-1997 |
jonathan | Move generic mips functions setregs(), sendsig(), sys_signal()
to sys/arch/mips/mips/mips_machdep.c. Delete from pica, pmax machdep.c.
Delint pica machdep.c.
|
| 1.16 | 22-Jun-1997 |
jonathan | Disambiguate cache-size message, as suggested by cgd.
|
| 1.15 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.14 | 22-Jun-1997 |
jonathan | Final changes for configuring MIPS1 and MIPS3 in a single kernel.
* cpuregs.h:
rename remaining VMMACH_xxx TLB macros to MIPS_TLB_xxx.
Add compile-time MIPS3-only, compile-time MIPS1-only, and
runtime (both) definitions for number of TLB ASIDs (tlb pids)
and shift count to extract a TLB pid.
* locore.h:
Delete unused vector slot for indexed TLB writes.
mips1 and mips3 TLBs are different enough that we have
to break them out at the caller anyway.
* Add compile-time MIPS3-only andcompile-time MIPS1-only
macros to call locore functions directly by name.
Use the existing method table only if
* mips/mips_machdep.c, mips/trap.c, mips/pmap.c, pmax/machdep.c:
Use MIPS3_ or MIPS1_ specific names for TLB pids in
mips3 and mips1 specific code paths (e.g., creating the kernel stack
for process 0).
Add `options MIPS3' to pmax/conf/GENERIC.
|
| 1.13 | 21-Jun-1997 |
jonathan | More mips1/mips3 changes to cpuregs.h and psl.h:
* cpuregs.h:
Delete unused VMMACH_ names (e.g., duplicates of PTE bits in pte.h).
Change remaining VMMACH_xxx names to MIPS1_xxx or MIPS3_xx.
Fold remaining compile-time definitions into a single #ifdef MIPS3.
* Use MIPS1_ names in locore_r2000.S, mips3_ names in locore_r4000.S
* Garbage-collect MachHitFlushDCache()
* psl.h:
use MIPS1_, MIPS3_ symbolic names for Cause register bits.
change _R3K to MIPS1_, _R4K to MIPS3. Conditionalize for mips1 only,
mips3 only, or when both are defined, use runtime CPUISMIPS3 test.
|
| 1.12 | 19-Jun-1997 |
mhitch | More merged mips1/mips3 support:
Remove cpu-specific routines from locore.S and add them to locore_r2000.S
and locore_r4000.S. Add entries in locore jump vector table for switch_exit()
and the cpu_switch() context resume.
Add offsets into the jump vector to genassym.cf for use in locore.S.
Use same cachesize variables for mips1 and mips3, and rename the variables
per Jonathan's request.
|
| 1.11 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.10 | 16-Jun-1997 |
jonathan | Garbage-collect MIPS_3K_xxx, MIPS_4K_xxx outidde mips/include/cpuregs.h:
MIPS_3K_xxx -> MIPS1_xxx
MIPS_4K_xxx -> MIPS3_xxx
|
| 1.9 | 15-Jun-1997 |
mhitch | More merged MIPS1/MIPS3 support. Added wbflush() and proc_trampoline() to
locore vector. Display level 2 (secondary) cache size.
|
| 1.8 | 08-Jun-1997 |
jonathan | Initialize machine_arch from MACHINE_ARCH.
|
| 1.7 | 06-Jun-1997 |
veego | Add 'char machine_arch[] = "xxx";' for the new sysctl hw.machine_arch.
|
| 1.6 | 13-Oct-1996 |
jonathan | Rename mips CPU-family locore prefixes for case-consistency:
mips_r2000_, mips_R2000_ -> mips1_
mips_r4000_, mips_R4000_ -> mips3_
(which are also, for mnemonic reasons, consistent with gcc flag usage,
rather than using mipsI_ and mipsIII_).
|
| 1.5 | 13-Oct-1996 |
christos | backout previous kprintf change
|
| 1.4 | 11-Oct-1996 |
christos | printf -> kprintf
|
| 1.3 | 07-Oct-1996 |
jonathan | Use "MIPS1" and "MIPS3" as preprocessor tokens to select {config,compile}-time
support for mips-1 (r2000 family) and mips-3 (r4000 family) CPUs.
Avoids inconsistent use of CPU_R2000 and CPU_R3000.
|
| 1.2 | 13-Aug-1996 |
jonathan | * Add declarations for MIPS-III (r4000) locore entrypoints.
* Add initialization code to set MIPS-III exception vector and runtime
jump-table for locore functions.
* Clean up for -Wall, pass 1.
|
| 1.1 | 19-May-1996 |
jonathan | Create mips_machdep.c, which contains Mips-specific functions common
to all mips ports.
So far, this consists of code to initialize a vector, or jump-table, of
pointers to locore functions that require different definitions on different
Mips CPUs (eg., r2000/3000 and r4000); a generic wrapper for setting up
CPU-specific exception vectors; and CPU and FPU identification code.
|
| 1.18.2.2 | 16-Sep-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.18.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.19.2.1 | 08-Sep-1997 |
thorpej | Significantly restructure the way signal state for a process is stored.
Rather than using bitmasks to redundantly store the information kept
in the process's sigacts (because the sigacts was kept in the u-area),
hang sigacts directly off the process, and access it directly.
Simplify signal setup code tremendously by storing information in
the sigacts as an array of struct sigactions, rather than in a different
format, since userspace uses sigactions.
Make sigacts sharable by adding reference counting.
|
| 1.36.2.4 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.36.2.3 | 20-Oct-1998 |
drochner | sync to trunk rev. 1.38
|
| 1.36.2.2 | 19-Oct-1998 |
drochner | sync to trunk rev. 1.37
|
| 1.36.2.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.48.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.56.2.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.57.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.57.2.4 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.57.2.3 | 08-Dec-2000 |
bouyer | Sync with HEAD.
|
| 1.57.2.2 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.57.2.1 | 20-Oct-1999 |
thorpej | Sync w/ trunk.
|
| 1.81.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.90.2.1 | 07-Jun-2001 |
he | Pull up revisions 1.114-1.115 (via patch, requested by hubertf,
reviewed by thorpej):
Implement power saving for RM5200 and RM7000 CPUs, as used in
e.g. Cobalt RaQ2.
|
| 1.112.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.118.2.6 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.118.2.5 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.118.2.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.118.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.118.2.2 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.118.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.119.2.2 | 10-Nov-2001 |
uch | new cache code for R5900 and playstation2
|
| 1.119.2.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.120.2.30 | 19-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.120.2.29 | 17-Dec-2002 |
thorpej | * Always include the SR in the gregset.
* Create space for the 32 64-bit double-precision registers used
in 64-bit ABIs.
This means we don't follow the SVR4 MIPS PS document, but that document
is somewhat out of date with regard to modern MIPS processors.
Per discussion with Chris Demetriou.
|
| 1.120.2.28 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.120.2.27 | 02-Dec-2002 |
wdk | Tidy up for Scheduler Activations:
- Change curproc -> curlwp
- Display LWP id along with PID for kernel generated messages
|
| 1.120.2.26 | 23-Nov-2002 |
wdk | Remove upcall trampoline code.
|
| 1.120.2.25 | 20-Nov-2002 |
wdk | Add missing header files again.
|
| 1.120.2.24 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.120.2.23 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.120.2.22 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.120.2.21 | 27-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.120.2.20 | 13-Aug-2002 |
simonb | Remove redundant 'struct sigframe' declaration.
Include a couple of headers to get this to compile.
|
| 1.120.2.19 | 13-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.120.2.18 | 02-Aug-2002 |
gmcgarry | LWPify. sigframe definition is in frame.h now.
|
| 1.120.2.17 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.120.2.16 | 12-Jul-2002 |
nathanw | No longer need to pull in lwp.h; proc.h pulls it in for us.
|
| 1.120.2.15 | 06-Jul-2002 |
simonb | Fix #ifdef SOFTFLOAT code:
s/p->p_addr/l->l_addr/ and s/p->p_md/l->l_md/
|
| 1.120.2.14 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.120.2.13 | 21-Jun-2002 |
gmcgarry | need <sys/sa.h> before <syscallargs.h>; pull in <mips/userret.h>; LWPify
some more
|
| 1.120.2.12 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.120.2.11 | 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.120.2.10 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.120.2.9 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.120.2.8 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.120.2.7 | 28-Dec-2001 |
nathanw | Garbage collect cpu_stashcontext().
|
| 1.120.2.6 | 17-Dec-2001 |
nathanw | Convert to new, smaller cpu_upcall().
|
| 1.120.2.5 | 28-Nov-2001 |
wdk | * Move struct siginfo into frame.h header file
* In cpu_upcall create a stack frame for carrying 2 extra arguments.
We can only pass 4 arguments in registers, so sa_arg and sa_upcall
needs to be passed on the stack.
* Use sadata_upcall_free()
|
| 1.120.2.4 | 18-Nov-2001 |
wdk | Fix typo in last commit
|
| 1.120.2.3 | 18-Nov-2001 |
wdk | Fix off-by-one error when copying register set
|
| 1.120.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.120.2.1 | 14-Nov-2001 |
wdk | file mips_machdep.c was added on branch nathanw_sa on 2001-11-17 23:43:43 +0000
|
| 1.129.2.4 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.129.2.3 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.129.2.2 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.129.2.1 | 17-May-2002 |
gehenna | Replace the access to devsw table and the hard-coded major with devsw API.
|
| 1.165.2.6 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.165.2.5 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.165.2.4 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.165.2.3 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.165.2.2 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.165.2.1 | 03-Jul-2003 |
wrstuden | LWP-ify to get algor/P4032 working.
|
| 1.175.2.1 | 04-Jul-2004 |
he | branches: 1.175.2.1.2;
Pull up revisoin 1.176 (requested by simonb in ticket #589):
Changes fixing PR#25942:
o In cpu_{set,get}context(), copy fht FP registers themselves
and the FP CSR separately, and from a correctly sized
__fpregset_t. The FP CSR is copied separately to avoid
endianness or alignment issues.
|
| 1.175.2.1.2.1 | 13-Sep-2005 |
riz | Pull up following revision(s) (requested by tsutsui in ticket #5829):
sys/arch/mips/mips/mips_machdep.c: revision 1.179
Initilize CP0 pagemask register properly.
Fixes PR 30590 and some other mips port.
|
| 1.177.8.2 | 19-Nov-2007 |
bouyer | Pull up following revision(s) (requested by simonb in ticket #1865):
sys/arch/mips/include/cpuregs.h: revision 1.72
sys/arch/mips/mips/mips_machdep.c: revision 1.195
Recognise the R2000A cpu as found in some pmaxen.
From Dennis Grevenstein on port-pmax@.
--
|
| 1.177.8.1 | 11-Sep-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #758):
sys/arch/mips/mips/mips_machdep.c: revision 1.179
Initilize CP0 pagemask register properly.
Fixes PR 30590 and some other mips port.
|
| 1.178.2.7 | 27-Feb-2008 |
yamt | sync with head.
|
| 1.178.2.6 | 07-Dec-2007 |
yamt | sync with head
|
| 1.178.2.5 | 27-Oct-2007 |
yamt | sync with head.
|
| 1.178.2.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.178.2.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.178.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.178.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.184.12.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.184.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.184.8.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.184.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.184.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.184.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.187.4.2 | 10-Dec-2006 |
yamt | sync with head.
|
| 1.187.4.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.187.2.5 | 01-Feb-2007 |
ad | Sync with head.
|
| 1.187.2.4 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.187.2.3 | 11-Jan-2007 |
ad | Checkpoint work in progress.
|
| 1.187.2.2 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.187.2.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.190.4.2 | 04-Sep-2008 |
skrll | Sync with netbsd-4.
|
| 1.190.4.1 | 06-Jan-2008 |
wrstuden | Catch up to netbsd-4.0 release.
|
| 1.190.2.2 | 20-Aug-2008 |
bouyer | Pull up following revision(s) (requested by tsutsui in ticket #1181):
sys/arch/mips/mips/mips_machdep.c: revision 1.202
Add CPU_MIPS_DOUBLE_COUNT to R10K family CPUs and
also remove (unused?) MIPS_NOT_SUPP flag from them.
Problem on R10k O2 is reported by martin@ on port-sgimips.
|
| 1.190.2.1 | 24-Oct-2007 |
xtraeme | Pull up following revision(s) (requested by simonb in ticket #936):
sys/arch/mips/include/cpuregs.h: revision 1.72
sys/arch/mips/mips/mips_machdep.c: revision 1.195
Recognise the R2000A cpu as found in some pmaxen.
From Dennis Grevenstein on port-pmax@.
|
| 1.192.2.5 | 19-Apr-2007 |
ad | ... but temporarily continue to set them here too, until I figure out why
pmax clobbers them. Forcing things into the data segment doesn't help.
|
| 1.192.2.4 | 19-Apr-2007 |
ad | Set up curlwp/curcpu very early, before calling mach_init. Avoids a null
pointer deref on curcpu().
|
| 1.192.2.3 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.192.2.2 | 21-Mar-2007 |
ad | Initial changes for MIPS. Not yet working under gxemul.
|
| 1.192.2.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.193.10.2 | 16-Oct-2007 |
garbled | Sync with HEAD
|
| 1.193.10.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.193.4.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.193.2.5 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.193.2.4 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.193.2.3 | 23-Oct-2007 |
ad | Sync with head.
|
| 1.193.2.2 | 18-Oct-2007 |
ad | cpu_need_resched: RESCHED_IMMED refers to IPIs, so ignore it and
always do aston(l).
|
| 1.193.2.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.194.12.1 | 18-Oct-2007 |
yamt | sync with head.
|
| 1.194.10.3 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.194.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.194.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.194.8.3 | 09-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.194.8.2 | 21-Nov-2007 |
joerg | Sync with HEAD.
|
| 1.194.8.1 | 26-Oct-2007 |
joerg | Sync with HEAD.
Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.
|
| 1.195.2.1 | 21-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.196.2.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.199.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.199.6.3 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.199.6.2 | 28-Sep-2008 |
mjf | Sync with HEAD.
|
| 1.199.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.200.2.6 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.200.2.5 | 11-Mar-2010 |
yamt | sync with head
|
| 1.200.2.4 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.200.2.3 | 20-Jun-2009 |
yamt | sync with head
|
| 1.200.2.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.200.2.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.201.6.2 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.201.6.1 | 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.201.2.4 | 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.201.2.3 | 22-Jun-2008 |
wrstuden | Re-add cpu_upcall() and page fault code. i386 kernels now compile.
They don't boot, but that seems to be a consequence of current from the
day this branch was started.
|
| 1.201.2.2 | 14-May-2008 |
wrstuden | Per discussion with ad at n dot o, revert signal mask handling
changes.
The l_sigstk changes are most likely totally un-needed as SA will
never use a signal stack - we send an upcall (or will as other
diffs are brought in).
The l_sigmask changes were too controvertial. In all honesty, I
think it's probably best to revert them. The main reason they were
there is the fact that in an SA process, we don't mask signals per
kernel thread, we mask them per user thread. In the kernel, we want
them all to get turned into upcalls. Thus the normal state of
l_sigmask in an SA process is for it to always be empty.
While we are in the process of delivering a signal, we want to
temporarily mask a signal (so we don't recursively exhaust our
upcall stacks). However signal delivery is rare (important, but
rare), and delivering back-to-back signals is even rarer. So rather
than cause every user of a signal mask to be prepared for this very
rare case, we will just add a second check later in the signal
delivery code. Said change is not in this diff.
This also un-compensates all of our compatability code for dealing
with SA. SA is a NetBSD-specific thing, so there's no need for
Irix, Linux, Solaris, SVR4 and so on to cope with it.
As previously, everything other than kern_sa.c compiles in i386
GENERIC as of this checkin. I will switch to ALL soon for compile
testing.
|
| 1.201.2.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.205.4.2 | 09-Jun-2009 |
snj | Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.205.4.1 | 02-Feb-2009 |
snj | branches: 1.205.4.1.2;
Pull up following revision(s) (requested by ad in ticket #346):
sys/arch/alpha/alpha/machdep.c: revision 1.311
sys/arch/amiga/amiga/machdep.c: revision 1.211
sys/arch/atari/atari/machdep.c: revision 1.153
sys/arch/hp700/hp700/machdep.c: revision 1.53
sys/arch/i386/i386/dumpsys.c: revision 1.5
sys/arch/mips/mips/mips_machdep.c: revision 1.206
sys/arch/mvme68k/mvme68k/machdep.c: revision 1.132
sys/arch/news68k/news68k/machdep.c: revision 1.75
sys/arch/next68k/next68k/machdep.c: revision 1.88
sys/arch/sparc/sparc/machdep.c: revision 1.285
sys/arch/sparc64/sparc64/machdep.c: revision 1.230
sys/arch/sun2/sun2/machdep.c: revision 1.56
sys/arch/sun3/sun3/machdep.c: revision 1.188
sys/arch/sun3/sun3x/machdep.c: revision 1.114
sys/arch/x68k/x68k/machdep.c: revision 1.153
dumpsys: don't spew numbers into the log.
|
| 1.205.4.1.2.1 | 09-Jun-2009 |
snj | branches: 1.205.4.1.2.1.2;
Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.205.4.1.2.1.2.69 | 15-Dec-2012 |
matt | Add initial support for XLP II (XLP2XX/XLP1XX).
|
| 1.205.4.1.2.1.2.68 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.205.4.1.2.1.2.67 | 16-Feb-2012 |
matt | mips_nfreelist is the one past the highest freelist used.
|
| 1.205.4.1.2.1.2.66 | 14-Feb-2012 |
matt | Fix various LP64 thinkos.
|
| 1.205.4.1.2.1.2.65 | 13-Feb-2012 |
matt | Add mm_md_direct_mapped_virt (inverse of mm_md_direct_mapped_phys). Add a
third argument, vsize_t *, which, if not NULL, returns the amount of virtual
space left in that direct mapped segment.
Get rid most of the individual direct_mapped assert and use the above
routines instead.
Improve kernel core dump code.
|
| 1.205.4.1.2.1.2.64 | 13-Feb-2012 |
matt | Fix emulation to not panic when it encounters something it doesn't like.
(so running crashme won't crash the system).
Centralize the trapsignal processing so we can print out the trap info if
so desired.
Add a machdep.printfataltraps sysctl knob.
|
| 1.205.4.1.2.1.2.63 | 09-Feb-2012 |
matt | Add mips_page_to_pggroup which return what pggroup a page belongs to.
Eradicate VM_FREELIST_MAX
When adding pages to the system, track what freelists get pages.
|
| 1.205.4.1.2.1.2.62 | 28-Jan-2012 |
matt | Fix mm_md_direct_mapped_phys
|
| 1.205.4.1.2.1.2.61 | 28-Jan-2012 |
matt | Add mm_md_direct_mapped_phys from current.
|
| 1.205.4.1.2.1.2.60 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.205.4.1.2.1.2.59 | 27-Dec-2011 |
matt | Use mips_ksegx_start (not mips3_ksegx_start).
|
| 1.205.4.1.2.1.2.58 | 27-Dec-2011 |
matt | Since MIPS supports multiple page sizes now, add pg_size to cpu_kcore_hdr_t
as well members to decode ksegx addresses.
|
| 1.205.4.1.2.1.2.57 | 23-Dec-2011 |
matt | Fix MIPS1 typo.
|
| 1.205.4.1.2.1.2.56 | 23-Dec-2011 |
matt | add entries for MIPS 1074K and RMI XLP3XX and XLP8XX.
for mipsNN, use TLB random register in case there are more than 64 TLB entries.
Add cpuname argument to cpu_identify. Fix bug in mips_page_physaddr.
Print out number of ASIDs in cpu_identify.
|
| 1.205.4.1.2.1.2.55 | 13-Dec-2011 |
matt | If CID is RMI and we MIPS64R2, be sure to mips64_rmixl_*.
|
| 1.205.4.1.2.1.2.54 | 01-Dec-2011 |
matt | Fix $NetBSD$
|
| 1.205.4.1.2.1.2.53 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.205.4.1.2.1.2.52 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.205.4.1.2.1.2.51 | 29-Dec-2010 |
matt | Janitorial work.
Move emulation prototypes here and get rid of StudLyCaps.
Remove kludgery for lwp/setfunc trampoline and just grab them of the damn
structure.
Make mips_locore_jumpvec contain the routines that don't get reassigned
and move wbflush to mips_locoresw since it does get overridden.
|
| 1.205.4.1.2.1.2.50 | 24-Dec-2010 |
matt | Bring locore_mips1.S into the new world order. You can diff locore_mips1.S
against mipsX_subr.S and have reasonable output. A lot of comments have
been changed to be common between the two. The ordering of vectors/functions
have also changed to improve diff output.
|
| 1.205.4.1.2.1.2.49 | 22-Dec-2010 |
matt | Rework how fixups are processed. Inside of generating a table, we just
scan kernel text for jumps to locations between (__stub_start, __stub_end]
and if found, we actually decode the instructions in the stub to find out
where the stub would eventually jump to and then patch the original jump
to jump directly to it bypassing the stub. This is slightly slower than
the previous method but it's a simplier and new stubs get automagically
handled.
|
| 1.205.4.1.2.1.2.48 | 18-Aug-2010 |
matt | Make sure UX is set if KX is set. Use (intptr_t), not (int).
|
| 1.205.4.1.2.1.2.47 | 09-Jun-2010 |
matt | Add support for setting/clearing PK_32 on _LP64 kernels. Make cpu_proc_fork
a real function and add it to vm_machdep.c and let it copy PK_32 on fork.
Properly clear/set PK_32 depending on ABI in setregs. Lack of PX_32 use
tracked down by Cliff Neighbors. [Ya! ps now works!]
|
| 1.205.4.1.2.1.2.46 | 28-May-2010 |
matt | When use N32 and we are on a MIPS64 chip, enable 64-bit instructions via
PX so that we can still use the TLB miss exception instead of the XTLB miss
exception path.
|
| 1.205.4.1.2.1.2.45 | 06-May-2010 |
cliff | add cputab[] entries for XLS models 208, 204, 108, 104
|
| 1.205.4.1.2.1.2.44 | 27-Apr-2010 |
cliff | add cputab[] entry for RMI CPU MIPS_XLR732C
|
| 1.205.4.1.2.1.2.43 | 12-Apr-2010 |
cliff | - add whitespace to make print format of regions in
mips_page_physload() more readable
|
| 1.205.4.1.2.1.2.42 | 29-Mar-2010 |
cliff | - add a cputab[] entry for RMI XLR732 (other XLR models are TBD)
|
| 1.205.4.1.2.1.2.41 | 21-Mar-2010 |
cliff | mips_vector_init now takes an argument to specify splsw.
NULL specifies use the default 'std_splsw'
|
| 1.205.4.1.2.1.2.40 | 01-Mar-2010 |
matt | Add secondary processor spinup support (cpu_trampoline is in locore_mips3.S).
Nuke lse_boot_secondary_processors (not needed).
Move cpu_info_store to cpu_subr.C
|
| 1.205.4.1.2.1.2.39 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.205.4.1.2.1.2.38 | 28-Feb-2010 |
matt | #define __INTR_PRIVATE
Add calls to fixup the splcalls and fixup the call to mips_cpu_switch_resume
in cpu_switchto (which remove an indirect calls from a critical routine).
|
| 1.205.4.1.2.1.2.37 | 27-Feb-2010 |
matt | Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
|
| 1.205.4.1.2.1.2.36 | 25-Feb-2010 |
matt | Add mipsXX_tlb_record_asids - records what ASIDs have valid TLB entries in
the TLB.
Move some mips3 specific routines from locore.S to locore_mips3.S
|
| 1.205.4.1.2.1.2.35 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.205.4.1.2.1.2.34 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.205.4.1.2.1.2.33 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.205.4.1.2.1.2.32 | 06-Feb-2010 |
matt | When choosing a msgbuf for a LP32 kernel, make sure it's mappable via KSEG0
|
| 1.205.4.1.2.1.2.31 | 01-Feb-2010 |
matt | Allow port-specific code to init lwp0.l_addr early. (pmax needs it so it
call badaddr).
|
| 1.205.4.1.2.1.2.30 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.205.4.1.2.1.2.29 | 20-Jan-2010 |
matt | Mark RMIXL cpus as CPU_MIPS_I_DCACHE_COHERENT.
Print out whether the L1 cache is coherent or not.
|
| 1.205.4.1.2.1.2.28 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.205.4.1.2.1.2.27 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.205.4.1.2.1.2.26 | 16-Jan-2010 |
matt | Rework the exception code. All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy. This also allows us to branch to unused space space
since the relative locations will remain the same.
When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU. The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).
kill outofworld and just let trap panic, if it can. Allow for sb1_subr.S
or rmixl_subr.S in the future. Fix TLB read/write code.
|
| 1.205.4.1.2.1.2.25 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.205.4.1.2.1.2.24 | 14-Jan-2010 |
matt | Simplify mips_page_physload.
|
| 1.205.4.1.2.1.2.23 | 14-Jan-2010 |
matt | More fixes for the CFATTAL_DECL_NEW changes and rmixl cpucore/cpu changes.
|
| 1.205.4.1.2.1.2.22 | 13-Jan-2010 |
cliff | - spec CIDFL's for RMI L2, cores, threads attributes
- add cputab[] entry for RMI XLS404LITE
- cpu_identify() now gets device_t arg; use it instead of static 'label'
|
| 1.205.4.1.2.1.2.21 | 09-Jan-2010 |
matt | On _LP64, allocate kernel memory from the first 4GB. Otherwise first 512MB.
Until we get full bounce buffer support, this should with device that only
support <4GB addresses.
|
| 1.205.4.1.2.1.2.20 | 06-Jan-2010 |
matt | Fix a thinko (last -> start + size)
|
| 1.205.4.1.2.1.2.19 | 31-Dec-2009 |
matt | Use mips_page_physload and mips_init_lwp0_uarea.
|
| 1.205.4.1.2.1.2.18 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.205.4.1.2.1.2.17 | 13-Nov-2009 |
cliff | - pridtab definition is removed to cpu.h
- pritab entries now initialize cpu_cp0flags and cpu_cidflags
except for RMI XLS entries, these are all 0 for now.
- pridtab entries for RMI XLS use those new fields and CPU_MIPS_HAVE_MxCR
|
| 1.205.4.1.2.1.2.16 | 03-Nov-2009 |
uebayasi | Add XLS416.
|
| 1.205.4.1.2.1.2.15 | 22-Sep-2009 |
cliff | add entries in cputab[] for RMI XLS408 and XLS408LITE
|
| 1.205.4.1.2.1.2.14 | 16-Sep-2009 |
matt | Set early clobber on status. Make sure to preserve KX.
|
| 1.205.4.1.2.1.2.13 | 15-Sep-2009 |
cliff | MIPS_XLS616 gets CPU_MIPS_NO_LLADDR
|
| 1.205.4.1.2.1.2.12 | 13-Sep-2009 |
cliff | - add support for MIPS_XLS616.
- add RMI and others to cidnames[]
- use MIPS_PHYS_TO_XKPHYS_CACHED to make va for msgbuf and maddr #ifdef _LP64
|
| 1.205.4.1.2.1.2.11 | 12-Sep-2009 |
matt | Fix a few IPL32 kernel thinkos.
|
| 1.205.4.1.2.1.2.10 | 12-Sep-2009 |
matt | Add COMPAT_NETBSD32 support.
|
| 1.205.4.1.2.1.2.9 | 12-Sep-2009 |
matt | Fix PFN width calculation.
|
| 1.205.4.1.2.1.2.8 | 11-Sep-2009 |
matt | Add code to probe TLB for VA/PA/PG_MASK sizes
Increase waynames to include 8-way.
|
| 1.205.4.1.2.1.2.7 | 08-Sep-2009 |
matt | For LP64 kernels, only use KSEG0 for pmap_steal_memory. Everything else uses
XKPHYS. Use the new MIPS_PHYS_TO_XKPHYS_{,UN}CACHED macros.
|
| 1.205.4.1.2.1.2.6 | 08-Sep-2009 |
uebayasi | To be consistent, always cast pointers to (intptr_t) even if the address is
in userspace.
Reviewed By: matt
|
| 1.205.4.1.2.1.2.5 | 07-Sep-2009 |
matt | Set segbase to an invalid kernel address by default.
|
| 1.205.4.1.2.1.2.4 | 23-Aug-2009 |
matt | PRIxVADDR, PRIdVSIZE, PRIxVSIZE, or PRIxPADDR as appropriate.
Use __intXX_t or __uintXX_t as appropriate in <mips/types.h>
|
| 1.205.4.1.2.1.2.3 | 23-Aug-2009 |
matt | Change lazy fp load/save is done. fpcurlwp is never NULL.
If no current lwp has the FP, then fpcurlwp is set to lwp0.
this allows many check for NULL and avoids a few null-derefs.
Since savefpregs clear COP1, loadfpregs can be called to reload
fpregs. If it notices that situation, it just sets COP1 and returns
Save does not reset fpcurlwp, just clears COP1. load does set fpcurlwp.
If MIPS3_SR_FR is set, all 32 64-bit FP registers are saved/restored via Xdc1.
If MIPS3_SR_FR is clear, only 32 32-bit FP register are saved/restore via Xwc1.
This preserves the existing ABI.
|
| 1.205.4.1.2.1.2.2 | 21-Aug-2009 |
matt | Make prototype locoresw const.
Don't cast l_md.md_regs anymore.
Make FP save/resume ABI agnostic.
|
| 1.205.4.1.2.1.2.1 | 20-Aug-2009 |
uebayasi | Cast register_t to intptr_t before casting to (void *) because
sizeof(register_t) == 64 and sizeof(void *) == 32 in N32 ABI.
|
| 1.205.2.3 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.205.2.2 | 03-Mar-2009 |
skrll | Sync with HEAD.
|
| 1.205.2.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.208.2.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.225.4.8 | 12-Jun-2011 |
rmind | sync with head
|
| 1.225.4.7 | 31-May-2011 |
rmind | sync with head
|
| 1.225.4.6 | 21-Apr-2011 |
rmind | sync with head
|
| 1.225.4.5 | 05-Mar-2011 |
rmind | sync with head
|
| 1.225.4.4 | 30-May-2010 |
rmind | sync with head
|
| 1.225.4.3 | 25-Apr-2010 |
rmind | A round of compile and other fixes to previous.
|
| 1.225.4.2 | 25-Apr-2010 |
rmind | - Invent mm_md_getva() and mm_md_relva() routines, provided by MD and
indicated with __HAVE_MM_MD_PREFER_VA. It will be used to deal with
cache aliasing issues and thus fix little MIPS, ARM and friends.
- Convert dev_mem_readwrite() to use unmanaged mappings. Fix a missed
offset addition in a case of direct map. Sprinkle various comments in
the memory device driver.
- Add missing direct map handling on hp700 and vax. Make checks across
m68k ports more consistent, reduce the diffs. Fix kernacc check miss
on news68k. Minor off-by-one fix for alpha. Add MEMC_PHYS_BASE for
mmap() case check on acorn26. Misc clean-up.
|
| 1.225.4.1 | 18-Mar-2010 |
rmind | Unify /dev/{mem,kmem,zero,null} implementations in MI code. Based on patch
from Joerg Sonnenberger, proposed on tech-kern@, in February 2008.
Work and depression still in progress.
|
| 1.225.2.3 | 27-May-2010 |
uebayasi | Fix build.
|
| 1.225.2.2 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.225.2.1 | 28-Apr-2010 |
uebayasi | Always use struct vm_physseg *vm_physmem_ptrs[] in MD code.
|
| 1.231.4.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.231.4.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.231.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.240.2.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.250.6.5 | 06-Mar-2012 |
mrg | sync to -current
|
| 1.250.6.4 | 06-Mar-2012 |
mrg | sync to -current
|
| 1.250.6.3 | 04-Mar-2012 |
mrg | sync to latest -current.
|
| 1.250.6.2 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.250.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.250.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.250.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.255.2.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.255.2.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.255.2.1 | 23-Jun-2013 |
tls | resync from head
|
| 1.256.6.1 | 18-May-2014 |
rmind | sync with head
|
| 1.259.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.262.2.5 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.262.2.4 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.262.2.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.262.2.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.262.2.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.272.2.4 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.272.2.3 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.272.2.2 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.272.2.1 | 20-Jul-2016 |
pgoyette | Adapt the machine/arch dependent code to the new {b,c}devsw reference
counting.
XXX Most of these will require testing by someone other than myself, as
I have a limited selection of hardware!
|
| 1.276.6.2 | 11-May-2017 |
pgoyette | Sync with HEAD
|
| 1.276.6.1 | 27-Apr-2017 |
pgoyette | Restore all work from the former pgoyette-localcount branch (which is
now abandoned doe to cvs merge botch).
The branch now builds, and installs via anita. There are still some
problems (cgd is non-functional and all atf tests time-out) but they
will get resolved soon.
|
| 1.277.2.1 | 10-Jun-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #22):
sys/arch/mips/mips/mips_machdep.c: revision 1.278
sys/arch/mips/mips/pmap_machdep.c: revision 1.21
Always use XKPHYS for pool pages on _LP64; otherwise use KSEG0
--
Maintain the split of physical memory into the defined freelists, but
only force pool pages to VM_FREELIST_FIRST512M for non _LP64
|
| 1.278.6.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.279.4.1 | 16-Jul-2020 |
martin | Pull up following revision(s) (requested by simonb in ticket #1016):
sys/arch/mips/mips/mips_machdep.c: revision 1.294
Fix mm_md_kernacc() for 64 bit kernels (including n32):
- FAULT for any physical address less than start of cached XKPHY address.
- Pass any remaining physical address less then end of RAM.
- Pass any remaining physical address within the KEGS0 kernel address range.
Ignore all remaining addresses and fall back to uvm_kernacc() for checking
virtual address ranges.
Fixes pmap(1) (and probably other kmem grovellers).
|
| 1.300.4.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.300.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.301.2.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.306.2.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.21 | 08-Sep-2024 |
rillig | fix a/an grammar in obvious cases
|
| 1.20 | 10-Nov-2021 |
msaitoh | branches: 1.20.10;
s/acutal/actual/ in comment.
|
| 1.19 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.18 | 16-Mar-2009 |
dsl | branches: 1.18.4; 1.18.6; 1.18.8;
ANSIfy functions with function-pointer arguments
|
| 1.17 | 14-Mar-2009 |
dsl | Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)
|
| 1.16 | 03-Jan-2008 |
joerg | branches: 1.16.10; 1.16.18; 1.16.24; 1.16.28;
Add missing include of dev/clock_subr.h.
|
| 1.15 | 08-Mar-2006 |
lukem | branches: 1.15.40; 1.15.46; 1.15.54;
Use the SI capitalization for "Hz", "kHz", and "MHz" in comments and strings.
Add a space between numbers and Hz unit.
|
| 1.14 | 25-Feb-2006 |
wiz | branches: 1.14.2; 1.14.4;
Fix some typos.
|
| 1.13 | 11-Dec-2005 |
christos | branches: 1.13.2; 1.13.4; 1.13.6;
merge ktrace-lwp.
|
| 1.12 | 01-Jan-2005 |
simonb | branches: 1.12.10;
Provide assembly versions of the clock timing calculation loops that
aren't effected by changes in compiler optimisation.
Fixes PR port-mips/26959 from Izumi Tsutsui
|
| 1.11 | 05-Mar-2002 |
simonb | branches: 1.11.14;
Add support for MIPS32 and MIPS64 architectures:
- move away from using CPUISMIPS3; use MIPS_HAS_CLOCK instead.
|
| 1.10 | 04-Oct-2000 |
cgd | branches: 1.10.4; 1.10.8;
rename mips_read_causereg -> mips_cp0_cause_read. nuke prototype
for mips_read_statusreg (which was apparently never implemented).
Provide prototypes and implementations for mips_cp0_cause_write,
mips_cp0_status_read, and mips_cp0_status_write. (Writing can, of
course, be quite dangerous.)
|
| 1.9 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.8 | 03-Dec-1999 |
nisimura | Decouple DECstation binding, use 'dev/dec/mcclock_pad32.h' for
implementation consistency.
|
| 1.7 | 24-Apr-1999 |
simonb | branches: 1.7.2; 1.7.8;
Nuke register and remove trailling white space.
|
| 1.6 | 07-Apr-1999 |
simonb | Make unconditional clock cycle counter display conditional on DEBUG
being defined.
|
| 1.5 | 13-Mar-1999 |
jonathan | branches: 1.5.2;
Pad out mips1 inter-tick delay loop with two nops, to match
gcc-2.7.2.2+myc1 calibration.
XXX rewrite in assembler to remove compiler dependency.
|
| 1.4 | 01-Mar-1999 |
jonathan | Recalibrate MIPS3 delay constants.
XXX mips4, faster clocks than 100MHz?
|
| 1.3 | 16-Feb-1999 |
jonathan | Bump mips3 CPU-mhz timing threshholds by 10% due to egcs wins.
XXX mips1 not recalibrated.
|
| 1.2 | 14-Aug-1997 |
jonathan | branches: 1.2.2;
Add checks for DS 3100, 2100. Use more generous delay values, these
systems may be memory-bound.
|
| 1.1 | 09-Aug-1997 |
jonathan | MIPS cpu-speed detection using mc146818 clock.
Compute CPU speed(MHz) and loop multiplier for DELAY() based on
counting empty loop between mcclock ticks. New global: cpu_mhz.
Change pmax/pmax/machdep.c to build baseboard model names from cpu_mhz.
Set 'cpuspeed' for more realistic DELAY() on mips3 models.
Mips CPU constants, testing, and calibration from D. Sean Davidson
<davidson@zk3.dec.com> and Simon Burge <simonb@telstra.com.au>.
|
| 1.2.2.2 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.2.2.1 | 14-Aug-1997 |
thorpej | file mips_mcclock.c was added on branch marc-pcmcia on 1997-08-23 07:11:19 +0000
|
| 1.5.2.1 | 07-Apr-1999 |
simonb | branches: 1.5.2.1.2;
Pull up rev 1.6 from trunk:
Make unconditional clock cycle counter display conditional on
DEBUG being defined.
|
| 1.5.2.1.2.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.7.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.7.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.10.8.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.10.4.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.11.14.1 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.12.10.2 | 21-Jan-2008 |
yamt | sync with head
|
| 1.12.10.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.13.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.13.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.13.2.1 | 01-Mar-2006 |
yamt | sync with head.
|
| 1.14.4.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.14.2.1 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.15.54.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.15.46.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.15.40.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.16.28.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.16.28.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.16.24.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.16.18.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.16.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.18.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.18.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.18.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.20.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.6 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.5 | 11-Dec-2005 |
christos | branches: 1.5.96; 1.5.100; 1.5.106; 1.5.108;
merge ktrace-lwp.
|
| 1.4 | 01-Jan-2005 |
simonb | Provide assembly versions of the clock timing calculation loops that
aren't effected by changes in compiler optimisation.
Fixes PR port-mips/26959 from Izumi Tsutsui
|
| 1.3 | 05-Mar-2002 |
simonb | branches: 1.3.14;
ANSIfy.
|
| 1.2 | 03-Dec-1999 |
nisimura | branches: 1.2.8; 1.2.12;
Decouple DECstation binding, use 'dev/dec/mcclock_pad32.h' for
implementation consistency.
|
| 1.1 | 09-Aug-1997 |
jonathan | branches: 1.1.2; 1.1.22; 1.1.28;
MIPS cpu-speed detection using mc146818 clock.
Compute CPU speed(MHz) and loop multiplier for DELAY() based on
counting empty loop between mcclock ticks. New global: cpu_mhz.
Change pmax/pmax/machdep.c to build baseboard model names from cpu_mhz.
Set 'cpuspeed' for more realistic DELAY() on mips3 models.
Mips CPU constants, testing, and calibration from D. Sean Davidson
<davidson@zk3.dec.com> and Simon Burge <simonb@telstra.com.au>.
|
| 1.1.28.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.1.22.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.1.2.2 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.1.2.1 | 09-Aug-1997 |
thorpej | file mips_mcclock.h was added on branch marc-pcmcia on 1997-08-23 07:11:20 +0000
|
| 1.2.12.1 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.2.8.1 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.3.14.1 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.5.108.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.5.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.100.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.5.96.1 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.6 | 30-May-2020 |
tsutsui | Revert 0(sp) -> CALLFRAME_S0(sp) changes in rev 1.4.
0(sp) is safe here even on O32 because the only callee function
mips_cp0_cause_read() doesn't take arguments, but it's caller's
responsibility to choose proper stackframe region and the name
of CALLFRAME_S0 is just confusing. No binary change.
|
| 1.5 | 28-Mar-2011 |
tsutsui | Use REG_L (not REG_S) to restore a register value.
|
| 1.4 | 14-Dec-2009 |
matt | branches: 1.4.4; 1.4.6;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.3 | 28-Apr-2008 |
martin | branches: 1.3.14; 1.3.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.2 | 11-Dec-2005 |
christos | branches: 1.2.42; 1.2.74; 1.2.76; 1.2.78;
merge ktrace-lwp.
|
| 1.1 | 01-Jan-2005 |
simonb | branches: 1.1.4;
Provide assembly versions of the clock timing calculation loops that
aren't effected by changes in compiler optimisation.
Fixes PR port-mips/26959 from Izumi Tsutsui
|
| 1.1.4.2 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.1.4.1 | 01-Jan-2005 |
skrll | file mips_mcclock_loop.S was added on branch ktrace-lwp on 2005-01-17 19:29:58 +0000
|
| 1.2.78.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.78.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.2.76.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.2.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.2.42.1 | 18-Jul-2007 |
matt | Use REG_L/REG_S
|
| 1.3.18.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.3.18.1 | 21-Aug-2009 |
matt | Make ABI agnostic. Move locoresw to .rdata
|
| 1.3.14.1 | 28-Mar-2011 |
jym | Cure sync hiccups. Code with compile errors is not really useful, heh.
|
| 1.4.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.4.4.1 | 21-Apr-2011 |
rmind | sync with head
|
| 1.8 | 08-Jan-2020 |
ad | Hopefully fix some problems seen with MP support on non-x86, in particular
where curcpu() is defined as curlwp->l_cpu:
- mi_switch(): undo the ~2007ish optimisation to unlock curlwp before
calling cpu_switchto(). It's not safe to let other actors mess with the
LWP (in particular l->l_cpu) while it's still context switching. This
removes l->l_ctxswtch.
- Move the LP_RUNNING flag into l->l_flag and rename to LW_RUNNING since
it's now covered by the LWP's lock.
- Ditch lwp_exit_switchaway() and just call mi_switch() instead. Everything
is in cache anyway so it wasn't buying much by trying to avoid saving old
state. This means cpu_switchto() will never be called with prevlwp ==
NULL.
- Remove some KERNEL_LOCK handling which hasn't been needed for years.
|
| 1.7 | 06-Jun-2015 |
matt | branches: 1.7.18; 1.7.24;
Add a KDASSERT to make sure interrupts are still enabled.
|
| 1.6 | 27-Sep-2011 |
jym | branches: 1.6.12; 1.6.30;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
| 1.5 | 10-Jul-2011 |
matt | Fix machine/ includes
|
| 1.4 | 06-Apr-2011 |
matt | Change a KASSERT to KASSERTMSG
|
| 1.3 | 20-Feb-2011 |
rmind | Sprinkle some RCS IDs.
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 05-Feb-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file mips_softint.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.9 | 14-Feb-2014 |
matt | Change KASSERTMSG/KDASSERTMSG to use varadic arguments like HEAD.
panic -> vpanic, add panic wrapper to vpanic.
|
| 1.1.2.8 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.7 | 03-Feb-2011 |
cliff | fix KASSERTMSG useage
|
| 1.1.2.6 | 22-Feb-2010 |
matt | Explicitly include <mips/locore.h> since <mips/cpu.h> no longer includes it.
Use curcpu()->ci_data.cpu_nsyscall instead of uvmexp.syscalls.
|
| 1.1.2.5 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.1.2.4 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.1.2.3 | 06-Feb-2010 |
matt | Add some more KASSERTs
|
| 1.1.2.2 | 06-Feb-2010 |
matt | Allow __HAVE_FAST_SOFTINTS to be optional
|
| 1.1.2.1 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.6.30.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.6.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7.24.1 | 17-Jan-2020 |
ad | Sync with head.
|
| 1.7.18.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.9 | 06-Apr-2021 |
simonb | If we're going to print a number in hex, at least put a 0x in front of
it so we can cut'n'paste it into gdb directly. This has only annoyed
me for 25 or so years...
Wrap a long long while here.
|
| 1.8 | 29-Mar-2021 |
simonb | Expose kdbpeek() and kdbrpeek() for dtrace.
|
| 1.7 | 24-Sep-2020 |
mrg | branches: 1.7.2; 1.7.4;
skip kernel-only code on crash.
XXX: we could make verylocore work with a symbol look for crash.
|
| 1.6 | 23-Sep-2020 |
mrg | make !DDB kernels build.
|
| 1.5 | 23-Sep-2020 |
simonb | The current MIPS DDB stacktrace code doesn't work if no symbols are
available, so fall back to old-fashioned unwind code if no symbols.
|
| 1.4 | 17-Aug-2020 |
mrg | avoid build failure on !DBB kernels.
should fix arc, emips, ews4800mips, mipsco, newsmips and pmax builds.
|
| 1.3 | 17-Aug-2020 |
mrg | mostly complete basic port of crash(8) to mips.
tested on mipsel and mips64eb. basic functionality works
on the running kernel, not yet tested on crash dumps.
|
| 1.2 | 17-Aug-2020 |
mrg | port crash(8) to mips. (most of the kernel side.)
- expose parts of _KERNEL to _KMEMUSER as well
- hide more things for _KERNEL
- avoid DB_MACHINE_COMMANDS in crash(8)
- XXX add mips_label_t for !_KERNEL and use it in the pcb to
avoid conflicting with the ddb/crash one
- enable dumppcb
some changes to make stack trace fail instead of SEGV and
the userland changes to crash itself not part of this change.
|
| 1.1 | 15-Aug-2020 |
mrg | move stacktrace_subr() from trap.c into new mips_stacktrace.c so
it can be shared between ddb, other mips kernel components (see
locore), and an upcoming crash(8) port.
remove second copy of kdbpeek() (hidden by old DDB_TRACE
option, but they're functionally equivalent.)
tested on octeon.
ok simonb@
|
| 1.7.4.2 | 17-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.7.4.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.7.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.24 | 25-Apr-2025 |
riastradh | mips: Align stack pointer on entry to signal handler.
Based on a patch by rin@. The variant approach I took puts the stack
frame allocation and alignment logic in one place (getframe, used by
sendsig_siginfo for native (n64, on mips), netbsd32_sendsig_siginfo
for compat32 (n32/o32, on mips), and sendsig_sigcontext (compat 1.6))
and reduces the chance of provoking compiler exploitation of
undefined behaviour by doing arithmetic in uintptr_t rather than in
pointers to large aligned structs. This also ensures the resulting
pointer is aligned for the object (struct siginfo_sigframe, struct
siginfo_sigframe32, struct sigcontext), not just for the ABI stack
alignment.
PR kern/59327: user stack pointer is not aligned properly
|
| 1.23 | 06-Nov-2021 |
thorpej | branches: 1.23.10;
COMPAT_NETBSD32 is all about running the 32-bit flavor of native
binaries on a 64-bit platform[*], as such:
- Make the logic about which "sendsig" flavor to call MI (as it is in the
native 64-bit environment) and follow the same rules as the native 32-bit
environment.
- Make COMPAT_NETBSD32 x COMPAT_16 work the same as it would in the
native 32-bit environment by providing a netbsd32_sendsig_sigcontext_16_hook,
rather than overriding the entire sendsig logic with a netbsd32_sendsig_hook.
- In netbsd32___sigaction_sigtramp(), make sure the compat_netbsd32_16
module is loaded if the trampoline version specifies a sigcontext style
handler, otherwise return EINVAL so that libc can try again with siginfo
style.
[*] ...except for arm32, which uses it to mean "run 32-bit OABI binaries
from the 32-bit EABI environment". Doing it this way was arguably a mistake,
but we are stuck with it for now, so support it by providing a machine-
dependent override for netbsd32_sendsig() that also disables the corresponding
logic in netbsd32___sigaction_sigtramp().
Fixes PR kern/56487.
|
| 1.22 | 27-Oct-2021 |
thorpej | Use the signal trampoline version constants from <sys/signal.h>.
|
| 1.21 | 23-May-2021 |
mrg | fix "uname -p" on mips n32.
this has been returning "mipsn64eb" on my edgerouter4 with the
32 bit uname binary.
introduce o32, n32, and n64 versions of MACHINE_ARCH, and use
them appropriately in PROC_MACHINE_ARCH32(). now o32, n32 and
n64 "uname -p" all return different values.
|
| 1.20 | 12-Dec-2019 |
pgoyette | branches: 1.20.12; 1.20.14;
Rather than keeping a separate mutex, condvar, and pserialize for each
module hook, we can share a common set of synchronization structures.
This cuts the amount of cacheline_aligned data for these structures by
50%.
Note that we still have a per-hook localcount, since we need to count
individual references.
As discussed with riastradh@
Welcome to 9.99.22 !
|
| 1.19 | 20-Nov-2019 |
pgoyette | Move all non-emulation-specific coredump code into the coredump module,
and remove all #ifdef COREDUMP conditional compilation. Now, the
coredump module is completely separated from the emulation modules, and
they can all be independently loaded and unloaded.
Welcome to 9.99.18 !
|
| 1.18 | 01-Mar-2019 |
pgoyette | Rename the MODULE_*_HOOK() macros to MODULE_HOOK_*() as briefly
discussed on irc.
NFCI intended.
Ride the earlier kernel bump - it;s getting crowded.
|
| 1.17 | 27-Jan-2019 |
pgoyette | Merge the [pgoyette-compat] branch
|
| 1.16 | 27-Nov-2018 |
maxv | Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.15 | 31-Oct-2017 |
martin | branches: 1.15.2; 1.15.4;
Allow architectures to define a macro PROC_MACHINE_ARCH(P) and
PROC_MACHINE_ARCH32(P) to override the value for sysctl hw.machine_arch
(native and netbsd32 commpat resp.).
Use these for arm and mips instead of the (not working, noisy, in case
of arm) sysctl override and #ifdef __mips__ in architecture neutral
code.
|
| 1.14 | 16-Mar-2017 |
chs | branches: 1.14.6;
allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.
|
| 1.13 | 26-Nov-2015 |
martin | branches: 1.13.2; 1.13.4;
We never exec(2) with a kernel vmspace, so do not test for that, but instead
KASSERT() that we don't.
When calculating the load address for the interpreter (e.g. ld.elf_so),
we need to take into account wether the exec'd process will run with
topdown memory or bottom up. We can not use the current vmspace's flags
to test for that, as this happens too early. Luckily the execpack already
knows what the new state will be later, so instead of testing the current
vmspace, pass the info as additional argument to struct emul
e_vm_default_addr.
Fix all such functions and adopt all callers.
|
| 1.12 | 17-May-2015 |
matt | machine_arch on mips depends on the ABI so we need a routine to return
the right value.
|
| 1.11 | 25-Jan-2014 |
christos | branches: 1.11.4; 1.11.6; 1.11.8; 1.11.12;
handle non-topdown binaries
|
| 1.10 | 01-Jan-2014 |
dsl | Change the type of the 'cookie' that holds the state of the core dump file
from 'void *' to the actual type 'struct coredump_iostate *'.
In most of the code the contents of the structure are still unknown.
This just stops the wrong type of pointer being passed to the 'void *'
parameter.
I hope I've found everything, amd64 GENERIC and i386 GENERIC & ALL compile.
|
| 1.9 | 21-May-2012 |
martin | branches: 1.9.2; 1.9.4;
Calling _lwp_create() with a bogus ucontext could trigger a kernel
assertion failure (and thus a crash in DIAGNOSTIC kernels). Independently
discovered by YAMAMOTO Takashi and Joel Sing.
To avoid this, introduce a cpu_mcontext_validate() function and move all
sanity checks from cpu_setmcontext() there. Also untangle the netbsd32
compat mess slightly and add a cpu_mcontext32_validate() cousin there.
Add an exhaustive atf test case, based partly on code from Joel Sing.
Should finally fix the remaining open part of PR kern/43903.
|
| 1.8 | 19-Feb-2012 |
rmind | Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.7 | 02-May-2011 |
rmind | branches: 1.7.4; 1.7.8; 1.7.10;
Extend PCU:
- Add pcu_ops_t::pcu_state_release() operation for PCU_RELEASE case.
- Add pcu_switchpoint() to perform release operation on context switch.
- Sprinkle const, misc. Also, sync MIPS with changes.
Per discussions with matt@.
|
| 1.6 | 24-Feb-2011 |
joerg | Allow storing and receiving the LWP private pointer via ucontext_t
on all platforms except VAX and IA64. Add fast access via register for
AMD64, i386 and SH3 ports. Use this fast access in libpthread to replace
the stack based pthread_self(). Implement skeleton support for Alpha,
HPPA, PowerPC, SPARC and SPARC64, but leave it disabled.
Ports that support this feature provide __HAVE____LWP_GETPRIVATE_FAST in
machine/types.h and a corresponding __lwp_getprivate_fast in
machine/mcontext.h.
This material is based upon work partially supported by
The NetBSD Foundation under a contract with Joerg Sonnenberger.
|
| 1.5 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.4 | 14-Jan-2011 |
rmind | branches: 1.4.2; 1.4.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.3 | 14-Dec-2009 |
matt | branches: 1.3.4; 1.3.6;
Get rid of l_addr references pulled in via merge.
|
| 1.2 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 12-Sep-2009 |
matt | branches: 1.1.2;
file netbsd32_machdep.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.6 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.5 | 30-Apr-2010 |
matt | No reason to set R_ZERO.
|
| 1.1.2.4 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.1.2.3 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.1.2.2 | 12-Sep-2009 |
matt | Add COMPAT_13 support
|
| 1.1.2.1 | 12-Sep-2009 |
matt | Add COMPAT_NETBSD32 support.
|
| 1.3.6.2 | 31-May-2011 |
rmind | sync with head
|
| 1.3.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.3.4.1 | 14-Dec-2009 |
yamt | file netbsd32_machdep.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.4.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.4.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.7.10.1 | 21-May-2012 |
riz | Pull up following revision(s) (requested by martin in ticket #274):
sys/arch/amd64/amd64/process_machdep.c: revision 1.20
sys/kern/sys_lwp.c: revision 1.54
sys/arch/sparc64/sparc64/machdep.c: revision 1.267
sys/arch/mips/mips/cpu_subr.c: revision 1.16
sys/arch/vax/vax/machdep.c: revision 1.188
sys/sys/lwp.h: revision 1.161
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.98
sys/arch/alpha/alpha/machdep.c: revision 1.339
sys/compat/sys/ucontext.h: revision 1.6
sys/arch/hppa/hppa/hppa_machdep.c: revision 1.28
distrib/sets/lists/tests/mi: revision 1.469
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.42
tests/lib/libc/sys/t_lwp_create.c: revision 1.1
tests/lib/libc/sys/Makefile: revision 1.23
sys/arch/arm/arm/sig_machdep.c: revision 1.42
sys/arch/amd64/include/mcontext.h: revision 1.15
sys/arch/amd64/amd64/machdep.c: revision 1.183
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.99
sys/arch/i386/i386/machdep.c: revision 1.727
sys/compat/netbsd32/netbsd32_lwp.c: revision 1.13
sys/arch/sparc/sparc/machdep.c: revision 1.319
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.76
sys/arch/m68k/m68k/sig_machdep.c: revision 1.49
sys/sys/ucontext.h: revision 1.16
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.9
lib/libc/sys/_lwp_create.2: revision 1.5
Calling _lwp_create() with a bogus ucontext could trigger a kernel
assertion failure (and thus a crash in DIAGNOSTIC kernels). Independently
discovered by YAMAMOTO Takashi and Joel Sing.
To avoid this, introduce a cpu_mcontext_validate() function and move all
sanity checks from cpu_setmcontext() there. Also untangle the netbsd32
compat mess slightly and add a cpu_mcontext32_validate() cousin there.
Add an exhaustive atf test case, based partly on code from Joel Sing.
Should finally fix the remaining open part of PR kern/43903.
|
| 1.7.8.2 | 02-Jun-2012 |
mrg | sync to latest -current.
|
| 1.7.8.1 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.7.4.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.7.4.2 | 23-May-2012 |
yamt | sync with head.
|
| 1.7.4.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.9.4.1 | 18-May-2014 |
rmind | sync with head
|
| 1.9.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.9.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.11.12.1 | 30-Jan-2019 |
martin | Pull up following revision(s) (requested by maxv in ticket #1677):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23
Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.11.8.1 | 30-Jan-2019 |
martin | Pull up following revision(s) (requested by maxv in ticket #1677):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23
Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.11.6.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.11.6.2 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.11.6.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.11.4.1 | 30-Jan-2019 |
martin | Pull up following revision(s) (requested by maxv in ticket #1677):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23
Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.13.4.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.13.2.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.14.6.1 | 27-Jan-2019 |
martin | Pull up following revision(s) (requested by maxv in ticket #1173):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/riscv/riscv/sig_machdep.c: revision 1.2
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23
Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.15.4.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.15.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.15.2.15 | 25-Jan-2019 |
pgoyette | Move the netbsd32_machine32_hook into the main kernel with most of
the other hooks.
Although this hook might better belong in compat/netbsd32/ code,
there are some machines without a netbsd32 module (for example, i386
and sgimips) which still have consumers/users of this hook. :(
|
| 1.15.2.14 | 24-Jan-2019 |
pgoyette | Rework placement of the new netbsd32_machine32_hook
|
| 1.15.2.13 | 24-Jan-2019 |
pgoyette | Replace weak symbol definition for machine32 with a hook. Our in-kernel
linker doesn't handle weak symbols, so this prevented us from loading the
compat_linux32 module.
XXX There don't seem to be any other consumers of machine32 (nor does
XXX there seem to be any consumers of machine_arch32), even though it
XXX is defined for aarch64, arm32, and riscv).
|
| 1.15.2.12 | 22-Jan-2019 |
pgoyette | Convert the MODULE_{,VOID_}HOOK_CALL macros to do everything in-line
rather than defining an intermediate hook##call function. Almost
all of the hooks are called only once, and although we lose the
ability of doing things like
if (MODULE_HOOK_CALL(...) == 0) ...
we simplify things quite a bit. With this change, we no longer need
to have both declaration and definition macros, and the definition
no longer needs to have both prototype argument list and a "real"
argument list.
FWIW, the above if now needs to written as
int ret;
MODULE_HOOK_CALL(..., ret);
if (ret == 0) ...
with appropriate use of braces {}.
|
| 1.15.2.11 | 21-Jan-2019 |
pgoyette | No need to declare the hook_call() function for void hooks. So
remove and simplify.
|
| 1.15.2.10 | 14-Jan-2019 |
pgoyette | Create a variant of the HOOK macros that handles hook routines of
type void, and use them where appropriate.
|
| 1.15.2.9 | 13-Jan-2019 |
pgoyette | Remove the HOOK2 versions of the MODULE_HOOK macros. There were
only a few uses, and using them led to some lack of clarity in the
code. Instead, we now use two separate hooks, with names that
make it clear(er) what we're doing.
This also positions us to start unraveling some of the rtsock_50
mess, which will need (at least) five hooks.
|
| 1.15.2.8 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.15.2.7 | 29-Sep-2018 |
pgoyette | In MODULE_HOOK_CALL_DECL we don't need to provide the actual argument
list for calling the hook function, nor do we need to provide the
default value (for when the hook has not been set).
|
| 1.15.2.6 | 29-Sep-2018 |
pgoyette | Make netbsd32_sendsig_sigino() non-static since we need to call it from
the _md_16 code.
While here, use __func__ in a diagnostic message rather than hardcoding
the function name.
|
| 1.15.2.5 | 29-Sep-2018 |
pgoyette | Put netbsd32_sendsig_siginfo() here, where it belongs.
|
| 1.15.2.4 | 29-Sep-2018 |
pgoyette | Define the netbsd32_sendsig_hook and create its accessor function.
|
| 1.15.2.3 | 29-Sep-2018 |
pgoyette | Add a routine to actually invoke the hook for netbsd32_sendsig()
|
| 1.15.2.2 | 29-Sep-2018 |
pgoyette | Keep only one copy of the netbsd32_compat_16 code.
Remove unnecessary #ifdef COMPAT_13 since the source file will only be
processed if COMPAT_13 is already defined.
|
| 1.15.2.1 | 29-Sep-2018 |
pgoyette | Add glue for netbsd32 compat_13 and _16 modules
|
| 1.20.14.1 | 31-May-2021 |
cjep | sync with head
|
| 1.20.12.1 | 17-Jun-2021 |
thorpej | Sync w/ HEAD.
|
| 1.23.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.4 | 17-Jun-2024 |
pgoyette | Proteect #include of kernel options files with #ifdef _KERNEL_OPT
XXX Add to existing 10.0 and 9.0 tickets for kern/583346
|
| 1.3 | 13-Nov-2019 |
pgoyette | branches: 1.3.26;
Clean-up unnecessary inclusions of opt_coredump.h
|
| 1.2 | 27-Jan-2019 |
pgoyette | branches: 1.2.4;
Merge the [pgoyette-compat] branch
|
| 1.1 | 29-Sep-2018 |
pgoyette | branches: 1.1.2;
file netbsd32_machdep_13.c was initially added on branch pgoyette-compat.
|
| 1.1.2.3 | 29-Sep-2018 |
pgoyette | Remove redundant definition of machine_arch32 and machine32
|
| 1.1.2.2 | 29-Sep-2018 |
pgoyette | Keep only one copy of the netbsd32_compat_16 code.
Remove unnecessary #ifdef COMPAT_13 since the source file will only be
processed if COMPAT_13 is already defined.
|
| 1.1.2.1 | 29-Sep-2018 |
pgoyette | Add glue for netbsd32 compat_13 and _16 modules
|
| 1.2.4.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.2.4.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.2.4.1 | 27-Jan-2019 |
christos | file netbsd32_machdep_13.c was added on branch phil-wifi on 2019-06-10 22:06:30 +0000
|
| 1.3.26.1 | 22-Jun-2024 |
martin | Pull up following revision(s) (requested by pgoyette in ticket #724):
sys/modules/compat_netbsd32_16/Makefile: revision 1.5
sys/arch/powerpc/powerpc/compat_16_machdep.c: revision 1.25
sys/arch/powerpc/powerpc/compat_16_machdep.c: revision 1.26
sys/modules/compat_16/Makefile: revision 1.3
sys/modules/compat_netbsd32_13/Makefile: revision 1.5
sys/modules/compat_16/Makefile: revision 1.4
sys/arch/sun2/sun2/genassym.cf: revision 1.17
sys/arch/sun2/sun2/enable.h: revision 1.5
sys/modules/compat_13/Makefile: revision 1.3
sys/modules/compat_13/Makefile: revision 1.4
sys/modules/compat_13/Makefile: revision 1.5
sys/arch/mips/mips/netbsd32_machdep_16.c: revision 1.8
sys/modules/Makefile.compat: revision 1.1
sys/arch/mips/mips/netbsd32_machdep_13.c: revision 1.4
share/mk/bsd.kmodule.mk: revision 1.86
sys/arch/aarch64/aarch64/netbsd32_machdep_16.c: revision 1.4
sys/arch/powerpc/powerpc/compat_13_machdep.c: revision 1.23
sys/arch/aarch64/aarch64/netbsd32_machdep_13.c: revision 1.4
Import AFLAGS to allow processing of assembler files in modules.
Prerequisite for kern/583346.
Introduce sys/modules/Makefile.compat and hook some compat_1[36]
machdep code into the modules. kern/58346
Ooops missed a source file!
Proteect #include of kernel options files with #ifdef _KERNEL_OPT
XXX Add to existing 10.0 and 9.0 tickets for kern/583346
Include required headers
Add required include for compat_16 machdep code
fix the m68k compat_13 build.
include Makefile.assym to generate assym.h.
use -I. and -x assembler-with-cpp to actually use cpp and find assym.h.
also apply m68k assym.h fix here as well as compat_13.
powerpc64: Provide dummy stubs for compat1[36]
as done for amd64. We haven't had working userland for powerpc64,
and therefore compatible to 1.[36] is only useful for netbsd32.
Fix build failure for evbppc64 for PR kern/58346 (my bug!).
sun2/genassym.cf: Skip KERNBASE for _MODULE
as it is not a compile-time constant; see sun2/vmparam.h.
It should not be, and is not actually, used for modules.
PR kern/58346
sun2/enable.h: Fix -Wold-style-definition for WARNS=5 build as modules
Finally fix sun2 build for PR kern/58346
|
| 1.8 | 17-Jun-2024 |
pgoyette | Proteect #include of kernel options files with #ifdef _KERNEL_OPT
XXX Add to existing 10.0 and 9.0 tickets for kern/583346
|
| 1.7 | 06-Nov-2021 |
thorpej | branches: 1.7.4;
COMPAT_NETBSD32 is all about running the 32-bit flavor of native
binaries on a 64-bit platform[*], as such:
- Make the logic about which "sendsig" flavor to call MI (as it is in the
native 64-bit environment) and follow the same rules as the native 32-bit
environment.
- Make COMPAT_NETBSD32 x COMPAT_16 work the same as it would in the
native 32-bit environment by providing a netbsd32_sendsig_sigcontext_16_hook,
rather than overriding the entire sendsig logic with a netbsd32_sendsig_hook.
- In netbsd32___sigaction_sigtramp(), make sure the compat_netbsd32_16
module is loaded if the trampoline version specifies a sigcontext style
handler, otherwise return EINVAL so that libc can try again with siginfo
style.
[*] ...except for arm32, which uses it to mean "run 32-bit OABI binaries
from the 32-bit EABI environment". Doing it this way was arguably a mistake,
but we are stuck with it for now, so support it by providing a machine-
dependent override for netbsd32_sendsig() that also disables the corresponding
logic in netbsd32___sigaction_sigtramp().
Fixes PR kern/56487.
|
| 1.6 | 27-Oct-2021 |
thorpej | Use the signal trampoline version constants from <sys/signal.h>.
|
| 1.5 | 12-Dec-2019 |
pgoyette | Rather than keeping a separate mutex, condvar, and pserialize for each
module hook, we can share a common set of synchronization structures.
This cuts the amount of cacheline_aligned data for these structures by
50%.
Note that we still have a per-hook localcount, since we need to count
individual references.
As discussed with riastradh@
Welcome to 9.99.22 !
|
| 1.4 | 13-Nov-2019 |
pgoyette | Clean-up unnecessary inclusions of opt_coredump.h
|
| 1.3 | 01-Mar-2019 |
pgoyette | branches: 1.3.4;
Rename the MODULE_*_HOOK() macros to MODULE_HOOK_*() as briefly
discussed on irc.
NFCI intended.
Ride the earlier kernel bump - it;s getting crowded.
|
| 1.2 | 27-Jan-2019 |
pgoyette | Merge the [pgoyette-compat] branch
|
| 1.1 | 29-Sep-2018 |
pgoyette | branches: 1.1.2;
file netbsd32_machdep_16.c was initially added on branch pgoyette-compat.
|
| 1.1.2.10 | 23-Jan-2019 |
pgoyette | Convert the macros for setting and unsetting a hook to generate
in-line code rather than using an intermediary hook##set routine.
Hooks are set and unset only in one place, so the intermediary
routine provides no benefit. IMHO using the macro at the point-
of-call is more readable than using it elsewhere in the code and
then calling the generated intermediary routine (for which you
won't even find its declaration or definition unless you remember
to search for the HOOK_SET macro instead).
NFC intended, will verify with a bulk build and an atf test run.
|
| 1.1.2.9 | 14-Jan-2019 |
pgoyette | Create a variant of the HOOK macros that handles hook routines of
type void, and use them where appropriate.
|
| 1.1.2.8 | 29-Sep-2018 |
pgoyette | Use proper names for netbsd32_machdep_md_16_{init,fini}() routines
|
| 1.1.2.7 | 29-Sep-2018 |
pgoyette | Add prototype for the default netbsd32_sendsig_siginfo()
|
| 1.1.2.6 | 29-Sep-2018 |
pgoyette | Here there is no 32-bit specific sendsig_sigcontext() so just use the
native one.
|
| 1.1.2.5 | 29-Sep-2018 |
pgoyette | Remove netbsd32_sendsig_sigcontext() - it belongs in netbsd32_machdep.c
|
| 1.1.2.4 | 29-Sep-2018 |
pgoyette | Don't fall off the end of a non-void function. (It used to be void,
but now returns an int to conform with requirements of the MP-safe
module_hook stuff.)
|
| 1.1.2.3 | 29-Sep-2018 |
pgoyette | Remove unnecesasry #ifdef COMPAT_16 (this file won't get selected unless
COMPAT_16 is defined).
Rename some functions for consistency with other architectures' machdep
code.
Provide some prototypes/declarations.
Use __func__ in a diagnostic message rather than hardcoding it in the
message string.
|
| 1.1.2.2 | 29-Sep-2018 |
pgoyette | #include the module hook stuff
add prototype for netbsd32_sendsig_sigcontext
|
| 1.1.2.1 | 29-Sep-2018 |
pgoyette | Add glue for netbsd32 compat_13 and _16 modules
|
| 1.3.4.4 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.3.4.3 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.3.4.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.3.4.1 | 01-Mar-2019 |
christos | file netbsd32_machdep_16.c was added on branch phil-wifi on 2019-06-10 22:06:30 +0000
|
| 1.7.4.1 | 22-Jun-2024 |
martin | Pull up following revision(s) (requested by pgoyette in ticket #724):
sys/modules/compat_netbsd32_16/Makefile: revision 1.5
sys/arch/powerpc/powerpc/compat_16_machdep.c: revision 1.25
sys/arch/powerpc/powerpc/compat_16_machdep.c: revision 1.26
sys/modules/compat_16/Makefile: revision 1.3
sys/modules/compat_netbsd32_13/Makefile: revision 1.5
sys/modules/compat_16/Makefile: revision 1.4
sys/arch/sun2/sun2/genassym.cf: revision 1.17
sys/arch/sun2/sun2/enable.h: revision 1.5
sys/modules/compat_13/Makefile: revision 1.3
sys/modules/compat_13/Makefile: revision 1.4
sys/modules/compat_13/Makefile: revision 1.5
sys/arch/mips/mips/netbsd32_machdep_16.c: revision 1.8
sys/modules/Makefile.compat: revision 1.1
sys/arch/mips/mips/netbsd32_machdep_13.c: revision 1.4
share/mk/bsd.kmodule.mk: revision 1.86
sys/arch/aarch64/aarch64/netbsd32_machdep_16.c: revision 1.4
sys/arch/powerpc/powerpc/compat_13_machdep.c: revision 1.23
sys/arch/aarch64/aarch64/netbsd32_machdep_13.c: revision 1.4
Import AFLAGS to allow processing of assembler files in modules.
Prerequisite for kern/583346.
Introduce sys/modules/Makefile.compat and hook some compat_1[36]
machdep code into the modules. kern/58346
Ooops missed a source file!
Proteect #include of kernel options files with #ifdef _KERNEL_OPT
XXX Add to existing 10.0 and 9.0 tickets for kern/583346
Include required headers
Add required include for compat_16 machdep code
fix the m68k compat_13 build.
include Makefile.assym to generate assym.h.
use -I. and -x assembler-with-cpp to actually use cpp and find assym.h.
also apply m68k assym.h fix here as well as compat_13.
powerpc64: Provide dummy stubs for compat1[36]
as done for amd64. We haven't had working userland for powerpc64,
and therefore compatible to 1.[36] is only useful for netbsd32.
Fix build failure for evbppc64 for PR kern/58346 (my bug!).
sun2/genassym.cf: Skip KERNBASE for _MODULE
as it is not a compile-time constant; see sun2/vmparam.h.
It should not be, and is not actually, used for modules.
PR kern/58346
sun2/enable.h: Fix -Wold-style-definition for WARNS=5 build as modules
Finally fix sun2 build for PR kern/58346
|
| 1.224 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.223 | 30-Jun-2016 |
skrll | Fix MIPS3_NO_PV_UNCACHED alias handling by looping through the pv_list
looking for bad aliases and removing the bad entries. That is, revert
to the code before the matt-mips64 merge.
Additionally, fix the pmap_update call to not use the (recently
removed/freed) pv for the pmap_t.
Fixes the following two PRs
PR/49903: Panic during installation on WorkPad Z50 (hpcmips) whilst uncompressing base.tgz
PR/51226: Install bug for hpcmips NetBSD V7 using FTP Full installation
|
| 1.222 | 28-Jun-2016 |
skrll | Fix PR/51288 reproducable panic on evbmips64-eb (erlite)
pmap_page_remove from the previous change neglected to terminate the pv
list correctly when it started with an initial unmanaged mapping and
subsequent managed mappings. Fix this.
|
| 1.221 | 27-Jun-2016 |
skrll | Fix a bug introduced by me in 1.214 where unmanaged mappings would be
affected by calls to pmap_page_protect which is wrong. Now PV_KENTER
mappings are left intact.
Thanks to chuq for spotting my mistake and reviewing this diff.
Thanks to everyone who tested it as well.
|
| 1.220 | 05-Nov-2015 |
pgoyette | Remove SYSVSHM-specific code. The value of shminfo.shmall is zero at
the time this pmap initialization code is called, so the increment is
a no-op. (Thanks christos@ for pointing it out.)
|
| 1.219 | 11-Jun-2015 |
matt | Remove PMAP_POOLPAGE_DEBUG latent code since it never worked.
|
| 1.218 | 11-Jun-2015 |
matt | Define (but not use) separate kernel and user pagetables.
Move to the new names.
|
| 1.217 | 11-Jun-2015 |
matt | XXX cast NBPG to vaddr_t to avoid promotion to unsigned long.
|
| 1.216 | 11-Jun-2015 |
matt | Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_start to get the
VA space it needs.
pmap_segtab.c is almost identical to uvm/pmap/pmap_segtab.c now. It won't
be long until we switch to the uvm/pmap one.
|
| 1.215 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.214 | 11-May-2014 |
skrll | branches: 1.214.2; 1.214.4; 1.214.6;
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.213 | 03-May-2014 |
skrll | Use pmap_tlb_asid_check to reduce code c&p.
|
| 1.212 | 03-May-2014 |
skrll | Make PARANOIADIAG compile.
|
| 1.211 | 03-May-2014 |
skrll | Grab pv_list lock in pmap_unmap_ephemeral_page only when needed.
|
| 1.210 | 23-Apr-2014 |
skrll | Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering if
a cache invalidation is required.
Additionally flush the cache for the uarea va to avoid potential (future)
cache aliases in cpu_uarea_free when handing pages back to uvm for later
use.
ok matt@
Hopefully this addresses the instability reported in the following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46170 - NetBSD/cobalt 6.0_BETA does not boot
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.209 | 10-Nov-2013 |
christos | branches: 1.209.2;
fix unused variable warnings
|
| 1.208 | 05-Jul-2012 |
matt | branches: 1.208.2; 1.208.4;
Change lockless segtab management to use a mutex for protection. Some minor
changes to make this closer to common/pmap/tlb/pmap_segtab.c
|
| 1.207 | 02-Feb-2012 |
para | branches: 1.207.2;
- bringing kmeminit_nkmempages back and revert pmaps that called this early
- use nkmempages to scale the kmem_arena
- reducing diff to pre kmem/vmem change
(NKMEMPAGES_MAX_DEFAULT will need adjusting on some archs)
|
| 1.206 | 27-Jan-2012 |
para | extending vmem(9) to be able to allocated resources for it's own needs.
simplifying uvm_map handling (no special kernel entries anymore no relocking)
make malloc(9) a thin wrapper around kmem(9)
(with private interface for interrupt safety reasons)
releng@ acknowledged
|
| 1.205 | 23-Sep-2011 |
macallan | branches: 1.205.2; 1.205.6;
the cached/not cached stuff doesn't build when both MIPS1 and MIPS3 are
defined so put it back to #if defined(_MIPS_PADDR_T_64BIT) || defined(_LP64)
there is no good reason why it can't work on MIPS1 though.
|
| 1.204 | 22-Sep-2011 |
macallan | support BUS_SPACE_MAP_PREFETCH in order to allow mapping device memory and
DMA buffers with cacheing disabled but things like write combining, relaxed
ordering etc. allowed when the CPU supports it
so far enabled only on Loongson, should work on R1xk and probably newer CPUs
|
| 1.203 | 21-Sep-2011 |
macallan | make the code that deals with mapping regular memory non-cached work again:
- honour PMAP_NOCACHE
- move the PGC_NOCACHE stuff out of #ifdef PARANOIADIAG
we need this to mmap DMA buffers non-cached on sgimips
|
| 1.202 | 12-Jun-2011 |
tsutsui | Set iospace and virtual_end address properly.
Fixes TLB miss panic during device attach on emips.
|
| 1.201 | 07-May-2011 |
tsutsui | branches: 1.201.2;
Fix a MIPS3 dependent KASSERT.
|
| 1.200 | 02-May-2011 |
tsutsui | Fix "removing options MIPS3 cause DS5000 to loop during boot"
(i.e. no options MIPS3 kernel doesn't work on MIPS1) problem.
Reported and tested by Erik Bertelsen on port-pmax:
http://mail-index.NetBSD.org/port-pmax/2011/04/21/msg000099.html
|
| 1.199 | 29-Apr-2011 |
matt | whitespace cleanup.
|
| 1.198 | 15-Mar-2011 |
matt | Make sure we do proper locking if LOCKDEBUG is defined
|
| 1.197 | 02-Mar-2011 |
tsutsui | Make this compile with PMAP_POOLPAGE_DEBUG.
XXX: not sure if this is ever used
|
| 1.196 | 25-Feb-2011 |
tsutsui | Fix LOCKDEBUG spin lock held panic on MIPS_CACHE_VIRTUAL_ALIAS CPUs.
Now cobalt boots multiuser, but many programs complains
"clntudp_create: RPC: Program not registered"
as well as R5000 sgimips O2. Smells virtual cache alias issue around pool...
|
| 1.195 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.194 | 10-Feb-2011 |
macallan | unbork PMAP_NOCACHE vs. PGC_NOCACHE
|
| 1.193 | 26-Jan-2011 |
pooka | Add support for the Extensible MIPS ("eMIPS") platform. The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.
eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing. eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.
NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman. Microsoft Corporation has
donated full copyright to The NetBSD Foundation.
Platform support for eMIPS is the first part of Microsoft's
contribution. The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.
|
| 1.192 | 12-Nov-2010 |
uebayasi | branches: 1.192.2; 1.192.4;
Put VM_PAGE_TO_MD() definition in one place. No functional changes.
|
| 1.191 | 10-Nov-2010 |
uebayasi | Use more VM_PHYSMEM_*() accessors. No functional changes.
|
| 1.190 | 30-Oct-2010 |
uebayasi | Use VM_PAGE_TO_MD() to locate struct vm_page_md. No functional
changes.
|
| 1.189 | 06-Jul-2010 |
cegger | Turn PMAP_NOCACHE into MI flag.
Add MI flags PMAP_WRITE_COMBINE, PMAP_WRITE_BACK, PMAP_NOCACHE_OVR.
Update pmap(9) manpage.
hppa: Remove MD PMAP_NOCACHE flag as it exists as MI flag
mips: Rename MD PMAP_NOCACHE to PGC_NOCACHE.
x86: Implement new MI flags using Page-Attribute Tables.
x86: Implement BUS_SPACE_MAP_PREFETCHABLE.
Patch presented on tech-kern@:
http://mail-index.netbsd.org/tech-kern/2010/06/30/msg008458.html
No comments on this last version.
|
| 1.188 | 14-Dec-2009 |
matt | branches: 1.188.2; 1.188.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.187 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.186 | 07-Nov-2009 |
cegger | Add a flags argument to pmap_kenter_pa(9).
Patch showed on tech-kern@ http://mail-index.netbsd.org/tech-kern/2009/11/04/msg006434.html
No objections.
|
| 1.185 | 21-Oct-2009 |
rmind | Remove uarea swap-out functionality:
- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.
Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).
Discussed on <tech-kern>, reviewed by <ad>.
|
| 1.184 | 18-Aug-2009 |
thorpej | Add a real API for testing if a page is a managed page, and adjust callers
to stop relying on vm_physseg_find() for this purpose.
|
| 1.183 | 29-Jun-2009 |
tsutsui | Since pmap.c rev 1.163, page attributes of PV_MODIFIED and PV_REFERENCED
have beem moved from pv_flags in struct pv_entry to pvh_attrs in
struct vm_page_md, so no need to copy pv_flags to keep these flags
in pv header in pmap_remove_pv(). Pointed out by uebayasi@ on port-mips.
Also rename those page attribute flags from PV_FOO to PGA_FOO like alpha.
While here, make pv_flags unsigned.
Briefly tested on sgimips O2.
|
| 1.182 | 21-Apr-2009 |
cegger | change pmap flags argument from int to u_int.
discussed with christos@ on source-changes-d@
|
| 1.181 | 10-Dec-2008 |
pooka | branches: 1.181.2;
Make kernel_pmap_ptr a const. Requested by steve_martin.
|
| 1.180 | 09-Dec-2008 |
pooka | Make pmap_kernel() a MI macro for struct pmap *kernel_pmap_ptr,
which is now the "API" provided by the pmap module. pmap_kernel()
remains as the syntactic sugar.
Bonus cosmetics round: move all the pmap_t pointer typedefs into
uvm_pmap.h.
Thanks to Greg Oster for providing cpu muscle for doing test builds.
|
| 1.179 | 28-Apr-2008 |
martin | branches: 1.179.6; 1.179.8; 1.179.16;
Remove clause 3 and 4 from TNF licenses
|
| 1.178 | 26-Dec-2007 |
ad | branches: 1.178.6; 1.178.8; 1.178.10;
Merge more changes from vmlocking2, mainly:
- Locking improvements.
- Use pool_cache for more items.
|
| 1.177 | 25-Oct-2007 |
yamt | branches: 1.177.2; 1.177.4; 1.177.8;
defparam PAGER_MAP_SIZE.
|
| 1.176 | 17-Oct-2007 |
garbled | Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.175 | 17-Jul-2007 |
macallan | branches: 1.175.8; 1.175.10; 1.175.14;
if we have 64bit paddr_t add a flag which indicates non-cachable for use
with mmap*() and pmap_enter()
Mainly for allowing userland to mmap() the O2's framebuffer uncached
|
| 1.174 | 16-Jul-2007 |
macallan | change pmap_phys_address()s parameter to paddr_t since that's what it gets
fed from mmap*() anyway
approved by gimpy
|
| 1.173 | 12-Mar-2007 |
ad | branches: 1.173.8;
Pass an ipl argument to pool_init/POOL_INIT to be used when initializing
the pool's lock.
|
| 1.172 | 04-Mar-2007 |
christos | branches: 1.172.2;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.171 | 28-Feb-2007 |
thorpej | TRUE -> true, FALSE -> false
|
| 1.170 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.169 | 18-Dec-2006 |
simonb | branches: 1.169.2;
Handle KSEG0 addresses specifically in pmap_extract(), similar
to how other KSEG-style pmaps (alpha, sh3, sh5) do.
Add a DIAGNOSTIC panic for KSEG1 addresses (nothing should touch
uncached memory, right?)
Clean up the the pmapdebug printfs a little too (athough with
more ugly #ifdef DEBUG bits of code).
XXX: should use DPRINTF() type printfs here.
Fixes panic running regress/sys/kern/umount on MIPS platforms
reported by Martin Husemann.
|
| 1.168 | 18-Nov-2006 |
tsutsui | branches: 1.168.2;
Disable sosend_loan() in sys/kern/uipc_socket.c temporarily on CPUs
which have virtual address indexed cache and whose pmaps don't always
allow normal shared mappings even for read only pages.
In future, these pmaps should be rewritten to handle such read only
shared mappings properly like ARM pmap, but currently we just disable
sosend_loan() to avoid unnecessary uncached mappings and cache flushes
on MIPS3 CPUs, or map/unmap thrashing on SH4.
Discussed with thorpej a while ago.
|
| 1.167 | 30-Mar-2006 |
gdamore | branches: 1.167.8; 1.167.10;
Don't pmap_remove_pv mappings for unmanaged pages.
Closes PR mips/33166. Reviewed by chuq@
|
| 1.166 | 24-Dec-2005 |
perry | branches: 1.166.4; 1.166.6; 1.166.8; 1.166.10; 1.166.12;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.165 | 17-Dec-2005 |
jmc | Fix some places pa's got left in the conversion to vm_page
|
| 1.164 | 13-Dec-2005 |
tsutsui | ANSIfy and some KNF.
|
| 1.163 | 13-Dec-2005 |
tsutsui | Move pv_entry stuff from MD pmap_physseg to MD vm_page.
Suggested and OK'ed by thorpej, and tested on R3000/R4400/R5000/Rm5200 CPUs.
|
| 1.162 | 09-Dec-2005 |
tsutsui | Fix function names in panic messages.
|
| 1.161 | 25-Nov-2005 |
simonb | KNF.
|
| 1.160 | 05-Nov-2005 |
tsutsui | branches: 1.160.2;
Most use of mips_paddr_to_tlbpfn() is inside if (MIPS_HAS_R4K_MMU) so
call mips[13]_paddr_to_tlbpfn() directly instead.
|
| 1.159 | 01-Jun-2005 |
drochner | branches: 1.159.2;
quell shadow variable warnings
|
| 1.158 | 26-Mar-2005 |
tsutsui | Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.157 | 01-Mar-2005 |
sekiya | branches: 1.157.2;
Add a hint variable (mips_sdcache_forceinv, explicitly initialized to zero)
that tells pmap_zero_page() and pmap_copy_page() to unconditionally invalidate
pages for r5k-class CPUs with secondary cache.
This behavior must be explicitly enabled by setting mips_sdcache_forceinv to 1.
This is the last bit of a patch that has been kicked around since 2000 between
rafal@, tsutsui@, and myself.
|
| 1.156 | 17-Jan-2005 |
atatat | branches: 1.156.2;
Teach mips pmap_prefer() to deal with topdown.
Tested by simonb.
|
| 1.155 | 30-Dec-2003 |
pk | branches: 1.155.8;
Replace the traditional buffer memory management -- based on fixed per buffer
virtual memory reservation and a private pool of memory pages -- by a scheme
based on memory pools.
This allows better utilization of memory because buffers can now be allocated
with a granularity finer than the system's native page size (useful for
filesystems with e.g. 1k or 2k fragment sizes). It also avoids fragmentation
of virtual to physical memory mappings (due to the former fixed virtual
address reservation) resulting in better utilization of MMU resources on some
platforms. Finally, the scheme is more flexible by allowing run-time decisions
on the amount of memory to be used for buffers.
On the other hand, the effectiveness of the LRU queue for buffer recycling
may be somewhat reduced compared to the traditional method since, due to the
nature of the pool based memory allocation, the actual least recently used
buffer may release its memory to a pool different from the one needed by a
newly allocated buffer. However, this effect will kick in only if the
system is under memory pressure.
|
| 1.154 | 12-Dec-2003 |
sekiya | Remove preprocessor conditional MIPS3_L2CACHE_ABSENT, which was rendered
superfluous by Tsutsui-san's previous changes.
(this change differs slightly from that posted to port-mips@, as
mips_flushcache_allpvh should be compiled iff MIPS3_PLUS is defined and
MIPS3_L2CACHE_ABSENT should be removed from files.mips as well)
|
| 1.153 | 01-Nov-2003 |
tsutsui | - Flush cache only if mips_sdcache_line_size == 0 in pmap_copy_page() when
options MIPS3_L2CACHE_ABSENT is defined.
- Fix comments following #endif for MIPS3_L2CACHE_ABSENT.
|
| 1.152 | 29-Oct-2003 |
christos | first pass siginfo glue for mips
|
| 1.151 | 05-Oct-2003 |
tsutsui | Include opt_mips_cache.h for options MIPS3_L2CACHE_ABSENT and
MIPS3_NO_PV_UNCACHED.
|
| 1.150 | 12-Sep-2003 |
chs | handle pmap_procwr() on kernel procs (MIPS1).
needed for new signal trampoline stuff.
|
| 1.149 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.148 | 10-May-2003 |
thorpej | branches: 1.148.2;
Back out the following chagne:
http://mail-index.netbsd.org/source-changes/2003/05/08/0068.html
There were some side-effects that I didn't anticipate, and fixing them
is proving to be more difficult than I thought, do just eject for now.
Maybe one day we can look at this again.
Fixes PR kern/21517.
|
| 1.147 | 08-May-2003 |
thorpej | Simplify the way the bounds of the managed kernel virtual address
space is advertised to UVM by making virtual_avail and virtual_end
first-class exported variables by UVM. Machine-dependent code is
responsible for initializing them before main() is called. Anything
that steals KVA must adjust these variables accordingly.
This reduces the number of instances of this info from 3 to 1, and
simplifies the pmap(9) interface by removing the pmap_virtual_space()
function call, and removing two arguments from pmap_steal_memory().
This also eliminates some kludges such as having to burn kernel_map
entries on space used by the kernel and stolen KVA.
This also eliminates use of VM_{MIN,MAX}_KERNEL_ADDRESS from MI code,
this giving MD code greater flexibility over the bounds of the managed
kernel virtual address space if a given port's specific platforms can
vary in this regard (this is especially true of the evb* ports).
|
| 1.146 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.145 | 06-Jan-2003 |
wiz | writable, not writeable.
|
| 1.144 | 11-Nov-2002 |
he | Remove a PARANOIADIAG check which is a bit too paranoid. This one
would now trigger whenever a previously used "cached" uarea was reused.
Reviewed by thorpej and chs.
|
| 1.143 | 09-Nov-2002 |
thorpej | Fix signed/unsigned comparison warnings.
|
| 1.142 | 20-Mar-2002 |
chs | add missing cache flushes in pmap_protect(). fixes PR 15965.
|
| 1.141 | 08-Mar-2002 |
thorpej | Pool deals fairly well with physical memory shortage, but it doesn't
deal with shortages of the VM maps where the backing pages are mapped
(usually kmem_map). Try to deal with this:
* Group all information about the backend allocator for a pool in a
separate structure. The pool references this structure, rather than
the individual fields.
* Change the pool_init() API accordingly, and adjust all callers.
* Link all pools using the same backend allocator on a list.
* The backend allocator is responsible for waiting for physical memory
to become available, but will still fail if it cannot callocate KVA
space for the pages. If this happens, carefully drain all pools using
the same backend allocator, so that some KVA space can be freed.
* Change pool_reclaim() to indicate if it actually succeeded in freeing
some pages, and use that information to make draining easier and more
efficient.
* Get rid of PR_URGENT. There was only one use of it, and it could be
dealt with by the caller.
From art@openbsd.org.
|
| 1.140 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
- Bump the Sysmap size a little for large-memory machines.
XXX: still need work, especially in pmap_procwr().
|
| 1.139 | 18-Nov-2001 |
simonb | White space nit.
|
| 1.138 | 14-Nov-2001 |
thorpej | branches: 1.138.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.137 | 04-Nov-2001 |
tsutsui | Cast pa values to u_long in DEBUG printfs for _MIPS_PADDR_T_64BIT ports.
XXX should use unsigned long long format?
|
| 1.136 | 01-Nov-2001 |
chs | in pmap_extract(), detect unmapped users addresses too.
|
| 1.135 | 27-Oct-2001 |
shin | fix virtual alias problem in pmap_copy_page().
to eliminate virtual alias, source page should also be flushed.
fixes PR/13587.
|
| 1.134 | 10-Sep-2001 |
chris | branches: 1.134.2;
Update pmap_update to now take the updated pmap as an argument.
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.
Currently this is a no-op on most platforms, so they should see no difference.
Reviewed by Jason.
|
| 1.133 | 09-Sep-2001 |
chs | - in PMAP_IS_ACTIVE(), the kernel pmap is always active, and we don't
need to check for curproc being non-NULL since none of the pmap
interfaces which are legal to use in interrupt handlers use this macro.
- use the hit op when flushing the cache in pmap_kremove().
- avoid trusting the optimizer in pmap_clear_reference().
- fix pmap_clear_modify() to reset the mod-bit emulation so we can
detect further modifications to the page, also flushing the cache
for any mappings which might have dirty lines.
|
| 1.132 | 01-Sep-2001 |
chs | branches: 1.132.2;
rearrange pmap_kenter_pa() to map unmanaged pages uncached as well.
this is apparently needed on the arc port.
slight optimization in pmap_kremove().
|
| 1.131 | 26-Aug-2001 |
chs | handle unmanaged pages correctly in pmap_remove_pv(),
fixes crashes when exiting X.
|
| 1.130 | 04-Aug-2001 |
chs | remove remaining spl calls, they're not needed.
remove some checks for impossible conditions.
in pmap_enter(), only call pmap_remove() to remove an existing mapping
if there actually is an existing mapping.
in pmap_remove_pv(), don't flush the MIPS1 cache when removing the last mapping.
this was added in rev 1.97, to avoid stale data being left in the cache
when the page is zeroed bypassing the cache in pmap_zero_page_uncached().
we've since found that bypassing the cache for idle-loop page zeroing
doesn't work very well anyway, so we don't do that anymore.
so now we can remove the extra cache-flush.
remove pmap_zero_page_uncached() while I'm thinking of it.
various other cleanup.
|
| 1.129 | 31-Jul-2001 |
chs | fix think-o in pmap_kenter_pa().
|
| 1.128 | 28-Jul-2001 |
chs | fix pmap_extract() to handle unmapped kernel addresses.
|
| 1.127 | 26-Jun-2001 |
thorpej | branches: 1.127.2;
- Implement a real pmap_kenter_pa()/pmap_kremove().
- Use pools for pmap structures and pv_entry structures.
- Remove a bunch of splvm()/splx(), no longer needed now that
pmap_kenter_pa() and pmap_kremove() are as they should be.
Mostly from Chuck Silvers.
|
| 1.126 | 26-May-2001 |
chs | replace vm_page_t with struct vm_page *.
|
| 1.125 | 24-Apr-2001 |
thorpej | Sprinkle pmap_update() calls after calls to:
- pmap_enter()
- pmap_remove()
- pmap_protect()
- pmap_kenter_pa()
- pmap_kremove()
as described in pmap(9).
These calls are relatively conservative. It may be possible to
optimize these a little more.
|
| 1.124 | 23-Apr-2001 |
thorpej | Make sure virtual_end is initialized before calling uvm_pageboot_alloc(),
and garbage-collect the virtual_avail variable (it is not necessary in
this pmap implementation).
|
| 1.123 | 22-Apr-2001 |
thorpej | Remove pmap_kenter_pgs(). It was never really adopted by
anything, and the interface itself wasn't as flexible as
callers would have probably liked.
|
| 1.122 | 22-Apr-2001 |
thorpej | Use uvm_pageboot_alloc() for early memory allocation, rather than
calling pmap_steal_memory() directly. On these platforms, since
uvm_pageboot_alloc() is a wrapper around pmap_steal_memory(), there
is no functional change. This is merely for API consistency.
|
| 1.121 | 22-Apr-2001 |
thorpej | Make pmap_virtual_space() a required pmap function, even on platforms
which have pmap_steal_memory(). This is to reduce the API differences
between pmaps that implement pmap_steal_memory() and pmaps which do
not.
Note that pmap_steal_memory() needs to adjust *vstartp and/or
*vendp only if it used addresses within the range provided to UVM
via the pmap_virtual_space() call. I.e. it is not necessary to do
so in any current pmap_steal_memory() implementation.
|
| 1.120 | 21-Apr-2001 |
thorpej | #define away pmap_update() in <machine/pmap.h> so that no function
call overhead is incurred as we start sprinkling pmap_update() calls
throughout the source tree (no pmaps currently defer operations, but
we are adding the infrastructure to allow them to do so).
|
| 1.119 | 21-Mar-2001 |
chs | use ubc_winshift instead of ubc_winsize in pmaps to set up kernel
virtual space. the latter isn't initialized yet when the value is needed.
fixes PR 12440.
|
| 1.118 | 15-Mar-2001 |
chs | eliminate the KERN_* error codes in favor of the traditional E* codes.
the mapping is:
KERN_SUCCESS 0
KERN_INVALID_ADDRESS EFAULT
KERN_PROTECTION_FAILURE EACCES
KERN_NO_SPACE ENOMEM
KERN_INVALID_ARGUMENT EINVAL
KERN_FAILURE various, mostly turn into KASSERTs
KERN_RESOURCE_SHORTAGE ENOMEM
KERN_NOT_RECEIVER <unused>
KERN_NO_ACCESS <unused>
KERN_PAGES_LOCKED <unused>
|
| 1.117 | 14-Jan-2001 |
thorpej | branches: 1.117.2;
splimp() -> splvm()
|
| 1.116 | 21-Dec-2000 |
chs | expose the tunables ubc_nwins and ubc_winsize in uvm_param.h.
add the space used by UBC mappings to the initial PTE calculations
for pmaps that do that (mips and alpha).
|
| 1.115 | 10-Dec-2000 |
chs | in pmap_enter(), do not mark the page modified just because we mapped it
for write to a kernel address. callers may now use the "flags" argument
to cause this to happen when desired.
|
| 1.114 | 24-Nov-2000 |
chs | increase PAGER_MAP_SIZE to 16MB and move it to uvm_pager.h
since the alpha and mips pmaps use it.
|
| 1.113 | 31-Oct-2000 |
jeffs | Add mips_pagecopy/zero assembly loops for use by pmap_copy/zero_page*()
to allow the almost-64-bit compilation use ld/sd.
|
| 1.112 | 31-Oct-2000 |
jeffs | At the end of pmap_zero/copy_page() use hit instead of index op when
running with multi-way caches. Since we know the ops will mostly
hit as we just dirtied those lines a single hit op is cheaper than
an index op for each way.
|
| 1.111 | 31-Oct-2000 |
jeffs | Add MIPS3_NO_PV_UNCACHED option to handle virtual coherency issues by
only allowing one mapping at a time instead of mapping uncached. Done
by removing conflicting mappings from the pmap when entering a new
mapping. UVM will remember and re-fault the requested page when needed
for the original mapping. Originally done to support our internal machine
that does not support uncached memory completely. Not enabled by default
currently. It may make sense to try on the cobalt or sgi ports.
|
| 1.110 | 31-Oct-2000 |
jeffs | Add mips_indexof() macro to make code for checking the cache index
easier to read.
|
| 1.109 | 10-Oct-2000 |
jeffs | Fix race between pmap_enter() and pagedaemon. If we are low on memory and
pmap_enter() cannot allocate the segmap return failure if PMAP_CANFAIL
instead of sleeping. Otherwise panic. Both alpha and i386 do this. Do
not pmap_enter_pv() until after this is done so the data structures are
not partially allocated. This should prevent pmap_page_protect() from
getting stuck when called from pagedaemon.
|
| 1.108 | 21-Sep-2000 |
thorpej | Make PMAP_PAGEIDLEZERO() return a boolean value. FALSE indidcates
that the page being zero'd was not completed and that page zeroing
should be aborted. This may be used by machine-dependent code doing
slow page access to reduce the latency of running a process that has
become runnable while in the middle of doing a slow page zero.
|
| 1.107 | 13-Sep-2000 |
nisimura | Introduce 'segbase' global variable to hold the pointer to current
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
|
| 1.106 | 13-Sep-2000 |
chuck | modify mips3 locore to elminate the abuse of XContext
so that we can run on systems that do not have XContext
(e.g. IDT 32364).
|
| 1.105 | 01-Aug-2000 |
jeffs | Make mips3_FlushICache() convert a0 into a KSEG0 + virtual index like
the _2way and mips3_FlushDCache(). This lets all mips3 cache ops accept
user virtual addresss w/o a tlb miss. Since this is now done in both
ICache flush routines, no need to do it in pmap.c. Fixed R4400
stability problems with setregs() cache flushing.
|
| 1.104 | 20-Jul-2000 |
jeffs | Make pmap_prefer() use a global setting based on cache size
instead of assuming 64KB. This allows best fit and will
support bigger caches.
|
| 1.103 | 29-Jun-2000 |
mrg | remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.102 | 26-Jun-2000 |
mrg | remove/move more mach vm header files:
<vm/pglist.h> -> <uvm/uvm_pglist.h>
<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
<vm/vm_object.h> -> nothing
<vm/vm_pager.h> -> into <uvm/uvm_pager.h>
also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.
|
| 1.101 | 26-Jun-2000 |
nisimura | Abandon {mips1,mips3}_TBRPL() which have little gain than TLBUpdate().
|
| 1.100 | 22-Jun-2000 |
soren | Remove extraneous mips1_TBRPL() prototype.
|
| 1.99 | 09-Jun-2000 |
soda | branches: 1.99.2;
rename
vad_to_pfn() -> mips_paddr_to_tlbpfn()
pfn_to_vad() -> mips_tlbpfn_to_paddr()
as suggested by thorpej on port-mips Mar 27.
|
| 1.98 | 09-Jun-2000 |
soda | make paddr_t 64bit on arc port by introducing _MIPS_PADDR_T_64BIT.
|
| 1.97 | 09-May-2000 |
shin | branches: 1.97.2;
bugfix: make sure there is no valid data in data cache, when last
mapping to the physical page is removed (R3000/MIPS1).
delete cache operations in pmap_zero_page_uncached().
|
| 1.96 | 30-Apr-2000 |
soren | No need for flushing the cache after zeroing a page uncached.
|
| 1.95 | 28-Apr-2000 |
soren | Zero free pages in the idle loop.
|
| 1.94 | 21-Apr-2000 |
shin | make it compile with -DDEBUG.
|
| 1.93 | 16-Apr-2000 |
nisimura | Change the way how pmap_protect() modifies the protection of KSEG2
space using MIPS_TBRPL() call. It avoils to 'vistimize' a possibly
useful TLB entry. XXX MachTLBUpdate() will be retired, soon.
|
| 1.92 | 12-Apr-2000 |
nisimura | - Implement mips3_TBIAP().
- Remove obsoluted routines in locore_mips3.S
- addiu -> addu, andi -> and, ori -> or.
|
| 1.91 | 10-Apr-2000 |
simonb | Use UVM_PGA_ZERO in uvm_pagealloc() calls instead of using pmap_zero_page().
|
| 1.90 | 10-Apr-2000 |
nisimura | Make sure ASID management is done in the same way of NetBSD/alpha. Rename
and change 'pmap_alloc_asid()' into 'pmap_asid_alloc()'
|
| 1.89 | 10-Apr-2000 |
simonb | Small white space and 80col wraparound cleanups.
|
| 1.88 | 02-Apr-2000 |
thorpej | Instead of checking vm_physmem[<physseg>].pgs to determine if
uvm_page_init() has completed, add a boolean uvm.page_init_done,
and test against that. Use this same boolean (rather than
pmap_initialized) in pmap_growkernel() to determine if we are
being called via uvm_page_init() to grow the kernel address space.
This fixes a problem on some i386 configurations where pmap_init()
itself was needing to have the kernel page table grown, and since
pmap_initialized was not yet set to TRUE, pmap_growkernel() was
choosing the wrong code path.
Fix tested by Havard Eidnes.
|
| 1.87 | 28-Mar-2000 |
nisimura | Abandon the initial microscale optimization of pmap_alloc_asid(),
leaving the second change intact. It'd be rather less costly to
extend the case analysis.
|
| 1.86 | 28-Mar-2000 |
simonb | Remove duplicate declaration of pmap_is_page_ro() (in <mips/pte.h> and
pmap_zero_page() (in <vm/pmap.h>).
|
| 1.85 | 28-Mar-2000 |
nisimura | The previous microscale optimazation in pmap_asid_alloc() was
half-baked and resulted in one superfluous ASID bump if new pmaps
are created when pmap_asid_generation > 0. Need to initialize pmap
fields correctly.
Yet, this possibly might not be the perfect solution. If one
process bumped pmap_asid_generation _after_ a new pmap was created
and initialized with then-current pmap_asid_generation value. In
that case, the new pmap would have another (superfluous) ASID bump
when 2nd (not 1st) CPU tick is assigned. I'm not sure if this case
would happen.
Have pmap_max_asid variable to hold the maximum number of ASID
(TLBpid) supported by processor anticipating the possible runtime
cost of ((CPUISMIPS3)? MIPS3_TLB_NUM_ASIDS : MIPS1_TLB_NUM_PIDS).
|
| 1.84 | 27-Mar-2000 |
nisimura | It's not necessary to (re-) assign pmap->pm_asidgen whenever ASID
(TLBpid) is bumped. It's ok just in the case when pmap_asid_generation
is bumped.
|
| 1.83 | 19-Mar-2000 |
soren | Updated RM5231 cache code from Jeff Smith and Ethan Solomita at Geocast.
Many thanks.
|
| 1.82 | 14-Mar-2000 |
soren | Fix typo.
|
| 1.81 | 11-Feb-2000 |
thorpej | Update for the NKMEMPAGES changes.
|
| 1.80 | 11-Dec-1999 |
simonb | Don't need "extern int physmem" - <sys/systm.h> has this already.
|
| 1.79 | 29-Nov-1999 |
uch | Some TX39 I/O region lies over 512MByte. KSEG2IOBUFSIZE reserves PTE to map there.
|
| 1.78 | 13-Nov-1999 |
mhitch | Fix an additonal return in pmap_enter() that wasn't returning a value.
Use flags (formerly access_type) to set page reference/modified status.
Don't use the PG_CLEAN flag from the UVM when checking to see if a
writeable page has been marked as modified.
When updating page status to modified from the UTLBmiss handler, set
the referenced bit in addition to the modified bit.
|
| 1.77 | 13-Nov-1999 |
thorpej | Update for pmap_enter() API change. No functional difference.
|
| 1.76 | 07-Nov-1999 |
mhitch | Don't use MIPS3_L2CACHE_ABSENT to control compiling the Level 2 cache flush
in pmap_remove_pv(). Also comment why I'm doing the second cache flush
operation.
|
| 1.75 | 06-Nov-1999 |
mhitch | Cleanup pmap_remove_pv() a bit:
Page mod/ref status is stored in the pv header, and needs to be copied to
the following entry when removing the head entry, otherwise the status
will be lost (oops!).
Move the common MIPS3 cache flush into pmap_remove_pv() and eliminate the
unnecessary testing of the return value when only compiled for MIPS1.
If the pv entry had the cache inhibited, and we remove the last cache index
alias conflict, restore caching on the mappings for that entry.
Eliminate possible extra cache flushing inherited from the pica pmap: it
was doing the flush when the head entry was being removed - not just the last
entry. Now the flush is done only when the last mapping has been removed.
Also make sure the secondary cache gets flushed [MIPS3 cache flushing needs
to be re-thought/re-done someday].
Update comment for pmap_remove_pv() to reflect these changes.
|
| 1.74 | 06-Nov-1999 |
mhitch | The previous change to pmap_create() to fix DEBUG compiles was incorrect. The
original debug output was printing the argument to pmap_create(), but
pmap_create() no longer has an argument. The incorrect change now prints
an un-initialized pointer. Change to just print out the function name.
|
| 1.73 | 04-Nov-1999 |
mhitch | Only check for cache index compatiblity on MIPS3 if there is no secondary
cache. With secondary cache, the CPU will detect cache coherency errors
and the Virtual Coherency Exception handler will flush the appropriate
cache lines to maintain cache coherency. This allows much better
performance than inhibiting the cache for the entire page. This is
very noticable when shared library mappings occur with incompatible
mappings, since there's a very likely chance the mappings will remain
for long periods of time. Systems without secondary cache will still
have the cache inhibited, so there will still be performance issues if
shared libraries don't get mmaped() on correct memory alignments.
This fixes the current problems on DECstations using the R4x00 getting
coredumped programs.
|
| 1.72 | 18-Oct-1999 |
soren | branches: 1.72.2; 1.72.4;
Make it compile with DEBUG.
|
| 1.71 | 25-Sep-1999 |
shin | branches: 1.71.2;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.70 | 12-Sep-1999 |
chs | eliminate the PMAP_NEW option by making it required for all ports.
ports which previously had no support for PMAP_NEW now implement
the pmap_k* interfaces as wrappers around the non-k versions.
|
| 1.69 | 08-Jul-1999 |
thorpej | Change the pmap_extract() interface to:
boolean_t pmap_extract(pmap_t, vaddr_t, paddr_t *);
This makes it possible for the pmap to map physical address 0.
|
| 1.68 | 17-Jun-1999 |
thorpej | pmap_change_wiring() -> pmap_unwire().
|
| 1.67 | 17-Jun-1999 |
thorpej | Remove pmap_pageable(); no pmap implements it, and it is not really useful,
because pmap_enter()/pmap_change_wiring() (soon to be pmap_unwire())
communicate the information in greater detail.
|
| 1.66 | 08-Jun-1999 |
mhitch | When entering a read-only page for MIPS3, va does not need to be adjusted by PAGE_SIZE
when flushing the I-cache.
|
| 1.65 | 27-May-1999 |
nisimura | - Change a symbolic name of TLB entrylo from 'PG_M' to 'PG_D' to reflect
processor design. MIPS 'dirty bit' is not the same as i386 'dirty bit'.
There is a growing concern of misuse in NetBSD/mips.
|
| 1.64 | 21-May-1999 |
nisimura | - Make sure ASID PARANOIADIAG work with MIPS3.
|
| 1.63 | 21-May-1999 |
nisimura | - Rename '#ifdef DIAGNOSTIC' to '#ifdef PARANOIADIAG' to detect
catastrophic events to break VM machinary. Add some more diags to
track ASID.
|
| 1.62 | 20-May-1999 |
nisimura | - Avoid recomputations inside inner-most loop which produce identical
values evreytime.
|
| 1.61 | 20-May-1999 |
nisimura | - Change pmap_alloc_asid() and pmap_activate() to make sure that
'pm_asid' member of 'pmap' structure is assigned a new value after
uvmspace_alloc() provides afresh pmap.
- ASID generation number 0 is not a reserved value anymore.
|
| 1.60 | 18-May-1999 |
nisimura | - Move MachSetPID(1) call to pmap_bootstrap() adajacent to kernel pmap
initialization code.
- Abandon mips_init_proc0() and do the 4 lines straightly in MD mach_init().
- Restore a block of code accidentally lost in prevous commit.
- Change the term 'tlbpid' to a MIPS3 nomenclature 'asid'.
- Hide PTE size exposures by symbolic names in locore.S
|
| 1.59 | 17-May-1999 |
nisimura | - Nuke one unused global variable 'mem_size'.
- Kernel pmap is now dectected by "if (pmap = pmap_kernel())" clause.
|
| 1.58 | 17-May-1999 |
nisimura | - Minor code and comment adjustments for pmap_alloc_tlbpid() and
pmap_activate(), no functional change.
|
| 1.57 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.56 | 12-Apr-1999 |
drochner | adapt to uvm_pagealloc() changes - use UVM_PGA_USERESERVE to allocate
page table pages
|
| 1.55 | 26-Mar-1999 |
mycroft | branches: 1.55.2;
Changes for modified pmap_enter() API:
* Map the message buffer with access_type = VM_PROT_READ|VM_PROT_WRITE `just
because'.
* Map the file system buffers with access_type = VM_PROT_READ|VM_PROT_WRITE to
avoid possible problems with pagemove().
* Do not use VM_PROT_EXEC with either of the above.
* Map pages for /dev/mem with access_type = prot. Also, DO NOT use
pmap_kenter() for this, as we DO NOT want to lose modification information.
* Map pages in dumpsys() with VM_PROT_READ.
* Map pages in m68k mappedcopyin()/mappedcopyout() and writeback() with
access_type = prot.
* For now, bus_dma*(), pmap_map(), vmapbuf(), and similar functions still use
access_type = 0. This should probably be revisited.
|
| 1.54 | 26-Mar-1999 |
thorpej | Don't bother allocating mb_map on these systems. Mbuf clusters are
allocated from a pool, and the MIPS and Alpha use KSEG to map pool
pages. So, mb_map wasn't actually being used. Saves around 4MB of
kernel virtual address space in a typical configuration.
Garbage-collect the related VM_MBUF_SIZE constant.
|
| 1.53 | 24-Mar-1999 |
mrg | completely remove Mach VM support. all that is left is the all the
header files as UVM still uses (most of) these.
|
| 1.52 | 05-Mar-1999 |
mhitch | Read-only unnmanaged pages on MIPS3 need the RO attribute bit, otherwise the
tlbmod exception panics. This appears to have been incorrect even in the pica
pmap.c, which I pulled in for the pmax. Fixes Xcfbpmax crashes on R40x0
systems with sfb framebuffer.
Fix resident_count tracking so it doesn't go negative. UVM will change a
page mapping without removing the original mapping. That was causing a
problem early on when getting UVM working on the mips, and the explicit
pmap_remove() done by pmap_enter() was decrementing the resident_count.
Do the pmap_remove() first, then check if the current mapping is not valid
and increment the resident_count.
|
| 1.51 | 26-Feb-1999 |
is | MIPS part of fix for PR 6152, sligtly changed from M.Hitch's version
|
| 1.50 | 16-Jan-1999 |
nisimura | - Restore 'cpuregs.h'.
|
| 1.49 | 15-Jan-1999 |
castor | * Add prototype for mips1_clean_tlb
* Add the correct version of locore_mips1.S [ See previous revision for
description of changes ]
* Use defopt'ed MIPS3_L2CACHE_ABSENT in mips_machdep.c and pmap.c
to avoid generating extraneous code.
* GC pmap_set_referenced in pmap.c
|
| 1.48 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.47 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.46 | 05-Dec-1998 |
jonathan | Track PV_REFERENCED bit as for PV_MODIFIED, to make mdsetimage work correctly.
Compatiblity with Mach VM: clear pmap-private bits in pmap_remove() if !UVM.
|
| 1.45 | 05-Dec-1998 |
jonathan | Clean up kernel PTE allocation. Allocate space for maxproc kernel stacks.
Bump UVM swap-map to avoid panics on large swap machines.
|
| 1.44 | 29-Nov-1998 |
jonathan | Add PV_REFERENCED and track as for PV_MODIFIED,.
UVM relies on pmap modules keeping track of modified/referenced bits
after a page has been removed from all mappings. So *dont* clear
PV_REFERENCED or PV_MODIFIED flags in pmap_remove().
|
| 1.43 | 15-Nov-1998 |
mhitch | Change page modification emulation: don't fiddle with VM flags directly.
Track page modification status in the PV entry like the alpha, and let
pmap_is_modified() return current status back to the VM system. UVM now
works reliably.
Garbage collect the old pmap_attribute[] stuff.
|
| 1.42 | 19-Oct-1998 |
tron | Defopt SYSVMSG, SYSVSEM and SYSVSHM.
|
| 1.41 | 11-Sep-1998 |
jonathan | branches: 1.41.2;
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.40 | 19-May-1998 |
thorpej | It is no longer necessary for pmap_pinit() and pmap_release() to be
pmap interface functions, as NetBSD no longer uses statically allocated
pmaps (except for the kernel pmap, which is special-cased anyhow).
|
| 1.39 | 06-May-1998 |
mhitch | When changing the mapping on a page, remove the previous mapping if
there is one. The Mach VM system seems to take care of this, so it
hasn't knowingly caused a problem. UVM does change mappings without
removing the current mapping, and will pmap_page_protect() hangs
if pmap_enter() doesn't remove the previous mapping.
|
| 1.38 | 22-Mar-1998 |
thorpej | Implement pmap_deactivate() (a noop in this pmap) and clean up
pmap_activate() a little.
|
| 1.37 | 12-Mar-1998 |
thorpej | Garbage-collect; vm_page_alloc1() and vm_page_free1() are now in MI code.
|
| 1.36 | 12-Mar-1998 |
thorpej | Add support for UVM.
|
| 1.35 | 25-Feb-1998 |
thorpej | Implement and switch to MACHINE_NEW_NONCONTIG.
|
| 1.34 | 01-Feb-1998 |
jonathan | Change VM_WAIT --> vm_wait() in mips pmap code, where waiting after
vm_page_alloc1() fails to return a page for use as a segtab.
XXX there must be a better way to do this.
|
| 1.33 | 17-Oct-1997 |
jonathan | branches: 1.33.2;
Add explicit #include <vm/vm.h> before mips/pte.h is included.
|
| 1.32 | 17-Oct-1997 |
jonathan | * Performance improvements from July 1997:
Avoid unecessary cache writebacks on mips3. 10% win on kernel builds.
* _KERNEL_RCSID.
|
| 1.31 | 09-Aug-1997 |
jonathan | mips pmap_activate:
* prototype and definition for pmap_activate(p). Updates the segtab,
and changes the active ASID if p == curproc.
* Make reserved fixed-address (UADDR) kernelstack PTEs global,
so we still have a kernel stack after pmap_activate() on curproc.
* make KSEG2 mappings for p_addr global (see above.)
Seems to detune contextswitch and NTP resolution (by 60 ms), but
thepmap_activate() interface is mandatory. Needs more thought.
|
| 1.30 | 29-Jul-1997 |
mhitch | branches: 1.30.2;
Get rid of the MIPS3 mess I left in pmap_enter_pv(). The cache inhibit
of cache-index incompatible virtual mappings for a physical page may be
required for hardware without secondary (level 2) cache to detect and
correct virtual coherency problems. I'm not sure this is really needed
anymore, since pmap_prefer() took care of of the cache-index
incompatible mappings that I have seen. Count the times a page is
cache inhibited in enter_stats if DEBUG.
Wait for memory instead of panic() on failure to allocate a page for the
segtab or segmap [from OpenBSD arc port]. Also check for malloc()
failure on allocation of a new pv entry and panic().
Increment resident_count when adding a new page to a pmap [also from
OpenBSD]. Process resident size is now valid.
|
| 1.29 | 28-Jul-1997 |
jonathan | Add comments to pmap_copy_page() and pmap_zero_page() describing the
cache flush operations required on a virtually-indexed, physically-tagged
mips3 with no L2 cache to provide cache-coherence exceptions.
(Similar to what's needed with a virtually-indexed, virtually-tagged cache.)
|
| 1.28 | 23-Jul-1997 |
jonathan | Unroll pmap_copy_page() and pmap_zero_page() inlined loops even further.
|
| 1.27 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.26 | 22-Jun-1997 |
jonathan | Final changes for configuring MIPS1 and MIPS3 in a single kernel.
* cpuregs.h:
rename remaining VMMACH_xxx TLB macros to MIPS_TLB_xxx.
Add compile-time MIPS3-only, compile-time MIPS1-only, and
runtime (both) definitions for number of TLB ASIDs (tlb pids)
and shift count to extract a TLB pid.
* locore.h:
Delete unused vector slot for indexed TLB writes.
mips1 and mips3 TLBs are different enough that we have
to break them out at the caller anyway.
* Add compile-time MIPS3-only andcompile-time MIPS1-only
macros to call locore functions directly by name.
Use the existing method table only if
* mips/mips_machdep.c, mips/trap.c, mips/pmap.c, pmax/machdep.c:
Use MIPS3_ or MIPS1_ specific names for TLB pids in
mips3 and mips1 specific code paths (e.g., creating the kernel stack
for process 0).
Add `options MIPS3' to pmax/conf/GENERIC.
|
| 1.25 | 21-Jun-1997 |
mhitch | Fix pmap_prefer() to work in merged for mips1/mips3.
Remove unused debug procedure I forgot to remove previously.
Consolidate the vm_page_free1() calls in pmap_release(). Duplicate code
was a result of the way I merged the MIPS3 support from the pica pmap.c.
Enhance the comment on flushing the cache when releasing the segmap pages,
and add a comment about the currently unused code to uncache pages in
pmap_enter_pv().
|
| 1.24 | 20-Jun-1997 |
jonathan | Correct cast type on mips3_MachHitFlushDCache().
|
| 1.23 | 20-Jun-1997 |
jonathan | MachHitFlushDCache -> mips3_HitFlushDCache().
Add XXX reminder to d-cache flush I don't understand.
|
| 1.22 | 19-Jun-1997 |
mhitch | Use same cachesize variables for mips1 and mips3, and rename the variables
per Jonathan's request.
|
| 1.21 | 17-Jun-1997 |
jonathan | Check for '#ifdef MIPS1', not '#ifndef MIPS3', since we can now have both.
Add runtime check for 'if (CPUISMIPS3)' inside #ifdef MIPS3.
Add runtime check for 'if (!CPUISMIPS3)' inside #ifdef MIPS1.
|
| 1.20 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.19 | 16-Jun-1997 |
jonathan | Generic mips pmap/vm code: move the merged pmax mips1/mips3 vm_machdep
and pmap code to arch/mips/mips.
Use <mips/XXX.h> header files, not <machine/XXX.h>.
|
| 1.18 | 15-Jun-1997 |
mhitch | More merged MIPS1/MIPS3 support - from pica pmap.c
|
| 1.17 | 26-May-1997 |
jonathan | Lint: printf formats inside #ifdef DEBUG (long vs int, %x vs pointer).
Add XXX to inconsistency: sometimes pmap.c calls blkclr(), sometimes it uses
an inline C loop tuned for 4-entry writebuffer. Why?
|
| 1.16 | 25-May-1997 |
jonathan | Lint: move forward declarations to beginning of file and protoize.
delete unused variables and add redundant parens where suggested.
|
| 1.15 | 18-May-1997 |
mhitch | Eliminate vm_pmap.
|
| 1.14 | 14-Jan-1997 |
jonathan | pmaxpagesperpage -> mipspagesperpage
|
| 1.13 | 13-Oct-1996 |
christos | branches: 1.13.2;
backout previous kprintf change
|
| 1.12 | 11-Oct-1996 |
christos | printf -> kprintf, sprintf -> ksprintf
|
| 1.11 | 07-Oct-1996 |
jonathan | Use "MIPS1" and "MIPS3" as preprocessor tokens to select {config,compile}-time
support for mips-1 (r2000 family) and mips-3 (r4000 family) CPUs.
Avoids inconsistent use of CPU_R2000 and CPU_R3000.
|
| 1.10 | 19-May-1996 |
jonathan | Include <machine/locore.h>, to force all MIPS cpu-model specific
locore calls to go via a locore-entry jumptable.
Use mips_btop(), mips_round_page, mips_trunc_seg() instead
of pmax_btop(), pmax_round_page, pmax_trunc_seg().
Add Per's software-readonly-bit mechanism, since the r2000 and r4000
hardware TLB entries are very different, and the r4k has no space for
software bits in TLB entries. That is, this pmap code still won't work
on r4000 machines. Some other solution, like another jump table for
clients of the pmap code, is necessary.
|
| 1.9 | 10-Apr-1995 |
mycroft | Oops; finish that last change.
|
| 1.8 | 10-Apr-1995 |
mycroft | Bring back pmap_kernel(), for now always inlined as a pointer to
kernel_pmap_store.
|
| 1.7 | 23-Nov-1994 |
dean | thread_wakeup wants (void *) not (int)
|
| 1.6 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.5 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.4 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.3 | 16-Jan-1994 |
deraadt | add a pmap_kernel() function
|
| 1.2 | 15-Oct-1993 |
deraadt | update from rick, tarfile of Oct 11 10:46
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.13.2.1 | 18-Jan-1997 |
thorpej | Update from trunk.
|
| 1.30.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.33.2.1 | 08-Feb-1998 |
mellon | Pull up 1.34 (ross)
|
| 1.41.2.5 | 06-Dec-1998 |
drochner | pull up 1.44-1.46 - PV_REFERENCED, Sysmapsize
|
| 1.41.2.4 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.41.2.3 | 15-Nov-1998 |
drochner | sync to trunk (page modified bit handling, needed for UVM)
|
| 1.41.2.2 | 20-Oct-1998 |
drochner | sync to trunk rev. 1.42
|
| 1.41.2.1 | 15-Oct-1998 |
nisimura | - change from mips/cpureg.h to mips/cpuarch.h.
|
| 1.55.2.2 | 26-Apr-2000 |
he | Pull up revision 1.88 (requested by thorpej):
Use a more reliable method to determine if uvm_page_init() has
completed. This fixes a problem observed on some i386 configs
(typically with lots of memory) where the kernel page table needs
to grow during initialization.
|
| 1.55.2.1 | 16-Apr-1999 |
chs | branches: 1.55.2.1.2;
pull up 1.55 -> 1.56:
add a `flags' argument to uvm_pagealloc_strat().
define a flag UVM_PGA_USERESERVE to allow non-kernel object
allocations to use pages from the reserve.
use the new flag for allocations in pmap modules.
|
| 1.55.2.1.2.2 | 02-Aug-1999 |
thorpej | Update from trunk.
|
| 1.55.2.1.2.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.71.2.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.72.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.72.2.8 | 23-Apr-2001 |
bouyer | Sync with HEAD.
|
| 1.72.2.7 | 27-Mar-2001 |
bouyer | Sync with HEAD.
|
| 1.72.2.6 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.72.2.5 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.72.2.4 | 13-Dec-2000 |
bouyer | Sync with HEAD (for UBC fixes).
|
| 1.72.2.3 | 08-Dec-2000 |
bouyer | Sync with HEAD.
|
| 1.72.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.72.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.97.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.99.2.2 | 15-Nov-2001 |
he | Pull up revision 1.135 (via patch, requested by shin):
Fix problems on MIPS machines without secondary cache.
Manifestations are random /bin/sh core dumps and log messages like
``pmap_unwire: wiring for pmap 0x... va 0x... didn't change''.
Caused by virtual alias problem in pmap_copy_page(). Fixes PR#13587.
|
| 1.99.2.1 | 22-Jun-2000 |
soren | Pull-up from trunk: correct _TBRPL() prototype and remove from pmap.c.
|
| 1.117.2.2 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.117.2.1 | 09-Apr-2001 |
nathanw | Catch up with -current.
|
| 1.127.2.6 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.127.2.5 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.127.2.4 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.127.2.3 | 13-Sep-2001 |
thorpej | Update the kqueue branch to HEAD.
|
| 1.127.2.2 | 25-Aug-2001 |
thorpej | Merge Aug 24 -current into the kqueue branch.
|
| 1.127.2.1 | 03-Aug-2001 |
lukem | update to -current
|
| 1.132.2.1 | 01-Oct-2001 |
fvdl | Catch up with -current.
|
| 1.134.2.4 | 12-Nov-2001 |
thorpej | Sync the thorpej-mips-cache branch with -current.
|
| 1.134.2.3 | 11-Nov-2001 |
shin | sync with trunk (rev. 1.135).
fix virtual alias problem in pmap_copy_page().
|
| 1.134.2.2 | 04-Nov-2001 |
shin | * remove unused function pmap_zero_page_uncached().
* s/MachFlushDCache/mips_dcache_wbinv_range_index/
* s/MachHitFlushDCache/mips_dcache_wbinv_range/
|
| 1.134.2.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.138.2.10 | 07-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.138.2.9 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.138.2.8 | 02-Dec-2002 |
wdk | Tidy up for Scheduler Activations:
- Change curproc -> curlwp
- Display LWP id along with PID for kernel generated messages
|
| 1.138.2.7 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.138.2.6 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.138.2.5 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.138.2.4 | 11-Jan-2002 |
wdk | Fix curproc->l_proc reference in changes brought in from current
|
| 1.138.2.3 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.138.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.138.2.1 | 14-Nov-2001 |
wdk | file pmap.c was added on branch nathanw_sa on 2001-11-17 23:43:43 +0000
|
| 1.148.2.8 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.148.2.7 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.148.2.6 | 01-Apr-2005 |
skrll | Sync with HEAD.
|
| 1.148.2.5 | 04-Mar-2005 |
skrll | Sync with HEAD.
Hi Perry!
|
| 1.148.2.4 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.148.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.148.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.148.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.155.8.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.156.2.2 | 26-Mar-2005 |
yamt | sync with head.
|
| 1.156.2.1 | 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.157.2.1 | 21-Nov-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #961):
sys/arch/mips/mips/cache.c: revision 1.27
sys/arch/mips/include/cache.h: revision 1.8
sys/arch/mips/mips/pmap.c: revision 1.158
sys/arch/mips/mips/vm_machdep.c: revision 1.106
sys/arch/mips/mips/mem.c: revision 1.30
sys/arch/mips/include/pmap.h: revision 1.47
Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.159.2.6 | 21-Jan-2008 |
yamt | sync with head
|
| 1.159.2.5 | 27-Oct-2007 |
yamt | sync with head.
|
| 1.159.2.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.159.2.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.159.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.159.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.160.2.1 | 29-Nov-2005 |
yamt | sync with head.
|
| 1.166.12.1 | 31-Mar-2006 |
tron | Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.
|
| 1.166.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.166.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.166.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.166.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.167.10.2 | 18-Dec-2006 |
yamt | sync with head.
|
| 1.167.10.1 | 10-Dec-2006 |
yamt | sync with head.
|
| 1.167.8.1 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.168.2.1 | 20-Dec-2006 |
bouyer | Pull up following revision(s) (requested by simonb in ticket #289):
sys/arch/mips/mips/pmap.c: revision 1.169
Handle KSEG0 addresses specifically in pmap_extract(), similar
to how other KSEG-style pmaps (alpha, sh3, sh5) do.
Add a DIAGNOSTIC panic for KSEG1 addresses (nothing should touch
uncached memory, right?)
Clean up the the pmapdebug printfs a little too (athough with
more ugly #ifdef DEBUG bits of code).
XXX: should use DPRINTF() type printfs here.
Fixes panic running regress/sys/kern/umount on MIPS platforms
reported by Martin Husemann.
--
|
| 1.169.2.3 | 24-Mar-2007 |
yamt | sync with head.
|
| 1.169.2.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.169.2.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.172.2.4 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.172.2.3 | 20-Aug-2007 |
ad | Sync with HEAD.
|
| 1.172.2.2 | 15-Jul-2007 |
ad | Get pmax working.
|
| 1.172.2.1 | 13-Mar-2007 |
ad | Sync with head.
|
| 1.173.8.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.175.14.1 | 13-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.175.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.175.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.175.8.1 | 28-Oct-2007 |
joerg | Sync with HEAD.
|
| 1.177.8.1 | 02-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.177.4.2 | 24-Dec-2007 |
ad | Get rid of the mutex for now.
|
| 1.177.4.1 | 04-Dec-2007 |
ad | Pull the vmlocking changes into a new branch.
|
| 1.177.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.178.10.6 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.178.10.5 | 11-Mar-2010 |
yamt | sync with head
|
| 1.178.10.4 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.178.10.3 | 18-Jul-2009 |
yamt | sync with head.
|
| 1.178.10.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.178.10.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.178.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.178.6.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.178.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.179.16.47 | 14-Feb-2014 |
matt | Change KASSERTMSG/KDASSERTMSG to use varadic arguments like HEAD.
panic -> vpanic, add panic wrapper to vpanic.
|
| 1.179.16.46 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.179.16.45 | 09-Jul-2012 |
matt | Use a spinlock to protect the segtab queues. Use union pmap_segmap and
pmap_segmap_t to track -HEAD. Use KERNEL_PID for the same reason.
|
| 1.179.16.44 | 27-Feb-2012 |
matt | Add a page-table-page cache to keep reuse just released page table tables.
Actually remove the addresses in pmap_remove_all.
|
| 1.179.16.43 | 16-Feb-2012 |
matt | Move the ksegx tlb init code into its own function.
Fix a problem with concurrent shootdowns by tracking what cpus want a
shootdown for a pmap, and if anoter cpu wants a shootdown, perform the
shootdown on ourselves.
|
| 1.179.16.42 | 14-Feb-2012 |
matt | Fix various LP64 thinkos.
|
| 1.179.16.41 | 13-Feb-2012 |
matt | Add mm_md_direct_mapped_virt (inverse of mm_md_direct_mapped_phys). Add a
third argument, vsize_t *, which, if not NULL, returns the amount of virtual
space left in that direct mapped segment.
Get rid most of the individual direct_mapped assert and use the above
routines instead.
Improve kernel core dump code.
|
| 1.179.16.40 | 12-Feb-2012 |
matt | pmap pv pages can come from KSEGX too.
|
| 1.179.16.39 | 10-Feb-2012 |
matt | Fix typo.
|
| 1.179.16.38 | 10-Feb-2012 |
matt | Teach pmap_extract about KSEGX.
|
| 1.179.16.37 | 10-Feb-2012 |
matt | Don't double claim a kmem page.
|
| 1.179.16.36 | 09-Feb-2012 |
matt | Add mips_page_to_pggroup which return what pggroup a page belongs to.
Eradicate VM_FREELIST_MAX
When adding pages to the system, track what freelists get pages.
|
| 1.179.16.35 | 23-Dec-2011 |
matt | Split syncicache functions into separate file: pmap_syncicache.
Support up to 1024 ASIDs.
Always use atomic ops for manipulating pm_shootdown_pending
Nuke PMAP_POOLPAGE_DEBUG
defparam MIPS_PAGE_SHIFT
Track colors of execpages.
|
| 1.179.16.34 | 16-Dec-2011 |
matt | Fix a bug spotted by a user (resident flag becoming stale).
Add a few more KSEGX tests.
Only set pmap_page_colormask if virtual caches aliases are possible.
|
| 1.179.16.33 | 01-Dec-2011 |
matt | don't compare pfn against phys_addr.
|
| 1.179.16.32 | 01-Dec-2011 |
matt | Deal with uvmexp.ncolors being 0.
|
| 1.179.16.31 | 29-Nov-2011 |
matt | Take part of the KSEG2 space and use it to "almost" direct another 256MB
of memory so that N32 kernels can make use of ram outside of KSEG0. This
allows N32 kernels to be useful on systems with 4GB of RAM or more.
|
| 1.179.16.30 | 28-May-2011 |
matt | Change pmap_steal_memory, if it can, to prefer stealing from the physseg with
the least amount of free pages.
|
| 1.179.16.29 | 25-May-2011 |
matt | Make uvm_map recognize UVM_FLAG_COLORMATCH which tells uvm_map that the
'align' argument specifies the starting color of the KVA range to be returned.
When calling uvm_km_alloc with UVM_KMF_VAONLY, also specify the starting
color of the kva range returned (UMV_KMF_COLORMATCH) and pass those to
uvm_map.
In uvm_pglistalloc, make sure the pages being returned have sequentially
advancing colors (so they can be mapped in a contiguous address range).
Add a few missing UVM_FLAG_COLORMATCH flags to uvm_pagealloc calls.
Make the socket and pipe loan color-safe.
Make the mips pmap enforce strict page color (color(VA) == color(PA)).
|
| 1.179.16.28 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.179.16.27 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.179.16.26 | 10-Jun-2010 |
cliff | Move "space on 256MB sbmips" comment into alternate of #ifdef where it applies.
Matthew Green noticed this one, thanks.
|
| 1.179.16.25 | 10-Jun-2010 |
cliff | in pmap_bootstrap:
- increase Sysmapsize to allow mapping all memory (e.g. for big tmpfs)
- when calculating mips_virtual_end, cast Sysmapsize to vaddr_t
before multiplying by NBPG to avoid overflow
|
| 1.179.16.24 | 04-May-2010 |
matt | Add code after pmap_remove_all nukes the ASID to reestablish it after the
subsequent pmap_update.
|
| 1.179.16.23 | 08-Apr-2010 |
matt | Fix problem where pmap_clear_modify could go into an infinite loop.
Spotted by cyber.
|
| 1.179.16.22 | 11-Mar-2010 |
matt | Add MP-aware icache support.
|
| 1.179.16.21 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.179.16.20 | 27-Feb-2010 |
snj | It's "PARANOIADIAG", not "PARANIOADIAG". Fix a couple small errors in
comments.
|
| 1.179.16.19 | 27-Feb-2010 |
matt | Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
|
| 1.179.16.18 | 25-Feb-2010 |
matt | Make the UP and MP ASID allocation algorithm common. Significantly improve
the algorithm. Now when we exhaust the ASIDs, interrogate the TLB for active
ASIDS and release all the other for future allocations. This leaves the
TLB entries with ASIDs valid avoiding the need to re-incur TLB misses for
them.
|
| 1.179.16.17 | 24-Feb-2010 |
matt | Fix bug because of typo: "if (foo); something" is not the
same as "if (foo) something". Add some more KASSERTs (used to find the bug).
|
| 1.179.16.16 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.179.16.15 | 06-Feb-2010 |
matt | Add some prelim poolpage debugging code.
Don't use ptoa to expand pfns to paddrs since it's cast with a vaddr_t.
|
| 1.179.16.14 | 26-Jan-2010 |
snj | Fix comment gimplish.
|
| 1.179.16.13 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.179.16.12 | 22-Jan-2010 |
matt | Seperate the pmap TLB functions into their own file.
For 32 bit kernels, make sure that mips_virtual_end doesn't go past
VM_MAX_KERNEL_ADDRESS.
|
| 1.179.16.11 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.179.16.10 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.179.16.9 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.179.16.8 | 09-Jan-2010 |
matt | On _LP64, allocate kernel memory from the first 4GB. Otherwise first 512MB.
Until we get full bounce buffer support, this should with device that only
support <4GB addresses.
|
| 1.179.16.7 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.179.16.6 | 19-Dec-2009 |
matt | Change pmap_steal_memory to map allocated memory in XKPHYS is _LP64 kernels.
The CCA used is the one used for KSEG0.
|
| 1.179.16.5 | 08-Sep-2009 |
matt | For LP64 kernels, only use KSEG0 for pmap_steal_memory. Everything else uses
XKPHYS. Use the new MIPS_PHYS_TO_XKPHYS_{,UN}CACHED macros.
|
| 1.179.16.4 | 07-Sep-2009 |
matt | Fix MIPS_PHYS_TO_XKPHYS calls.
|
| 1.179.16.3 | 07-Sep-2009 |
matt | Add LP64 support.
|
| 1.179.16.2 | 23-Aug-2009 |
matt | PRIxVADDR, PRIdVSIZE, PRIxVSIZE, or PRIxPADDR as appropriate.
Use __intXX_t or __uintXX_t as appropriate in <mips/types.h>
|
| 1.179.16.1 | 21-Aug-2009 |
matt | Add CTASSERTS to make sure MIPS_KSEG* are correctly defined.
Use PRIx{PADDR,VADDR}.
Deal with XKPHYS in {,un}map_poolpage and kvtophys.
|
| 1.179.8.2 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.179.8.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.179.6.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.181.2.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.188.4.3 | 31-May-2011 |
rmind | sync with head
|
| 1.188.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.188.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.188.2.11 | 10-Nov-2010 |
uebayasi | Fix thinko; make vm_physseg ptr swap really work.
|
| 1.188.2.10 | 10-Nov-2010 |
uebayasi | Always use VM_PHYSMEM_PTR().
|
| 1.188.2.9 | 06-Nov-2010 |
uebayasi | Sync with HEAD.
|
| 1.188.2.8 | 06-Nov-2010 |
uebayasi | Fix build.
|
| 1.188.2.7 | 04-Nov-2010 |
uebayasi | Split physical device segment pages from "managed" to "managed
device". Cache that information as a flag PG_DEVICE so that callers
don't need to walk physsegs everytime.
Remove PQ_FIXED, which means that page daemon doesn't need to know
device segment pages at all. But still fault handlers need to know
them.
I think this is what I can do best now.
|
| 1.188.2.6 | 31-Oct-2010 |
uebayasi | We already have a flag PMAP_NOCACHE. s/PMAP_UNMANAGED/PMAN_NOCACHE/.
Pointed out by Chuck Silvers, thanks.
|
| 1.188.2.5 | 30-Oct-2010 |
uebayasi | Implement pmap_physload_device(9) to replace xmd(4) MD backend.
Implement pmap_mmap(9) and use it from mem(4) and xmd(4).
|
| 1.188.2.4 | 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.188.2.3 | 28-Apr-2010 |
uebayasi | Always use struct vm_physseg *vm_physmem_ptrs[] in MD code.
|
| 1.188.2.2 | 27-Apr-2010 |
uebayasi | Support PMAP_UNMANAGED in some pmaps.
(Others should be converted eventually, but no problem while managed
device page is not used.)
|
| 1.188.2.1 | 25-Feb-2010 |
uebayasi | Use VM_PAGE_TO_MD(). Only compile tested.
|
| 1.192.4.3 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.192.4.2 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.192.4.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.192.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.201.2.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.205.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.205.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.205.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.205.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.207.2.4 | 27-Aug-2016 |
bouyer | Pull up following revision(s) (requested by skrll in ticket #1390):
sys/arch/mips/mips/pmap.c: revision 1.221
sys/arch/mips/mips/pmap.c: revision 1.222
sys/arch/mips/mips/pmap.c: revision 1.223
Fix a bug introduced by me in 1.214 where unmanaged mappings would be
affected by calls to pmap_page_protect which is wrong. Now PV_KENTER
mappings are left intact.
Thanks to chuq for spotting my mistake and reviewing this diff.
Thanks to everyone who tested it as well.
Fix PR/51288 reproducable panic on evbmips64-eb (erlite)
pmap_page_remove from the previous change neglected to terminate the pv
list correctly when it started with an initial unmanaged mapping and
subsequent managed mappings. Fix this.
Fix MIPS3_NO_PV_UNCACHED alias handling by looping through the pv_list
looking for bad aliases and removing the bad entries. That is, revert
to the code before the matt-mips64 merge.
Additionally, fix the pmap_update call to not use the (recently
removed/freed) pv for the pmap_t.
Fixes the following two PRs
PR/49903: Panic during installation on WorkPad Z50 (hpcmips) whilst uncompressing base.tgz
PR/51226: Install bug for hpcmips NetBSD V7 using FTP Full installation
|
| 1.207.2.3 | 11-Jun-2014 |
msaitoh | Pull up following revision(s) (requested by skrll in ticket #1068):
sys/arch/mips/mips/pmap.c: revision 1.214
sys/arch/mips/include/pmap.h: revision 1.63
sys/arch/mips/mips/pmap_segtab.c: revision 1.8
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable/unusable on cobalt qube2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.207.2.2 | 21-May-2014 |
bouyer | Pull up following revision(s) (requested by skrll in ticket #1056):
sys/arch/mips/mips/pmap.c: revision 1.211
sys/arch/mips/mips/pmap.c: revision 1.212
sys/arch/mips/mips/pmap.c: revision 1.213
sys/arch/mips/mips/vm_machdep.c: revision 1.143
sys/arch/mips/mips/pmap.c: revision 1.210
Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering if
a cache invalidation is required.
Additionally flush the cache for the uarea va to avoid potential (future)
cache aliases in cpu_uarea_free when handing pages back to uvm for later
use.
ok matt@
Hopefully this addresses the instability reported in the following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46170 - NetBSD/cobalt 6.0_BETA does not boot
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
Grab pv_list lock in pmap_unmap_ephemeral_page only when needed.
Make PARANOIADIAG compile.
Use pmap_tlb_asid_check to reduce code c&p.
|
| 1.207.2.1 | 05-Jul-2012 |
riz | branches: 1.207.2.1.4; 1.207.2.1.6;
Pull up following revision(s) (requested by matt in ticket #406):
sys/arch/mips/include/pmap.h: revision 1.62
sys/arch/mips/mips/pmap.c: revision 1.208
sys/arch/mips/mips/pmap_segtab.c: revision 1.5
Change lockless segtab management to use a mutex for protection. Some =
minor
changes to make this closer to common/pmap/tlb/pmap_segtab.c
=20
=20
|
| 1.207.2.1.6.3 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1390):
sys/arch/mips/mips/pmap.c: 1.221-1.223
Fix a bug introduced by me in 1.214 where unmanaged mappings would be
affected by calls to pmap_page_protect which is wrong. Now PV_KENTER
mappings are left intact.
Thanks to chuq for spotting my mistake and reviewing this diff.
Thanks to everyone who tested it as well.
Fix PR/51288 reproducable panic on evbmips64-eb (erlite)
pmap_page_remove from the previous change neglected to terminate the pv
list correctly when it started with an initial unmanaged mapping and
subsequent managed mappings. Fix this.
Fix MIPS3_NO_PV_UNCACHED alias handling by looping through the pv_list
looking for bad aliases and removing the bad entries. That is, revert
to the code before the matt-mips64 merge.
Additionally, fix the pmap_update call to not use the (recently
removed/freed) pv for the pmap_t.
Fixes the following two PRs
PR/49903: Panic during installation on WorkPad Z50 (hpcmips) whilst uncompressing base.tgz
PR/51226: Install bug for hpcmips NetBSD V7 using FTP Full installation
|
| 1.207.2.1.6.2 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1068):
sys/arch/mips/include/pmap.h: revision 1.63
sys/arch/mips/mips/pmap.c: revision 1.214
sys/arch/mips/mips/pmap_segtab.c: revision 1.8
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.207.2.1.6.1 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1056):
sys/arch/mips/mips/pmap.c: revision 1.210-1.213
sys/arch/mips/mips/vm_machdep.c: revision 1.143
Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering if
a cache invalidation is required.
Additionally flush the cache for the uarea va to avoid potential (future)
cache aliases in cpu_uarea_free when handing pages back to uvm for later
use.
ok matt@
Hopefully this addresses the instability reported in the following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46170 - NetBSD/cobalt 6.0_BETA does not boot
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
Grab pv_list lock in pmap_unmap_ephemeral_page only when needed.
Make PARANOIADIAG compile.
Use pmap_tlb_asid_check to reduce code c&p.
|
| 1.207.2.1.4.3 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1390):
sys/arch/mips/mips/pmap.c: 1.221-1.223
Fix a bug introduced by me in 1.214 where unmanaged mappings would be
affected by calls to pmap_page_protect which is wrong. Now PV_KENTER
mappings are left intact.
Thanks to chuq for spotting my mistake and reviewing this diff.
Thanks to everyone who tested it as well.
Fix PR/51288 reproducable panic on evbmips64-eb (erlite)
pmap_page_remove from the previous change neglected to terminate the pv
list correctly when it started with an initial unmanaged mapping and
subsequent managed mappings. Fix this.
Fix MIPS3_NO_PV_UNCACHED alias handling by looping through the pv_list
looking for bad aliases and removing the bad entries. That is, revert
to the code before the matt-mips64 merge.
Additionally, fix the pmap_update call to not use the (recently
removed/freed) pv for the pmap_t.
Fixes the following two PRs
PR/49903: Panic during installation on WorkPad Z50 (hpcmips) whilst uncompressing base.tgz
PR/51226: Install bug for hpcmips NetBSD V7 using FTP Full installation
|
| 1.207.2.1.4.2 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1068):
sys/arch/mips/include/pmap.h: revision 1.63
sys/arch/mips/mips/pmap.c: revision 1.214
sys/arch/mips/mips/pmap_segtab.c: revision 1.8
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.207.2.1.4.1 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1056):
sys/arch/mips/mips/pmap.c: revision 1.210-1.213
sys/arch/mips/mips/vm_machdep.c: revision 1.143
Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering if
a cache invalidation is required.
Additionally flush the cache for the uarea va to avoid potential (future)
cache aliases in cpu_uarea_free when handing pages back to uvm for later
use.
ok matt@
Hopefully this addresses the instability reported in the following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46170 - NetBSD/cobalt 6.0_BETA does not boot
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
Grab pv_list lock in pmap_unmap_ephemeral_page only when needed.
Make PARANOIADIAG compile.
Use pmap_tlb_asid_check to reduce code c&p.
|
| 1.208.4.1 | 18-May-2014 |
rmind | sync with head
|
| 1.208.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.208.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.209.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.214.6.1 | 10-Jul-2016 |
martin | Pull up following revision(s) (requested by skrll in ticket #1200):
sys/arch/mips/mips/pmap.c: revision 1.221
sys/arch/mips/mips/pmap.c: revision 1.222
sys/arch/mips/mips/pmap.c: revision 1.223
Fix a bug introduced by me in 1.214 where unmanaged mappings would be
affected by calls to pmap_page_protect which is wrong. Now PV_KENTER
mappings are left intact.
Thanks to chuq for spotting my mistake and reviewing this diff.
Thanks to everyone who tested it as well.
Fix PR/51288 reproducable panic on evbmips64-eb (erlite)
pmap_page_remove from the previous change neglected to terminate the pv
list correctly when it started with an initial unmanaged mapping and
subsequent managed mappings. Fix this.
Fix MIPS3_NO_PV_UNCACHED alias handling by looping through the pv_list
looking for bad aliases and removing the bad entries. That is, revert
to the code before the matt-mips64 merge.
Additionally, fix the pmap_update call to not use the (recently
removed/freed) pv for the pmap_t.
Fixes the following two PRs
PR/49903: Panic during installation on WorkPad Z50 (hpcmips) whilst uncompressing base.tgz
PR/51226: Install bug for hpcmips NetBSD V7 using FTP Full installation
|
| 1.214.4.4 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.214.4.3 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.214.4.2 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.214.4.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.214.2.1 | 10-Jul-2016 |
martin | Pull up following revision(s) (requested by skrll in ticket #1200):
sys/arch/mips/mips/pmap.c: revision 1.221
sys/arch/mips/mips/pmap.c: revision 1.222
sys/arch/mips/mips/pmap.c: revision 1.223
Fix a bug introduced by me in 1.214 where unmanaged mappings would be
affected by calls to pmap_page_protect which is wrong. Now PV_KENTER
mappings are left intact.
Thanks to chuq for spotting my mistake and reviewing this diff.
Thanks to everyone who tested it as well.
Fix PR/51288 reproducable panic on evbmips64-eb (erlite)
pmap_page_remove from the previous change neglected to terminate the pv
list correctly when it started with an initial unmanaged mapping and
subsequent managed mappings. Fix this.
Fix MIPS3_NO_PV_UNCACHED alias handling by looping through the pv_list
looking for bad aliases and removing the bad entries. That is, revert
to the code before the matt-mips64 merge.
Additionally, fix the pmap_update call to not use the (recently
removed/freed) pv for the pmap_t.
Fixes the following two PRs
PR/49903: Panic during installation on WorkPad Z50 (hpcmips) whilst uncompressing base.tgz
PR/51226: Install bug for hpcmips NetBSD V7 using FTP Full installation
|
| 1.40 | 13-Jul-2025 |
snj | fix typo in comment
|
| 1.39 | 13-Jul-2025 |
skrll | kern/59518: edgeroute 4 asserts every few months
Don't check for differences in the TLB entry modified status for
kernal mappings as they can be modified while the kernel pmap is
being updated.
|
| 1.38 | 26-Oct-2022 |
skrll | branches: 1.38.8;
MI PMAP hardware page table walker support.
This is based on code given to me by Matt Thomas a long time ago with
many updates and bugs fixes from me.
|
| 1.37 | 25-Sep-2022 |
skrll | Rename pmap_segtab_t *stp to stb for consistency with a future
pmap_pdetab_t *ptb. pmap_pdetab_t *ptp would be far too confusing.
NFC. Same code before and after.
|
| 1.36 | 02-Oct-2021 |
skrll | Pass the pmap in tlb_set_asid for the benefit of aarch64.
|
| 1.35 | 02-Oct-2021 |
skrll | Use KERNEL_PID instead of 0. NFC.
|
| 1.34 | 19-Mar-2021 |
skrll | Support pmap_growkernel and KASAN shadow mapping of the new KVA.
Neither mips nor ppc booke actually use pmap_growkernel (at present).
Thanks to rin@ for testing a similar patch on ppc booke.
|
| 1.33 | 20-Dec-2020 |
skrll | Support __HAVE_PMAP_PV_TRACK in sys/uvm/pmap based pmaps (aka common pmap)
|
| 1.32 | 20-Dec-2020 |
skrll | Remove bogus KASSERT - can't assert a spin mutex is !mutex_owned.
|
| 1.31 | 20-Dec-2020 |
skrll | Remove old part of comment
|
| 1.30 | 10-Sep-2020 |
skrll | branches: 1.30.2;
Typo in a comment
|
| 1.29 | 18-Aug-2020 |
simonb | Remove an extra word from a comment to make it more readable.
|
| 1.28 | 30-Jul-2020 |
skrll | Update a comment
|
| 1.27 | 11-Mar-2020 |
thorpej | With DEBUG defined, it's possible to execute a TLB-vs-segmap consistency
check from a (soft) interrupt handler. But if a platform does not otherwise
require the pmap_tlb_miss_lock, then where will be a brief window of
inconsistency that, while harmless, will still fire an assertion in the
consistency check.
Fix this with the following changes:
1- Refactor the pmap_tlb_miss_lock into MI code and rename it from
pmap_tlb_miss_lock_{enter,exit}() to pmap_tlb_miss_lock_{enter,exit}().
MD code can still define the "md" hooks as necessary, and if so, will
override the common implementation.
2- Provde a pmap_bootstrap_common() function to perform common pmap bootstrap
operations, namely initializing the pmap_tlb_miss_lock if it's needed.
If MD code overrides the implementation, it's responsible for initializing
its own lock.
3- Call pmap_bootstrap_common() from the mips, powerpc booke, and riscv
pmap_bootstrap() routines. (This required adding one for riscv.)
4- Switch powerpc booke to the common pmap_tlb_miss_lock.
5- Enable pmap_tlb_miss_lock if DEBUG is defined, even if it's not otherwise
required.
PR port-mips/55062 (Failed assertion in pmap_md_tlb_check_entry())
|
| 1.26 | 20-Oct-2019 |
skrll | Define and use VM_PAGEMD_PVLIST_EMPTY_P
|
| 1.25 | 15-Aug-2019 |
maxv | Unlink KMEM_GUARD leftovers.
|
| 1.24 | 14-Jul-2019 |
skrll | Use PV_ISKENTER_P. NFCI.
|
| 1.23 | 03-Sep-2018 |
riastradh | Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.
To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate. But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all. (Who knows, maybe in some cases integer
truncation is actually intended!)
|
| 1.22 | 06-Jun-2018 |
maya | branches: 1.22.2;
Remove duplicate ;
|
| 1.21 | 09-Jun-2017 |
skrll | branches: 1.21.4; 1.21.6;
Always use XKPHYS for pool pages on _LP64; otherwise use KSEG0
|
| 1.20 | 05-Jun-2017 |
skrll | Fix the PMAP_NO_PV_UNCACHED pmap_md_vca_add case where the pmap_update
call would cause problems for pmap_remove_all case where the deferred
activate should not be done...
Add a comment about what's going on.
|
| 1.19 | 18-May-2017 |
skrll | branches: 1.19.2;
Don't use index cache operations unnecessarily.
|
| 1.18 | 14-May-2017 |
skrll | Remove #if 0'ed old style cache handling in pmap_md_unmap_poolpage
|
| 1.17 | 14-May-2017 |
skrll | Handle the maximum number of colors across [di]caches
|
| 1.16 | 12-May-2017 |
skrll | Sprinkle some KASSERTs
|
| 1.15 | 12-May-2017 |
skrll | Code style and add a comment
|
| 1.14 | 12-May-2017 |
skrll | Don't access pg before the KASSERT it's not NULL
|
| 1.13 | 07-May-2017 |
skrll | KNF
|
| 1.12 | 23-Dec-2016 |
cherry | branches: 1.12.6;
"Make NetBSD great again!"
Introduce uvm_hotplug(9) to the kernel.
Many thanks, in no particular order to:
TNF, for funding the project.
Chuck Silvers - for multiple API reviews and feedback.
Nick Hudson - for testing on multiple architectures and bugfix patches.
Everyone who helped with boot testing.
KeK (http://www.kek.org.in) for hosting the primary developers.
|
| 1.11 | 05-Sep-2016 |
skrll | branches: 1.11.2;
Flush the dcache before syncing the icache as previous mappings (UBC)
might have used the same colo(u)r and the dcache won't have been flush up
to now.
|
| 1.10 | 04-Sep-2016 |
skrll | Another typo... that's what you get for not compile testing
|
| 1.9 | 04-Sep-2016 |
skrll | Typo in previous
|
| 1.8 | 04-Sep-2016 |
skrll | Safely remove non-PV_KENTER pages from pv_list
|
| 1.7 | 04-Sep-2016 |
skrll | Sign extend va for use with cache ops
|
| 1.6 | 04-Sep-2016 |
skrll | More debug
|
| 1.5 | 22-Aug-2016 |
skrll | KNF
|
| 1.4 | 22-Aug-2016 |
skrll | Can't KASSERT that a lock isn't held.
|
| 1.3 | 19-Aug-2016 |
skrll | Trailing whitespace
|
| 1.2 | 29-Jul-2016 |
skrll | Fix up va for pmap_md_map_ephemeral_page and so that cache ops get the
correct address
|
| 1.1 | 11-Jul-2016 |
matt | branches: 1.1.2;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.1.2.2 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.1.2.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.11.2.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.11.2.3 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.11.2.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.11.2.1 | 05-Sep-2016 |
skrll | file pmap_machdep.c was added on branch nick-nhusb on 2016-10-05 20:55:32 +0000
|
| 1.12.6.2 | 19-May-2017 |
pgoyette | Resolve conflicts from previous merge (all resulting from $NetBSD
keywork expansion)
|
| 1.12.6.1 | 11-May-2017 |
pgoyette | Sync with HEAD
|
| 1.19.2.2 | 10-Jun-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #22):
sys/arch/mips/mips/mips_machdep.c: revision 1.278
sys/arch/mips/mips/pmap_machdep.c: revision 1.21
Always use XKPHYS for pool pages on _LP64; otherwise use KSEG0
--
Maintain the split of physical memory into the defined freelists, but
only force pool pages to VM_FREELIST_FIRST512M for non _LP64
|
| 1.19.2.1 | 06-Jun-2017 |
martin | Pull up following revision(s) (requested by skrll in ticket #10):
sys/arch/mips/mips/pmap_machdep.c: revision 1.20
Fix the PMAP_NO_PV_UNCACHED pmap_md_vca_add case where the pmap_update
call would cause problems for pmap_remove_all case where the deferred
activate should not be done...
Add a comment about what's going on.
|
| 1.21.6.2 | 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.21.6.1 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.21.4.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.21.4.1 | 09-Jun-2017 |
jdolecek | file pmap_machdep.c was added on branch tls-maxphys on 2017-12-03 11:36:28 +0000
|
| 1.22.2.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.22.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.22.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.30.2.2 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.30.2.1 | 03-Jan-2021 |
thorpej | Sync w/ HEAD.
|
| 1.38.8.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.11 | 12-Jul-2016 |
matt | We use the common uvm pmap now.
|
| 1.10 | 11-Jun-2015 |
matt | Define (but not use) separate kernel and user pagetables.
Move to the new names.
|
| 1.9 | 11-Jun-2015 |
matt | Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_start to get the
VA space it needs.
pmap_segtab.c is almost identical to uvm/pmap/pmap_segtab.c now. It won't
be long until we switch to the uvm/pmap one.
|
| 1.8 | 11-May-2014 |
skrll | branches: 1.8.4;
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.7 | 05-May-2014 |
skrll | In the MULTIPROCESSOR case where another thread wins the race to allocate
a new segtab page call mips_pmap_unmap_poolpage on the page our thread
allocated and called mips_pmap_map_poolpage for.
|
| 1.6 | 04-May-2014 |
skrll | Make this compile/work with PARANOIADIAG
|
| 1.5 | 05-Jul-2012 |
matt | branches: 1.5.2; 1.5.4; 1.5.12;
Change lockless segtab management to use a mutex for protection. Some minor
changes to make this closer to common/pmap/tlb/pmap_segtab.c
|
| 1.4 | 26-Jan-2012 |
matt | branches: 1.4.2;
Let mips_pmap_{,un}map_poolpage do the translation work.
|
| 1.3 | 29-Apr-2011 |
matt | branches: 1.3.4; 1.3.8;
remove redundant opt_multiprocessor.h include
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 30-Dec-2009 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file pmap_segtab.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.2 | 31-May-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.19 | 08-Aug-2012 |
matt | Fix some LP64 bugs
|
| 1.1.2.18 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.1.2.17 | 09-Jul-2012 |
matt | Use a spinlock to protect the segtab queues. Use union pmap_segmap and
pmap_segmap_t to track -HEAD. Use KERNEL_PID for the same reason.
|
| 1.1.2.16 | 05-Jul-2012 |
matt | Fix typo (assigned wrong variable).
|
| 1.1.2.15 | 27-Feb-2012 |
matt | Add a page-table-page cache to keep reuse just released page table tables.
Actually remove the addresses in pmap_remove_all.
|
| 1.1.2.14 | 13-Feb-2012 |
matt | Add mm_md_direct_mapped_virt (inverse of mm_md_direct_mapped_phys). Add a
third argument, vsize_t *, which, if not NULL, returns the amount of virtual
space left in that direct mapped segment.
Get rid most of the individual direct_mapped assert and use the above
routines instead.
Improve kernel core dump code.
|
| 1.1.2.13 | 10-Feb-2012 |
matt | Don't double claim a kmem page.
|
| 1.1.2.12 | 09-Feb-2012 |
matt | Add mips_page_to_pggroup which return what pggroup a page belongs to.
Eradicate VM_FREELIST_MAX
When adding pages to the system, track what freelists get pages.
|
| 1.1.2.11 | 29-Nov-2011 |
matt | Take part of the KSEG2 space and use it to "almost" direct another 256MB
of memory so that N32 kernels can make use of ram outside of KSEG0. This
allows N32 kernels to be useful on systems with 4GB of RAM or more.
|
| 1.1.2.10 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.9 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for explicit MULTIPROCESSOR dependency
|
| 1.1.2.8 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.1.2.7 | 04-May-2010 |
matt | Cleanup segtab allocation. Add some counters to monitor memory usage.
|
| 1.1.2.6 | 25-Feb-2010 |
matt | Make sure we aren't looking up a direct-mapped address.
|
| 1.1.2.5 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.1.2.4 | 26-Jan-2010 |
matt | Revamp pmap. Add exec page caching logic from powerpc oea pmap. Shrink struct
vm_page by placing the first pv_entry in it. Remove pv_flags since nothing
really needed it. Add pmap counters. Rework virtual cache alias logic.
Allow pmap_copy_page and pmap_zero_page to deal with non-KSEG0 mappable pages.
|
| 1.1.2.3 | 20-Jan-2010 |
matt | Revamp things a bit. Move of the globals mips uses into either cpu_info,
mips_options, or mips_cache_info. Make MALT64 be able to boot MULTIPROCESSOR.
(some pmap MP work).
|
| 1.1.2.2 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.1.2.1 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.3.8.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.3.4.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.4.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.3.4.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.4.2.2 | 11-Jun-2014 |
msaitoh | Pull up following revision(s) (requested by skrll in ticket #1068):
sys/arch/mips/mips/pmap.c: revision 1.214
sys/arch/mips/include/pmap.h: revision 1.63
sys/arch/mips/mips/pmap_segtab.c: revision 1.8
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable/unusable on cobalt qube2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.4.2.1 | 05-Jul-2012 |
riz | branches: 1.4.2.1.4; 1.4.2.1.6;
Pull up following revision(s) (requested by matt in ticket #406):
sys/arch/mips/include/pmap.h: revision 1.62
sys/arch/mips/mips/pmap.c: revision 1.208
sys/arch/mips/mips/pmap_segtab.c: revision 1.5
Change lockless segtab management to use a mutex for protection. Some =
minor
changes to make this closer to common/pmap/tlb/pmap_segtab.c
=20
=20
|
| 1.4.2.1.6.1 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1068):
sys/arch/mips/include/pmap.h: revision 1.63
sys/arch/mips/mips/pmap.c: revision 1.214
sys/arch/mips/mips/pmap_segtab.c: revision 1.8
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.4.2.1.4.1 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1068):
sys/arch/mips/include/pmap.h: revision 1.63
sys/arch/mips/mips/pmap.c: revision 1.214
sys/arch/mips/mips/pmap_segtab.c: revision 1.8
Deal with incompatible cache aliases. Specifically,
- always flush an ephemeral page on unmap
- track unmanaged mappings (mappings entered via pmap_kenter_pa) for
aliases where required and handle appropriately (via pmap_enter_pv)
Hopefully this (finally) addresses the instability reported in the
following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.5.12.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.5.4.1 | 18-May-2014 |
rmind | sync with head
|
| 1.5.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.8.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.8.4.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1 | 23-Dec-2011 |
matt | branches: 1.1.2;
file pmap_syncicache.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.3 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.1.2.2 | 12-Jan-2012 |
matt | Add an optimization for UP system with non-virtually tagged caches (which are
most of them these days).
If a page needs to be have an icache_sync performed and the page has a direct
map alias (XKPHYS or KSEG0), then don't do an index op; instead do a range op
on the XKPHYS or KSEG0 address. This results in unneeded fewer cache line
invalidations.
|
| 1.1.2.1 | 23-Dec-2011 |
matt | Split syncicache functions into separate file: pmap_syncicache.
Support up to 1024 ASIDs.
Always use atomic ops for manipulating pm_shootdown_pending
Nuke PMAP_POOLPAGE_DEBUG
defparam MIPS_PAGE_SHIFT
Track colors of execpages.
|
| 1.12 | 12-Jul-2016 |
matt | We use the common uvm pmap now.
|
| 1.11 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.10 | 11-Jun-2015 |
matt | Fix a type from kcpuset transition.
Deal with kcpuset_ffs return value a little more cleanly.
|
| 1.9 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.8 | 27-Sep-2011 |
jym | branches: 1.8.12; 1.8.30;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
| 1.7 | 14-Apr-2011 |
matt | fix whitespace and comments
|
| 1.6 | 12-Apr-2011 |
matt | Get rid of an errant KASSERT
|
| 1.5 | 12-Apr-2011 |
matt | Dont bother taking out TLBINFO lock in pmap_tlb_asid_deactivate since the
atomic ops will DTRT with it. Remove spl calls too.
|
| 1.4 | 06-Apr-2011 |
matt | Fix a bug with pmap_remove_all and pmap_deactivate. Should prevent any
pmap_activate from allocating an ASID while doing pmap_remove_all XXX.
|
| 1.3 | 15-Mar-2011 |
matt | Use KDASSERT and kpreempt_disable/enable in pmap_tlb_asid_check
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 22-Jan-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file pmap_tlb.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.25 | 14-Feb-2014 |
matt | Change KASSERTMSG/KDASSERTMSG to use varadic arguments like HEAD.
panic -> vpanic, add panic wrapper to vpanic.
|
| 1.1.2.24 | 09-Jul-2012 |
matt | Use a spinlock to protect the segtab queues. Use union pmap_segmap and
pmap_segmap_t to track -HEAD. Use KERNEL_PID for the same reason.
|
| 1.1.2.23 | 16-Feb-2012 |
matt | Move the ksegx tlb init code into its own function.
Fix a problem with concurrent shootdowns by tracking what cpus want a
shootdown for a pmap, and if anoter cpu wants a shootdown, perform the
shootdown on ourselves.
|
| 1.1.2.22 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.1.2.21 | 23-Dec-2011 |
matt | Split syncicache functions into separate file: pmap_syncicache.
Support up to 1024 ASIDs.
Always use atomic ops for manipulating pm_shootdown_pending
Nuke PMAP_POOLPAGE_DEBUG
defparam MIPS_PAGE_SHIFT
Track colors of execpages.
|
| 1.1.2.20 | 06-Dec-2011 |
matt | Allocate the locks from the same page we allocate the cpu_info and
pmap_tlb_info structure. This assures they will be in KSEG0.
|
| 1.1.2.19 | 03-Dec-2011 |
matt | Rework things a bit for the XLR/XLS/XLP TLB. Before dealing with the TLB when
MP on the XL?, disable interrupts and take out a lock to prevent concurrent
updates to the TLB. In the TLB miss and invalid exception handlers, if the
lock is already owned by another CPU, simply return from the exception and
let it continue or restart as appropriate. This prevents concurrent TLB
exceptions in multiple threads from possibly updating the TLB multiple times
for a single address.
|
| 1.1.2.18 | 13-May-2011 |
matt | Fix a comment.
|
| 1.1.2.17 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.16 | 03-Feb-2011 |
cliff | fix use of KASSERTMSG
|
| 1.1.2.15 | 29-Dec-2010 |
matt | Add MIPS_TLB_PID mask and use it apporpriately.
|
| 1.1.2.14 | 24-Dec-2010 |
matt | Deal with MIPS_NUM_TLB_PIDS not being constant.
|
| 1.1.2.13 | 22-Dec-2010 |
matt | Add a pmap_asid_check which verifies the current ASID is in COP0 ENTRY_HI
|
| 1.1.2.12 | 10-Jun-2010 |
cliff | - fix typo in evcnt string
|
| 1.1.2.11 | 04-May-2010 |
matt | Make sure to deactivate ASIDs on pmap destruction even on UP kernels.
|
| 1.1.2.10 | 11-Mar-2010 |
matt | Add MP-aware icache support.
|
| 1.1.2.9 | 01-Mar-2010 |
matt | Fix KASSERT botch.
|
| 1.1.2.8 | 28-Feb-2010 |
matt | Remove unused variable.
|
| 1.1.2.7 | 27-Feb-2010 |
matt | Fix for non DIAGNOSTIC kernels
|
| 1.1.2.6 | 27-Feb-2010 |
snj | Fix some gimplish in comments.
|
| 1.1.2.5 | 27-Feb-2010 |
matt | Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
|
| 1.1.2.4 | 25-Feb-2010 |
matt | Make the UP and MP ASID allocation algorithm common. Significantly improve
the algorithm. Now when we exhaust the ASIDs, interrogate the TLB for active
ASIDS and release all the other for future allocations. This leaves the
TLB entries with ASIDs valid avoiding the need to re-incur TLB misses for
them.
|
| 1.1.2.3 | 24-Feb-2010 |
matt | When adding a CPU to a TLB, mark the kernel pmap as "active" and "onproc"
for that CPU.
|
| 1.1.2.2 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.1.2.1 | 22-Jan-2010 |
matt | Seperate the pmap TLB functions into their own file.
For 32 bit kernels, make sure that mips_virtual_end doesn't go past
VM_MAX_KERNEL_ADDRESS.
|
| 1.8.30.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.8.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.8.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.40 | 03-May-2025 |
riastradh | mips: Include opt_cputype.h before any of the flags it defines.
PR port-evbmips/59385: PGSHIFT is inconsistently defined on MIPS
|
| 1.39 | 29-Dec-2017 |
maya | branches: 1.39.40;
Simplify, don't use ifdefs to optimize out DIAGNOSTIC assertions.
Make the test for the n32/n64 case meaningful.
tested on pmax (o32).
|
| 1.38 | 16-Mar-2017 |
chs | allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.
|
| 1.37 | 04-Jan-2014 |
dsl | branches: 1.37.6; 1.37.10; 1.37.14;
Remove __HAVE_PROCESS_XFPREGS and add the extra parameter for the size
of the fp save area to all the process_read_fpregs() and
process_write_fpregs() functions.
None of the functions have been modified to use the new parameters.
The size is set for all the writes, but some of the arch-specific reads
just pass NULL.
The amd64 (and i386) need variable sized fp register save areas in order
to support AVX and other enhanced register areas.
These functions are rarely called - so the extra argument won't matter.
|
| 1.36 | 14-Jul-2011 |
matt | branches: 1.36.2; 1.36.12; 1.36.16;
Remove out-of-date KASSERT
|
| 1.35 | 02-May-2011 |
rmind | Extend PCU:
- Add pcu_ops_t::pcu_state_release() operation for PCU_RELEASE case.
- Add pcu_switchpoint() to perform release operation on context switch.
- Sprinkle const, misc. Also, sync MIPS with changes.
Per discussions with matt@.
|
| 1.34 | 29-Apr-2011 |
matt | Use sizeof(*pte) instead sizeof(type)
|
| 1.33 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.32 | 14-Jan-2011 |
rmind | branches: 1.32.2; 1.32.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.31 | 14-Dec-2009 |
matt | branches: 1.31.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.30 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.29 | 04-Mar-2007 |
christos | branches: 1.29.44; 1.29.62;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.28 | 26-Aug-2006 |
matt | branches: 1.28.8;
Use vaddr_t for virtual addresses. Don't cast pointers with int or
unsigned, use intptr_t or uintptr_t as appropriate.
|
| 1.27 | 11-Dec-2005 |
christos | branches: 1.27.4; 1.27.8;
merge ktrace-lwp.
|
| 1.26 | 01-Jun-2005 |
scw | branches: 1.26.2;
Declare the second arg of process_write_{fp,}regs() to be const.
This permits sh5 to continue to re-use those functions in cpu_setmcontext()
with the recent change to Makefile.kern.inc (revision 1.62).
|
| 1.25 | 01-Jan-2005 |
simonb | Use "NULL" instead of "(something-or-other *)0".
|
| 1.24 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.23 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.22 | 30-Jun-2003 |
simonb | branches: 1.22.2;
ANSIfy, KNF.
|
| 1.21 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.20 | 27-Dec-2000 |
castor | branches: 1.20.8;
Preserve the status register process_write_regs() to avoid confusion
about the current floating point context.
|
| 1.19 | 30-May-2000 |
nisimura | FPA ownership is now guarded by MDP_FPUSED flag and there is no necessity
to have #if ... around savefpregs() calls.
|
| 1.18 | 29-May-2000 |
nisimura | Nuke #include directives found unnecessary.
|
| 1.17 | 29-May-2000 |
nisimura | Make sure to load FPA contents next time an FP insn is executed when
process_write_fpregs() changes pcb_fpregs[].
|
| 1.16 | 29-May-2000 |
nisimura | Cleanup take two
- Nuke external function reference of savefpregs() which is already defined
in mips/cpu.h.
- Adjust the comment tells "let user processes change CP0 status register
freely might be dangerous."
|
| 1.15 | 29-May-2000 |
nisimura | Make claried MDP_FPUSED usage.
- MDP_FPUSED flag indicates the process has executed at least one
FP insn during its life time.
- pcb_fpregs storage is guaranteed zero initialzed. If the process is FPA
owner, savefpregs() must be called to synchronize it with FPA contents.
- No necessity to save FPA contents into pcb_fpregs prior to the whole
storage is overwritten by process_write_fpregs().
|
| 1.14 | 28-Mar-2000 |
simonb | branches: 1.14.2;
Move fpcurproc declaration to <mips/cpu.h>.
|
| 1.13 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.12 | 09-Jan-2000 |
shin | split 'options SOFTFLOAT' to
NOFP don't touch FPU registers in kernel
SOFTFLOAT emulate FPU instructions in kernel
|
| 1.11 | 18-Nov-1999 |
jun | on port-mips@netbsd.org:
Shuichiro URATA <ur@a-r.org> makes kernel softfloat emulation code.
http://www.a-r.org/~ur/softfloat1116.diff.gz
is Patch for
sys/arch/mips/conf/files.mips
sys/arch/mips/mips/fp.S
sys/arch/mips/mips/fpemu.c
sys/arch/mips/mips/genassym.cf
sys/arch/mips/mips/locore.S
sys/arch/mips/mips/mips_machdep.c
sys/arch/mips/mips/process_machdep.c
sys/arch/mips/mips/trap.c
sys/arch/mips/mips/vm_machdep.c
After apply this patch,pmax package binary works on hpcmips!
|
| 1.10 | 24-Apr-1999 |
simonb | branches: 1.10.2; 1.10.8;
Nuke register and remove trailling white space.
|
| 1.9 | 06-Jan-1999 |
nisimura | branches: 1.9.4;
- Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.8 | 19-Oct-1997 |
jonathan | Add PT_GETFPREGS, PT_SETFPREGS and process_{read,write}_fpregs.
|
| 1.7 | 19-Jul-1997 |
jonathan | * Re-apply changes from rev 1.6 of sys/arch/mips/include/reg.h accidentally
undone by rev 1.7:
>redo pmax/include/reg.h
>so that the definitions needed by locore.S are in a separate file,
>pmax/include/regnum.h.
* Add explicit `#include <mips/regnum.h>' where symbolic offsets
into a mips trapframe or struct reg are used..
|
| 1.6 | 25-May-1997 |
jonathan | Rename cpu_singlstep() to mips_singlestep() and add prototype.
(it's not part of the standard interface to MD code.)
XXX Consider moving into process_machdep.c when the mips3 changes are merged.
|
| 1.5 | 20-Mar-1996 |
jonathan | Merge in changes from the Pica port.
Still needs more thought for single-stepping and process_write_regs().
|
| 1.4 | 20-Dec-1995 |
jonathan | Add support for ptrace PT_GETREGS and PT_SETREGS for NetBSD/pmax:
* define PT_GETREGS and PT_SETREGS in pmax/include/ptrace.h
* Flesh out the stubs in pmax/pmax/process_machdep.c to handle
those requests.
* Now that "struct reg" is actually used, remove the bogus
#ifdef LANGUAGE_C around its definition, and redo pmax/include/reg.h
so that the definitions needed by locore.S are in a separate file,
pmax/include/regnum.h.
* update locore.S to match.
|
| 1.3 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.2 | 15-Aug-1994 |
cgd | changes for the new sys_process.c, and some cleanup
|
| 1.1 | 27-May-1994 |
glass | branches: 1.1.2;
bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.1.2.1 | 15-Aug-1994 |
mycroft | update from trunk
|
| 1.9.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.10.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.10.2.2 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.10.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.14.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.20.8.3 | 12-Jul-2002 |
nathanw | No longer need to pull in lwp.h; proc.h pulls it in for us.
|
| 1.20.8.2 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.20.8.1 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.22.2.5 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.22.2.4 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.22.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.22.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.22.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.26.2.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.26.2.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.27.8.1 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.27.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.28.8.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.29.62.6 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.29.62.5 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.29.62.4 | 22-Feb-2010 |
matt | Explicitly include <mips/locore.h> since <mips/cpu.h> no longer includes it.
Use curcpu()->ci_data.cpu_nsyscall instead of uvmexp.syscalls.
|
| 1.29.62.3 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.29.62.2 | 23-Aug-2009 |
matt | Change lazy fp load/save is done. fpcurlwp is never NULL.
If no current lwp has the FP, then fpcurlwp is set to lwp0.
this allows many check for NULL and avoids a few null-derefs.
Since savefpregs clear COP1, loadfpregs can be called to reload
fpregs. If it notices that situation, it just sets COP1 and returns
Save does not reset fpcurlwp, just clears COP1. load does set fpcurlwp.
If MIPS3_SR_FR is set, all 32 64-bit FP registers are saved/restored via Xdc1.
If MIPS3_SR_FR is clear, only 32 32-bit FP register are saved/restore via Xwc1.
This preserves the existing ABI.
|
| 1.29.62.1 | 21-Aug-2009 |
matt | Stop casting l_md.md_regs. Add a CTASSERT that struct reg is the same size
struct frame member f_regs
|
| 1.29.44.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.31.4.2 | 31-May-2011 |
rmind | sync with head
|
| 1.31.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.32.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.32.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.36.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.36.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.36.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.36.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.37.14.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.37.10.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.37.6.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.39.40.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.5 | 05-Apr-2014 |
christos | adjust to new signature; return consistent stuff. 0 is ok -1 is error
|
| 1.4 | 11-Dec-2005 |
christos | branches: 1.4.112; 1.4.122; 1.4.128;
merge ktrace-lwp.
|
| 1.3 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.2 | 17-Jan-2003 |
thorpej | branches: 1.2.2;
Merge the nathanw_sa branch.
|
| 1.1 | 13-Mar-2002 |
simonb | branches: 1.1.2; 1.1.6;
All the mips ports had an identical procfs_machdep.c, so use a common
file under arch/mips/mips.
|
| 1.1.6.2 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.6.1 | 13-Mar-2002 |
nathanw | file procfs_machdep.c was added on branch nathanw_sa on 2002-04-01 07:41:12 +0000
|
| 1.1.2.2 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.2.1 | 13-Mar-2002 |
jdolecek | file procfs_machdep.c was added on branch kqueue on 2002-03-16 15:58:44 +0000
|
| 1.2.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.4.128.1 | 18-May-2014 |
rmind | sync with head
|
| 1.4.122.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.112.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.26 | 25-Apr-2025 |
riastradh | mips: Align stack pointer on entry to signal handler.
Based on a patch by rin@. The variant approach I took puts the stack
frame allocation and alignment logic in one place (getframe, used by
sendsig_siginfo for native (n64, on mips), netbsd32_sendsig_siginfo
for compat32 (n32/o32, on mips), and sendsig_sigcontext (compat 1.6))
and reduces the chance of provoking compiler exploitation of
undefined behaviour by doing arithmetic in uintptr_t rather than in
pointers to large aligned structs. This also ensures the resulting
pointer is aligned for the object (struct siginfo_sigframe, struct
siginfo_sigframe32, struct sigcontext), not just for the ABI stack
alignment.
PR kern/59327: user stack pointer is not aligned properly
|
| 1.25 | 14-Apr-2024 |
skrll | branches: 1.25.2;
Trailing whitespace.
|
| 1.24 | 27-Nov-2018 |
maxv | Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.23 | 10-Jul-2011 |
matt | branches: 1.23.28; 1.23.32; 1.23.40; 1.23.46; 1.23.52; 1.23.54;
More <machine/ include cleanup
|
| 1.22 | 29-Apr-2011 |
matt | constification
|
| 1.21 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.20 | 01-Jan-2011 |
nisimura | branches: 1.20.2; 1.20.4;
- leave lwp0 trapframe zerod since it's never used.
- 64bit op SR[KX] bit is for !o32 cases.
- build struct sigframe_siginfo locally and then operate single copyout()
to user stack as other ports do.
|
| 1.19 | 14-Dec-2009 |
matt | branches: 1.19.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.18 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.17 | 19-Nov-2008 |
ad | Make the emulations, exec formats, coredump, NFS, and the NFS server
into modules. By and large this commit:
- shuffles header files and ifdefs
- splits code out where necessary to be modular
- adds module glue for each of the components
- adds/replaces hooks for things that can be installed at runtime
|
| 1.16 | 28-Apr-2008 |
martin | branches: 1.16.2; 1.16.6; 1.16.8; 1.16.14;
Remove clause 3 and 4 from TNF licenses
|
| 1.15 | 24-Apr-2008 |
ad | branches: 1.15.2;
Merge proc::p_mutex and proc::p_smutex into a single adaptive mutex, since
we no longer need to guard against access from hardware interrupt handlers.
Additionally, if cloning a process with CLONE_SIGHAND, arrange to have the
child process share the parent's lock so that signal state may be kept in
sync. Partially addresses PR kern/37437.
|
| 1.14 | 17-Oct-2007 |
garbled | branches: 1.14.16; 1.14.18;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.13 | 08-Jul-2007 |
pooka | branches: 1.13.10;
Initialize the link context in a signal frame to the receiving lwp's
link context instead of NULL. Otherwise, if we got a signal while the
lwp had a link context set, the link context would be set to NULL upon
return from signal delivery.
christos@tech-kern: "I think you are right."
|
| 1.12 | 09-Feb-2007 |
ad | branches: 1.12.6; 1.12.8; 1.12.14;
Merge newlock2 to head.
|
| 1.11 | 11-Dec-2005 |
christos | branches: 1.11.20;
merge ktrace-lwp.
|
| 1.10 | 02-Jul-2004 |
simonb | branches: 1.10.12;
Fix a precedence problem setting uc_flags.
Part of fix for PR port-mips/25942. From Christos Zoulas.
|
| 1.9 | 26-Nov-2003 |
he | branches: 1.9.2;
Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.8 | 02-Nov-2003 |
simonb | Kill trailing blank lines.
|
| 1.7 | 02-Nov-2003 |
christos | Use siginfo_t not ksiginfo_t in the frame. Doh!
|
| 1.6 | 29-Oct-2003 |
christos | first pass siginfo glue for mips
|
| 1.5 | 26-Sep-2003 |
simonb | Fix "constify sendsig/trapsignal" fallout for non-siginfo'd archs. Test
compiled on most architectures.
|
| 1.4 | 17-Jan-2003 |
thorpej | branches: 1.4.2;
Merge the nathanw_sa branch.
|
| 1.3 | 10-Nov-2002 |
simonb | branches: 1.3.2;
Remove some copyright notices that don't apply to this code.
|
| 1.2 | 09-Nov-2002 |
thorpej | Fix signed/unsigned comparison warnings.
|
| 1.1 | 09-Nov-2002 |
nisimura | - Make monolistic files into smaller manageable pieces, resulting
three new files;
sig_machdep.c (from mips_machdep.c)
copy.S and sigcode.S (from locore.S)
- Nuke the local use of struct sigframe, which is now identical to
struct sigcontext, from sendsig() as the consequence of new signal
trampoline.
|
| 1.3.2.4 | 03-Dec-2002 |
gmcgarry | LWPify for SOFTFLOAT
|
| 1.3.2.3 | 20-Nov-2002 |
wdk | Sync with HEAD destroyed struct proc -> struct lwp changes.
|
| 1.3.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.3.2.1 | 10-Nov-2002 |
nathanw | file sig_machdep.c was added on branch nathanw_sa on 2002-11-11 22:00:51 +0000
|
| 1.4.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.4.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.9.2.1 | 04-Jul-2004 |
he | Pull up revision 1.10 (requested by simonb in ticket #588):
Changes fixing PR#25942:
o Fix a precedence problem setting uc_flags
|
| 1.10.12.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.10.12.1 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.11.20.3 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.11.20.2 | 11-Jan-2007 |
ad | Checkpoint work in progress.
|
| 1.11.20.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.12.14.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.12.8.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.12.6.1 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.13.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.14.18.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.14.16.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.14.16.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.15.2.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.15.2.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.15.2.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.16.14.5 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.16.14.4 | 22-Feb-2010 |
matt | Explicitly include <mips/locore.h> since <mips/cpu.h> no longer includes it.
Use curcpu()->ci_data.cpu_nsyscall instead of uvmexp.syscalls.
|
| 1.16.14.3 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.16.14.2 | 21-Aug-2009 |
matt | Stop casting l_md.md_regs. Add a CTASSERT that struct reg is the same size
struct frame member f_regs
|
| 1.16.14.1 | 19-Aug-2009 |
matt | Don't cast pointers to __greg_t because that causes warnings on N32/N64.
Use intptr_t instead (intptr_t is used to get sign extension which is
important on mips).
|
| 1.16.8.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.16.6.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.16.2.3 | 14-May-2008 |
wrstuden | Per discussion with ad at n dot o, revert signal mask handling
changes.
The l_sigstk changes are most likely totally un-needed as SA will
never use a signal stack - we send an upcall (or will as other
diffs are brought in).
The l_sigmask changes were too controvertial. In all honesty, I
think it's probably best to revert them. The main reason they were
there is the fact that in an SA process, we don't mask signals per
kernel thread, we mask them per user thread. In the kernel, we want
them all to get turned into upcalls. Thus the normal state of
l_sigmask in an SA process is for it to always be empty.
While we are in the process of delivering a signal, we want to
temporarily mask a signal (so we don't recursively exhaust our
upcall stacks). However signal delivery is rare (important, but
rare), and delivering back-to-back signals is even rarer. So rather
than cause every user of a signal mask to be prepared for this very
rare case, we will just add a second check later in the signal
delivery code. Said change is not in this diff.
This also un-compensates all of our compatability code for dealing
with SA. SA is a NetBSD-specific thing, so there's no need for
Irix, Linux, Solaris, SVR4 and so on to cope with it.
As previously, everything other than kern_sa.c compiles in i386
GENERIC as of this checkin. I will switch to ALL soon for compile
testing.
|
| 1.16.2.2 | 14-May-2008 |
wrstuden | Per discussion with ad, remove most of the #include <sys/sa.h> lines
as they were including sa.h just for the type(s) needed for syscallargs.h.
Instead, create a new file, sys/satypes.h, which contains just the
types needed for syscallargs.h. Yes, there's only one now, but that
may change and it's probably more likely to change if it'd be difficult
to handle. :-)
Per discussion with matt at n dot o, add an include of satypes.h to
sigtypes.h. Upcall handlers are kinda signal handlers, and signalling
is the header file that's already included for syscallargs.h that
closest matches SA.
This shaves about 3000 lines off of the diff of the branch relative
to the base. That also represents about 18% of the total before this
checkin.
I think this reduction is very good thing.
|
| 1.16.2.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.19.4.2 | 31-May-2011 |
rmind | sync with head
|
| 1.19.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.20.4.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.20.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.23.54.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.23.52.1 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.23.46.1 | 27-Jan-2019 |
martin | Pull up following revision(s) (requested by maxv in ticket #1173):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/riscv/riscv/sig_machdep.c: revision 1.2
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23
Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.23.40.1 | 30-Jan-2019 |
martin | Pull up following revision(s) (requested by maxv in ticket #1677):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23
Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.23.32.1 | 30-Jan-2019 |
martin | Pull up following revision(s) (requested by maxv in ticket #1677):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23
Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.23.28.1 | 30-Jan-2019 |
martin | Pull up following revision(s) (requested by maxv in ticket #1677):
sys/arch/hppa/hppa/sig_machdep.c: revision 1.26
sys/arch/arm/arm/sig_machdep.c: revision 1.51
sys/arch/i386/i386/machdep.c: revision 1.813
sys/arch/alpha/alpha/machdep.c: revision 1.352
sys/arch/m68k/m68k/sig_machdep.c: revision 1.50
sys/arch/usermode/target/i386/cpu_i386.c: revision 1.8
sys/arch/sparc64/sparc64/machdep.c: revision 1.289
sys/arch/sparc64/sparc64/netbsd32_machdep.c: revision 1.111
sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.46
sys/arch/amd64/amd64/netbsd32_machdep.c: revision 1.117
sys/arch/sh3/sh3/sh3_machdep.c: revision 1.106
sys/arch/mips/mips/netbsd32_machdep.c: revision 1.16
sys/arch/mips/mips/sig_machdep.c: revision 1.24
sys/arch/usermode/target/x86_64/cpu_x86_64.c: revision 1.7
sys/arch/vax/vax/sig_machdep.c: revision 1.23
Fix widespread leak in the sendsig_siginfo() functions. sigframe_siginfo
has padding, so zero it out properly. While here I'm also zeroing out some
other things in several ports, for safety. Same problem in netbsd32, so
fix that too.
I can't compile-test on each architecture, but there should be no
breakage (tm).
Overall this fixes at least 14 info leaks. Prompted by the discovery by
KLEAK of a leak in amd64's sendsig_siginfo.
|
| 1.25.2.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.5 | 27-Jul-2016 |
skrll | Sprinle RCSID
|
| 1.4 | 26-Apr-2011 |
joerg | branches: 1.4.14; 1.4.32; 1.4.36;
Remove IRIX emulation
|
| 1.3 | 11-Dec-2005 |
christos | branches: 1.3.100; 1.3.106;
merge ktrace-lwp.
|
| 1.2 | 29-Oct-2003 |
christos | first pass siginfo glue for mips
|
| 1.1 | 09-Nov-2002 |
nisimura | branches: 1.1.2; 1.1.8;
- Make monolistic files into smaller manageable pieces, resulting
three new files;
sig_machdep.c (from mips_machdep.c)
copy.S and sigcode.S (from locore.S)
- Nuke the local use of struct sigframe, which is now identical to
struct sigcontext, from sendsig() as the consequence of new signal
trampoline.
|
| 1.1.8.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.1.8.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.1.8.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.1.2.4 | 23-Nov-2002 |
wdk | Remove upcall trampoline code.
|
| 1.1.2.3 | 20-Nov-2002 |
wdk | With creation of sigcode.S teh upcall code was lost with the update from
HEAD. Restore upcall trampoline code after the signal trampoline code.
|
| 1.1.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.2.1 | 09-Nov-2002 |
nathanw | file sigcode.S was added on branch nathanw_sa on 2002-11-11 22:00:52 +0000
|
| 1.3.106.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.100.1 | 31-May-2011 |
rmind | sync with head
|
| 1.4.36.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.4.32.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.4.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.9 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.8 | 07-Aug-2009 |
matt | branches: 1.8.4; 1.8.6; 1.8.8;
Fix references to mips_ipl_si_to_sr which were off by 1.
|
| 1.7 | 28-Apr-2008 |
martin | branches: 1.7.18;
Remove clause 3 and 4 from TNF licenses
|
| 1.6 | 03-Dec-2007 |
ad | branches: 1.6.14; 1.6.16; 1.6.18;
Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
|
| 1.5 | 21-Dec-2006 |
yamt | branches: 1.5.6; 1.5.22; 1.5.24; 1.5.30;
merge yamt-splraiseipl branch.
- finish implementing splraiseipl (and makeiplcookie).
http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
- complete workqueue(9) and fix its ipl problem, which is reported
to cause audio skipping.
- fix netbt (at least compilation problems) for some ports.
- fix PR/33218.
|
| 1.4 | 11-Dec-2005 |
christos | branches: 1.4.20; 1.4.22;
merge ktrace-lwp.
|
| 1.3 | 15-Jul-2003 |
lukem | branches: 1.3.16;
__KERNEL_RCSID()
|
| 1.2 | 25-Jun-2003 |
simonb | branches: 1.2.2;
Need to pass the address of the lock to simple_unlock().
|
| 1.1 | 25-May-2003 |
tsutsui | Prepare common routines for MIPS generic software interrupt.
|
| 1.2.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.2.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.3.16.2 | 07-Dec-2007 |
yamt | sync with head
|
| 1.3.16.1 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.4.22.1 | 22-Sep-2006 |
yamt | fix softintr for following ports. (hopefully)
hpcmips
evbmips
algor
arc
ews4800mips
newsmips
|
| 1.4.20.1 | 12-Jan-2007 |
ad | Sync with head.
|
| 1.5.30.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.5.24.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.5.22.1 | 09-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.5.6.1 | 15-Jul-2007 |
ad | Get pmax working.
|
| 1.6.18.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6.18.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.6.16.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.6.14.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.7.18.1 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.8.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.8.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.8.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.20 | 22-May-2023 |
skrll | Fix a comment
|
| 1.19 | 09-Aug-2020 |
skrll | ONe '#' is enough for a comment
|
| 1.18 | 01-Aug-2020 |
skrll | Trailing whitespace
|
| 1.17 | 12-Apr-2019 |
skrll | Typo in comment
|
| 1.16 | 18-Nov-2016 |
skrll | branches: 1.16.16;
Sprinkle MFC0_HAZARD for previous and PARANOIA
|
| 1.15 | 18-Nov-2016 |
macallan | don't blindly zero STATUS in order to disable interrupts, instead take care
to preserve bits like KX in case we catch an interrupt between mtc0 and the
write actually taking effect
now n32 kernels on my O2 are (mostly) stable again
ok skrll@
|
| 1.14 | 11-Nov-2016 |
maya | switch post-mfc0 call "hazard barrier" from NOP_L to MFC0_HAZARD.
this means it will be applied if MIPS3 too, and now with the prior
commit, it will be a superscalar nop, not just a plain nop.
|
| 1.13 | 11-Nov-2016 |
maya | remove redundant NOP_L. we do not use the register immediately after
load, so it's not needed.
|
| 1.12 | 13-Aug-2016 |
skrll | Move the NOP_L macro into asm.h
|
| 1.11 | 24-Jul-2016 |
skrll | Two fixes:
1) invesion of enable bits in splx (ipl_sr_map is disable mask)
2) Don't overwrite the cause register in spl0 - there might be pending
softints.
The second helps with recent boot issues after several new workqueues
are created. lwp_startup would call spl0 and lose the pending softints
status.
|
| 1.10 | 27-Jun-2015 |
matt | branches: 1.10.2;
Turn KX (no need for UX) when !O32 ABI and MULTIPROCESSOR
|
| 1.9 | 11-Jun-2015 |
matt | Don't include <machine/param.h> in .S files, get the needed values from assym.h
Define NBPG as UL to avoid integer over with NBXSEG on LP64 systems.
(.S files don't like numbers with UL appended to them).
|
| 1.8 | 06-Jun-2015 |
matt | If mipsNN and kernel has DDB, trap on bogus IPL values passed to splraise.
|
| 1.7 | 05-Jun-2015 |
matt | Only need KX/SX if _LP64 && MULTIPROCESSOR since cpu_info's are always in KSEG0
|
| 1.6 | 05-Jun-2015 |
matt | Make sure KX/UX stay on in 64-bit kernels so deferencing the lwp to get
the cpu_info doesn't cause a fault.
|
| 1.5 | 06-Apr-2011 |
matt | branches: 1.5.14; 1.5.32;
Use the new COP0* stuff in cpuregs.h
|
| 1.4 | 08-Mar-2011 |
tsutsui | Sprinkle NOPs to avoid load delay hazard on R3000.
|
| 1.3 | 25-Feb-2011 |
tsutsui | Uncomment "clear SOFT_INT bits" lines in _splsw_spl0().
This makes interrupts on cobalt (and probably other Rm5200 machines) work,
and no bad side effect seen on R4400 ews4800mips.
Cobalt GENERIC kernel on RaQ still panics right after mountroot() though:
---
:
atabus1 at viaide0 channel 1
VIA Technologies VT83C572 USB Controller (USB serial bus, revision 0x02) at pci0 dev 9 function 2 not configured
wd0 at atabus0 drive 0
wd0: <QUANTUM FIREBALLlct15 15>
wd0: 14324 MB, 29104 cyl, 16 head, 63 sec, 512 bytes/sect x 29336832 sectors
boot device: wd0
root on wd0a dumps on wd0b
root file system type: ffs
pid 1(init): ABI set to O32 (e_flags=0x1007)
pid 4(sh): trap: cpu0, address error (load or I-fetch) in kernel mode
status=0x8003, cause=0x10, epc=0x801430a0, vaddr=0x8001
tf=0xc6471a88 ksp=0xc6471b28 ra=0x801f0c90 ppl=0x801f0c24
kernel: address error (load or I-fetch) trap
Stopped in pid 4.1 (sh) at netbsd:mutex_abort: lw v1,0(a0)
db> tr
0xc6471b28: mutex_abort+0 (8001,80380530,803cbb10,803ff840) ra 801f0c90 sz 0
0xc6471b28: mips_pmap_map_poolpage+90 (8001,80380530,803cbb10,803ff840) ra 80276788 sz 40
0xc6471b50: pool_grow+4c (8001,80380530,803cbb10,803ff840) ra 80276b64 sz 48
0xc6471b80: pool_catchup+34 (8001,80380530,803cbb10,803ff840) ra 80276418 sz 24
0xc6471b98: pool_get+50c (8001,80380530,803cbb10,803ff840) ra 801f11b8 sz 64
0xc6471bd8: pmap_enter_pv+e8 (8001,80380530,803cbb10,803ff840) ra 801f3054 sz 48
0xc6471c08: pmap_enter+138 (8001,80380530,803cbb10,803ff840) ra 802fd528 sz 64
0xc6471c48: uvm_fault_lower+24c (8001,80380530,803cbb10,803ff840) ra 802fec50 sz 96
0xc6471ca8: uvm_fault_internal+72c (83ed5b40,80380530,1,0) ra 802b5b08 sz 272
0xc6471db8: trap+8d0 (10,8,1,408fb8) ra 8018f22c sz 400
0xc6471f48: mips3_user_gen_exception+cc (10,8,1,408fb8) ra 0 sz 0
User-level: pid 4.1
db>
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 06-Feb-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file spl.S was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.11 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.10 | 29-Dec-2010 |
matt | Add a PARANOIA test to splx to verify the SPL is within range.
|
| 1.1.2.9 | 24-Dec-2010 |
matt | MIPS1 needs load delay nops. Fix a problem in the RAS mips_spin_enter
where we weren't actually decrementing ci_mtx_count.
|
| 1.1.2.8 | 22-Dec-2010 |
matt | If we are MULTIPROCESSOR (which means preemption is enabled), we need to
reload curcpu() after disabling interrupts since we have been preempted
to a different CPU before interrupt got disabled.
|
| 1.1.2.7 | 09-Jun-2010 |
matt | Don't clear SOFT_INT bits in spl0.
|
| 1.1.2.6 | 16-May-2010 |
matt | Add IPL_DDB. This is needed for watchdog on sbmips and for IPIs used by DDB.
It's above IPL_SCHED but below IPL_HIGH.
|
| 1.1.2.5 | 20-Apr-2010 |
matt | fix typo in comment
|
| 1.1.2.4 | 21-Mar-2010 |
cliff | - in _splsw_splintr, add 'nop' in delay slot to avoid incorrect return
of IPL_VM when nothing is pending
|
| 1.1.2.3 | 23-Feb-2010 |
matt | Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that
in the interrupt init routine. There's a default ipl_sr_map will operate
correctly, but isn't performant.
|
| 1.1.2.2 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.1.2.1 | 06-Feb-2010 |
matt | Split spl functions into their own sources.
Make sure fast softints clear l_ctxswtch in the softint thread, not their own.
|
| 1.5.32.4 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.5.32.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.5.32.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.5.32.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.5.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.2.2 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.10.2.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.16.16.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.3 | 20-Feb-2011 |
rmind | Sprinkle some RCS IDs.
|
| 1.2 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.1 | 28-Feb-2010 |
matt | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
file spl_stubs.c was initially added on branch matt-nb5-mips64.
|
| 1.1.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.3 | 22-Dec-2010 |
matt | Rework how fixups are processed. Inside of generating a table, we just
scan kernel text for jumps to locations between (__stub_start, __stub_end]
and if found, we actually decode the instructions in the stub to find out
where the stub would eventually jump to and then patch the original jump
to jump directly to it bypassing the stub. This is slightly slower than
the previous method but it's a simplier and new stubs get automagically
handled.
|
| 1.1.2.2 | 01-Mar-2010 |
matt | Rework fixups support a bit (add a convience macro, require fixups to be
sorted).
|
| 1.1.2.1 | 28-Feb-2010 |
matt | We no longer inline the spl indirect calls through mips_splsw. Instead we
have stubs that do the indirection and then fixup the calls to the stubs to
be calls to the actual routines.
|
| 1.17 | 19-Dec-2018 |
maxv | Remove compat_svr4 and compat_svr4_32, as discussed on tech-kern@ recently,
but also as discussed several times in the past.
|
| 1.16 | 30-Jul-2017 |
maxv | branches: 1.16.2; 1.16.4;
Remove references to COMPAT_IRIX - does not exist anymore.
I believe svr4_machdep.h should be removed when the option is not
implemented on the target architecture; and we should also remove the
associated md.* entries.
|
| 1.15 | 10-Jul-2011 |
matt | branches: 1.15.12; 1.15.30;
More <machine/ include cleanup
|
| 1.14 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.13 | 14-Mar-2009 |
dsl | ANSIfy another 1261 function definitions.
The only ones left in sys are beyond by sed script!
(or in sys/dist or sys/external)
Mostly they have function pointer parameters.
|
| 1.12 | 19-Nov-2008 |
ad | branches: 1.12.4;
Make the emulations, exec formats, coredump, NFS, and the NFS server
into modules. By and large this commit:
- shuffles header files and ifdefs
- splits code out where necessary to be modular
- adds module glue for each of the components
- adds/replaces hooks for things that can be installed at runtime
|
| 1.11 | 28-Apr-2008 |
martin | branches: 1.11.2; 1.11.6; 1.11.8; 1.11.14;
Remove clause 3 and 4 from TNF licenses
|
| 1.10 | 04-Mar-2007 |
christos | branches: 1.10.40; 1.10.42; 1.10.44;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.9 | 09-Feb-2007 |
ad | branches: 1.9.2;
Merge newlock2 to head.
|
| 1.8 | 11-Dec-2005 |
christos | branches: 1.8.20;
merge ktrace-lwp.
|
| 1.7 | 02-Nov-2003 |
simonb | branches: 1.7.16;
Kill trailing blank lines.
|
| 1.6 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.5 | 22-Jan-2003 |
rafal | branches: 1.5.2;
LWP'ify the svr4_mcontext stuff.
|
| 1.4 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.3 | 06-Apr-2002 |
manu | iAdded warning printtf just in case something calls the stubs functions here
|
| 1.2 | 05-Mar-2002 |
simonb | KNF whitespace.
|
| 1.1 | 28-Nov-2001 |
manu | branches: 1.1.2; 1.1.4;
Added support for COMPAT_IRIX
|
| 1.1.4.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.4.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.2 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.1.4.1 | 28-Nov-2001 |
thorpej | file svr4_machdep.c was added on branch kqueue on 2002-01-10 19:46:13 +0000
|
| 1.1.2.5 | 29-May-2002 |
nathanw | #include <sys/sa.h> before <sys/syscallargs.h>, to provide sa_upcall_t
now that <sys/param.h> doesn't include <sys/sa.h>.
(Behold the Power of Ed)
|
| 1.1.2.4 | 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.3 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.2.2 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 28-Nov-2001 |
nathanw | file svr4_machdep.c was added on branch nathanw_sa on 2002-01-08 00:26:25 +0000
|
| 1.5.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.5.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.5.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.7.16.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.7.16.1 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.8.20.1 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.9.2.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.10.44.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.10.44.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.10.44.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.10.42.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.10.40.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.10.40.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.11.14.1 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.11.8.2 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.11.8.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.11.6.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.11.2.2 | 14-May-2008 |
wrstuden | Per discussion with ad, remove most of the #include <sys/sa.h> lines
as they were including sa.h just for the type(s) needed for syscallargs.h.
Instead, create a new file, sys/satypes.h, which contains just the
types needed for syscallargs.h. Yes, there's only one now, but that
may change and it's probably more likely to change if it'd be difficult
to handle. :-)
Per discussion with matt at n dot o, add an include of satypes.h to
sigtypes.h. Upcall handlers are kinda signal handlers, and signalling
is the header file that's already included for syscallargs.h that
closest matches SA.
This shaves about 3000 lines off of the diff of the branch relative
to the base. That also represents about 18% of the total before this
checkin.
I think this reduction is very good thing.
|
| 1.11.2.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.12.4.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.15.30.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.15.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.16.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.16.2.1 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.35 | 08-Dec-2021 |
andvar | fix various typos in comments and log messages.
|
| 1.34 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.33 | 20-Dec-2007 |
dsl | branches: 1.33.12; 1.33.28; 1.33.38;
Convert all the system call entry points from:
int foo(struct lwp *l, void *v, register_t *retval)
to:
int foo(struct lwp *l, const struct foo_args *uap, register_t *retval)
Fixup compat code to not write into 'uap' and (in some cases) to actually
pass a correctly formatted 'uap' structure with the right name to the
next routine.
A few 'compat' routines that just call standard ones have been deleted.
All the 'compat' code compiles (along with the kernels required to test
build it).
98% done by automated scripts.
|
| 1.32 | 04-Mar-2007 |
christos | branches: 1.32.20; 1.32.28; 1.32.32;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.31 | 09-Feb-2007 |
ad | branches: 1.31.2;
Merge newlock2 to head.
|
| 1.30 | 11-Dec-2005 |
christos | branches: 1.30.20;
merge ktrace-lwp.
|
| 1.29 | 01-Jun-2005 |
drochner | branches: 1.29.2;
quell shadow variable warnings
|
| 1.28 | 25-Feb-2005 |
simonb | KNF: put "if (...)" and following statement on separate lines.
|
| 1.27 | 06-Nov-2004 |
christos | branches: 1.27.4; 1.27.6;
Don't use "int" to represent lengths; this is what size_t is for. This
does not change the ABI since we don't have 64 bit mips yet.
|
| 1.26 | 21-Oct-2004 |
simonb | Flesh out some comments in the incomplete "smart" version of
mips_user_cacheflush().
|
| 1.25 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.24 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.23 | 17-Jan-2003 |
thorpej | branches: 1.23.2;
Merge the nathanw_sa branch.
|
| 1.22 | 14-Nov-2001 |
thorpej | branches: 1.22.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.21 | 07-Jan-2001 |
simonb | branches: 1.21.4; 1.21.6;
Move prototypes for mips_user_cachectl() and mips_user_cacheflush()
to <mips/cachectl.h>.
|
| 1.20 | 25-Dec-2000 |
nisimura | - fix typos in mips_user_cacheflush() and mips_user_cachectl().
- relocate those function declarations from include/pmap.h.
|
| 1.19 | 13-Dec-2000 |
jdolecek | g/c obsolete vtrace(2) stuff
|
| 1.18 | 29-Jun-2000 |
mrg | remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.17 | 14-Mar-2000 |
soren | KNF comment.
|
| 1.16 | 24-Apr-1999 |
simonb | branches: 1.16.2;
Nuke register and remove trailling white space.
|
| 1.15 | 19-Jan-1999 |
thorpej | branches: 1.15.4;
No need for <sys/mtio.h>
|
| 1.14 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.13 | 25-Feb-1998 |
perry | branches: 1.13.4;
note second parm of sysarch() is now void *, + trivial KNF, etc.
|
| 1.12 | 09-Jun-1997 |
jonathan | Add sys_sysarch() calls for the standard mips userspace cache-control calls.
|
| 1.11 | 09-Jun-1997 |
jonathan | Move the mips sys_machdep.c from pmax/pmax to mips/mips, to enforce a
common sysarch on all mips ports.
|
| 1.10 | 10-Apr-1996 |
jonathan | Fixes for -Wall -Wmissing-prototypes:
Add prototypes to (most of) src/sys/arch/pmax/pmax. (The un-protytyped
parts still have pending merges with the Pica port.)
Fix splx() glitches in pmax/clock.c.
Delete old cpu/fpu identification from pmax/autoconf.c, use r4400/r4600/idt
aware code from Pica port, now in mips/mips/mips_machdep.c.
Delete unused multi-CPU autoconfiguration code; NetBSD/pmax does not
support decsystem 5800s anyway.
|
| 1.9 | 30-Nov-1995 |
jtc | merge in changes from 1.1 release branch
|
| 1.8 | 20-Sep-1995 |
jonathan | branches: 1.8.2;
Include <sys/mount.h>, as the new <sys/syscallargs.h> won't compile without it.
|
| 1.7 | 19-Sep-1995 |
thorpej | Make system calls conform to a standard prototype and bring those
prototypes into scope.
|
| 1.6 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.5 | 20-Oct-1994 |
cgd | update for new syscall args description mechanism
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 16-Jan-1994 |
deraadt | add sysarch() stub
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.8.2.1 | 13-Oct-1995 |
jonathan | Add "sys_" prefix to the function implementing the sysarch() system call.
|
| 1.13.4.1 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.15.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.16.2.3 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.16.2.2 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.16.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.21.6.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.21.4.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.22.2.4 | 29-May-2002 |
nathanw | #include <sys/sa.h> before <sys/syscallargs.h>, to provide sa_upcall_t
now that <sys/param.h> doesn't include <sys/sa.h>.
(Behold the Power of Ed)
|
| 1.22.2.3 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.22.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.22.2.1 | 14-Nov-2001 |
wdk | file sys_machdep.c was added on branch nathanw_sa on 2001-11-17 23:43:44 +0000
|
| 1.23.2.7 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.23.2.6 | 04-Mar-2005 |
skrll | Sync with HEAD.
Hi Perry!
|
| 1.23.2.5 | 14-Nov-2004 |
skrll | Sync with HEAD.
|
| 1.23.2.4 | 02-Nov-2004 |
skrll | Sync with HEAD.
|
| 1.23.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.23.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.23.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.27.6.1 | 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.27.4.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.29.2.3 | 21-Jan-2008 |
yamt | sync with head
|
| 1.29.2.2 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.29.2.1 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.30.20.1 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.31.2.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.32.32.1 | 02-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.32.28.1 | 26-Dec-2007 |
ad | Sync with head.
|
| 1.32.20.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.33.38.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.33.28.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.33.28.1 | 15-May-2010 |
matt | Add kernel support for MIPS TLS. Use rdhwr rt, $29 as defined by the MIPS
TLS spec so that Linux MIPS binaries will work. Use sysarch(MIPS_TINFOSET, v)
to set the pointer.
|
| 1.33.12.2 | 14-May-2008 |
wrstuden | Per discussion with ad, remove most of the #include <sys/sa.h> lines
as they were including sa.h just for the type(s) needed for syscallargs.h.
Instead, create a new file, sys/satypes.h, which contains just the
types needed for syscallargs.h. Yes, there's only one now, but that
may change and it's probably more likely to change if it'd be difficult
to handle. :-)
Per discussion with matt at n dot o, add an include of satypes.h to
sigtypes.h. Upcall handlers are kinda signal handlers, and signalling
is the header file that's already included for syscallargs.h that
closest matches SA.
This shaves about 3000 lines off of the diff of the branch relative
to the base. That also represents about 18% of the total before this
checkin.
I think this reduction is very good thing.
|
| 1.33.12.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.51 | 05-Oct-2023 |
ad | Arrange to update cached LWP credentials in userret() rather than during
syscall/trap entry, eliminating a test+branch on every syscall/trap.
This wasn't possible in the 3.99.x timeframe when l->l_cred came about
because there wasn't a reliable/timely way to force an ONPROC LWP running on
a remote CPU into the kernel (which is just about the only new thing in
this scheme).
|
| 1.50 | 09-Aug-2020 |
skrll | KNF
|
| 1.49 | 31-Jul-2016 |
skrll | Whitespace.
|
| 1.48 | 26-Jun-2013 |
matt | branches: 1.48.10; 1.48.14;
Use sy_invoke
|
| 1.47 | 19-Feb-2012 |
rmind | branches: 1.47.2;
Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.46 | 27-Sep-2011 |
jym | branches: 1.46.2; 1.46.6;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
| 1.45 | 10-Jul-2011 |
matt | More <machine/ include cleanup
|
| 1.44 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.43 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.42 | 20-Dec-2010 |
matt | branches: 1.42.2; 1.42.4;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
|
| 1.41 | 25-Apr-2010 |
rmind | Fix KASSERTMSG() to be consistent with KASSERT() logic, not inverted.
Hi matt@!
|
| 1.40 | 14-Dec-2009 |
skrll | branches: 1.40.2; 1.40.4;
Wrap comment.
|
| 1.39 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.38 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.37 | 25-Oct-2008 |
tsutsui | branches: 1.37.12;
Wrap #include "opt_sa.h" with #if defined(_KERNEL_OPT)/#endif
since this file is also used for compat_irix.
|
| 1.36 | 21-Oct-2008 |
ad | Provide a small inline wrapper for sysent::sy_call() and use it to store
the active syscall description in struct lwp. To be used at some future
point to prevent unloading of modules that provide syscalls, while the
syscalls are in use.
|
| 1.35 | 15-Oct-2008 |
wrstuden | Merge wrstuden-revivesa into HEAD.
|
| 1.34 | 28-Apr-2008 |
martin | branches: 1.34.2; 1.34.6;
Remove clause 3 and 4 from TNF licenses
|
| 1.33 | 06-Feb-2008 |
dsl | branches: 1.33.6; 1.33.8; 1.33.10;
Remove the 'args' parameter to 'trace_exit()' it is no longer used.
Instead of passing the (un)real system call code and syscall table pointer,
just pass the number of arguments - which is what ktrace really wants.
Ride forthcoming 4.99.53
|
| 1.32 | 05-Jan-2008 |
dsl | Don't pass 'curlwp' into trace_enter() and trace_exit().
|
| 1.31 | 09-Feb-2007 |
ad | branches: 1.31.16; 1.31.24; 1.31.30; 1.31.36;
Merge newlock2 to head.
|
| 1.30 | 01-Nov-2006 |
martin | Make the syscall "code" variable unsigned - we don't test for negative
values when range checking.
|
| 1.29 | 19-Jul-2006 |
ad | branches: 1.29.4; 1.29.6;
- Hold a reference to the process credentials in each struct lwp.
- Update the reference on syscall and user trap if p_cred has changed.
- Collect accounting flags in the LWP, and collate on LWP exit.
|
| 1.28 | 07-Mar-2006 |
thorpej | branches: 1.28.2;
Syscall debug tracing is handled by trace_enter() / trace_exit(). Change
trace_is_enabled() to return TRUE if SYSCALL_DEBUG is defined, and g/c
all of the SYSCALL_DEBUG handling from individual system call dispatch
routines.
|
| 1.27 | 07-Mar-2006 |
thorpej | Clean up fallout proc_is_traced_p() change:
- proc_is_traced_p() -> trace_is_enabled(), to match trace_enter() and
trace_exit().
- trace_is_enabled() becomes a real function.
- Remove unnecessary include files from various files that used to care
about KTRACE and SYSTRACE, but do no more.
|
| 1.26 | 05-Mar-2006 |
christos | Add a proc_is_traced_p() macro and use it, instead of copying the same code
in many places. Idea from thorpej.
|
| 1.25 | 05-Mar-2006 |
christos | branches: 1.25.2;
implement PT_SYSCALL
|
| 1.24 | 11-Dec-2005 |
christos | branches: 1.24.4; 1.24.6;
merge ktrace-lwp.
|
| 1.23 | 01-Jul-2005 |
christos | branches: 1.23.2;
PR/29607: Christian Biere systrace doesn't handle interrupted syscalls properly
Instead of jumping to the default "bad" case, jump to the error handling
switch, so that we can deal with ERESTART/EJUSTRETURN properly.
|
| 1.22 | 04-Apr-2004 |
simonb | Fix bogus gcc -Wuninitialised warning when SYSCALL_DEBUG is enabled.
|
| 1.21 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.20 | 31-Oct-2003 |
simonb | Don't pass the (unused) return value args to the
trace_enter()/systrace_enter() functions.
|
| 1.19 | 27-Oct-2003 |
simonb | Remove assigned-to but otherwise unused variables.
|
| 1.18 | 27-Oct-2003 |
simonb | "Fix" bogus gcc3 uninitialised warning.
|
| 1.17 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.16 | 23-May-2003 |
simonb | branches: 1.16.2;
scdebug_call() takes an LWP and not a proc as it's first argument.
|
| 1.15 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.14 | 21-Dec-2002 |
manu | Pass the system call table to trace_enter() and ktrsys() so that it is
possible to use alternate system call tables. This is usefull for
displaying correctly the arguments in Mach binaries traces.
If NULL is given, then the regular systam call table for the process is used.
|
| 1.13 | 30-Nov-2002 |
jdolecek | make LKM friedlier - only include opt_* ifdef _KERNEL_OPT
|
| 1.12 | 15-Nov-2002 |
manu | Add a realcode argument to trace_enter and ktrsyscall. realcode is the
original system call number, which can be negative for a Mach trap.
We cannot just replace code by realcode, because ktrsyscall uses it as
an index in the system call table, thus crashing the kernel when the
value is negative.
|
| 1.11 | 09-Nov-2002 |
thorpej | Fix signed/unsigned comparison warnings.
|
| 1.10 | 17-Jun-2002 |
christos | MD systrace gluons.
|
| 1.9 | 28-Mar-2002 |
manu | branches: 1.9.2;
Moved errno translation so that errno get translated correctly in any case,
and so that EJUSTRETURN and ERESTART get proprely reported.
|
| 1.8 | 05-Mar-2002 |
simonb | Fix for when we have 64 bit registers enabled for userland (but still
using the o32 API).
|
| 1.7 | 02-Feb-2002 |
manu | Added errno translation for non native OSes emulation (IRIX, Linux, Ultrix)
|
| 1.6 | 02-Dec-2001 |
manu | Added twomissing SYSCALL_SHIFT for indirect syscall through SYS_syscall
|
| 1.5 | 22-Sep-2001 |
manu | branches: 1.5.4;
Added Linux emulation support to Mips port
|
| 1.4 | 11-May-2001 |
thorpej | branches: 1.4.2; 1.4.4;
Correct args to SYSCALL_DEBUG related function calls.
From Rafal K. Boni.
|
| 1.3 | 12-Feb-2001 |
shin | branches: 1.3.2;
keep V0 value (system call number) and restore it in exception frame,
when error is ERESTART. otherwise, user process will re-issue syscall
with broken system call number and get SIGSYS signal and terminate.
patch made by Jason R Thorpe <thorpej@zembu.com>. tested by me.
|
| 1.2 | 18-Jan-2001 |
tv | No-op commit to force update to a non-"-kk" revision.
|
| 1.1 | 16-Jan-2001 |
thorpej | branches: 1.1.2;
New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
|
| 1.1.2.3 | 12-Mar-2001 |
bouyer | Sync with HEAD.
|
| 1.1.2.2 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.1.2.1 | 16-Jan-2001 |
bouyer | file syscall.c was added on branch thorpej_scsipi on 2001-01-18 09:22:45 +0000
|
| 1.3.2.1 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.4.4.1 | 01-Oct-2001 |
fvdl | Catch up with -current.
|
| 1.4.2.5 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.4.2.4 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.4.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.4.2.2 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.4.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.5.4.10 | 29-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.5.4.9 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.5.4.8 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.5.4.7 | 21-Jun-2002 |
gmcgarry | need <sys/sa.h> before <sys/savar.h>
|
| 1.5.4.6 | 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.5.4.5 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.5.4.4 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.5.4.3 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.5.4.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.5.4.1 | 22-Sep-2001 |
wdk | file syscall.c was added on branch nathanw_sa on 2001-11-17 23:43:44 +0000
|
| 1.9.2.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.16.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.16.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.16.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.16.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.23.2.5 | 11-Feb-2008 |
yamt | sync with head.
|
| 1.23.2.4 | 21-Jan-2008 |
yamt | sync with head
|
| 1.23.2.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.23.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.23.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.24.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.24.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.25.2.3 | 11-Aug-2006 |
yamt | sync with head
|
| 1.25.2.2 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.25.2.1 | 05-Mar-2006 |
yamt | file syscall.c was added on branch yamt-pdpolicy on 2006-03-13 09:06:58 +0000
|
| 1.28.2.2 | 07-Mar-2006 |
thorpej | Syscall debug tracing is handled by trace_enter() / trace_exit(). Change
trace_is_enabled() to return TRUE if SYSCALL_DEBUG is defined, and g/c
all of the SYSCALL_DEBUG handling from individual system call dispatch
routines.
|
| 1.28.2.1 | 07-Mar-2006 |
thorpej | file syscall.c was added on branch elad-kernelauth on 2006-03-07 07:21:51 +0000
|
| 1.29.6.1 | 10-Dec-2006 |
yamt | sync with head.
|
| 1.29.4.2 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.29.4.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.31.36.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.31.30.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.31.24.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.31.24.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.31.16.2 | 03-Aug-2007 |
matt | Completely rewrite and make it support O32/O64/N32/N64 all at the same time.
(the ABI in use is derived from the p_md.md_abi which it is set by the
exec_probe hooks added earlier).
|
| 1.31.16.1 | 18-Jul-2007 |
matt | Make the last parameter to *syscall a vaddr_t
|
| 1.33.10.4 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.33.10.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.33.10.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.33.10.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.33.8.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.33.6.2 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.33.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.34.6.2 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.34.6.1 | 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.34.2.2 | 14-Oct-2008 |
wrstuden | Add a new vp-private flag, SAVP_FLAG_DELIVERING. This flag indicates
that the vp is in the process of delivering a new-thread upcall.
This is a BLOCKED or NEWPROC upcall. Do NOT generate any BLOCKED
upcalls while this is set. Set it at the end of sa_switchcall()
and clear it at syscall entry. Sadly, I have found no other
way to handle this. The old SA interface has no way for
userland to acknowledge that it got the upcall, so use syscall
entry as the indicator that libpthread got it.
This addresses the issue seen on current-users with firefox
dying with a blockedgen != unbockedgen error. The problem is we
deliver a BLOCKED upcall, but between the end of userret()
and when the CPU indicates that it's running in user mode, we take
a page fault. Said page fault blocks, blocking upcall delivery.
The original block, however, was short-lived, and the UNBLOCK
happens shortly. It happens before libpthread actually notices
the BLOCKED upcall. Boom!
Unfortunately a LOCKDEBUG/DIAGNOSTIC kernel still dies before
firefox opens. However this new issue is with uvm code calling
mtsleep when not holding a correct lock; sa_switch() is exploding
at KASSERT(lwp_locked(l, NULL)); before it's done _anything_.
Also, while here, add sa_system_disabled. This is an integer
that we examine when starting SA for a proc. If it's non-zero,
we error out. Once this is hooked into sysctl, you'll be able to
disable SA w/o recompiling.
|
| 1.34.2.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.37.12.16 | 27-Feb-2012 |
matt | Count all traps types.
|
| 1.37.12.15 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.37.12.14 | 03-Feb-2011 |
cliff | fix KASSERTMSG useage
|
| 1.37.12.13 | 29-Dec-2010 |
matt | Move away from StudlyCaps.
Change opc to pc since opc might be confused with opcode.
|
| 1.37.12.12 | 22-Feb-2010 |
matt | Explicitly include <mips/locore.h> since <mips/cpu.h> no longer includes it.
Use curcpu()->ci_data.cpu_nsyscall instead of uvmexp.syscalls.
|
| 1.37.12.11 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.37.12.10 | 12-Dec-2009 |
cliff | - use #ifdef MIPS_SYSCALL_DEBUG instead of #if 0
- we should have a runtime switch also (TBD)
|
| 1.37.12.9 | 12-Sep-2009 |
matt | Now that register32_t is 64-bit, switch to int32_t.
|
| 1.37.12.8 | 02-Sep-2009 |
uebayasi | Fix a copy & paste error in previous.
|
| 1.37.12.7 | 02-Sep-2009 |
matt | Add printf for error case.
|
| 1.37.12.6 | 24-Aug-2009 |
uebayasi | Don't use an obscure macro (DELAYBRANCH(x)) to check if the BD field (bit
31) is set in Cause Register.
|
| 1.37.12.5 | 23-Aug-2009 |
matt | Add code to print the retval.
Use _QUAD_{LOW,HIGH}WORD to divide up V0 on O32.
|
| 1.37.12.4 | 22-Aug-2009 |
matt | Use sy_narg, not sy_argsize!
Add debug code to pretty print args.
|
| 1.37.12.3 | 22-Aug-2009 |
matt | Rework O32 support on !O32 to just convert the 32bit argument list to a
64bit arguments using the info about 64bit args that's now in sysent.
This avoid a special COMPAT for O32 and thus N32/O32 can share COMPAT_NETBSD32
Or on a N32 kernel, no COMPAT needed at all.
|
| 1.37.12.2 | 21-Aug-2009 |
matt | New simplier implentation that handles all 4 ABIs: O32/N32/O64/N64.
|
| 1.37.12.1 | 20-Aug-2009 |
uebayasi | #error -> panic() for N32/N64 so that we can build test now.
|
| 1.40.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.40.4.1 | 30-May-2010 |
rmind | sync with head
|
| 1.40.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.42.4.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.42.4.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.42.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.46.6.1 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.46.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.46.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.47.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.47.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.48.14.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.48.10.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.265 | 24-Oct-2023 |
andvar | pass &tf->tf_registers instead of tf to db_set_ddb_regs().
use _R_PC definition instead of TF_EPC for tf->tf_regs[].
Changes were not adjusted with mips64 merge for kgdb code.
makes trap.c build with KGDB option enabled for mips archs.
|
| 1.264 | 05-Oct-2023 |
ad | Arrange to update cached LWP credentials in userret() rather than during
syscall/trap entry, eliminating a test+branch on every syscall/trap.
This wasn't possible in the 3.99.x timeframe when l->l_cred came about
because there wasn't a reliable/timely way to force an ONPROC LWP running on
a remote CPU into the kernel (which is just about the only new thing in
this scheme).
|
| 1.263 | 14-Sep-2023 |
rin | mips/trap: Fix reversed ksi_code for SIGTRAP cases
It should be TRAP_TRACE and TRAP_BRKPT for software single stepping
and ``real'' break insn, respectively.
|
| 1.262 | 13-Mar-2022 |
andvar | s/hander/handler/ and s/hader/header/ in comments and documentation.
|
| 1.261 | 07-Apr-2021 |
simonb | Basic dtrace trap support.
Mostly from FreeBSD.
|
| 1.260 | 29-Mar-2021 |
simonb | (Very) minimal kernel support for dtrace on MIPS; enough to system call
tracing to work for example.
|
| 1.259 | 17-Mar-2021 |
simonb | branches: 1.259.2;
Handle gas/gcc generating a break/trap 6 for integer overflow and
break/trap 7 for integer divide by zero and setting the SIGFPE
si_code of FPE_INTOVF or FPE_INTDIV respectively. The break/trap
6/7 seems to have existed since the early days of MIPS but not
well documented anywhere.
Fixes ATF lib/libc/gen/t_siginfo::sigfpe_int .
|
| 1.258 | 13-Mar-2021 |
skrll | s/pfi_faultpte/&p/ for consistency with arm / other uses of ptep
|
| 1.257 | 07-Mar-2021 |
christos | add TRAP_SIGDEBUG support to mips.
|
| 1.256 | 15-Aug-2020 |
mrg | branches: 1.256.2;
move stacktrace_subr() from trap.c into new mips_stacktrace.c so
it can be shared between ddb, other mips kernel components (see
locore), and an upcoming crash(8) port.
remove second copy of kdbpeek() (hidden by old DDB_TRACE
option, but they're functionally equivalent.)
tested on octeon.
ok simonb@
|
| 1.255 | 13-Jul-2020 |
simonb | Remove a magic number.
|
| 1.254 | 25-Jun-2020 |
simonb | Fix tyop in an acient comment.
|
| 1.253 | 09-Apr-2020 |
skrll | Wrap a REALLY long line
|
| 1.252 | 09-Apr-2020 |
skrll | Fix UVMHIST build
|
| 1.251 | 10-Mar-2020 |
thorpej | branches: 1.251.2;
Comment out the diagnostic message in the TLB_MOD handler that's logged if
pmap_tlb_update_addr() indicates that the VA+ASID was not found in the TLB.
It's a harmless race condition that can happen for legitimate reasons (e.g.
a TLB miss in an interrupt handler that evicts the entry from the TLB).
See discussion:
http://mail-index.netbsd.org/port-mips/2020/03/07/msg000927.html
|
| 1.250 | 07-Mar-2020 |
thorpej | Add missing newline to a diagnostic printf.
|
| 1.249 | 06-Apr-2019 |
kamil | branches: 1.249.4;
Centralized shared part of child_return() into MI part
Add a new function md_child_return() for MD specific bits only.
New child_return() is now part of MI and central code that handles
uniformly tracing code (KTR and ptrace(2)).
Synchronize value passed to ktrsysret() among ports to SYS_fork. This is
a traditional value and accessing p_lflag to check for PL_PPWAIT shall
use locking against proc_lock. Returning SYS_fork vs SYS_vfork still isn't
correct enough as there are more entry points to forking code. Instead of
making it too good, just settle with plain SYS_fork for all ports.
|
| 1.248 | 06-Apr-2019 |
thorpej | Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.247 | 03-Apr-2019 |
kamil | Rework the fork(2)/vfork(2) event signalling under ptrace(2)
Remove the constraint of SIGTRAP event being maskable by a tracee.
Now all SIGTRAP TRAP_CHLD events are delivered to debugger.
This code touches MD specific logic and the child_return routine.
It's an intermediate step with a room for refactoring in future and
right now the least invasive approach. This allows to assert expected
behavior in already existing ATF tests and make the code prettier
in future keeping the same semantics. Probably there is a need for a MI
wrapper of child_return for shared functionality between ports.
|
| 1.246 | 08-Feb-2018 |
bouyer | branches: 1.246.4;
Allow kdbpeek() to return failure. If it does, stop the stack trace.
Prevents an infinite loop in ddb if something goes wrong.
|
| 1.245 | 22-Dec-2017 |
maya | Don't handle emulations overriding e_fault.
No existing emulations do this.
(COMPAT_IRIX did, but was removed)
|
| 1.244 | 14-Jul-2017 |
christos | branches: 1.244.2;
Advance the PC on breakpoint instruction to avoid infinite loop DoS!
|
| 1.243 | 10-Sep-2016 |
skrll | Remove stray assignment.
|
| 1.242 | 10-Sep-2016 |
skrll | Fixup siginfo
|
| 1.241 | 11-Jul-2016 |
skrll | Trailing whitespace
|
| 1.240 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.239 | 06-Mar-2016 |
tnn | Don't try to interpret MIPS3-specific status register bit on MIPS1.
Fixes boot of NetBSD/pmax in gxemul 3max emulation mode.
|
| 1.238 | 11-Jun-2015 |
matt | Define (but not use) separate kernel and user pagetables.
Move to the new names.
|
| 1.237 | 06-Jun-2015 |
matt | Add support for NMI exception (which don't use the cause register).
|
| 1.236 | 26-Mar-2014 |
christos | branches: 1.236.6;
kill sprintf
|
| 1.235 | 19-Feb-2012 |
rmind | branches: 1.235.2; 1.235.4;
Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.234 | 24-Nov-2011 |
matt | branches: 1.234.2;
Print out the address in the ktlbmod panic.
|
| 1.233 | 18-Aug-2011 |
matt | branches: 1.233.2;
Change bcond/BCOND to regimm/REGIMM to better match the MIPS nomenclature.
|
| 1.232 | 16-Aug-2011 |
matt | Add support for the MIPS DSP ASE (as a second PCU).
|
| 1.231 | 29-Apr-2011 |
matt | cleanup cpu.h includes
|
| 1.230 | 06-Apr-2011 |
matt | Remove dead code.
KNF cleanup.
|
| 1.229 | 16-Mar-2011 |
tsutsui | Set R_CAUSE into trapframe in curlwp before calling mips_fpu_trap()
for workaround PR port-mips/44639.
mipsX_user_gen_exception() in mipsX_subr.S (which may call
mips_fpu_trap()) doesn't set R_CAUSE in curlwp trapframe, while
mips1_use_intr() in locore_mips1.S (that may call mips_fpu_intr()) does.
All tests in tests/lib/libc/ieeefp on MIPS3 should pass now.
|
| 1.228 | 15-Mar-2011 |
matt | Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
|
| 1.227 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.226 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.225 | 17-Jan-2011 |
tsutsui | branches: 1.225.2;
Explicitly include <mips/pcb.h> for struct pcb.
|
| 1.224 | 20-Dec-2010 |
matt | branches: 1.224.2;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
|
| 1.223 | 12-Nov-2010 |
uebayasi | Pull in uvm/uvm.h for uvm_pageismanaged().
|
| 1.222 | 20-Mar-2010 |
chs | fix copy{in,out}{,str}() to return the error returned by uvm_fault().
fixes PR 41813.
|
| 1.221 | 14-Dec-2009 |
matt | branches: 1.221.2; 1.221.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.220 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.219 | 18-Aug-2009 |
thorpej | Add a real API for testing if a page is a managed page, and adjust callers
to stop relying on vm_physseg_find() for this purpose.
|
| 1.218 | 06-Aug-2009 |
matt | print ra on trap.
|
| 1.217 | 15-Oct-2008 |
wrstuden | branches: 1.217.12;
Merge wrstuden-revivesa into HEAD.
|
| 1.216 | 03-Dec-2007 |
ad | branches: 1.216.14; 1.216.18; 1.216.20; 1.216.24;
Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
|
| 1.215 | 24-Oct-2007 |
ad | branches: 1.215.2;
Make ras_lookup() lockless.
|
| 1.214 | 17-Oct-2007 |
garbled | Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.213 | 15-Aug-2007 |
ad | branches: 1.213.2; 1.213.6;
Changes to make ktrace LKM friendly and reduce ifdef KTRACE. Proposed
on tech-kern.
|
| 1.212 | 29-May-2007 |
tsutsui | branches: 1.212.4; 1.212.8;
Use the kernel symbol table to see the beginning of the current
subroutine to get more proper backtrace on ddb(4).
In the previous code it scans backwards from the current PC
for the end of the previous subroutine and checks "jr ra" or
"jr k0" instructions, but it often fails because gcc is
so aggressive nowadays as to reorder instruction blocks
to create efficient code path by branch predict etc. and
"jr ra" is not always located at the end of subroutines.
No objection on port-mips.
|
| 1.211 | 25-May-2007 |
tsutsui | proc_trampoline -> lwp_trampoline in comment.
|
| 1.210 | 17-May-2007 |
yamt | merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.209 | 04-Mar-2007 |
christos | branches: 1.209.2; 1.209.4; 1.209.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.208 | 28-Feb-2007 |
thorpej | TRUE -> true, FALSE -> false
|
| 1.207 | 09-Feb-2007 |
ad | branches: 1.207.2;
Merge newlock2 to head.
|
| 1.206 | 26-Aug-2006 |
matt | branches: 1.206.2; 1.206.6; 1.206.8;
Use vaddr_t for virtual addresses. Don't cast pointers with int or
unsigned, use intptr_t or uintptr_t as appropriate.
|
| 1.205 | 23-Jul-2006 |
ad | Use the LWP cached credentials where sane.
|
| 1.204 | 19-Jul-2006 |
ad | - Hold a reference to the process credentials in each struct lwp.
- Update the reference on syscall and user trap if p_cred has changed.
- Collect accounting flags in the LWP, and collate on LWP exit.
|
| 1.203 | 15-May-2006 |
yamt | - include kauth.h for kauth_cred_geteuid.
- fix an incomplete kauth change.
|
| 1.202 | 14-May-2006 |
elad | integrate kauth.
|
| 1.201 | 28-Apr-2006 |
simonb | G/c some ancient intrcnt code that isn't used anymore.
|
| 1.200 | 20-Mar-2006 |
drochner | kill the last use of vm_fault_t, from Havard Eidnes
|
| 1.199 | 15-Mar-2006 |
drochner | branches: 1.199.2;
adapt to uvm_fault() interface cleanup: kill the useless 3rd argument
|
| 1.198 | 11-Dec-2005 |
christos | branches: 1.198.4; 1.198.6; 1.198.8; 1.198.10;
merge ktrace-lwp.
|
| 1.197 | 07-Sep-2005 |
drochner | fix an obvious mistake where the original instruction
is restored after a simulated single-step,
also use VM_PROT_ALL to get maximal permission for patching
instructions instead of VM_PROT_DEFAULT whose semantics
are not that defined
|
| 1.196 | 01-Jun-2005 |
drochner | branches: 1.196.2;
cast-qual fallout
|
| 1.195 | 30-May-2005 |
simonb | Deal with extra constiness in ddb.
|
| 1.194 | 28-Aug-2004 |
jdolecek | use uvm_grow() to update stack segment size on stack page fault instead
of MD code
|
| 1.193 | 26-Mar-2004 |
drochner | all ports define __HAVE_SIGINFO now, so remove the CPP conditionals
|
| 1.192 | 14-Mar-2004 |
cl | add kernel part of concurrency support for SA on MP systems
- move per VP data into struct sadata_vp referenced from l->l_savp
* VP id
* lock on VP data
* LWP on VP
* recently blocked LWP on VP
* queue of LWPs woken which ran on this VP before sleep
* faultaddr
* LWP cache for upcalls
* upcall queue
- add current concurrency and requested concurrency variables
- make process exit run LWP on all VPs
- make signal delivery consider all VPs
- make timer events consider all VPs
- add sa_newsavp to allocate new sadata_vp structure
- add sa_increaseconcurrency to prepare new VP
- make sys_sa_setconcurrency request new VP or wakeup idle VP
- make sa_yield lower current concurrency
- set sa_cpu = VP id in upcalls
- maintain cached LWPs per VP
|
| 1.191 | 13-Feb-2004 |
wiz | Uppercase CPU, plural is CPUs.
|
| 1.190 | 31-Dec-2003 |
simonb | ANSIfy, KNF.
|
| 1.189 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.188 | 06-Nov-2003 |
simonb | Try using matching numbers of open and close parentheses to make this
compile again.
|
| 1.187 | 04-Nov-2003 |
dsl | Remove p_nras from struct proc - use LIST_EMPTY(&p->p_raslist) instead.
Remove p_raslock and rename p_lwplock p_lock (one lock is enough).
Simplify window test when adding a ras and correct test on VM_MAXUSER_ADDRESS.
Avoid unpredictable branch in i386 locore.S
(pad fields left in struct proc to avoid kernel bump)
|
| 1.186 | 02-Nov-2003 |
christos | Initialize another fp instance
|
| 1.185 | 02-Nov-2003 |
christos | only assign to fp when we have a valid lwp. Thanks simon
|
| 1.184 | 29-Oct-2003 |
christos | first pass siginfo glue for mips
|
| 1.183 | 21-Oct-2003 |
tsutsui | vaddr_t is not pointer, so don't compare it against NULL.
(BTW, should we also fix "NULL" in following printf messages?)
|
| 1.182 | 20-Sep-2003 |
cl | add MD part of SA/pthread pagefault handling on mips
|
| 1.181 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.180 | 29-Jun-2003 |
fvdl | branches: 1.180.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.179 | 29-Jun-2003 |
simonb | Don't use "extern" with functions.
|
| 1.178 | 28-Jun-2003 |
darrenr | Pass lwp pointers throughtout the kernel, as required, so that the lwpid can
be inserted into ktrace records. The general change has been to replace
"struct proc *" with "struct lwp *" in various function prototypes, pass
the lwp through and use l_proc to get the process pointer when needed.
Bump the kernel rev up to 1.6V
|
| 1.177 | 02-Jun-2003 |
simonb | Remove needless line wrap.
|
| 1.176 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.175 | 09-Nov-2002 |
thorpej | branches: 1.175.2;
Fix signed/unsigned comparison warnings.
|
| 1.174 | 04-Nov-2002 |
thorpej | Use named indices for RA, SR, MULLO, MULHI, and EPC in the
trapframe.
|
| 1.173 | 22-Sep-2002 |
gmcgarry | Update for cpu_switch() prototype change. No functional change.
|
| 1.172 | 21-Sep-2002 |
manu | - Introduce a e_fault field in struct proc to provide emulation specific
memory fault handler. IRIX uses irix_vm_fault, and all other emulation
use NULL, which means to use uvm_fault.
- While we are there, explicitely set to NULL the uninitialized fields in
struct emul: e_fault and e_sysctl on most ports
- e_fault is used by the trap handler, for now only on mips. In order to avoid
intrusive modifications in UVM, the function pointed by e_fault does not
has exactly the same protoype as uvm_fault:
int uvm_fault __P((struct vm_map *, vaddr_t, vm_fault_t, vm_prot_t));
int e_fault __P((struct proc *, vaddr_t, vm_fault_t, vm_prot_t));
- In IRIX share groups, all the VM space is shared, except one page.
This bounds us to have different VM spaces and synchronize modifications
to the VM space accross share group members. We need an IRIX specific hook
to the page fault handler in order to propagate VM space modifications
caused by page faults.
|
| 1.171 | 28-Aug-2002 |
gmcgarry | RAS support for MIPS. Tested on R3000.
|
| 1.170 | 06-Jul-2002 |
gmcgarry | Overhaul the emulation facility. We do this by:
- accumulating all emulation code (including floating-point) in one place
- steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts
and traps from *real* FPUs
- introducing MachEmulateInst() as a common dispatch point for all
emulated instructions
- cleaning up emulation dispatch in trap()
Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1.
Tested on r3k with and without SOFTFLOAT enabled.
|
| 1.169 | 11-Mar-2002 |
uch | branches: 1.169.4;
make this compile and work with MIPS3_5900.
|
| 1.168 | 05-Mar-2002 |
simonb | Remove HPCMIPS_FLUSHCACHE_XXX debug code.
Remove old unused exception frame unwind code.
Change a MIPS3 check to a MIPS3_PLUS check.
ANSIfy.
|
| 1.167 | 12-Jan-2002 |
enami | Define new macro to access FSR register and use it.
|
| 1.166 | 28-Dec-2001 |
shin | check if curproc is invalid, and do panic.
otherwise, we can't useful backtrace.
Ex. address error in interrupt handler.
|
| 1.165 | 14-Nov-2001 |
thorpej | branches: 1.165.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.164 | 16-Oct-2001 |
uch | branches: 1.164.2;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.163 | 02-Jun-2001 |
chs | branches: 1.163.2;
replace vm_map{,_entry}_t with struct vm_map{,_entry} *.
|
| 1.162 | 30-May-2001 |
lukem | add missing #include "opt_kgdb.h"
|
| 1.161 | 15-Mar-2001 |
chs | eliminate the KERN_* error codes in favor of the traditional E* codes.
the mapping is:
KERN_SUCCESS 0
KERN_INVALID_ADDRESS EFAULT
KERN_PROTECTION_FAILURE EACCES
KERN_NO_SPACE ENOMEM
KERN_INVALID_ARGUMENT EINVAL
KERN_FAILURE various, mostly turn into KASSERTs
KERN_RESOURCE_SHORTAGE ENOMEM
KERN_NOT_RECEIVER <unused>
KERN_NO_ACCESS <unused>
KERN_PAGES_LOCKED <unused>
|
| 1.160 | 16-Jan-2001 |
thorpej | branches: 1.160.2;
New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
|
| 1.159 | 14-Jan-2001 |
thorpej | Now that we won't lose signotify()'s while we're asleep, go ahead
and to signal processing in ast() again.
|
| 1.158 | 14-Jan-2001 |
thorpej | Make the astpending flag per-process.
|
| 1.157 | 14-Jan-2001 |
thorpej | Put signal posting back in userret() for now; for it to work
properly, we need to make astpending a per-process variable.
Pointed out by mycroft.
|
| 1.156 | 14-Jan-2001 |
thorpej | Remove a couple of now-unsed variables (args that are now no longer
passed to userret()).
|
| 1.155 | 14-Jan-2001 |
thorpej | - Make ast() loop around astpending; it's possible for a new
AST to be posted when delivering signals, or after a process
is preempted.
- Move all signal posting to ast(). userret() is now a one-liner.
|
| 1.154 | 11-Jan-2001 |
thorpej | Move userret() into a header file, in preparation for splitting
syscall() into plain and fancy.
|
| 1.153 | 11-Jan-2001 |
thorpej | Modeled after mycroft's changes to the Alpha port, add PROC_PC() to
get profiling out of userret(), and move the preemption check to ast().
|
| 1.152 | 14-Dec-2000 |
jeffs | Make userret() "static __inline". This lets it be inlined, even if you
do not have the compiler inline normal functions to save space. It helps
a bit on lmbench.
|
| 1.151 | 21-Nov-2000 |
soren | Adjust for p_emul change.
|
| 1.150 | 23-Oct-2000 |
jeffs | Go to to splhigh() in trap when panicing before calling debugger as break
handling does.
|
| 1.149 | 26-Sep-2000 |
jeffs | Use a cast to handle syscall() copyin case with 64b clean ctx save/restore.
|
| 1.148 | 21-Sep-2000 |
jeffs | In trap(), do not lower spl for T_BREAK. This lets ddb always run at
splhigh() so nothing can happen behind it's back.
|
| 1.147 | 16-Sep-2000 |
nisimura | There is no need to handle processor master interrupt mask SR_INT_IE
in syscall() anymore. By defition, processor was in SR_INT_IE turn
on prior to have syscall exception. MIPS1 assembler hook arranges
to enable the bit for its own. MIPS3 does the same effect by
turning off EXL bit.
|
| 1.146 | 15-Sep-2000 |
jeffs | Handle R4K trap faults in user mode like overflows (deliver SIGFPE). This
prevents a panic running crashme. Better comment for VCE define.
|
| 1.145 | 14-Aug-2000 |
wdk | intrcnt[] counters should be handled by the port specific interrupt handlers.
This change facilitates the migration from intrcnt[] to the new evcnt(9)
framework without breaking all of the mips based ports.
|
| 1.144 | 20-Jul-2000 |
jeffs | Include kgdb hooks in trap.c. Include bits of DDB code for kgdb also. Remove
some local prototypes that are in headers now.
|
| 1.143 | 02-Jul-2000 |
cgd | Kwality control:
* put #includes of opt headers and headers to get protos used by
net/netisr_dispatch.h in net/netisr.h (if !defined(_LOCORE)) (rather than
in netisr_dispatch.h itself, and potentially nowhere, respectively).
* require netisr.h to be included before netisr_dispatch.h.
* minor additional cleanup of both netisr.h and netisr_dispatch.h.
* clean up uses to remove now-unnecessary header file inclusions, and
local prototypes of the fns.
* convert netisr dispatch implementations which didn't use
netisr_dispatch.h (pc532) to use it.
|
| 1.142 | 29-Jun-2000 |
mrg | remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.141 | 26-Jun-2000 |
mrg | remove/move more mach vm header files:
<vm/pglist.h> -> <uvm/uvm_pglist.h>
<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
<vm/vm_object.h> -> nothing
<vm/vm_pager.h> -> into <uvm/uvm_pager.h>
also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.
|
| 1.140 | 09-Jun-2000 |
soda | rename
vad_to_pfn() -> mips_paddr_to_tlbpfn()
pfn_to_vad() -> mips_tlbpfn_to_paddr()
as suggested by thorpej on port-mips Mar 27.
|
| 1.139 | 09-Jun-2000 |
soda | make paddr_t 64bit on arc port by introducing _MIPS_PADDR_T_64BIT.
|
| 1.138 | 06-Jun-2000 |
soren | defopt SYSCALL_DEBUG.
|
| 1.137 | 03-Jun-2000 |
shin | delete unnecessary 'extern ...' line.
|
| 1.136 | 02-Jun-2000 |
shin | make it compile with 'options SOFTFLOAT'.
|
| 1.135 | 31-May-2000 |
nisimura | Leave fpcurproc NULL for Vr4100/TX3900. It's solely for delayed lazy
FPA. fp.S is free from fpcurproc references for SOFTFLOAT case.
|
| 1.134 | 30-May-2000 |
uch | if defined SOFTFLOAT, set fpcurproc before call MachFPInterrupt()
|
| 1.133 | 30-May-2000 |
nisimura | - Have savefpregs() and loadfpregs() in C codes with lengthy inlined
asm statements, obsoluting asm routines in locore.S. They are
designed to work in symmetry as names suggests. savefpregs()
does not clear a global variable fpcurproc. Both would be noops when
NOFPU global symbol is defined.
- MDP_FPUSED flag is not turned on for FPA-less processors like Vr4100
and TX3900 even when processes execute FP insns.
|
| 1.132 | 27-May-2000 |
sommerfeld | branches: 1.132.2;
Reduce use of curproc in several places:
- Change ktrace interface to pass in the current process, rather than
p->p_tracep, since the various ktr* function need curproc anyway.
- Add curproc as a parameter to mi_switch() since all callers had it
handy anyway.
- Add a second proc argument for inferior() since callers all had
curproc handy.
Also, miscellaneous cleanups in ktrace:
- ktrace now always uses file-based, rather than vnode-based I/O
(simplifies, increases type safety); eliminate KTRFLAG_FD & KTRFAC_FD.
Do non-blocking I/O, and yield a finite number of times when receiving
EWOULDBLOCK before giving up.
- move code duplicated between sys_fktrace and sys_ktrace into ktrace_common.
- simplify interface to ktrwrite()
|
| 1.131 | 26-May-2000 |
thorpej | First sweep at scheduler state cleanup. Collect MI scheduler
state into global and per-CPU scheduler state:
- Global state: sched_qs (run queues), sched_whichqs (bitmap
of non-empty run queues), sched_slpque (sleep queues).
NOTE: These may collectively move into a struct schedstate
at some point in the future.
- Per-CPU state, struct schedstate_percpu: spc_runtime
(time process on this CPU started running), spc_flags
(replaces struct proc's p_schedflags), and
spc_curpriority (usrpri of processes on this CPU).
- Every platform must now supply a struct cpu_info and
a curcpu() macro. Simplify existing cpu_info declarations
where appropriate.
- All references to per-CPU scheduler state now made through
curcpu(). NOTE: this will likely be adjusted in the future
after further changes to struct proc are made.
Tested on i386 and Alpha. Changes are mostly mechanical, but apologies
in advance if it doesn't compile on a particular platform.
|
| 1.130 | 24-May-2000 |
thorpej | Use preempt(), not an open-coded equivalent (which won't be
equivalent for long).
|
| 1.129 | 15-May-2000 |
nisimura | Backout the previous change which was done mistakenly.
|
| 1.128 | 15-May-2000 |
nisimura | Remove #include <machine/psl.h> which is not used.
|
| 1.127 | 15-Apr-2000 |
soda | remove following symbols which became unnecessary in recent cpu_intr() change:
mips_hardware_intr
MIPS3_INTERNAL_TIMER_INTERRUPT
mips3_intr_cycle_count
mips3_timer_delta
|
| 1.126 | 15-Apr-2000 |
nisimura | - Withdraw dealfpu() code which has been never useful so far.
- XXX It was a mistake to add CP1 insn encoding values into cpuregs.h.
Those will be relocated into mips_opcode.h with some adjustment work.
|
| 1.125 | 11-Apr-2000 |
nisimura | Introduce cpu_intr() whose body is now provided by target ports in
their own ways. Ugly fixup #define in machine/intr.h have gone.
mips_hardware_intr global variable patch work has gone.
|
| 1.124 | 28-Mar-2000 |
simonb | Move fpcurproc declaration to <mips/cpu.h>.
|
| 1.123 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.122 | 28-Mar-2000 |
simonb | Remove redundant declarations of mips3_cycle_count(), stacktrace(),
logstacktrace(), mips_idle() and cpu_switch() - these are already
declared in various header files.
|
| 1.121 | 21-Feb-2000 |
erh | Define the DONETISR macro and use netisr_dispatch.h. This is to cut down on code duplication and to standardize the available NETISRs across all ports.
|
| 1.120 | 09-Feb-2000 |
shin | fix include file.
<netinet6/ip6.h> -> <netinet/ip6.h>
|
| 1.119 | 28-Jan-2000 |
takemura | CPU specific idle hook and VR idle routine.
|
| 1.118 | 09-Jan-2000 |
shin | split 'options SOFTFLOAT' to
NOFP don't touch FPU registers in kernel
SOFTFLOAT emulate FPU instructions in kernel
|
| 1.117 | 22-Dec-1999 |
jun | FIX:
port-mips/9016 [serious/medium]:
MIPS FPU emulator points wrong epc on exception case
Responsible: port-mips-maintainer (NetBSD/mips Portmasters)
State: open
Class: sw-bug
Originator: Shuichiro URATA
Release: current 12/11/1999
Arrival-Date: Fri Dec 17 10:18:00 1999
commit patch
http://www.a-r.org/~ur/softfloat1211.diff.gz
by Shuichiro URATA (ur@a-r.org)
|
| 1.116 | 05-Dec-1999 |
shin | delete clrnd() to compile again.
|
| 1.115 | 18-Nov-1999 |
jun | on port-mips@netbsd.org:
Shuichiro URATA <ur@a-r.org> makes kernel softfloat emulation code.
http://www.a-r.org/~ur/softfloat1116.diff.gz
is Patch for
sys/arch/mips/conf/files.mips
sys/arch/mips/mips/fp.S
sys/arch/mips/mips/fpemu.c
sys/arch/mips/mips/genassym.cf
sys/arch/mips/mips/locore.S
sys/arch/mips/mips/mips_machdep.c
sys/arch/mips/mips/process_machdep.c
sys/arch/mips/mips/trap.c
sys/arch/mips/mips/vm_machdep.c
After apply this patch,pmax package binary works on hpcmips!
|
| 1.114 | 10-Nov-1999 |
nisimura | Remove a small scale 'improvement' for TLB mod exception which is now
found harmful. Fix panics on MIPS1 only kernels.
|
| 1.113 | 25-Sep-1999 |
shin | branches: 1.113.2; 1.113.4; 1.113.8;
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
|
| 1.112 | 18-Aug-1999 |
nisimura | - Replace three splx() calls with _splset(). splx() should not be
considered the equivalent of 'set processor register'.
|
| 1.111 | 28-Jun-1999 |
itojun | - Call ip6intr if INET6 is defined.
- remove "need-flag" for mac68k esp driver, as it is not used in anywhere
and conflicts with IPsec ESP header.
This should be the only MD change in IPv6 support, except kernel config file.
Very sorry if you have any compilation problem with it (I believe it is okay).
If your favorite arch is not included in here, please add a
call to ip6intr() from softintr handle.
|
| 1.110 | 29-May-1999 |
nisimura | - Make a modification to reduce the cost of TLBmod exception handling.
TLBUpdate() routine is used for dual purposes. In TLBmod case, just ok
to call 'tlbwi' (as designed). Result in saving of extraneous execution
path. MIPS1 only this moment.
|
| 1.109 | 18-May-1999 |
nisimura | - Forgot to change 'tlbpid' to 'asid'. But, why does the MIPS TLBmod
handler touch the value anyway?
|
| 1.108 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.107 | 24-Mar-1999 |
mrg | branches: 1.107.4; 1.107.6;
completely remove Mach VM support. all that is left is the all the
header files as UVM still uses (most of) these.
|
| 1.106 | 23-Mar-1999 |
simonb | Include <machine/db_machdep.h> instead of <mips/db_machdep.h>.
|
| 1.105 | 18-Mar-1999 |
chs | if uvm_fault() fails with KERN_RESOURCE_SHORTAGE, send a SIGKILL
and print a message about it. this will be used to recover from
out-of-swap conditions.
|
| 1.104 | 05-Mar-1999 |
mhitch | Remove a couple of 'XXX MIPS3?' comments in the tlbmod exeception handling -
I now know what it's doing, and it is correct for MIPS3.
|
| 1.103 | 27-Feb-1999 |
jonathan | Define C structures (struct kernframe, struct trapframe)
for kernel-to-user trapframe. Use C structs in genassym.cf.
|
| 1.102 | 29-Jan-1999 |
nisimura | - Forgot to replace a stub of 'eret' instruction with correct value.
|
| 1.101 | 16-Jan-1999 |
nisimura | - Never use an uninitialized variable.
|
| 1.100 | 16-Jan-1999 |
nisimura | - Clarify how inimplemented FP instruction traps are handled.
|
| 1.99 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.98 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.97 | 04-Dec-1998 |
nisimura | - Fix and improve confusing indentations inside trap().
- Don't make a reference of curproc when it has NULL value. It causes
double fault upon a fatal panic ocation.
- Macro FETCH_INSTRUCTION() took a value of address 0.
-
|
| 1.96 | 15-Nov-1998 |
mhitch | Change page modification emulation: don't fiddle with VM flags directly.
Track page modification status in the PV entry like the alpha, and let
pmap_is_modified() return current status back to the VM system. UVM now
works reliably.
Garbage collect the old pmap_attribute[] stuff.
|
| 1.95 | 11-Nov-1998 |
thorpej | Changes to support fork_kthread():
- cpu_set_kpc() now takes void *arg third argument, passed to the
entry point.
- cpu_fork() allows parent to be non-curproc iff parent is proc0.
When forking non-curproc, assume its state has already been saved.
- Adjust various pieces of machine-dependent code to account of all of this.
|
| 1.94 | 24-Oct-1998 |
jonathan | Cleanup kdbpeek() definition as noted in PR port-mips/5252.
|
| 1.93 | 01-Oct-1998 |
jonathan | branches: 1.93.2;
More patches for ARC from Noriyuki Soda:
* commit isapnpvar.h changes required for ARC to support plain isa.
* fixup mistake over mips/include/cpuregs.h.
* mips/mips_machdep.c:
set L2 cache-size for arc, cleanup use of L2cache present
vs L2 cache-size variables. check for no L2 cache on kernels
configured to require one. misc cleanups.
* mips/mpis/trap.c: more locore stack-traceback label cleanup.
XXX Locore callbacks for mips3, mips4, r4600 cacheflush need more work.
|
| 1.92 | 11-Sep-1998 |
jonathan | Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
|
| 1.91 | 29-Aug-1998 |
mrg | register -> int (also fixes egcs warning). minor KNF nit.
|
| 1.90 | 25-Aug-1998 |
nisimura | Make spl(9) rountines target port dependent. delay() is also port
dependent anticipating a target with high resolution timer available
for on-the-fly re-programming. Enum decstation_t was removed from MI
trap.c.
|
| 1.89 | 05-Jul-1998 |
jonathan | defopt NATM.
|
| 1.88 | 05-Jul-1998 |
jonathan | defopt NS, NSIP.
|
| 1.87 | 05-Jul-1998 |
jonathan | defopt ISO TPIP.
|
| 1.86 | 05-Jul-1998 |
jonathan | defopt INET, NETATALK.
|
| 1.85 | 04-Jul-1998 |
jonathan | defopt DDB.
|
| 1.84 | 25-Jun-1998 |
thorpej | defopt KTRACE
|
| 1.83 | 26-Mar-1998 |
jonathan | Commit MIPS_INT_MASK_FPU change: use MD symbol to check for pending FPU
interrupts.
|
| 1.82 | 12-Mar-1998 |
thorpej | Add support for UVM.
|
| 1.81 | 19-Feb-1998 |
thorpej | savectx() is prototyped in <mips/cpu.h>
|
| 1.80 | 05-Feb-1998 |
wrstuden | Add NETATALK support for mips machines. Somehow the NETISR_ATALK code
didn't make it in. Aproved by Jonathan and tested here at Stanford.
While I'm here, add conditional prototypes for clnlintr() and nsintr()
so that NS and ISO will compile correctly.
|
| 1.79 | 13-Nov-1997 |
veego | s/NETHER/NARP/ and s/ether.h/arp.h/ for the 'new' arp system.
|
| 1.78 | 17-Oct-1997 |
jonathan | branches: 1.78.2;
Add explicit #include <vm/vm.h> before mips/pte.h is included.
|
| 1.77 | 17-Aug-1997 |
mhitch | Get $ra contents from the proper location in the exception/interrupt frames.
Use DDB symbols if available for stack traceback.
|
| 1.76 | 10-Aug-1997 |
jonathan | Revert syscall interrupt re-enable of previous revision:
introduces a race in trap logging. Reported by Michael Hitch.
|
| 1.75 | 09-Aug-1997 |
jonathan | Fix printf() format strings for VMFAULT_TRACE (see PR port-pmax/3777).
Re-enable interrupts in syscall() before doing anything else; marginal
impprovment (2ms?) in NTP accuracy on 5000/240.
|
| 1.74 | 26-Jul-1997 |
mhitch | branches: 1.74.2;
Don't rely on curproc to access the current pcb when testing for kernel
faults. Use curpcb, which always points to the current pcb. If curproc
was NULL when the kernel faulted, the trap handling would fault recursively
and the kernel stack would overflow.
|
| 1.73 | 20-Jul-1997 |
jonathan | Add ddb to mips/conf/files.mips. Garbage-collect mdb.
|
| 1.72 | 20-Jul-1997 |
jonathan | Conditionalize mips1-speciifc locore code on #ifdef MIPS1
|
| 1.71 | 20-Jul-1997 |
jonathan | * Do staktcraces back through traps from kernel mode.
* Don't take stack adjustment inside procedures as frame size
(e.g., 8-byte stack adjustment for calling _mcount).
|
| 1.70 | 19-Jul-1997 |
jonathan | * Re-apply changes from rev 1.6 of sys/arch/mips/include/reg.h accidentally
undone by rev 1.7:
>redo pmax/include/reg.h
>so that the definitions needed by locore.S are in a separate file,
>pmax/include/regnum.h.
* Add explicit `#include <mips/regnum.h>' where symbolic offsets
into a mips trapframe or struct reg are used..
|
| 1.69 | 07-Jul-1997 |
jonathan | DDB for mips.
Add DDB interface to /sys/arch/mips/mips..
Rework heuristic stack traceback to work with DDB.
Add hooks to print exception log from DDB.
Add hooks from pmax console drivers: call Debugger()
after break from serial console, or 'DO' key from LK-xxx.
|
| 1.68 | 30-Jun-1997 |
jonathan | Enable stack tracebacks if MDB is configured.
|
| 1.67 | 28-Jun-1997 |
mhitch | Mini-debuuger is now included by options MDB.
Move mini-debugger routines to separate file, minidebug.c.
|
| 1.66 | 23-Jun-1997 |
mhitch | Move the mips*_dump_tlb() routines outside the #ifdef so they are always
available. Used in the locore ktlbmiss/panic to display the TLB contents
that are mapping the kernel stack.
|
| 1.65 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.64 | 22-Jun-1997 |
jonathan | Final changes for configuring MIPS1 and MIPS3 in a single kernel.
* cpuregs.h:
rename remaining VMMACH_xxx TLB macros to MIPS_TLB_xxx.
Add compile-time MIPS3-only, compile-time MIPS1-only, and
runtime (both) definitions for number of TLB ASIDs (tlb pids)
and shift count to extract a TLB pid.
* locore.h:
Delete unused vector slot for indexed TLB writes.
mips1 and mips3 TLBs are different enough that we have
to break them out at the caller anyway.
* Add compile-time MIPS3-only andcompile-time MIPS1-only
macros to call locore functions directly by name.
Use the existing method table only if
* mips/mips_machdep.c, mips/trap.c, mips/pmap.c, pmax/machdep.c:
Use MIPS3_ or MIPS1_ specific names for TLB pids in
mips3 and mips1 specific code paths (e.g., creating the kernel stack
for process 0).
Add `options MIPS3' to pmax/conf/GENERIC.
|
| 1.63 | 21-Jun-1997 |
mhitch | Restore a lost (int) case in DELAYBRANCH macro - test for BR delay in
unsigned cause register wouldn't have worked.
Add missing ')' in trapdump that shows up when compiled with DEBUG.
Fix (unfix?) previous change to printf formats in mips3_dump_tlb: vad_to_pfn
is now consistant with single-CPU and merged-CPU support.
|
| 1.62 | 20-Jun-1997 |
jonathan | trapDump(): compute accurate mask for EXC_CODE from CPU type at runtime.
|
| 1.61 | 17-Jun-1997 |
mhitch | Fix printf format/argument mismatches.
|
| 1.60 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.59 | 16-Jun-1997 |
jonathan | Garbage-collect MIPS_3K_xxx, MIPS_4K_xxx outidde mips/include/cpuregs.h:
MIPS_3K_xxx -> MIPS1_xxx
MIPS_4K_xxx -> MIPS3_xxx
|
| 1.58 | 16-Jun-1997 |
jonathan | GC more old header files:
<machine/locore.h> -> <mips/locore.h>
<machine/mips_opcode.h> -> <mips/mips_opcode..h>
|
| 1.57 | 15-Jun-1997 |
mhitch | From Toru Nishimura: exception trapframe changes, separate out syscall
processing from generic trap processing, _FORKBRAINDAMAGE is gone -
user process entered through proc_trampoline(), mini-debugger from pica
port.
More merged MIPS1/MIPS3 support for DECstations.
|
| 1.56 | 15-Jun-1997 |
jonathan | Rewrite stack traceback printing (stacktrace()) and logging(logstacktrace()
wrappers for stacktrace_subr() in assembly code to avoid prototype conflicts.
|
| 1.55 | 25-May-1997 |
jonathan | Add parens where requested by gcc -Wall.
|
| 1.54 | 25-May-1997 |
jonathan | Rename cpu_singlstep() to mips_singlestep() and add prototype.
(it's not part of the standard interface to MD code.)
XXX Consider moving into process_machdep.c when the mips3 changes are merged.
|
| 1.53 | 24-May-1997 |
jonathan | lint: add prototypes for interrupt(), softintr(), pppintr().
|
| 1.52 | 18-May-1997 |
mhitch | Eliminate vm_pmap.
|
| 1.51 | 15-Mar-1997 |
is | New ARP system, supports IPv4 over any hardware link.
Some of the stuff (e.g., rarpd, bootpd, dhcpd etc., libsa) still will
only support Ethernet. Tcpdump itself should be ok, but libpcap needs
lot of work.
For the detailed change history, look at the commit log entries for
the is-newarp branch.
|
| 1.50 | 13-Oct-1996 |
jonathan | branches: 1.50.6;
Rename mips CPU-family locore prefixes for case-consistency:
mips_r2000_, mips_R2000_ -> mips1_
mips_r4000_, mips_R4000_ -> mips3_
(which are also, for mnemonic reasons, consistent with gcc flag usage,
rather than using mipsI_ and mipsIII_).
|
| 1.49 | 13-Oct-1996 |
jonathan | Add (missing) PAGE_IS_RDONLY() macro to test for readonly pages,
in both mips-I and mips-II versions, and use it in arch/mips/mips/trap.c.
|
| 1.48 | 13-Oct-1996 |
jonathan | Merge mips1 and mips3 pte/pmap code, pass 0;
* Move mips-I pte (TLBlo) definitions from pmax/include/pte.h
to mips/include/mips1_pte.h
* Move mips-III pte (TLBlo) definitions from pica/include/pte.h
to mips/include/mips3_pte.h
* Add new mips/include/pte.h, which includes exactly one of
mips1_pte.h or mips3_pte.h (which still have namespace collisions),
depending on "options MIPS1" or "options MIPS3". (hack).
Move soft kvtopte(), ptetovk() definitions to mips/include/pte.h
* Add macro PTE_TO_PADDR() to hide the different hardware TLB formats
when mapping from pte to physical address.
* Add macro PTE_READONLY() to hide lack of SW read-only bit in mips-III
tlb. (mips1 pmap uses a sw bit in the PTE, mips3 looks up RO bit in
the kernel pmap.)
* Use macros (not direct TLB frobbing) in mips/trap.c, to make it
mips-1/mips-III indepenndet.
* Change {pmax,pica}/include/pte.h to just do #include <mips/pte.h>.
|
| 1.47 | 13-Oct-1996 |
jonathan | Fix stack traceback code for merged mips1/mips3 support:
add catch-all case, with distinct mips1 and mips3 ranges for locore
entry points, cases to catch othewise-unknown locore entrypoints and
vector code (which have special entry sequences and require special
support to trace through). The relevant mips1 and mips3 functions are
of course now distinct.
|
| 1.46 | 13-Oct-1996 |
jonathan | Merge low-level mips trap handling and move to arch/mips/mips/trap.c.
|
| 1.45 | 13-Oct-1996 |
christos | backout previous kprintf change
|
| 1.44 | 11-Oct-1996 |
christos | printf -> kprintf, sprintf -> ksprintf
|
| 1.43 | 07-Oct-1996 |
jonathan | Merge back MIPS3 locore stack-traceback code.
|
| 1.42 | 07-Oct-1996 |
jonathan | Use "MIPS1" and "MIPS3" as preprocessor tokens to select {config,compile}-time
support for mips-1 (r2000 family) and mips-3 (r4000 family) CPUs.
Avoids inconsistent use of CPU_R2000 and CPU_R3000.
|
| 1.41 | 18-Sep-1996 |
jonathan | Fix for problem report port-pmax/2173: the local variable "inst"
in the branch-emulation code was uninitialized, due to a misplaced #endif.
Remove the relevant #ifdef (macro version of GetBranchDest), and move the
XXX note about r4000 branch targets to the function definition.
|
| 1.40 | 07-Sep-1996 |
mycroft | Use SIGBUS iff we get a legitimate bus fault. Use SIGSEGV for page protection
violations (per Solaris, SVR4, AIX, Linux, Irix, and SunOS).
|
| 1.39 | 09-Aug-1996 |
mhitch | Add missing #include of "ppp.h" to get definition of NPPP so that the
pppintr() call is actually included. This fixes ppp so that it actually
works again.
|
| 1.38 | 17-Jun-1996 |
jonathan | Move cpu_singlestep outside of #ifdef DEBUG/#endif; the process-tracing code
in mips/mips/process_machdep.c (erroneously) calls cpu_singlestep().
|
| 1.37 | 20-May-1996 |
jonathan | branches: 1.37.2;
Check that either CPU_R3000 or CPU_R4000 is defined. Fix the r3k/r2k
symbolic lookup of the CPU-level specific locore entry points to use the
r2k, not the r4k, labels.
Include header files to get prototyped declarations of ipintr() and arpintr().
Remove unused variables and parenthesize assignments in if () expressions.
Gcc warns of a possible && vs || operator-precedence bug in the network
softint dispatch code, which needs more thought.
|
| 1.36 | 19-May-1996 |
jonathan | Update the DECstation stack-traceback pretty-printer, KN01 interrupt handler,
and IOCTL ASIC dma-buffer-reservation code to use the reorganized am7990
preprocessor tokens and function names.
|
| 1.35 | 19-May-1996 |
jonathan | Include <machine/locore.h>, to force all MIPS cpu-model specific
locore calls to go via a locore-entry jumptable.
Declare r2000- and r4000-specific exception-handler functions, to which
trap() and interrupt() dispatch exceptions. Initialize r2000- and r4000-
specific exception-handler vectors, when CPU_R4000 and CPU_R2000 are
defined.
Update the stack-traceback code (partially) to understand and print
the new low-level exception-handler code, via which machine exception-vectors
send exceptions to call trap() or interrupt(). This needs more work.
|
| 1.34 | 31-Mar-1996 |
jonathan | merge mips and pica locore.S, pass 0:
* cut-and-paste all the code for both r2000 (MIPS-I) and r4000 (MIPS-III)
into both the pica and pmax locore.S.
* Change the names of the small segments of vector code that are
bcopied to the machine vector locations, to avoid clashing.
Get rid of the Sprite MachXXX names for the vector code, and
use use mips_r2000_xxx and mips_r4000_xxx instead.
Update the names used in the vector-copying code and trap handlers
to match.
* Most of the rest of the pica locore.S was copied from the pmax
locore.S, and then edited to work on an r4000. The names of
functions and of manifest constants stayed the same, although
both assmbler code and constant values changed.
cut-and-paste such code into contiguous blocks protected by
#if / #endif. Much of the cache and trap-handling code
needs r3000-only register fields, on the r3000, and r4000-only
insns and registers on the r4000.
* change the pmax r2000 exception-handling code to extract a trap
code with the user/kernel bit at 0x20 rather than 0x10.
(r2000s have 4-bit execption codes, r4000s have 5-bit.)
Use the a 16 from-user-space + 16-from-kernel space jump table,
just like on the r4000 pica port.
* add NOPs to the common code where required by the r4000 pipeline
constraints.
* add _C_LABEL() macros to the r4000 locore.
Comitted to provide a snapshot for others to test, and work on a cleaner merge.
|
| 1.33 | 25-Mar-1996 |
jonathan | Split trap handler into mips-generic and port-specific functions:
* Delete pmax-specific functions and declarations from trap.c
* Delete mips-geeneric functions and declaratinos from pmax_trap.c
* Rename the function pointer used to handle hardware interrupts to
"mips_hardware_intr". Define it in trap.c. Change references elsewhere,
including machdep.c.
Verified to boot on a 5000/200.
|
| 1.32 | 25-Mar-1996 |
jonathan | Copy src/sys/arch/pmax/pmax/trap.c to pmax_trap.c.
trap.c will contain the port-independent mips trap-handling functions.
pmax_trap.h will contain the pmax-specific interrupt handlers.
|
| 1.31 | 25-Mar-1996 |
jonathan | Force reporting of memory errors for the 3MAX (aka kn02 aka 5000/200) to
always be eight digits.
Copy the kn02 memory-interrupt reporting function to the kn03 (5k/240)
memory-error handler, since the 3MAXPLUS seems to use the same ECC hardware
as the 3MAX.
|
| 1.30 | 17-Mar-1996 |
jonathan | Additional fixes to complete the NetBSD/1.1B config changes:
Update the kn01 (3100 aka pmax) interrupt handler to use XXX_cd instead
of XXXcd.
|
| 1.29 | 06-Feb-1996 |
jonathan | Change last argument of ktrsysret() call: pass rval[0], not rval, as
ktrsysret() expects. Tracing of rval[1] remains an open problem.
|
| 1.28 | 04-Feb-1996 |
jonathan | Redo the locore interrupt counters reported by vmstat -i:
* add a new enum decstation_intr_t to trap.c, naming each instrumented
interrupt symbolically, and used to index into intrcnt[]. Change the
model-specific interrupt handlers to use the decstation_intr_t when
updating interrupt counters.
* add instrumentation to the kmin and maxine interrupt handlers.
* fix a bug that counted each hardclock interrupts on the kn02 twice.
The hardcoded mapping from locore names to units is gross; but these
counters will hopefully be useful in identifying interrupt hot-spots
and PPP problems on the 3MIN.
|
| 1.27 | 02-Feb-1996 |
mycroft | Fix #includes.
|
| 1.26 | 31-Jan-1996 |
jonathan | Resolve pmax and alpha IOCTL asic driver differences, pass 1:
Rename the ioctl asic register and slot macros from ASIC_<xxx> to
IOASIC_<xxx>, to be compatible with the machine-indpendent names in
sys/dev/tc/ioasicvar.h. The pmax code still uses
sys/arch/pmax/pmax/asic.h, as some of the registers and offsets
defined there are not yet defined in sys/dev/tc/ioasicvar.h.
Rename the ioctl asic base-address pointer from `asic_base' to `ioasic_base'.
|
| 1.25 | 29-Jan-1996 |
jonathan | Re-write Decstation turbochannel autoconfiguration code to use the machine-
independent TC support in sys/dev/tc/tc.c and sys/dev/tc/tcvar.h:
* Change the tc autoconfiguration tables to use a struct tc_attach_args
instead of the ad-hoc structure.
* Change all pmax device drivers to use a `struct confargs' that's
assignment-compatible with sys/dev/tc/tcvar.h `struct tcdev_attach_args'.
Devices that can be present on a TC or as ioctl asic/mainbus builtins
use the same `struct confargs'.
* Eliminate the `BUS_CVTADDR()' macros which the pmax port inherited from
an old, now-obsolete sys/arch/alpha snapshot.
* Update the comments and debugging code in interrupt handlers to
be consistent with the machine-independent TC support.
Other commits that overlap the same source files include: re-enabling
clock-tick interrupts earlier, and counting hardclock ticks for vmstat -i.
|
| 1.24 | 28-Dec-1995 |
jonathan | Change MachEmulateBranch() to be able to read an insn from user space.
Kernel-debugger breakpoints in user space, or FP insns that cause
underflow in a delay slot, should now work properly. Single-stepping
of arbitrary user processes, from user level, should be added.
|
| 1.23 | 11-Sep-1995 |
jonathan | Rename the Decstation 2100/3100 interrupt functions from "pmax_<func>"
to "kn01_<func>", to avoid confounding a model name (PMAX) with the name of the
entire port (pmax).
Change the signature of interrupt-handlers to take a void *
(a pointer to the softc) and return an int (indicating spurious
interrupts or other conditions.)
Pass softc pointers to the scsi and ethernet kn01 (DS_PMAX) drivers,
rather than having unit numbers wired into the base-level interrupt
handler.
|
| 1.22 | 01-Aug-1995 |
jonathan | Add prototypes for most functions. Fix typo where statements
intended to increment interrupt counters for vmstat -i (i.e., "ctr++")
on 3100s had just a single "+", and hence had no effect.
|
| 1.21 | 23-Jul-1995 |
jonathan | Add diagnostics for 5k/240 turbochannel interrupts, and clean up IOASIC clock
declarations.
|
| 1.20 | 04-Jul-1995 |
paulus | Add code to interrupt to call pppintr.
|
| 1.19 | 12-May-1995 |
jonathan | Redo 3MAX+ (5k/240) interrupt enable code.
Instead of being a no-op, kn03_intr_enable() sets the sw copy of the
interrupt-enable mask *and* writes it into the IO asic intr-enable
register. Boot code sets the sw copy (kn03_tc_imask) to something
sane (KN03_IM0, with tc option slots turned off). Tested and works.
Interrupt code for other IOASIC machines should be redone so that
interrupts for devices are enabled by drivers, rather than by
cpu-specific boot code. Functions common to all IOASIC machines
(PSWARN?) should be done by asic_init().
Checked in without the above changes so that 3MAX+, MAXINE and 3MIN
interrupt-(enable,handle) can converge.
|
| 1.18 | 05-May-1995 |
mellon | Fix MAXine interrupt mask routine
|
| 1.17 | 02-May-1995 |
jonathan | If we panic inside trap(), Do a stack traceback before printing the trap log.
Also change the stack-traceback code to avoid having multiple returns
(and thus multiple stack pops) because with gcc -O2 that breaks the
heuristic that a "jr ra" preceding the PC precedes code to push the
current stack frame. Which breaks stacktrace() before it even
traces past itself :-(. Use a goto instead.
|
| 1.16 | 29-Apr-1995 |
jonathan | Update MIPS stack backtrace code to trace through locore functions,
traps, and interrupts The earlier (4.4bsd) code didn't do the first two, and
got the last one wrong. Also print some functions (e.g., trap handlers)
by name. Add hook to use something other than printf() as the output
function, e.g,. for kernel debugging.
Tested with the `native' toolset, but not ELF format kernels.
(i.e., unwinding the $GP register is not tested.)
The stack backtrace code that interprets and unwinds stackframes is still
opaque and stylistically awkward.
|
| 1.15 | 28-Apr-1995 |
jonathan | Check in source code actually containing changes in previous log message--
fixes to turbochannel-based DECstation interrupt enabling.
(I hate network firewalls that break rsh and remote CVS.)
|
| 1.14 | 28-Apr-1995 |
jonathan | Fix hardware interrupt-mask setup in the 5k/240 (3max)+ interrupt handler.
(A similar fix needs to be applied to the 3min and xine handlers.
This fixes a long-standing problem when booting with a card that
wants to interrupt (e.g., a network interface) would have interrupts
enabled before a handler was set up.
Add interrupt-counting code to model-independent interrupt handler,
and 3max (5k/200) and 3max+ (5k/240) md handlers, for vmstat -i.
Similar changes for 3min and xine are obvious but not done.
Add code for 5k/240 to read, and latch, the current value of the
IOASIC bus-cycle counter at each timer interrupt. The latched
counter is needed to accurately interpolate the bus-cycle counter value
as a high-resolution clock.
|
| 1.13 | 25-Apr-1995 |
mellon | Fix a few compat code casualties
|
| 1.12 | 25-Apr-1995 |
mellon | Fix up args to scdebug_{call,ret}
|
| 1.11 | 22-Apr-1995 |
christos | - added sunos_machdep.c for sun3, atari, amiga and mac68k.
- changed machdep.c and trap.c to use struct emul.
- remove ep_setup references.
- added struct emul to all emulations.
|
| 1.10 | 26-Mar-1995 |
cgd | invoke ktrsyscall with (vp, code, argsize, args) as args.
|
| 1.9 | 18-Jan-1995 |
mellon | Ultrix pcb_regs compatibility, reorder interrupt handlers (probably futile), use new callv naming
|
| 1.8 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.7 | 20-Oct-1994 |
cgd | update for new syscall args description mechanism
|
| 1.6 | 15-Jun-1994 |
glass | much works but untested w/new fs. expect more tomorrow
|
| 1.5 | 02-Jun-1994 |
glass | fix a few integration bugs, add vmfault debugging, more ultrix stuff
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 16-Jan-1994 |
deraadt | use SYS_syscall instead of SYS_indir
and turn off the 64 bit syscall interface
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.37.2.3 | 19-Sep-1996 |
thorpej | Pull up changes between revs 1.40 and 1.41 (a critical bug fix) by
request from Jonathan Stone. Log message:
>revision 1.41
>date: 1996/09/18 11:16:20; author: jonathan; state: Exp; lines: +11 -14
>Fix for problem report port-pmax/2173: the local variable "inst"
>in the branch-emulation code was uninitialized, due to a misplaced #endif.
>
>Remove the relevant #ifdef (macro version of GetBranchDest), and move the
>XXX note about r4000 branch targets to the function definition.
|
| 1.37.2.2 | 09-Sep-1996 |
thorpej | Pullup diffs between revs 1.38 and 1.39, by request from Jonathan Stone.
Log message:
revision 1.39
date: 1996/08/09 05:11:02; author: mhitch; state: Exp; lines: +3 -1
Add missing #include of "ppp.h" to get definition of NPPP so that the
pppintr() call is actually included. This fixes ppp so that it actually
works again.
|
| 1.37.2.1 | 17-Jun-1996 |
jonathan | Move cpu_singlestep outside of #ifdef DEBUG/#endif; the process-tracing code
in mips/mips/process_machdep.c (erroneous) calls cpu_singlestep().
|
| 1.50.6.1 | 10-Mar-1997 |
is | netinet/if_ether.h => netinet/if_inarp.h
|
| 1.74.2.1 | 23-Aug-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.78.2.2 | 24-Feb-1998 |
mellon | Pull up 1.80 (wrstuden)
|
| 1.78.2.1 | 15-Nov-1997 |
mellon | Pull rev 1.79 up from trunk (veego)
|
| 1.93.2.6 | 20-Nov-1998 |
drochner | fix egcs warning
|
| 1.93.2.5 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.93.2.4 | 15-Nov-1998 |
drochner | sync to trunk (page modified bit handling, needed for UVM)
|
| 1.93.2.3 | 14-Nov-1998 |
drochner | fix egcs warnings
kdbpeek() prototype cleanup, ala PR port-mips/5252
|
| 1.93.2.2 | 30-Oct-1998 |
nisimura | - Make pm.c monochrome-aware and compilable with UVM.
- Make trap.c compilable with UVM.
- Place #ifdef _KERNEL guard in cpu.h
- Make asm.h more MIPS standard-alike while retaining current definitions.
|
| 1.93.2.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.107.6.2 | 30-Nov-1999 |
itojun | bring in latest KAME (as of 19991130, KAME/NetBSD141) into kame branch
just for reference purposes.
This commit includes 1.4 -> 1.4.1 sync for kame branch.
The branch does not compile at all (due to the lack of ALTQ and some other
source code). Please do not try to modify the branch, this is just for
referenre purposes.
synchronization to latest KAME will take place on HEAD branch soon.
|
| 1.107.6.1 | 28-Jun-1999 |
itojun | KAME/NetBSD 1.4 SNAP kit, dated 19990628.
NOTE: this branch (kame) is used just for refernce. this may not compile
due to multiple reasons.
|
| 1.107.4.2 | 01-Jul-1999 |
thorpej | Sync w/ -current.
|
| 1.107.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.113.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.113.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.113.2.5 | 27-Mar-2001 |
bouyer | Sync with HEAD.
|
| 1.113.2.4 | 18-Jan-2001 |
bouyer | Sync with head (for UBC+NFS fixes, mostly).
|
| 1.113.2.3 | 05-Jan-2001 |
bouyer | Sync with HEAD
|
| 1.113.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.113.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.132.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.160.2.2 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.160.2.1 | 09-Apr-2001 |
nathanw | Catch up with -current.
|
| 1.163.2.5 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.163.2.4 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.163.2.3 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.163.2.2 | 11-Feb-2002 |
jdolecek | Sync w/ -current.
|
| 1.163.2.1 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.164.2.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.165.2.23 | 07-Jan-2003 |
thorpej | In the SA universe, the switch-to-this-LWP decision is made at a
different level than where preempt() calls are made, which renders
the "newlwp" argument useless. Replace it with a "more work to do"
boolean argument. Returning to userspace preempt() calls pass 0.
"Voluntary" preemptions in e.g. uiomove() pass 1. This will be used
to indicate to the SA subsystem that the LWP is not yet finished in
the kernel.
Collapse the SA vs. non-SA cases of preempt() together, making the
conditional code block much smaller, and don't call sa_preempt() if
more work is to come.
NOTE: THIS IS NOT A COMPLETE FIX TO THE preempt()-in-uiomove() PROBLEM
THAT CURRENTLY EXISTS FOR SA PROCESSES.
|
| 1.165.2.22 | 02-Dec-2002 |
wdk | Tidy up for Scheduler Activations:
- Change curproc -> curlwp
- Display LWP id along with PID for kernel generated messages
|
| 1.165.2.21 | 20-Nov-2002 |
wdk | cpu_switch() defined by MI headrs now.
|
| 1.165.2.20 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.165.2.19 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.165.2.18 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.165.2.17 | 02-Aug-2002 |
gmcgarry | LWPify.
|
| 1.165.2.16 | 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.165.2.15 | 12-Jul-2002 |
nathanw | No longer need to pull in lwp.h; proc.h pulls it in for us.
|
| 1.165.2.14 | 06-Jul-2002 |
simonb | Fix playstation2 case (by inspection, not tested): s/p->p_md/l->l_md/.
|
| 1.165.2.13 | 06-Jul-2002 |
simonb | Fix #ifdef SOFTFLOAT code:
s/p->p_addr/l->l_addr/ and s/p->p_md/l->l_md/
|
| 1.165.2.12 | 02-Jul-2002 |
nathanw | Whitespace and a unnecessary curlwp use.
|
| 1.165.2.11 | 02-Jul-2002 |
gmcgarry | Make this compile without KTRACE.
|
| 1.165.2.10 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.165.2.9 | 21-Jun-2002 |
gmcgarry | Pull-in headers; update cpu_switch() prototype
|
| 1.165.2.8 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.165.2.7 | 28-Feb-2002 |
nathanw | Catch up to -current.
|
| 1.165.2.6 | 11-Feb-2002 |
gmcgarry | Fix typo in previous.
|
| 1.165.2.5 | 10-Feb-2002 |
gmcgarry | stacktrace_subr() can be invoked from ddb before main() is called.
In this case curproc->l_proc is undefined. Kludge around it by
checking for both curproc != NULL and curproc->l_proc != NULL.
|
| 1.165.2.4 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.165.2.3 | 18-Nov-2001 |
wdk | In trap handler avoid null pointer de-reference when curproc is NULL
|
| 1.165.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.165.2.1 | 14-Nov-2001 |
wdk | file trap.c was added on branch nathanw_sa on 2001-11-17 23:43:44 +0000
|
| 1.169.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.169.4.1 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.175.2.1 | 18-Dec-2002 |
gmcgarry | Merge pcred and ucred, and poolify. TBD: check backward compatibility
and factor-out some higher-level functionality.
|
| 1.180.2.6 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.180.2.5 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.180.2.4 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.180.2.3 | 03-Sep-2004 |
skrll | Sync with HEAD
|
| 1.180.2.2 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.180.2.1 | 02-Jul-2003 |
darrenr | Apply the aborted ktrace-lwp changes to a specific branch. This is just for
others to review, I'm concerned that patch fuziness may have resulted in some
errant code being generated but I'll look at that later by comparing the diff
from the base to the branch with the file I attempt to apply to it. This will,
at the very least, put the changes in a better context for others to review
them and attempt to tinker with removing passing of 'struct lwp' through
the kernel.
|
| 1.196.2.6 | 07-Dec-2007 |
yamt | sync with head
|
| 1.196.2.5 | 27-Oct-2007 |
yamt | sync with head.
|
| 1.196.2.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.196.2.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.196.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.196.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.198.10.3 | 11-May-2006 |
elad | sync with head
|
| 1.198.10.2 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.198.10.1 | 08-Mar-2006 |
elad | Adapt to kernel authorization KPI.
I expect *some* lossage here...
|
| 1.198.8.4 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.198.8.3 | 11-Aug-2006 |
yamt | sync with head
|
| 1.198.8.2 | 24-May-2006 |
yamt | sync with head.
|
| 1.198.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.198.6.2 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.198.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.198.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.199.2.2 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.199.2.1 | 28-Mar-2006 |
tron | Merge 2006-03-28 NetBSD-current into the "peter-altq" branch.
|
| 1.206.8.1 | 03-Sep-2007 |
wrstuden | Sync w/ NetBSD-4-RC_1
|
| 1.206.6.1 | 11-Jun-2007 |
liamjfoy | Pull up following revision(s) (requested by tsutsui in ticket #715):
sys/arch/mips/mips/trap.c: revision 1.212
sys/arch/sbmips/conf/GENERIC: revision 1.60
sys/arch/mips/conf/Makefile.mips: revision 1.46
Preserve local symbols on linking a kernel so that
we can get more useful trace on ddb(4).
Bump SYMTAB_SPACE so that it fits again.
Use the kernel symbol table to see the beginning of the current
subroutine to get more proper backtrace on ddb(4).
In the previous code it scans backwards from the current PC
for the end of the previous subroutine and checks "jr ra" or
"jr k0" instructions, but it often fails because gcc is
so aggressive nowadays as to reorder instruction blocks
to create efficient code path by branch predict etc. and
"jr ra" is not always located at the end of subroutines.
No objection on port-mips.
|
| 1.206.2.3 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.206.2.2 | 11-Jan-2007 |
ad | Checkpoint work in progress.
|
| 1.206.2.1 | 29-Dec-2006 |
ad | Checkpoint work in progress.
|
| 1.207.2.3 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.207.2.2 | 21-Mar-2007 |
ad | Initial changes for MIPS. Not yet working under gxemul.
|
| 1.207.2.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.209.10.3 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.209.10.2 | 26-Jun-2007 |
garbled | Sync with HEAD.
|
| 1.209.10.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.209.4.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.209.2.5 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.209.2.4 | 20-Aug-2007 |
ad | Sync with HEAD.
|
| 1.209.2.3 | 15-Jul-2007 |
ad | Get pmax working.
|
| 1.209.2.2 | 09-Jun-2007 |
ad | Sync with head.
|
| 1.209.2.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.212.8.3 | 09-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.212.8.2 | 28-Oct-2007 |
joerg | Sync with HEAD.
|
| 1.212.8.1 | 16-Aug-2007 |
jmcneill | Sync with HEAD.
|
| 1.212.4.1 | 03-Sep-2007 |
skrll | Sync with HEAD.
|
| 1.213.6.1 | 13-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.213.2.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.213.2.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.215.2.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.216.24.1 | 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.216.20.3 | 30-Jun-2008 |
wrstuden | Change how we make SA threads not generate upcalls. Instead of clearing
LW_SA, use a private flag, LP_SA_NOBLOCK, that we set when we want
to not generate upcalls. This means we do NOT need to lock (l)
(ourselves) to set it.
Adjust tests that look at LW_SA. Now, we are an upcall-generating
lwp if ((l->l_flag & LW_SA) && (~l->l_pflag & LP_SA_NOBLOCK)).
Introduce code pattern to set & remember this:
f = ~l->l_pflag & LP_SA_NOBLOCK;
l->l_pflag |= LP_SA_NOBLOCK;
...
/* f is now LP_SA_NOBLOCK if it wasn't set in l_pflag before */
l->l_pflag ^= f;
I updated a lot of the trap handlers to do trap handling iff LP_SA_NOBLOCK
is not set. I tried to figure out if the trap handler could be triggered
for user-based faults as opposed to kernel faults to user addresses, and
only look at LP_SA_NOBLOCK for the latter.
Above is a result of discussions with rmind at to reduce lock twiddling.
Also, per same discussions, add locking to sys_sa_preempt(). p_lock is
the lock we want.
Also, per same discussions, remove use of LSSUSPENDED as a thread state.
We needed to use it when we were emulating the 4.X and previous behavior
of hiding cached threads. For the moment, we now have them instead
remain visible to all and have them sleeping on the "lwpcache" wait
channel.
sa_newcachelwp(): sa_putcachelwp() wants savp_mutex held, not p_lock.
Tweak some comments.
|
| 1.216.20.2 | 22-Jun-2008 |
wrstuden | Re-add cpu_upcall() and page fault code. i386 kernels now compile.
They don't boot, but that seems to be a consequence of current from the
day this branch was started.
|
| 1.216.20.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.216.18.4 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.216.18.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.216.18.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.216.18.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.216.14.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.217.12.46 | 08-Aug-2012 |
matt | Fix some LP64 bugs
|
| 1.217.12.45 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.217.12.44 | 09-Jul-2012 |
matt | It's mips_cpu_switchto now.
|
| 1.217.12.43 | 27-Feb-2012 |
matt | Count all traps types.
|
| 1.217.12.42 | 13-Feb-2012 |
matt | Fix emulation to not panic when it encounters something it doesn't like.
(so running crashme won't crash the system).
Centralize the trapsignal processing so we can print out the trap info if
so desired.
Add a machdep.printfataltraps sysctl knob.
|
| 1.217.12.41 | 09-Feb-2012 |
matt | When printing a stack trace, use <sym>+0x# so you can c&p easily into gdb.
|
| 1.217.12.40 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.217.12.39 | 23-Dec-2011 |
matt | Cleanup AST processing.
|
| 1.217.12.38 | 23-Dec-2011 |
matt | print current asid on a trap.
|
| 1.217.12.37 | 28-May-2011 |
cliff | add cpu number to fault print
|
| 1.217.12.36 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.217.12.35 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.217.12.34 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for MULTIPROCESSOR dependency
- in trap at dopanic:, use snprintf to allow a single, idempotent, readable
printf; needed for MP, but harmless for UP so not ifdef'ed.
- add case for case T_WATCH (not USER), handled same as T_BREAK
i.e. entry to ddb if configured
|
| 1.217.12.33 | 26-Jan-2011 |
matt | Fix a preemption bug.
|
| 1.217.12.32 | 29-Dec-2010 |
matt | Move away from StudlyCaps.
Change opc to pc since opc might be confused with opcode.
|
| 1.217.12.31 | 22-Dec-2010 |
matt | Add a check to more the ASID is valid on a user fault.
|
| 1.217.12.30 | 16-Aug-2010 |
matt | fix a typo and add a few missing ifdefs.
Only worry about setting seg0tab if the faulting va would use it.
|
| 1.217.12.29 | 16-Aug-2010 |
matt | Only set seg0tab if the va would be in seg0 tab.
|
| 1.217.12.28 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.217.12.27 | 10-Jun-2010 |
cliff | - in trap(), if traptype is bus error, call chip-specific bus error
handler in locoresw: (*mips_locoresw.lsw_bus_error)(cause)
|
| 1.217.12.26 | 06-May-2010 |
matt | Don't grab error pc from trapframe when it was passed as an argument.
|
| 1.217.12.25 | 06-May-2010 |
matt | user_gen_expection doesn't pass a trapframe to trap but if it did it would
be utf so we can just assign it and move on.
|
| 1.217.12.24 | 30-Apr-2010 |
matt | add some missing kpreempt calls. Fix an assert.
|
| 1.217.12.23 | 30-Apr-2010 |
matt | Report alignment faults as SIGBUS, not SIGSEGV.
|
| 1.217.12.22 | 11-Mar-2010 |
matt | Add MP-aware icache support.
|
| 1.217.12.21 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.217.12.20 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.217.12.19 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.217.12.18 | 01-Feb-2010 |
matt | Allow port-specific code to init lwp0.l_addr early. (pmax needs it so it
call badaddr).
|
| 1.217.12.17 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.217.12.16 | 29-Jan-2010 |
matt | Change mips kernel options SOFTFLOAT to FPEMUL. Allow a kernel to have
no FP emulation code. Fix insufficient SYMTAB_SPACE. When a kernel without
an FPU and with FPEMUL code, the application will trap with a SIGILL/ILL_ILLOPC
signal, not SIGSEGV/SEGV_MAPERR.
|
| 1.217.12.15 | 22-Jan-2010 |
matt | Seperate the pmap TLB functions into their own file.
For 32 bit kernels, make sure that mips_virtual_end doesn't go past
VM_MAX_KERNEL_ADDRESS.
|
| 1.217.12.14 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.217.12.13 | 08-Jan-2010 |
matt | In stacktrace_subr, use proper formats.
|
| 1.217.12.12 | 30-Dec-2009 |
matt | Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.
|
| 1.217.12.11 | 14-Nov-2009 |
matt | Switch from fu*/su* to ufetch_*/ustore_*. This make netbsd32 compat root
on a LP64 BE kernel.
|
| 1.217.12.10 | 09-Nov-2009 |
cliff | - #if DDB call Debugger() before panic("trapsignal") for non-user trap
|
| 1.217.12.9 | 07-Sep-2009 |
matt | Cleanup fatal trap printfs
|
| 1.217.12.8 | 03-Sep-2009 |
matt | If DEBUG, if a lwp gets a fatal signal, print signo, cause, pc, va and
a register dump.
|
| 1.217.12.7 | 02-Sep-2009 |
matt | cleanup trapsignal printf
|
| 1.217.12.6 | 30-Aug-2009 |
matt | When compiled DEBUG, print out fatal userland traps.
|
| 1.217.12.5 | 24-Aug-2009 |
uebayasi | Don't use an obscure macro (DELAYBRANCH(x)) to check if the BD field (bit
31) is set in Cause Register.
|
| 1.217.12.4 | 23-Aug-2009 |
uebayasi | Make ddb(4) trace work on 64-bit ABIs.
For now:
- Values are shown in 32-bit.
- Only 4 arguments are shown.
- DDB_TRACE (heuristic version) is left as is.
Reviewed By: matt
|
| 1.217.12.3 | 23-Aug-2009 |
matt | Deal with fp save/restore changes. Remove some more unneeded casts in trap.
|
| 1.217.12.2 | 21-Aug-2009 |
matt | Use PRIxVADDR
Stop casting l_md.md_regs
Cleanup code.
curlwp is never NULL anymore.
|
| 1.217.12.1 | 20-Aug-2009 |
uebayasi | Cast register_t to intptr_t before casting to (void *) because
sizeof(register_t) == 64 and sizeof(void *) == 32 in N32 ABI.
|
| 1.221.4.4 | 31-May-2011 |
rmind | sync with head
|
| 1.221.4.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.221.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.221.4.1 | 30-May-2010 |
rmind | sync with head
|
| 1.221.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.224.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.225.2.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.225.2.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.233.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.233.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.234.2.1 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.235.4.1 | 18-May-2014 |
rmind | sync with head
|
| 1.235.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.235.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.236.6.4 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.236.6.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.236.6.2 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.236.6.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.244.2.2 | 14-Jul-2017 |
christos | 2564730
|
| 1.244.2.1 | 14-Jul-2017 |
christos | file trap.c was added on branch perseant-stdc-iso10646 on 2017-07-14 20:32:33 +0000
|
| 1.246.4.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.246.4.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.246.4.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.249.4.1 | 05-Sep-2021 |
martin | Pull up following revision(s) (requested by tsutsui in ticket #1342):
sys/arch/mips/mips/trap.c: revision 1.250
sys/arch/mips/mips/trap.c: revision 1.251
Add missing newline to a diagnostic printf.
Comment out the diagnostic message in the TLB_MOD handler that's logged if
pmap_tlb_update_addr() indicates that the VA+ASID was not found in the TLB.
It's a harmless race condition that can happen for legitimate reasons (e.g.
a TLB miss in an interrupt handler that evicts the entry from the TLB).
See discussion:
http://mail-index.netbsd.org/port-mips/2020/03/07/msg000927.html
|
| 1.251.2.1 | 20-Apr-2020 |
bouyer | Sync with HEAD
|
| 1.256.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.259.2.2 | 17-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.259.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.166 | 25-Feb-2023 |
skrll | Convert some assignments into KASSERTs.
l_md is zeroised by lwp_create with
memset(&l2->l_startzero, 0, sizeof(*l2) -
offsetof(lwp_t, l_startzero));
|
| 1.165 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.164 | 19-Oct-2021 |
rin | Revert previous:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/mips/mips/vm_machdep.c#rev1.163
> cpu_uarea_alloc: For ILP32, do not try to allocate physical memory above
> pmap_limits.avail_end.
>
> Fix NULL dereference in uvm_pglistalloc_contig_aggressive().
"high" argument larger than pmap_limits.avail_end is just legal for
uvm_pglistalloc(); uvm_pglistalloc_contig_aggressive() and friends
allocate memory between uvm_physseg_get_avail_start() and
uvm_physseg_get_avail_end().
It turned out that the NULL dereference took place as PHYS_TO_VM_PAGE()
aka uvm_phys_to_vm_page() returns NULL for a valid pa. I've not figured
out why...
Thanks chs@ for correcting my misunderstanding.
|
| 1.163 | 14-Oct-2021 |
rin | cpu_uarea_alloc: For ILP32, do not try to allocate physical memory above
pmap_limits.avail_end.
Fix NULL dereference in uvm_pglistalloc_contig_aggressive().
|
| 1.162 | 23-Aug-2020 |
simonb | Use a 16kB USPACE (and larger kernel stack) for LP64 kernels. Invert
the logic for setting the USPACE size. Define a desired USPACE size
(16kB for LP64, 8kB otherwise) then divide by PAGE_SIZE to get UPAGES.
Fixes random segmap lossage, since the uarea usually sits immediately
above the segmap for a process. Thanks to mrg@, skrll@ and dholland@
for testing, debugging and general help tracking down this problem.
|
| 1.161 | 09-Aug-2020 |
skrll | Add a comment
|
| 1.160 | 20-Nov-2019 |
pgoyette | Move all non-emulation-specific coredump code into the coredump module,
and remove all #ifdef COREDUMP conditional compilation. Now, the
coredump module is completely separated from the emulation modules, and
they can all be independently loaded and unloaded.
Welcome to 9.99.18 !
|
| 1.159 | 14-Jul-2017 |
christos | branches: 1.159.2; 1.159.6;
KASSERT Fires for MIPS1, disable.
|
| 1.158 | 11-May-2017 |
skrll | Fix non-DIAGNOSTIC build
|
| 1.157 | 10-May-2017 |
skrll | Add a KASSERT
|
| 1.156 | 10-May-2017 |
skrll | Make cpu_uarea_{alloc,free} conditional on PMAP_{,UN}MAP_POOLPAGE and
use PMAP_{,UN}_POOLPAGE to ensure cache aliases are handled correctly
and for all the pages used.
|
| 1.155 | 10-May-2017 |
skrll | Allow cpu_uarea_alloc to return NULL for non-system LWPs in the non-_LP64
case. That way TLB mapped KVA can be found by uarea_poolpage_alloc.
|
| 1.154 | 10-May-2017 |
skrll | Improve comment wording.
|
| 1.153 | 09-Aug-2016 |
skrll | branches: 1.153.6;
Sign extended uarea va appropriately for mips_dcache_inv_range
|
| 1.152 | 09-Aug-2016 |
skrll | Initialise md_upte for the new lwp
KASSERT that we're always direct mapped when we expect to be
|
| 1.151 | 09-Aug-2016 |
skrll | Fixup the #if to reflect when we can have non-direct mappable USPACE
|
| 1.150 | 31-Jul-2016 |
skrll | Fix up uarea page mapping compile conditional - we only need code if
USPACE is > PAGE_SIZE.
|
| 1.149 | 30-Jul-2016 |
matt | For LP64 and N32 make sure KX is set in the trapframe as well.
|
| 1.148 | 30-Jul-2016 |
skrll | KASSERT for KX in __mips_n32 as well.
|
| 1.147 | 14-Jul-2016 |
skrll | branches: 1.147.2;
Trailing whitespace
|
| 1.146 | 11-Jul-2016 |
matt | Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.145 | 11-Jun-2015 |
matt | Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_start to get the
VA space it needs.
pmap_segtab.c is almost identical to uvm/pmap/pmap_segtab.c now. It won't
be long until we switch to the uvm/pmap one.
|
| 1.144 | 06-Jun-2015 |
matt | Convert a KASSERT to KASSERTMSG
|
| 1.143 | 23-Apr-2014 |
skrll | branches: 1.143.4;
Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering if
a cache invalidation is required.
Additionally flush the cache for the uarea va to avoid potential (future)
cache aliases in cpu_uarea_free when handing pages back to uvm for later
use.
ok matt@
Hopefully this addresses the instability reported in the following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46170 - NetBSD/cobalt 6.0_BETA does not boot
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
|
| 1.142 | 19-Feb-2012 |
rmind | branches: 1.142.2; 1.142.4; 1.142.12;
Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
|
| 1.141 | 27-Sep-2011 |
jym | branches: 1.141.2; 1.141.6; 1.141.8; 1.141.12; 1.141.14;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
| 1.140 | 01-Sep-2011 |
matt | Use UVM_KMF_COLORMATCH and switch to pmap_kenter_pa for vmapbuf/vunmapbuf.
|
| 1.139 | 06-Jun-2011 |
matt | Add some more MI hook points for PCU. Discard the PCU state at lwp_exit and
at exec time. Before forking, save the PCU state so that cpu_lwp_fork
doesn't have. Remove MD code which did that before.
|
| 1.138 | 02-May-2011 |
rmind | branches: 1.138.2;
Extend PCU:
- Add pcu_ops_t::pcu_state_release() operation for PCU_RELEASE case.
- Add pcu_switchpoint() to perform release operation on context switch.
- Sprinkle const, misc. Also, sync MIPS with changes.
Per discussions with matt@.
|
| 1.137 | 29-Apr-2011 |
matt | Deal with uarea mapped in either kseg0 or xkphys.
|
| 1.136 | 20-Feb-2011 |
matt | Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.135 | 10-Feb-2011 |
pooka | Make vmapbuf() return success/error and make physio deal with a
failure.
|
| 1.134 | 08-Feb-2011 |
rmind | Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.
Extra verification by snj@.
|
| 1.133 | 26-Jan-2011 |
pooka | Add support for the Extensible MIPS ("eMIPS") platform. The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.
eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing. eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.
NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman. Microsoft Corporation has
donated full copyright to The NetBSD Foundation.
Platform support for eMIPS is the first part of Microsoft's
contribution. The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.
|
| 1.132 | 14-Jan-2011 |
rmind | branches: 1.132.2; 1.132.4;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.
Various #include fixes and review by matt@.
|
| 1.131 | 22-Dec-2010 |
nisimura | - make sure cpu_switchto() not to touch MIPS_CURLWP register at newlwp
switchframe restoration stage.
- discard MIPS_CURLWP assignments exposed in cpu_lwp_fork() and
cpu_setfunc().
- use plain 'jal' instruction to call lwp_startup().
|
| 1.130 | 14-Dec-2009 |
matt | branches: 1.130.4;
Get rid of l_addr references pulled in via merge.
|
| 1.129 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.128 | 29-Nov-2009 |
rmind | cpu_lwp_fork (MIPS): replace l_addr with uvm_lwp_getuarea(), clean up a little.
|
| 1.127 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.126 | 21-Oct-2009 |
rmind | Remove uarea swap-out functionality:
- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.
Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).
Discussed on <tech-kern>, reviewed by <ad>.
|
| 1.125 | 20-Aug-2009 |
cliff | if USPACE <= PAGE_SIZE then the (single) upage will be mapped in kseg0 or xphys and cpu_swapin is null func.
|
| 1.124 | 17-Aug-2009 |
matt | Only include md_uptes if USPACE > PAGE_SIZE
|
| 1.123 | 30-May-2009 |
martin | Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.122 | 19-Nov-2008 |
ad | Make the emulations, exec formats, coredump, NFS, and the NFS server
into modules. By and large this commit:
- shuffles header files and ifdefs
- splits code out where necessary to be modular
- adds module glue for each of the components
- adds/replaces hooks for things that can be installed at runtime
|
| 1.121 | 15-Oct-2008 |
wrstuden | branches: 1.121.2; 1.121.4; 1.121.6;
Merge wrstuden-revivesa into HEAD.
|
| 1.120 | 17-Oct-2007 |
garbled | branches: 1.120.16; 1.120.20; 1.120.22; 1.120.26;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.119 | 17-Aug-2007 |
ad | branches: 1.119.2;
cpu_lwp_fork: don't rely on struct mdlwp being zeroed in advance.
|
| 1.118 | 18-Jul-2007 |
tsutsui | branches: 1.118.4;
Don't set PSL_LOWIPL to SR on switching to lwp_trampoline().
If interrupts are enabled when kernel is switched to lwp_trampoline(),
we could get lock errors by interrupts before lwp_unlock() in lwp_startup()
is called. The spl is lowered by spl0() in lwp_startup() after lwp_unlock().
Ok'ed by mhitch@ and ad@ on port-mips.
|
| 1.117 | 17-May-2007 |
yamt | branches: 1.117.2; 1.117.4;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.116 | 04-Mar-2007 |
tsutsui | branches: 1.116.2; 1.116.4; 1.116.10;
Use (char *) on pointer arith.
|
| 1.115 | 04-Mar-2007 |
christos | Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.114 | 28-Feb-2007 |
thorpej | TRUE -> true, FALSE -> false
|
| 1.113 | 09-Feb-2007 |
ad | branches: 1.113.2;
Merge newlock2 to head.
|
| 1.112 | 31-Aug-2006 |
matt | branches: 1.112.2;
Make cpu_coredump dependent on COREDUMP
|
| 1.111 | 26-Aug-2006 |
matt | Use vaddr_t for virtual addresses. Don't cast pointers with int or
unsigned, use intptr_t or uintptr_t as appropriate.
|
| 1.110 | 30-Mar-2006 |
chs | use uvm_km_alloc() instead of uvm_map().
|
| 1.109 | 11-Dec-2005 |
christos | branches: 1.109.4; 1.109.6; 1.109.8; 1.109.10; 1.109.12;
merge ktrace-lwp.
|
| 1.108 | 10-Jun-2005 |
matt | branches: 1.108.2;
Rework the coredump code to have no explicit knownledge of how coredump
i/o is done. Instead, pass an opaque cookie which is then passed to a
new routine, coredump_write, which does the actual i/o. This allows the
method of doing i/o to change without affecting any future MD code.
Also, make netbsd32_core.c [re]use core_netbsd.c (in a similar manner that
core_elf64.c uses core_elf32.c) and eliminate that code duplication.
cpu_coredump{,32} is now called twice, first with a NULL iocookie to fill
the core structure and a second to actually write md parts of the coredump.
All i/o is nolonger random access and is suitable for shipping over a stream.
|
| 1.107 | 01-Apr-2005 |
yamt | merge yamt-km branch.
- don't use managed mappings/backing objects for wired memory allocations.
save some resources like pv_entry. also fix (most of) PR/27030.
- simplify kernel memory management API.
- simplify pmap bootstrap of some ports.
- some related cleanups.
|
| 1.106 | 26-Mar-2005 |
tsutsui | Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.105 | 01-Jan-2005 |
simonb | branches: 1.105.2; 1.105.4; 1.105.8;
Use "NULL" instead of "(something-or-other *)0".
|
| 1.104 | 17-Sep-2004 |
skrll | There's no need to pass a proc value when using UIO_SYSSPACE with
vn_rdwr(9) and uiomove(9).
OK'd by Jason Thorpe
|
| 1.103 | 28-Aug-2004 |
thorpej | Garbage-collect pagemove(); nothing use it anymore (YAY!!!)
|
| 1.102 | 28-Feb-2004 |
simonb | Catch up with the November 2002 (!!) change to remove ABI exposure
from cpu_fork and the proc trampoline. pthreads programs that fork
now work (at least the regress test case does).
Program reported by Florian St�hr on port-sgimips.
|
| 1.101 | 28-Feb-2004 |
simonb | ANSIfy, wrap long lines.
|
| 1.100 | 04-Jan-2004 |
jdolecek | Rearrange process exit path to avoid need to free resources from different
process context ('reaper').
From within the exiting process context:
* deactivate pmap and free vmspace while we can still block
* introduce MD cpu_lwp_free() - this cleans all MD-specific context (such
as FPU state), and is the last potentially blocking operation;
all of cpu_wait(), and most of cpu_exit(), is now folded into cpu_lwp_free()
* process is now immediatelly marked as zombie and made available for pickup
by parent; the remaining last lwp continues the exit as fully detached
* MI (rather than MD) code bumps uvmexp.swtch, cpu_exit() is now same
for both 'process' and 'lwp' exit
uvm_lwp_exit() is modified to never block; the u-area memory is now
always just linked to the list of available u-areas. Introduce (blocking)
uvm_uarea_drain(), which is called to release the excessive u-area memory;
this is called by parent within wait4(), or by pagedaemon on memory shortage.
uvm_uarea_free() is now private function within uvm_glue.c.
MD process/lwp exit code now always calls lwp_exit2() immediatelly after
switching away from the exiting lwp.
g/c now unneeded routines and variables, including the reaper kernel thread
|
| 1.99 | 26-Nov-2003 |
he | Hide the register number constants behind an _R_ prefix, and also
rename FPBASE to _FPBASE, so that we avoid polluting the user's
name space when e.g. <sys/ptrace.h> is included. Previously, the
PC symbol in mips/regnum.h would conflict with the declaration of
the external variable by the same name in termcap.h, as discovered
by the ``okheaders'' regression test.
|
| 1.98 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.97 | 29-Jun-2003 |
fvdl | branches: 1.97.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.96 | 29-Jun-2003 |
simonb | Fix more needless 'struct proc *' to 'struct lwp *' fallout.
|
| 1.95 | 02-Apr-2003 |
thorpej | Use PAGE_SIZE rather than NBPG.
|
| 1.94 | 22-Jan-2003 |
simonb | Assign to pcb->pcb_context[] in the same order in cpu_lwp_fork() and
cpu_setfunc().
|
| 1.93 | 17-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.92 | 12-Nov-2002 |
nisimura | Remove o32 stack layout exposure form cpu_fork().
Tested on R4000 and R3000.
|
| 1.91 | 10-Nov-2002 |
nisimura | Change pmap_kenter_pa/pmap_kremove pair back to pmap_enter/pmap_remove
in fear of the case choosen kva results in occupying inconsistent
distinctive cache lines of uva.
|
| 1.90 | 10-Nov-2002 |
nisimura | Use pmap_enter_pa and pmap_kremove for vmapbuf/vunmapbuf, respectively.
Have variable names renamed for the logic clarity.
|
| 1.89 | 09-Nov-2002 |
thorpej | Fix signed/unsigned comparison warnings.
|
| 1.88 | 05-Mar-2002 |
simonb | Add support for MIPS32 and MIPS64 architectures:
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
- ANSIfy.
|
| 1.87 | 04-Mar-2002 |
simonb | Don't need to declare phys_map - it is declared in <uvm/uvm_extern.h>.
|
| 1.86 | 28-Nov-2001 |
nisimura | Fix a small typo in comment.
|
| 1.85 | 14-Nov-2001 |
thorpej | branches: 1.85.2;
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
|
| 1.84 | 16-Oct-2001 |
uch | branches: 1.84.2;
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
|
| 1.83 | 10-Sep-2001 |
chris | Update pmap_update to now take the updated pmap as an argument.
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.
Currently this is a no-op on most platforms, so they should see no difference.
Reviewed by Jason.
|
| 1.82 | 19-Aug-2001 |
chs | branches: 1.82.2;
add missing pmap_update().
|
| 1.81 | 04-Aug-2001 |
chs | in vunmapbuf(), call pmap_remove() explicitly since uvm_km_free_wakeup()
will soon no longer do it for us.
|
| 1.80 | 02-Jun-2001 |
chs | branches: 1.80.2;
replace vm_map{,_entry}_t with struct vm_map{,_entry} *.
|
| 1.79 | 31-May-2001 |
soda | "opt_ddb.h" should be included at the beginning of source file,
because some headers (in this case <systm.h>) refers symbols (e.g. DDB)
defined in the opt_ddb.h
|
| 1.78 | 15-May-2001 |
nisimura | Rather better to have |= to make sure spl0 condition, allowing to preserve
processor model specific SR bit pattern on pcb0 initialization.
|
| 1.77 | 11-May-2001 |
thorpej | Set SR to PSL_LOWIPL rather than MIPS_INT_MASK | MIPS_SR_INT_IE,
as the former accounts for some mips3-related options.
From Rafal K. Boni.
|
| 1.76 | 08-May-2001 |
nisimura | Add comment to tell what cpu_fork() does around at its bottom.
What's wrong; the initial SR value in pcb0 gets overwritten before
the first kthread_create1() is called. For a normal process which
has user mode it doesn't matter because proc_trampoline() makes
the process to have spl0 during exception return path to user mode,
however, kthreads stay in kernel mode mistakenly left in splhigh
condition. The trouble is visible as severe clock drifts when
system activity is high.
|
| 1.75 | 08-May-2001 |
nisimura | Make sure to have spl0 condition whenever a new thread of control
is created. System kthreads are mistakenly left splhigh state.
pcb0 has an initial SR value for spl0 condition which are expected to
be propagated to all of children
|
| 1.74 | 24-Apr-2001 |
thorpej | Sprinkle pmap_update() calls after calls to:
- pmap_enter()
- pmap_remove()
- pmap_protect()
- pmap_kenter_pa()
- pmap_kremove()
as described in pmap(9).
These calls are relatively conservative. It may be possible to
optimize these a little more.
|
| 1.73 | 28-Mar-2001 |
drochner | include "opt_ddb.h" explicitely
|
| 1.72 | 31-Oct-2000 |
jeffs | branches: 1.72.2;
Add mips_indexof() macro to make code for checking the cache index
easier to read.
|
| 1.71 | 13-Sep-2000 |
nisimura | Introduce 'segbase' global variable to hold the pointer to current
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
|
| 1.70 | 01-Aug-2000 |
jeffs | Fix vmapbuf() to call uvm_km_valloc_perfer_wait() call, but trunc_page()
to the prefer arg so we free the correct page.
|
| 1.69 | 26-Jul-2000 |
jeffs | Back-out vmapbuf() change for now as locally it has been found to sleep
in some circumstances that don't sleep when not using pmap_prefer().
|
| 1.68 | 24-Jul-2000 |
jeffs | Use new uvm_km_valloc_prefer_wait() in vmapbuf(). This lets the K2
mapping of b_data have the same virtual index, so the mapping does
not degenerate into uncached in pmap_enter().
|
| 1.67 | 29-Jun-2000 |
mrg | remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>
|
| 1.66 | 26-Jun-2000 |
mrg | remove/move more mach vm header files:
<vm/pglist.h> -> <uvm/uvm_pglist.h>
<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
<vm/vm_object.h> -> nothing
<vm/vm_pager.h> -> into <uvm/uvm_pager.h>
also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.
|
| 1.65 | 15-Jun-2000 |
shin | branches: 1.65.2;
backout previous change.
cache operation in cpu_fork() is necessary for CPU's which
detect virtual alias by hardware (ex. R4000 with secondary cache).
|
| 1.64 | 14-Jun-2000 |
soren | Remove unnecessary HitFlushCache from cpu_fork(). From Toru Nishimura.
|
| 1.63 | 09-Jun-2000 |
soda | rename
vad_to_pfn() -> mips_paddr_to_tlbpfn()
pfn_to_vad() -> mips_tlbpfn_to_paddr()
as suggested by thorpej on port-mips Mar 27.
|
| 1.62 | 30-May-2000 |
nisimura | Add a missing closing parenthesis.
|
| 1.61 | 30-May-2000 |
nisimura | FPA ownership is now guarded by MDP_FPUSED flag and there is no necessity
to have #if ... around savefpregs() calls.
|
| 1.60 | 29-May-2000 |
nisimura | Put addtional checks to see the curproc is an FPA owner process.
|
| 1.59 | 28-May-2000 |
thorpej | Rather than starting init and creating kthreads by forking and then
doing a cpu_set_kpc(), just pass the entry point and argument all
the way down the fork path starting with fork1(). In order to
avoid special-casing the normal fork in every cpu_fork(), MI code
passes down child_return() and the child process pointer explicitly.
This fixes a race condition on multiprocessor systems; a CPU could
grab the newly created processes (which has been placed on a run queue)
before cpu_set_kpc() would be performed.
|
| 1.58 | 24-May-2000 |
soren | branches: 1.58.2;
Appease gcc.
|
| 1.57 | 10-May-2000 |
nisimura | Take a straight way for pagemove() PTE manipulation, abandoning to
use MIPS_TBRPL(). When PTEs are modified, both src and dst TLBs
are invalidated. MIPS3 single TLB entry has paired double PTE
and pagemove() likely walks through multiple pages. The positive
effect of of MachTLBUpdate() or TBRPL() is unclear.
|
| 1.56 | 16-Apr-2000 |
nisimura | Fix a typo in the previous change.
|
| 1.55 | 16-Apr-2000 |
nisimura | Change the way to implement zero copy data move in pagemove() using
MIPS_TBRPL(). It saves about 20 instructions to run for each
iteration, and avoids TLB polution. Currently works for MIPS1 only
configuration.
|
| 1.54 | 12-Apr-2000 |
nisimura | - Move a loop invariant of 'if (CPUISMIPS3)' out of pagemove().
- XXX I'm not sure whether the anticipatory MachTLBUpdate(to, pte) is
a gain or loss on runtime. If not a loss, it should be MIPS_TBIS().
|
| 1.53 | 12-Apr-2000 |
nisimura | - Implement mips3_TBIAP().
- Remove obsoluted routines in locore_mips3.S
- addiu -> addu, andi -> and, ori -> or.
|
| 1.52 | 28-Mar-2000 |
simonb | Move fpcurproc declaration to <mips/cpu.h>.
|
| 1.51 | 28-Mar-2000 |
simonb | Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
|
| 1.50 | 26-Mar-2000 |
kleink | Merge parts of chs-ubc2 into the trunk:
* Remove the casts to vaddr_t from the round_page() and trunc_page() macros to
make them type-generic, which is necessary i.e. to operate on file offsets
without truncating them.
* In due course, cast pointer arguments to these macros to an appropriate
integral type (paddr_t, vaddr_t).
Originally done by Chuck Silvers, updated by myself.
|
| 1.49 | 19-Mar-2000 |
soren | Updated RM5231 cache code from Jeff Smith and Ethan Solomita at Geocast.
Many thanks.
|
| 1.48 | 14-Mar-2000 |
soren | Actually use KSEG1 offset for KSEG1 addresses in kvtophys().
From Jeff Smith and Ethan Solomita at Geocast.
|
| 1.47 | 20-Jan-2000 |
sommerfeld | Fix PR9240: comment above cpu_fork() out of synch with reality on most ports.
(comment change only, but was wrong for more than just i386).
|
| 1.46 | 09-Jan-2000 |
shin | split 'options SOFTFLOAT' to
NOFP don't touch FPU registers in kernel
SOFTFLOAT emulate FPU instructions in kernel
|
| 1.45 | 04-Dec-1999 |
ragge | CL* discarding.
|
| 1.44 | 18-Nov-1999 |
jun | on port-mips@netbsd.org:
Shuichiro URATA <ur@a-r.org> makes kernel softfloat emulation code.
http://www.a-r.org/~ur/softfloat1116.diff.gz
is Patch for
sys/arch/mips/conf/files.mips
sys/arch/mips/mips/fp.S
sys/arch/mips/mips/fpemu.c
sys/arch/mips/mips/genassym.cf
sys/arch/mips/mips/locore.S
sys/arch/mips/mips/mips_machdep.c
sys/arch/mips/mips/process_machdep.c
sys/arch/mips/mips/trap.c
sys/arch/mips/mips/vm_machdep.c
After apply this patch,pmax package binary works on hpcmips!
|
| 1.43 | 13-Nov-1999 |
thorpej | Update for pmap_enter() API change. No functional difference.
|
| 1.42 | 08-Jul-1999 |
thorpej | branches: 1.42.2; 1.42.4; 1.42.8;
Change the pmap_extract() interface to:
boolean_t pmap_extract(pmap_t, vaddr_t, paddr_t *);
This makes it possible for the pmap to map physical address 0.
|
| 1.41 | 28-May-1999 |
thorpej | Clone vmapbuf() and vunmapbuf() from the Alpha port.
|
| 1.40 | 27-May-1999 |
nisimura | - Change a symbolic name of TLB entrylo from 'PG_M' to 'PG_D' to reflect
processor design. MIPS 'dirty bit' is not the same as i386 'dirty bit'.
There is a growing concern of misuse in NetBSD/mips.
|
| 1.39 | 26-May-1999 |
thorpej | Generally update the comment above vunmapbuf().
|
| 1.38 | 26-May-1999 |
thorpej | Generally update the comment above the vmapbuf() implementations.
|
| 1.37 | 14-May-1999 |
nisimura | - Adjust descriptive comment of cpu_fork() which returns nothing and
returns once.
- Minor fixes in mips/vm_machdep.c.
|
| 1.36 | 13-May-1999 |
thorpej | Allow the caller to specify a stack for the child process. If NULL,
the child inherits the stack pointer from the parent (traditional
behavior). Like the signal stack, the stack area is secified as
a low address and a size; machine-dependent code accounts for stack
direction.
This is required for clone(2).
|
| 1.35 | 24-Apr-1999 |
simonb | Nuke register and remove trailling white space.
|
| 1.34 | 24-Mar-1999 |
mrg | branches: 1.34.4;
completely remove Mach VM support. all that is left is the all the
header files as UVM still uses (most of) these.
|
| 1.33 | 15-Jan-1999 |
castor | * Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
|
| 1.32 | 06-Jan-1999 |
nisimura | - Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
|
| 1.31 | 03-Dec-1998 |
nisimura | - Use explicite structure member reference with 'struct frame' to alter
register values of exception frame pointed with p->p_md.md_regs.
- Local auto variable 'cpustate' in cpu_coredump() was never used correctly.
|
| 1.30 | 11-Nov-1998 |
thorpej | Changes to support fork_kthread():
- cpu_set_kpc() now takes void *arg third argument, passed to the
entry point.
- cpu_fork() allows parent to be non-curproc iff parent is proc0.
When forking non-curproc, assume its state has already been saved.
- Adjust various pieces of machine-dependent code to account of all of this.
|
| 1.29 | 09-Sep-1998 |
thorpej | branches: 1.29.2;
In cpu_coredump(), use MID_MACHINE rather than MID_* (whatever it expands
to).
|
| 1.28 | 09-Sep-1998 |
thorpej | Adjust for the new "reaper" kernel thread: do not free the vmspace and
u-area in machine-dependent code. Instead, call exit2() to schedule
the reaper to free them for us, once it is safe to do so (i.e. we are
no longer running on the dead proc's vmspace and stack).
|
| 1.27 | 02-Sep-1998 |
nisimura | - kernel boot flag 'd' now means "enter DDB asap" like as other ports.
- bump cpu_model[] length as the longest name occupies over 30 characters.
- place machine_arch[] beside machine[] for clearity.
- nuke useless #include directives.
- small scale cleanup in vm_machdep.c
|
| 1.26 | 28-Jul-1998 |
thorpej | Don't cast the null residual pointer passed to vn_rdwr().
|
| 1.25 | 12-Mar-1998 |
thorpej | Add support for UVM.
|
| 1.24 | 17-Oct-1997 |
jonathan | Add explicit #include <vm/vm.h> before mips/pte.h is included.
|
| 1.23 | 22-Jun-1997 |
jonathan | * Change Sprite MACH_xxx prefix to MIPS_xxx.
* Use standard mips terminology (xxx_KSEG0, xxx_KSEG1) instead of the
(more meaningful) Sprite names (xxx_CACHED, xxx_UNCACHED).
|
| 1.22 | 21-Jun-1997 |
mhitch | Merged mips1/mips3: cache alias test in pagemove().
|
| 1.21 | 19-Jun-1997 |
mhitch | Use same cachesize variables for mips1 and mips3, and rename the variables
per Jonathan's request.
Remove switch_exit() declaration - it's now called via the locore jump vector.
|
| 1.20 | 18-Jun-1997 |
jonathan | MachHitFlushDCache() -> mips3_HitFlushDCache() outside pmap.c.
|
| 1.19 | 16-Jun-1997 |
jonathan | Changes for configuring both MIPS1 and MIPS3, from a merge of
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
|
| 1.18 | 16-Jun-1997 |
jonathan | Garbage-collect redundant declarations:
mips/include/locore.h:
Add prototypes for HitFlushDCache() functions. Moe cpu_prid definition here.
mips/include/cpu.h:
remove cpu_prid definition.
pmax/pmax/machdep.c:
remove local protoypes of HitFlushDCache() functions.
mips/mips/vm_machdep.c, mips/mips/vm_machdep.c::
remove local protoypes of HitFlushDCache() functions.
|
| 1.17 | 16-Jun-1997 |
jonathan | Generic mips pmap/vm code: move the merged pmax mips1/mips3 vm_machdep
and pmap code to arch/mips/mips.
Use <mips/XXX.h> header files, not <machine/XXX.h>.
|
| 1.16 | 15-Jun-1997 |
mhitch | From Toru Nishimura: _FORKBRAINDAMAGE is gone, user process entered through
proc_trampoline().
More merged MIPS1/MIPS3 support.
|
| 1.15 | 25-May-1997 |
jonathan | lint: add prototype for kvtophys().
|
| 1.14 | 18-May-1997 |
mhitch | Eliminate vm_pmap.
|
| 1.13 | 13-Oct-1996 |
christos | backout previous kprintf change
|
| 1.12 | 11-Oct-1996 |
christos | printf -> kprintf, sprintf -> ksprintf
|
| 1.11 | 19-May-1996 |
jonathan | Add local declarations for locore functions. Fix pagemove() return
type to be void. Add explicit "int" return types.
Fix format/argument mismatches for vm_offset_t's in diagnostic messages.
|
| 1.10 | 19-May-1996 |
jonathan | Include <machine/locore.h>, to force all MIPS cpu-model specific
locore calls to go via a locore-entry jumptable.
Cast the (int) arguments to MachTLBUpdateEntry() to avoid
warnings. Variables TLB entries are still type-punned as either structs
or ints, without any regard, when the pmax-specific VM code passes
them as arguments to functions.
|
| 1.9 | 06-Feb-1996 |
jonathan | The prototyping `fixes' broke vmapbuf() and vunmapbuf(), due to a "sz"
parameter parameters shadowing locals. Replace vmapbuf() and vunmapbuf()
with the Alpha-port versions, which are cleaner (use round_page(),
trunc_page(), etc.)
|
| 1.8 | 05-Feb-1996 |
christos | vm prototype changes
|
| 1.7 | 25-Sep-1995 |
jonathan | Add "kvtophys()", which maps MIPS R2000 kernel-virtual addresses to physical addresses,
so they can (e.g.) be written to DMA mapping registers.
|
| 1.6 | 18-Jan-1995 |
mellon | Write out new-style core files
|
| 1.5 | 26-Oct-1994 |
cgd | new RCS ID format.
|
| 1.4 | 27-May-1994 |
glass | bsd 4.4-lite pmax port as ported to NetBSD
|
| 1.3 | 27-May-1994 |
glass | upgrade to bsd 4.4-lite code base. only mod is rcsids
|
| 1.2 | 16-Jan-1994 |
deraadt | cpu_exit returns void
|
| 1.1 | 12-Oct-1993 |
deraadt | branches: 1.1.1;
Initial revision
|
| 1.1.1.1 | 12-Oct-1993 |
deraadt | pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
|
| 1.29.2.3 | 16-Nov-1998 |
nisimura | - Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
|
| 1.29.2.2 | 14-Nov-1998 |
drochner | update for cpu_set_kpc() argument change
|
| 1.29.2.1 | 15-Oct-1998 |
nisimura | - Split MIPS1/MIPS3 specific codes from locore.S. They stand independently
as locore_mips1.S and locore_mips3.S respectively.
- Change function declaration macros in asm.h. They are now more NetBSD/alpha
look like. All of *.S files were changed.
- TLB dump codes now reside in db_interface.c. Minor change was done in
locore_mips1.S for it.
|
| 1.34.4.2 | 02-Aug-1999 |
thorpej | Update from trunk.
|
| 1.34.4.1 | 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.42.8.1 | 27-Dec-1999 |
wrstuden | Pull up to last week's -current.
|
| 1.42.4.1 | 15-Nov-1999 |
fvdl | Sync with -current
|
| 1.42.2.3 | 21-Apr-2001 |
bouyer | Sync with HEAD
|
| 1.42.2.2 | 22-Nov-2000 |
bouyer | Sync with HEAD.
|
| 1.42.2.1 | 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.58.2.1 | 22-Jun-2000 |
minoura | Sync w/ netbsd-1-5-base.
|
| 1.65.2.2 | 16-Aug-2001 |
tv | Pullup [shin]:
sys/arch/mips/mips/locore_mips3.S 1.70
sys/arch/mips/mips/vm_machdep.c 1.77-1.78
Fix bugs in handling of SR on mips3 machines, causing TLB miss panics.
|
| 1.65.2.1 | 15-May-2001 |
he | Pull up revisions 1.75-1.76 (via patch, requested by simonb):
Make sure new processes (and kernel threads) gets created in spl0
level.
|
| 1.72.2.2 | 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.72.2.1 | 09-Apr-2001 |
nathanw | Catch up with -current.
|
| 1.80.2.4 | 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.80.2.3 | 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.80.2.2 | 13-Sep-2001 |
thorpej | Update the kqueue branch to HEAD.
|
| 1.80.2.1 | 25-Aug-2001 |
thorpej | Merge Aug 24 -current into the kqueue branch.
|
| 1.82.2.1 | 01-Oct-2001 |
fvdl | Catch up with -current.
|
| 1.84.2.1 | 24-Oct-2001 |
thorpej | Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
|
| 1.85.2.10 | 03-Jan-2003 |
thorpej | Merge switch_exit() and switch_lwp_exit().
|
| 1.85.2.9 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.85.2.8 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.85.2.7 | 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.85.2.6 | 21-Jun-2002 |
gmcgarry | Pull in <sys/sa.h>
|
| 1.85.2.5 | 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.85.2.4 | 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.85.2.3 | 08-Dec-2001 |
thorpej | cpu_fork() -> cpu_lwp_fork(). This logically forks an LWP, not a
complete process. As noted by Gregory McGarry on tech-kern.
|
| 1.85.2.2 | 17-Nov-2001 |
wdk | Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
|
| 1.85.2.1 | 14-Nov-2001 |
wdk | file vm_machdep.c was added on branch nathanw_sa on 2001-11-17 23:43:45 +0000
|
| 1.97.2.8 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.97.2.7 | 01-Apr-2005 |
skrll | Sync with HEAD.
|
| 1.97.2.6 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.97.2.5 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.97.2.4 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.97.2.3 | 03-Sep-2004 |
skrll | Sync with HEAD
|
| 1.97.2.2 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.97.2.1 | 03-Jul-2003 |
wrstuden | LWP-ify to get algor/P4032 working.
|
| 1.105.8.1 | 21-Nov-2005 |
tron | Pull up following revision(s) (requested by tsutsui in ticket #961):
sys/arch/mips/mips/cache.c: revision 1.27
sys/arch/mips/include/cache.h: revision 1.8
sys/arch/mips/mips/pmap.c: revision 1.158
sys/arch/mips/mips/vm_machdep.c: revision 1.106
sys/arch/mips/mips/mem.c: revision 1.30
sys/arch/mips/include/pmap.h: revision 1.47
Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
|
| 1.105.4.3 | 26-Mar-2005 |
yamt | sync with head.
|
| 1.105.4.2 | 09-Mar-2005 |
yamt | vunmapbuf: unmap correct range.
|
| 1.105.4.1 | 31-Jan-2005 |
yamt | convert arch/mips to new apis.
|
| 1.105.2.1 | 29-Apr-2005 |
kent | sync with -current
|
| 1.108.2.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.108.2.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.108.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.108.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.109.12.1 | 31-Mar-2006 |
tron | Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.
|
| 1.109.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.109.8.2 | 03-Sep-2006 |
yamt | sync with head.
|
| 1.109.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.109.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.109.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.112.2.2 | 30-Jan-2007 |
ad | Remove support for SA. Ok core@.
|
| 1.112.2.1 | 27-Jan-2007 |
ad | Make mips systems work.
|
| 1.113.2.3 | 18-Apr-2007 |
ad | - Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
|
| 1.113.2.2 | 21-Mar-2007 |
ad | Initial changes for MIPS. Not yet working under gxemul.
|
| 1.113.2.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.116.10.2 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.116.10.1 | 22-May-2007 |
matt | Update to HEAD.
|
| 1.116.4.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.116.2.3 | 20-Aug-2007 |
ad | Sync with HEAD.
|
| 1.116.2.2 | 19-Aug-2007 |
ad | Pull up a change from HEAD: don't start new LWPs with interrupts enabled.
|
| 1.116.2.1 | 27-May-2007 |
ad | Sync with head.
|
| 1.117.4.2 | 03-Sep-2007 |
skrll | Sync with HEAD.
|
| 1.117.4.1 | 15-Aug-2007 |
skrll | Sync with HEAD.
|
| 1.117.2.1 | 07-Aug-2007 |
matt | Sync with HEAD.
|
| 1.118.4.1 | 03-Sep-2007 |
jmcneill | Sync with HEAD.
|
| 1.119.2.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.120.26.2 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.120.26.1 | 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.120.22.1 | 10-May-2008 |
wrstuden | Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
|
| 1.120.20.5 | 11-Mar-2010 |
yamt | sync with head
|
| 1.120.20.4 | 16-Sep-2009 |
yamt | sync with head
|
| 1.120.20.3 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.120.20.2 | 20-Jun-2009 |
yamt | sync with head
|
| 1.120.20.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.120.16.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.121.6.1 | 09-Jun-2009 |
snj | branches: 1.121.6.1.2;
Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.121.6.1.2.31 | 14-Feb-2014 |
matt | Change KASSERTMSG/KDASSERTMSG to use varadic arguments like HEAD.
panic -> vpanic, add panic wrapper to vpanic.
|
| 1.121.6.1.2.30 | 04-Aug-2012 |
matt | Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
|
| 1.121.6.1.2.29 | 16-Feb-2012 |
matt | mips_nfreelist is the one past the highest freelist used.
|
| 1.121.6.1.2.28 | 14-Feb-2012 |
matt | Fix various LP64 thinkos.
|
| 1.121.6.1.2.27 | 13-Feb-2012 |
matt | Add mm_md_direct_mapped_virt (inverse of mm_md_direct_mapped_phys). Add a
third argument, vsize_t *, which, if not NULL, returns the amount of virtual
space left in that direct mapped segment.
Get rid most of the individual direct_mapped assert and use the above
routines instead.
Improve kernel core dump code.
|
| 1.121.6.1.2.26 | 09-Feb-2012 |
matt | Recognize KSEGX as FIRST512M (even though it isn't in the 512M it is
conceptually part of it since it's direct-mapped).
|
| 1.121.6.1.2.25 | 09-Feb-2012 |
matt | Add mips_page_to_pggroup which return what pggroup a page belongs to.
Eradicate VM_FREELIST_MAX
When adding pages to the system, track what freelists get pages.
|
| 1.121.6.1.2.24 | 19-Jan-2012 |
matt | When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
|
| 1.121.6.1.2.23 | 01-Dec-2011 |
matt | Add code to deal with direct mapped uareas.
|
| 1.121.6.1.2.22 | 29-Nov-2011 |
matt | Take part of the KSEG2 space and use it to "almost" direct another 256MB
of memory so that N32 kernels can make use of ram outside of KSEG0. This
allows N32 kernels to be useful on systems with 4GB of RAM or more.
|
| 1.121.6.1.2.21 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.121.6.1.2.20 | 25-May-2011 |
matt | Make uvm_map recognize UVM_FLAG_COLORMATCH which tells uvm_map that the
'align' argument specifies the starting color of the KVA range to be returned.
When calling uvm_km_alloc with UVM_KMF_VAONLY, also specify the starting
color of the kva range returned (UMV_KMF_COLORMATCH) and pass those to
uvm_map.
In uvm_pglistalloc, make sure the pages being returned have sequentially
advancing colors (so they can be mapped in a contiguous address range).
Add a few missing UVM_FLAG_COLORMATCH flags to uvm_pagealloc calls.
Make the socket and pipe loan color-safe.
Make the mips pmap enforce strict page color (color(VA) == color(PA)).
|
| 1.121.6.1.2.19 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.121.6.1.2.18 | 29-Dec-2010 |
matt | Janitorial work.
Move emulation prototypes here and get rid of StudLyCaps.
Remove kludgery for lwp/setfunc trampoline and just grab them of the damn
structure.
Make mips_locore_jumpvec contain the routines that don't get reassigned
and move wbflush to mips_locoresw since it does get overridden.
|
| 1.121.6.1.2.17 | 22-Dec-2010 |
matt | Fix a panic message.
|
| 1.121.6.1.2.16 | 09-Jun-2010 |
matt | only copy PK_32, left rest of p_flag along.
|
| 1.121.6.1.2.15 | 09-Jun-2010 |
matt | Add support for setting/clearing PK_32 on _LP64 kernels. Make cpu_proc_fork
a real function and add it to vm_machdep.c and let it copy PK_32 on fork.
Properly clear/set PK_32 depending on ABI in setregs. Lack of PX_32 use
tracked down by Cliff Neighbors. [Ya! ps now works!]
|
| 1.121.6.1.2.14 | 01-Mar-2010 |
matt | Fix comment.
|
| 1.121.6.1.2.13 | 28-Feb-2010 |
matt | Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE. Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.
|
| 1.121.6.1.2.12 | 15-Feb-2010 |
matt | Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
|
| 1.121.6.1.2.11 | 05-Feb-2010 |
matt | remove a debugging printf. cleanup the reinit of the lwp.
|
| 1.121.6.1.2.10 | 05-Feb-2010 |
matt | Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address. This avoids
TLB machinations when swtching to/from the softint thread. This can only
be done for lwp which won't exit.
|
| 1.121.6.1.2.9 | 01-Feb-2010 |
matt | Merge frame into trapframe. While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it. This is
a step to fast softints and kernel preemption.
trapframe now includes a struct reg instead of a separate array of registers.
|
| 1.121.6.1.2.8 | 30-Jan-2010 |
matt | Change MIPS_CURLWP from s7 to t8. In a MALTA64 kernel, s6 is used 9155 times
which means the compiler could really use s7 is was free to do so. The least
used temporary was t8 (288 times). Once the kernel was switched to use t8 for
MIPS_CURLWP, s7 was used 7524 times.
Additionally a MALTA32 kernel shrunk by 6205 instructions (24820 bytes) or
about 1% of its text size.
[For some reason, pre-change t1 was never used and post change t2 was never
used. Not sure why.]
|
| 1.121.6.1.2.7 | 28-Jan-2010 |
nisimura | fix a comment to tell register S7 ($23) is used for curlwp pointer.
|
| 1.121.6.1.2.6 | 26-Jan-2010 |
matt | Make sure the kernel pages allocated for vmmapbuf have the same page color.
|
| 1.121.6.1.2.5 | 08-Sep-2009 |
uebayasi | To be consistent, always cast pointers to (intptr_t) even if the address is
in userspace.
Reviewed By: matt
|
| 1.121.6.1.2.4 | 07-Sep-2009 |
matt | Use the new symbolic constants for label_t.
Use label_t where appropriate.
Add some LP64 KASSERTs
|
| 1.121.6.1.2.3 | 06-Sep-2009 |
matt | Use VM_MIN_KERNEL_ADDRESS instead of MIPS_KSEG2_START.
Switch to MIPS_KSEG?_P
|
| 1.121.6.1.2.2 | 23-Aug-2009 |
matt | Deal with fp save/restore changes. Remove some more unneeded casts in trap.
|
| 1.121.6.1.2.1 | 21-Aug-2009 |
matt | Cast MIPS_K* to vaddr_t
Fix comments in cpu_lwp_fork
Stop casting l_md.md_regs
|
| 1.121.4.1 | 09-Jun-2009 |
snj | Pull up following revision(s) (requested by martin in ticket #799):
sys/arch/mips/include/locore.h: revision 1.79
sys/arch/mips/mips/locore_mips1.S: revision 1.65
sys/arch/mips/mips/mipsX_subr.S: revision 1.28
sys/arch/mips/mips/mips_machdep.c: revision 1.211
sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().
|
| 1.121.2.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.130.4.3 | 12-Jun-2011 |
rmind | sync with head
|
| 1.130.4.2 | 31-May-2011 |
rmind | sync with head
|
| 1.130.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.132.4.3 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.132.4.2 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.132.4.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.132.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.138.2.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.141.14.1 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1056):
sys/arch/mips/mips/pmap.c: revision 1.210-1.213
sys/arch/mips/mips/vm_machdep.c: revision 1.143
Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering if
a cache invalidation is required.
Additionally flush the cache for the uarea va to avoid potential (future)
cache aliases in cpu_uarea_free when handing pages back to uvm for later
use.
ok matt@
Hopefully this addresses the instability reported in the following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46170 - NetBSD/cobalt 6.0_BETA does not boot
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
Grab pv_list lock in pmap_unmap_ephemeral_page only when needed.
Make PARANOIADIAG compile.
Use pmap_tlb_asid_check to reduce code c&p.
|
| 1.141.12.1 | 08-Nov-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1056):
sys/arch/mips/mips/pmap.c: revision 1.210-1.213
sys/arch/mips/mips/vm_machdep.c: revision 1.143
Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering if
a cache invalidation is required.
Additionally flush the cache for the uarea va to avoid potential (future)
cache aliases in cpu_uarea_free when handing pages back to uvm for later
use.
ok matt@
Hopefully this addresses the instability reported in the following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46170 - NetBSD/cobalt 6.0_BETA does not boot
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
Grab pv_list lock in pmap_unmap_ephemeral_page only when needed.
Make PARANOIADIAG compile.
Use pmap_tlb_asid_check to reduce code c&p.
|
| 1.141.8.1 | 21-May-2014 |
bouyer | Pull up following revision(s) (requested by skrll in ticket #1056):
sys/arch/mips/mips/pmap.c: revision 1.211
sys/arch/mips/mips/pmap.c: revision 1.212
sys/arch/mips/mips/pmap.c: revision 1.213
sys/arch/mips/mips/vm_machdep.c: revision 1.143
sys/arch/mips/mips/pmap.c: revision 1.210
Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering if
a cache invalidation is required.
Additionally flush the cache for the uarea va to avoid potential (future)
cache aliases in cpu_uarea_free when handing pages back to uvm for later
use.
ok matt@
Hopefully this addresses the instability reported in the following PRs:
PR/44900 - R5000/Rm5200 mips ports are broken
PR/46170 - NetBSD/cobalt 6.0_BETA does not boot
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead
Grab pv_list lock in pmap_unmap_ephemeral_page only when needed.
Make PARANOIADIAG compile.
Use pmap_tlb_asid_check to reduce code c&p.
|
| 1.141.6.1 | 24-Feb-2012 |
mrg | sync to -current.
|
| 1.141.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.141.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.142.12.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.142.4.1 | 18-May-2014 |
rmind | sync with head
|
| 1.142.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.142.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.143.4.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.143.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.143.4.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.147.2.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.153.6.2 | 19-May-2017 |
pgoyette | Resolve conflicts from previous merge (all resulting from $NetBSD
keywork expansion)
|
| 1.153.6.1 | 11-May-2017 |
pgoyette | Sync with HEAD
|
| 1.159.6.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.159.2.2 | 14-Jul-2017 |
christos | 2564721
|
| 1.159.2.1 | 14-Jul-2017 |
christos | file vm_machdep.c was added on branch perseant-stdc-iso10646 on 2017-07-14 17:54:01 +0000
|
| 1.8 | 21-Sep-2023 |
msaitoh | s/ for for / for / in comment.
|
| 1.7 | 03-Jun-2019 |
msaitoh | Fix typo in comment(s/similiar/similar/).
|
| 1.6 | 11-Jul-2016 |
matt | branches: 1.6.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.5 | 20-Feb-2011 |
matt | branches: 1.5.14; 1.5.32;
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
|
| 1.4 | 28-Feb-2007 |
thorpej | branches: 1.4.62; 1.4.66; 1.4.72; 1.4.74;
TRUE -> true, FALSE -> false
|
| 1.3 | 21-Feb-2007 |
thorpej | Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
|
| 1.2 | 27-Nov-2005 |
tsutsui | branches: 1.2.18; 1.2.28;
Set correct VPN in mips3_wired_enter_page().
|
| 1.1 | 05-Nov-2005 |
tsutsui | branches: 1.1.2; 1.1.4;
Add MI mips3 wired map functions based on patch in port-mips/31915
from Garrett D'Amore of Tadpole Computer Inc.
Please refer discussion filed in the PR for details.
|
| 1.1.4.1 | 29-Nov-2005 |
yamt | sync with head.
|
| 1.1.2.3 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.1.2.2 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.1.2.1 | 05-Nov-2005 |
skrll | file wired_map.c was added on branch ktrace-lwp on 2005-11-10 13:57:34 +0000
|
| 1.2.28.2 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.2.28.1 | 27-Feb-2007 |
yamt | - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
| 1.2.18.4 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.2.18.3 | 26-Feb-2007 |
yamt | sync with head.
|
| 1.2.18.2 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.2.18.1 | 27-Nov-2005 |
yamt | file wired_map.c was added on branch yamt-lazymbuf on 2006-06-21 14:53:44 +0000
|
| 1.4.74.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.4.72.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.4.66.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.4.62.2 | 29-Dec-2010 |
matt | Change to use tlb_write_indexed.
|
| 1.4.62.1 | 15-Jan-2010 |
matt | Get rid of most of the studly caps.
First to MULTIPROCESSOR support for pmap: move some pmap globals to cpu_info.
Define per-cpu ASID number spaces.
Remove some mips1/!mips1 difference in db_interface.c
Add mips32/64 knowledge to stacktrace.
|
| 1.5.32.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.5.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1 | 28-Aug-2010 |
uebayasi | branches: 1.1.2;
file xmd_machdep.c was initially added on branch uebayasi-xip.
|
| 1.1.2.2 | 30-Oct-2010 |
uebayasi | Implement pmap_physload_device(9) to replace xmd(4) MD backend.
Implement pmap_mmap(9) and use it from mem(4) and xmd(4).
|
| 1.1.2.1 | 28-Aug-2010 |
uebayasi | xmd(4) glue for mips. Not tested.
|
| 1.1 | 09-Jul-2011 |
matt | Add a common version of this for those port which use the generic mips
<machine/pci_machdep.h>
|
| 1.2 | 26-Jun-2015 |
matt | Cleanup includes
|
| 1.1 | 27-Aug-2011 |
bouyer | branches: 1.1.12; 1.1.30;
Add pmon (firmware used by loongson2-based systems and maybe others) support,
from OpenBSD.
This includes code to call back pmon routines from a 64bit kernel,
as well code to read pmon arguments and variables.
|
| 1.1.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1 | 27-Aug-2011 |
bouyer | Add pmon (firmware used by loongson2-based systems and maybe others) support,
from OpenBSD.
This includes code to call back pmon routines from a 64bit kernel,
as well code to read pmon arguments and variables.
|
| 1.2 | 26-Jun-2015 |
matt | Cleanup includes
|
| 1.1 | 27-Aug-2011 |
bouyer | branches: 1.1.12; 1.1.30;
Add pmon (firmware used by loongson2-based systems and maybe others) support,
from OpenBSD.
This includes code to call back pmon routines from a 64bit kernel,
as well code to read pmon arguments and variables.
|
| 1.1.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.3 | 30-Apr-2014 |
matt | Add a static bus_space_handle_t for the core (sysctl) registers.
|
| 1.2 | 28-Jul-2011 |
matt | branches: 1.2.2; 1.2.12; 1.2.16; 1.2.26;
Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_bus.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.2.26.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.2.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.2.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2 | 10-May-2023 |
riastradh | mips: Use config_detach_children to reduce error branch bugs.
|
| 1.1 | 02-Aug-2011 |
cliff | CFI NOR support for mips/ralink
|
| 1.9 | 12-Jan-2019 |
thorpej | Explicitly size the regmap array.
|
| 1.8 | 11-Jan-2019 |
thorpej | Simplify regmap initialization, and fix an regmap issue that
affected TI OMAP (LCR register would get clobbered due to
using the wrong offset for the MDR1 register) reported by Lwazi Dube
(who also found the root cause).
|
| 1.7 | 08-Dec-2018 |
thorpej | Remove the COM_REGMAP option -- just use it all the time. While here,
garbage-collect the COM_FUNCMAP and COM_AU1X00 options, as there are
not used anywhere.
|
| 1.6 | 08-Dec-2018 |
thorpej | Clean up initialization of com_regs structure, in preparation for
some additional changers.
|
| 1.5 | 05-Oct-2016 |
ryo | branches: 1.5.14; 1.5.16;
add support MT7628/MediaTek LinkIt Smart 7688
by @hiroshi and me.
|
| 1.4 | 30-Apr-2014 |
matt | branches: 1.4.4; 1.4.8;
comment a #endif
|
| 1.3 | 01-Feb-2012 |
matt | branches: 1.3.6; 1.3.10; 1.3.20;
Fix early console support.
|
| 1.2 | 28-Jul-2011 |
matt | branches: 1.2.2; 1.2.6;
Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_com.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.2.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.2.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.3.20.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.10.1 | 18-May-2014 |
rmind | sync with head
|
| 1.3.6.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.6.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.8.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.4.4.1 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.5.16.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.5.14.2 | 18-Jan-2019 |
pgoyette | Synch with HEAD
|
| 1.5.14.1 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.2 | 28-Jul-2011 |
matt | Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_debug.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.11 | 31-Mar-2025 |
riastradh | ehci(4): Make usb_*_rem work as noop on zero-initialized input.
This way, if some *hci_attach function fails before usb_*_add, the
caller need not maintain boolean state to decide whether to call
usb_*_rem on detach -- it'll just work without extra effort.
Cleanup in preparation for:
PR port-amd64/59180: System reboots instead of shutting down
|
| 1.10 | 31-Mar-2025 |
riastradh | ehci(4): Sprinkle KERNEL_LOCKED_P and KNF on usb_*_add/rem.
Mark with XXXSMP comments to be fixed later without the kernel lock.
No functional change intended: callers generally do this from
autoconf *_attach/detach routines, which run kernel-locked anyway
(for the moment).
Cleanup in preparation for:
PR port-amd64/59180: System reboots instead of shutting down
|
| 1.9 | 07-Aug-2021 |
thorpej | branches: 1.9.12;
Merge thorpej-cfargs2.
|
| 1.8 | 24-Apr-2021 |
thorpej | branches: 1.8.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.7 | 09-Apr-2018 |
jakllsch | branches: 1.7.16;
Stop potential misuse of vendor names and USB vendor IDs in root hub
device and string descriptors.
Firstly: Few vendors have identical PCI-SIG vendor IDs and USB-IF vendor
IDs. As such, using the PCI vendor ID as a USB vendor ID may trample
on whomever is allocated that USB vendor ID.
Secondly: The vendor of the host controller hardware implementation has
little to nothing to do with our usbroothub implementation. Thus we
should not potentially associate any problems therewith to such third
party.
This change will result in root hubs being identified by USB Vendor ID
0x0000. Root hub vendor string will now be "NetBSD" (or, specifically:
ostype). Product ID (0x0000) and product strings remain unchanged.
|
| 1.6 | 23-Apr-2016 |
skrll | branches: 1.6.16;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.5 | 30-Apr-2014 |
matt | branches: 1.5.2; 1.5.4; 1.5.8;
Remove cfg1 manip, moved elsewhere.
Use aprintf_normal_dev for some debug printfs
|
| 1.4 | 29-Apr-2014 |
matt | Clean these up and move some defines to ralink_reg.h
|
| 1.3 | 20-Jul-2012 |
matt | branches: 1.3.2; 1.3.4; 1.3.12;
EHCI_USBINTR is 4 bytes long so use EOWRITE4
|
| 1.2 | 28-Jul-2011 |
matt | branches: 1.2.2;
Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_ehci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.2.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.3.12.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.3.4.1 | 18-May-2014 |
rmind | sync with head
|
| 1.3.2.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.5.8.1 | 06-Sep-2016 |
skrll | First pass at netbsd-7 updated with USB code from HEAD
|
| 1.5.4.2 | 05-Dec-2014 |
skrll | Use int for return type for [eou]chi_init and motg_init.
|
| 1.5.4.1 | 03-Dec-2014 |
skrll | The grand renaming of structure members.
No functional change.
|
| 1.5.2.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.6.16.1 | 16-Apr-2018 |
pgoyette | Sync with HEAD, resolve some conflicts
|
| 1.7.16.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.8.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.9.12.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.27 | 14-Jul-2025 |
andvar | s/swith size/with the size/ and s/swich/switch/ in comments.
|
| 1.26 | 29-Sep-2022 |
skrll | branches: 1.26.10;
Remove unnecessary include of <sys/malloc.h>.
|
| 1.25 | 18-Sep-2022 |
thorpej | Eliminate use of IFF_OACTIVE.
|
| 1.24 | 24-May-2022 |
andvar | fix various typos in comment, documentation and log messages.
|
| 1.23 | 16-Mar-2022 |
andvar | s/watchog/watchdog in comment and log message, one wording fix in comment.
|
| 1.22 | 17-Aug-2021 |
andvar | fix multiplei repetitive typos in comments, messages and documentation. mainly because copy paste code big amount of files are affected.
|
| 1.21 | 04-Feb-2020 |
thorpej | Use ifmedia_fini().
|
| 1.20 | 29-Jan-2020 |
thorpej | Adopt <net/if_stats.h>.
|
| 1.19 | 03-Jun-2019 |
msaitoh | branches: 1.19.4;
Fix typo in comment (s/seperate/separate/).
|
| 1.18 | 29-May-2019 |
msaitoh | Fix compile error.
|
| 1.17 | 29-May-2019 |
msaitoh | No functional change:
- Simplify MII structure initialization and reference.
- KNF
|
| 1.16 | 29-May-2019 |
msaitoh | Whitespace fix. No functional change.
|
| 1.15 | 22-Jan-2019 |
msaitoh | Change MII PHY read/write API from:
int (*mii_readreg_t)(device_t, int, int);
void (*mii_writereg_t)(device_t, int, int, int);
to:
int (*mii_readreg_t)(device_t, int, int, uint16_t *);
int (*mii_writereg_t)(device_t, int, int, uint16_t);
Now we can test if a read/write operation failed or not by the return value.
In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.
Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:
arm/at91/at91emac.c
arm/ep93xx/epe.c
arm/omap/omapl1x_emac.c
mips/ralink/ralink_eth.c
arch/powerpc/booke/dev/pq3etsec.c(read)
dev/cadence/if_cemac.c <- hkenken
dev/ic/lan9118.c
Tested with the following device:
axe+ukphy
axe+rgephy
axen+rgephy (tested by Andrius V)
wm+atphy
wm+ukphy
wm+igphy
wm+ihphy
wm+makphy
sk+makphy
sk+brgphy
sk+gentbi
msk+makphy
sip+icsphy
sip+ukphy
re+rgephy
bge+brgphy
bnx+brgphy
gsip+gphyter
rtk+rlphy
fxp+inphy (tested by Andrius V)
tlp+acphy
ex+exphy
epic+qsphy
vge+ciphy (tested by Andrius V)
vr+ukphy (tested by Andrius V)
vte+ukphy (tested by Andrius V)
Not tested (MAC):
arm:at91emac
arm:cemac
arm:epe
arm:geminigmac
arm:enet
arm:cpsw
arm:emac(omac)
arm:emac(sunxi)
arm:npe
evbppc:temac
macppc:bm
macppc:gm
mips:aumac
mips:ae
mips:cnmac
mips:reth
mips:sbmac
playstation2:smap
powerpc:tsec
powerpc:emac(ibm4xx)
sgimips:mec
sparc:be
sf
ne(ax88190, dl10019)
awge
ep
gem
hme
smsh
mtd
sm
age
alc
ale
bce
cas
et
jme
lii
nfe
pcn
ste
stge
tl
xi
aue
mue
smsc
udav
url
Not tested (PHY):
amhphy
bmtphy
dmphy
etphy
glxtphy
ikphy
iophy
lxtphy
nsphyter
pnaphy
rdcphy
sqphy
tlphy
tqphy
urlphy
|
| 1.14 | 26-Jun-2018 |
msaitoh | branches: 1.14.2;
Implement the BPF direction filter (BIOC[GS]DIRECTION). It provides backward
compatibility with BIOC[GS]SEESENT ioctl. The userland interface is the same
as FreeBSD.
This change also fixes a bug that the direction is misunderstand on some
environment by passing the direction to bpf_mtap*() instead of checking
m->m_pkthdr.rcvif.
|
| 1.13 | 20-Feb-2017 |
ozaki-r | branches: 1.13.12;
Apply deferred if_start to more drivers...
|
| 1.12 | 15-Dec-2016 |
ozaki-r | branches: 1.12.2;
Move bpf_mtap and if_ipackets++ on Rx of each driver to percpuq if_input
The benefits of the change are:
- We can reduce codes
- We can provide the same behavior between drivers
- Where/When if_ipackets is counted up
- Note that some drivers still update packet statistics in their own
way (periodical update)
- Moved bpf_mtap run in softint
- This makes it easy to MP-ify bpf
Proposed on tech-kern and tech-net
|
| 1.11 | 05-Oct-2016 |
ryo | add support MT7628/MediaTek LinkIt Smart 7688
by @hiroshi and me.
|
| 1.10 | 05-Oct-2016 |
ryo | KNF; indent, spaces and tabs.
No functional change.
|
| 1.9 | 10-Jun-2016 |
ozaki-r | branches: 1.9.2;
Introduce m_set_rcvif and m_reset_rcvif
The API is used to set (or reset) a received interface of a mbuf.
They are counterpart of m_get_rcvif, which will come in another
commit, hide internal of rcvif operation, and reduce the diff of
the upcoming change.
No functional change.
|
| 1.8 | 23-Apr-2016 |
skrll | Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.7 | 09-Feb-2016 |
ozaki-r | Introduce softint-based if_input
This change intends to run the whole network stack in softint context
(or normal LWP), not hardware interrupt context. Note that the work is
still incomplete by this change; to that end, we also have to softint-ify
if_link_state_change (and bpf) which can still run in hardware interrupt.
This change softint-ifies at ifp->if_input that is called from
each device driver (and ieee80211_input) to ensure Layer 2 runs
in softint (e.g., ether_input and bridge_input). To this end,
we provide a framework (called percpuq) that utlizes softint(9)
and percpu ifqueues. With this patch, rxintr of most drivers just
queues received packets and schedules a softint, and the softint
dequeues packets and does rest packet processing.
To minimize changes to each driver, percpuq is allocated in struct
ifnet for now and that is initialized by default (in if_attach).
We probably have to move percpuq to softc of each driver, but it's
future work. At this point, only wm(4) has percpuq in its softc
as a reference implementation.
Additional information including performance numbers can be found
in the thread at tech-kern@ and tech-net@:
http://mail-index.netbsd.org/tech-kern/2016/01/14/msg019997.html
Acknowledgment: riastradh@ greatly helped this work.
Thank you very much!
|
| 1.6 | 22-Jul-2012 |
matt | branches: 1.6.2; 1.6.16;
Fix mii_statchg to take a 'struct ifnet *' instead of device_t. This fixes
problem with a common MDIO bus used for multiple interfaces.
Some drivers converted to CFATTACL_DECL_NEW.
|
| 1.5 | 23-Aug-2011 |
oki | branches: 1.5.2;
make compile with options RT3050.
|
| 1.4 | 03-Aug-2011 |
matt | Deal with RTMEMSIZE no longer being defined
|
| 1.3 | 01-Aug-2011 |
matt | Use <sys/ for bus.h and intr.h
|
| 1.2 | 28-Jul-2011 |
matt | Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_eth.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.5.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.6.16.5 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.6.16.4 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.6.16.3 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.6.16.2 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.6.16.1 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.6.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.9.2.3 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.9.2.2 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.9.2.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.12.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.13.12.2 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.13.12.1 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.14.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.14.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.19.4.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.26.10.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.14 | 12-Feb-2022 |
thorpej | Add inline functions to manipulate the klists that link up knotes
via kn_selnext:
- klist_init()
- klist_fini()
- klist_insert()
- klist_remove()
These provide some API insulation from the implementation details of these
lists (but not completely; see vn_knote_attach() and vn_knote_detach()).
Currently just a wrapper around SLIST(9).
This will make it significantly easier to switch kn_selnext linkage
to a different kind of list.
|
| 1.13 | 26-Sep-2021 |
thorpej | Change the kqueue filterops::f_isfd field to filterops::f_flags, and
define a flag FILTEROP_ISFD that has the meaning of the prior f_isfd.
Field and flag name aligned with OpenBSD.
This does not constitute a functional or ABI change, as the field location
and size, and the value placed in that field, are the same as the previous
code, but we're bumping __NetBSD_Version__ so 3rd-party module source code
can adapt, as needed.
NetBSD 9.99.89
|
| 1.12 | 03-Sep-2021 |
andvar | s/existant/existent/ in comments and messages, plus few more similar fixes.
|
| 1.11 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.10 | 24-Apr-2021 |
thorpej | branches: 1.10.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.9 | 30-Oct-2020 |
christos | branches: 1.9.4;
c99 struct initializers
|
| 1.8 | 10-Mar-2020 |
martin | gcc thinks the static "led_index" could get out of range - not sure
how that should happen, but test for >= instead of == on the
array size.
|
| 1.7 | 03-Jun-2019 |
msaitoh | Fix typo in comment (s/seperate/separate/).
|
| 1.6 | 05-Oct-2016 |
ryo | branches: 1.6.16;
add support MT7628/MediaTek LinkIt Smart 7688
by @hiroshi and me.
|
| 1.5 | 12-Mar-2014 |
mrg | branches: 1.5.6; 1.5.10;
remove some dead code, avoid set but unused variables.
|
| 1.4 | 27-Oct-2012 |
chs | branches: 1.4.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.3 | 27-Sep-2011 |
jym | branches: 1.3.2; 1.3.12;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
| 1.2 | 28-Jul-2011 |
matt | Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_gpio.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.3.12.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.12.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.3.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.4.2.1 | 18-May-2014 |
rmind | sync with head
|
| 1.5.10.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.5.6.1 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.6.16.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.6.16.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.9.4.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.10.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 05-Oct-2016 |
ryo | add support MT7628/MediaTek LinkIt Smart 7688
by @hiroshi and me.
|
| 1.2 | 28-Jul-2011 |
matt | branches: 1.2.12; 1.2.30; 1.2.34;
Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_gpio.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.2.34.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.2.30.1 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.2.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.9 | 15-Sep-2025 |
thorpej | Encapsulate what's needed to attach an I2C bus into a iicbus_attach()
inline.
|
| 1.8 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.7 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.6 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.5 | 24-Apr-2021 |
thorpej | branches: 1.5.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.4 | 22-Dec-2019 |
thorpej | branches: 1.4.10;
Cleanup i2c bus acquire / release, centralizing all of the logic into
iic_acquire_bus() / iic_release_bus(). "acquire" and "release" hooks
no longer need to be provided by back-end controller drivers (only if
they need special handling, e.g. powering on the i2c controller).
This results in the removal of a bunch of rendundant code from each
back-end controller driver.
Assert that we are not in hard interrupt context in iic_acquire_bus(),
iic_exec(), and iic_release_bus().
|
| 1.3 | 27-Oct-2012 |
chs | branches: 1.3.38;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.2 | 28-Jul-2011 |
matt | branches: 1.2.2; 1.2.12;
Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_i2c.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.2.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.2.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.3.38.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.4.10.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.5.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.7 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.6 | 10-Nov-2019 |
chs | branches: 1.6.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.5 | 05-Oct-2016 |
ryo | branches: 1.5.16;
add support MT7628/MediaTek LinkIt Smart 7688
by @hiroshi and me.
|
| 1.4 | 26-Aug-2016 |
skrll | Adjust evbmips_iointr to pass a clockframe pointer and use it for
pwmclock @ voyager.
Suggested by matt@
Hi macallan!
|
| 1.3 | 27-Sep-2011 |
jym | branches: 1.3.12; 1.3.30; 1.3.34;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
| 1.2 | 28-Jul-2011 |
matt | Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_intr.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.3.34.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.3.30.2 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.3.30.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.3.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.16.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.6.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 05-Oct-2016 |
ryo | branches: 1.5.30;
add support MT7628/MediaTek LinkIt Smart 7688
by @hiroshi and me.
|
| 1.4 | 30-Apr-2014 |
matt | branches: 1.4.4; 1.4.8;
Instead of
mainbus0 (root): Ralink System Bus
be more explicit about the system:
mainbus0 (root): Mediatek MT7620 System Bus
|
| 1.3 | 26-Mar-2014 |
christos | branches: 1.3.2;
kill sprintf
|
| 1.2 | 28-Jul-2011 |
matt | branches: 1.2.2; 1.2.12; 1.2.16;
Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_mainbus.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.2.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.2.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.4.8.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.4.4.1 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.5.30.6 | 05-Apr-2021 |
thorpej | Treat config_probe() as if it were a boolean function; don't compare
return value > 0... except for the odd balls, which are now really easy
to spot.
|
| 1.5.30.5 | 05-Apr-2021 |
thorpej | config_match() -> config_probe() for the straight-forward indirect config
cases. There are still a few odd balls using config_match() which should
be sorted out later.
|
| 1.5.30.4 | 04-Apr-2021 |
thorpej | CFARG_SUBMATCH -> CFARG_SEARCH for the indirect configuration uses.
|
| 1.5.30.3 | 03-Apr-2021 |
thorpej | Give config_attach() the tagged variadic argument treatment and
mechanically convert all call sites.
|
| 1.5.30.2 | 21-Mar-2021 |
thorpej | CFARG_IATTR usage audit:
If a device carries only one interface attribute, there is no need
to specify it when calling config_search(); that specification is
meant only to disambiguate which interface attribute (which is a
proxy for "what kind of attach args are being used") is having
children attached. cfparent_match() will take care of ensuring that
any potential children can attach to one of the parent's iterface
attributes, and if the parent only carries one, no disambiguation is
necessary.
|
| 1.5.30.1 | 20-Mar-2021 |
thorpej | The proliferation if config_search_*() and config_found_*() combinations
is a little absurd, so begin to tidy this up:
- Introduce a new cfarg_t enumerated type, that defines the types of
tag-value variadic arguments that can be passed to the various
config_*() functions (CFARG_SUBMATCH, CFARG_IATTR, and CFARG_LOCATORS,
for now, plus a CFARG_EOL sentinel).
- Collapse config_search_*() into config_search() that takes these
variadic arguments.
- Convert all call sites of config_search_*() to the new signature.
Noticed several incorrect usages along the way, which will be
audited in a future commit.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.8 | 31-Mar-2025 |
riastradh | ohci(4): Rework detach logic and justify the ordering.
Handle failed attach when we detach.
This changes the signature of the ohci_detach function, but it is
only ever used by statically linked ohci bus attachments, never by
modules so far, so no kernel revbump.
PR port-amd64/59180: System reboots instead of shutting down
|
| 1.7 | 07-Aug-2021 |
thorpej | branches: 1.7.12;
Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 09-Apr-2018 |
jakllsch | branches: 1.5.16;
Stop potential misuse of vendor names and USB vendor IDs in root hub
device and string descriptors.
Firstly: Few vendors have identical PCI-SIG vendor IDs and USB-IF vendor
IDs. As such, using the PCI vendor ID as a USB vendor ID may trample
on whomever is allocated that USB vendor ID.
Secondly: The vendor of the host controller hardware implementation has
little to nothing to do with our usbroothub implementation. Thus we
should not potentially associate any problems therewith to such third
party.
This change will result in root hubs being identified by USB Vendor ID
0x0000. Root hub vendor string will now be "NetBSD" (or, specifically:
ostype). Product ID (0x0000) and product strings remain unchanged.
|
| 1.4 | 23-Apr-2016 |
skrll | branches: 1.4.16;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.3 | 29-Apr-2014 |
matt | branches: 1.3.2; 1.3.4; 1.3.8;
Clean these up and move some defines to ralink_reg.h
|
| 1.2 | 28-Jul-2011 |
matt | branches: 1.2.2; 1.2.12; 1.2.16; 1.2.26;
Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_ohci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.2.26.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.2.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.2.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.2.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.8.1 | 06-Sep-2016 |
skrll | First pass at netbsd-7 updated with USB code from HEAD
|
| 1.3.4.3 | 05-Dec-2014 |
skrll | Use int for return type for [eou]chi_init and motg_init.
|
| 1.3.4.2 | 03-Dec-2014 |
skrll | The grand renaming of structure members.
No functional change.
|
| 1.3.4.1 | 03-Dec-2014 |
skrll | Trailing whitespace.
|
| 1.3.2.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.4.16.1 | 16-Apr-2018 |
pgoyette | Sync with HEAD, resolve some conflicts
|
| 1.5.16.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.7.12.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.1 | 29-Apr-2014 |
matt | branches: 1.1.2; 1.1.4; 1.1.6; 1.1.10;
Stub for PCI/PCIe support for RT3883/MT7620
|
| 1.1.10.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.10.1 | 29-Apr-2014 |
tls | file ralink_pci.c was added on branch tls-maxphys on 2014-08-20 00:03:13 +0000
|
| 1.1.6.2 | 10-Aug-2014 |
tls | Rebase.
|
| 1.1.6.1 | 29-Apr-2014 |
tls | file ralink_pci.c was added on branch tls-earlyentropy on 2014-08-10 06:54:02 +0000
|
| 1.1.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.1.4.1 | 29-Apr-2014 |
yamt | file ralink_pci.c was added on branch yamt-pagecache on 2014-05-22 11:39:58 +0000
|
| 1.1.2.2 | 18-May-2014 |
rmind | sync with head
|
| 1.1.2.1 | 29-Apr-2014 |
rmind | file ralink_pci.c was added on branch rmind-smpnet on 2014-05-18 17:45:17 +0000
|
| 1.10 | 13-Aug-2021 |
andvar | fix typos in words "pointer" and s/fram /frame/
|
| 1.9 | 05-Oct-2016 |
ryo | add support MT7628/MediaTek LinkIt Smart 7688
by @hiroshi and me.
|
| 1.8 | 05-Oct-2016 |
ryo | KNF; indent, spaces and tabs.
No functional change.
|
| 1.7 | 30-Apr-2014 |
matt | branches: 1.7.4; 1.7.8;
Fix a few more register definitions.
|
| 1.6 | 29-Apr-2014 |
matt | More MT7620 definitions
|
| 1.5 | 19-Apr-2014 |
matt | Add PCI register definitions
|
| 1.4 | 12-Feb-2012 |
oki | branches: 1.4.6; 1.4.10; 1.4.20;
add RT3050 SYSCTL_CFG0 values.
|
| 1.3 | 03-Aug-2011 |
matt | branches: 1.3.2; 1.3.6;
Add some defintions for SYSCTL_CFG0
|
| 1.2 | 28-Jul-2011 |
matt | Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_reg.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.3.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.3.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.4.20.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.4.10.1 | 18-May-2014 |
rmind | sync with head
|
| 1.4.6.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.6.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.7.8.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.7.4.1 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.4 | 09-Oct-2024 |
andvar | s/compainion/companion/ in comments.
|
| 1.3 | 27-Oct-2012 |
chs | branches: 1.3.74;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.2 | 28-Jul-2011 |
matt | branches: 1.2.2; 1.2.12;
Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_usbhcvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.2.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.2.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.3.74.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.7 | 05-Oct-2016 |
ryo | add support MT7628/MediaTek LinkIt Smart 7688
by @hiroshi and me.
|
| 1.6 | 30-Apr-2014 |
matt | branches: 1.6.4; 1.6.8;
Add a static bus_space_handle_t for the core (sysctl) registers.
|
| 1.5 | 01-Feb-2012 |
matt | branches: 1.5.6; 1.5.10; 1.5.20;
Fix early console support.
|
| 1.4 | 03-Aug-2011 |
matt | branches: 1.4.2; 1.4.6;
Deal with RA_CONSOLE_EARLY a little more sanely
|
| 1.3 | 01-Aug-2011 |
matt | Use <sys/ for bus.h and intr.h
|
| 1.2 | 28-Jul-2011 |
matt | Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_var.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.4.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.4.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.4.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.5.20.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.5.10.1 | 18-May-2014 |
rmind | sync with head
|
| 1.5.6.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.6.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.6.8.1 | 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.6.4.1 | 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.2 | 28-Jul-2011 |
matt | Bring forward from matt-nb5-mips64. Support for Ralink RT3883 MIPS 74K SoC
from CradlePoint Technology.
|
| 1.1 | 01-Jul-2011 |
matt | branches: 1.1.2;
file ralink_wdog.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 01-Jul-2011 |
matt | Add basic support for the Ralink RT3883 SOC. No support for the wireless
interfaces is present but i2c, uart, ethernet, gpio, ehci, ohci are supported.
This support was contributed by Cradlepoint Technology.
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file com_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 19-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_cde_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 19-Jan-2012 |
matt | PCI attachments (mostly stubs) for most XLP devices.
|
| 1.1 | 27-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_cfi_xlnor.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 28-Dec-2011 |
matt | Add NOR support for XLP.
|
| 1.1.2.1 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.8 | 11-Dec-2018 |
thorpej | Add a convenience function, com_init_regs_stride(), that shifts the register
offsets and size by the specified amount. Use in front-ends as appropriate.
|
| 1.7 | 08-Dec-2018 |
thorpej | Remove the COM_REGMAP option -- just use it all the time. While here,
garbage-collect the COM_FUNCMAP and COM_AU1X00 options, as there are
not used anywhere.
|
| 1.6 | 08-Dec-2018 |
thorpej | Clean up initialization of com_regs structure, in preparation for
some additional changers.
|
| 1.5 | 01-Jul-2011 |
dyoung | branches: 1.5.52; 1.5.54;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.4 | 11-May-2011 |
cliff | sync from matt-nb5-mips64 branch
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_com.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.17 | 31-Dec-2011 |
matt | Switch to using IST_<foo> instead of private enums.
|
| 1.1.2.16 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.15 | 11-May-2011 |
cliff | simplify rmixl_com_initmap() a bit
|
| 1.1.2.14 | 21-May-2010 |
cliff | - establish interrupt at IPL_VM (was IPL_SERIAL)
|
| 1.1.2.13 | 18-May-2010 |
cliff | configure com1 and make it attach correctly
note that config loc 'mult' is assumed to be 4, and so no need to specify
|
| 1.1.2.12 | 12-Apr-2010 |
cliff | - specifiy if mpsafe when establishing interrupts
(all are 'false' except comintr for now)
|
| 1.1.2.11 | 21-Mar-2010 |
cliff | - pass obio_tmsk to rmixl_intr_establish
|
| 1.1.2.10 | 20-Jan-2010 |
matt | cleanup attachments so that other mips cpus can use the same scheme.
|
| 1.1.2.9 | 14-Dec-2009 |
cliff | - replace single bus space with two (big & little endian) bus spaces for obio
- use comcnspeed instead of CONSPEED
- use comcnfreq instead of CONFREQ
|
| 1.1.2.8 | 12-Dec-2009 |
cliff | initialize sc_frequency to CONSFREQ
|
| 1.1.2.7 | 15-Nov-2009 |
cliff | - use new obio bus space
|
| 1.1.2.6 | 25-Sep-2009 |
cliff | establish interrupt in rmixl_com_attach()
|
| 1.1.2.5 | 22-Sep-2009 |
cliff | add baud rate initialization to rmixl_putchar_init()
use symbolic offsets for reg access in rmixl_putchar()
|
| 1.1.2.4 | 15-Sep-2009 |
cliff | fix typo assigning bus_space_tag in rmixl_com_cnattach
set sc_dev in rmixl_com_attach
|
| 1.1.2.3 | 15-Sep-2009 |
cliff | always use big endian access methods & bus space for com
also do some code cleanup
|
| 1.1.2.2 | 13-Sep-2009 |
cliff | improve how some config data are managed
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.2 | 31-May-2011 |
rmind | sync with head
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_com.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.5.54.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.5.52.1 | 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_comvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.3 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.2 | 13-Nov-2009 |
cliff | - define used to prevent recursive include gets renamed according to convention
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_comvar.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.15 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.14 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.13 | 09-Apr-2022 |
riastradh | mips/rmi: Hack to get XLSATX64.MP kernel building again.
Using <mips/asm.h> in a .c file is kinda grody but CALLFRAME_SIZ
doesn't seem to be defined anywhere else. Not sure how this was ever
supposed to work...
|
| 1.12 | 12-Aug-2020 |
skrll | Don't include mips/asm.h from a C file
|
| 1.11 | 03-Dec-2019 |
riastradh | Rip out pserialize(9) logic now that the RCU patent has expired.
pserialize_perform() is now basically just xc_barrier(XC_HIGHPRI).
No more tentacles throughout the scheduler. Simplify the psz read
count for diagnostic assertions by putting it unconditionally into
cpu_info.
From rmind@, tidied up by me.
|
| 1.10 | 01-Dec-2019 |
ad | Fix false sharing problems with cpu_info. Identified with tprof(8).
This was a very nice win in my tests on a 48 CPU box.
- Reorganise cpu_data slightly according to usage.
- Put cpu_onproc into struct cpu_info alongside ci_curlwp (now is ci_onproc).
- On x86, put some items in their own cache lines according to usage, like
the IPI bitmask and ci_want_resched.
|
| 1.9 | 28-Jun-2015 |
matt | branches: 1.9.18;
Print both user and kernel segtabs
|
| 1.8 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.7 | 01-Jun-2015 |
matt | Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.6 | 25-Nov-2013 |
christos | branches: 1.6.6;
nobody uses qchain and it is about to be GC'ed.
|
| 1.5 | 27-Oct-2012 |
chs | branches: 1.5.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.4 | 29-Apr-2011 |
matt | branches: 1.4.4; 1.4.14;
minor cleanups.
|
| 1.3 | 14-Apr-2011 |
cliff | - add cpu_rmixl_run(), and set in mips_locoresw.lsw_cpu_run
to be called from cpu_hatch() once cpus are running,
so we can determine what threads are configured
and running, and can finish initialization of per-core registers
depending on that.
- in cpu_rmixl_db_watch_init() clear IEU_DEFEATURE[DBE],
and init all COP0 watchpoint regs
- option MIPS_DDB_WATCH is deprecated, removed; use of cpu watchpoints
is longer depends on that or DDB
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 16-Jan-2010 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_cpu.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.3 | 31-May-2011 |
rmind | sync with head
|
| 1.1.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.25 | 19-Jan-2012 |
matt | Unbreak things so that XLS/XLR boot again. :)
|
| 1.1.2.24 | 19-Jan-2012 |
matt | Change struct rmixl_cpu_softc to cpu_softc and remove casts.
Fix IPIs.
More FMN cleanup.
|
| 1.1.2.23 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.22 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.1.2.21 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.20 | 08-Feb-2011 |
cliff | - make compile without MULTIPROCESSOR
|
| 1.1.2.19 | 08-Feb-2011 |
cliff | - remove sc_ih_clk, sc_ih_fmn, sc_ih_ipi from struct rmixl_cpu_softc;
they were unused just taking up space
- rmixl_intr_init_clk() and rmixl_intr_init_ipi() are now type void
|
| 1.1.2.18 | 08-Feb-2011 |
cliff | - renamed cpu_rmixl_attach_once() to cpu_rmixl_attach_primary() (more clear)
- cpu_rmixl_attach_primary() obtains ci_cpuid from COP0 EBASE reg
instead of assuming always cpuid==0
- in cpu_rmixl_attach(), first call of the function determines we are attaching
primary cpu, instead of asuming core0 thread0 is always the primary cpu
- cpu_fmn_intr() uses CPU_IS_PRIMARY() instead of asuming cpu_number()==0
always indicates the primary cpu
- debug function rmixl_cpuinfo_print() argument is now a cpu index, not cpuid
|
| 1.1.2.17 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for MULTIPROCESSOR dependency
- add suport for MIPS COP0 watchpoint in ddb
- add ci_pmap_asid_cur print in rmixl_cpuinfo_print().
- note rmixl_cpuinfo_print() (or something like it) should eventually get moved
into a md support fn of a (hypothetical) ddb 'show cpu' command.
|
| 1.1.2.16 | 07-Jan-2011 |
cliff | - ifdef out guts of cpu_xls616_erratum(); the problem is still unknown.
- cpu_rmixl_hatch() calls cpucore_rmixl_hatch()
|
| 1.1.2.15 | 20-Sep-2010 |
cliff | - remove MULTIPROCESSOR condition for rmixl_cpuinfo_print and
rmixl_cpu_data_print functions, so we can call them
e.g. from ddb in non-MP kernels
|
| 1.1.2.14 | 01-Sep-2010 |
matt | Fill cpu_data cpu_{node,core,smt}_id for RMI.
|
| 1.1.2.13 | 16-Aug-2010 |
matt | Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).
|
| 1.1.2.12 | 10-Jun-2010 |
cliff | - remove rmixl_spl_init_cpu calls from rmixl_intr_init_cpu
because rmixl_intr_init_cpu only runs on cpu#0.
rmixl_spl_init_cpu calls are now done in cpu_rmixl_atach (for cpu#0)
or cpu_rmixl_hatch (for other cpus).
- add cpu_xls616_erratum to avoid count/compare conflict on XLS616
XXX VERIFY WITH RMI
- rmixl_spl_init_cpu CPU#0 in attach, others in hatch
- remove splhi/splx for non-cpu#0 work in attach
interrupts arent enabled yet anyway
|
| 1.1.2.11 | 01-May-2010 |
cliff | remove some development debug prints,
in cpu_setup_trampoline_common()
and cpu_setup_trampoline_callback()
|
| 1.1.2.10 | 16-Apr-2010 |
cliff | - remove cpu_setup_trampoline_fmn()
- remove cpu_setup_trampoline_ipi()
- cpu_setup_trampoline_common() provides wakeup-method independent function,
used only by cpu_setup_trampoline_callback() for now
- PSB_TYPE_DELL firmware works with cpu_setup_trampoline_callback()
|
| 1.1.2.9 | 29-Mar-2010 |
cliff | - cpu_setup_trampoline_fmn() is #ifdef NOTYET until we make it work...
|
| 1.1.2.8 | 22-Mar-2010 |
cliff | - in cpu_setup_trampoline_callback, add some DIAGNOSTIC checks,
and make sure we get needed sign extension when storing 32 bit pointers
into trampoline args structure.
|
| 1.1.2.7 | 21-Mar-2010 |
cliff | declaration of rmixl_cpu_trampoline_args now #ifdef MULTIPROCESSOR
|
| 1.1.2.6 | 21-Mar-2010 |
cliff | - use different wakeup trampolines depending on firmware type
so far only RMI formware with callback wakeup method is tested.
- add a (chip-specific) softc structure, and cross link it
with struct cpu_info
- remove exception vectors mem allocation, it is now provided
by cpu_attach_common
- remove common cpu_info initialization, now provided
by cpu_attach_common
- use per-CPU bit in 'cpus_hatched' as handshake with the CPU
we just hatched
- call rmixl_intr_init_cpu for per-CPU interrupt initialization
- call cpu_attach_common() for common mips stuff
- cpu_rmixl_attach_once() groups together chip-specific initializations
that are only to be one once, i.e. by CPU#0
- cpu_rmixl_hatch() provides chip-specific hatch code called from
(mips-common) cpu_hatch() via lsw_cpu_init
- cpu_setup_trampoline_callback() provides method to wake up
subordinate CPUs using RMI firmware callback.
- rmixl_cpuinfo_print() can be called for debugging e.g. from DDB
should maybe evolve into DDB 'mach cpu <n>' ?
|
| 1.1.2.5 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.1.2.4 | 29-Jan-2010 |
cliff | - avoid cpu_wakeup callback if running on PSB_TYPE_DELL firmware
|
| 1.1.2.3 | 24-Jan-2010 |
cliff | - cpu_rmixl_attach calls cpu_setup_trampoline to get control of
subordinate CPUs from firmware by using the 'wakeup' callback method
and into cpu_wakeup_trampoline where they just spin pending further work.
- the callback requires re-basing the stack pointer to be in KSEG0,
done in asm subroutine rmixlfw_wakeup_cpu
|
| 1.1.2.2 | 20-Jan-2010 |
matt | cleanup attachments so that other mips cpus can use the same scheme.
|
| 1.1.2.1 | 16-Jan-2010 |
cliff | - moved arch/evbmips/rmixl/cpu.c to arch/mips/rmi/rmixl_cpu.c
|
| 1.4.14.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.14.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.14.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.4.4.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.4.4.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.5.2.1 | 18-May-2014 |
rmind | sync with head
|
| 1.6.6.2 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.6.6.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.9.18.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 29-Apr-2011 |
matt | branches: 1.5.70;
minor cleanups.
|
| 1.4 | 14-Apr-2011 |
cliff | - fix comment at cpucore_rmixl_run()
|
| 1.3 | 14-Apr-2011 |
cliff | - in cpucore_rmixl_attach(), keep track of which threads are
enabled by firmware and configured and attach, or not.
- add cpucore_rmixl_run() to do the post-running initialization:
disable unused threads in RMIXL_PCR_THREADEN, and
set Round Robin thread scheduling mode.
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 16-Jan-2010 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_cpucore.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.3 | 31-May-2011 |
rmind | sync with head
|
| 1.1.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.14 | 19-Jan-2012 |
matt | Add missing arg.
|
| 1.1.2.13 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.12 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.11 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.10 | 08-Feb-2011 |
cliff | - make compile without MULTIPROCESSOR
|
| 1.1.2.9 | 08-Feb-2011 |
cliff | - cpucore_rmixl_attach() now examines 'userapp_cpu_map' bitmask obtained
from the firmware, and avoids attaching threads that are not enabled there.
|
| 1.1.2.8 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for explicit MULTIPROCESSOR dependency
|
| 1.1.2.7 | 07-Jan-2011 |
cliff | - add cpucore_rmixl_hatch() for per-core initialization
|
| 1.1.2.6 | 21-Mar-2010 |
cliff | - except for core#0, pmap tlb0info lives in the cpucore softc;
cpucore_rmixl_attach() calls pmap_tlb_info_init() with a KSEG0 or
XKPHYS_CACHED conversion of the address of that structure in the softc
|
| 1.1.2.5 | 27-Feb-2010 |
matt | s/pmap_tlb_info/pmap_tlb0_info/
|
| 1.1.2.4 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.1.2.3 | 20-Jan-2010 |
matt | cleanup attachments so that other mips cpus can use the same scheme.
|
| 1.1.2.2 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.1.2.1 | 16-Jan-2010 |
cliff | - moved arch/evbmips/rmixl/cpucore.c to arch/mips/rmi/rmixl_cpucore.c
|
| 1.5.70.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.4 | 29-Apr-2011 |
matt | minor cleanups.
|
| 1.3 | 14-Apr-2011 |
cliff | - add sc_running flag to allow cpucore_rmixl_run() to do once-per-core
initializations once we know what threads are configured
- add sc_threads_enb and sc_threads_dis to track what threads are
enabled by firmware and configured and attach, or not.
- add prototype for cpucore_rmixl_run()
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 16-Jan-2010 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_cpucorevar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.3 | 31-May-2011 |
rmind | sync with head
|
| 1.1.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.7 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.6 | 05-Feb-2011 |
cliff | - protect option includes ("opt_multiprocessor.h") with #ifdef _KERNEL_OPT
|
| 1.1.2.5 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for explicit MULTIPROCESSOR dependency
|
| 1.1.2.4 | 07-Jan-2011 |
cliff | - add sc_hatched flag to the cpucore softc
|
| 1.1.2.3 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.2 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.1.2.1 | 16-Jan-2010 |
cliff | - moved arch/evbmips/rmixl/cpucorevar.h to arch/mips/rmi/rmixl_cpucorevar.h
|
| 1.6 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.5 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.4 | 24-Apr-2021 |
thorpej | branches: 1.4.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.3 | 01-Jul-2011 |
dyoung | branches: 1.3.68;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 17-Jan-2010 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_cpunode.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.6 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.5 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.4 | 22-Mar-2010 |
cliff | in cpunode_rmixl_attach use the right macro to obtain number of cores
provided by this chip.
|
| 1.1.2.3 | 20-Jan-2010 |
matt | cleanup attachments so that other mips cpus can use the same scheme.
|
| 1.1.2.2 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.1.2.1 | 17-Jan-2010 |
cliff | cpunode driver represents CPU node in device tree
|
| 1.3.68.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.4.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 17-Jan-2010 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_cpunodevar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.3 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.2 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.1 | 17-Jan-2010 |
cliff | cpunode driver represents CPU node in device tree
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 21-Mar-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_cpuvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.6 | 27-Feb-2012 |
matt | Add a test for recursive IPIs.
use __builtin_clzll
|
| 1.1.2.5 | 19-Jan-2012 |
matt | Change struct rmixl_cpu_softc to cpu_softc and remove casts.
Fix IPIs.
More FMN cleanup.
|
| 1.1.2.4 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.3 | 08-Feb-2011 |
cliff | - remove sc_ih_clk, sc_ih_fmn, sc_ih_ipi from struct rmixl_cpu_softc;
they were unused just taking up space
- rmixl_intr_init_clk() and rmixl_intr_init_ipi() are now type void
|
| 1.1.2.2 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.1 | 21-Mar-2010 |
cliff | add include for RMI specific cpu stuff: softc and wakeup trampoline args structures
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_cpuvar.h was added on branch rmind-uvmplock on 2011-03-05 20:51:10 +0000
|
| 1.1 | 15-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_eb_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 15-Nov-2009 |
cliff | - we don't need -el bus space for obio, get rid of it and clean up the naming
- delete rmixl_eb_space.c, rmixl_el_space.c
- add mixl_obio_space.c, provides -eb bus space for obio devices
|
| 1.1.2.1 | 15-Sep-2009 |
cliff | obio now provides both big endian and little endian bus spaces
to allow child devices to use according to access method needs
also preparing for dual bus_dma methods, one for addrs <4GB,
the other for all memory, including addrs >= 4GB
the bulk of XLS DMA work is still TBD
|
| 1.8 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.7 | 24-Apr-2021 |
thorpej | branches: 1.7.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.6 | 23-Apr-2016 |
skrll | branches: 1.6.32;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.5 | 20-Jul-2012 |
matt | branches: 1.5.2; 1.5.14; 1.5.16; 1.5.20;
EHCI_USBINTR is 4 bytes long so use EOWRITE4
|
| 1.4 | 01-Jul-2011 |
dyoung | branches: 1.4.2;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 29-Apr-2011 |
matt | Provide OHCI companions devices to EHCI.
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 14-Dec-2009 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_ehci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.2 | 31-May-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.6 | 30-Dec-2011 |
matt | Change devices name from rmixl_* to xl*.
|
| 1.1.2.5 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.4 | 21-Mar-2010 |
cliff | - include rmixl_intr.h for externs
|
| 1.1.2.3 | 29-Jan-2010 |
cliff | - use rmixl_probe_4 to match
|
| 1.1.2.2 | 03-Jan-2010 |
cliff | - unconfuse bit defines for rmixl gpio RESET and RESET_CFG registers
|
| 1.1.2.1 | 14-Dec-2009 |
cliff | - add attach glue for ehci at XLS USB Interface
|
| 1.4.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.5.20.1 | 06-Sep-2016 |
skrll | First pass at netbsd-7 updated with USB code from HEAD
|
| 1.5.16.3 | 05-Dec-2014 |
skrll | Use int for return type for [eou]chi_init and motg_init.
|
| 1.5.16.2 | 03-Dec-2014 |
skrll | The grand renaming of structure members.
No functional change.
|
| 1.5.16.1 | 03-Dec-2014 |
skrll | Trailing whitespace.
|
| 1.5.14.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.5.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.6.32.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.7.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 15-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_el_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 15-Nov-2009 |
cliff | - we don't need -el bus space for obio, get rid of it and clean up the naming
- delete rmixl_eb_space.c, rmixl_el_space.c
- add mixl_obio_space.c, provides -eb bus space for obio devices
|
| 1.1.2.1 | 15-Sep-2009 |
cliff | obio now provides both big endian and little endian bus spaces
to allow child devices to use according to access method needs
also preparing for dual bus_dma methods, one for addrs <4GB,
the other for all memory, including addrs >= 4GB
the bulk of XLS DMA work is still TBD
|
| 1.4 | 14-May-2020 |
msaitoh | Remove extra semicolon.
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_firmware.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.4 | 23-Jan-2010 |
cliff | define RMI firmware IPIs
|
| 1.1.2.3 | 17-Jan-2010 |
cliff | - add struct rmixlfw_cpu_wakeup_info and related
|
| 1.1.2.2 | 09-Nov-2009 |
cliff | - add some new RMIXLFW_MMAP_TYPE_* defines
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_firmware.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.1 | 28-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_flash_eb_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 28-Dec-2011 |
matt | Add NOR support for XLP.
|
| 1.1 | 28-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_flash_el_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 28-Dec-2011 |
matt | Add NOR support for XLP.
|
| 1.5 | 11-Aug-2023 |
mrg | avoid uninitialised variable warnings (likely incorrect ones.)
cry wolved by GCC 12.
|
| 1.4 | 27-Sep-2011 |
jym | Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
| 1.3 | 29-Apr-2011 |
matt | cpu_number() return an u_int, use %u for format
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 21-Mar-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_fmn.c was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.13 | 15-Dec-2012 |
matt | Add initial support for XLP II (XLP2XX/XLP1XX).
|
| 1.1.2.12 | 30-Mar-2012 |
matt | Deal with station ids without names (not all XLS have all stations).
|
| 1.1.2.11 | 19-Jan-2012 |
matt | Unbreak things so that XLS/XLR boot again. :)
|
| 1.1.2.10 | 19-Jan-2012 |
matt | Change struct rmixl_cpu_softc to cpu_softc and remove casts.
Fix IPIs.
More FMN cleanup.
|
| 1.1.2.9 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.8 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.7 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.6 | 08-Feb-2011 |
cliff | - eliminate assumptions that cpuid 0 is primary
- distinguish between cpuid and cpu index.
|
| 1.1.2.5 | 05-Feb-2011 |
cliff | - obtain rmixl_intr_lock before rmixl_vec_establish(),
he expects that lock is held
|
| 1.1.2.4 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.3 | 13-Apr-2010 |
cliff | improve names to avoid confusion between storage and pointers
|
| 1.1.2.2 | 29-Mar-2010 |
cliff | - use the new chip-type-specific names for logical station IDs
- dimension fmn_intrhand[] by max number of station for any RMIXL chip type
- add FMN station tables and info for XLR; these are untested.
- rmixl_fmn_init_core() now calls chip-type-specific init subfunctions
which just grab the appropriate station table and info strutures.
|
| 1.1.2.1 | 21-Mar-2010 |
cliff | add device driver for RMI Fast Message Network
|
| 1.2.2.3 | 31-May-2011 |
rmind | sync with head
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_fmn.c was added on branch rmind-uvmplock on 2011-03-05 20:51:10 +0000
|
| 1.1 | 19-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_fmn_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 09-Aug-2012 |
matt | Deal with unallocated spill area in the fmn.
|
| 1.1.2.1 | 19-Jan-2012 |
matt | PCI attachments (mostly stubs) for most XLP devices.
|
| 1.5 | 06-Jun-2024 |
andvar | s/sation/station/ in comment.
|
| 1.4 | 29-Apr-2011 |
matt | Use mips64 for m[tf]c2, not arch=xlr
|
| 1.3 | 14-Apr-2011 |
matt | Use .set arch=xlr to access RMI specific instructions.
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 21-Mar-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_fmnvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.9 | 16-Feb-2012 |
matt | enable_cp2 needs a early clobber
|
| 1.1.2.8 | 19-Jan-2012 |
matt | Unbreak things so that XLS/XLR boot again. :)
|
| 1.1.2.7 | 19-Jan-2012 |
matt | Add more function prototypes.
|
| 1.1.2.6 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.5 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.4 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.3 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.2 | 29-Mar-2010 |
cliff | - logical station names are now chip-type-specific
- RMIXL_FMN_NSTID is the max number of station for any RMIXL chip type
|
| 1.1.2.1 | 21-Mar-2010 |
cliff | add device driver for RMI Fast Message Network
|
| 1.2.2.4 | 31-May-2011 |
rmind | sync with head
|
| 1.2.2.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_fmnvar.h was added on branch rmind-uvmplock on 2011-03-05 20:51:10 +0000
|
| 1.5 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.4 | 24-Apr-2021 |
thorpej | branches: 1.4.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.3 | 10-Jul-2011 |
matt | branches: 1.3.68;
Fix machine/ includes
|
| 1.2 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.1 | 18-Mar-2011 |
cliff | branches: 1.1.2; 1.1.6;
add gpio support for RMI XL* chips
|
| 1.1.6.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 18-Mar-2011 |
jruoho | file rmixl_gpio.c was added on branch jruoho-x86intr on 2011-06-06 09:06:09 +0000
|
| 1.1.2.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.2.1 | 18-Mar-2011 |
rmind | file rmixl_gpio.c was added on branch rmind-uvmplock on 2011-04-21 01:41:13 +0000
|
| 1.3.68.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.4.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 30-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_gpio_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.8 | 14-Nov-2013 |
matt | Deal with new interrupt structure.
|
| 1.1.2.7 | 15-Dec-2012 |
matt | Add initial support for XLP II (XLP2XX/XLP1XX).
|
| 1.1.2.6 | 19-Jan-2012 |
matt | Fix percpu usage.
|
| 1.1.2.5 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.4 | 31-Dec-2011 |
matt | Switch to using IST_<foo> instead of private enums.
|
| 1.1.2.3 | 31-Dec-2011 |
matt | Deal with the movement of some GPIO registers on the XPL3xx.
|
| 1.1.2.2 | 31-Dec-2011 |
matt | Fix xlgpio_pin_ctl inversion problem.
|
| 1.1.2.1 | 30-Dec-2011 |
matt | Add GPIO support for XLP.
Let NAND, MMC/SD, and SPI remove their pins from the GPIO available pin mask.
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_i2c.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_i2c_obio.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_i2c_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.3 | 19-Jan-2012 |
matt | Enable interrupts (even though they are not yet used).
|
| 1.1.2.2 | 27-Dec-2011 |
matt | Add commented out intr establishment.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_i2creg.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 31-Dec-2011 |
matt | Consolidate and complete PCITAGs.
Print/Set BARs for AHCI and SRIO.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_i2cvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.15 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.14 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.13 | 09-Apr-2022 |
riastradh | mips/rmixl: Insert appropriate membars around IPIs.
|
| 1.12 | 26-Aug-2016 |
skrll | Adjust evbmips_iointr to pass a clockframe pointer and use it for
pwmclock @ voyager.
Suggested by matt@
Hi macallan!
|
| 1.11 | 01-Aug-2016 |
dholland | PR 51384 David Binderman: don't shift into the void
|
| 1.10 | 23-Apr-2016 |
skrll | branches: 1.10.2;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.9 | 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.8 | 27-Sep-2011 |
jym | branches: 1.8.12; 1.8.30;
Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
| 1.7 | 10-Jul-2011 |
matt | Fix machine/ includes
|
| 1.6 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.5 | 29-Apr-2011 |
matt | minor constification, format cleanups
|
| 1.4 | 14-Apr-2011 |
cliff | - in evbmips_iointr(), call assembly function rmixl_eirr_ack()
to ack the EIRR, instead of using a bunch of asm() here.
- in rmixl_ipi_intr(), remove overly paranoid assert that the given
IPI request is pending; if the request is clear, it was previously processed.
- in rmixl_vecnames_common[], give ipi vectors unique (numbered) names
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_intr.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.39 | 14-Feb-2014 |
matt | Change KASSERTMSG/KDASSERTMSG to use varadic arguments like HEAD.
panic -> vpanic, add panic wrapper to vpanic.
|
| 1.1.2.38 | 05-Nov-2013 |
matt | Add XLP2XX support.
|
| 1.1.2.37 | 15-Dec-2012 |
matt | Add initial support for XLP II (XLP2XX/XLP1XX).
|
| 1.1.2.36 | 27-Feb-2012 |
matt | Add a test for recursive IPIs.
use __builtin_clzll
|
| 1.1.2.35 | 19-Jan-2012 |
matt | Change struct rmixl_cpu_softc to cpu_softc and remove casts.
Fix IPIs.
More FMN cleanup.
|
| 1.1.2.34 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.33 | 31-Dec-2011 |
matt | Switch to using IST_<foo> instead of private enums.
|
| 1.1.2.32 | 31-Dec-2011 |
matt | XLP8xx and XLP3xx have different IRT layouts.
|
| 1.1.2.31 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.30 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.29 | 08-Feb-2011 |
cliff | - in rmixl_intr_init_clk, use MIPS_INT_MASK_SHIFT instead of 8
when calculating vector number for clock.
|
| 1.1.2.28 | 08-Feb-2011 |
cliff | - use mutex_obj_alloc() instead of declaring locks statically
|
| 1.1.2.27 | 08-Feb-2011 |
cliff | - remove sc_ih_clk, sc_ih_fmn, sc_ih_ipi from struct rmixl_cpu_softc;
they were unused just taking up space
- rmixl_intr_init_clk() and rmixl_intr_init_ipi() are now type void
|
| 1.1.2.26 | 08-Feb-2011 |
cliff | - distinguish between cpuid and cpu index.
|
| 1.1.2.25 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for MULTIPROCESSOR dependency
- use seperate vectors for various IPI tags, instead of all piling on one.
this theoretically allows different functions to interrupt at different
priorities. the fmn vector number got rippled up in the process.
- add rmixl_ipi_lock to serialize access to RMIXL_PIC_IPIBASE
- add rmixl_intr_lock to serialize access to rest of PIC and rmixl_intrhand[]
- include mips/cpuset.h and use CPUSET_* macros for cpus_running &etc.
|
| 1.1.2.24 | 20-Sep-2010 |
cliff | - rmixl_intrhand_t is valid only if ih_func is non-NULL;
set valid at end of rmixl_vec_establish and
set invalid at start of rmixl_vec_disestablish
to allow lockless check if valid in dispatch.
|
| 1.1.2.23 | 26-Aug-2010 |
rmind | Fix non-DEBUG/DIAGNOSTIC builds of RMI mips64.
|
| 1.1.2.22 | 10-Jun-2010 |
cliff | - remove rmixl_spl_init_cpu calls from rmixl_intr_init_cpu
because rmixl_intr_init_cpu only runs on cpu#0.
rmixl_spl_init_cpu calls are now done in cpu_rmixl_atach (for cpu#0)
or cpu_rmixl_hatch (for other cpus).
- in evbmips_iointr, be sure to mask out count/compare interrupt
along with softints (these are handled elsewhere)
and improve coments
- fix bug in rmixl_send_ipi: 'cpus_running' is bit-indexed
by ci_index, not ci_cpuid
|
| 1.1.2.21 | 28-May-2010 |
cliff | rmixl_spl.S:
- where possible, stop using CP0 STATUS to disable all interrupts,zero EIMR instead. more efficient since less meddling with CP0.
assume STATUS[IE] is normally set.
- add rmixl_spl_init_cpu(), to initialize cp0 interrupt control for this cpu
rmixl_intr.c:
- rmixl_intr_init_cpu() calls rmixl_spl_init_cpu()
to set up CP0 interrupt controls for this cpu
|
| 1.1.2.20 | 21-May-2010 |
cliff | - rename IRT based interrupts to "pic int ..."
- rename rmixl_vecnames_common to "vec ..."
- move ipl_eimr_map table print into rmixl_ipl_eimr_map_print()
- consolidate debug print funcs at the end of the file
- 'irq' -- being somewhat ambiguous -- renamed to 'irt' throughout
to reflect use as IRT index
- IRT-based interrupts are moved to EIRR/EIMR vectors (bits) 32..63
to avoid all opverlap with EIRR/EIMR bits 0..7 which are CAUSE[8..15].
To date this has been a non-issue since we aren't using the
watchdog or timers there. non-IRT interrupts (FMN and IPI) are moved
to unused portion vectors 8, 9
- in rmixl_intr_init_cpu, instead of writing 0 to EIRR, ack with bits read
(excluding CAUSE[8..15] bits) as defense against possible stale
interrupts inherited from firmware (paranoid -- we aren't seeing any).
- rmixl_irt_establish gets a 'vec' arg for use in IRTENTRYC1 reg
(no longer assume vec = irt)
- set/clear irq bits in ipl_eimr_map[] during interrupt establish/disestablish
- in evbmips_iointr(), mask off ints enabled at higher ipl; we only
dispatch interrupts at highest enabling ipl.
|
| 1.1.2.19 | 06-May-2010 |
cliff | fix pcie IRQ assignments for XLS2xx
|
| 1.1.2.18 | 01-May-2010 |
cliff | in evbmips_iointr() for RMI, where we ack the EIRR,
replace (relatively expensive) splhigh()/splx()
protection with (more efficient) EIMR-based disable/restore.
|
| 1.1.2.17 | 12-Apr-2010 |
cliff | - establishing an ISR now takes 'mpsafe' arg
- obtain/release kernel lock around calls to non-mpsafe ISRs
|
| 1.1.2.16 | 29-Mar-2010 |
cliff | - add IRT-based interrupt names for XLR
- rmixl_intr_string() calls chip-type-specific functions
to get appropriate names table
|
| 1.1.2.15 | 21-Mar-2010 |
cliff | - rework to make full use of RMI extended interrupt management
provided by EIRR/EIMR registers
- depends on rmixl_spl.S
- add support for IRT based interrupt routing; for now we are still routing
all IRT interrupts to CPU#0.
- note that count/compare clock, IPI and FMN are handled by each CPU since
these are local interrupt sources.
- further changes are still needed for XLR and XLP support
|
| 1.1.2.14 | 28-Feb-2010 |
matt | Add #define __INTR_PRIVATE
|
| 1.1.2.13 | 23-Feb-2010 |
matt | Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that
in the interrupt init routine. There's a default ipl_sr_map will operate
correctly, but isn't performant.
|
| 1.1.2.12 | 16-Feb-2010 |
matt | Add __HAVE_PREEMPTION support for NetBSD/mips. Kill IPL_PREEMPT since it
isn't needed.
|
| 1.1.2.11 | 15-Feb-2010 |
matt | Adapt to the new interrupt framework for NetBSD/mips.
|
| 1.1.2.10 | 06-Feb-2010 |
cliff | - when establishing an intr, if malloc fails, be sure to splx on the way out
- in interrupt dispatch, when ack-ing EIRR, preserve the softint bits
|
| 1.1.2.9 | 06-Feb-2010 |
matt | A little constification and remove some old softintr cruft.
|
| 1.1.2.8 | 29-Jan-2010 |
cliff | - be more thorough about 'mips_cpu_id' based variations
- rip out pcie interrupt related debug stuff
- start thinking about MULTIPROCESSOR IRT entries in rmixl_intr_irt_init()
|
| 1.1.2.7 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.1.2.6 | 12-Dec-2009 |
cliff | - in ipl_sr_bits[], ensure ints for unused vectors are always disabled
and ensure that MIPS_INT_MASK_5 (clock) is enabled as needed
- break IRT entry management out into routines;
this allows e.g. setup of IRT entry for clock without all the
rest of rmixl_intr_irt_establish()
- evbmips_intr_init() now creates IRT entry for mips3 clock interrupt
|
| 1.1.2.5 | 13-Nov-2009 |
cliff | - KASSERT this interrupt code being used on XLS family CPU
|
| 1.1.2.4 | 09-Nov-2009 |
cliff | - multiple changes; make interrupts work
|
| 1.1.2.3 | 25-Sep-2009 |
cliff | chop out some test printf's
|
| 1.1.2.2 | 25-Sep-2009 |
cliff | rmixl gets interrupt support
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.3 | 31-May-2011 |
rmind | sync with head
|
| 1.2.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_intr.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.8.30.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.8.30.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.8.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.10.2.1 | 06-Aug-2016 |
pgoyette | Sync with HEAD
|
| 1.3 | 14-Apr-2011 |
cliff | - add compile time check in case NIPIS ever exceeds number of available vectors
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 21-Mar-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_intr.h was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.13 | 05-Nov-2013 |
matt | Add XLP2XX support.
|
| 1.1.2.12 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.11 | 31-Dec-2011 |
matt | Switch to using IST_<foo> instead of private enums.
|
| 1.1.2.10 | 30-Dec-2011 |
matt | Add GPIO support for XLP.
Let NAND, MMC/SD, and SPI remove their pins from the GPIO available pin mask.
|
| 1.1.2.9 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.8 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.7 | 08-Feb-2011 |
cliff | - remove sc_ih_clk, sc_ih_fmn, sc_ih_ipi from struct rmixl_cpu_softc;
they were unused just taking up space
- rmixl_intr_init_clk() and rmixl_intr_init_ipi() are now type void
|
| 1.1.2.6 | 05-Feb-2011 |
cliff | - protect option includes ("opt_multiprocessor.h") with #ifdef _KERNEL_OPT
|
| 1.1.2.5 | 05-Feb-2011 |
cliff | - include opt_multiprocessor.h for MULTIPROCESSOR dependency
- move RMIXL_INTRVEC_FMN to RMIXL_INTRVEC_IPI + NIPIS
since each IPI tag now has own vector
|
| 1.1.2.4 | 21-May-2010 |
cliff | - rename IRT based interrupts to "pic int ..."
- rename rmixl_vecnames_common to "vec ..."
- move ipl_eimr_map table print into rmixl_ipl_eimr_map_print()
- consolidate debug print funcs at the end of the file
- 'irq' -- being somewhat ambiguous -- renamed to 'irt' throughout
to reflect use as IRT index
- IRT-based interrupts are moved to EIRR/EIMR vectors (bits) 32..63
to avoid all opverlap with EIRR/EIMR bits 0..7 which are CAUSE[8..15].
To date this has been a non-issue since we aren't using the
watchdog or timers there. non-IRT interrupts (FMN and IPI) are moved
to unused portion vectors 8, 9
- in rmixl_intr_init_cpu, instead of writing 0 to EIRR, ack with bits read
(excluding CAUSE[8..15] bits) as defense against possible stale
interrupts inherited from firmware (paranoid -- we aren't seeing any).
- rmixl_irt_establish gets a 'vec' arg for use in IRTENTRYC1 reg
(no longer assume vec = irt)
- set/clear irq bits in ipl_eimr_map[] during interrupt establish/disestablish
- in evbmips_iointr(), mask off ints enabled at higher ipl; we only
dispatch interrupts at highest enabling ipl.
|
| 1.1.2.3 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.2 | 12-Apr-2010 |
cliff | - establishing an ISR now takes 'mpsafe' arg
- obtain/release kernel lock around calls to non-mpsafe ISRs
|
| 1.1.2.1 | 21-Mar-2010 |
cliff | - added this file of RMI interrupt stuff
|
| 1.2.2.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_intr.h was added on branch rmind-uvmplock on 2011-03-05 20:51:10 +0000
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 21-Aug-2019 |
msaitoh | branches: 1.5.10;
Fix typo (s/controler/controller/).
|
| 1.4 | 16-Sep-2018 |
skrll | interrupt has two 'r's
fix another typo while I'm here (flsah)
|
| 1.3 | 01-Jul-2011 |
dyoung | branches: 1.3.8; 1.3.54; 1.3.56;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 18-Mar-2011 |
cliff | branches: 1.2.2; 1.2.6;
- fix typo when clearing pre-existing intrs in attach
|
| 1.1 | 18-Mar-2011 |
cliff | - add support for Peripherals IO Bus for RMI XL* chips
|
| 1.2.6.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 18-Mar-2011 |
jruoho | file rmixl_iobus.c was added on branch jruoho-x86intr on 2011-06-06 09:06:09 +0000
|
| 1.2.2.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.2.1 | 18-Mar-2011 |
rmind | file rmixl_iobus.c was added on branch rmind-uvmplock on 2011-04-21 01:41:13 +0000
|
| 1.3.56.2 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.3.56.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.3.54.1 | 30-Sep-2018 |
pgoyette | Ssync with HEAD
|
| 1.3.8.3 | 19-Jan-2012 |
matt | Fix config ifattr.
|
| 1.3.8.2 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.3.8.1 | 01-Jul-2011 |
matt | file rmixl_iobus.c was added on branch matt-nb5-mips64 on 2011-12-27 19:58:19 +0000
|
| 1.5.10.6 | 05-Apr-2021 |
thorpej | Treat config_probe() as if it were a boolean function; don't compare
return value > 0... except for the odd balls, which are now really easy
to spot.
|
| 1.5.10.5 | 05-Apr-2021 |
thorpej | config_match() -> config_probe() for the straight-forward indirect config
cases. There are still a few odd balls using config_match() which should
be sorted out later.
|
| 1.5.10.4 | 04-Apr-2021 |
thorpej | CFARG_SUBMATCH -> CFARG_SEARCH for the indirect configuration uses.
|
| 1.5.10.3 | 03-Apr-2021 |
thorpej | Give config_attach() the tagged variadic argument treatment and
mechanically convert all call sites.
|
| 1.5.10.2 | 21-Mar-2021 |
thorpej | CFARG_IATTR usage audit:
If a device carries only one interface attribute, there is no need
to specify it when calling config_search(); that specification is
meant only to disambiguate which interface attribute (which is a
proxy for "what kind of attach args are being used") is having
children attached. cfparent_match() will take care of ensuring that
any potential children can attach to one of the parent's iterface
attributes, and if the parent only carries one, no disambiguation is
necessary.
|
| 1.5.10.1 | 20-Mar-2021 |
thorpej | The proliferation if config_search_*() and config_found_*() combinations
is a little absurd, so begin to tidy this up:
- Introduce a new cfarg_t enumerated type, that defines the types of
tag-value variadic arguments that can be passed to the various
config_*() functions (CFARG_SUBMATCH, CFARG_IATTR, and CFARG_LOCATORS,
for now, plus a CFARG_EOL sentinel).
- Collapse config_search_*() into config_search() that takes these
variadic arguments.
- Convert all call sites of config_search_*() to the new signature.
Noticed several incorrect usages along the way, which will be
audited in a future commit.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 01-Jul-2011 |
dyoung | branches: 1.3.8;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 18-Mar-2011 |
cliff | branches: 1.2.2; 1.2.6;
RMIXL_FLASH_BAR_MASK_MAX is __BITS(34,0)
so avoid using extent if that value overflows 'long'
|
| 1.1 | 18-Mar-2011 |
cliff | - add support for Peripherals IO Bus for RMI XL* chips
|
| 1.2.6.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 18-Mar-2011 |
jruoho | file rmixl_iobus_space.c was added on branch jruoho-x86intr on 2011-06-06 09:06:09 +0000
|
| 1.2.2.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.2.1 | 18-Mar-2011 |
rmind | file rmixl_iobus_space.c was added on branch rmind-uvmplock on 2011-04-21 01:41:13 +0000
|
| 1.3.8.2 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.3.8.1 | 01-Jul-2011 |
matt | file rmixl_iobus_space.c was added on branch matt-nb5-mips64 on 2011-12-27 19:58:19 +0000
|
| 1.2 | 21-Aug-2019 |
msaitoh | Fix typo (s/controler/controller/).
|
| 1.1 | 18-Mar-2011 |
cliff | branches: 1.1.2; 1.1.6; 1.1.14; 1.1.62;
- add support for Peripherals IO Bus for RMI XL* chips
|
| 1.1.62.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.1.14.2 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.1.14.1 | 18-Mar-2011 |
matt | file rmixl_iobusvar.h was added on branch matt-nb5-mips64 on 2011-12-27 19:58:19 +0000
|
| 1.1.6.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 18-Mar-2011 |
jruoho | file rmixl_iobusvar.h was added on branch jruoho-x86intr on 2011-06-06 09:06:09 +0000
|
| 1.1.2.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.2.1 | 18-Mar-2011 |
rmind | file rmixl_iobusvar.h was added on branch rmind-uvmplock on 2011-04-21 01:41:13 +0000
|
| 1.1 | 04-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_machdep.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.5 | 15-Dec-2012 |
matt | Add initial support for XLP II (XLP2XX/XLP1XX).
|
| 1.1.2.4 | 16-Feb-2012 |
matt | Add mips_ksegx_tlb_slot.
When casting pointers, use intptr_t so we get proper sign extension.
|
| 1.1.2.3 | 02-Feb-2012 |
matt | Fix XLP case where we weren't copying mem_clusters to avail_clusters.
|
| 1.1.2.2 | 27-Jan-2012 |
matt | Keep mem_clusters as the original amount of memory and add avail_cluster
as the edited version.
|
| 1.1.2.1 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.8 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.7 | 29-Sep-2022 |
skrll | Trailing whitespace
|
| 1.6 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.5 | 24-Apr-2021 |
thorpej | branches: 1.5.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.4 | 01-Jul-2011 |
dyoung | branches: 1.4.68;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_mainbus.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.7 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.6 | 16-Jan-2010 |
cliff | - mainbus now attaches cpunode's
|
| 1.1.2.5 | 13-Jan-2010 |
cliff | - clean up formatting in print functions
|
| 1.1.2.4 | 13-Jan-2010 |
cliff | - nuke mainbussearch()
- use config_found (vs. config_search_ia) for cpucore's and obio
- print L2 cache attributes
|
| 1.1.2.3 | 09-Nov-2009 |
cliff | - convert to CFATTACH_DECL_NEW & related
|
| 1.1.2.2 | 15-Sep-2009 |
cliff | some code cleanup
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_mainbus.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.4.68.7 | 05-Apr-2021 |
thorpej | Treat config_probe() as if it were a boolean function; don't compare
return value > 0... except for the odd balls, which are now really easy
to spot.
|
| 1.4.68.6 | 05-Apr-2021 |
thorpej | config_match() -> config_probe() for the straight-forward indirect config
cases. There are still a few odd balls using config_match() which should
be sorted out later.
|
| 1.4.68.5 | 04-Apr-2021 |
thorpej | CFARG_SUBMATCH -> CFARG_SEARCH for the indirect configuration uses.
|
| 1.4.68.4 | 03-Apr-2021 |
thorpej | Give config_attach() the tagged variadic argument treatment and
mechanically convert all call sites.
|
| 1.4.68.3 | 21-Mar-2021 |
thorpej | CFARG_IATTR usage audit:
If a device carries only one interface attribute, there is no need
to specify it when calling config_search(); that specification is
meant only to disambiguate which interface attribute (which is a
proxy for "what kind of attach args are being used") is having
children attached. cfparent_match() will take care of ensuring that
any potential children can attach to one of the parent's iterface
attributes, and if the parent only carries one, no disambiguation is
necessary.
|
| 1.4.68.2 | 20-Mar-2021 |
thorpej | Don't pass the autoconfig print routine as the aux pointer to the
indirect search routine. That argument slot is meant for "attach
args" structures, not function pointers. Besides, no one actually
used it anyway.
|
| 1.4.68.1 | 20-Mar-2021 |
thorpej | The proliferation if config_search_*() and config_found_*() combinations
is a little absurd, so begin to tidy this up:
- Introduce a new cfarg_t enumerated type, that defines the types of
tag-value variadic arguments that can be passed to the various
config_*() functions (CFARG_SUBMATCH, CFARG_IATTR, and CFARG_LOCATORS,
for now, plus a CFARG_EOL sentinel).
- Collapse config_search_*() into config_search() that takes these
variadic arguments.
- Convert all call sites of config_search_*() to the new signature.
Noticed several incorrect usages along the way, which will be
audited in a future commit.
|
| 1.5.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_nae.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 19-Jan-2012 |
matt | Fix CFATTACH_DECL_NEW so kernels build again.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_naereg.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 31-Dec-2011 |
matt | Consolidate and complete PCITAGs.
Print/Set BARs for AHCI and SRIO.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.8 | 10-May-2023 |
riastradh | mips: Use config_detach_children to reduce error branch bugs.
|
| 1.7 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.6 | 28-Jun-2011 |
ahoka | follow nand api changes
|
| 1.5 | 27-Mar-2011 |
ahoka | branches: 1.5.2; 1.5.6;
use nand_init_interface
|
| 1.4 | 18-Mar-2011 |
cliff | fix typo
|
| 1.3 | 18-Mar-2011 |
cliff | style improvements, input from matt@
|
| 1.2 | 18-Mar-2011 |
cliff | cosmetics
|
| 1.1 | 18-Mar-2011 |
cliff | - add NAND suport for RMI XL* chips
|
| 1.5.6.2 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.5.6.1 | 27-Mar-2011 |
jruoho | file rmixl_nand.c was added on branch jruoho-x86intr on 2011-06-06 09:06:10 +0000
|
| 1.5.2.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.5.2.1 | 27-Mar-2011 |
rmind | file rmixl_nand.c was added on branch rmind-uvmplock on 2011-04-21 01:41:13 +0000
|
| 1.1 | 27-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_nand_iobus.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.1 | 27-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_nand_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.4 | 14-Feb-2014 |
matt | Change KASSERTMSG/KDASSERTMSG to use varadic arguments like HEAD.
panic -> vpanic, add panic wrapper to vpanic.
|
| 1.1.2.3 | 05-Nov-2013 |
matt | Start of a nand for xlp3xx/xlp2xx.
|
| 1.1.2.2 | 30-Dec-2011 |
matt | Add GPIO support for XLP.
Let NAND, MMC/SD, and SPI remove their pins from the GPIO available pin mask.
|
| 1.1.2.1 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.1 | 27-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_nor_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 28-Dec-2011 |
matt | Add NOR support for XLP.
|
| 1.1.2.1 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.10 | 29-Sep-2022 |
skrll | Remove unnecessary include of <sys/malloc.h>.
|
| 1.9 | 22-Jan-2022 |
skrll | Ensure bus_dmatag_subregion is called with an inclusive max_addr
everywhere.
|
| 1.8 | 22-Jan-2022 |
skrll | Trailing whitespace
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 10-Jul-2011 |
matt | branches: 1.5.68;
Fix machine/ includes
|
| 1.4 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_obio.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.18 | 31-Dec-2011 |
matt | Switch to using IST_<foo> instead of private enums.
|
| 1.1.2.17 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.16 | 17-Apr-2010 |
cliff | - struct rmixl_config field 'rc_64bit_dmat' is now a bus_dma_tag_t
and initially points at 'rc_dma_tag' which provides the store area.
this allows rc_64bit_dmat to be subregioned for imposing
bounce-buffering if needed.
|
| 1.1.2.15 | 12-Apr-2010 |
cliff | - specifiy if mpsafe when establishing interrupts
(all are 'false' except comintr for now)
|
| 1.1.2.14 | 21-Mar-2010 |
cliff | - add use of the 'tmsk' locator
- adapt to new rmixl_intr_establish() args
- establishing the system bridge controller
address error interrupt is now explicitly XLS specific
|
| 1.1.2.13 | 24-Jan-2010 |
cliff | remove include of "obio.h"
|
| 1.1.2.12 | 20-Jan-2010 |
matt | cleanup attachments so that other mips cpus can use the same scheme.
|
| 1.1.2.11 | 13-Jan-2010 |
cliff | - don't match if attach arg name doesn;t match cf_name
|
| 1.1.2.10 | 10-Jan-2010 |
matt | Actually use a 32bit limit for the 32bit bus_dma_tag.
|
| 1.1.2.9 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.1.2.8 | 14-Dec-2009 |
cliff | - replace single bus space with two (big & little endian) bus spaces for obio
|
| 1.1.2.7 | 18-Nov-2009 |
cliff | - use PRIxBUSADDR, PRIxBUSSIZE formats as needed
|
| 1.1.2.6 | 15-Nov-2009 |
cliff | - use PRIxPADDR and PRIxPSIZE as needed when printing
bus address and size following change in typedef
- use new obio bus space
|
| 1.1.2.5 | 09-Nov-2009 |
cliff | - convert to CFATTACH_DECL_NEW & related
- add obio_dma_init_29() to allow DMA for addrs < 512MB
- obio_dma_init_32() and obio_dma_init_64() are TBD (#ifdef NOTYET)
- obio_bus_dmamap_sync() provides null DMA sync function, since
DMA is cache coherent
- rmixl_addr_error_init() establishes ISR for address error interrupt
|
| 1.1.2.4 | 15-Sep-2009 |
cliff | make functions static
|
| 1.1.2.3 | 15-Sep-2009 |
cliff | obio now provides both big endian and little endian bus spaces
to allow child devices to use according to access method needs
also preparing for dual bus_dma methods, one for addrs <4GB,
the other for all memory, including addrs >= 4GB
the bulk of XLS DMA work is still TBD
|
| 1.1.2.2 | 13-Sep-2009 |
cliff | improve how some config data are managed
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_obio.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.5.68.6 | 05-Apr-2021 |
thorpej | Treat config_probe() as if it were a boolean function; don't compare
return value > 0... except for the odd balls, which are now really easy
to spot.
|
| 1.5.68.5 | 05-Apr-2021 |
thorpej | config_match() -> config_probe() for the straight-forward indirect config
cases. There are still a few odd balls using config_match() which should
be sorted out later.
|
| 1.5.68.4 | 04-Apr-2021 |
thorpej | CFARG_SUBMATCH -> CFARG_SEARCH for the indirect configuration uses.
|
| 1.5.68.3 | 03-Apr-2021 |
thorpej | Give config_attach() the tagged variadic argument treatment and
mechanically convert all call sites.
|
| 1.5.68.2 | 21-Mar-2021 |
thorpej | CFARG_IATTR usage audit:
If a device carries only one interface attribute, there is no need
to specify it when calling config_search(); that specification is
meant only to disambiguate which interface attribute (which is a
proxy for "what kind of attach args are being used") is having
children attached. cfparent_match() will take care of ensuring that
any potential children can attach to one of the parent's iterface
attributes, and if the parent only carries one, no disambiguation is
necessary.
|
| 1.5.68.1 | 20-Mar-2021 |
thorpej | The proliferation if config_search_*() and config_found_*() combinations
is a little absurd, so begin to tidy this up:
- Introduce a new cfarg_t enumerated type, that defines the types of
tag-value variadic arguments that can be passed to the various
config_*() functions (CFARG_SUBMATCH, CFARG_IATTR, and CFARG_LOCATORS,
for now, plus a CFARG_EOL sentinel).
- Collapse config_search_*() into config_search() that takes these
variadic arguments.
- Convert all call sites of config_search_*() to the new signature.
Noticed several incorrect usages along the way, which will be
audited in a future commit.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 14-Dec-2009 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_obio_eb_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.2 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.1 | 14-Dec-2009 |
cliff | obio now has 2 bus spaces, one each for Big and Little Endian access
- delete rmixl_obio_space.c
- add rmixl_obio_eb_space.c, rmixl_obio_el_space.c
|
| 1.4 | 16-Sep-2021 |
andvar | fix various typos, mainly in comments.
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 14-Dec-2009 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_obio_el_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.2 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.1 | 14-Dec-2009 |
cliff | obio now has 2 bus spaces, one each for Big and Little Endian access
- delete rmixl_obio_space.c
- add rmixl_obio_eb_space.c, rmixl_obio_el_space.c
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_obio_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.6 | 14-Dec-2009 |
cliff | obio now has 2 bus spaces, one each for Big and Little Endian access
- delete rmixl_obio_space.c
- add rmixl_obio_eb_space.c, rmixl_obio_el_space.c
|
| 1.1.2.5 | 18-Nov-2009 |
cliff | - add extents for bus spaces
|
| 1.1.2.4 | 15-Nov-2009 |
cliff | - we don't need -el bus space for obio, get rid of it and clean up the naming
- delete rmixl_eb_space.c, rmixl_el_space.c
- add mixl_obio_space.c, provides -eb bus space for obio devices
|
| 1.1.2.3 | 15-Sep-2009 |
cliff | obio now provides both big endian and little endian bus spaces
to allow child devices to use according to access method needs
also preparing for dual bus_dma methods, one for addrs <4GB,
the other for all memory, including addrs >= 4GB
the bulk of XLS DMA work is still TBD
|
| 1.1.2.2 | 13-Sep-2009 |
cliff | improve how some config data are managed
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_obio_space.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.4 | 08-Jul-2011 |
dyoung | Just #include <sys/bus.h> instead of <machine/bus_dma.h>, which is going
away, soon.
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixl_obiovar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.10 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.9 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.8 | 21-Mar-2010 |
cliff | - add obio_tmsk interrupt routing mask to obio_attach_args
|
| 1.1.2.7 | 14-Dec-2009 |
cliff | - replace single bus space with two (big & little endian) bus spaces for obio
|
| 1.1.2.6 | 15-Nov-2009 |
cliff | - we don't need -el bus space for obio, get rid of it and clean up the naming
- delete rmixl_eb_space.c, rmixl_el_space.c
- add mixl_obio_space.c, provides -eb bus space for obio devices
|
| 1.1.2.5 | 13-Nov-2009 |
cliff | - define used to prevent recursive include gets renamed according to convention
|
| 1.1.2.4 | 09-Nov-2009 |
cliff | - convert to CFATTACH_DECL_NEW & related
- add bus_dma tags
- removed unused fields: sc_pci_dmat, rmixl_bus_mbst, rmixl_bus_mdt
- add PCI bus_space addrs and tags
|
| 1.1.2.3 | 15-Sep-2009 |
cliff | obio now provides both big endian and little endian bus spaces
to allow child devices to use according to access method needs
also preparing for dual bus_dma methods, one for addrs <4GB,
the other for all memory, including addrs >= 4GB
the bulk of XLS DMA work is still TBD
|
| 1.1.2.2 | 13-Sep-2009 |
cliff | improve how some config data are managed
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_obiovar.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.8 | 10-Nov-2021 |
msaitoh | s/endianess/endianness/
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 23-Apr-2016 |
skrll | branches: 1.5.32;
Merge nick-nhusb
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
|
| 1.4 | 01-Jul-2011 |
dyoung | branches: 1.4.12; 1.4.28; 1.4.30; 1.4.34;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.3 | 29-Apr-2011 |
matt | Provide OHCI companions devices to EHCI.
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 14-Dec-2009 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_ohci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.2 | 31-May-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.6 | 30-Dec-2011 |
matt | Change devices name from rmixl_* to xl*.
|
| 1.1.2.5 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.4 | 21-Mar-2010 |
cliff | - include rmixl_intr.h for externs
|
| 1.1.2.3 | 29-Jan-2010 |
cliff | - use rmixl_probe_4 to match
|
| 1.1.2.2 | 03-Jan-2010 |
cliff | - unconfuse bit defines for rmixl gpio RESET and RESET_CFG registers
|
| 1.1.2.1 | 14-Dec-2009 |
cliff | - add attach glue for ohci at XLS USB Interface
|
| 1.4.34.1 | 06-Sep-2016 |
skrll | First pass at netbsd-7 updated with USB code from HEAD
|
| 1.4.30.3 | 05-Dec-2014 |
skrll | Use int for return type for [eou]chi_init and motg_init.
|
| 1.4.30.2 | 03-Dec-2014 |
skrll | The grand renaming of structure members.
No functional change.
|
| 1.4.30.1 | 03-Dec-2014 |
skrll | Trailing whitespace.
|
| 1.4.28.1 | 05-Apr-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #1395):
share/man/man4/axe.4: netbsd-7-nhusb
share/man/man4/axen.4: netbsd-7-nhusb
share/man/man4/cdce.4: netbsd-7-nhusb
share/man/man4/uaudio.4: netbsd-7-nhusb
share/man/man4/ucom.4: netbsd-7-nhusb
share/man/man4/uep.4: netbsd-7-nhusb
share/man/man4/urtw.4: netbsd-7-nhusb
share/man/man4/usb.4: netbsd-7-nhusb
share/man/man4/uyap.4: netbsd-7-nhusb
share/man/man4/xhci.4: netbsd-7-nhusb
share/man/man9/usbdi.9: netbsd-7-nhusb
sys/arch/amd64/conf/ALL: netbsd-7-nhusb
sys/arch/amd64/conf/GENERIC: netbsd-7-nhusb
sys/arch/amiga/dev/slhci_zbus.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_otg.c: netbsd-7-nhusb
sys/arch/arm/allwinner/awin_usb.c: netbsd-7-nhusb
sys/arch/arm/amlogic/amlogic_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/at91/at91ohci.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm2835_dwctwo.c: netbsd-7-nhusb
sys/arch/arm/broadcom/bcm53xx_usb.c: netbsd-7-nhusb
sys/arch/arm/ep93xx/epohci.c: netbsd-7-nhusb
sys/arch/arm/gemini/obio_ehci.c: netbsd-7-nhusb
sys/arch/arm/imx/files.imx23: netbsd-7-nhusb
sys/arch/arm/imx/imxusb.c: netbsd-7-nhusb
sys/arch/arm/imx/imxusbreg.h: netbsd-7-nhusb
sys/arch/arm/omap/obio_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/omap3_ehci.c: netbsd-7-nhusb
sys/arch/arm/omap/omapl1x_ohci.c: netbsd-7-nhusb
sys/arch/arm/omap/tiotg.c: netbsd-7-nhusb
sys/arch/arm/s3c2xx0/ohci_s3c24x0.c: netbsd-7-nhusb
sys/arch/arm/samsung/exynos_usb.c: netbsd-7-nhusb
sys/arch/arm/xscale/pxa2x0_ohci.c: netbsd-7-nhusb
sys/arch/arm/zynq/zynq_usb.c: netbsd-7-nhusb
sys/arch/hpcarm/dev/nbp_slhci.c: netbsd-7-nhusb
sys/arch/hpcmips/dev/plumohci.c: netbsd-7-nhusb
sys/arch/i386/conf/ALL: netbsd-7-nhusb
sys/arch/i386/conf/GENERIC: netbsd-7-nhusb
sys/arch/i386/pci/gcscehci.c: netbsd-7-nhusb
sys/arch/luna68k/conf/GENERIC: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahci.c: netbsd-7-nhusb
sys/arch/mips/adm5120/dev/ahcivar.h: netbsd-7-nhusb
sys/arch/mips/alchemy/dev/ohci_aubus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ehci_arbus.c: netbsd-7-nhusb
sys/arch/mips/atheros/dev/ohci_arbus.c: netbsd-7-nhusb
sys/arch/mips/conf/files.adm5120: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ehci.c: netbsd-7-nhusb
sys/arch/mips/ralink/ralink_ohci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ehci.c: netbsd-7-nhusb
sys/arch/mips/rmi/rmixl_ohci.c: netbsd-7-nhusb
sys/arch/playstation2/dev/ohci_sbus.c: netbsd-7-nhusb
sys/arch/powerpc/booke/dev/pq3ehci.c: netbsd-7-nhusb
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c: netbsd-7-nhusb
sys/arch/x68k/dev/slhci_intio.c: netbsd-7-nhusb
sys/conf/files: netbsd-7-nhusb
sys/dev/cardbus/ehci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/ohci_cardbus.c: netbsd-7-nhusb
sys/dev/cardbus/uhci_cardbus.c: netbsd-7-nhusb
sys/dev/ic/sl811hs.c: netbsd-7-nhusb
sys/dev/ic/sl811hsvar.h: netbsd-7-nhusb
sys/dev/isa/slhci_isa.c: netbsd-7-nhusb
sys/dev/marvell/ehci_mv.c: netbsd-7-nhusb
sys/dev/pci/ehci_pci.c: netbsd-7-nhusb
sys/dev/pci/ohci_pci.c: netbsd-7-nhusb
sys/dev/pci/uhci_pci.c: netbsd-7-nhusb
sys/dev/pci/xhci_pci.c: netbsd-7-nhusb
sys/dev/pcmcia/slhci_pcmcia.c: netbsd-7-nhusb
sys/dev/usb/Makefile.usbdevs: netbsd-7-nhusb
sys/dev/usb/TODO: netbsd-7-nhusb
sys/dev/usb/TODO.usbmp: netbsd-7-nhusb
sys/dev/usb/aubtfwl.c: netbsd-7-nhusb
sys/dev/usb/auvitek.c: netbsd-7-nhusb
sys/dev/usb/auvitek_audio.c: netbsd-7-nhusb
sys/dev/usb/auvitek_dtv.c: netbsd-7-nhusb
sys/dev/usb/auvitek_i2c.c: netbsd-7-nhusb
sys/dev/usb/auvitek_video.c: netbsd-7-nhusb
sys/dev/usb/auvitekvar.h: netbsd-7-nhusb
sys/dev/usb/ehci.c: netbsd-7-nhusb
sys/dev/usb/ehcireg.h: netbsd-7-nhusb
sys/dev/usb/ehcivar.h: netbsd-7-nhusb
sys/dev/usb/emdtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_dtv.c: netbsd-7-nhusb
sys/dev/usb/emdtv_ir.c: netbsd-7-nhusb
sys/dev/usb/emdtvvar.h: netbsd-7-nhusb
sys/dev/usb/ezload.c: netbsd-7-nhusb
sys/dev/usb/ezload.h: netbsd-7-nhusb
sys/dev/usb/files.usb: netbsd-7-nhusb
sys/dev/usb/hid.c: netbsd-7-nhusb
sys/dev/usb/hid.h: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.c: netbsd-7-nhusb
sys/dev/usb/if_athn_usb.h: netbsd-7-nhusb
sys/dev/usb/if_atu.c: netbsd-7-nhusb
sys/dev/usb/if_atureg.h: netbsd-7-nhusb
sys/dev/usb/if_aue.c: netbsd-7-nhusb
sys/dev/usb/if_auereg.h: netbsd-7-nhusb
sys/dev/usb/if_axe.c: netbsd-7-nhusb
sys/dev/usb/if_axen.c: netbsd-7-nhusb
sys/dev/usb/if_axenreg.h: netbsd-7-nhusb
sys/dev/usb/if_axereg.h: netbsd-7-nhusb
sys/dev/usb/if_cdce.c: netbsd-7-nhusb
sys/dev/usb/if_cdcereg.h: netbsd-7-nhusb
sys/dev/usb/if_cue.c: netbsd-7-nhusb
sys/dev/usb/if_cuereg.h: netbsd-7-nhusb
sys/dev/usb/if_kue.c: netbsd-7-nhusb
sys/dev/usb/if_kuereg.h: netbsd-7-nhusb
sys/dev/usb/if_otus.c: netbsd-7-nhusb
sys/dev/usb/if_otusvar.h: netbsd-7-nhusb
sys/dev/usb/if_rum.c: netbsd-7-nhusb
sys/dev/usb/if_rumreg.h: netbsd-7-nhusb
sys/dev/usb/if_rumvar.h: netbsd-7-nhusb
sys/dev/usb/if_run.c: netbsd-7-nhusb
sys/dev/usb/if_runvar.h: netbsd-7-nhusb
sys/dev/usb/if_smsc.c: netbsd-7-nhusb
sys/dev/usb/if_smscreg.h: netbsd-7-nhusb
sys/dev/usb/if_smscvar.h: netbsd-7-nhusb
sys/dev/usb/if_udav.c: netbsd-7-nhusb
sys/dev/usb/if_udavreg.h: netbsd-7-nhusb
sys/dev/usb/if_upgt.c: netbsd-7-nhusb
sys/dev/usb/if_upgtvar.h: netbsd-7-nhusb
sys/dev/usb/if_upl.c: netbsd-7-nhusb
sys/dev/usb/if_ural.c: netbsd-7-nhusb
sys/dev/usb/if_uralreg.h: netbsd-7-nhusb
sys/dev/usb/if_uralvar.h: netbsd-7-nhusb
sys/dev/usb/if_url.c: netbsd-7-nhusb
sys/dev/usb/if_urlreg.h: netbsd-7-nhusb
sys/dev/usb/if_urndis.c: netbsd-7-nhusb
sys/dev/usb/if_urndisreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtw.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn.c: netbsd-7-nhusb
sys/dev/usb/if_urtwn_data.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnreg.h: netbsd-7-nhusb
sys/dev/usb/if_urtwnvar.h: netbsd-7-nhusb
sys/dev/usb/if_urtwreg.h: netbsd-7-nhusb
sys/dev/usb/if_zyd.c: netbsd-7-nhusb
sys/dev/usb/if_zydreg.h: netbsd-7-nhusb
sys/dev/usb/irmce.c: netbsd-7-nhusb
sys/dev/usb/moscom.c: netbsd-7-nhusb
sys/dev/usb/motg.c: netbsd-7-nhusb
sys/dev/usb/motgvar.h: netbsd-7-nhusb
sys/dev/usb/ohci.c: netbsd-7-nhusb
sys/dev/usb/ohcireg.h: netbsd-7-nhusb
sys/dev/usb/ohcivar.h: netbsd-7-nhusb
sys/dev/usb/pseye.c: netbsd-7-nhusb
sys/dev/usb/slurm.c: netbsd-7-nhusb
sys/dev/usb/stuirda.c: netbsd-7-nhusb
sys/dev/usb/u3g.c: netbsd-7-nhusb
sys/dev/usb/uark.c: netbsd-7-nhusb
sys/dev/usb/uatp.c: netbsd-7-nhusb
sys/dev/usb/uaudio.c: netbsd-7-nhusb
sys/dev/usb/uberry.c: netbsd-7-nhusb
sys/dev/usb/ubsa.c: netbsd-7-nhusb
sys/dev/usb/ubsa_common.c: netbsd-7-nhusb
sys/dev/usb/ubsavar.h: netbsd-7-nhusb
sys/dev/usb/ubt.c: netbsd-7-nhusb
sys/dev/usb/uchcom.c: netbsd-7-nhusb
sys/dev/usb/ucom.c: netbsd-7-nhusb
sys/dev/usb/ucomvar.h: netbsd-7-nhusb
sys/dev/usb/ucycom.c: netbsd-7-nhusb
sys/dev/usb/udl.c: netbsd-7-nhusb
sys/dev/usb/udl.h: netbsd-7-nhusb
sys/dev/usb/udsbr.c: netbsd-7-nhusb
sys/dev/usb/udsir.c: netbsd-7-nhusb
sys/dev/usb/uep.c: netbsd-7-nhusb
sys/dev/usb/uftdi.c: netbsd-7-nhusb
sys/dev/usb/uftdireg.h: netbsd-7-nhusb
sys/dev/usb/ugen.c: netbsd-7-nhusb
sys/dev/usb/ugensa.c: netbsd-7-nhusb
sys/dev/usb/uhci.c: netbsd-7-nhusb
sys/dev/usb/uhcireg.h: netbsd-7-nhusb
sys/dev/usb/uhcivar.h: netbsd-7-nhusb
sys/dev/usb/uhid.c: netbsd-7-nhusb
sys/dev/usb/uhidev.c: netbsd-7-nhusb
sys/dev/usb/uhidev.h: netbsd-7-nhusb
sys/dev/usb/uhmodem.c: netbsd-7-nhusb
sys/dev/usb/uhso.c: netbsd-7-nhusb
sys/dev/usb/uhub.c: netbsd-7-nhusb
sys/dev/usb/uipad.c: netbsd-7-nhusb
sys/dev/usb/uipaq.c: netbsd-7-nhusb
sys/dev/usb/uirda.c: netbsd-7-nhusb
sys/dev/usb/uirdavar.h: netbsd-7-nhusb
sys/dev/usb/ukbd.c: netbsd-7-nhusb
sys/dev/usb/ukbdmap.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.c: netbsd-7-nhusb
sys/dev/usb/ukyopon.h: netbsd-7-nhusb
sys/dev/usb/ulpt.c: netbsd-7-nhusb
sys/dev/usb/umass.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.c: netbsd-7-nhusb
sys/dev/usb/umass_isdata.h: netbsd-7-nhusb
sys/dev/usb/umass_quirks.c: netbsd-7-nhusb
sys/dev/usb/umass_quirks.h: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.c: netbsd-7-nhusb
sys/dev/usb/umass_scsipi.h: netbsd-7-nhusb
sys/dev/usb/umassvar.h: netbsd-7-nhusb
sys/dev/usb/umcs.c: netbsd-7-nhusb
sys/dev/usb/umct.c: netbsd-7-nhusb
sys/dev/usb/umidi.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.c: netbsd-7-nhusb
sys/dev/usb/umidi_quirks.h: netbsd-7-nhusb
sys/dev/usb/umodem.c: netbsd-7-nhusb
sys/dev/usb/umodem_common.c: netbsd-7-nhusb
sys/dev/usb/umodemvar.h: netbsd-7-nhusb
sys/dev/usb/ums.c: netbsd-7-nhusb
sys/dev/usb/uplcom.c: netbsd-7-nhusb
sys/dev/usb/urio.c: netbsd-7-nhusb
sys/dev/usb/urio.h: netbsd-7-nhusb
sys/dev/usb/usb.c: netbsd-7-nhusb
sys/dev/usb/usb.h: netbsd-7-nhusb
sys/dev/usb/usb_mem.c: netbsd-7-nhusb
sys/dev/usb/usb_mem.h: netbsd-7-nhusb
sys/dev/usb/usb_quirks.c: netbsd-7-nhusb
sys/dev/usb/usb_quirks.h: netbsd-7-nhusb
sys/dev/usb/usb_subr.c: netbsd-7-nhusb
sys/dev/usb/usbdevices.config: netbsd-7-nhusb
sys/dev/usb/usbdevs: netbsd-7-nhusb
sys/dev/usb/usbdevs.h: netbsd-7-nhusb
sys/dev/usb/usbdevs_data.h: netbsd-7-nhusb
sys/dev/usb/usbdi.c: netbsd-7-nhusb
sys/dev/usb/usbdi.h: netbsd-7-nhusb
sys/dev/usb/usbdi_util.c: netbsd-7-nhusb
sys/dev/usb/usbdi_util.h: netbsd-7-nhusb
sys/dev/usb/usbdivar.h: netbsd-7-nhusb
sys/dev/usb/usbhid.h: netbsd-7-nhusb
sys/dev/usb/usbhist.h: netbsd-7-nhusb
sys/dev/usb/usbroothub.c: netbsd-7-nhusb
sys/dev/usb/usbroothub.h: netbsd-7-nhusb
sys/dev/usb/usbroothub_subr.c: delete
sys/dev/usb/usbroothub_subr.h: delete
sys/dev/usb/uscanner.c: netbsd-7-nhusb
sys/dev/usb/uslsa.c: netbsd-7-nhusb
sys/dev/usb/usscanner.c: netbsd-7-nhusb
sys/dev/usb/ustir.c: netbsd-7-nhusb
sys/dev/usb/uthum.c: netbsd-7-nhusb
sys/dev/usb/utoppy.c: netbsd-7-nhusb
sys/dev/usb/uts.c: netbsd-7-nhusb
sys/dev/usb/uvideo.c: netbsd-7-nhusb
sys/dev/usb/uvisor.c: netbsd-7-nhusb
sys/dev/usb/uvscom.c: netbsd-7-nhusb
sys/dev/usb/uyap.c: netbsd-7-nhusb
sys/dev/usb/uyap_firmware.h: netbsd-7-nhusb
sys/dev/usb/uyurex.c: netbsd-7-nhusb
sys/dev/usb/x1input_rdesc.h: netbsd-7-nhusb
sys/dev/usb/xhci.c: netbsd-7-nhusb
sys/dev/usb/xhcireg.h: netbsd-7-nhusb
sys/dev/usb/xhcivar.h: netbsd-7-nhusb
sys/dev/usb/xinput_rdesc.h: netbsd-7-nhusb
sys/external/bsd/common/conf/files.linux: netbsd-7-nhusb
sys/external/bsd/common/include/linux/err.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/kernel.h: netbsd-7-nhusb
sys/external/bsd/common/include/linux/workqueue.h: netbsd-7-nhusb
sys/external/bsd/common/linux/linux_work.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/atombios_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/dist/drm/radeon/radeon_legacy_encoders.c: netbsd-7-nhusb
sys/external/bsd/drm2/drm/files.drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/i915drm/files.i915drmkms: netbsd-7-nhusb
sys/external/bsd/drm2/include/linux/err.h: delete
sys/external/bsd/drm2/include/linux/workqueue.h: delete
sys/external/bsd/drm2/linux/files.drmkms_linux: netbsd-7-nhusb
sys/external/bsd/drm2/linux/linux_work.c: delete
sys/external/bsd/dwc2/dwc2.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwc2var.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dwctwo2netbsd: netbsd-7-nhusb
sys/external/bsd/dwc2/conf/files.dwc2: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_core.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_coreintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcd.h: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdddma.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdintr.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c: netbsd-7-nhusb
sys/external/bsd/dwc2/dist/dwc2_hw.h: netbsd-7-nhusb
sys/modules/drmkms_linux/Makefile: netbsd-7-nhusb
sys/modules/i915drmkms/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libugenhc/ugenhc.c: netbsd-7-nhusb
sys/rump/dev/lib/libusb/Makefile: netbsd-7-nhusb
sys/rump/dev/lib/libusb/USB.ioconf: netbsd-7-nhusb
sys/rump/dev/lib/libusb/usb_at_ugenhc.c: delete
sys/rump/dev/lib/libusb/opt/opt_usb.h: delete
sys/rump/dev/lib/libusb/opt/opt_usbverbose.h: delete
sys/sys/mbuf.h: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.8: netbsd-7-nhusb
usr.sbin/usbdevs/usbdevs.c: netbsd-7-nhusb
Merge netbsd-7-nhusb:
- API / infrastructure changes to support memory management changes.
- Memory management improvements and bug fixes.
- HCDs should now be MP safe
- conversion to KERNHIST based debug
- FS/LS isoc support on ehci(4).
- conversion to kmem(9)
- Some USB 3 support - mostly from Takahiro HAYASHI (t-hash).
- interrupt transfers now get proper DMA operations
- general bug fixes
- kern/48308
- uhub status notification improvements
- umass(4) probe fix (applied to HEAD already)
- ohci(4) short transfer fix
- Change the SOFTINT level from NET to SERIAL for the USB softint handler.
This gives the callback a chance of running when another softint handler
at SOFTINT_NET has blocked holding a lock, e.g. softnet_lock and most of
the network stack.
- kern/49065 - ifconfig tun0 ... sequence locks up system / lockup:
softnet_lock held across usb xfr
- kern/50491 - unkillable wait in usbd_transfer while using usmsc0
on raspberry pi 2
- kern/51395 - USB Ethernet makes xhci hang
- Various improvements to slhci(4)
- Various improvements to dwc2(4)
|
| 1.4.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.32.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_pci_cfg_eb_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_pci_cfg_el_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 17-Apr-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_pci_cfg_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.2 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.1 | 17-Apr-2010 |
cliff | - rename "pcie" bus space files to "pci" to reflect common use
by either pcie or pcix, depending on RMI chip type.
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_pci_cfg_space.c was added on branch rmind-uvmplock on 2011-03-05 20:51:10 +0000
|
| 1.1 | 04-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_pci_eb_mem_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_pci_ecfg_eb_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_pci_ecfg_el_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 17-Apr-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_pci_ecfg_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.2 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.1 | 17-Apr-2010 |
cliff | - rename "pcie" bus space files to "pci" to reflect common use
by either pcie or pcix, depending on RMI chip type.
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_pci_ecfg_space.c was added on branch rmind-uvmplock on 2011-03-05 20:51:10 +0000
|
| 1.1 | 04-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_pci_el_mem_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 17-Apr-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_pci_io_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.2 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.1 | 17-Apr-2010 |
cliff | - rename "pcie" bus space files to "pci" to reflect common use
by either pcie or pcix, depending on RMI chip type.
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_pci_io_space.c was added on branch rmind-uvmplock on 2011-03-05 20:51:10 +0000
|
| 1.3 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 17-Apr-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_pci_mem_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.3 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.2 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.1 | 17-Apr-2010 |
cliff | - rename "pcie" bus space files to "pci" to reflect common use
by either pcie or pcix, depending on RMI chip type.
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_pci_mem_space.c was added on branch rmind-uvmplock on 2011-03-05 20:51:10 +0000
|
| 1.16 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.15 | 24-Apr-2021 |
thorpej | branches: 1.15.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.14 | 07-Jul-2020 |
thorpej | branches: 1.14.4;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:
==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.
This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.
- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.
|
| 1.13 | 10-Nov-2019 |
chs | in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.12 | 02-Oct-2015 |
msaitoh | branches: 1.12.18;
PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific
|
| 1.11 | 04-Apr-2014 |
christos | branches: 1.11.6;
adjust to pci_intr_string signature.
|
| 1.10 | 27-Oct-2012 |
chs | branches: 1.10.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.9 | 27-Jan-2012 |
para | branches: 1.9.6;
converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch
releng@ acknowledged
|
| 1.8 | 10-Jul-2011 |
matt | branches: 1.8.2; 1.8.6;
Fix machine/ includes
|
| 1.7 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.6 | 17-May-2011 |
dyoung | PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.
Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.
This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:
algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
|
| 1.5 | 14-Apr-2011 |
cliff | - in rmixl_pcie_intr_string(), convert irq to vector when calling
rmixl_intr_string()
|
| 1.4 | 04-Apr-2011 |
dyoung | Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.
For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:
Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.
siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.
slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.
viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.
While I'm here, make pci_mapreg_submap() static.
With these changes in place, I have tested the compilation of these
kernels:
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:
### evbmips-el GDIUM
nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop
### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'
### ia64 GENERIC
/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type
### sgimips GENERIC32_IP3x
crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 09-Nov-2009 |
cliff | branches: 1.1.2;
file rmixl_pcie.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.22 | 05-Nov-2013 |
matt | Add XLP2XX support.
|
| 1.1.2.21 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.20 | 31-Dec-2011 |
matt | Switch to using IST_<foo> instead of private enums.
|
| 1.1.2.19 | 27-Dec-2011 |
matt | Fix _LP64 compile issue.
|
| 1.1.2.18 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.17 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.16 | 20-Sep-2010 |
cliff | - provide lockless interrupt dispatch by eliminating use of LIST(9)
for interrupt handles. Handles are now managed in variable size arrays.
Establishing a new interrupt causes allocation of a new array, pointer
to which is changed atomically. Old arrays are allowed to persist for
some time before free, allowing any CPU working with that data
to safely finish using it.
- interrupt events are now managed per-CPU, avoid need for atomic adds.
|
| 1.1.2.15 | 26-Aug-2010 |
rmind | Fix non-DEBUG/DIAGNOSTIC builds of RMI mips64.
|
| 1.1.2.14 | 08-May-2010 |
matt | Rework the way interrupts are decided on. Don't use pa_bus since that's
arbitrary. Instead grab the device from pa_intrtag since that corresponds
to the PCIe bus we are actually attached to.
While I'm here, compact some switch statements into a few simple assignments.
|
| 1.1.2.13 | 06-May-2010 |
cliff | fix pcie IRQ assignments for XLS2xx
|
| 1.1.2.12 | 12-Apr-2010 |
cliff | - specifiy if mpsafe when establishing interrupts
(all are 'false' except comintr for now)
|
| 1.1.2.11 | 07-Apr-2010 |
cliff | - use new PCIE register & macro names
- use new bus space related field names in struct rmixl_config
- don't match if not running on an XLS chip
- rmixl_pcie_intr_string() properly decomposes pci_intr_handle_t to obtain irq
- in rmixl_pcie_make_pih() and rmixl_pcie_decompose_pih() KASSERTS,
no check for < 0 needed on unsigned
- fix assignment of 'other' in rmixl_pcie_intr_disestablish()
when bit number is >= 32
- in rmixl_pcie_intr_establish(), change = to == in a couple asserts
- in rmixl_pcie_intr_establish(), if rmixl_intr_establish() fails,
report irq properly in panic message
|
| 1.1.2.10 | 29-Mar-2010 |
cliff | - rmixl_physaddr_init_pcie discovers PCIE physical address regions from BARs
|
| 1.1.2.9 | 21-Mar-2010 |
cliff | - include rmixl_intr.h
- obtain interrupt routing mask from obio_attach_args,
pass along to rmixl_intr_establish
- cut out some dead (#if 0) code
- in rmixl_pcie_intr_establish(), construct interrupt event name
in the interrupt dispatch structure, not on the stack. also
improve the name.
|
| 1.1.2.8 | 29-Jan-2010 |
cliff | - rmixl_cache_err_dis, rmixl_cache_err_restore, rmixl_cache_err_check
inlines moved from here ro rmixlvar.h
- add a layer of interrupt dispatch to allow sharing link interrupts,
- enable and handle pcie link error interrupts
- initialize the PCIe INT and MSI config regs, make sure MSI ints are disabled!
- improve display names for link configurations
- be more thorough about 'mips_cpu_id' based variations
|
| 1.1.2.7 | 20-Jan-2010 |
matt | Adjust things to the new world order.
|
| 1.1.2.6 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.1.2.5 | 14-Dec-2009 |
cliff | fix typo
|
| 1.1.2.4 | 18-Nov-2009 |
cliff | - use PRIxBUSADDR as needed
- make cfg_oba, ecfg_oba type bus_addr_t
|
| 1.1.2.3 | 15-Nov-2009 |
cliff | - abandon XKPHYS mapping for access PCIe CFG and ECFG space, useless for N32
- rmixl_pcie_conf_read() and rmixl_pcie_conf_write() now use
rmixl_pcie_conf_setup() to establish bus space mappings for
access to PCIe CFG, ECFG space. The mappings are "lazy"
to allow successive accesses to the same (bus) in CFG space,
or to the same (bus, device) in ECFG space, to reuse the mapping.
|
| 1.1.2.2 | 13-Nov-2009 |
cliff | - rmixls_subr.S is replaced by rmixl_subr.S
- those subroutine names changed accordingly
|
| 1.1.2.1 | 09-Nov-2009 |
cliff | add driver and bus space for RMI XLS PCIe Interface
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.3 | 31-May-2011 |
rmind | sync with head
|
| 1.2.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_pcie.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.8.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.8.2.3 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.8.2.2 | 30-Oct-2012 |
yamt | sync with head
|
| 1.8.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.9.6.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.9.6.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.9.6.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.10.2.1 | 18-May-2014 |
rmind | sync with head
|
| 1.11.6.1 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.12.18.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.14.4.2 | 02-Apr-2021 |
thorpej | config_found_ia() -> config_found() w/ CFARG_IATTR.
|
| 1.14.4.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.15.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 15-Nov-2009 |
cliff | branches: 1.1.2;
file rmixl_pcie_cfg_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.4 | 17-Apr-2010 |
cliff | - rename "pcie" bus space files to "pci" to reflect common use
by either pcie or pcix, depending on RMI chip type.
|
| 1.1.2.3 | 07-Apr-2010 |
cliff | - these bus spaces can be used by pcix or pcie interfaces,
use names changed to reflet that
- also these files will soon be renamed accordingly
|
| 1.1.2.2 | 18-Nov-2009 |
cliff | - add extents for bus spaces
|
| 1.1.2.1 | 15-Nov-2009 |
cliff | add bus space for PCIe CFG and ECFG spaces
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_pcie_cfg_space.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 15-Nov-2009 |
cliff | branches: 1.1.2;
file rmixl_pcie_ecfg_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.4 | 17-Apr-2010 |
cliff | - rename "pcie" bus space files to "pci" to reflect common use
by either pcie or pcix, depending on RMI chip type.
|
| 1.1.2.3 | 07-Apr-2010 |
cliff | - these bus spaces can be used by pcix or pcie interfaces,
use names changed to reflet that
- also these files will soon be renamed accordingly
|
| 1.1.2.2 | 18-Nov-2009 |
cliff | - add extents for bus spaces
|
| 1.1.2.1 | 15-Nov-2009 |
cliff | add bus space for PCIe CFG and ECFG spaces
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_pcie_ecfg_space.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 09-Nov-2009 |
cliff | branches: 1.1.2;
file rmixl_pcie_io_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.4 | 17-Apr-2010 |
cliff | - rename "pcie" bus space files to "pci" to reflect common use
by either pcie or pcix, depending on RMI chip type.
|
| 1.1.2.3 | 07-Apr-2010 |
cliff | - these bus spaces can be used by pcix or pcie interfaces,
use names changed to reflet that
- also these files will soon be renamed accordingly
|
| 1.1.2.2 | 18-Nov-2009 |
cliff | - add extents for bus spaces
|
| 1.1.2.1 | 09-Nov-2009 |
cliff | add driver and bus space for RMI XLS PCIe Interface
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_pcie_io_space.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 09-Nov-2009 |
cliff | branches: 1.1.2;
file rmixl_pcie_mem_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.4 | 17-Apr-2010 |
cliff | - rename "pcie" bus space files to "pci" to reflect common use
by either pcie or pcix, depending on RMI chip type.
|
| 1.1.2.3 | 07-Apr-2010 |
cliff | - these bus spaces can be used by pcix or pcie interfaces,
use names changed to reflet that
- also these files will soon be renamed accordingly
|
| 1.1.2.2 | 18-Nov-2009 |
cliff | - add extents for bus spaces
|
| 1.1.2.1 | 09-Nov-2009 |
cliff | add driver and bus space for RMI XLS PCIe Interface
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_pcie_mem_space.c was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.1 | 05-Nov-2013 |
matt | branches: 1.1.2;
file rmixl_pcie_subr.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 05-Nov-2013 |
matt | Add XLP2XX support.
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 09-Nov-2009 |
cliff | branches: 1.1.2;
file rmixl_pcievar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.10 | 05-Nov-2013 |
matt | Add XLP2XX support.
|
| 1.1.2.9 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.8 | 20-Sep-2010 |
cliff | - provide lockless interrupt dispatch by eliminating use of LIST(9)
for interrupt handles. Handles are now managed in variable size arrays.
Establishing a new interrupt causes allocation of a new array, pointer
to which is changed atomically. Old arrays are allowed to persist for
some time before free, allowing any CPU working with that data
to safely finish using it.
- interrupt events are now managed per-CPU, avoid need for atomic adds.
|
| 1.1.2.7 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.6 | 07-Apr-2010 |
cliff | - rename bus space related fields in rmixl_pcie_softc
|
| 1.1.2.5 | 29-Mar-2010 |
cliff | - add extern decl/prototype for rmixl_physaddr_init_pcie()
|
| 1.1.2.4 | 21-Mar-2010 |
cliff | - add sc_tmsk interrupt routing mask to the softc
- add count_name for naming the evcnt count in
each struct rmixl_pcie_link_dispatch
|
| 1.1.2.3 | 29-Jan-2010 |
cliff | - add pcie interrupt dispatch stuff
|
| 1.1.2.2 | 15-Nov-2009 |
cliff | - abandon XKPHYS mapping for access PCIe CFG and ECFG space, useless for N32
- rmixl_pcie_conf_read() and rmixl_pcie_conf_write() now use
rmixl_pcie_conf_setup() to establish bus space mappings for
access to PCIe CFG, ECFG space. The mappings are "lazy"
to allow successive accesses to the same (bus) in CFG space,
or to the same (bus, device) in ECFG space, to reuse the mapping.
|
| 1.1.2.1 | 09-Nov-2009 |
cliff | add driver and bus space for RMI XLS PCIe Interface
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_pcievar.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.19 | 22-Jan-2022 |
skrll | Ensure bus_dmatag_subregion is called with an inclusive max_addr
everywhere.
|
| 1.18 | 22-Jan-2022 |
skrll | Trailing whitespace
|
| 1.17 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.16 | 24-Apr-2021 |
thorpej | branches: 1.16.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.15 | 07-Jul-2020 |
thorpej | branches: 1.15.4;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:
==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.
This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.
- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.
|
| 1.14 | 10-Nov-2019 |
chs | in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.13 | 02-Oct-2015 |
msaitoh | branches: 1.13.18;
PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific
|
| 1.12 | 04-Apr-2014 |
ozaki-r | branches: 1.12.6;
Adjust to pci_intr_string signature
|
| 1.11 | 11-Mar-2014 |
mrg | avoid set but unused variables.
move variables under their usage #ifdef.
|
| 1.10 | 27-Oct-2012 |
chs | branches: 1.10.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
|
| 1.9 | 10-Jul-2011 |
matt | branches: 1.9.2; 1.9.12;
Fix machine/ includes
|
| 1.8 | 01-Jul-2011 |
dyoung | #include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.7 | 17-May-2011 |
dyoung | PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.
Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.
This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:
algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
|
| 1.6 | 29-Apr-2011 |
matt | Use M_ZERO with malloc instead of doing a explicit memset
|
| 1.5 | 14-Apr-2011 |
cliff | - in rmixl_pcix_intr_string() convert irq to vector when calling
rmixl_intr_string()
- in rmixl_pcix_intr_establish(), initialize dispatch data 'counts' pointer
- in rmixl_pcix_pip_add_1(), zero out pip_new after allocated.
|
| 1.4 | 13-Apr-2011 |
cliff | initialize mutex in attach
|
| 1.3 | 04-Apr-2011 |
dyoung | Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.
For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:
Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.
siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.
slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.
viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.
While I'm here, make pci_mapreg_submap() static.
With these changes in place, I have tested the compilation of these
kernels:
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:
### evbmips-el GDIUM
nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop
### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'
### ia64 GENERIC
/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type
### sgimips GENERIC32_IP3x
crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 07-Apr-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_pcix.c was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.13 | 02-Feb-2012 |
matt | We use avail_clusters_cnt now.
|
| 1.1.2.12 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.11 | 31-Dec-2011 |
matt | Switch to using IST_<foo> instead of private enums.
|
| 1.1.2.10 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.9 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.8 | 13-Apr-2011 |
cliff | initialize mutex in attach
|
| 1.1.2.7 | 20-Sep-2010 |
cliff | - provide lockless interrupt dispatch by eliminating use of LIST(9)
for interrupt handles. Handles are now managed in variable size arrays.
Establishing a new interrupt causes allocation of a new array, pointer
to which is changed atomically. Old arrays are allowed to persist for
some time before free, allowing any CPU working with that data
to safely finish using it.
- interrupt events are now managed per-CPU, avoid need for atomic adds.
|
| 1.1.2.6 | 26-Aug-2010 |
rmind | Fix non-DEBUG/DIAGNOSTIC builds of RMI mips64.
|
| 1.1.2.5 | 17-Apr-2010 |
cliff | - in rmixl_pcix_attach() use bus_dmatag_subregion() to set up
bounce buffering for non-DMA-accessible RAM addrs
|
| 1.1.2.4 | 16-Apr-2010 |
cliff | - in attach, if Host BAR does not cover all RAM, instead of panic,
complain a lot, and force use of DMA bounce buffers
|
| 1.1.2.3 | 12-Apr-2010 |
cliff | - specifiy if mpsafe when establishing interrupts
(all are 'false' except comintr for now)
|
| 1.1.2.2 | 12-Apr-2010 |
cliff | - add bit defines for HOST_MODE_CTL reg
- panic if Host BAR regs do not cover RAM addrs 0..mem_cluster_maxaddr
|
| 1.1.2.1 | 07-Apr-2010 |
cliff | - add driver for RMI XLR PCI-X interface
|
| 1.2.2.4 | 31-May-2011 |
rmind | sync with head
|
| 1.2.2.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_pcix.c was added on branch rmind-uvmplock on 2011-03-05 20:51:11 +0000
|
| 1.9.12.3 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.9.12.2 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.9.12.1 | 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.9.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.9.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.10.2.1 | 18-May-2014 |
rmind | sync with head
|
| 1.12.6.1 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.13.18.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.15.4.2 | 02-Apr-2021 |
thorpej | config_found_ia() -> config_found() w/ CFARG_IATTR.
|
| 1.15.4.1 | 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.16.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 07-Apr-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_pcixvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.4 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.3 | 20-Sep-2010 |
cliff | - provide lockless interrupt dispatch by eliminating use of LIST(9)
for interrupt handles. Handles are now managed in variable size arrays.
Establishing a new interrupt causes allocation of a new array, pointer
to which is changed atomically. Old arrays are allowed to persist for
some time before free, allowing any CPU working with that data
to safely finish using it.
- interrupt events are now managed per-CPU, avoid need for atomic adds.
|
| 1.1.2.2 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.1 | 07-Apr-2010 |
cliff | - add driver for RMI XLR PCI-X interface
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_pcixvar.h was added on branch rmind-uvmplock on 2011-03-05 20:51:11 +0000
|
| 1.1 | 19-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_pke_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 19-Jan-2012 |
matt | PCI attachments (mostly stubs) for most XLP devices.
|
| 1.1 | 19-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_poe_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 19-Jan-2012 |
matt | PCI attachments (mostly stubs) for some XLP devices.
POE = Packet Ordering Engine
SAE = Security Acceleration Engine
|
| 1.1 | 19-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_poereg.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 19-Jan-2012 |
matt | PCI attachments (mostly stubs) for some XLP devices.
POE = Packet Ordering Engine
SAE = Security Acceleration Engine
|
| 1.1 | 19-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_rxe_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 19-Jan-2012 |
matt | PCI attachments (mostly stubs) for most XLP devices.
|
| 1.1 | 19-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_sae_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 19-Jan-2012 |
matt | PCI attachments (mostly stubs) for some XLP devices.
POE = Packet Ordering Engine
SAE = Security Acceleration Engine
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_sdhc.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 15-Feb-2014 |
matt | HAS_CGM -> HAVE_CGM (like current)
Add 32BIT_ACCESS
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_sdhcvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_sdio.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 30-Dec-2011 |
matt | Add GPIO support for XLP.
Let NAND, MMC/SD, and SPI remove their pins from the GPIO available pin mask.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 27-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_spi_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 30-Dec-2011 |
matt | Add GPIO support for XLP.
Let NAND, MMC/SD, and SPI remove their pins from the GPIO available pin mask.
|
| 1.1.2.1 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.7 | 01-Sep-2021 |
andvar | fix few typos in comments.
|
| 1.6 | 01-Dec-2020 |
skrll | Trailing whitespace
|
| 1.5 | 26-Jul-2020 |
simonb | branches: 1.5.2;
Use EIMR/EIRR regs definitions from <mips/cpuregs.h>
|
| 1.4 | 19-Jun-2015 |
matt | Don't include <machine/param.h>
|
| 1.3 | 14-Apr-2011 |
cliff | branches: 1.3.14; 1.3.32;
- remove most of the PARANOIA code
- add COP0_SYNC and JR_HB_RA following CP0 after all
writes to STATUS or EIMR that change interrupt control.
- all interrupt control now done w/ EIMR, except for
initial set of IE in STATUS.
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge forward from matt-nb5-mips64.
|
| 1.1 | 21-Mar-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file rmixl_spl.S was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.6 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.5 | 20-Sep-2010 |
cliff | - .set noreorder up top to avoid instruction reordering
- adopt bugfix suggested by Manuel Boyer for mips/spl.S:
in _splraise and _splsw_splhigh, reload L_CPU in case we were
preempted prior to interrupts being blocked (thanks).
|
| 1.1.2.4 | 28-May-2010 |
cliff | rmixl_spl.S:
- where possible, stop using CP0 STATUS to disable all interrupts,zero EIMR instead. more efficient since less meddling with CP0.
assume STATUS[IE] is normally set.
- add rmixl_spl_init_cpu(), to initialize cp0 interrupt control for this cpu
rmixl_intr.c:
- rmixl_intr_init_cpu() calls rmixl_spl_init_cpu()
to set up CP0 interrupt controls for this cpu
|
| 1.1.2.3 | 21-May-2010 |
cliff | - turn off PARANOIA
- except for softintr irqs, ipl_eimr_map is no longer const;
all other irq bits are set/cleared at interrupt establish/disestablish
- add _splsw_splddb
- in _splsw_splintr, correct the return IPL_NONE case, and clarify some comments
|
| 1.1.2.2 | 14-Apr-2010 |
cliff | insert nop in delay slots
- at end of _splsw_splvm and
- inside _splsw_splint
|
| 1.1.2.1 | 21-Mar-2010 |
cliff | add splswitch variant using RMI chip-specific EIRR/EIMR interrupt extensions
|
| 1.2.2.3 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file rmixl_spl.S was added on branch rmind-uvmplock on 2011-03-05 20:51:11 +0000
|
| 1.3.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.3.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.2.1 | 14-Dec-2020 |
thorpej | Sync w/ HEAD.
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_srio_mem_space.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 19-Jan-2012 |
matt | branches: 1.1.2;
file rmixl_srio_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 19-Jan-2012 |
matt | PCI attachments (mostly stubs) for most XLP devices.
|
| 1.7 | 26-Jul-2020 |
simonb | Use EIMR/EIRR regs definitions from <mips/cpuregs.h>
|
| 1.6 | 07-Jun-2015 |
matt | Define COP0 register that use select value in <mips/cpuregs.h>
Use those new definitions
|
| 1.5 | 14-Apr-2011 |
matt | branches: 1.5.14; 1.5.32;
Use .set arch=xlr to access RMI specific instructions.
|
| 1.4 | 14-Apr-2011 |
cliff | - fix RCSID
- add rmixl_eirr_ack() to ack the EIRR, using COP0_SYNC & JR_HB_RA as needed
- in rmixl_cpu_trampoline, remove old KSEG0 address reconstruction
of trampoline args pointer, and comment/explain the new way
- also in rmixl_cpu_trampoline, remove old watchpoint hack used for debugging
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Nov-2009 |
cliff | branches: 1.1.2;
file rmixl_subr.S was initially added on branch matt-nb5-mips64.
|
| 1.1.2.12 | 19-Jan-2012 |
matt | KX needs to be enabled for n32
|
| 1.1.2.11 | 06-Dec-2011 |
matt | Use MIPS_COP_0_OSSCRATCH instead $22
|
| 1.1.2.10 | 03-Dec-2011 |
matt | Rework things a bit for the XLR/XLS/XLP TLB. Before dealing with the TLB when
MP on the XL?, disable interrupts and take out a lock to prevent concurrent
updates to the TLB. In the TLB miss and invalid exception handlers, if the
lock is already owned by another CPU, simply return from the exception and
let it continue or restart as appropriate. This prevents concurrent TLB
exceptions in multiple threads from possibly updating the TLB multiple times
for a single address.
|
| 1.1.2.9 | 26-May-2011 |
matt | Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
|
| 1.1.2.8 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.7 | 13-Apr-2010 |
cliff | add TNF License and copyright.
|
| 1.1.2.6 | 22-Mar-2010 |
cliff | - in rmixlfw_wakeup_cpu, properly nuke the upper half of sp
before OR-ing in KSEG0_START. This is only needed in _LP64 case.
- in rmixl_cpu_trampoline:
trampoline args addr needs reconstructing the upper half only in _LP64 case.
delete set of MIPS_SR_INT_IE bit.
use REG_L instead of PTR_L to load trampoline args
so we get 64 bit loads in both 32 and 64 bit kernels.
|
| 1.1.2.5 | 21-Mar-2010 |
cliff | - add rmixlfw_wakeup_cpu, performs callback to RMI firmware wakeup function
- add rmixl_cpu_trampoline, entry point for CPU wakeup following
RMI firmware wakeup callback.
|
| 1.1.2.4 | 10-Feb-2010 |
cliff | save gp and t8 before callback to firmware
|
| 1.1.2.3 | 24-Jan-2010 |
cliff | - cpu_rmixl_attach calls cpu_setup_trampoline to get control of
subordinate CPUs from firmware by using the 'wakeup' callback method
and into cpu_wakeup_trampoline where they just spin pending further work.
- the callback requires re-basing the stack pointer to be in KSEG0,
done in asm subroutine rmixlfw_wakeup_cpu
|
| 1.1.2.2 | 31-Dec-2009 |
matt | Indicate that some RMI mfcr/mtcr can't be used in O32
|
| 1.1.2.1 | 13-Nov-2009 |
cliff | - rmixls_subr.S is replaced by rmixl_subr.S
- those subroutine names changed accordingly
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixl_subr.S was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
|
| 1.5.32.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.5.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.6 | 24-Apr-2021 |
thorpej | branches: 1.6.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.5 | 01-Jul-2011 |
dyoung | branches: 1.5.68;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.4 | 29-Apr-2011 |
matt | Provide OHCI companions devices to EHCI.
|
| 1.3 | 14-Apr-2011 |
cliff | - report of BIST result is information only; don't fail attach because of it
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 14-Dec-2009 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_usbi.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.3 | 31-May-2011 |
rmind | sync with head
|
| 1.1.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.11 | 19-Jan-2012 |
matt | Fix config ifattr.
|
| 1.1.2.10 | 31-Dec-2011 |
matt | Switch to using IST_<foo> instead of private enums.
|
| 1.1.2.9 | 30-Dec-2011 |
matt | Change devices name from rmixl_* to xl*.
|
| 1.1.2.8 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.7 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.6 | 05-Feb-2011 |
cliff | - if obio_intr is OBIOCF_INTR_DEFAULT, don't establish an interrupt
|
| 1.1.2.5 | 12-Apr-2010 |
cliff | - specifiy if mpsafe when establishing interrupts
(all are 'false' except comintr for now)
|
| 1.1.2.4 | 21-Mar-2010 |
cliff | - obtain interrupt routing mask from obio_attach_args,
pass along to rmixl_intr_establish
|
| 1.1.2.3 | 29-Jan-2010 |
cliff | - use rmixl_probe_4 to match
- fail attach if USB interface is disabled GPIO LOW_PWR_DIS reg (?)
- fail attach if USB interface BIST failed (?)
- enable HW byteswap enable if LITTLE_ENDIAN
|
| 1.1.2.2 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.1.2.1 | 14-Dec-2009 |
cliff | - add driver for XLS USB Interface
|
| 1.5.68.6 | 05-Apr-2021 |
thorpej | Treat config_probe() as if it were a boolean function; don't compare
return value > 0... except for the odd balls, which are now really easy
to spot.
|
| 1.5.68.5 | 05-Apr-2021 |
thorpej | config_match() -> config_probe() for the straight-forward indirect config
cases. There are still a few odd balls using config_match() which should
be sorted out later.
|
| 1.5.68.4 | 04-Apr-2021 |
thorpej | CFARG_SUBMATCH -> CFARG_SEARCH for the indirect configuration uses.
|
| 1.5.68.3 | 03-Apr-2021 |
thorpej | Give config_attach() the tagged variadic argument treatment and
mechanically convert all call sites.
|
| 1.5.68.2 | 21-Mar-2021 |
thorpej | CFARG_IATTR usage audit:
If a device carries only one interface attribute, there is no need
to specify it when calling config_search(); that specification is
meant only to disambiguate which interface attribute (which is a
proxy for "what kind of attach args are being used") is having
children attached. cfparent_match() will take care of ensuring that
any potential children can attach to one of the parent's iterface
attributes, and if the parent only carries one, no disambiguation is
necessary.
|
| 1.5.68.1 | 20-Mar-2021 |
thorpej | The proliferation if config_search_*() and config_found_*() combinations
is a little absurd, so begin to tidy this up:
- Introduce a new cfarg_t enumerated type, that defines the types of
tag-value variadic arguments that can be passed to the various
config_*() functions (CFARG_SUBMATCH, CFARG_IATTR, and CFARG_LOCATORS,
for now, plus a CFARG_EOL sentinel).
- Collapse config_search_*() into config_search() that takes these
variadic arguments.
- Convert all call sites of config_search_*() to the new signature.
Noticed several incorrect usages along the way, which will be
audited in a future commit.
|
| 1.6.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.4 | 08-Jul-2011 |
dyoung | Just #include <sys/bus.h> instead of <machine/bus_dma.h>, which is going
away, soon.
|
| 1.3 | 29-Apr-2011 |
matt | Provide OHCI companions devices to EHCI.
|
| 1.2 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.1 | 14-Dec-2009 |
cliff | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file rmixl_usbivar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.2 | 31-May-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.2 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.1 | 14-Dec-2009 |
cliff | - add driver for XLS USB Interface
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_xlnae.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_xlnae_obio.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixl_xlnae_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1 | 24-Dec-2011 |
matt | branches: 1.1.2;
file rmixlp_pcie.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.10 | 05-Nov-2013 |
matt | Add XLP2XX support.
|
| 1.1.2.9 | 15-Dec-2012 |
matt | Add initial support for XLP II (XLP2XX/XLP1XX).
|
| 1.1.2.8 | 09-Jan-2012 |
matt | Use a map of bar0 sizes instead of a switch statement.
Return the proper IRT entry for the 2nd i2c controller.
|
| 1.1.2.7 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.6 | 31-Dec-2011 |
matt | Switch to using IST_<foo> instead of private enums.
|
| 1.1.2.5 | 31-Dec-2011 |
matt | Consolidate and complete PCITAGs.
Print/Set BARs for AHCI and SRIO.
|
| 1.1.2.4 | 30-Dec-2011 |
matt | Cleanup USB byte swap support.
|
| 1.1.2.3 | 28-Dec-2011 |
matt | Cleanup aprint*
|
| 1.1.2.2 | 27-Dec-2011 |
matt | Make it compile if PCI_NETBSD_CONFIGURE is not present.
|
| 1.1.2.1 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.6 | 03-May-2025 |
riastradh | mips: Include opt_cputype.h before any of the flags it defines.
PR port-evbmips/59385: PGSHIFT is inconsistently defined on MIPS
|
| 1.5 | 24-Jul-2021 |
andvar | branches: 1.5.16;
Fix all remaining typos, mainly in comments but also in few definitions and log messages, reported by me in PR kern/54889.
Also fixed some additional typos in comments, found on review of same files or typos.
|
| 1.4 | 18-Mar-2011 |
cliff | branches: 1.4.72;
- add register & bit defines for GPIO, Peripherals IO Bus, Flash, NAND
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixlreg.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.22 | 05-Nov-2013 |
matt | Add XLP2XX support.
|
| 1.1.2.21 | 15-Dec-2012 |
matt | Add initial support for XLP II (XLP2XX/XLP1XX).
|
| 1.1.2.20 | 19-Jan-2012 |
matt | Fix IPI_CTRL_MAKE for RMIXLP
Correct PCITAGs for CDE/SRIO/RXE.
|
| 1.1.2.19 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.18 | 31-Dec-2011 |
matt | Consolidate and complete PCITAGs.
Print/Set BARs for AHCI and SRIO.
|
| 1.1.2.17 | 31-Dec-2011 |
matt | Deal with the movement of some GPIO registers on the XPL3xx.
|
| 1.1.2.16 | 30-Dec-2011 |
matt | Add GPIO support for XLP.
Let NAND, MMC/SD, and SPI remove their pins from the GPIO available pin mask.
|
| 1.1.2.15 | 28-Dec-2011 |
matt | Add NOR support for XLP.
|
| 1.1.2.14 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.1.2.13 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.12 | 01-May-2010 |
cliff | correct offset for RMIXL_FMN_BS_SGMII_FCB1
|
| 1.1.2.11 | 07-Apr-2010 |
cliff | - add PCI-X regs
- improve names for XLR and XLS specific and common
PCI-X, PCIe regs and macros
|
| 1.1.2.10 | 24-Mar-2010 |
cliff | shift enable bits into correct field in RMIXL_PIC_CONTROL_TIMER_ENBn() macro
|
| 1.1.2.9 | 21-Mar-2010 |
cliff | - add defines for Coprocessor 2 (FMN) registers
- add defines for non-CPU-core FMN bucket size and credit counter regs
arch/mips/rmi/rmixlvar.h
|
| 1.1.2.8 | 29-Jan-2010 |
cliff | - add RMIXL_ADDR_ERR_DEVICE_MASK_2 reg
- add RMIXL_GPIO_LOW_PWR_DIS bit defines
|
| 1.1.2.7 | 17-Jan-2010 |
cliff | - fix RMIXL_PIC_IPIBASE register bits
|
| 1.1.2.6 | 03-Jan-2010 |
cliff | - unconfuse bit defines for rmixl gpio RESET and RESET_CFG registers
|
| 1.1.2.5 | 14-Dec-2009 |
cliff | - add bit defines for GPIO_RESET register
- add register defines for USB
|
| 1.1.2.4 | 09-Nov-2009 |
cliff | - RMIXL_IOREG_READ, RMIXL_IOREG_WRITE provide general use ops for
accessing on-chip DEV_IO regs w/ Big Endian byte order.
- add System Bridge Controller registers defines
- add Address Error registers defines
- add DRAM register defines
- add GPIO signal and system control register offsets
- add PCIE Interface controller register offsets
- fix typo for RMIXL_PIC_INTRACK
- add RMIXL_PIC_IRTENTRYC0_RESV
|
| 1.1.2.3 | 25-Sep-2009 |
cliff | define some fields for reserved register bits
|
| 1.1.2.2 | 15-Sep-2009 |
cliff | add som XLS PIC register defines
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixlreg.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:42 +0000
|
| 1.4.72.1 | 01-Aug-2021 |
thorpej | Sync with HEAD.
|
| 1.5.16.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.1 | 09-Nov-2009 |
cliff | branches: 1.1.2;
file rmixls_subr.S was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 13-Nov-2009 |
cliff | - rmixls_subr.S is replaced by rmixl_subr.S
- those subroutine names changed accordingly
|
| 1.1.2.1 | 09-Nov-2009 |
cliff | this is a temporary place to park some trivial .S stuff until they can find a better home
|
| 1.7 | 11-Mar-2014 |
mrg | avoid set but unused variables.
move variables under their usage #ifdef.
|
| 1.6 | 01-Jul-2011 |
dyoung | branches: 1.6.2; 1.6.12; 1.6.16;
#include <sys/bus.h> instead of <machine/bus.h>.
|
| 1.5 | 14-Apr-2011 |
cliff | - add prototype for rmixl_eirr_ack()
|
| 1.4 | 18-Mar-2011 |
cliff | - add to struct rmixl_config storage for IO Peripherals Bus
base address, address mask, and bus space.
|
| 1.3 | 20-Feb-2011 |
matt | Merge forward from matt-nb5-mips64.
|
| 1.2 | 14-Dec-2009 |
matt | branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.1 | 13-Sep-2009 |
cliff | branches: 1.1.2;
file rmixlvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.2.27 | 15-Dec-2012 |
matt | Add initial support for XLP II (XLP2XX/XLP1XX).
|
| 1.1.2.26 | 19-Jan-2012 |
matt | Improved true/false for cpu_rmixl?
|
| 1.1.2.25 | 04-Jan-2012 |
matt | Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.
|
| 1.1.2.24 | 30-Dec-2011 |
matt | Add a field to track available GPIO pins.
|
| 1.1.2.23 | 28-Dec-2011 |
matt | Add NOR support for XLP.
|
| 1.1.2.22 | 27-Dec-2011 |
matt | Add NOR/NAND (from HEAD)/SPI attachments.
|
| 1.1.2.21 | 24-Dec-2011 |
matt | Add XLP support (i2c, console, pci, sdhc works).
|
| 1.1.2.20 | 29-Apr-2011 |
matt | Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
|
| 1.1.2.19 | 07-Jan-2011 |
cliff | - add prottotype for rmixl_pcr_init_core()
|
| 1.1.2.18 | 17-Apr-2010 |
cliff | - struct rmixl_config field 'rc_64bit_dmat' is now a bus_dma_tag_t
and initially points at 'rc_dma_tag' which provides the store area.
this allows rc_64bit_dmat to be subregioned for imposing
bounce-buffering if needed.
|
| 1.1.2.17 | 07-Apr-2010 |
cliff | - bus space related fields renamed to reflect use by both pcie and pcix
|
| 1.1.2.16 | 29-Mar-2010 |
cliff | - add inline cpu_rmixl_chip_type()
|
| 1.1.2.15 | 21-Mar-2010 |
cliff | moved a number of RMI interrupt items to rmixl_intr.h
|
| 1.1.2.14 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.1.2.13 | 29-Jan-2010 |
cliff | - add enum and display name lookup for firmware type
- firmware type field added to rmixl_config
- rmixl_cache_err_dis, rmixl_cache_err_restore, rmixl_cache_err_check
inlines moved here from pcie driver
- add rmixl_probe_4 nofault address probe inline
|
| 1.1.2.12 | 24-Jan-2010 |
cliff | - move firmware info stuff into struct rmixl_config
|
| 1.1.2.11 | 17-Jan-2010 |
cliff | - add cpu wakeup info pointers
|
| 1.1.2.10 | 10-Jan-2010 |
matt | Add generic support for DMA bounce buffers and real version of
bus_dmatag_subregion. MALTA uses it for ISADMA. Make RMIXL use
for creating 32bit and 29bit subregions.
|
| 1.1.2.9 | 14-Dec-2009 |
cliff | - replace single bus space with two (big & little endian) bus spaces for obio
|
| 1.1.2.8 | 18-Nov-2009 |
cliff | - add extents for bus spaces
|
| 1.1.2.7 | 15-Nov-2009 |
cliff | - use new obio bus space
- add bus space stuff for PCIe CFG and ECFG spaces
|
| 1.1.2.6 | 13-Nov-2009 |
cliff | - add inline to simplify recognizing RMI Company ID
- add inlines to simplify use of RMI company specific flags in pridtab entry
|
| 1.1.2.5 | 09-Nov-2009 |
cliff | - remove unused extents
- add pci stuff to struct rmixl_config
- add dma tags to struct rmixl_config
- link physaddr extent to struct rmixl_config
- >>>> rc_pci_io_ex and rc_pci_mem_ex can be removed, unused ???
- add prototypes for PCI funcs
- add prototypes for addr interrupt funcs
- add prototypes for addr sbccheck debug funcs
- prototype for rmixls_mfcr, rmixls_mtcr -- these are temporary until determine better home
|
| 1.1.2.4 | 25-Sep-2009 |
cliff | - add enums for rmixl interrupt trigger and polarity attributes
- rmixl_intr_establish gets an updated prpototype
|
| 1.1.2.3 | 15-Sep-2009 |
cliff | obio now provides both big endian and little endian bus spaces
to allow child devices to use according to access method needs
also preparing for dual bus_dma methods, one for addrs <4GB,
the other for all memory, including addrs >= 4GB
the bulk of XLS DMA work is still TBD
|
| 1.1.2.2 | 13-Sep-2009 |
cliff | improve how some config data are managed
|
| 1.1.2.1 | 13-Sep-2009 |
cliff | add netbsd support for RMI XLS6ATX_7A board and XL SoC family
|
| 1.2.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.2.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.2.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.4.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.2.4.1 | 14-Dec-2009 |
yamt | file rmixlvar.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:42 +0000
|
| 1.6.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.6.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.6.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.4 | 24-Jul-2017 |
mrg | mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.
also test-built some other mips kernels.
|
| 1.3 | 21-Jul-2016 |
christos | branches: 1.3.8;
make this compile
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2; 1.2.16; 1.2.34; 1.2.38;
Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.1 | 10-Jun-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file sbbuswatch.c was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.2 | 10-Jun-2010 |
cliff | insert missing */
thanks matt
|
| 1.1.2.1 | 10-Jun-2010 |
cliff | add bus watcher support for sibyte
|
| 1.2.38.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.2.34.2 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.2.34.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.16.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file sbbuswatch.c was added on branch rmind-uvmplock on 2011-03-05 20:51:11 +0000
|
| 1.3.8.1 | 30-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #231):
distrib/sets/lists/base/md.evbmips 1.3
doc/CHANGES 1.2303-1.2304
etc/etc.evbmips/MAKEDEV.conf 1.8
etc/etc.evbmips/Makefile.inc 1.22
etc/mtree/Makefile 1.37
etc/mtree/NetBSD.dist.evbmips 1.1
sys/arch/evbmips/Makefile 1.9
sys/arch/evbmips/conf/SBMIPS upto 1.2
sys/arch/evbmips/conf/SBMIPS.MP upto 1.2
sys/arch/evbmips/conf/SBMIPS64 upto 1.2
sys/arch/evbmips/conf/SBMIPS64.MP upto 1.2
sys/arch/evbmips/conf/files.sbmips upto 1.2
sys/arch/evbmips/conf/std.sbmips upto 1.2
sys/arch/evbmips/include/disklabel.h 1.6
sys/arch/evbmips/include/loadfile_machdep.h
sys/arch/evbmips/include/param.h 1.10
sys/arch/evbmips/include/pci_machdep.h 1.3
sys/arch/evbmips/sbmips/TODO
sys/arch/evbmips/sbmips/autoconf.c
sys/arch/evbmips/sbmips/autoconf.h
sys/arch/evbmips/sbmips/console.c
sys/arch/evbmips/sbmips/cpu.c upto 1.3
sys/arch/evbmips/sbmips/cpuvar.h
sys/arch/evbmips/sbmips/disksubr.c
sys/arch/evbmips/sbmips/leds.h
sys/arch/evbmips/sbmips/locore_machdep.S
sys/arch/evbmips/sbmips/machdep.c upto 1.2
sys/arch/evbmips/sbmips/rtc.c upto 1.2
sys/arch/evbmips/sbmips/sb1250_icu.c upto 1.2
sys/arch/evbmips/sbmips/swarm.h
sys/arch/evbmips/sbmips/systemsw.c upto 1.2
sys/arch/evbmips/sbmips/systemsw.h
sys/arch/evbmips/sbmips/zbbus.c upto 1.2
sys/arch/evbmips/stand/Makefile 1.1
sys/arch/evbmips/stand/sbmips/Makefile
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs upto 1.2
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs 1.3
sys/arch/evbmips/stand/sbmips/Makefile.bootxx
sys/arch/evbmips/stand/sbmips/Makefile.inc upto 1.3
sys/arch/evbmips/stand/sbmips/boot/Makefile
sys/arch/evbmips/stand/sbmips/boot/filesystem.c
sys/arch/evbmips/stand/sbmips/boot/version
sys/arch/evbmips/stand/sbmips/bootxx_cd9660/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_ffs/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_lfs/Makefile
sys/arch/evbmips/stand/sbmips/common/bbinfo.h
sys/arch/evbmips/stand/sbmips/common/blkdev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/blkdev.h
sys/arch/evbmips/stand/sbmips/common/boot.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/boot.ldscript
sys/arch/evbmips/stand/sbmips/common/booted_dev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/bootxx.c
sys/arch/evbmips/stand/sbmips/common/cfe.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.h
sys/arch/evbmips/stand/sbmips/common/cfe_api_int.h
sys/arch/evbmips/stand/sbmips/common/cfe_error.h
sys/arch/evbmips/stand/sbmips/common/cfe_ioctl.h
sys/arch/evbmips/stand/sbmips/common/checksize.sh
sys/arch/evbmips/stand/sbmips/common/common.h
sys/arch/evbmips/stand/sbmips/common/panic_putstr.c
sys/arch/evbmips/stand/sbmips/common/putstr.c
sys/arch/evbmips/stand/sbmips/common/start.S
sys/arch/evbmips/stand/sbmips/netboot/Makefile
sys/arch/evbmips/stand/sbmips/netboot/conf.c
sys/arch/evbmips/stand/sbmips/netboot/dev_net.c
sys/arch/evbmips/stand/sbmips/netboot/devopen.c
sys/arch/evbmips/stand/sbmips/netboot/getsecs.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/if_cfe.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/version
sys/arch/mips/conf/files.sibyte 1.8
sys/arch/mips/include/pmap.h 1.70
sys/arch/mips/sibyte/dev/sbbuswatch.c 1.4
sys/arch/mips/sibyte/dev/sbmac.c 1.49
sys/arch/mips/sibyte/dev/sbscn.c 1.43
sys/arch/mips/sibyte/dev/sbsmbus.c 1.17
sys/arch/mips/sibyte/dev/sbtimer.c 1.21
sys/arch/mips/sibyte/dev/sbwdog.c 1.15
sys/arch/mips/sibyte/pci/sbbrz_pci.c 1.8
usr.sbin/installboot/installboot.8 1.94
Move sys/arch/sbmips/* into sys/arch/evbmips/*/sbmips.
|
| 1.2 | 20-Feb-2011 |
matt | branches: 1.2.2;
Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.1 | 10-Jun-2010 |
cliff | branches: 1.1.2; 1.1.4; 1.1.6;
file sbbuswatchvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.6.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.4.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.2.2 | 10-Jun-2010 |
cliff | insert missing */
thanks matt
|
| 1.1.2.1 | 10-Jun-2010 |
cliff | add bus watcher support for sibyte
|
| 1.2.2.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.2.1 | 20-Feb-2011 |
rmind | file sbbuswatchvar.h was added on branch rmind-uvmplock on 2011-03-05 20:51:11 +0000
|
| 1.15 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.14 | 24-Apr-2021 |
thorpej | branches: 1.14.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.13 | 10-Jul-2011 |
matt | branches: 1.13.68;
cleanup <machine/*.h> includes
|
| 1.12 | 01-Feb-2011 |
matt | Update to CFATTACH_DECL_NEW.
|
| 1.11 | 14-Dec-2009 |
matt | branches: 1.11.4; 1.11.6; 1.11.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.10 | 11-Dec-2005 |
christos | branches: 1.10.78; 1.10.96;
merge ktrace-lwp.
|
| 1.9 | 26-Aug-2005 |
drochner | s/locdesc_t/int/g
|
| 1.8 | 13-Sep-2004 |
drochner | branches: 1.8.12;
autoconf cleanup: turn xxxsubmatch() functions into the locator
passing variants
|
| 1.7 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.6 | 07-Feb-2003 |
cgd | branches: 1.6.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.5 | 01-Jan-2003 |
thorpej | Use aprint_normal() for cfprint routines.
|
| 1.4 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.3 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.2 | 27-Sep-2002 |
thorpej | Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.3 | 03-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.1.12.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.12.1 | 05-Mar-2002 |
nathanw | file sbgbus.c was added on branch nathanw_sa on 2002-10-18 02:38:48 +0000
|
| 1.1.10.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sbgbus.c was added on branch kqueue on 2002-06-23 17:38:06 +0000
|
| 1.6.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.6.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.6.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.6.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.8.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.10.96.2 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.10.96.1 | 23-Nov-2009 |
matt | mips3_ld/mips3_sd need to be passed a volatile uint64_t *
|
| 1.10.78.1 | 11-Mar-2010 |
yamt | sync with head
|
| 1.11.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.11.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.11.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.13.68.6 | 05-Apr-2021 |
thorpej | Treat config_probe() as if it were a boolean function; don't compare
return value > 0... except for the odd balls, which are now really easy
to spot.
|
| 1.13.68.5 | 05-Apr-2021 |
thorpej | config_match() -> config_probe() for the straight-forward indirect config
cases. There are still a few odd balls using config_match() which should
be sorted out later.
|
| 1.13.68.4 | 04-Apr-2021 |
thorpej | CFARG_SUBMATCH -> CFARG_SEARCH for the indirect configuration uses.
|
| 1.13.68.3 | 03-Apr-2021 |
thorpej | Give config_attach() the tagged variadic argument treatment and
mechanically convert all call sites.
|
| 1.13.68.2 | 21-Mar-2021 |
thorpej | CFARG_IATTR usage audit:
If a device carries only one interface attribute, there is no need
to specify it when calling config_search(); that specification is
meant only to disambiguate which interface attribute (which is a
proxy for "what kind of attach args are being used") is having
children attached. cfparent_match() will take care of ensuring that
any potential children can attach to one of the parent's iterface
attributes, and if the parent only carries one, no disambiguation is
necessary.
|
| 1.13.68.1 | 20-Mar-2021 |
thorpej | The proliferation if config_search_*() and config_found_*() combinations
is a little absurd, so begin to tidy this up:
- Introduce a new cfarg_t enumerated type, that defines the types of
tag-value variadic arguments that can be passed to the various
config_*() functions (CFARG_SUBMATCH, CFARG_IATTR, and CFARG_LOCATORS,
for now, plus a CFARG_EOL sentinel).
- Collapse config_search_*() into config_search() that takes these
variadic arguments.
- Convert all call sites of config_search_*() to the new signature.
Noticed several incorrect usages along the way, which will be
audited in a future commit.
|
| 1.14.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.3 | 01-Feb-2011 |
matt | Use aprint_* and misc cleanup.
|
| 1.2 | 07-Feb-2003 |
cgd | branches: 1.2.130; 1.2.136; 1.2.138;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.2 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.1 | 05-Mar-2002 |
simonb | file sbgbusvar.h was added on branch nathanw_sa on 2002-03-05 23:46:43 +0000
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sbgbusvar.h was added on branch kqueue on 2002-06-23 17:38:07 +0000
|
| 1.2.138.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.2.136.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.130.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.32 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.31 | 10-Nov-2019 |
chs | branches: 1.31.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.30 | 25-Jul-2014 |
dholland | branches: 1.30.28;
Add d_discard to all struct cdevsw instances I could find.
All have been set to "nodiscard"; some should get a real implementation.
|
| 1.29 | 16-Mar-2014 |
dholland | branches: 1.29.2;
Change (mostly mechanically) every cdevsw/bdevsw I can find to use
designated initializers.
I have not built every extant kernel so I have probably broken at
least one build; however I've also found and fixed some wrong
cdevsw/bdevsw entries so even if so I think we come out ahead.
|
| 1.28 | 10-Jul-2011 |
matt | branches: 1.28.2; 1.28.12; 1.28.16;
cleanup <machine/*.h> includes
|
| 1.27 | 24-Apr-2011 |
rmind | Rename ttymalloc() to tty_alloc(), and ttyfree() to tty_free() for
consistency. Remove some unnecessary malloc.h inclusions as well.
|
| 1.26 | 01-Feb-2011 |
matt | Use aprint_* and misc cleanup.
|
| 1.25 | 01-Feb-2011 |
matt | Update to CFATTACH_DECL_NEW.
|
| 1.24 | 14-Dec-2009 |
matt | branches: 1.24.4; 1.24.6; 1.24.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.23 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.22 | 14-Mar-2009 |
dsl | Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)
|
| 1.21 | 13-Jun-2008 |
cegger | branches: 1.21.4; 1.21.10; 1.21.14;
use device_lookup_private to get softc
|
| 1.20 | 28-Apr-2008 |
martin | branches: 1.20.2; 1.20.4;
Remove clause 3 and 4 from TNF licenses
|
| 1.19 | 19-Nov-2007 |
ad | branches: 1.19.14; 1.19.16; 1.19.18;
- Factor out too many copies of the same bit of tty code.
- Fix another tty signalling/wakeup problem.
|
| 1.18 | 17-Oct-2007 |
garbled | branches: 1.18.2;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.17 | 12-Jul-2007 |
he | branches: 1.17.8; 1.17.10; 1.17.14;
Adapt to the new signature of callout_init().
|
| 1.16 | 04-Mar-2007 |
christos | branches: 1.16.2; 1.16.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.15 | 01-Oct-2006 |
elad | branches: 1.15.4;
More from Matt Fleming:
Adapt to KAUTH_DEVICE_TTY_PRIVSET and KAUTH_DEVICE_TTY_OPEN.
|
| 1.14 | 01-Oct-2006 |
elad | Adapt MD code to KAUTH_DEVICE_TTY_OPEN. Patch from Matt Fleming, thanks!
|
| 1.13 | 23-Jul-2006 |
ad | branches: 1.13.4; 1.13.6;
Use the LWP cached credentials where sane.
|
| 1.12 | 14-May-2006 |
elad | integrate kauth.
|
| 1.11 | 28-Mar-2006 |
thorpej | Use device_unit().
|
| 1.10 | 11-Dec-2005 |
christos | branches: 1.10.4; 1.10.6; 1.10.8; 1.10.10; 1.10.12;
merge ktrace-lwp.
|
| 1.9 | 06-Sep-2005 |
kleink | Change the driver open function's conditional for overriding exclusive tty
use from checking the proc's uid to suser(9), and account for the use of
privileges. Noted by David Holland in PR kern/31126.
|
| 1.8 | 07-Aug-2003 |
agc | branches: 1.8.16;
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.7 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.6 | 07-Feb-2003 |
cgd | branches: 1.6.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.5 | 23-Oct-2002 |
jdolecek | merge kqueue branch into -current
kqueue provides a stateful and efficient event notification framework
currently supported events include socket, file, directory, fifo,
pipe, tty and device changes, and monitoring of processes and signals
kqueue is supported by all writable filesystems in NetBSD tree
(with exception of Coda) and all device drivers supporting poll(2)
based on work done by Jonathan Lemon for FreeBSD
initial NetBSD port done by Luke Mewburn and Jason Thorpe
|
| 1.4 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.3 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.2 | 06-Sep-2002 |
gehenna | Merge the gehenna-devsw branch into the trunk.
This merge changes the device switch tables from static array to
dynamically generated by config(8).
- All device switches is defined as a constant structure in device drivers.
- The new grammer ``device-major'' is introduced to ``files''.
device-major <prefix> char <num> [block <num>] [<rules>]
- All device major numbers must be listed up in port dependent majors.<arch>
by using this grammer.
- Added the new naming convention.
The name of the device switch must be <prefix>_[bc]devsw for auto-generation
of device switch tables.
- The backward compatibility of loading block/character device
switch by LKM framework is broken. This is necessary to convert
from block/character device major to device name in runtime and vice versa.
- The restriction to assign device major by LKM is completely removed.
We don't need to reserve LKM entries for dynamic loading of device switch.
- In compile time, device major numbers list is packed into the kernel and
the LKM framework will refer it to assign device major number dynamically.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.4 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.12.3 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.12.2 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.1.12.1 | 05-Mar-2002 |
nathanw | file sbjcn.c was added on branch nathanw_sa on 2002-09-17 21:15:52 +0000
|
| 1.1.10.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sbjcn.c was added on branch kqueue on 2002-06-23 17:38:07 +0000
|
| 1.1.6.1 | 19-May-2002 |
gehenna | Add device switch.
Replace the access to devsw table and the hard-coded majors with devsw API.
|
| 1.6.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.6.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.6.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.6.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.8.16.4 | 07-Dec-2007 |
yamt | sync with head
|
| 1.8.16.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.8.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.8.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.10.12.2 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.10.12.1 | 31-Mar-2006 |
tron | Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.
|
| 1.10.10.4 | 13-May-2006 |
elad | sprinkle some #include <sys/kauth.h> in files that use kauth kpi but
don't include it yet. hopefully this will prevent some fallout.
|
| 1.10.10.3 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.10.10.2 | 10-Mar-2006 |
elad | generic_authorize() -> kauth_authorize_generic().
|
| 1.10.10.1 | 08-Mar-2006 |
elad | Adapt to kernel authorization KPI.
I expect *some* lossage here...
|
| 1.10.8.3 | 11-Aug-2006 |
yamt | sync with head
|
| 1.10.8.2 | 24-May-2006 |
yamt | sync with head.
|
| 1.10.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.10.6.2 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.10.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.10.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.13.6.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.13.4.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.15.4.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.16.10.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.16.2.2 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.16.2.1 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.17.14.1 | 21-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.17.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.17.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.17.8.1 | 21-Nov-2007 |
joerg | Sync with HEAD.
|
| 1.18.2.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.19.18.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.19.18.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.19.18.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.19.16.2 | 17-Jun-2008 |
yamt | sync with head.
|
| 1.19.16.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.19.14.2 | 29-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.19.14.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.20.4.1 | 18-Jun-2008 |
simonb | Sync with head.
|
| 1.20.2.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.21.14.2 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.21.14.1 | 23-Nov-2009 |
matt | mips3_ld/mips3_sd need to be passed a volatile uint64_t *
|
| 1.21.10.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.21.4.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.24.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.24.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.24.4.2 | 31-May-2011 |
rmind | sync with head
|
| 1.24.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.28.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.28.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.28.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.29.2.1 | 10-Aug-2014 |
tls | Rebase.
|
| 1.30.28.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.31.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.9 | 13-May-2023 |
andvar | fix typos in comments.
|
| 1.8 | 09-Jul-2018 |
christos | Remove duplicate copies of the SET/CLR/ISSET macros.
|
| 1.7 | 09-Jul-2018 |
kre | Avoid redefining SET/CLR/ISSET (which in the kernel are normally
defined in <sys/types.h>). These redefinitions (when they are,
that is, when types.h is included) were sneaking through because
they were defined identically ... until CLR in <sys/types.h> was
changed... Avoid that issue arising again.
|
| 1.6 | 13-Apr-2015 |
riastradh | branches: 1.6.16; 1.6.18;
MD rnd.h cleanups. Please let me know if I broke anything!
|
| 1.5 | 15-Nov-2014 |
christos | branches: 1.5.2;
centralize the call unit / dialout macros
|
| 1.4 | 02-Feb-2012 |
tls | branches: 1.4.6;
Entropy-pool implementation move and cleanup.
1) Move core entropy-pool code and source/sink/sample management code
to sys/kern from sys/dev.
2) Remove use of NRND as test for presence of entropy-pool code throughout
source tree.
3) Remove use of RND_ENABLED in device drivers as microoptimization to
avoid expensive operations on disabled entropy sources; make the
rnd_add calls do this directly so all callers benefit.
4) Fix bug in recent rnd_add_data()/rnd_add_uint32() changes that might
have lead to slight entropy overestimation for some sources.
5) Add new source types for environmental sensors, power sensors, VM
system events, and skew between clocks, with a sample implementation
for each.
ok releng to go in before the branch due to the difficulty of later
pullup (widespread #ifdef removal and moved files). Tested with release
builds on amd64 and evbarm and live testing on amd64.
|
| 1.3 | 01-Feb-2011 |
matt | branches: 1.3.4; 1.3.8;
Update to CFATTACH_DECL_NEW.
|
| 1.2 | 07-Feb-2003 |
cgd | branches: 1.2.126; 1.2.130; 1.2.136; 1.2.138;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.2 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.1 | 05-Mar-2002 |
simonb | file sbjcnvar.h was added on branch nathanw_sa on 2002-03-05 23:46:43 +0000
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sbjcnvar.h was added on branch kqueue on 2002-06-23 17:38:07 +0000
|
| 1.2.138.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.2.136.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.2.130.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.2.126.1 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.3.8.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.3.4.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.4.6.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.2.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.6.18.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.6.16.1 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.66 | 09-Feb-2024 |
andvar | s/firwmare/firmware/ in comments.
|
| 1.65 | 18-Sep-2022 |
thorpej | Eliminate use of IFF_OACTIVE.
|
| 1.64 | 20-Aug-2022 |
thorpej | sbmac_start(): Replace "IF_DEQUEUE() -> IF_PREPEND() on failure" with
"IF_POLL() -> IF_DEQUEUE() on success".
|
| 1.63 | 05-Dec-2021 |
msaitoh | s/progam/program/ in comment.
|
| 1.62 | 29-Jan-2020 |
thorpej | Adopt <net/if_stats.h>.
|
| 1.61 | 13-Sep-2019 |
msaitoh | branches: 1.61.2;
if_flags is neither int nor short. It's unsigned short.
|
| 1.60 | 28-May-2019 |
msaitoh | Use ETHER_LOCK()/ETHER_UNLOCK() for all ethernet drivers to protect ec_multi*.
|
| 1.59 | 23-May-2019 |
msaitoh | Whitespace fix (mainly tabify).
|
| 1.58 | 23-May-2019 |
msaitoh | -No functional change:
- Simplify struct ethercom's pointer near ETHER_FIRST_MULTI().
- Simplify MII structure initialization.
- u_int*_t -> uint*_t.
- KNF
|
| 1.57 | 22-Apr-2019 |
msaitoh | This driver does ether_ioctl() on SIOC{ADD,DEL}MULTI, SIOC{G,S}IFMEDIA and
default case in the switch statement. Only the default case didn't check the
return value with ENETRESET. Integrate them to one ether_ioctl() call with
ENETRESET test. This driver might require some additional fixes for SIOCSIFMTU
and other ioctl()s.
|
| 1.56 | 31-Mar-2019 |
simonb | Allocate memory for for the ethernet DMA descriptor rings aligned to a
cache line boundary, as documented in the chip documentation.
Fixes SiByte ethernet which hasn't worked since the 8kB page size switch
(and just happened to work previously because the descriptor rings were
the same size as a page and so were allocated on a page boundary).
|
| 1.55 | 05-Mar-2019 |
msaitoh | Centralize ETHER_ALIGN into net/if_ether.h. Note that this commit also changes
if_upgt.c's ETHER_ALIGN from 0 to 2.
|
| 1.54 | 05-Feb-2019 |
msaitoh | Remove very old IFF_NOTRAILERS flag.
|
| 1.53 | 23-Jan-2019 |
msaitoh | Fix build break (return type of mii_writereg).
|
| 1.52 | 22-Jan-2019 |
msaitoh | Change MII PHY read/write API from:
int (*mii_readreg_t)(device_t, int, int);
void (*mii_writereg_t)(device_t, int, int, int);
to:
int (*mii_readreg_t)(device_t, int, int, uint16_t *);
int (*mii_writereg_t)(device_t, int, int, uint16_t);
Now we can test if a read/write operation failed or not by the return value.
In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.
Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:
arm/at91/at91emac.c
arm/ep93xx/epe.c
arm/omap/omapl1x_emac.c
mips/ralink/ralink_eth.c
arch/powerpc/booke/dev/pq3etsec.c(read)
dev/cadence/if_cemac.c <- hkenken
dev/ic/lan9118.c
Tested with the following device:
axe+ukphy
axe+rgephy
axen+rgephy (tested by Andrius V)
wm+atphy
wm+ukphy
wm+igphy
wm+ihphy
wm+makphy
sk+makphy
sk+brgphy
sk+gentbi
msk+makphy
sip+icsphy
sip+ukphy
re+rgephy
bge+brgphy
bnx+brgphy
gsip+gphyter
rtk+rlphy
fxp+inphy (tested by Andrius V)
tlp+acphy
ex+exphy
epic+qsphy
vge+ciphy (tested by Andrius V)
vr+ukphy (tested by Andrius V)
vte+ukphy (tested by Andrius V)
Not tested (MAC):
arm:at91emac
arm:cemac
arm:epe
arm:geminigmac
arm:enet
arm:cpsw
arm:emac(omac)
arm:emac(sunxi)
arm:npe
evbppc:temac
macppc:bm
macppc:gm
mips:aumac
mips:ae
mips:cnmac
mips:reth
mips:sbmac
playstation2:smap
powerpc:tsec
powerpc:emac(ibm4xx)
sgimips:mec
sparc:be
sf
ne(ax88190, dl10019)
awge
ep
gem
hme
smsh
mtd
sm
age
alc
ale
bce
cas
et
jme
lii
nfe
pcn
ste
stge
tl
xi
aue
mue
smsc
udav
url
Not tested (PHY):
amhphy
bmtphy
dmphy
etphy
glxtphy
ikphy
iophy
lxtphy
nsphyter
pnaphy
rdcphy
sqphy
tlphy
tqphy
urlphy
|
| 1.51 | 18-Jul-2018 |
sevan | Be consistent among ethernet drivers on the convention for printing ethernet
addresses.
NFC
|
| 1.50 | 26-Jun-2018 |
msaitoh | branches: 1.50.2;
Implement the BPF direction filter (BIOC[GS]DIRECTION). It provides backward
compatibility with BIOC[GS]SEESENT ioctl. The userland interface is the same
as FreeBSD.
This change also fixes a bug that the direction is misunderstand on some
environment by passing the direction to bpf_mtap*() instead of checking
m->m_pkthdr.rcvif.
|
| 1.49 | 24-Jul-2017 |
mrg | branches: 1.49.2;
mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.
also test-built some other mips kernels.
|
| 1.48 | 20-Feb-2017 |
ozaki-r | branches: 1.48.6;
Apply deferred if_start to more drivers...
|
| 1.47 | 15-Dec-2016 |
ozaki-r | branches: 1.47.2;
Move bpf_mtap and if_ipackets++ on Rx of each driver to percpuq if_input
The benefits of the change are:
- We can reduce codes
- We can provide the same behavior between drivers
- Where/When if_ipackets is counted up
- Note that some drivers still update packet statistics in their own
way (periodical update)
- Moved bpf_mtap run in softint
- This makes it easy to MP-ify bpf
Proposed on tech-kern and tech-net
|
| 1.46 | 21-Jul-2016 |
christos | make this compile
|
| 1.45 | 10-Jun-2016 |
ozaki-r | branches: 1.45.2;
Introduce m_set_rcvif and m_reset_rcvif
The API is used to set (or reset) a received interface of a mbuf.
They are counterpart of m_get_rcvif, which will come in another
commit, hide internal of rcvif operation, and reduce the diff of
the upcoming change.
No functional change.
|
| 1.44 | 09-Feb-2016 |
ozaki-r | Introduce softint-based if_input
This change intends to run the whole network stack in softint context
(or normal LWP), not hardware interrupt context. Note that the work is
still incomplete by this change; to that end, we also have to softint-ify
if_link_state_change (and bpf) which can still run in hardware interrupt.
This change softint-ifies at ifp->if_input that is called from
each device driver (and ieee80211_input) to ensure Layer 2 runs
in softint (e.g., ether_input and bridge_input). To this end,
we provide a framework (called percpuq) that utlizes softint(9)
and percpu ifqueues. With this patch, rxintr of most drivers just
queues received packets and schedules a softint, and the softint
dequeues packets and does rest packet processing.
To minimize changes to each driver, percpuq is allocated in struct
ifnet for now and that is initialized by default (in if_attach).
We probably have to move percpuq to softc of each driver, but it's
future work. At this point, only wm(4) has percpuq in its softc
as a reference implementation.
Additional information including performance numbers can be found
in the thread at tech-kern@ and tech-net@:
http://mail-index.netbsd.org/tech-kern/2016/01/14/msg019997.html
Acknowledgment: riastradh@ greatly helped this work.
Thank you very much!
|
| 1.43 | 18-Oct-2014 |
snj | branches: 1.43.2;
src is too big these days to tolerate superfluous apostrophes. It's
"its", people!
|
| 1.42 | 22-Jul-2012 |
matt | branches: 1.42.2;
Fix mii_statchg to take a 'struct ifnet *' instead of device_t. This fixes
problem with a common MDIO bus used for multiple interfaces.
Some drivers converted to CFATTACL_DECL_NEW.
|
| 1.41 | 10-Jul-2011 |
matt | branches: 1.41.2;
cleanup <machine/*.h> includes
|
| 1.40 | 20-Feb-2011 |
matt | Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.39 | 01-Feb-2011 |
matt | Use aprint_* and misc cleanup.
|
| 1.38 | 01-Feb-2011 |
matt | Update to CFATTACH_DECL_NEW.
|
| 1.37 | 05-Apr-2010 |
joerg | branches: 1.37.2; 1.37.4;
Push the bpf_ops usage back into bpf.h. Push the common ifp->if_bpf
check into the inline functions as well the fourth argument for
bpf_attach.
|
| 1.36 | 19-Jan-2010 |
pooka | branches: 1.36.2; 1.36.4;
Redefine bpf linkage through an always present op vector, i.e.
#if NBPFILTER is no longer required in the client. This change
doesn't yet add support for loading bpf as a module, since drivers
can register before bpf is attached. However, callers of bpf can
now be modularized.
Dynamically loadable bpf could probably be done fairly easily with
coordination from the stub driver and the real driver by registering
attachments in the stub before the real driver is loaded and doing
a handoff. ... and I'm not going to ponder the depths of unload
here.
Tested with i386/MONOLITHIC, modified MONOLITHIC without bpf and rump.
|
| 1.35 | 14-Dec-2009 |
matt | Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.34 | 26-Oct-2009 |
cegger | kill extra whitespaces
reviewed by tsutsui@
|
| 1.33 | 12-Aug-2009 |
simonb | Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.32 | 18-Mar-2009 |
cegger | bcopy -> memcpy
|
| 1.31 | 18-Mar-2009 |
cegger | bzero -> memset
|
| 1.30 | 13-Nov-2008 |
dyoung | branches: 1.30.4;
To fix compilation, consistently use 'cmd' instead of 'command'
for the ioctl command code. Thanks he@.
|
| 1.29 | 07-Nov-2008 |
dyoung | *** Summary ***
When a link-layer address changes (e.g., ifconfig ex0 link
02:de:ad:be:ef:02 active), send a gratuitous ARP and/or a Neighbor
Advertisement to update the network-/link-layer address bindings
on our LAN peers.
Refuse a change of ethernet address to the address 00:00:00:00:00:00
or to any multicast/broadcast address. (Thanks matt@.)
Reorder ifnet ioctl operations so that driver ioctls may inherit
the functions of their "class"---ether_ioctl(), fddi_ioctl(), et
cetera---and the class ioctls may inherit from the generic ioctl,
ifioctl_common(), but both driver- and class-ioctls may override
the generic behavior. Make network drivers share more code.
Distinguish a "factory" link-layer address from others for the
purposes of both protecting that address from deletion and computing
EUI64.
Return consistent, appropriate error codes from network drivers.
Improve readability. KNF.
*** Details ***
In if_attach(), always initialize the interface ioctl routine,
ifnet->if_ioctl, if the driver has not already initialized it.
Delete if_ioctl == NULL tests everywhere else, because it cannot
happen.
In the ioctl routines of network interfaces, inherit common ioctl
behaviors by calling either ifioctl_common() or whichever ioctl
routine is appropriate for the class of interface---e.g., ether_ioctl()
for ethernets.
Stop (ab)using SIOCSIFADDR and start to use SIOCINITIFADDR. In
the user->kernel interface, SIOCSIFADDR's argument was an ifreq,
but on the protocol->ifnet interface, SIOCSIFADDR's argument was
an ifaddr. That was confusing, and it would work against me as I
make it possible for a network interface to overload most ioctls.
On the protocol->ifnet interface, replace SIOCSIFADDR with
SIOCINITIFADDR. In ifioctl(), return EPERM if userland tries to
invoke SIOCINITIFADDR.
In ifioctl(), give the interface the first shot at handling most
interface ioctls, and give the protocol the second shot, instead
of the other way around. Finally, let compatibility code (COMPAT_OSOCK)
take a shot.
Pull device initialization out of switch statements under
SIOCINITIFADDR. For example, pull ..._init() out of any switch
statement that looks like this:
switch (...->sa_family) {
case ...:
..._init();
...
break;
...
default:
..._init();
...
break;
}
Rewrite many if-else clauses that handle all permutations of IFF_UP
and IFF_RUNNING to use a switch statement,
switch (x & (IFF_UP|IFF_RUNNING)) {
case 0:
...
break;
case IFF_RUNNING:
...
break;
case IFF_UP:
...
break;
case IFF_UP|IFF_RUNNING:
...
break;
}
unifdef lots of code containing #ifdef FreeBSD, #ifdef NetBSD, and
#ifdef SIOCSIFMTU, especially in fwip(4) and in ndis(4).
In ipw(4), remove an if_set_sadl() call that is out of place.
In nfe(4), reuse the jumbo MTU logic in ether_ioctl().
Let ethernets register a callback for setting h/w state such as
promiscuous mode and the multicast filter in accord with a change
in the if_flags: ether_set_ifflags_cb() registers a callback that
returns ENETRESET if the caller should reset the ethernet by calling
if_init(), 0 on success, != 0 on failure. Pull common code from
ex(4), gem(4), nfe(4), sip(4), tlp(4), vge(4) into ether_ioctl(),
and register if_flags callbacks for those drivers.
Return ENOTTY instead of EINVAL for inappropriate ioctls. In
zyd(4), use ENXIO instead of ENOTTY to indicate that the device is
not any longer attached.
Add to if_set_sadl() a boolean 'factory' argument that indicates
whether a link-layer address was assigned by the factory or some
other source. In a comment, recommend using the factory address
for generating an EUI64, and update in6_get_hw_ifid() to prefer a
factory address to any other link-layer address.
Add a routing message, RTM_LLINFO_UPD, that tells protocols to
update the binding of network-layer addresses to link-layer addresses.
Implement this message in IPv4 and IPv6 by sending a gratuitous
ARP or a neighbor advertisement, respectively. Generate RTM_LLINFO_UPD
messages on a change of an interface's link-layer address.
In ether_ioctl(), do not let SIOCALIFADDR set a link-layer address
that is broadcast/multicast or equal to 00:00:00:00:00:00.
Make ether_ioctl() call ifioctl_common() to handle ioctls that it
does not understand.
In gif(4), initialize if_softc and use it, instead of assuming that
the gif_softc and ifp overlap.
Let ifioctl_common() handle SIOCGIFADDR.
Sprinkle rtcache_invariants(), which checks on DIAGNOSTIC kernels
that certain invariants on a struct route are satisfied.
In agr(4), rewrite agr_ioctl_filter() to be a bit more explicit
about the ioctls that we do not allow on an agr(4) member interface.
bzero -> memset. Delete unnecessary casts to void *. Use
sockaddr_in_init() and sockaddr_in6_init(). Compare pointers with
NULL instead of "testing truth". Replace some instances of (type
*)0 with NULL. Change some K&R prototypes to ANSI C, and join
lines.
|
| 1.28 | 07-Feb-2008 |
dyoung | branches: 1.28.6; 1.28.10; 1.28.16; 1.28.18; 1.28.24;
Start patching up the kernel so that a network driver always has
the opportunity to handle an ioctl before generic ifioctl handling
occurs. This will ease extending the kernel and sharing of code
between drivers.
First steps: Make the signature of ifioctl_common() match struct
ifinet->if_ioctl. Convert SIOCSIFCAP and SIOCSIFMTU to the new
ifioctl() regime, throughout the kernel.
|
| 1.27 | 19-Jan-2008 |
dyoung | Make many ethernet drivers share the common code for MII media
handling, ether_mediastatus() and ether_mediachange(). Check for
a non-ENXIO error return from mii_mediachg(). (ENXIO indicates
that a PHY is suspended.)
This patch shrinks the source code size by 979 lines. There was
a 5100-byte savings on the NetBSD/i386 kernel configuration, ALL.
I have made a few miscellaneous changes, too:
gem(4): use LIST_EMPTY(), LIST_FOREACH().
mtd(4): handle media ioctls, for a change!
axe(4): do not track link status in sc->axe_link any longer
nfe(4), aue(4), axe(4), udav(4), url(4): do not reset all PHYs
on a change of media
Except for the change to mtd(4), no functional changes are intended.
XXX This patch affects more architectures than I can feasibly
XXX compile and run. I have compiled macppc, sparc64, i386. I
XXX have run the patches on i386 boxen with bnx(4) and sip(4).
XXX Compiling and running on evbmips (MERAKI, ADM5120) is in
XXX progress.
|
| 1.26 | 17-Oct-2007 |
garbled | branches: 1.26.2; 1.26.8;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.25 | 09-Jul-2007 |
ad | branches: 1.25.2; 1.25.10;
Merge some of the less invasive changes from the vmlocking branch:
- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements
|
| 1.24 | 07-Mar-2007 |
christos | branches: 1.24.2; 1.24.4; 1.24.10;
count outgoing packets. from Markus Mayer
|
| 1.23 | 06-Mar-2007 |
simonb | Fix some caddr_t rototill fallout.
|
| 1.22 | 04-Mar-2007 |
christos | Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.21 | 11-Dec-2005 |
christos | branches: 1.21.26;
merge ktrace-lwp.
|
| 1.20 | 09-Jun-2005 |
jmc | branches: 1.20.2;
Fixes for -Wcast-qual. Add some needed const around char *'s,
__UNVOLATILE in READ/WRITE_REG and convert the rtc functions to properaly
take a volatile timeval
|
| 1.19 | 19-Mar-2004 |
cgd | convert descriptor add/remove pointers to integer array indices.
|
| 1.18 | 19-Mar-2004 |
cgd | recognize PERIPH_REV3 DMA for BCM1250, too
|
| 1.17 | 18-Mar-2004 |
cgd | bump RX and TX ring sizes to 256 entries each. would be better to make
them larger, but then i'd need to tweak the allocation mechanism so they
were *guaranteed* to be physically contiguous.
|
| 1.16 | 18-Mar-2004 |
cgd | in PERIPH_REV3 DMA code, fix calculation of pkt size (not that it matters
for <= 4k packets), and also interrupt on end of pkt only. cuts tx intrs
by a factor of >3 for simon's fave 100Mbps ttcp test.
|
| 1.15 | 18-Mar-2004 |
simonb | Fix pass3 Tx DMA - when an mbuf spans a page boundary, make sure that
it either is sitting in contiguous physical RAM or split the mbuf
into two Tx descriptors. Not the prettiest patch, but works well in
practice - gets about an 8% decrease on CPU time for a simple ttcp TCP
Tx benchmark. Thanks to Chris Demetriou for some debugging help.
Add some event counters.
Remove some #if 0'd debug code.
|
| 1.14 | 14-Mar-2004 |
simonb | Call sbmac_start() at the end of the interrupt service function to try
to send more packets. Fixes problems with high UDP Tx rates.
Thanks to Matt Thomas for applying clue.
|
| 1.13 | 08-Mar-2004 |
simonb | Wrap some long lines.
|
| 1.12 | 31-Oct-2003 |
simonb | Remove some assigned-to but otherwise unused variables.
|
| 1.11 | 26-Sep-2003 |
simonb | Disable pass3 DMA for now; booting a box to multi-user with root-on-nfs
reliably wedges during the dev_mkdb command in uvn_fp2.
|
| 1.10 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.9 | 07-Feb-2003 |
cgd | branches: 1.9.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.8 | 19-Nov-2002 |
cgd | initial support for mac features in new chip revs
|
| 1.7 | 08-Nov-2002 |
cgd | fix long-standing pasto in DMA config1 register address setting
|
| 1.6 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.5 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.4 | 27-Sep-2002 |
provos | remove trailing \n in panic(). approved perry.
|
| 1.3 | 01-Jun-2002 |
simonb | branches: 1.3.2; 1.3.4;
KNF; make some function static; other minor cleanups.
|
| 1.2 | 06-Mar-2002 |
simonb | branches: 1.2.6;
Remove a few unneeded include files.
|
| 1.1 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.2.6.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.3.4.4 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.3.4.3 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.3.4.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.3.4.1 | 01-Jun-2002 |
nathanw | file sbmac.c was added on branch nathanw_sa on 2002-10-18 02:38:48 +0000
|
| 1.3.2.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.3.2.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.3.2.1 | 01-Jun-2002 |
jdolecek | file sbmac.c was added on branch kqueue on 2002-06-23 17:38:07 +0000
|
| 1.9.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.9.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.9.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.9.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.20.2.3 | 11-Feb-2008 |
yamt | sync with head.
|
| 1.20.2.2 | 21-Jan-2008 |
yamt | sync with head
|
| 1.20.2.1 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.21.26.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.24.10.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.24.4.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.24.2.1 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.25.10.2 | 23-Mar-2008 |
matt | sync with HEAD
|
| 1.25.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.25.2.1 | 18-Jul-2007 |
matt | Fix LP64 bug.
|
| 1.26.8.1 | 20-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.26.2.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.28.24.4 | 18-Mar-2010 |
matt | Convert to using mutex instead of spl.
|
| 1.28.24.3 | 23-Nov-2009 |
matt | Use vaddr_t instead uint32_t for storing a pc since the latter won't work in
a LP64 kernel.
|
| 1.28.24.2 | 23-Nov-2009 |
matt | mips3_ld/mips3_sd need to be passed a volatile uint64_t *
|
| 1.28.24.1 | 19-Aug-2009 |
matt | mtod(m, unsigned int) makes gcc unhappy on _LP64. Use uintptr_t instead.
|
| 1.28.18.2 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.28.18.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
| 1.28.16.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
| 1.28.10.4 | 11-Aug-2010 |
yamt | sync with head.
|
| 1.28.10.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.28.10.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.28.10.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.28.6.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
| 1.30.4.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.36.4.2 | 05-Mar-2011 |
rmind | sync with head
|
| 1.36.4.1 | 30-May-2010 |
rmind | sync with head
|
| 1.36.2.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.37.4.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.37.4.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.37.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.41.2.1 | 30-Oct-2012 |
yamt | sync with head
|
| 1.42.2.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.43.2.5 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.43.2.4 | 05-Feb-2017 |
skrll | Sync with HEAD
|
| 1.43.2.3 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.43.2.2 | 09-Jul-2016 |
skrll | Sync with HEAD
|
| 1.43.2.1 | 19-Mar-2016 |
skrll | Sync with HEAD
|
| 1.45.2.3 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.45.2.2 | 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.45.2.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.47.2.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.48.6.1 | 30-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #231):
distrib/sets/lists/base/md.evbmips 1.3
doc/CHANGES 1.2303-1.2304
etc/etc.evbmips/MAKEDEV.conf 1.8
etc/etc.evbmips/Makefile.inc 1.22
etc/mtree/Makefile 1.37
etc/mtree/NetBSD.dist.evbmips 1.1
sys/arch/evbmips/Makefile 1.9
sys/arch/evbmips/conf/SBMIPS upto 1.2
sys/arch/evbmips/conf/SBMIPS.MP upto 1.2
sys/arch/evbmips/conf/SBMIPS64 upto 1.2
sys/arch/evbmips/conf/SBMIPS64.MP upto 1.2
sys/arch/evbmips/conf/files.sbmips upto 1.2
sys/arch/evbmips/conf/std.sbmips upto 1.2
sys/arch/evbmips/include/disklabel.h 1.6
sys/arch/evbmips/include/loadfile_machdep.h
sys/arch/evbmips/include/param.h 1.10
sys/arch/evbmips/include/pci_machdep.h 1.3
sys/arch/evbmips/sbmips/TODO
sys/arch/evbmips/sbmips/autoconf.c
sys/arch/evbmips/sbmips/autoconf.h
sys/arch/evbmips/sbmips/console.c
sys/arch/evbmips/sbmips/cpu.c upto 1.3
sys/arch/evbmips/sbmips/cpuvar.h
sys/arch/evbmips/sbmips/disksubr.c
sys/arch/evbmips/sbmips/leds.h
sys/arch/evbmips/sbmips/locore_machdep.S
sys/arch/evbmips/sbmips/machdep.c upto 1.2
sys/arch/evbmips/sbmips/rtc.c upto 1.2
sys/arch/evbmips/sbmips/sb1250_icu.c upto 1.2
sys/arch/evbmips/sbmips/swarm.h
sys/arch/evbmips/sbmips/systemsw.c upto 1.2
sys/arch/evbmips/sbmips/systemsw.h
sys/arch/evbmips/sbmips/zbbus.c upto 1.2
sys/arch/evbmips/stand/Makefile 1.1
sys/arch/evbmips/stand/sbmips/Makefile
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs upto 1.2
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs 1.3
sys/arch/evbmips/stand/sbmips/Makefile.bootxx
sys/arch/evbmips/stand/sbmips/Makefile.inc upto 1.3
sys/arch/evbmips/stand/sbmips/boot/Makefile
sys/arch/evbmips/stand/sbmips/boot/filesystem.c
sys/arch/evbmips/stand/sbmips/boot/version
sys/arch/evbmips/stand/sbmips/bootxx_cd9660/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_ffs/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_lfs/Makefile
sys/arch/evbmips/stand/sbmips/common/bbinfo.h
sys/arch/evbmips/stand/sbmips/common/blkdev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/blkdev.h
sys/arch/evbmips/stand/sbmips/common/boot.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/boot.ldscript
sys/arch/evbmips/stand/sbmips/common/booted_dev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/bootxx.c
sys/arch/evbmips/stand/sbmips/common/cfe.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.h
sys/arch/evbmips/stand/sbmips/common/cfe_api_int.h
sys/arch/evbmips/stand/sbmips/common/cfe_error.h
sys/arch/evbmips/stand/sbmips/common/cfe_ioctl.h
sys/arch/evbmips/stand/sbmips/common/checksize.sh
sys/arch/evbmips/stand/sbmips/common/common.h
sys/arch/evbmips/stand/sbmips/common/panic_putstr.c
sys/arch/evbmips/stand/sbmips/common/putstr.c
sys/arch/evbmips/stand/sbmips/common/start.S
sys/arch/evbmips/stand/sbmips/netboot/Makefile
sys/arch/evbmips/stand/sbmips/netboot/conf.c
sys/arch/evbmips/stand/sbmips/netboot/dev_net.c
sys/arch/evbmips/stand/sbmips/netboot/devopen.c
sys/arch/evbmips/stand/sbmips/netboot/getsecs.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/if_cfe.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/version
sys/arch/mips/conf/files.sibyte 1.8
sys/arch/mips/include/pmap.h 1.70
sys/arch/mips/sibyte/dev/sbbuswatch.c 1.4
sys/arch/mips/sibyte/dev/sbmac.c 1.49
sys/arch/mips/sibyte/dev/sbscn.c 1.43
sys/arch/mips/sibyte/dev/sbsmbus.c 1.17
sys/arch/mips/sibyte/dev/sbtimer.c 1.21
sys/arch/mips/sibyte/dev/sbwdog.c 1.15
sys/arch/mips/sibyte/pci/sbbrz_pci.c 1.8
usr.sbin/installboot/installboot.8 1.94
Move sys/arch/sbmips/* into sys/arch/evbmips/*/sbmips.
|
| 1.49.2.2 | 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.49.2.1 | 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.50.2.3 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.50.2.2 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.50.2.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.61.2.1 | 29-Feb-2020 |
ad | Sync with head.
|
| 1.25 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.24 | 24-Apr-2021 |
thorpej | branches: 1.24.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.23 | 21-Jul-2016 |
christos | branches: 1.23.30;
make this compile
|
| 1.22 | 10-Jul-2011 |
matt | branches: 1.22.12; 1.22.30; 1.22.34;
cleanup <machine/*.h> includes
|
| 1.21 | 20-Feb-2011 |
matt | Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.20 | 01-Feb-2011 |
matt | Use aprint_* and misc cleanup.
|
| 1.19 | 01-Feb-2011 |
matt | Update to CFATTACH_DECL_NEW.
|
| 1.18 | 14-Dec-2009 |
matt | branches: 1.18.4; 1.18.6; 1.18.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.17 | 12-Aug-2009 |
simonb | Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.16 | 11-Nov-2005 |
simonb | branches: 1.16.80; 1.16.98;
Don't hide the panic if the CPU devices present can't be figured out
in sbobio_attach(). We really want to know if this is the case all
the time, and also fixes GCC warnings about possibly uninitialised
variables.
|
| 1.15 | 26-Aug-2005 |
drochner | kill some more simple submatch() functions, use config_stdsubmatch()
|
| 1.14 | 25-Aug-2005 |
drochner | replace the "locdesc_t" structure carrying the number of locators
explicitely by a plain integer array
the length in now known to all relevant parties, so this avoids
duplication of information, and we can allocate that thing in
drivers without hacks
|
| 1.13 | 13-Sep-2004 |
drochner | branches: 1.13.10; 1.13.12;
autoconf cleanup: turn xxxsubmatch() functions into the locator
passing variants
|
| 1.12 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.11 | 29-Jun-2003 |
fvdl | branches: 1.11.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.10 | 29-Jun-2003 |
simonb | KNF nit (parentheses around return value).
|
| 1.9 | 07-Feb-2003 |
cgd | Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.8 | 01-Jan-2003 |
thorpej | Use aprint_normal() for cfprint routines.
|
| 1.7 | 08-Nov-2002 |
cgd | handle different SOC types and features a little better
|
| 1.6 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.5 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.4 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.3 | 27-Sep-2002 |
thorpej | Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.
|
| 1.2 | 01-Jun-2002 |
simonb | branches: 1.2.2; 1.2.4;
There's two SMBuses in the BCM1250; list them both on the on-board device
list.
Get rid of some magic numbers.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.6.1 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.2.4.4 | 03-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.2.4.3 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.4.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.2.4.1 | 01-Jun-2002 |
nathanw | file sbobio.c was added on branch nathanw_sa on 2002-10-18 02:38:49 +0000
|
| 1.2.2.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.2.2.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.2.2.1 | 01-Jun-2002 |
jdolecek | file sbobio.c was added on branch kqueue on 2002-06-23 17:38:07 +0000
|
| 1.11.2.5 | 11-Dec-2005 |
christos | Sync with head.
|
| 1.11.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.11.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.11.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.11.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.13.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.13.10.1 | 21-Nov-2005 |
tron | Pull up following revision(s) (requested by simonb in ticket #971):
sys/arch/mips/sibyte/dev/sbobio.c: revision 1.16
Don't hide the panic if the CPU devices present can't be figured out
in sbobio_attach(). We really want to know if this is the case all
the time, and also fixes GCC warnings about possibly uninitialised
variables.
|
| 1.16.98.2 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.16.98.1 | 23-Nov-2009 |
matt | mips3_ld/mips3_sd need to be passed a volatile uint64_t *
|
| 1.16.80.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.16.80.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.18.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.18.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.18.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.18.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.22.34.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.22.30.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.22.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.23.30.2 | 22-Mar-2021 |
thorpej | Audit CFARG_IATTR in config_found() calls, and remove it in situations
where the interface attribute is not ambiguous.
|
| 1.23.30.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.24.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.4 | 20-Feb-2011 |
matt | Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.3 | 12-Aug-2009 |
simonb | branches: 1.3.4; 1.3.6; 1.3.8;
Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.2 | 07-Feb-2003 |
cgd | branches: 1.2.108;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.2 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.1 | 05-Mar-2002 |
simonb | file sbobiovar.h was added on branch nathanw_sa on 2002-03-05 23:46:43 +0000
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sbobiovar.h was added on branch kqueue on 2002-06-23 17:38:07 +0000
|
| 1.2.108.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.3.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.20 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.19 | 24-Apr-2021 |
thorpej | branches: 1.19.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.18 | 20-Feb-2011 |
matt | branches: 1.18.70;
Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.17 | 01-Feb-2011 |
matt | Use aprint_* and misc cleanup.
|
| 1.16 | 01-Feb-2011 |
matt | Update to CFATTACH_DECL_NEW.
|
| 1.15 | 12-Aug-2009 |
simonb | branches: 1.15.4; 1.15.6; 1.15.8;
Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.14 | 16-Jun-2008 |
cegger | branches: 1.14.14;
fix typo. should compile again.
|
| 1.13 | 13-Jun-2008 |
cegger | use __array_count
|
| 1.12 | 11-Dec-2005 |
christos | branches: 1.12.74; 1.12.76; 1.12.78; 1.12.80; 1.12.82;
merge ktrace-lwp.
|
| 1.11 | 26-Aug-2005 |
drochner | kill some more simple submatch() functions, use config_stdsubmatch()
|
| 1.10 | 25-Aug-2005 |
drochner | replace the "locdesc_t" structure carrying the number of locators
explicitely by a plain integer array
the length in now known to all relevant parties, so this avoids
duplication of information, and we can allocate that thing in
drivers without hacks
|
| 1.9 | 13-Sep-2004 |
drochner | branches: 1.9.12;
autoconf cleanup: turn xxxsubmatch() functions into the locator
passing variants
|
| 1.8 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.7 | 07-Feb-2003 |
cgd | branches: 1.7.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.6 | 01-Jan-2003 |
thorpej | Use aprint_normal() for cfprint routines.
|
| 1.5 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.4 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.3 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.2 | 27-Sep-2002 |
thorpej | Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.3 | 03-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.1.12.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.12.1 | 05-Mar-2002 |
nathanw | file sbscd.c was added on branch nathanw_sa on 2002-10-18 02:38:49 +0000
|
| 1.1.10.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sbscd.c was added on branch kqueue on 2002-06-23 17:38:07 +0000
|
| 1.7.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.7.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.7.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.7.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.9.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.12.82.1 | 18-Jun-2008 |
simonb | Sync with head.
|
| 1.12.80.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.12.78.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.12.78.1 | 04-May-2009 |
yamt | sync with head.
|
| 1.12.76.1 | 17-Jun-2008 |
yamt | sync with head.
|
| 1.12.74.1 | 29-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.14.14.1 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.15.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.15.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.15.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.15.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.18.70.2 | 22-Mar-2021 |
thorpej | Audit CFARG_IATTR in config_found() calls, and remove it in situations
where the interface attribute is not ambiguous.
|
| 1.18.70.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.19.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.4 | 20-Feb-2011 |
matt | Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.3 | 12-Aug-2009 |
simonb | branches: 1.3.4; 1.3.6; 1.3.8;
Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.2 | 07-Feb-2003 |
cgd | branches: 1.2.108;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.2 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.1 | 05-Mar-2002 |
simonb | file sbscdvar.h was added on branch nathanw_sa on 2002-03-05 23:46:44 +0000
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sbscdvar.h was added on branch kqueue on 2002-06-23 17:38:08 +0000
|
| 1.2.108.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.3.8.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.3.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.45 | 04-Jan-2021 |
thorpej | malloc(9) -> kmem(9)
|
| 1.44 | 10-Nov-2019 |
chs | branches: 1.44.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.
|
| 1.43 | 24-Jul-2017 |
mrg | branches: 1.43.4;
mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.
also test-built some other mips kernels.
|
| 1.42 | 21-Jul-2016 |
christos | branches: 1.42.8;
make this compile
|
| 1.41 | 13-Apr-2015 |
riastradh | branches: 1.41.2;
MD rnd.h cleanups. Please let me know if I broke anything!
|
| 1.40 | 10-Aug-2014 |
tls | branches: 1.40.4;
Merge tls-earlyentropy branch into HEAD.
|
| 1.39 | 25-Jul-2014 |
dholland | Add d_discard to all struct cdevsw instances I could find.
All have been set to "nodiscard"; some should get a real implementation.
|
| 1.38 | 16-Mar-2014 |
dholland | branches: 1.38.2;
Change (mostly mechanically) every cdevsw/bdevsw I can find to use
designated initializers.
I have not built every extant kernel so I have probably broken at
least one build; however I've also found and fixed some wrong
cdevsw/bdevsw entries so even if so I think we come out ahead.
|
| 1.37 | 02-Feb-2012 |
tls | branches: 1.37.6; 1.37.10;
Entropy-pool implementation move and cleanup.
1) Move core entropy-pool code and source/sink/sample management code
to sys/kern from sys/dev.
2) Remove use of NRND as test for presence of entropy-pool code throughout
source tree.
3) Remove use of RND_ENABLED in device drivers as microoptimization to
avoid expensive operations on disabled entropy sources; make the
rnd_add calls do this directly so all callers benefit.
4) Fix bug in recent rnd_add_data()/rnd_add_uint32() changes that might
have lead to slight entropy overestimation for some sources.
5) Add new source types for environmental sensors, power sensors, VM
system events, and skew between clocks, with a sample implementation
for each.
ok releng to go in before the branch due to the difficulty of later
pullup (widespread #ifdef removal and moved files). Tested with release
builds on amd64 and evbarm and live testing on amd64.
|
| 1.36 | 10-Jul-2011 |
matt | branches: 1.36.2; 1.36.6;
cleanup <machine/*.h> includes
|
| 1.35 | 24-Apr-2011 |
rmind | Rename ttymalloc() to tty_alloc(), and ttyfree() to tty_free() for
consistency. Remove some unnecessary malloc.h inclusions as well.
|
| 1.34 | 20-Feb-2011 |
matt | Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.33 | 01-Feb-2011 |
matt | Use aprint_* and misc cleanup.
|
| 1.32 | 01-Feb-2011 |
matt | Update to CFATTACH_DECL_NEW.
|
| 1.31 | 14-Dec-2009 |
matt | branches: 1.31.4; 1.31.6; 1.31.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.30 | 21-Nov-2009 |
rmind | Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
|
| 1.29 | 12-Aug-2009 |
simonb | Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.28 | 14-Mar-2009 |
dsl | Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)
|
| 1.27 | 13-Jun-2008 |
cegger | branches: 1.27.4; 1.27.10; 1.27.14;
use device_lookup_private to get softc
|
| 1.26 | 28-Apr-2008 |
martin | branches: 1.26.2; 1.26.4;
Remove clause 3 and 4 from TNF licenses
|
| 1.25 | 26-Nov-2007 |
ad | branches: 1.25.14; 1.25.16; 1.25.18;
Use the softint API.
|
| 1.24 | 19-Nov-2007 |
ad | - Factor out too many copies of the same bit of tty code.
- Fix another tty signalling/wakeup problem.
|
| 1.23 | 17-Oct-2007 |
garbled | branches: 1.23.2;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.22 | 09-Jul-2007 |
ad | branches: 1.22.8; 1.22.10; 1.22.14;
Merge some of the less invasive changes from the vmlocking branch:
- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements
|
| 1.21 | 04-Mar-2007 |
christos | branches: 1.21.2; 1.21.4; 1.21.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.20 | 01-Oct-2006 |
elad | branches: 1.20.4;
More from Matt Fleming:
Adapt to KAUTH_DEVICE_TTY_PRIVSET and KAUTH_DEVICE_TTY_OPEN.
|
| 1.19 | 01-Oct-2006 |
elad | Adapt MD code to KAUTH_DEVICE_TTY_OPEN. Patch from Matt Fleming, thanks!
|
| 1.18 | 23-Jul-2006 |
ad | branches: 1.18.4; 1.18.6;
Use the LWP cached credentials where sane.
|
| 1.17 | 14-May-2006 |
elad | integrate kauth.
|
| 1.16 | 28-Mar-2006 |
thorpej | Use device_unit().
|
| 1.15 | 11-Dec-2005 |
christos | branches: 1.15.4; 1.15.6; 1.15.8; 1.15.10; 1.15.12;
merge ktrace-lwp.
|
| 1.14 | 06-Sep-2005 |
kleink | Change the driver open function's conditional for overriding exclusive tty
use from checking the proc's uid to suser(9), and account for the use of
privileges. Noted by David Holland in PR kern/31126.
|
| 1.13 | 09-Jun-2005 |
jmc | branches: 1.13.2;
Fixes for -Wcast-qual. Add some needed const around char *'s,
__UNVOLATILE in READ/WRITE_REG and convert the rtc functions to properaly
take a volatile timeval
|
| 1.12 | 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.11 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.10 | 29-Jun-2003 |
fvdl | branches: 1.10.2;
Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
|
| 1.9 | 29-Jun-2003 |
simonb | Fix more needless 'struct proc *' to 'struct lwp *' fallout.
|
| 1.8 | 28-Mar-2003 |
he | Initialize new members (cn_halt and cn_flush) in consdev to NULL to
allow this to compile again.
|
| 1.7 | 07-Feb-2003 |
cgd | Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.6 | 10-Nov-2002 |
simonb | Adapt for the ioctl ERESTART/EPASSTHROUGH changes.
Make sure we don't tsleep() at splhigh/splserial.
|
| 1.5 | 23-Oct-2002 |
jdolecek | merge kqueue branch into -current
kqueue provides a stateful and efficient event notification framework
currently supported events include socket, file, directory, fifo,
pipe, tty and device changes, and monitoring of processes and signals
kqueue is supported by all writable filesystems in NetBSD tree
(with exception of Coda) and all device drivers supporting poll(2)
based on work done by Jonathan Lemon for FreeBSD
initial NetBSD port done by Luke Mewburn and Jason Thorpe
|
| 1.4 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.3 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.2 | 06-Sep-2002 |
gehenna | Merge the gehenna-devsw branch into the trunk.
This merge changes the device switch tables from static array to
dynamically generated by config(8).
- All device switches is defined as a constant structure in device drivers.
- The new grammer ``device-major'' is introduced to ``files''.
device-major <prefix> char <num> [block <num>] [<rules>]
- All device major numbers must be listed up in port dependent majors.<arch>
by using this grammer.
- Added the new naming convention.
The name of the device switch must be <prefix>_[bc]devsw for auto-generation
of device switch tables.
- The backward compatibility of loading block/character device
switch by LKM framework is broken. This is necessary to convert
from block/character device major to device name in runtime and vice versa.
- The restriction to assign device major by LKM is completely removed.
We don't need to reserve LKM entries for dynamic loading of device switch.
- In compile time, device major numbers list is packed into the kernel and
the LKM framework will refer it to assign device major number dynamically.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.4 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.12.3 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.12.2 | 17-Sep-2002 |
nathanw | Catch up to -current.
|
| 1.1.12.1 | 05-Mar-2002 |
nathanw | file sbscn.c was added on branch nathanw_sa on 2002-09-17 21:15:53 +0000
|
| 1.1.10.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sbscn.c was added on branch kqueue on 2002-06-23 17:38:08 +0000
|
| 1.1.6.1 | 19-May-2002 |
gehenna | Add device switch.
Replace the access to devsw table and the hard-coded majors with devsw API.
|
| 1.10.2.5 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.10.2.4 | 24-Jan-2005 |
simonb | Adapt to the ktrace-lwp branch.
|
| 1.10.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.10.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.10.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.13.2.4 | 07-Dec-2007 |
yamt | sync with head
|
| 1.13.2.3 | 03-Sep-2007 |
yamt | sync with head.
|
| 1.13.2.2 | 30-Dec-2006 |
yamt | sync with head.
|
| 1.13.2.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.15.12.2 | 24-May-2006 |
tron | Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
|
| 1.15.12.1 | 31-Mar-2006 |
tron | Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.
|
| 1.15.10.4 | 13-May-2006 |
elad | sprinkle some #include <sys/kauth.h> in files that use kauth kpi but
don't include it yet. hopefully this will prevent some fallout.
|
| 1.15.10.3 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.15.10.2 | 10-Mar-2006 |
elad | generic_authorize() -> kauth_authorize_generic().
|
| 1.15.10.1 | 08-Mar-2006 |
elad | Adapt to kernel authorization KPI.
I expect *some* lossage here...
|
| 1.15.8.3 | 11-Aug-2006 |
yamt | sync with head
|
| 1.15.8.2 | 24-May-2006 |
yamt | sync with head.
|
| 1.15.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.15.6.2 | 01-Jun-2006 |
kardel | Sync with head.
|
| 1.15.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.15.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.18.6.1 | 22-Oct-2006 |
yamt | sync with head
|
| 1.18.4.1 | 18-Nov-2006 |
ad | Sync with head.
|
| 1.20.4.1 | 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.21.10.1 | 03-Oct-2007 |
garbled | Sync with HEAD
|
| 1.21.4.1 | 11-Jul-2007 |
mjf | Sync with head.
|
| 1.21.2.2 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.21.2.1 | 15-Jul-2007 |
ad | Sync with head.
|
| 1.22.14.1 | 21-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.22.10.2 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.22.10.1 | 06-Nov-2007 |
matt | sync with HEAD
|
| 1.22.8.2 | 27-Nov-2007 |
joerg | Sync with HEAD. amd64 Xen support needs testing.
|
| 1.22.8.1 | 21-Nov-2007 |
joerg | Sync with HEAD.
|
| 1.23.2.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.25.18.4 | 11-Mar-2010 |
yamt | sync with head
|
| 1.25.18.3 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.25.18.2 | 04-May-2009 |
yamt | sync with head.
|
| 1.25.18.1 | 16-May-2008 |
yamt | sync with head.
|
| 1.25.16.2 | 17-Jun-2008 |
yamt | sync with head.
|
| 1.25.16.1 | 18-May-2008 |
yamt | sync with head.
|
| 1.25.14.2 | 29-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.25.14.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.26.4.1 | 18-Jun-2008 |
simonb | Sync with head.
|
| 1.26.2.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
| 1.27.14.3 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.27.14.2 | 23-Nov-2009 |
matt | Use vaddr_t instead uint32_t for storing a pc since the latter won't work in
a LP64 kernel.
|
| 1.27.14.1 | 23-Nov-2009 |
matt | mips3_ld/mips3_sd need to be passed a volatile uint64_t *
|
| 1.27.10.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
| 1.27.4.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
| 1.31.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.31.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.31.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.31.4.2 | 31-May-2011 |
rmind | sync with head
|
| 1.31.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.36.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.36.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.36.2.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.37.10.1 | 18-May-2014 |
rmind | sync with head
|
| 1.37.6.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.37.6.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.38.2.2 | 10-Aug-2014 |
tls | Rebase.
|
| 1.38.2.1 | 07-Apr-2014 |
tls | Be a little more clear and consistent about harvesting entropy from devices:
1) deprecate RND_FLAG_NO_ESTIMATE
2) define RND_FLAG_COLLECT_TIME, RND_FLAG_COLLECT_VALUE
3) define RND_FLAG_ESTIMATE_TIME, RND_FLAG_ESTIMATE_VALUE
4) define RND_FLAG_DEFAULT: RND_FLAG_COLLECT_TIME|
RND_FLAG_COLLECT_VALUE|RND_FLAG_ESTIMATE_TIME
5) Make entropy harvesting from environmental sensors a little more generic
and remove it from individual sensor drivers.
6) Remove individual open-coded delta-estimators for values from a few
places in the tree (uvm, environmental drivers).
7) 0 -> RND_FLAG_DEFAULT, actually gather entropy from various drivers
that had stubbed out code, other minor cleanups.
|
| 1.40.4.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.40.4.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.40.4.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.41.2.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.42.8.1 | 30-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #231):
distrib/sets/lists/base/md.evbmips 1.3
doc/CHANGES 1.2303-1.2304
etc/etc.evbmips/MAKEDEV.conf 1.8
etc/etc.evbmips/Makefile.inc 1.22
etc/mtree/Makefile 1.37
etc/mtree/NetBSD.dist.evbmips 1.1
sys/arch/evbmips/Makefile 1.9
sys/arch/evbmips/conf/SBMIPS upto 1.2
sys/arch/evbmips/conf/SBMIPS.MP upto 1.2
sys/arch/evbmips/conf/SBMIPS64 upto 1.2
sys/arch/evbmips/conf/SBMIPS64.MP upto 1.2
sys/arch/evbmips/conf/files.sbmips upto 1.2
sys/arch/evbmips/conf/std.sbmips upto 1.2
sys/arch/evbmips/include/disklabel.h 1.6
sys/arch/evbmips/include/loadfile_machdep.h
sys/arch/evbmips/include/param.h 1.10
sys/arch/evbmips/include/pci_machdep.h 1.3
sys/arch/evbmips/sbmips/TODO
sys/arch/evbmips/sbmips/autoconf.c
sys/arch/evbmips/sbmips/autoconf.h
sys/arch/evbmips/sbmips/console.c
sys/arch/evbmips/sbmips/cpu.c upto 1.3
sys/arch/evbmips/sbmips/cpuvar.h
sys/arch/evbmips/sbmips/disksubr.c
sys/arch/evbmips/sbmips/leds.h
sys/arch/evbmips/sbmips/locore_machdep.S
sys/arch/evbmips/sbmips/machdep.c upto 1.2
sys/arch/evbmips/sbmips/rtc.c upto 1.2
sys/arch/evbmips/sbmips/sb1250_icu.c upto 1.2
sys/arch/evbmips/sbmips/swarm.h
sys/arch/evbmips/sbmips/systemsw.c upto 1.2
sys/arch/evbmips/sbmips/systemsw.h
sys/arch/evbmips/sbmips/zbbus.c upto 1.2
sys/arch/evbmips/stand/Makefile 1.1
sys/arch/evbmips/stand/sbmips/Makefile
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs upto 1.2
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs 1.3
sys/arch/evbmips/stand/sbmips/Makefile.bootxx
sys/arch/evbmips/stand/sbmips/Makefile.inc upto 1.3
sys/arch/evbmips/stand/sbmips/boot/Makefile
sys/arch/evbmips/stand/sbmips/boot/filesystem.c
sys/arch/evbmips/stand/sbmips/boot/version
sys/arch/evbmips/stand/sbmips/bootxx_cd9660/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_ffs/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_lfs/Makefile
sys/arch/evbmips/stand/sbmips/common/bbinfo.h
sys/arch/evbmips/stand/sbmips/common/blkdev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/blkdev.h
sys/arch/evbmips/stand/sbmips/common/boot.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/boot.ldscript
sys/arch/evbmips/stand/sbmips/common/booted_dev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/bootxx.c
sys/arch/evbmips/stand/sbmips/common/cfe.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.h
sys/arch/evbmips/stand/sbmips/common/cfe_api_int.h
sys/arch/evbmips/stand/sbmips/common/cfe_error.h
sys/arch/evbmips/stand/sbmips/common/cfe_ioctl.h
sys/arch/evbmips/stand/sbmips/common/checksize.sh
sys/arch/evbmips/stand/sbmips/common/common.h
sys/arch/evbmips/stand/sbmips/common/panic_putstr.c
sys/arch/evbmips/stand/sbmips/common/putstr.c
sys/arch/evbmips/stand/sbmips/common/start.S
sys/arch/evbmips/stand/sbmips/netboot/Makefile
sys/arch/evbmips/stand/sbmips/netboot/conf.c
sys/arch/evbmips/stand/sbmips/netboot/dev_net.c
sys/arch/evbmips/stand/sbmips/netboot/devopen.c
sys/arch/evbmips/stand/sbmips/netboot/getsecs.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/if_cfe.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/version
sys/arch/mips/conf/files.sibyte 1.8
sys/arch/mips/include/pmap.h 1.70
sys/arch/mips/sibyte/dev/sbbuswatch.c 1.4
sys/arch/mips/sibyte/dev/sbmac.c 1.49
sys/arch/mips/sibyte/dev/sbscn.c 1.43
sys/arch/mips/sibyte/dev/sbsmbus.c 1.17
sys/arch/mips/sibyte/dev/sbtimer.c 1.21
sys/arch/mips/sibyte/dev/sbwdog.c 1.15
sys/arch/mips/sibyte/pci/sbbrz_pci.c 1.8
usr.sbin/installboot/installboot.8 1.94
Move sys/arch/sbmips/* into sys/arch/evbmips/*/sbmips.
|
| 1.43.4.1 | 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.44.8.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.8 | 13-Apr-2015 |
riastradh | MD rnd.h cleanups. Please let me know if I broke anything!
|
| 1.7 | 15-Nov-2014 |
christos | branches: 1.7.2;
centralize the call unit / dialout macros
|
| 1.6 | 02-Feb-2012 |
tls | branches: 1.6.6;
Entropy-pool implementation move and cleanup.
1) Move core entropy-pool code and source/sink/sample management code
to sys/kern from sys/dev.
2) Remove use of NRND as test for presence of entropy-pool code throughout
source tree.
3) Remove use of RND_ENABLED in device drivers as microoptimization to
avoid expensive operations on disabled entropy sources; make the
rnd_add calls do this directly so all callers benefit.
4) Fix bug in recent rnd_add_data()/rnd_add_uint32() changes that might
have lead to slight entropy overestimation for some sources.
5) Add new source types for environmental sensors, power sensors, VM
system events, and skew between clocks, with a sample implementation
for each.
ok releng to go in before the branch due to the difficulty of later
pullup (widespread #ifdef removal and moved files). Tested with release
builds on amd64 and evbarm and live testing on amd64.
|
| 1.5 | 19-Nov-2011 |
tls | branches: 1.5.2;
First step of random number subsystem rework described in
<20111022023242.BA26F14A158@mail.netbsd.org>. This change includes
the following:
An initial cleanup and minor reorganization of the entropy pool
code in sys/dev/rnd.c and sys/dev/rndpool.c. Several bugs are
fixed. Some effort is made to accumulate entropy more quickly at
boot time.
A generic interface, "rndsink", is added, for stream generators to
request that they be re-keyed with good quality entropy from the pool
as soon as it is available.
The arc4random()/arc4randbytes() implementation in libkern is
adjusted to use the rndsink interface for rekeying, which helps
address the problem of low-quality keys at boot time.
An implementation of the FIPS 140-2 statistical tests for random
number generator quality is provided (libkern/rngtest.c). This
is based on Greg Rose's implementation from Qualcomm.
A new random stream generator, nist_ctr_drbg, is provided. It is
based on an implementation of the NIST SP800-90 CTR_DRBG by
Henric Jungheim. This generator users AES in a modified counter
mode to generate a backtracking-resistant random stream.
An abstraction layer, "cprng", is provided for in-kernel consumers
of randomness. The arc4random/arc4randbytes API is deprecated for
in-kernel use. It is replaced by "cprng_strong". The current
cprng_fast implementation wraps the existing arc4random
implementation. The current cprng_strong implementation wraps the
new CTR_DRBG implementation. Both interfaces are rekeyed from
the entropy pool automatically at intervals justifiable from best
current cryptographic practice.
In some quick tests, cprng_fast() is about the same speed as
the old arc4randbytes(), and cprng_strong() is about 20% faster
than rnd_extract_data(). Performance is expected to improve.
The AES code in src/crypto/rijndael is no longer an optional
kernel component, as it is required by cprng_strong, which is
not an optional kernel component.
The entropy pool output is subjected to the rngtest tests at
startup time; if it fails, the system will reboot. There is
approximately a 3/10000 chance of a false positive from these
tests. Entropy pool _input_ from hardware random numbers is
subjected to the rngtest tests at attach time, as well as the
FIPS continuous-output test, to detect bad or stuck hardware
RNGs; if any are detected, they are detached, but the system
continues to run.
A problem with rndctl(8) is fixed -- datastructures with
pointers in arrays are no longer passed to userspace (this
was not a security problem, but rather a major issue for
compat32). A new kernel will require a new rndctl.
The sysctl kern.arandom() and kern.urandom() nodes are hooked
up to the new generators, but the /dev/*random pseudodevices
are not, yet.
Manual pages for the new kernel interfaces are forthcoming.
|
| 1.4 | 01-Feb-2011 |
matt | branches: 1.4.4;
Update to CFATTACH_DECL_NEW.
|
| 1.3 | 07-Mar-2006 |
he | branches: 1.3.2; 1.3.88; 1.3.92; 1.3.98; 1.3.100;
Remove another instance of the macro triplet SET/CLR/ISSET, now
to be found in <sys/types.h>.
|
| 1.2 | 07-Feb-2003 |
cgd | branches: 1.2.18; 1.2.32; 1.2.34; 1.2.36;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.2 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.1 | 05-Mar-2002 |
simonb | file sbscnvar.h was added on branch nathanw_sa on 2002-03-05 23:46:44 +0000
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sbscnvar.h was added on branch kqueue on 2002-06-23 17:38:08 +0000
|
| 1.2.36.1 | 13-Mar-2006 |
yamt | sync with head.
|
| 1.2.34.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.2.32.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.2.18.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.3.100.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.3.98.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.3.92.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.3.88.1 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.3.2.2 | 07-Mar-2006 |
he | Remove another instance of the macro triplet SET/CLR/ISSET, now
to be found in <sys/types.h>.
|
| 1.3.2.1 | 07-Mar-2006 |
he | file sbscnvar.h was added on branch elad-kernelauth on 2006-03-07 14:01:42 +0000
|
| 1.4.4.1 | 17-Apr-2012 |
yamt | sync with head
|
| 1.5.2.1 | 18-Feb-2012 |
mrg | merge to -current.
|
| 1.6.6.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.7.2.1 | 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.19 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.18 | 24-Apr-2021 |
thorpej | branches: 1.18.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.17 | 24-Jul-2017 |
mrg | branches: 1.17.18;
mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.
also test-built some other mips kernels.
|
| 1.16 | 10-Jul-2011 |
matt | branches: 1.16.12; 1.16.30; 1.16.46;
cleanup <machine/*.h> includes
|
| 1.15 | 01-Feb-2011 |
matt | Use aprint_* and misc cleanup.
|
| 1.14 | 01-Feb-2011 |
matt | Update to CFATTACH_DECL_NEW.
|
| 1.13 | 28-Mar-2006 |
thorpej | branches: 1.13.84; 1.13.88; 1.13.94; 1.13.96;
Use device_unit().
|
| 1.12 | 11-Dec-2005 |
christos | branches: 1.12.4; 1.12.6; 1.12.8; 1.12.10; 1.12.12;
merge ktrace-lwp.
|
| 1.11 | 26-Aug-2005 |
drochner | kill some more simple submatch() functions, use config_stdsubmatch()
|
| 1.10 | 25-Aug-2005 |
drochner | replace the "locdesc_t" structure carrying the number of locators
explicitely by a plain integer array
the length in now known to all relevant parties, so this avoids
duplication of information, and we can allocate that thing in
drivers without hacks
|
| 1.9 | 13-Sep-2004 |
drochner | branches: 1.9.12;
autoconf cleanup: turn xxxsubmatch() functions into the locator
passing variants
|
| 1.8 | 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.7 | 01-Jan-2003 |
thorpej | branches: 1.7.2;
Use aprint_normal() for cfprint routines.
|
| 1.6 | 12-Nov-2002 |
simonb | Add support for the ST M41T81 RTC found on pass 2 swarm boards.
XXX: Much of this should live in arch/sbmips instead of arch/mips/sibyte.
XXX: These should be replaced with MI SMBus drivers one day.
|
| 1.5 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.4 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.3 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.2 | 27-Sep-2002 |
thorpej | Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.
|
| 1.1 | 04-Jun-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add an extremely rough SMBus handler and RTC driver. This will be
cleaned up significantly when we have an MI SMBus framework, but at
least we can see the RTC on the swarm now.
|
| 1.1.6.4 | 03-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.1.6.3 | 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.1.6.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.6.1 | 04-Jun-2002 |
nathanw | file sbsmbus.c was added on branch nathanw_sa on 2002-10-18 02:38:50 +0000
|
| 1.1.4.2 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 04-Jun-2002 |
gehenna | file sbsmbus.c was added on branch gehenna-devsw on 2002-07-14 18:37:16 +0000
|
| 1.1.2.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.2.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.2.1 | 04-Jun-2002 |
jdolecek | file sbsmbus.c was added on branch kqueue on 2002-06-23 17:38:08 +0000
|
| 1.7.2.4 | 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.7.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.7.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.7.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.9.12.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.12.12.1 | 31-Mar-2006 |
tron | Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.
|
| 1.12.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.12.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.12.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.12.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.13.96.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.13.94.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.13.88.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.13.84.1 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.16.46.1 | 30-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #231):
distrib/sets/lists/base/md.evbmips 1.3
doc/CHANGES 1.2303-1.2304
etc/etc.evbmips/MAKEDEV.conf 1.8
etc/etc.evbmips/Makefile.inc 1.22
etc/mtree/Makefile 1.37
etc/mtree/NetBSD.dist.evbmips 1.1
sys/arch/evbmips/Makefile 1.9
sys/arch/evbmips/conf/SBMIPS upto 1.2
sys/arch/evbmips/conf/SBMIPS.MP upto 1.2
sys/arch/evbmips/conf/SBMIPS64 upto 1.2
sys/arch/evbmips/conf/SBMIPS64.MP upto 1.2
sys/arch/evbmips/conf/files.sbmips upto 1.2
sys/arch/evbmips/conf/std.sbmips upto 1.2
sys/arch/evbmips/include/disklabel.h 1.6
sys/arch/evbmips/include/loadfile_machdep.h
sys/arch/evbmips/include/param.h 1.10
sys/arch/evbmips/include/pci_machdep.h 1.3
sys/arch/evbmips/sbmips/TODO
sys/arch/evbmips/sbmips/autoconf.c
sys/arch/evbmips/sbmips/autoconf.h
sys/arch/evbmips/sbmips/console.c
sys/arch/evbmips/sbmips/cpu.c upto 1.3
sys/arch/evbmips/sbmips/cpuvar.h
sys/arch/evbmips/sbmips/disksubr.c
sys/arch/evbmips/sbmips/leds.h
sys/arch/evbmips/sbmips/locore_machdep.S
sys/arch/evbmips/sbmips/machdep.c upto 1.2
sys/arch/evbmips/sbmips/rtc.c upto 1.2
sys/arch/evbmips/sbmips/sb1250_icu.c upto 1.2
sys/arch/evbmips/sbmips/swarm.h
sys/arch/evbmips/sbmips/systemsw.c upto 1.2
sys/arch/evbmips/sbmips/systemsw.h
sys/arch/evbmips/sbmips/zbbus.c upto 1.2
sys/arch/evbmips/stand/Makefile 1.1
sys/arch/evbmips/stand/sbmips/Makefile
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs upto 1.2
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs 1.3
sys/arch/evbmips/stand/sbmips/Makefile.bootxx
sys/arch/evbmips/stand/sbmips/Makefile.inc upto 1.3
sys/arch/evbmips/stand/sbmips/boot/Makefile
sys/arch/evbmips/stand/sbmips/boot/filesystem.c
sys/arch/evbmips/stand/sbmips/boot/version
sys/arch/evbmips/stand/sbmips/bootxx_cd9660/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_ffs/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_lfs/Makefile
sys/arch/evbmips/stand/sbmips/common/bbinfo.h
sys/arch/evbmips/stand/sbmips/common/blkdev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/blkdev.h
sys/arch/evbmips/stand/sbmips/common/boot.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/boot.ldscript
sys/arch/evbmips/stand/sbmips/common/booted_dev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/bootxx.c
sys/arch/evbmips/stand/sbmips/common/cfe.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.h
sys/arch/evbmips/stand/sbmips/common/cfe_api_int.h
sys/arch/evbmips/stand/sbmips/common/cfe_error.h
sys/arch/evbmips/stand/sbmips/common/cfe_ioctl.h
sys/arch/evbmips/stand/sbmips/common/checksize.sh
sys/arch/evbmips/stand/sbmips/common/common.h
sys/arch/evbmips/stand/sbmips/common/panic_putstr.c
sys/arch/evbmips/stand/sbmips/common/putstr.c
sys/arch/evbmips/stand/sbmips/common/start.S
sys/arch/evbmips/stand/sbmips/netboot/Makefile
sys/arch/evbmips/stand/sbmips/netboot/conf.c
sys/arch/evbmips/stand/sbmips/netboot/dev_net.c
sys/arch/evbmips/stand/sbmips/netboot/devopen.c
sys/arch/evbmips/stand/sbmips/netboot/getsecs.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/if_cfe.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/version
sys/arch/mips/conf/files.sibyte 1.8
sys/arch/mips/include/pmap.h 1.70
sys/arch/mips/sibyte/dev/sbbuswatch.c 1.4
sys/arch/mips/sibyte/dev/sbmac.c 1.49
sys/arch/mips/sibyte/dev/sbscn.c 1.43
sys/arch/mips/sibyte/dev/sbsmbus.c 1.17
sys/arch/mips/sibyte/dev/sbtimer.c 1.21
sys/arch/mips/sibyte/dev/sbwdog.c 1.15
sys/arch/mips/sibyte/pci/sbbrz_pci.c 1.8
usr.sbin/installboot/installboot.8 1.94
Move sys/arch/sbmips/* into sys/arch/evbmips/*/sbmips.
|
| 1.16.30.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.16.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.17.18.2 | 22-Mar-2021 |
thorpej | Audit CFARG_IATTR in config_found() calls, and remove it in situations
where the interface attribute is not ambiguous.
|
| 1.17.18.1 | 22-Mar-2021 |
thorpej | Mechanical conversion of config_found_sm_loc() -> config_found().
CFARG_IATTR usage needs to be audited.
|
| 1.18.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.1 | 04-Jun-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add an extremely rough SMBus handler and RTC driver. This will be
cleaned up significantly when we have an MI SMBus framework, but at
least we can see the RTC on the swarm now.
|
| 1.1.6.2 | 04-Jun-2002 |
simonb | Add an extremely rough SMBus handler and RTC driver. This will be
cleaned up significantly when we have an MI SMBus framework, but at
least we can see the RTC on the swarm now.
|
| 1.1.6.1 | 04-Jun-2002 |
simonb | file sbsmbusvar.h was added on branch nathanw_sa on 2002-06-04 08:32:43 +0000
|
| 1.1.4.2 | 14-Jul-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 04-Jun-2002 |
gehenna | file sbsmbusvar.h was added on branch gehenna-devsw on 2002-07-14 18:37:16 +0000
|
| 1.1.2.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.2.1 | 04-Jun-2002 |
jdolecek | file sbsmbusvar.h was added on branch kqueue on 2002-06-23 17:38:08 +0000
|
| 1.21 | 24-Jul-2017 |
mrg | mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.
also test-built some other mips kernels.
|
| 1.20 | 21-Jul-2016 |
christos | branches: 1.20.8;
make this compile
|
| 1.19 | 10-Mar-2011 |
tsutsui | branches: 1.19.14; 1.19.32; 1.19.36;
Set correct struct clockframe .intr value for hardclock(9).
|
| 1.18 | 20-Feb-2011 |
matt | Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.17 | 01-Feb-2011 |
matt | Use aprint_* and misc cleanup.
|
| 1.16 | 01-Feb-2011 |
matt | Update to CFATTACH_DECL_NEW.
|
| 1.15 | 14-Dec-2009 |
matt | branches: 1.15.4; 1.15.6; 1.15.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.14 | 12-Aug-2009 |
simonb | Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.13 | 08-Jan-2008 |
simonb | branches: 1.13.10; 1.13.28;
Add timecounter support for sbmips machines and Broadcom SiByte CPUs.
Based on patch from joerg@, with tweaks by me to work with sbmips
non-use of the CP0 count/compare registers for clock interrupts.
|
| 1.12 | 26-Nov-2007 |
ad | branches: 1.12.6;
IPL_STATCLOCK -> IPL_HIGH
|
| 1.11 | 29-Mar-2006 |
thorpej | branches: 1.11.18; 1.11.36; 1.11.38; 1.11.44;
Use device_cfdata().
|
| 1.10 | 11-Dec-2005 |
christos | branches: 1.10.4; 1.10.6; 1.10.8; 1.10.10; 1.10.12;
merge ktrace-lwp.
|
| 1.9 | 15-Jul-2003 |
lukem | branches: 1.9.16;
__KERNEL_RCSID()
|
| 1.8 | 07-Feb-2003 |
cgd | branches: 1.8.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.7 | 02-Oct-2002 |
thorpej | Add trailing ; to CFATTACH_DECL.
|
| 1.6 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.5 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.4 | 27-Jun-2002 |
simonb | branches: 1.4.2;
Remove some clocktick debug code.
|
| 1.3 | 06-Mar-2002 |
simonb | branches: 1.3.6; 1.3.10;
Implement a clkread() function for microtime() using a multu/mfhi
sequence using the reciprocal of the delay divisor to perform the
division.
Set the cp0 compare register so that it doesn't trigger interrupts and
reset the cp0 count register in the hardclock interrupt handler.
|
| 1.2 | 06-Mar-2002 |
simonb | Wrap long line and remove a bogus XXX comment.
|
| 1.1 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.3.10.4 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.3.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.3.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.3.10.1 | 06-Mar-2002 |
jdolecek | file sbtimer.c was added on branch kqueue on 2002-06-23 17:38:08 +0000
|
| 1.3.6.1 | 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.4.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.4.2.1 | 27-Jun-2002 |
nathanw | file sbtimer.c was added on branch nathanw_sa on 2002-10-18 02:38:50 +0000
|
| 1.8.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.8.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.8.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.9.16.3 | 21-Jan-2008 |
yamt | sync with head
|
| 1.9.16.2 | 07-Dec-2007 |
yamt | sync with head
|
| 1.9.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.10.12.1 | 31-Mar-2006 |
tron | Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.
|
| 1.10.10.1 | 19-Apr-2006 |
elad | sync with head - hopefully this will work
|
| 1.10.8.1 | 01-Apr-2006 |
yamt | sync with head.
|
| 1.10.6.1 | 22-Apr-2006 |
simonb | Sync with head.
|
| 1.10.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
| 1.11.44.2 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.11.44.1 | 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.11.38.1 | 09-Jan-2008 |
matt | sync with HEAD
|
| 1.11.36.1 | 27-Nov-2007 |
joerg | Sync with HEAD. amd64 Xen support needs testing.
|
| 1.11.18.1 | 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.12.6.1 | 08-Jan-2008 |
bouyer | Sync with HEAD
|
| 1.13.28.3 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.13.28.2 | 23-Nov-2009 |
matt | Use vaddr_t instead uint32_t for storing a pc since the latter won't work in
a LP64 kernel.
|
| 1.13.28.1 | 23-Nov-2009 |
matt | mips3_ld/mips3_sd need to be passed a volatile uint64_t *
|
| 1.13.10.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.13.10.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.15.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.15.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.15.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.15.4.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.15.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.19.36.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.19.32.2 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.19.32.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.19.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.20.8.1 | 30-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #231):
distrib/sets/lists/base/md.evbmips 1.3
doc/CHANGES 1.2303-1.2304
etc/etc.evbmips/MAKEDEV.conf 1.8
etc/etc.evbmips/Makefile.inc 1.22
etc/mtree/Makefile 1.37
etc/mtree/NetBSD.dist.evbmips 1.1
sys/arch/evbmips/Makefile 1.9
sys/arch/evbmips/conf/SBMIPS upto 1.2
sys/arch/evbmips/conf/SBMIPS.MP upto 1.2
sys/arch/evbmips/conf/SBMIPS64 upto 1.2
sys/arch/evbmips/conf/SBMIPS64.MP upto 1.2
sys/arch/evbmips/conf/files.sbmips upto 1.2
sys/arch/evbmips/conf/std.sbmips upto 1.2
sys/arch/evbmips/include/disklabel.h 1.6
sys/arch/evbmips/include/loadfile_machdep.h
sys/arch/evbmips/include/param.h 1.10
sys/arch/evbmips/include/pci_machdep.h 1.3
sys/arch/evbmips/sbmips/TODO
sys/arch/evbmips/sbmips/autoconf.c
sys/arch/evbmips/sbmips/autoconf.h
sys/arch/evbmips/sbmips/console.c
sys/arch/evbmips/sbmips/cpu.c upto 1.3
sys/arch/evbmips/sbmips/cpuvar.h
sys/arch/evbmips/sbmips/disksubr.c
sys/arch/evbmips/sbmips/leds.h
sys/arch/evbmips/sbmips/locore_machdep.S
sys/arch/evbmips/sbmips/machdep.c upto 1.2
sys/arch/evbmips/sbmips/rtc.c upto 1.2
sys/arch/evbmips/sbmips/sb1250_icu.c upto 1.2
sys/arch/evbmips/sbmips/swarm.h
sys/arch/evbmips/sbmips/systemsw.c upto 1.2
sys/arch/evbmips/sbmips/systemsw.h
sys/arch/evbmips/sbmips/zbbus.c upto 1.2
sys/arch/evbmips/stand/Makefile 1.1
sys/arch/evbmips/stand/sbmips/Makefile
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs upto 1.2
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs 1.3
sys/arch/evbmips/stand/sbmips/Makefile.bootxx
sys/arch/evbmips/stand/sbmips/Makefile.inc upto 1.3
sys/arch/evbmips/stand/sbmips/boot/Makefile
sys/arch/evbmips/stand/sbmips/boot/filesystem.c
sys/arch/evbmips/stand/sbmips/boot/version
sys/arch/evbmips/stand/sbmips/bootxx_cd9660/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_ffs/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_lfs/Makefile
sys/arch/evbmips/stand/sbmips/common/bbinfo.h
sys/arch/evbmips/stand/sbmips/common/blkdev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/blkdev.h
sys/arch/evbmips/stand/sbmips/common/boot.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/boot.ldscript
sys/arch/evbmips/stand/sbmips/common/booted_dev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/bootxx.c
sys/arch/evbmips/stand/sbmips/common/cfe.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.h
sys/arch/evbmips/stand/sbmips/common/cfe_api_int.h
sys/arch/evbmips/stand/sbmips/common/cfe_error.h
sys/arch/evbmips/stand/sbmips/common/cfe_ioctl.h
sys/arch/evbmips/stand/sbmips/common/checksize.sh
sys/arch/evbmips/stand/sbmips/common/common.h
sys/arch/evbmips/stand/sbmips/common/panic_putstr.c
sys/arch/evbmips/stand/sbmips/common/putstr.c
sys/arch/evbmips/stand/sbmips/common/start.S
sys/arch/evbmips/stand/sbmips/netboot/Makefile
sys/arch/evbmips/stand/sbmips/netboot/conf.c
sys/arch/evbmips/stand/sbmips/netboot/dev_net.c
sys/arch/evbmips/stand/sbmips/netboot/devopen.c
sys/arch/evbmips/stand/sbmips/netboot/getsecs.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/if_cfe.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/version
sys/arch/mips/conf/files.sibyte 1.8
sys/arch/mips/include/pmap.h 1.70
sys/arch/mips/sibyte/dev/sbbuswatch.c 1.4
sys/arch/mips/sibyte/dev/sbmac.c 1.49
sys/arch/mips/sibyte/dev/sbscn.c 1.43
sys/arch/mips/sibyte/dev/sbsmbus.c 1.17
sys/arch/mips/sibyte/dev/sbtimer.c 1.21
sys/arch/mips/sibyte/dev/sbwdog.c 1.15
sys/arch/mips/sibyte/pci/sbbrz_pci.c 1.8
usr.sbin/installboot/installboot.8 1.94
Move sys/arch/sbmips/* into sys/arch/evbmips/*/sbmips.
|
| 1.15 | 24-Jul-2017 |
mrg | mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.
also test-built some other mips kernels.
|
| 1.14 | 21-Jul-2016 |
christos | branches: 1.14.8;
make this compile
|
| 1.13 | 10-Jul-2011 |
matt | branches: 1.13.12; 1.13.30; 1.13.34;
cleanup <machine/*.h> includes
|
| 1.12 | 20-Feb-2011 |
matt | Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
|
| 1.11 | 01-Feb-2011 |
matt | Use aprint_* and misc cleanup.
|
| 1.10 | 01-Feb-2011 |
matt | Update to CFATTACH_DECL_NEW.
|
| 1.9 | 14-Dec-2009 |
matt | branches: 1.9.4; 1.9.6; 1.9.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
|
| 1.8 | 12-Aug-2009 |
simonb | Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.7 | 12-Jan-2006 |
simonb | branches: 1.7.76; 1.7.94;
Use EINVAL for an invalid interval instead of EOPNOTSUPP.
Pointed out by Allen Briggs.
|
| 1.6 | 11-Dec-2005 |
christos | branches: 1.6.2;
merge ktrace-lwp.
|
| 1.5 | 15-Jul-2003 |
lukem | branches: 1.5.16;
__KERNEL_RCSID()
|
| 1.4 | 02-Oct-2002 |
thorpej | branches: 1.4.6;
Add trailing ; to CFATTACH_DECL.
|
| 1.3 | 01-Oct-2002 |
thorpej | Use CFATTACH_DECL().
|
| 1.2 | 27-Sep-2002 |
thorpej | Declare all cfattach structures const.
|
| 1.1 | 31-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Add support for the watchdog timers on the BCM1xxx parts.
|
| 1.1.6.3 | 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 31-Jul-2002 |
jdolecek | file sbwdog.c was added on branch kqueue on 2002-09-06 08:37:41 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 31-Jul-2002 |
gehenna | file sbwdog.c was added on branch gehenna-devsw on 2002-08-31 13:45:22 +0000
|
| 1.1.2.2 | 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 | 31-Jul-2002 |
nathanw | file sbwdog.c was added on branch nathanw_sa on 2002-10-18 02:38:51 +0000
|
| 1.4.6.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.4.6.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.4.6.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
| 1.6.2.1 | 15-Jan-2006 |
yamt | sync with head.
|
| 1.7.94.3 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.7.94.2 | 15-May-2010 |
matt | Make the sibyte watchdog establish an interrupt, and if taken, drop into DDB.
Make sure these interrupt are not blocked by IPL_HIGH.
|
| 1.7.94.1 | 23-Nov-2009 |
matt | mips3_ld/mips3_sd need to be passed a volatile uint64_t *
|
| 1.7.76.2 | 11-Mar-2010 |
yamt | sync with head
|
| 1.7.76.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.9.8.2 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.9.8.1 | 08-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.9.6.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.9.4.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.13.34.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.13.30.2 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.13.30.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.13.12.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.14.8.1 | 30-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #231):
distrib/sets/lists/base/md.evbmips 1.3
doc/CHANGES 1.2303-1.2304
etc/etc.evbmips/MAKEDEV.conf 1.8
etc/etc.evbmips/Makefile.inc 1.22
etc/mtree/Makefile 1.37
etc/mtree/NetBSD.dist.evbmips 1.1
sys/arch/evbmips/Makefile 1.9
sys/arch/evbmips/conf/SBMIPS upto 1.2
sys/arch/evbmips/conf/SBMIPS.MP upto 1.2
sys/arch/evbmips/conf/SBMIPS64 upto 1.2
sys/arch/evbmips/conf/SBMIPS64.MP upto 1.2
sys/arch/evbmips/conf/files.sbmips upto 1.2
sys/arch/evbmips/conf/std.sbmips upto 1.2
sys/arch/evbmips/include/disklabel.h 1.6
sys/arch/evbmips/include/loadfile_machdep.h
sys/arch/evbmips/include/param.h 1.10
sys/arch/evbmips/include/pci_machdep.h 1.3
sys/arch/evbmips/sbmips/TODO
sys/arch/evbmips/sbmips/autoconf.c
sys/arch/evbmips/sbmips/autoconf.h
sys/arch/evbmips/sbmips/console.c
sys/arch/evbmips/sbmips/cpu.c upto 1.3
sys/arch/evbmips/sbmips/cpuvar.h
sys/arch/evbmips/sbmips/disksubr.c
sys/arch/evbmips/sbmips/leds.h
sys/arch/evbmips/sbmips/locore_machdep.S
sys/arch/evbmips/sbmips/machdep.c upto 1.2
sys/arch/evbmips/sbmips/rtc.c upto 1.2
sys/arch/evbmips/sbmips/sb1250_icu.c upto 1.2
sys/arch/evbmips/sbmips/swarm.h
sys/arch/evbmips/sbmips/systemsw.c upto 1.2
sys/arch/evbmips/sbmips/systemsw.h
sys/arch/evbmips/sbmips/zbbus.c upto 1.2
sys/arch/evbmips/stand/Makefile 1.1
sys/arch/evbmips/stand/sbmips/Makefile
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs upto 1.2
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs 1.3
sys/arch/evbmips/stand/sbmips/Makefile.bootxx
sys/arch/evbmips/stand/sbmips/Makefile.inc upto 1.3
sys/arch/evbmips/stand/sbmips/boot/Makefile
sys/arch/evbmips/stand/sbmips/boot/filesystem.c
sys/arch/evbmips/stand/sbmips/boot/version
sys/arch/evbmips/stand/sbmips/bootxx_cd9660/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_ffs/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_lfs/Makefile
sys/arch/evbmips/stand/sbmips/common/bbinfo.h
sys/arch/evbmips/stand/sbmips/common/blkdev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/blkdev.h
sys/arch/evbmips/stand/sbmips/common/boot.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/boot.ldscript
sys/arch/evbmips/stand/sbmips/common/booted_dev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/bootxx.c
sys/arch/evbmips/stand/sbmips/common/cfe.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.h
sys/arch/evbmips/stand/sbmips/common/cfe_api_int.h
sys/arch/evbmips/stand/sbmips/common/cfe_error.h
sys/arch/evbmips/stand/sbmips/common/cfe_ioctl.h
sys/arch/evbmips/stand/sbmips/common/checksize.sh
sys/arch/evbmips/stand/sbmips/common/common.h
sys/arch/evbmips/stand/sbmips/common/panic_putstr.c
sys/arch/evbmips/stand/sbmips/common/putstr.c
sys/arch/evbmips/stand/sbmips/common/start.S
sys/arch/evbmips/stand/sbmips/netboot/Makefile
sys/arch/evbmips/stand/sbmips/netboot/conf.c
sys/arch/evbmips/stand/sbmips/netboot/dev_net.c
sys/arch/evbmips/stand/sbmips/netboot/devopen.c
sys/arch/evbmips/stand/sbmips/netboot/getsecs.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/if_cfe.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/version
sys/arch/mips/conf/files.sibyte 1.8
sys/arch/mips/include/pmap.h 1.70
sys/arch/mips/sibyte/dev/sbbuswatch.c 1.4
sys/arch/mips/sibyte/dev/sbmac.c 1.49
sys/arch/mips/sibyte/dev/sbscn.c 1.43
sys/arch/mips/sibyte/dev/sbsmbus.c 1.17
sys/arch/mips/sibyte/dev/sbtimer.c 1.21
sys/arch/mips/sibyte/dev/sbwdog.c 1.15
sys/arch/mips/sibyte/pci/sbbrz_pci.c 1.8
usr.sbin/installboot/installboot.8 1.94
Move sys/arch/sbmips/* into sys/arch/evbmips/*/sbmips.
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_hr.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:32 +0000
|
| 1.3 | 03-Dec-2024 |
andvar | s/Diagnsostic/Diagnostic/ in comment.
|
| 1.2 | 22-Nov-2009 |
mbalmer | branches: 1.2.100;
more s/the the/the/
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.3 | 11-Mar-2010 |
yamt | sync with head
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_hsp.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:32 +0000
|
| 1.2.100.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_ht.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:33 +0000
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_int.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:33 +0000
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_l2c.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:33 +0000
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_mc.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:33 +0000
|
| 1.2 | 15-Jul-2025 |
andvar | Fix various typos in comments.
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2; 1.1.102;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.102.1 | 02-Aug-2025 |
perseant | Sync with HEAD
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_pci.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:33 +0000
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_pm.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:33 +0000
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_regs.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:33 +0000
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_rld.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:34 +0000
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file bcm1480_scd.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:34 +0000
|
| 1.7 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.6 | 11-Mar-2004 |
cgd | branches: 1.6.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.5 | 07-Feb-2003 |
cgd | branches: 1.5.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.4 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.3 | 31-Jul-2002 |
simonb | branches: 1.3.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.2 | 06-Mar-2002 |
simonb | branches: 1.2.6; 1.2.10;
Use MIPS_PHYS_TO_KSEG1 instead of cfe's PHYS_TO_K1 macro.
|
| 1.1 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.2.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.2.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.2.10.1 | 06-Mar-2002 |
jdolecek | file sb1250_defs.h was added on branch kqueue on 2002-06-23 17:38:09 +0000
|
| 1.2.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.3.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.3.2.1 | 31-Jul-2002 |
nathanw | file sb1250_defs.h was added on branch nathanw_sa on 2002-11-11 22:01:01 +0000
|
| 1.5.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.6.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.5 | 11-Mar-2004 |
cgd | branches: 1.5.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.4 | 07-Feb-2003 |
cgd | branches: 1.4.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.3 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.2 | 31-Jul-2002 |
simonb | branches: 1.2.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sb1250_dma.h was added on branch kqueue on 2002-06-23 17:38:09 +0000
|
| 1.1.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.1 | 31-Jul-2002 |
nathanw | file sb1250_dma.h was added on branch nathanw_sa on 2002-11-11 22:01:02 +0000
|
| 1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.5 | 11-Mar-2004 |
cgd | branches: 1.5.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.4 | 07-Feb-2003 |
cgd | branches: 1.4.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.3 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.2 | 31-Jul-2002 |
simonb | branches: 1.2.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sb1250_genbus.h was added on branch kqueue on 2002-06-23 17:38:09 +0000
|
| 1.1.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.1 | 31-Jul-2002 |
nathanw | file sb1250_genbus.h was added on branch nathanw_sa on 2002-11-11 22:01:03 +0000
|
| 1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.5 | 11-Mar-2004 |
cgd | branches: 1.5.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.4 | 07-Feb-2003 |
cgd | branches: 1.4.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.3 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.2 | 31-Jul-2002 |
simonb | branches: 1.2.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sb1250_int.h was added on branch kqueue on 2002-06-23 17:38:09 +0000
|
| 1.1.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.1 | 31-Jul-2002 |
nathanw | file sb1250_int.h was added on branch nathanw_sa on 2002-11-11 22:01:05 +0000
|
| 1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.5 | 11-Mar-2004 |
cgd | branches: 1.5.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.4 | 07-Feb-2003 |
cgd | branches: 1.4.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.3 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.2 | 31-Jul-2002 |
simonb | branches: 1.2.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sb1250_l2c.h was added on branch kqueue on 2002-06-23 17:38:09 +0000
|
| 1.1.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.1 | 31-Jul-2002 |
nathanw | file sb1250_l2c.h was added on branch nathanw_sa on 2002-11-11 22:01:06 +0000
|
| 1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.5 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.4 | 11-Mar-2004 |
cgd | branches: 1.4.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.3 | 07-Feb-2003 |
cgd | branches: 1.3.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.2 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.1 | 31-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 31-Jul-2002 |
jdolecek | file sb1250_ldt.h was added on branch kqueue on 2002-09-06 08:37:44 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 31-Jul-2002 |
gehenna | file sb1250_ldt.h was added on branch gehenna-devsw on 2002-08-31 13:45:23 +0000
|
| 1.1.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.2.1 | 31-Jul-2002 |
nathanw | file sb1250_ldt.h was added on branch nathanw_sa on 2002-11-11 22:01:07 +0000
|
| 1.3.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.4.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.8 | 31-Jul-2021 |
andvar | s/threshhold/threshold
|
| 1.7 | 28-May-2019 |
msaitoh | branches: 1.7.14;
s/recieve/receive/
|
| 1.6 | 11-Aug-2009 |
simonb | branches: 1.6.64;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.5 | 11-Mar-2004 |
cgd | branches: 1.5.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.4 | 07-Feb-2003 |
cgd | branches: 1.4.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.3 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.2 | 31-Jul-2002 |
simonb | branches: 1.2.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sb1250_mac.h was added on branch kqueue on 2002-06-23 17:38:09 +0000
|
| 1.1.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.1 | 31-Jul-2002 |
nathanw | file sb1250_mac.h was added on branch nathanw_sa on 2002-11-11 22:01:07 +0000
|
| 1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6.64.1 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.7.14.1 | 01-Aug-2021 |
thorpej | Sync with HEAD.
|
| 1.6 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.5 | 11-Mar-2004 |
cgd | branches: 1.5.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.4 | 07-Feb-2003 |
cgd | branches: 1.4.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.3 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.2 | 31-Jul-2002 |
simonb | branches: 1.2.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sb1250_mc.h was added on branch kqueue on 2002-06-23 17:38:10 +0000
|
| 1.1.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.1 | 31-Jul-2002 |
nathanw | file sb1250_mc.h was added on branch nathanw_sa on 2002-11-11 22:01:08 +0000
|
| 1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.5 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.4 | 11-Mar-2004 |
cgd | branches: 1.4.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.3 | 07-Feb-2003 |
cgd | branches: 1.3.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.2 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.1 | 31-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 31-Jul-2002 |
jdolecek | file sb1250_pci.h was added on branch kqueue on 2002-09-06 08:37:45 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 31-Jul-2002 |
gehenna | file sb1250_pci.h was added on branch gehenna-devsw on 2002-08-31 13:45:23 +0000
|
| 1.1.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.1.2.1 | 31-Jul-2002 |
nathanw | file sb1250_pci.h was added on branch nathanw_sa on 2002-11-11 22:01:09 +0000
|
| 1.3.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.4.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.9 | 12-Aug-2009 |
simonb | Remove many magic numbers for addresses and interrupt numbers, and use
constants defined in SiByte/Broadcom standard header files. Switch from
using offsets for locators to actual addresses.
Tested on a swarm (my rhone is dead, but should be OK there too).
|
| 1.8 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.7 | 11-Mar-2004 |
cgd | branches: 1.7.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.6 | 07-Feb-2003 |
cgd | branches: 1.6.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.5 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.4 | 31-Jul-2002 |
simonb | branches: 1.4.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.3 | 28-Mar-2002 |
simonb | branches: 1.3.2; 1.3.6;
There's 8 interrupt_status_N registers, not 7.
|
| 1.2 | 17-Mar-2002 |
simonb | Fix some whitespace/indentation niggles.
|
| 1.1 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.3.6.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.3.6.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.3.6.1 | 28-Mar-2002 |
jdolecek | file sb1250_regs.h was added on branch kqueue on 2002-06-23 17:38:10 +0000
|
| 1.3.2.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.4.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.4.2.1 | 31-Jul-2002 |
nathanw | file sb1250_regs.h was added on branch nathanw_sa on 2002-11-11 22:01:10 +0000
|
| 1.6.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.7.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.8 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.7 | 11-Mar-2004 |
cgd | branches: 1.7.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.6 | 07-Feb-2003 |
cgd | branches: 1.6.2;
add BCM112x A2 definition
|
| 1.5 | 06-Jan-2003 |
wiz | writable, not writeable.
|
| 1.4 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.3 | 31-Jul-2002 |
simonb | branches: 1.3.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.2 | 30-Jul-2002 |
simonb | Fix the mask for the watchdog init and count registers.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sb1250_scd.h was added on branch kqueue on 2002-06-23 17:38:10 +0000
|
| 1.1.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.3.2.3 | 07-Jan-2003 |
thorpej | Sync with HEAD.
|
| 1.3.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.3.2.1 | 31-Jul-2002 |
nathanw | file sb1250_scd.h was added on branch nathanw_sa on 2002-11-11 22:01:12 +0000
|
| 1.6.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.7.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.5 | 11-Mar-2004 |
cgd | branches: 1.5.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.4 | 07-Feb-2003 |
cgd | branches: 1.4.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.3 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.2 | 31-Jul-2002 |
simonb | branches: 1.2.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sb1250_smbus.h was added on branch kqueue on 2002-06-23 17:38:10 +0000
|
| 1.1.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.1 | 31-Jul-2002 |
nathanw | file sb1250_smbus.h was added on branch nathanw_sa on 2002-11-11 22:01:12 +0000
|
| 1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.4 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.3 | 11-Mar-2004 |
cgd | branches: 1.3.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.2 | 07-Feb-2003 |
cgd | branches: 1.2.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 31-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 31-Jul-2002 |
jdolecek | file sb1250_syncser.h was added on branch kqueue on 2002-09-06 08:37:47 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 31-Jul-2002 |
gehenna | file sb1250_syncser.h was added on branch gehenna-devsw on 2002-08-31 13:45:24 +0000
|
| 1.1.2.2 | 31-Jul-2002 |
simonb | Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1.2.1 | 31-Jul-2002 |
simonb | file sb1250_syncser.h was added on branch nathanw_sa on 2002-07-31 06:26:27 +0000
|
| 1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.3.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.6 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.5 | 11-Mar-2004 |
cgd | branches: 1.5.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.4 | 07-Feb-2003 |
cgd | branches: 1.4.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.3 | 08-Nov-2002 |
cgd | update SiByte includes from their master versions. (main differences:
bug fixes, conditionalization of different chip support, new features.)
(Reviewed and tested by simonb.)
|
| 1.2 | 31-Jul-2002 |
simonb | branches: 1.2.2;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.6; 1.1.10;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.10.3 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file sb1250_uart.h was added on branch kqueue on 2002-06-23 17:38:10 +0000
|
| 1.1.6.1 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.2.2.2 | 11-Nov-2002 |
nathanw | Catch up to -current
|
| 1.2.2.1 | 31-Jul-2002 |
nathanw | file sb1250_uart.h was added on branch nathanw_sa on 2002-11-11 22:01:13 +0000
|
| 1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.5.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.4 | 11-Aug-2009 |
simonb | Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.3 | 11-Mar-2004 |
cgd | branches: 1.3.106;
update from SiByte Sample Software version 1.0.26 from:
http://sibyte.broadcom.com/public/resources/download-request.html?samplesw/samplesw-1.0.26.tar.bz2
|
| 1.2 | 07-Feb-2003 |
cgd | branches: 1.2.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 31-Jul-2002 |
simonb | branches: 1.1.2; 1.1.4; 1.1.6;
Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1.6.2 | 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.1.6.1 | 31-Jul-2002 |
jdolecek | file sb1250_wid.h was added on branch kqueue on 2002-09-06 08:37:48 +0000
|
| 1.1.4.2 | 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.1.4.1 | 31-Jul-2002 |
gehenna | file sb1250_wid.h was added on branch gehenna-devsw on 2002-08-31 13:45:24 +0000
|
| 1.1.2.2 | 31-Jul-2002 |
simonb | Sync bcm1250 headers with cfe-1.0.32.
|
| 1.1.2.1 | 31-Jul-2002 |
simonb | file sb1250_wid.h was added on branch nathanw_sa on 2002-07-31 06:26:28 +0000
|
| 1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.3.106.1 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1 | 11-Aug-2009 |
simonb | branches: 1.1.2;
Sync SiByte includes with cfe-1.4.2.
Includes support for bcm1x55 and bcm1x80 chips.
Tested on a BCM1250 board.
|
| 1.1.2.2 | 19-Aug-2009 |
yamt | sync with head.
|
| 1.1.2.1 | 11-Aug-2009 |
yamt | file ui_bitfields.h was added on branch yamt-nfs-mp on 2009-08-19 18:46:35 +0000
|
| 1.2 | 07-Feb-2003 |
cgd | Update to consistently use Broadcom GPL-compatible license on all SiByte code.
|
| 1.1 | 05-Mar-2002 |
simonb | branches: 1.1.10; 1.1.12;
Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.2 | 05-Mar-2002 |
simonb | Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
|
| 1.1.12.1 | 05-Mar-2002 |
simonb | file zbbusvar.h was added on branch nathanw_sa on 2002-03-05 23:46:45 +0000
|
| 1.1.10.2 | 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.10.1 | 05-Mar-2002 |
jdolecek | file zbbusvar.h was added on branch kqueue on 2002-06-23 17:38:10 +0000
|
| 1.9 | 03-Mar-2022 |
riastradh | mips: Use device_set_private in a few drivers.
|
| 1.8 | 22-Jan-2022 |
skrll | Ensure bus_dmatag_subregion is called with an inclusive max_addr
everywhere.
|
| 1.7 | 22-Jan-2022 |
skrll | Trailing whitespace
|
| 1.6 | 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.5 | 24-Apr-2021 |
thorpej | branches: 1.5.8;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.4 | 21-Jul-2016 |
christos | branches: 1.4.30;
make this compile
|
| 1.3 | 17-May-2011 |
dyoung | branches: 1.3.14; 1.3.32; 1.3.36;
PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.
Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.
This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:
algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
|
| 1.2 | 17-Feb-2011 |
matt | Add PCI support for BCM1125/1250.
|
| 1.1 | 21-Jan-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file sbbrz.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.2 | 31-May-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.6 | 09-Jun-2010 |
matt | Update to the device NWO:
Use CFATTACH_DECL_NEW
struct device * -> device_t
struct cfdata * -> cfdata_t
printf -> aprint_normal_*
Use device_* accessors
|
| 1.1.2.5 | 23-Feb-2010 |
matt | Make sure <mips/locore.h> is not included by MI code.
Add send_ipi and cpu_offline_md hooks to locoresw.
Add MP support to pmap (pvlist locking, tlb locking).
Add TLB shootdown support (see comment at the top of mips/pmap_tlb.c).
Add mipsXX_tlb_invalidate_globals routine
|
| 1.1.2.4 | 21-Jan-2010 |
matt | Don't forget to init pba_bridgetag
|
| 1.1.2.3 | 21-Jan-2010 |
matt | Print out the mode of pci (device or host).
|
| 1.1.2.2 | 21-Jan-2010 |
snj | Drop 3rd and 4th clauses on a TNF license.
|
| 1.1.2.1 | 21-Jan-2010 |
matt | Compile-tested only initial PCI support (from 10 years ago!) for sbmips
finally committed to cvs.
|
| 1.3.36.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.3.32.1 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.3.14.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.30.1 | 21-Mar-2021 |
thorpej | Give config_found() the same variadic arguments treatment as
config_search(). This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls. Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.
|
| 1.5.8.1 | 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.2 | 17-Feb-2011 |
matt | Add PCI support for BCM1125/1250.
|
| 1.1 | 21-Jan-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file sbbrz_bus_io.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.2 | 21-Jan-2010 |
matt | Define PCI bus spaces as little endian
|
| 1.1.2.1 | 21-Jan-2010 |
matt | Compile-tested only initial PCI support (from 10 years ago!) for sbmips
finally committed to cvs.
|
| 1.2 | 17-Feb-2011 |
matt | Add PCI support for BCM1125/1250.
|
| 1.1 | 21-Jan-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file sbbrz_bus_mem.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.2 | 21-Jan-2010 |
matt | Define PCI bus spaces as little endian
|
| 1.1.2.1 | 21-Jan-2010 |
matt | Compile-tested only initial PCI support (from 10 years ago!) for sbmips
finally committed to cvs.
|
| 1.8 | 24-Jul-2017 |
mrg | mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.
also test-built some other mips kernels.
|
| 1.7 | 21-Jul-2016 |
christos | branches: 1.7.8;
make this compile
|
| 1.6 | 02-Oct-2015 |
msaitoh | branches: 1.6.2;
PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific
|
| 1.5 | 29-Mar-2014 |
christos | branches: 1.5.6;
make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.
|
| 1.4 | 10-Jul-2011 |
matt | branches: 1.4.2; 1.4.12; 1.4.16;
cleanup <machine/*.h> includes
|
| 1.3 | 06-Apr-2011 |
dyoung | Fix pci_attach_args constification fallout.
|
| 1.2 | 17-Feb-2011 |
matt | Add PCI support for BCM1125/1250.
|
| 1.1 | 21-Jan-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file sbbrz_pci.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.2 | 21-Apr-2011 |
rmind | sync with head
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.7 | 14-May-2010 |
matt | Do the sync before the badaddr in pci_conf_read so make no other PCI
transactions are pending before we probe.
|
| 1.1.2.6 | 14-May-2010 |
matt | Make badaddr64 work on O32. Add a few syncs to force errors.
|
| 1.1.2.5 | 21-Jan-2010 |
cyber | and the tmp var
|
| 1.1.2.4 | 21-Jan-2010 |
cyber | GC some debug code
|
| 1.1.2.3 | 21-Jan-2010 |
matt | fix off by one in intr_map.
|
| 1.1.2.2 | 21-Jan-2010 |
matt | Add rest of pci framework functions.
Disable pciide compat intr establish for sbmips
|
| 1.1.2.1 | 21-Jan-2010 |
matt | Compile-tested only initial PCI support (from 10 years ago!) for sbmips
finally committed to cvs.
|
| 1.4.16.1 | 18-May-2014 |
rmind | sync with head
|
| 1.4.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.4.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.4.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.5.6.3 | 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.5.6.2 | 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.5.6.1 | 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.6.2.1 | 26-Jul-2016 |
pgoyette | Sync with HEAD
|
| 1.7.8.1 | 30-Aug-2017 |
martin | Pull up following revision(s) (requested by mrg in ticket #231):
distrib/sets/lists/base/md.evbmips 1.3
doc/CHANGES 1.2303-1.2304
etc/etc.evbmips/MAKEDEV.conf 1.8
etc/etc.evbmips/Makefile.inc 1.22
etc/mtree/Makefile 1.37
etc/mtree/NetBSD.dist.evbmips 1.1
sys/arch/evbmips/Makefile 1.9
sys/arch/evbmips/conf/SBMIPS upto 1.2
sys/arch/evbmips/conf/SBMIPS.MP upto 1.2
sys/arch/evbmips/conf/SBMIPS64 upto 1.2
sys/arch/evbmips/conf/SBMIPS64.MP upto 1.2
sys/arch/evbmips/conf/files.sbmips upto 1.2
sys/arch/evbmips/conf/std.sbmips upto 1.2
sys/arch/evbmips/include/disklabel.h 1.6
sys/arch/evbmips/include/loadfile_machdep.h
sys/arch/evbmips/include/param.h 1.10
sys/arch/evbmips/include/pci_machdep.h 1.3
sys/arch/evbmips/sbmips/TODO
sys/arch/evbmips/sbmips/autoconf.c
sys/arch/evbmips/sbmips/autoconf.h
sys/arch/evbmips/sbmips/console.c
sys/arch/evbmips/sbmips/cpu.c upto 1.3
sys/arch/evbmips/sbmips/cpuvar.h
sys/arch/evbmips/sbmips/disksubr.c
sys/arch/evbmips/sbmips/leds.h
sys/arch/evbmips/sbmips/locore_machdep.S
sys/arch/evbmips/sbmips/machdep.c upto 1.2
sys/arch/evbmips/sbmips/rtc.c upto 1.2
sys/arch/evbmips/sbmips/sb1250_icu.c upto 1.2
sys/arch/evbmips/sbmips/swarm.h
sys/arch/evbmips/sbmips/systemsw.c upto 1.2
sys/arch/evbmips/sbmips/systemsw.h
sys/arch/evbmips/sbmips/zbbus.c upto 1.2
sys/arch/evbmips/stand/Makefile 1.1
sys/arch/evbmips/stand/sbmips/Makefile
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs upto 1.2
sys/arch/evbmips/stand/sbmips/Makefile.bootprogs 1.3
sys/arch/evbmips/stand/sbmips/Makefile.bootxx
sys/arch/evbmips/stand/sbmips/Makefile.inc upto 1.3
sys/arch/evbmips/stand/sbmips/boot/Makefile
sys/arch/evbmips/stand/sbmips/boot/filesystem.c
sys/arch/evbmips/stand/sbmips/boot/version
sys/arch/evbmips/stand/sbmips/bootxx_cd9660/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_ffs/Makefile
sys/arch/evbmips/stand/sbmips/bootxx_lfs/Makefile
sys/arch/evbmips/stand/sbmips/common/bbinfo.h
sys/arch/evbmips/stand/sbmips/common/blkdev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/blkdev.h
sys/arch/evbmips/stand/sbmips/common/boot.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/boot.ldscript
sys/arch/evbmips/stand/sbmips/common/booted_dev.c upto 1.2
sys/arch/evbmips/stand/sbmips/common/bootxx.c
sys/arch/evbmips/stand/sbmips/common/cfe.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.c
sys/arch/evbmips/stand/sbmips/common/cfe_api.h
sys/arch/evbmips/stand/sbmips/common/cfe_api_int.h
sys/arch/evbmips/stand/sbmips/common/cfe_error.h
sys/arch/evbmips/stand/sbmips/common/cfe_ioctl.h
sys/arch/evbmips/stand/sbmips/common/checksize.sh
sys/arch/evbmips/stand/sbmips/common/common.h
sys/arch/evbmips/stand/sbmips/common/panic_putstr.c
sys/arch/evbmips/stand/sbmips/common/putstr.c
sys/arch/evbmips/stand/sbmips/common/start.S
sys/arch/evbmips/stand/sbmips/netboot/Makefile
sys/arch/evbmips/stand/sbmips/netboot/conf.c
sys/arch/evbmips/stand/sbmips/netboot/dev_net.c
sys/arch/evbmips/stand/sbmips/netboot/devopen.c
sys/arch/evbmips/stand/sbmips/netboot/getsecs.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/if_cfe.c upto 1.2
sys/arch/evbmips/stand/sbmips/netboot/version
sys/arch/mips/conf/files.sibyte 1.8
sys/arch/mips/include/pmap.h 1.70
sys/arch/mips/sibyte/dev/sbbuswatch.c 1.4
sys/arch/mips/sibyte/dev/sbmac.c 1.49
sys/arch/mips/sibyte/dev/sbscn.c 1.43
sys/arch/mips/sibyte/dev/sbsmbus.c 1.17
sys/arch/mips/sibyte/dev/sbtimer.c 1.21
sys/arch/mips/sibyte/dev/sbwdog.c 1.15
sys/arch/mips/sibyte/pci/sbbrz_pci.c 1.8
usr.sbin/installboot/installboot.8 1.94
Move sys/arch/sbmips/* into sys/arch/evbmips/*/sbmips.
|
| 1.2 | 17-Feb-2011 |
matt | Add PCI support for BCM1125/1250.
|
| 1.1 | 21-Jan-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file sbbrzvar.h was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.1 | 21-Jan-2010 |
matt | Compile-tested only initial PCI support (from 10 years ago!) for sbmips
finally committed to cvs.
|
| 1.1 | 21-Jan-2010 |
matt | branches: 1.1.2;
file sbldthb.c was initially added on branch matt-nb5-mips64.
|
| 1.1.2.2 | 21-Jan-2010 |
matt | sbldthb is dead. ppb.c will now take care of it.
sbpcihb is now brain dead. only print whether we are in host or device mode
|
| 1.1.2.1 | 21-Jan-2010 |
matt | Compile-tested only initial PCI support (from 10 years ago!) for sbmips
finally committed to cvs.
|
| 1.3 | 10-Jul-2011 |
matt | cleanup <machine/*.h> includes
|
| 1.2 | 17-Feb-2011 |
matt | Add PCI support for BCM1125/1250.
|
| 1.1 | 21-Jan-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file sbpcihb.c was initially added on branch matt-nb5-mips64.
|
| 1.1.10.1 | 05-Mar-2011 |
bouyer | Sync with HEAD
|
| 1.1.8.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.1.6.1 | 05-Mar-2011 |
rmind | sync with head
|
| 1.1.2.2 | 21-Jan-2010 |
matt | sbldthb is dead. ppb.c will now take care of it.
sbpcihb is now brain dead. only print whether we are in host or device mode
|
| 1.1.2.1 | 21-Jan-2010 |
matt | Compile-tested only initial PCI support (from 10 years ago!) for sbmips
finally committed to cvs.
|
