malloc(9) -> kmem(9)

branches: 1.5.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.

branches: 1.4.54;
#include <sys/bus.h> instead of <machine/bus.h>.

Set the GPIO to enable AGP configuration space access when attaching gtpci0
and do not reset it again. This keeps AGP devices visible after configure().
Improved the match-function to look for a Discovery controller on the PCI
bus.

branches: 1.2.2; 1.2.4; 1.2.6;
My pegasos2 doesn't have an ethernet node at the top level.
Deal with it.

Support MV64361 on PegasosII by gt(4).
+ Support gtpci@gt instead of pegasospci more smartly.
+ Support Gigabit Ethernet by mvgbe@gt.

Merge thorpej-cfargs2.

branches: 1.20.4;
Pass along our device handle to the PCI bus instance we attach.

branches: 1.19.2; 1.19.4;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.18.2;
malloc(9) -> kmem(9)

branches: 1.17.2;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.

branches: 1.14.16;
PR/51827: David Binderman: delete pointless local variable

Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.

branches: 1.12.6; 1.12.10;
Use PRIxPTR

branches: 1.11.6; 1.11.10;
converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

branches: 1.10.2; 1.10.6;
struct device * -> device_t
struct cfdata * -> cfdata_t
use device accessors, use device_private.
some softc/device_t splits (macppc needs a bunch more)
aprint*_dev used considerably more

branches: 1.9.2;
PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

branches: 1.8.22; 1.8.28;
Remove clause 3 and 4 from TNF licenses

branches: 1.7.2; 1.7.4;
SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in
figuring out all the crazy nuances of getting this working, and to
Michael Lorenz for testing/fixing my changes on macppc. Tested with a
quad-proc 7044-270.
Summary of changes:

Bumped CPU_MAXNUM to 16 on ofppc.
Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs.
Fixed a bug in the test for a 64bit bridge cpu early in locore.S
Added code to set the interrupt priority for all CPUs with an openpic.
Change rtas to probe before cpus, to allow use of the rtas freeze/thaw
timebase code routines.
Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM.
Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow
writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies
itself as 0.
Change the hatchstack/interrupt stack allocations to allocate a 8192byte
interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and
allocate them no lower than 0x10000. Allocate them separately to prevent the
hatch stack corrupting the interrupt stack later on.
If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch()
Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp.
Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary
procs early, and place them into a spinloop waiting for the hatch routines
to be ready.
Modify the ipi routines to deal with openpics that reverse byte order on read
from an ipi register. (such as on the 7044)
Change the rtas setup to allocate the rtas physical base address above
the kernel, to avoid mucking up the hatch/interrupt stacks.

branches: 1.6.6;
Use model_init to clean up how we decide the ranges for
PCI_NETBSD_CONFIGURE. Add some code to hopefully better handle the
firepower and powerstackII, based on the OFW dumps from those machines.
Untested on those machines, but doesn't break anything on pegasos/7044.

Add support to ofppc for the IBM 7044-270 machine. This is a POWER3-II
based machine. Currently the kernel to run on this machine is
incompatible with the standard GENERIC kernel, so for now, we have a
separate GENERIC_B64. Eventually, I hope to combine the two.

Please note, this is a port of 32bit ofppc, not a powerpc64 port.

Thanks to Matt Thomas and Kevin Bowling for helping to make this port
possible.

Summary of changes:

Change ofwpci to use the ofmethod config for configuring the PCI bus,
rather than indirect configuration.
Move the wiring of the interrupt controllers from at the start of the
boot, into the configuration of the first PCI bus.
Rewrite the map_isa_ioregs() hack to work on a machine without BATs
Fix a ton of bugs in the genofw_find_pics routine, and in the map_space code.
Split the pic_openpic into openpic_common and pic_openpic.
Create a new pic_distopenpic driver, for the distributed openpic found on
some newer IBM machines.
Fix a bad panic in pmap_extract on 64bit bridge mode

branches: 1.4.2; 1.4.4; 1.4.6; 1.4.12;
Add code to properly detect the interrupt mapping on the PegasosII, and any
other OFW machine that fails our first two methods.

Add a bunch of fixes and minor rewrites to ofppc to bring it closer to
working properly. This is still a work in progress, and all work so far
has been based on the PegasosII machne.

1) Rewrite how the ISA memory and IO space maps are found. More work
will still need to be done in this area.
2) Add a new OFW method of pci configuration. So far I can only get this
to work on the primary PCI bus on the Pegasos. Unsure if this is a
pegasos bug or a code bug.
3) Add the rtas device to ofppc, and add an "rtas_reboot" function to
rtas to allow me to reboot the PegasosII. The rtas driver works, and is
a great start but needs to be changed slightly to allow easier access to
the functions from outside the driver.
4) Fix a number of bugs that existed in the shared PCI code for ofw that
probably weren't tickled by macppc.

There is much much more left to do here, this is all still a work in
progress, but this commit will allow other people to play around with the
code if they want to.

branches: 1.2.2;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10;
file ofwpci.c was initially added on branch ppcoea-renovation.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.5.2; 1.5.10; 1.5.18; 1.5.20; 1.5.22; 1.5.24;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

branches: 1.4.26;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.2.16;
__KERNEL_RCSID()

branches: 1.1.2; 1.1.4; 1.1.20;
Check in of work-in-progress of Firepower native device support.
We can find devices in PCI configuration space, but not much else.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.5.2; 1.5.10; 1.5.18; 1.5.20; 1.5.22; 1.5.24;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

branches: 1.4.26;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.2.16;
__KERNEL_RCSID()

branches: 1.1.2; 1.1.4; 1.1.20;
Check in of work-in-progress of Firepower native device support.
We can find devices in PCI configuration space, but not much else.

Support MV64361 on PegasosII by gt(4).
+ Support gtpci@gt instead of pegasospci more smartly.
+ Support Gigabit Ethernet by mvgbe@gt.

branches: 1.14.14; 1.14.20; 1.14.22;
Remove clause 3 and 4 from TNF licenses

branches: 1.13.6; 1.13.8; 1.13.10;
Apparently BRIDGE mode allows BAT registers, so re-enable that code.
Change the pegasos PCI_NETBSD_CONFIGURE arguments around to wire up mem
space into the correct area, and move the io regs a little to make it
work properly. Just avoid the secondary PCI entirely.
Change the list of things that we fiddle with in pci_conf_hook. Map mem
on the fwohci, avoid display cards, avoid IO on the auvia.
Change some printf's to aprint_*
Yank a call to genppc_pci_indirect_make_tag and change it to the
bus-independant pci call instead. (in pci_conf_hook)

Add support to ofppc for the IBM 7044-270 machine. This is a POWER3-II
based machine. Currently the kernel to run on this machine is
incompatible with the standard GENERIC kernel, so for now, we have a
separate GENERIC_B64. Eventually, I hope to combine the two.

Please note, this is a port of 32bit ofppc, not a powerpc64 port.

Thanks to Matt Thomas and Kevin Bowling for helping to make this port
possible.

Summary of changes:

Change ofwpci to use the ofmethod config for configuring the PCI bus,
rather than indirect configuration.
Move the wiring of the interrupt controllers from at the start of the
boot, into the configuration of the first PCI bus.
Rewrite the map_isa_ioregs() hack to work on a machine without BATs
Fix a ton of bugs in the genofw_find_pics routine, and in the map_space code.
Split the pic_openpic into openpic_common and pic_openpic.
Create a new pic_distopenpic driver, for the distributed openpic found on
some newer IBM machines.
Fix a bad panic in pmap_extract on 64bit bridge mode

enable PCI_NETBSD_CONFIGURE for ofppc.

the call to pci_configure_bus(9) and it's supporting code is
copied verbatim from the prep port.

this allows us to completely remove the really gross pegasos
specific pegasospci_indirect_attach_hook() that set various
pci command regs, since all those devices (mostly work now,
see below) and additionally PCI plugin cards work now too.

it also makes the pegasos onboard vr(4) ethernet work with
disk boot (it previously only worked with netboot.)

in the generic macppc ofw pci conf hook and for pegasos,
don't configure the viaide(4) device, and don't configure
memory space on the fwohci(4) device.


with this, and my other recent ofppc/ppc changes the pegasos
port is mostly functional. the marvell gige is not working,
and my 512mb appears as only about 256mb, but otherwise
this port is almost done!

extend the grossness that is pegasospci_indirect_attach_hook() a little
further and enable the vr(4) located at pci 0 dev 13 fn 0.

now my vr(4) works from disk boot.

change some printf's to aprint_normal.

Make USB, IEEE1394 and viaaudio attach to the Pegasos2.
USB works fine. IEEE1394 is untested. Audio doesn't work (playing white noise).
Need to set IO/MEM-enable for IEEE1394 and audio, as the firmware (Smart
Firmware 1.2) doesn't do it.
Patch approved by Tim Rightnour.

branches: 1.7.2; 1.7.4; 1.7.8;
Apply a set of patches from Frank Wille to make the genfb attachment work
better on ofppc. In doing so, we also move a few functions around in
macppc and the generic ofw powerpc stuff to allow better sharing of code.
Also, introduce a model_init function.

move ofb_cons.c from macppc/dev to powerpc/oea and rename it to rascons.
This gets rid of some naming confusion, and makes it OFW-MI rather than
macppc specific.

Add code to detect and initialize the com port correctly, so that we have an
actual real console when booting.

branches: 1.5.2;
Convert ofppc to the shared ofw_autoconf.c

branches: 1.4.2; 1.4.4;
Lots of small changes for ofppc:

Remove the ofb driver. I'm not interested in trying to make this work.
It should be replaced with the genfb driver, which I have added,
commented out because that driver needs work before it will function on
ofppc. (it's too panic-happy, and ofppc needs a working autoconf.c)

Change the way we do isa_inb/outb. The new way is a slightly nastier
hack, but won't run afoul of the other isa drivers as much.

Fix ofw_consinit.c to remove the dependency on ofb.

Apply patch from Frank Wille to make the pegasos2 pci scan work
properly. Modified slightly by me to add the pegasosreg.h file.

With this change, the pegasos correctly scans both primary and secondary
PCI busses.

branches: 1.2.2; 1.2.4;
Add code to properly detect the interrupt mapping on the PegasosII, and any
other OFW machine that fails our first two methods.

Add a bunch of fixes and minor rewrites to ofppc to bring it closer to
working properly. This is still a work in progress, and all work so far
has been based on the PegasosII machne.

1) Rewrite how the ISA memory and IO space maps are found. More work
will still need to be done in this area.
2) Add a new OFW method of pci configuration. So far I can only get this
to work on the primary PCI bus on the Pegasos. Unsure if this is a
pegasos bug or a code bug.
3) Add the rtas device to ofppc, and add an "rtas_reboot" function to
rtas to allow me to reboot the PegasosII. The rtas driver works, and is
a great start but needs to be changed slightly to allow easier access to
the functions from outside the driver.
4) Fix a number of bugs that existed in the shared PCI code for ofw that
probably weren't tickled by macppc.

There is much much more left to do here, this is all still a work in
progress, but this commit will allow other people to play around with the
code if they want to.