Remove unnecessary <sys/malloc.h>.

Merge thorpej-cfargs2.

branches: 1.15.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.14.4;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.

Style and cosmetic changes. No binary changes intended.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

branches: 1.10.2; 1.10.6;
Add support pci_intr_setattr.
Export non-inline version of pci api for modules (_MODULE is defined).
Fix definition of pc_conf_hook and pc_conf_interrupt.
Switch to using inlines instead of macros.
Switch ibm4xx to use <powerpc/pci_machdep.h>

struct device * -> device_t
struct cfdata * -> cfdata_t
split device/softc (CFATTACH_DECL_NEW)
use device_accessors and device_private
constify

More device_t, cfdata, CFATTACH_DECL_NEW cleanup.

branches: 1.7.2;
PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

branches: 1.6.22; 1.6.28;
Move to standard TNF 2 clause license

branches: 1.5.74; 1.5.76; 1.5.78;
merge ktrace-lwp.

Support the 'PCMCIA adapter BOX' for OpenBlockS266.

branches: 1.3.10; 1.3.12;
Phase out the use of a string as first "attach args" member to control
which bustype should be attached with a specific call to config_found()
(from a "mainbus" or a bus bridge).
Do it for isa/eisa/mca and pci/agp for now. These buses all attach to
an mi interface attribute "isabus", "eisabus" etc., and the autoconf
framework now allows to specify an interface attribute on config_found()
and config_search(), which limits the search of matching config data
to these which attach to that specific attribute.
So we basically have to call config_found_ia(..., "foobus", ...) where
such a bus is attached.
As a consequence, where a "mainbus" or alike also attaches other
devices (eg CPUs) which do not attach to a specific attribute yet,
we need at least pass an attribute name (different from "foobus") so
that the foo bus is not found at these places. This made some minor
changes necessary which are not obviously related to the mentioned buses.

branches: 1.2.2;
Update for new pci_devinfo(9) signature.

Copy PCI codes for IBM405GPx from evbppc/walnut/pci/{pchb.c,pci_machdep.c}.

DHT Walnut: Fix failure to attach on-board pdcide(4) for cold boot.

U-Boot seems to initialize pdcide(4) to compatible mode. Therefore, we
need to reinitialize it to native-PCI mode in pci_conf_hook(). Otherwise,
we will fail to configure IO registers for native-PCI mode during
PCI_NETBSD_CONFIGURE.

Include missing opt_pci.h

PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific

branches: 1.10.12; 1.10.30;
Add support pci_intr_setattr.
Export non-inline version of pci api for modules (_MODULE is defined).
Fix definition of pc_conf_hook and pc_conf_interrupt.
Switch to using inlines instead of macros.
Switch ibm4xx to use <powerpc/pci_machdep.h>

Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>. Include it
explicitly.

struct device * -> device_t
struct cfdata * -> cfdata_t
split device/softc (CFATTACH_DECL_NEW)
use device_accessors and device_private
constify

branches: 1.7.6;
Support PowerPC 405EX/EXr.
1. Add some new source and header files.
(MAL(split) and RGMII(new) relations for EMAC)
2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h.
3. intr.c supports MULTIUIC with virtual-irq. likes to oea.
support 32-virq/128-hwirq.
4. multiple emac support.
5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx.
6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.

branches: 1.6.18; 1.6.20;
pci_intr_setattr(), allows PCI interrupts to be marked MPSAFE on x86, and
other platforms if the code is added.

pci_intr_map(...)
pci_intr_setattr(pc, ih, PCI_INTR_MPSAFE, 1);
pci_intr_establish(...)

branches: 1.5.58; 1.5.60; 1.5.62; 1.5.64;
Bring ibm4xx interrupt code up to date:

- generic soft interrupts (ie. use powerpc/softintr.c)
- interrupt event counters (using the ones from powerpc/cpu.h:cpu_info
where appropriate)
- cleanup ibm4xx_intr.h, move implementation details to intr.c

Convert all affected evbppc platforms.

OK by simonb@, some points discussed with matt@

branches: 1.4.4;
Move pci_intr_map and pci_conf_interrupt functions to MD codes.
Change Max PCI devices from 5 to 31.

branches: 1.3.2; 1.3.4; 1.3.6;
PCI_NETBSD_CONFIGURE should allocate (but not map) address space expansion
ROMS by default. Full discussion at
http://mail-index.netbsd.org/tech-kern/2005/12/16/0023.html
Closes PR kern/32467
Reviewed by briggs@

branches: 1.2.2; 1.2.4; 1.2.6;
merge ktrace-lwp.

branches: 1.1.4; 1.1.18;
Copy PCI codes for IBM405GPx from evbppc/walnut/pci/{pchb.c,pci_machdep.c}.