Cross Reference: /src/sys/arch/powerpc/include

History log of /src/sys/arch/powerpc/include
Revision	Date	Author	Comments
1.45	30-Nov-2024	christos	Create a new header lwp_private.h to contain _lwp_getprivate_fast, _lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that: 1. we don't need special hacks to hide them 2. we can include <lwp.h> where needed to get the necessary prototypes without redefining them locally.
1.44	04-Nov-2024	christos	Undo previous lwp.h change.
1.43	03-Nov-2024	christos	Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate lwp.h file.
1.42	12-Jul-2018	maxv	branches: 1.42.36; Remove the kernel PMC code. Sent yesterday on tech-kern@. This change: * Removes "options PERFCTRS", the associated includes, and the associated ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is good. * Removes the PMC code of ARM XSCALE. * Removes all the pmc.h files. They were all empty, except for ARM XSCALE. * Reorders the x86 PMC code not to rely on the legacy pmc.h file. The definitions are put in sysarch.h. * Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control and sys_pmc_get_info syscalls. They are marked as OBSOL in kern, netbsd32 and rump. * Removes the pmc_evid_t and pmc_ctr_t types. * Removes all the associated man pages. The sets are marked as obsolete.
1.41	21-Dec-2015	christos	branches: 1.41.16; 1.41.18; Add mips fenv.h (From FreeBSD)
1.40	23-Jul-2014	alnsn	branches: 1.40.4; Rename sljitarch.h to sljit_machdep.h.
1.39	17-Nov-2013	alnsn	branches: 1.39.2; Enable sljit and bpfjit on powerpc.
1.38	17-Jul-2011	joerg	branches: 1.38.2; 1.38.12; 1.38.16; Retire varargs.h support. Move machine/stdarg.h logic into MI sys/stdarg.h and expect compiler to provide proper builtins, defaulting to the GCC interface. lint still has a special fallback. Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and derive va_list as required by standards.
1.37	20-Jun-2011	matt	Readd powerpc/include/vmparam.h to the set lists Export it to powerpc/include.h Protect pmap.h and vmparam.h from getting an #error when included from userland. Export safe definitions of VM_MAXUSER_ADDRESS, VM_MIN_ADDRESS, VM_MAX_ADDRESS when _RUMPKERNEL is defined.
1.36	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.35	02-Mar-2010	matt	branches: 1.35.2; 1.35.4; 1.35.8; Add missing <powerpc/FOO/spr.h> to a few files missed on the first pass. Don't export <machine/spr.h> to userland, only <powerpc/spr.h>
1.34	09-Feb-2007	ad	branches: 1.34.48; 1.34.68; Merge newlock2 to head.
1.33	11-Dec-2005	christos	branches: 1.33.20; merge ktrace-lwp.
1.32	17-Feb-2005	briggs	branches: 1.32.6; Install spr.h
1.31	08-May-2004	kleink	branches: 1.31.4; 1.31.6; Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
1.30	20-Oct-2003	matt	Reorganize the way powerpc port install machine specific headers. Use <powerpc/oea/bat.h> exclusively and remove <machine/bat.h> and <powerpc/bat.h>. Remove unneeded <machine/cpufunc.h>. To insure 1:1 correspondence of <powerpc/FOO.h> to <machine/FOO.h> include "../../powerpc/include/Makefile" in "arch/FOO/include/Makefile". Incororpate <byte_swap.h> into <bswap.h> and then byte_swap.h
1.29	18-Jan-2003	thorpej	branches: 1.29.2; Merge the nathanw_sa branch.
1.28	26-Nov-2002	lukem	Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.
1.27	04-Nov-2002	jdolecek	back previous off; don't install macho_machdep.h
1.26	30-Oct-2002	manu	Add COMPAT_MACH and EXEC_MACHO support on the PowerPC
1.25	07-Aug-2002	briggs	Implement pmc(9) -- An interface to hardware performance monitoring counters. These counters do not exist on all CPUs, but where they do exist, can be used for counting events such as dcache misses that would otherwise be difficult or impossible to instrument by code inspection or hardware simulation. pmc(9) is meant to be a general interface. Initially, the Intel XScale counters are the only ones supported.
1.24	28-Jul-2002	chs	install atomic.h.
1.23	13-Jun-2001	simonb	branches: 1.23.2; 1.23.8; 1.23.16; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.22	12-Jun-2001	tsubai	Include powerpc/mpc6xx/{bat.h,pte.h} if PPC_MPC6XX is defined.
1.21	10-Jun-2001	tsubai	Make the new pmap optional. Use the old (stable!) pmap by default.
1.20	06-Jun-2001	matt	Introduce a new & faster pmap for the MPC6xx (60x, 7xx, 7xxx) PPC CPUs. Move MPC6xx dependent header files to powerpc/include/mpc6xx/
1.19	30-May-2001	tsubai	Inline bswap{16,32} when the argument is constant.
1.18	03-May-2001	soren	PPC machine type tags haven't been used for a while.
1.17	15-Apr-2001	kleink	Add definitions of C99 integer format conversion macros. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.16	15-Apr-2001	kleink	Add definitions of C99 specified-width integer type limits. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.15	14-Apr-2001	kleink	Add definitions of C99 integer constant macros. Tidy Makefiles up a little.
1.14	14-Apr-2001	kleink	Add definitions of C99 minimum-width and greatest-width integer types. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.13	07-Feb-2001	tsutsui	branches: 1.13.2; Add pio.h to INCS.
1.12	09-Nov-2000	tsubai	powerpc HID registers definitions (only HID0 for now).
1.11	26-Jun-2000	kleink	Add <machine/int_types.h>, which provides namespace-pure definitions of exact-width integer types.
1.10	29-Apr-2000	thorpej	Require that each each MACHINE/MACHINE_ARCH supply a lock.h. This file contains the values __SIMPLELOCK_LOCKED and __SIMPLELOCK_UNLOCKED, which replace the old SIMPLELOCK_LOCKED and SIMPLELOCK_UNLOCKED. These files are also required to supply inline functions __cpu_simple_lock(), __cpu_simple_lock_try(), and __cpu_simple_unlock() if locking is to be supported on that platform (i.e. if MULTIPROCESSOR is defined in the _KERNEL case). Change these functions to take an int * (&alp->lock_data) rather than the struct simplelock * itself. These changes make it possible for userland to use the locking primitives by including <machine/lock.h>.
1.9	17-Mar-2000	tron	Install "machineendian_machdep.h".
1.8	27-Feb-2000	tsubai	Rewrite stdarg/varargs.
1.7	18-Feb-2000	tsubai	Remove vmparam.h.
1.6	23-Dec-1999	kleink	C99: Define a NAN macro in <math.h> which evaulates to a constant expression of a single-precision quiet NaN; only to be defined on platforms that do support this value.
1.5	18-Dec-1999	thorpej	Hardware Implementation Dependent registers for the PowerPC 601.
1.4	05-May-1999	tsubai	branches: 1.4.2; 1.4.8; Add cpu.h.
1.3	17-Jan-1999	tsubai	branches: 1.3.4; Add missing backslash.
1.2	15-Jan-1999	bouyer	Move the bswap functions from libutil to libc (this bups the minor of libc and the major of libutil). For little-endian architectures merge the bnswap() assembly versions with nto* and hton* using symbols aliasing. Use symbol renaming for the bswap function in this case to avoid namespace pollution. Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian machines, common code for inline macros go in machine/byte_swap.h Sync libkern with libc. Adjust #include in kernel sources for machine/bswap.h.
1.1	12-Jun-1998	cgd	Rework the way kernel include files are installed. In the new method, as with user-land programs, include files are installed by each directory in the tree that has includes to install. (This allows more flexibility as to what gets installed, makes 'partial installs' easier, and gives us more options as to which machines' includes get installed at any given time.) The old SYS_INCLUDES={symlinks,copies} behaviours are _both_ still supported, though at least one bug in the 'symlinks' case is fixed by this change. Include files can't be build before installation, so directories that have includes as targets (e.g. dev/pci) have to move those targets into a different Makefile.
1.3.4.1	21-Jun-1999	thorpej	Sync w/ -current.
1.4.8.1	27-Dec-1999	wrstuden	Pull up to last week's -current.
1.4.2.4	21-Apr-2001	bouyer	Sync with HEAD
1.4.2.3	11-Feb-2001	bouyer	Sync with HEAD.
1.4.2.2	22-Nov-2000	bouyer	Sync with HEAD.
1.4.2.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.13.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.23.16.1	31-Aug-2002	gehenna	catch up with -current.
1.23.8.5	11-Dec-2002	thorpej	Sync with HEAD.
1.23.8.4	13-Aug-2002	nathanw	Catch up to -current.
1.23.8.3	01-Aug-2002	nathanw	Catch up to -current.
1.23.8.2	05-Nov-2001	briggs	Initial SA support for ppc. Test-booted on sandpoint, macppc, & walnut. mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein <kleink@netbsd.org>.
1.23.8.1	13-Jun-2001	briggs	file Makefile was added on branch nathanw_sa on 2001-11-05 19:46:16 +0000
1.23.2.1	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.29.2.4	17-Feb-2005	skrll	Sync with HEAD.
1.29.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.29.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.29.2.1	03-Aug-2004	skrll	Sync with HEAD
1.31.6.1	19-Mar-2005	yamt	sync with head. xen and whitespace. xen part is not finished.
1.31.4.1	29-Apr-2005	kent	sync with -current
1.32.6.1	26-Feb-2007	yamt	sync with head.
1.33.20.1	30-Jan-2007	ad	Add missing headers.
1.34.68.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.34.48.1	11-Mar-2010	yamt	sync with head
1.35.8.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.35.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.35.2.1	12-Jun-2011	rmind	sync with head
1.38.16.1	18-May-2014	rmind	sync with head
1.38.12.2	03-Dec-2017	jdolecek	update from HEAD
1.38.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.38.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.39.2.1	10-Aug-2014	tls	Rebase.
1.40.4.1	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.41.18.1	10-Jun-2019	christos	Sync with HEAD
1.41.16.1	28-Jul-2018	pgoyette	Sync with HEAD
1.42.36.1	02-Aug-2025	perseant	Sync with HEAD
1.3	10-Aug-2014	joerg	Put GCC/GAS specific options under ACTIVE_CC == "gcc".
1.2	26-Oct-2011	chs	branches: 1.2.12; avoid linker warnings with the new binutils by not forcing rump modules to be soft-float.
1.1	19-Dec-2002	thorpej	branches: 1.1.2; Build LKMs with -msoft-float.
1.1.2.2	19-Dec-2002	thorpej	Sync with HEAD.
1.1.2.1	19-Dec-2002	thorpej	file Makefile.inc was added on branch nathanw_sa on 2002-12-19 23:20:18 +0000
1.2.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.19	28-May-2022	andvar	fix various typos in comments.
1.18	19-Apr-2018	christos	s/static inline/static __inline/g for consistency.
1.17	16-Mar-2017	chs	branches: 1.17.12; allow pcu_save() and pcu_discard() to be called on other threads, ptrace needs to use it that way.
1.16	22-Aug-2013	drochner	branches: 1.16.6; 1.16.10; 1.16.14; -extend the pcu(9) API by a function which saves all context on the current CPU, and use it if a CPU is taken offline -add a bool argument to pcu_discard which tells whether the internal "LWP has used the coprocessor" flag should be set or reset. The flag is reported by pcu_used_p(). If set, future accesses should use the state stored in the PCB. If reset, it should be reset to default. The former case is useful for setmcontext(). With that, it should not be necessary anymore to manage the "FPU used" state by an additional MD variable. approved by matt
1.15	02-May-2011	matt	branches: 1.15.4; 1.15.14; 1.15.18; Fix cut/paste error.
1.14	02-May-2011	matt	Move powerpc to use pcu to manage FPU/AltiVec/SPE.
1.13	18-Jan-2011	matt	Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.12	28-Apr-2008	martin	branches: 1.12.22; 1.12.26; 1.12.28; Remove clause 3 and 4 from TNF licenses
1.11	17-Oct-2007	garbled	branches: 1.11.16; 1.11.18; 1.11.20; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.10	11-Dec-2005	christos	branches: 1.10.30; 1.10.38; 1.10.48; 1.10.50; 1.10.52; 1.10.54; merge ktrace-lwp.
1.9	16-Apr-2004	matt	branches: 1.9.12; Add a SAVE/DISCARD flag to save_{fpu,vec}_lwp. Use it appropriately. Nuke struct fpu and use struct fpreg instead (except for the names, they were identical). On MP machines, this will avoid an unneeded IPI to save the register contents that are about to discarded.
1.8	23-Jun-2003	martin	branches: 1.8.2; Make sure to include opt_foo.h if a defflag option FOO is used.
1.7	05-Mar-2003	matt	Make AltiVec registers available via ptrace/procfs. Simplify AltiVec processing. Add a "common" procfs_machdep.c for PowerPC platforms. Even though it is supposed to be port specific, most (if not all) PowerPC ports can just use the common one.
1.6	18-Jan-2003	thorpej	Merge the nathanw_sa branch.
1.5	03-Nov-2002	matt	Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.4	28-Jul-2002	chs	restructure the FPU and AltiVEC code so that it works for MP.
1.3	18-Jul-2002	matt	Make sure that pmap_zero_page and pmap_copy_page don't make calls or reference while relocation is disabled since the stack will be inaccessible. Add support for using AltiVec in pmap_zero_page and pmap_copy_page on AltiVec capable processors.
1.2	05-Jul-2002	matt	Peform a rototill over the powerpc-based ports. Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT initialization code. Add user Altivec support. Fix calls to OF_call_method in macppc/macppc/machdep.c. Use ci_fpuproc in cpu_info instead of separate fpuproc. Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
1.1	19-Nov-2000	matt	branches: 1.1.2; 1.1.6; 1.1.10; 1.1.18; Add AltiVec VSCR definitions.
1.1.18.3	31-Aug-2002	gehenna	catch up with -current.
1.1.18.2	21-Jul-2002	gehenna	catch up with -current.
1.1.18.1	16-Jul-2002	gehenna	catch up with -current.
1.1.10.3	11-Nov-2002	nathanw	Catch up to -current
1.1.10.2	01-Aug-2002	nathanw	LWPify.
1.1.10.1	01-Aug-2002	nathanw	Catch up to -current.
1.1.6.1	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.1.2.2	22-Nov-2000	bouyer	Sync with HEAD.
1.1.2.1	19-Nov-2000	bouyer	file altivec.h was added on branch thorpej_scsipi on 2000-11-22 16:01:27 +0000
1.8.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.8.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.8.2.1	03-Aug-2004	skrll	Sync with HEAD
1.9.12.1	27-Oct-2007	yamt	sync with head.
1.10.54.1	25-Oct-2007	bouyer	Sync with HEAD.
1.10.52.1	18-Oct-2007	yamt	sync with head.
1.10.50.1	06-Nov-2007	matt	sync with HEAD
1.10.48.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.10.38.1	11-Oct-2007	garbled	Move a bunch of the macppc SMP code out of macppc, and down into the generic OEA code. Add a set of md callbacks into these shared routines, that any oeappc SMP machine needs to provide. This allows for generally shared SMP startup code, but still allows for machine-specific differences in the setup and kicking of the new CPU. Convert macppc to this new layout. Tested by Macallan. Add an initial attempt at SMP to prep. Tested on UP machine only, untested on SMP yet.
1.10.30.1	23-Oct-2007	ad	Sync with head.
1.11.20.1	16-May-2008	yamt	sync with head.
1.11.18.1	18-May-2008	yamt	sync with head.
1.11.16.1	02-Jun-2008	mjf	Sync with HEAD.
1.12.28.1	06-Jun-2011	jruoho	Sync with HEAD.
1.12.26.1	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.12.22.2	31-May-2011	rmind	sync with head
1.12.22.1	05-Mar-2011	rmind	sync with head
1.15.18.1	28-Aug-2013	rmind	sync with head
1.15.14.2	03-Dec-2017	jdolecek	update from HEAD
1.15.14.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.15.4.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.16.14.1	21-Apr-2017	bouyer	Sync with HEAD
1.16.10.1	20-Mar-2017	pgoyette	Sync with HEAD
1.16.6.1	28-Aug-2017	skrll	Sync with HEAD
1.17.12.1	22-Apr-2018	pgoyette	Sync with HEAD
1.31	07-May-2019	kamil	Switch all users (except ia64) of custom machine/ansi.h to common_ansi.h Deduplicate the code among ports and poll definitions of types directly from a compiler. This fixes miscompilation of certain programs that instruct compilers to generate code for different types. This bug has been detected with -fshort-wchar in EFI firmware. Proposed and discussed on a mailing list (twice). Itanium uses custom !ELF fallback switch, temporarily leave it as it is.
1.30	17-Jun-2015	matt	branches: 1.30.18; Make _BSD_CLOCK_T_ unsigned int so it's the same for IPL32 and LP64 environments. We don't really have a powerpc64 native userland and the mips64 native userland is IPL32 so this shouldn't affect anything.
1.29	17-Jul-2011	joerg	branches: 1.29.12; 1.29.28; 1.29.30; Retire varargs.h support. Move machine/stdarg.h logic into MI sys/stdarg.h and expect compiler to provide proper builtins, defaulting to the GCC interface. lint still has a special fallback. Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and derive va_list as required by standards.
1.28	27-Mar-2010	tnozaki	1. {wctype,wctrans,mbstate}_t: switch MD to MI like other libc implementation (such as BSD and glibc2). 2. don't typedef void wc{type,trans}_t, suggested by soda@-san. it may pass through compiler type check, it's harmful. so i introduce dummy struct __tag_wc{type,trans}_t(iconv_t already does). no ABI change was made.
1.27	11-Jan-2009	christos	branches: 1.27.4; 1.27.6; merge christos-time_t
1.26	21-Jun-2008	gmcgarry	branches: 1.26.4; Add stdargs support for pcc.
1.25	17-Oct-2007	garbled	branches: 1.25.16; 1.25.18; 1.25.22; 1.25.24; 1.25.26; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.24	03-Sep-2007	drochner	clean up some definitions around rune_t which are not needed anymore
1.23	04-Oct-2006	tnozaki	branches: 1.23.8; 1.23.16; 1.23.22; 1.23.26; 1.23.28; fix gcc -Werror -Wmissing-braces problem mbstate_t(this is opaque object)'s initializer should be ``{ 0 }'', so changed 1st field of union from character array to integer.
1.22	11-Dec-2005	christos	branches: 1.22.20; 1.22.22; merge ktrace-lwp.
1.21	24-Sep-2003	matt	branches: 1.21.16; Define va_list as __builtin_va_list for GCC 3.x. Change stdarg macros appropriately. (this is committed from a system run a kernel and userland built with these changes).
1.20	07-Aug-2003	agc	Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.19	02-Mar-2003	tshiozak	branches: 1.19.2; add some ISO C 1995 I18N functions and types: btowc, wctrans, towctrans, wcscoll, wcsxfrm, wctype_t and wctrans_t.
1.18	18-Jan-2003	matt	Fix LP64 botch.
1.17	04-Dec-2002	thorpej	Revert my previous GCC 3.3-related changes; GCC 3.3 has been fixed to handle our stdarg/varargs ABI for PowerPC.
1.16	25-Oct-2002	thorpej	Make these work with GCC 3.x.
1.15	14-Aug-2002	matt	Prepare for PPC64. Use register_t for mtmsr/mfmsr since the msr on PPC64 is 64bits wide. Define proper types for PPC64 if _LP64 is defined.
1.14	07-Aug-2002	tsubai	Re-correct previous. It's intentional.
1.13	07-Aug-2002	matt	Correct __va_list typedef for GCC 3.* to match the GCC 3.* definition.
1.12	01-Jun-2002	tsubai	Add gcc 3.x version.
1.11	03-Jan-2001	takemura	branches: 1.11.4; 1.11.8; 1.11.16; 1.11.18; replace 'long long' with int64_t to compile stand alone program with compiler other than GCC.
1.10	26-Dec-2000	itojun	make mbstate_t bigger (32 -> 128 bytes). XXX if you have libc after citrus locale import, please recompile libc, and your applications that use mbstate_t (rather rare). really sorry for the mess.
1.9	21-Dec-2000	itojun	populate _BSD_MBSTATE_T_. add warning regarding to rune_t.
1.8	27-Jun-2000	kleink	G/c _BSD_INTPTR_T_ and _BSD_UINTPTR_T_.
1.7	27-Feb-2000	tsubai	branches: 1.7.2; Rewrite stdarg/varargs.
1.6	16-Aug-1998	kleink	branches: 1.6.12; Add missing wint_t (currently unused).
1.5	27-Apr-1998	kleink	Provide definitions for intptr_t and uintptr_t, signed resp. unsigned integral types large enough to hold any pointer.
1.4	23-Nov-1997	kleink	Add _BSD_SUSECONDS_T_ and _BSD_USECONDS_T_; do some space vs. tab formatting cleanup
1.3	16-Apr-1997	thorpej	Update to varargs/stdarg implementation; conform to the SVR4 calling convention.
1.2	15-Nov-1996	jtc	Define _BSD_CLOCKID_T_ and _BSD_TIMER_T_
1.1	30-Sep-1996	ws	PowerPC port
1.6.12.2	05-Jan-2001	bouyer	Sync with HEAD
1.6.12.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.7.2.1	28-May-2000	minoura	Citrus Project XPG4DL, an implementation of I18N (locale) framework, is imported.
1.11.18.2	21-Nov-2002	he	Apply patch (requested by he in ticket #638): Back out latest change -- it is somewhat controversial, ref. revision 1.14 and causes a build problem.
1.11.18.1	16-Nov-2002	he	Pull up revision 1.13 (via patch, requested by matt in ticket #638): Correct __va_list typedef for GCC 3.x to match the GCC 3.x definition.
1.11.16.2	31-Aug-2002	gehenna	catch up with -current.
1.11.16.1	15-Jul-2002	gehenna	catch up with -current.
1.11.8.4	11-Dec-2002	thorpej	Sync with HEAD.
1.11.8.3	11-Nov-2002	nathanw	Catch up to -current
1.11.8.2	27-Aug-2002	nathanw	Catch up to -current.
1.11.8.1	20-Jun-2002	nathanw	Catch up to -current.
1.11.4.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.11.4.1	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.19.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.19.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.19.2.1	03-Aug-2004	skrll	Sync with HEAD
1.21.16.2	27-Oct-2007	yamt	sync with head.
1.21.16.1	30-Dec-2006	yamt	sync with head.
1.22.22.1	22-Oct-2006	yamt	sync with head
1.22.20.1	18-Nov-2006	ad	Sync with head.
1.23.28.1	06-Nov-2007	matt	sync with HEAD
1.23.26.1	02-Oct-2007	joerg	Sync with HEAD.
1.23.22.1	10-Sep-2007	skrll	Sync with HEAD.
1.23.16.1	03-Oct-2007	garbled	Sync with HEAD
1.23.8.1	09-Oct-2007	ad	Sync with head.
1.25.26.1	27-Jun-2008	simonb	Sync with head.
1.25.24.1	23-Jun-2008	wrstuden	Sync w/ -current. 34 merge conflicts to follow.
1.25.22.2	11-Aug-2010	yamt	sync with head.
1.25.22.1	04-May-2009	yamt	sync with head.
1.25.18.4	04-Jan-2009	christos	handle LP64
1.25.18.3	01-Nov-2008	christos	Sync with head.
1.25.18.2	30-Mar-2008	christos	time_t is now __int64_t
1.25.18.1	29-Mar-2008	christos	Welcome to the time_t=long long dev_t=uint64_t branch.
1.25.16.2	17-Jan-2009	mjf	Sync with HEAD.
1.25.16.1	29-Jun-2008	mjf	Sync with HEAD.
1.26.4.1	19-Jan-2009	skrll	Sync with HEAD.
1.27.6.1	30-May-2010	rmind	sync with head
1.27.4.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.29.30.1	22-Sep-2015	skrll	Sync with HEAD
1.29.28.1	16-Jul-2015	riz	Pull up following revision(s) (requested by martin in ticket #846): sys/arch/mips/include/ansi.h: revision 1.29 sys/arch/sh3/include/ansi.h: revision 1.16 sys/arch/sparc64/include/ansi.h: revision 1.18 sys/arch/m68k/include/ansi.h: revision 1.24 sys/arch/powerpc/include/ansi.h: revision 1.30 sys/arch/hppa/include/ansi.h: revision 1.14 sys/arch/i386/include/ansi.h: revision 1.27 sys/arch/alpha/include/ansi.h: revision 1.25 sys/arch/usermode/include/ansi.h: revision 1.5 sys/arch/sparc/include/ansi.h: revision 1.24 Make _BSD_CLOCK_T_ unsigned int so it's the same for IPL32 and LP64 environments. We don't really have a powerpc64 native userland and the mips64 native userland is IPL32 so this shouldn't affect anything. Make clock_t unsigned Make clock_t unsigned int everywhere. Ok: matt@, mrg@
1.29.12.1	03-Dec-2017	jdolecek	update from HEAD
1.30.18.1	10-Jun-2019	christos	Sync with HEAD
1.6	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.5	10-Dec-2002	thorpej	Rename __LDPGSZ to AOUT_LDPGSZ, to accurately reflect what it is.
1.4	28-Oct-2002	manu	Changed the ifndef guard of this header file from _MACH_EXEC_H_ to _POWERPC_AOUT_EXEC_H_. The former was conflicting with <compat/mach/mach_exec.h>.
1.3	09-Feb-2001	wiz	branches: 1.3.8; De-lint. Reviewed by christos.
1.2	03-Dec-1998	sakamoto	branches: 1.2.10; Change r_type bit field size 5 to 6 and reduce unused bit(2 to 1). Suggested by Mirian Crzig Lennox.
1.1	30-Sep-1996	ws	PowerPC port
1.2.10.1	11-Feb-2001	bouyer	Sync with HEAD.
1.3.8.2	11-Dec-2002	thorpej	Sync with HEAD.
1.3.8.1	11-Nov-2002	nathanw	Catch up to -current
1.56	06-Jan-2025	martin	PR 58960: fix misunderstanding in semantic and provide both the original id string as well as _NETBSD_REVISIONID. Do not rely on string concatenation in the inline assembler, use .ascii and .asciz for individual string parts instead.
1.55	04-Jan-2025	martin	PR 58960: powerpc/asm.h: Respect NETBSD_REVISIONID.
1.54	10-Feb-2024	andvar	branches: 1.54.2; s/psuedo/pseudo/ in comments.
1.53	07-Jan-2022	andvar	s/udpate/update/
1.52	06-Jul-2020	rin	Consistently use _LP64 instead of __LP64__, although both are defined for powerpc64. No binary changes intended.
1.51	18-Apr-2020	joerg	It's __RCSID for an extra level of indirection on PPC
1.50	17-Apr-2020	joerg	Mark the .ident section as mergable string section to avoid redundant entries.
1.49	01-Mar-2020	rin	branches: 1.49.4; Implement workaround for IBM405 Errata 77 (aka CPU_210), where interrupted stwcx. may errantly write data to memory: https://elinux.org/images/1/1d/Ppc405gp-errata.pdf This is because stwcx. is split into two pieces in the pipeline. We need to (1) insert dcbt before every stwcx. instruction, as well as (2) insert sync before every rfi/rfci instruction. It is unclear which processors are affected, but according to Linux, all 405-based cores up until 405GPR and 405EP are affected: https://github.com/torvalds/linux/blob/master/arch/powerpc/platforms/40x/Kconfig#L140 For kernel, this workaround can be restricted to affected processors. However, for kernel modules and userland, we have to enable it for all 32bit powerpc archs in order to share common binaries as before. Proposed on port-powerpc: http://mail-index.netbsd.org/port-powerpc/2020/02/21/msg003583.html
1.48	12-Jan-2015	dennis	branches: 1.48.18; 1.48.22; Name the offsets to the remaining fields in the ppc64 stack frame header. Add a stack frame alignment macro to avoid hard-coding that.
1.47	23-Aug-2014	matt	branches: 1.47.2; Fix cmpptr/cmpreq/etc to use right mnemonics
1.46	06-Mar-2014	matt	branches: 1.46.4; Add _XENTRY which doesn't set the section to .text
1.45	28-Feb-2014	matt	Add cmp{ptr,long,reg}{,l}{,i}
1.44	27-Feb-2014	matt	Use ## for concatenation
1.43	27-Feb-2014	matt	Add P2SZREG to be usign with .p2align
1.42	12-Sep-2013	joerg	Pass PICFLAGS down to cc-as-as and use __PIC__ to decide if it is small vs big PIC mode. Retire -DPIC and -DBIGPIC.
1.41	29-Jan-2013	kiyohara	branches: 1.41.2; Support 16bits over stack size.
1.40	25-Nov-2012	christos	provide _ENTRY(x) because some code needs it.
1.39	26-Oct-2011	christos	branches: 1.39.2; 1.39.12; - Indent ifdefs, comment endif and else cpp tags - Add missing END macro for LP64 - Make whitespace consistent
1.38	08-Jun-2011	matt	In INIT_CPUINFO, make L_CPU to set the cpu_info (just to be safe).
1.37	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.36	07-Feb-2011	matt	branches: 1.36.2; binutils is automagically doing securecrt so make sure plt calls are emitted with the secureplt magic as well.
1.35	23-Jan-2011	matt	Some ports use %r0 as tmp2 to INIT_CPUINFO which has adverse effects so never use tmp2 to hold an address.
1.34	18-Jan-2011	matt	branches: 1.34.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.33	17-Jan-2011	matt	Kill _NOREGNAMES. Everything should be using %rX now. If it doesn't it soon will.
1.32	16-Jan-2011	matt	branches: 1.32.2; Add PIC_GOTSETUP and PIC_TOCSETUP which replace the old methods to get the GOT (via a bl) to the new REL16 based relocs. This is another step to supporting secure plt.
1.31	15-Jan-2011	matt	Add END(sym) Add __RCSID (to match cdefs.h)
1.30	20-Dec-2010	joerg	Consistently use .gnu.warning with .pushsectio and .popsection on all architectures instead of obsolete STABS frames for linker warnings.
1.29	09-Mar-2010	matt	branches: 1.29.2; Put ASM RCSIDs into .ident
1.28	10-Dec-2009	rmind	branches: 1.28.2; Rename L_ADDR to L_PCB and amend some comments accordingly.
1.27	26-Nov-2009	matt	Kill proc0paddr. Use lwp0.l_addr instead.
1.26	23-Feb-2008	matt	branches: 1.26.4; 1.26.26; Add clrr{ptr,long,reg}i, l{ptr,long,reg}arx, st{ptr,long,reg}cx macros
1.25	17-Oct-2007	garbled	branches: 1.25.12; 1.25.16; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.24	17-May-2007	yamt	branches: 1.24.10; merge yamt-idlelwp branch. asked by core@. some ports still needs work. from doc/BRANCHES: idle lwp, and some changes depending on it. 1. separate context switching and thread scheduling. (cf. gmcgarry_ctxsw) 2. implement idle lwp. 3. clean up related MD/MI interfaces. 4. make scheduler(s) modular.
1.23	12-Jul-2006	ross	branches: 1.23.10; 1.23.14; 1.23.16; 1.23.22; wrap as(1)-only elements in #ifdef _LOCORE
1.22	07-Jul-2006	ross	Add stmd and lmd macros.
1.21	06-Jul-2006	ross	more refinements for ppc64 PIC/PLT/TOC issues
1.20	01-Jul-2006	ross	Add ppc64 ENTRY() macro that defines the descriptor and the dot symbol.
1.19	20-Jan-2006	christos	branches: 1.19.2; 1.19.6; 1.19.14; Add a STRONG_ALIAS macro
1.18	11-Dec-2005	christos	branches: 1.18.2; merge ktrace-lwp.
1.17	23-Jan-2005	simonb	branches: 1.17.8; Use lis@h/ori@l instead of lis@ha/addi@l since we may use r0 and addi is one of those funny instructions that treats r0 == 0 when used as the first arg. Fixes problems on ibm4xx. Ok'd by matt@.
1.16	19-Jan-2005	matt	Split the hw-dependent powermanglement into its own function and make Idle call that. Add a ci_idlespin function pointer to cpu_info. Update INIT_CPUINFO to initialize it to a naked 'blr' instruction. In oea/cpu_subr.c, add cpu_idlespin and make ci_idlespin point to it.
1.15	08-Aug-2003	matt	branches: 1.15.8; Nuke ci_spillstk/CI_SPILLSTK. No longer needed.
1.14	02-Aug-2003	matt	Nuke stmreg/ldmreg. PPC64 doesn't have a lmd/stmd so make sure lmw/stmw don't invoke valid instructions on PPC64.
1.13	31-Jul-2003	matt	Define SZREG {4,8} appropriately. Add pseudo-instructions (via #define) to load/store int, long, pointer, register, multiple registers. This is so assembly files can be support IPL32 and LP64 PowerPC implementations.
1.12	02-Feb-2003	matt	branches: 1.12.2; Perform a rototill of the powerpc code. Mandate use of SPRG0 to store a pointer to current cpu's cpu_info structure. Use cpu_info for intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK to std.<platform>. Change faultbuf to a struct instead of an array. On MPC6XX cpus, stop using the vector page for temporary space and use reserved space in cpu_info.
1.11	18-Jan-2003	matt	Add a temporary bridge to use %foo regnames in kernel / standalone code.
1.10	30-Jul-2002	matt	Don't define register references if not KERNEL or STANDALONE.
1.9	23-Jun-2002	thorpej	Add ENTRY_NOPROFILE().
1.8	13-Jun-2001	simonb	branches: 1.8.2; 1.8.8; 1.8.16; 1.8.18; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.7	23-Jun-2000	kleink	branches: 1.7.2; Add a WEAK_ALIAS() macro.
1.6	05-Mar-1999	tsubai	branches: 1.6.8; 1.6.18; First-cut of profiling support. XXX userland only, for now.
1.5	02-Dec-1998	thorpej	Implement WARN_REFERENCES().
1.4	24-Nov-1998	tsubai	Add PIC definitions.
1.3	16-Apr-1997	thorpej	Update for Elf.
1.2	30-Nov-1996	jtc	PROF -> GPROF
1.1	30-Sep-1996	ws	PowerPC port
1.6.18.1	25-Jul-2000	kleink	Pull up rev. 1.7 (approved by thorpej): For ELF, add a WEAK_ALIAS() macro.
1.6.8.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.7.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.8.18.1	23-Jul-2004	tron	Pull up revision 1.10 (requested by skrll in ticket #1725): Don't define register references if not KERNEL or STANDALONE.
1.8.16.2	31-Aug-2002	gehenna	catch up with -current.
1.8.16.1	16-Jul-2002	gehenna	catch up with -current.
1.8.8.2	01-Aug-2002	nathanw	Catch up to -current.
1.8.8.1	13-Jun-2001	nathanw	file asm.h was added on branch nathanw_sa on 2002-08-01 02:43:02 +0000
1.8.2.1	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.12.2.4	24-Jan-2005	skrll	Sync with HEAD.
1.12.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.12.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.12.2.1	03-Aug-2004	skrll	Sync with HEAD
1.15.8.1	29-Apr-2005	kent	sync with -current
1.17.8.4	27-Feb-2008	yamt	sync with head.
1.17.8.3	03-Sep-2007	yamt	sync with head.
1.17.8.2	30-Dec-2006	yamt	sync with head.
1.17.8.1	21-Jun-2006	yamt	sync with head.
1.18.2.1	01-Feb-2006	yamt	sync with head.
1.19.14.1	13-Jul-2006	gdamore	Merge from HEAD.
1.19.6.1	11-Aug-2006	yamt	sync with head
1.19.2.1	09-Sep-2006	rpaulo	sync with head
1.23.22.2	02-Aug-2007	macallan	sync with HEAD
1.23.22.1	22-May-2007	matt	Update to HEAD.
1.23.16.1	11-Jul-2007	mjf	Sync with head.
1.23.14.1	27-May-2007	ad	Sync with head.
1.23.10.1	03-Apr-2007	matt	Adapt powerpc to yamt-idlelwp. Nuke cpu_setfunc. Don't define _HAVE_BITENDIAN_BITOPS. Misc cleanups.
1.24.10.2	23-Mar-2008	matt	sync with HEAD
1.24.10.1	06-Nov-2007	matt	sync with HEAD
1.25.16.1	03-Apr-2008	mjf	Sync with HEAD.
1.25.12.1	24-Mar-2008	keiichi	sync with head.
1.26.26.3	26-Jan-2011	matt	Init CI_CURPCB too.
1.26.26.2	11-Jan-2011	matt	Add a END(y) for function sizes.
1.26.26.1	07-Jan-2011	matt	Allow implementation to not have an interrupt stack (booke). Use .ident for RCSID
1.26.4.1	11-Mar-2010	yamt	sync with head
1.28.2.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.29.2.2	12-Jun-2011	rmind	sync with head
1.29.2.1	05-Mar-2011	rmind	sync with head
1.32.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.34.2.1	08-Feb-2011	bouyer	Sync with HEAD
1.36.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.39.12.3	03-Dec-2017	jdolecek	update from HEAD
1.39.12.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.39.12.1	25-Feb-2013	tls	resync with head
1.39.2.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.39.2.1	16-Jan-2013	yamt	sync with (a bit old) head
1.41.2.1	18-May-2014	rmind	sync with head
1.46.4.1	04-Feb-2015	martin	Pull up following revision(s) (requested by chs in ticket #492): lib/libc/arch/powerpc64/sys/__vfork14.S: revision 1.2 lib/libc/arch/powerpc64/sys/__syscall.S: revision 1.2 lib/libc/arch/powerpc/sys/__syscall.S: revision 1.3 lib/libc/arch/powerpc64/sys/syscall.S: revision 1.2 lib/libc/arch/powerpc/sys/__clone.S: revision 1.6 lib/libc/arch/powerpc64/gen/__setjmp14.S: revision 1.3 sys/arch/powerpc/include/asm.h: revision 1.47 lib/libc/arch/powerpc64/sys/cerror.S: revision 1.6 lib/libc/arch/powerpc64/sys/getcontext.S: revision 1.5 lib/libc/arch/powerpc64/sys/brk.S: revision 1.5 lib/libc/arch/powerpc64/sys/ptrace.S: revision 1.3 lib/libc/arch/powerpc64/genassym.cf: revision 1.1 lib/libc/arch/powerpc64/gen/__sigsetjmp14.S: revision 1.3 lib/libc/arch/powerpc/sys/getcontext.S: revision 1.6 compat/powerpc64/powerpc/bsd.powerpc.mk: revision 1.3 lib/libc/arch/powerpc64/sys/pipe.S: revision 1.2 lib/libc/arch/powerpc/sys/brk.S: revision 1.14 lib/libc/arch/powerpc64/SYS.h: revision 1.3 lib/libc/arch/powerpc64/sys/fork.S: revision 1.2 lib/libc/arch/powerpc64/sys/__sigtramp2.S: revision 1.4 lib/libc/arch/powerpc64/Makefile.inc: revision 1.3 lib/libc/arch/powerpc/sys/pipe.S: revision 1.9 lib/libc/compiler_rt/Makefile.inc: revision 1.25 lib/libc/arch/powerpc64/sys/sbrk.S: revision 1.4, 1.5 lib/libc/arch/powerpc64/sys/__clone.S: revision 1.2 lib/libc/arch/powerpc/sys/sbrk.S: revision 1.13 lib/libc/arch/powerpc/SYS.h: revision 1.13 powerpc64 uses the same sources as powerpc and needs the long double as double-double sources. - Spell LdAddr consistently - Add LDFLAGS+=-Wl,-m,elf32ppc_nbsd - Fix cmpptr/cmpreq/etc to use right mnemonics - Minimize differences between powerpc and powerpc64 - Fix powerpc64 assembly to use right instructions for 64bit CPUs. - Use hidden for __curbrk and __minbrk to avoid GOT/TOC relocations.
1.47.2.1	06-Apr-2015	skrll	Sync with HEAD
1.48.22.1	03-Mar-2020	martin	Pull up following revision(s) (requested by rin in ticket #755): sys/arch/evbppc/conf/std.virtex: revision 1.4 sys/arch/powerpc/powerpc/trap_subr.S: revision 1.81 sys/arch/powerpc/ibm4xx/4xx_trap_subr.S: revision 1.8 sys/arch/evbppc/conf/std.walnut: revision 1.9 common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h: revision 1.7 sys/arch/powerpc/include/asm.h: revision 1.49 common/lib/libc/arch/powerpc/atomic/atomic_cas.S: revision 1.9 sys/arch/powerpc/ibm4xx/trap_subr.S: revision 1.28 sys/arch/powerpc/include/lock.h: revision 1.15 sys/arch/evbppc/conf/std.obs266: revision 1.3 common/lib/libc/arch/powerpc/atomic/atomic_swap.S: revision 1.8 sys/arch/powerpc/powerpc/locore_subr.S: revision 1.61 sys/arch/powerpc/powerpc/lock_stubs.S: revision 1.12 sys/arch/evbppc/conf/std.obs200: revision 1.5 Implement workaround for IBM405 Errata 77 (aka CPU_210), where interrupted stwcx. may errantly write data to memory: https://elinux.org/images/1/1d/Ppc405gp-errata.pdf This is because stwcx. is split into two pieces in the pipeline. We need to (1) insert dcbt before every stwcx. instruction, as well as (2) insert sync before every rfi/rfci instruction. It is unclear which processors are affected, but according to Linux, all 405-based cores up until 405GPR and 405EP are affected: https://github.com/torvalds/linux/blob/master/arch/powerpc/platforms/40x/Kconfig#L140 For kernel, this workaround can be restricted to affected processors. However, for kernel modules and userland, we have to enable it for all 32bit powerpc archs in order to share common binaries as before. Proposed on port-powerpc: http://mail-index.netbsd.org/port-powerpc/2020/02/21/msg003583.html
1.48.18.2	21-Apr-2020	martin	Sync with HEAD
1.48.18.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.49.4.1	20-Apr-2020	bouyer	Sync with HEAD
1.54.2.1	02-Aug-2025	perseant	Sync with HEAD
1.5	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.4	28-Dec-2005	perry	branches: 1.4.100; 1.4.106; 1.4.110; inline -> __inline
1.3	24-Dec-2005	perry	Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.2	25-Nov-2002	thorpej	branches: 1.2.22; No newlines in string constants.
1.1	28-Jul-2002	chs	branches: 1.1.2; 1.1.4; 1.1.6; add some atomic operations.
1.1.6.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.1.6.1	28-Jul-2002	jdolecek	file atomic.h was added on branch kqueue on 2002-09-06 08:39:13 +0000
1.1.4.2	31-Aug-2002	gehenna	catch up with -current.
1.1.4.1	28-Jul-2002	gehenna	file atomic.h was added on branch gehenna-devsw on 2002-08-31 13:45:46 +0000
1.1.2.3	11-Dec-2002	thorpej	Sync with HEAD.
1.1.2.2	01-Aug-2002	nathanw	Catch up to -current.
1.1.2.1	28-Jul-2002	nathanw	file atomic.h was added on branch nathanw_sa on 2002-08-01 02:43:02 +0000
1.2.22.1	21-Jun-2006	yamt	sync with head.
1.4.110.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.4.106.1	06-Jun-2011	jruoho	Sync with HEAD.
1.4.100.1	12-Jun-2011	rmind	sync with head
1.6	05-Feb-2008	garbled	Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself. Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap. Yank __HAVE_PMAP_PHYSSEG from all the oea code. Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs. Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe. In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V]. With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
1.5	03-Feb-2003	matt	branches: 1.5.18; 1.5.80; 1.5.86; Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.4	12-Jun-2001	tsubai	branches: 1.4.8; Include powerpc/mpc6xx/{bat.h,pte.h} if PPC_MPC6XX is defined.
1.3	06-Jun-2001	matt	Introduce a new & faster pmap for the MPC6xx (60x, 7xx, 7xxx) PPC CPUs. Move MPC6xx dependent header files to powerpc/include/mpc6xx/
1.2	18-Dec-1999	thorpej	branches: 1.2.6; - Comment the BAT bits. - Add defintions for the PowerPC 601 BATs. - Change the BATU()/BATL() macros to be a bit more flexible; allow size, permissions, etc. to be specified.
1.1	30-Sep-1996	ws	branches: 1.1.28; 1.1.34; PowerPC port
1.1.34.1	27-Dec-1999	wrstuden	Pull up to last week's -current.
1.1.28.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.2.6.1	21-Jun-2001	nathanw	Catch up to -current.
1.4.8.2	12-Jun-2001	tsubai	Include powerpc/mpc6xx/{bat.h,pte.h} if PPC_MPC6XX is defined.
1.4.8.1	12-Jun-2001	tsubai	file bat.h was added on branch nathanw_sa on 2001-06-12 17:20:51 +0000
1.5.86.1	18-Feb-2008	mjf	Sync with HEAD.
1.5.80.1	23-Mar-2008	matt	sync with HEAD
1.5.18.1	11-Feb-2008	yamt	sync with head.
1.6	31-Jan-2006	dsl	This file only needs to #include sys/bswap.h
1.5	11-Dec-2005	christos	branches: 1.5.2; merge ktrace-lwp.
1.4	20-Oct-2003	matt	branches: 1.4.16; Reorganize the way powerpc port install machine specific headers. Use <powerpc/oea/bat.h> exclusively and remove <machine/bat.h> and <powerpc/bat.h>. Remove unneeded <machine/cpufunc.h>. To insure 1:1 correspondence of <powerpc/FOO.h> to <machine/FOO.h> include "../../powerpc/include/Makefile" in "arch/FOO/include/Makefile". Incororpate <byte_swap.h> into <bswap.h> and then byte_swap.h
1.3	30-May-2001	tsubai	branches: 1.3.8; 1.3.24; Inline bswap{16,32} when the argument is constant.
1.2	21-Aug-1999	simonb	branches: 1.2.14; Include <sys/bswap.h> for function prototypes. i386, pc532 and vax still include <machine/byte_swap.h> and define macros for some of the bswap*() functions.
1.1	15-Jan-1999	bouyer	Move the bswap functions from libutil to libc (this bups the minor of libc and the major of libutil). For little-endian architectures merge the bnswap() assembly versions with nto* and hton* using symbols aliasing. Use symbol renaming for the bswap function in this case to avoid namespace pollution. Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian machines, common code for inline macros go in machine/byte_swap.h Sync libkern with libc. Adjust #include in kernel sources for machine/bswap.h.
1.2.14.1	21-Jun-2001	nathanw	Catch up to -current.
1.3.24.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.3.24.2	18-Sep-2004	skrll	Sync with HEAD.
1.3.24.1	03-Aug-2004	skrll	Sync with HEAD
1.3.8.2	30-May-2001	tsubai	Inline bswap{16,32} when the argument is constant.
1.3.8.1	30-May-2001	tsubai	file bswap.h was added on branch nathanw_sa on 2001-05-30 13:08:35 +0000
1.4.16.1	21-Jun-2006	yamt	sync with head.
1.5.2.1	01-Feb-2006	yamt	sync with head.
1.22	17-Jul-2011	dyoung	Enable new-style <sys/bus.h> on several PowerPC ports supporting PCI buses. Make non-inline implementations of bus_space(9) and bus_dma(9) routines and move them to appropriate .c files. This may leave amigappc in a bad state, sorry. Fortunately, it will be easy to repair by imitating the bus.h -> bus_{defs,funcs}.h split in some other PowerPC port.
1.21	09-Jun-2011	matt	For PPC_BOOKE, make BUS_DMA_COHERENT equal to BUS_DMA_NOCACHE. Now USB works again. (which means USB uses of bus_dmamap_sync is broken).
1.20	28-Apr-2008	martin	branches: 1.20.20; 1.20.22; 1.20.26; 1.20.32; Remove clause 3 and 4 from TNF licenses
1.19	03-Feb-2008	matt	branches: 1.19.6; 1.19.8; 1.19.10; Use uintN_t in comments (since that's what are really using) instead of u_intN_t
1.18	17-Oct-2007	garbled	branches: 1.18.2; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.17	04-Mar-2007	christos	branches: 1.17.2; 1.17.10; 1.17.18; 1.17.20; 1.17.22; 1.17.24; Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
1.16	21-Feb-2007	mrg	add a pair of new bus_dma(9) functions: int _bus_dmatag_subregion(bus_dma_tag_t tag, bus_addr_t min_addr, bus_addr_t max_addr, bus_dma_tag_t *newtag, int flags) void _bus_dmatag_destroy(bus_dma_tag_t tag) that allow a (normally broken/limited) device to restrict the bus address range it can talk to. this is used by bce(4) to limit DMA addresses to 1GB range, the maximum the chip can address. all this is from Yorick Hardy <yhardy@uj.ac.za> with input from several people on tech-kern. XXX: bus_dma(9) needs an update still.
1.15	11-Dec-2005	christos	branches: 1.15.26; merge ktrace-lwp.
1.14	09-Mar-2005	matt	branches: 1.14.4; Add a dm_maxsegsz public member to bus_dmamap_t. This allows a user of the API to select the maximum segment size for each bus_dmamap_load (up to the maxsegsz supplied to bus_dmamap_create). dm_maxsegsz is reset to the value supplied to bus_dmamap_create when the dmamap is unloaded.
1.13	03-Sep-2003	simonb	branches: 1.13.8; 1.13.10; Need to set BUS_DMA_COHERENT to BUS_DMA_NOCACHE on IBM ppc4xx CPUs. The "emac" interface now works properly again on my Walnut. Much thanks to Steve Woodford for tracking this down.
1.12	25-Jul-2003	scw	Switch ibm4xx over to using the more flexible powerpc bus_space/bus_dma code.
1.11	15-Jun-2003	fvdl	branches: 1.11.2; Handle 64bit DMA addresses on PCI for platforms that can (currently only enabled on amd64). Add a dmat64 field to various PCI attach structures, and pass it down where needed. Implement a simple new function called pci_dma64_available(pa) to test if 64bit DMA addresses may be used. This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>, and there is more than 4G of memory.
1.10	12-Jun-2003	scw	Oops, delete an accidentally committed local change.
1.9	12-Jun-2003	scw	Allow <machine/bus.h> to override the definition of BUS_DMA_COHERENT. For example, machine-dependent code can make it equivalent to BUS_DMA_NOCACHE if the hardware cannot reliably snoop the bus.
1.8	18-Mar-2003	matt	Switch/adapt to new bus space infrastructure.
1.7	06-Mar-2003	matt	Adapt to powerpc/bus.h changes.
1.6	05-Mar-2003	matt	Add preliminary support Marvell (Galileo) Discovery System Controllers. This code was contributed by Allegro Networks.
1.5	28-Jan-2003	kent	Introduce BUS_DMA_NOCACHE, and bus_dmamem_map() of i386 supports it.
1.4	31-May-2002	augustss	Add bus_space_vaddr().
1.3	10-Dec-2001	briggs	branches: 1.3.8; Provide basic bus_space_mmap(). Noted by self and in PR port-powerpc/14873. This at least allows the compile to complete. There are still Issues with vga_pci.c's assumptions about a PC-ish environment.
1.2	19-Jul-2001	thorpej	branches: 1.2.6; Add BUS_DMA_READ and BUS_DMA_WRITE flags, that hint the back-end at dmamap load time that the mapping will be used for a unidirectional transfer of the specified direction.
1.1	06-Jun-2001	matt	branches: 1.1.2; 1.1.4; Include a common bus.h and bus_dma.c that powerpc ports can use if they so choose.
1.1.4.3	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.1.4.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.1.4.1	03-Aug-2001	lukem	update to -current
1.1.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.2.6.3	20-Jun-2002	nathanw	Catch up to -current.
1.2.6.2	08-Jan-2002	nathanw	Catch up to -current.
1.2.6.1	19-Jul-2001	nathanw	file bus.h was added on branch nathanw_sa on 2002-01-08 00:27:09 +0000
1.3.8.1	15-Jul-2002	gehenna	catch up with -current.
1.11.2.4	01-Apr-2005	skrll	Sync with HEAD.
1.11.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.11.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.11.2.1	03-Aug-2004	skrll	Sync with HEAD
1.13.10.1	19-Mar-2005	yamt	sync with head. xen and whitespace. xen part is not finished.
1.13.8.1	29-Apr-2005	kent	sync with -current
1.14.4.4	04-Feb-2008	yamt	sync with head.
1.14.4.3	27-Oct-2007	yamt	sync with head.
1.14.4.2	03-Sep-2007	yamt	sync with head.
1.14.4.1	26-Feb-2007	yamt	sync with head.
1.15.26.2	12-Mar-2007	rmind	Sync with HEAD.
1.15.26.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.17.24.1	25-Oct-2007	bouyer	Sync with HEAD.
1.17.22.1	18-Oct-2007	yamt	sync with head.
1.17.20.2	23-Mar-2008	matt	sync with HEAD
1.17.20.1	06-Nov-2007	matt	sync with HEAD
1.17.18.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.17.10.1	05-Jun-2007	matt	Allow a private bus_space but common bus_dma. For now.
1.17.2.1	23-Oct-2007	ad	Sync with head.
1.18.2.1	18-Feb-2008	mjf	Sync with HEAD.
1.19.10.1	16-May-2008	yamt	sync with head.
1.19.8.1	18-May-2008	yamt	sync with head.
1.19.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.20.32.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.20.26.1	26-Jul-2011	matt	Force COHERENT bus dma mappings to be NOCACHE.
1.20.22.1	12-Jun-2011	rmind	sync with head
1.20.20.1	11-Aug-2010	uebayasi	Support bus_space_physload(9) and friends.
1.5	10-Mar-2022	riastradh	powerpc: Implement bus_space_barrier as eieio.
1.4	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.3	23-Sep-2019	skrll	Provide PRIxBUSADDR, PRIxBUSSIZE, PRIuBUSSIZE, and PRIxBSH for all arches to follow arm and (generic) mips. Reviewed by christos.
1.2	28-Feb-2014	matt	branches: 1.2.30; Use uintptr_t for bus_size_t, bus_addr_t, bus_space_handler_t since uint32_t doesn't really work too 64-bit platforms.
1.1	01-Jul-2011	dyoung	branches: 1.1.2; 1.1.12; 1.1.16; Per discussion at <http://mail-index.netbsd.org/tech-kern/2010/04/02/msg007941.html>, divide each machine's bus.h into bus_defs.h (constants & data types) and bus_funcs.h (macro implementations of bus_space(9) routines and MD prototypes). Note that some bus_space(9) routines' implementation will move to .c files from inline subroutines or macros in .h files. I've only made the split for machine architectures where there is PCI. All of the non-PCI-having architectures will require a similar split. These #include files are not referenced by any (committed) Makefiles or header files, yet. Changes to Makefiles, to <sys/bus.h>, and to some more machine-dependent files will dribble in before I throw the switch.
1.1.16.1	18-May-2014	rmind	sync with head
1.1.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.1.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2.30.1	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.2	10-Mar-2022	riastradh	powerpc: Implement bus_space_barrier as eieio.
1.1	01-Jul-2011	dyoung	Per discussion at <http://mail-index.netbsd.org/tech-kern/2010/04/02/msg007941.html>, divide each machine's bus.h into bus_defs.h (constants & data types) and bus_funcs.h (macro implementations of bus_space(9) routines and MD prototypes). Note that some bus_space(9) routines' implementation will move to .c files from inline subroutines or macros in .h files. I've only made the split for machine architectures where there is PCI. All of the non-PCI-having architectures will require a similar split. These #include files are not referenced by any (committed) Makefiles or header files, yet. Changes to Makefiles, to <sys/bus.h>, and to some more machine-dependent files will dribble in before I throw the switch.
1.2	20-Oct-2003	matt	Reorganize the way powerpc port install machine specific headers. Use <powerpc/oea/bat.h> exclusively and remove <machine/bat.h> and <powerpc/bat.h>. Remove unneeded <machine/cpufunc.h>. To insure 1:1 correspondence of <powerpc/FOO.h> to <machine/FOO.h> include "../../powerpc/include/Makefile" in "arch/FOO/include/Makefile". Incororpate <byte_swap.h> into <bswap.h> and then byte_swap.h
1.1	30-May-2001	tsubai	branches: 1.1.2; 1.1.10; 1.1.26; Inline bswap{16,32} when the argument is constant.
1.1.26.1	03-Aug-2004	skrll	Sync with HEAD
1.1.10.2	30-May-2001	tsubai	Inline bswap{16,32} when the argument is constant.
1.1.10.1	30-May-2001	tsubai	file byte_swap.h was added on branch nathanw_sa on 2001-05-30 13:08:35 +0000
1.1.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.10	28-Feb-2014	matt	Add ALIGNBYTES32 for COMPAT_NETBSD32
1.9	21-Feb-2012	matt	branches: 1.9.2; 1.9.4; Restore back to double alignment.
1.8	21-Feb-2012	matt	Change ALIGNBYTES to be AltiVec savvy
1.7	20-Jan-2012	joerg	Change CMSG_SPACE and CMSG_LEN to provide Integer Constant Expressions again. This was changed in sys/socket.h r1.51 to work around fallout from the IPv6 aux data migration. It broke the historic ABI on some platforms. This commit restores compatibility for netbsd32 code on such platforms and provides a template for future changes to the CMSG_* alignment. Revert PCC/Clang workarounds in postfix and tmux.
1.6	03-Nov-2002	matt	branches: 1.6.146; 1.6.150; Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.5	20-Mar-1999	thorpej	branches: 1.5.26; Garbage-collect.
1.4	04-Nov-1997	thorpej	Bug fixes and cleanup from Chris Demetriou <cgd@pa.dec.com>: - fix _C_LABEL so that it actually works. - make __RENAME use _C_LABEL. - fix __RENAME so that it expects an unquoted argument. - fix __indr_reference and __warn_references so that they supply their own final semicolon. - define __warn_references to nothing if not GNU C (required by the way it's used). The __warn_references semicolon change has to be made so that __warn_references can be defined into nothing. (A ; all by itself isn't a great idea.) The __indr_reference change was made for consistency.
1.3	22-Oct-1997	thorpej	Implement __RENAME() in <machine/cdefs.h>
1.2	16-Apr-1997	thorpej	branches: 1.2.8; Update for Elf.
1.1	30-Sep-1996	ws	PowerPC port
1.2.8.2	04-Nov-1997	thorpej	Pull up from trunk: bug fixes and cleaups.
1.2.8.1	22-Oct-1997	thorpej	Pull up from trunk: Implement __RENAME() in <machine/cdefs.h>
1.5.26.1	11-Nov-2002	nathanw	Catch up to -current
1.6.150.1	18-Feb-2012	mrg	merge to -current.
1.6.146.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.6.146.1	17-Apr-2012	yamt	sync with head
1.9.4.1	18-May-2014	rmind	sync with head
1.9.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.125	20-Sep-2025	mrg	add a "struct trapframe;" forward decl before a prototype that wants a pointer to it. GCC 14 didn't like this.
1.124	26-Jul-2023	skrll	Trailing whitespace
1.123	15-Nov-2022	macallan	remove workaround for old clang - it's not needed anymore and caused problems elsewhere
1.122	30-May-2022	rin	Export CPU capability of unaligned memory access to userland as machdep.no_unaligned sysctl(7) variable. This will be used for ld.so.conf in order to provide strictly- aligned versions of libc routines.
1.121	30-May-2022	rin	Introduce PPC_NO_UNALIGNED flag to indicate that CPU cannot handle unaligned memory access, and emulation should be provided to userland.
1.120	02-Nov-2021	ryo	In order to prevent _mcount() from being recursively called when built with COPTS=-O0, sprinkle `__always_inline' to make _mcount() be generated as a single function.
1.119	14-Aug-2021	ryo	Improved the performance of kernel profiling on MULTIPROCESSOR, and possible to get profiling data for each CPU. In the current implementation, locks are acquired at the entrance of the mcount internal function, so the higher the number of cores, the more lock conflict occurs, making profiling performance in a MULTIPROCESSOR environment unusable and slow. Profiling buffers has been changed to be reserved for each CPU, improving profiling performance in MP by several to several dozen times. - Eliminated cpu_simple_lock in mcount internal function, using per-CPU buffers. - Add ci_gmon member to struct cpu_info of each MP arch. - Add kern.profiling.percpu node in sysctl tree. - Add new -c <cpuid> option to kgmon(8) to specify the cpuid, like openbsd. For compatibility, if the -c option is not specified, the entire system can be operated as before, and the -p option will get the total profiling data for all CPUs.
1.118	07-Mar-2021	rin	For LP64, remove members of struct cpu_info that exist just for compatible with booke or ibm4xx. Even if MODULAR \|\| _MODULE, these members are useless for powerpc64.
1.117	24-Feb-2021	thorpej	Add a provision for a per-cpu battable. Each CPU starts with the global one, but this allows CPUs to temporarily switch to an alternate battable if needed.
1.116	03-Feb-2021	rin	Pull out constant definitions inside struct declaration. Enable CTASSERT(9) for CPUSAVE_SIZE.
1.115	15-Jul-2020	rin	branches: 1.115.2; Factor out emulation code for m[ft]msr in user mode from oea, and adjust it for systems without FPU. Now, it can be used from booke and ibm4xx in order to support fenv(3).
1.114	07-Jul-2020	rin	Part of PR port-powerpc/55425 openssl fails on FPU emulation for powerpc Provide machdep.fpu_present sysctl variable like other ports. Userland can get informed that FPU is absent and emulated in software (and calculation results may not be correct in bit-to-bit precision). This variable should be useful even if we could fix FPU emulation; it is much faster to skip FPU arithmetic in general, rather than relying upon emulation by kernel via illegal instruction handler.
1.113	06-Jul-2020	rin	Use (CI_SAVEMAX*CPUSAVE_LEN) as CPUSAVE_SIZE for MODULAR \|\| _MODULE, since it exceeds 128 (256 for now). XXX We should use CTASSERT here, but it conflicts with genassym...
1.112	06-Jul-2020	rin	Drop unused opt_lockdebug.h.
1.111	27-Jun-2020	macallan	apply __HIDE_DELAY so zfs and friends at least compile
1.110	01-Dec-2019	ad	Fix false sharing problems with cpu_info. Identified with tprof(8). This was a very nice win in my tests on a 48 CPU box. - Reorganise cpu_data slightly according to usage. - Put cpu_onproc into struct cpu_info alongside ci_curlwp (now is ci_onproc). - On x86, put some items in their own cache lines according to usage, like the IPI bitmask and ci_want_resched.
1.109	23-Nov-2019	ad	cpu_need_resched(): - Remove all code that should be MI, leaving the bare minimum under arch/. - Make the required actions very explicit. - Pass in LWP pointer for convenience. - When a trap is required on another CPU, have the IPI set it locally. - Expunge cpu_did_resched().
1.108	22-Aug-2018	msaitoh	- Cleanup for dynamic sysctl: - Remove unused _NAMES macros for sysctl. - Remove unused _MAXID for sysctls. - Move CTL_MACHDEP sysctl definitions for m68k into m68k/include/cpu.h and use them on all m68k machines.
1.107	15-Jul-2018	maxv	Retire ipkdb entirely. The option was removed from the config files yesterday. ok kamil christos
1.106	25-May-2018	macallan	branches: 1.106.2; copy HID1 from the boot CPU to secondary CPUs as well on 64bit CPUs now the 2nd CPU on my G5s runs at full speed
1.105	04-May-2018	macallan	save & restore HID4 and HID5, zero SPR_HIOR on 970
1.104	22-Mar-2018	macallan	first step towards G5 SMP: - only save/restore BATs on CPUs that have them - treat HID0 as 64bit on 64bit CPUs
1.103	17-Dec-2017	chs	branches: 1.103.2; apply the same change for powerpc as mrg did for arm and mips: CPU_INFO_FOREACH() must always iterate at least the boot cpu. document this in sys/cpu.h and fix the arm and mips versions to check ncpu is non zero before using it as an iterator max. this should fix the new assert in init_main.c.
1.102	19-Oct-2016	nonaka	branches: 1.102.8; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
1.101	23-Jan-2015	nonaka	branches: 1.101.2; ddb MP support
1.100	24-Mar-2014	christos	branches: 1.100.6; use cpu_{g,s}etmodel
1.99	03-Mar-2014	macallan	support ppc601 from scole_mail, ok matt@
1.98	08-Nov-2013	nisimura	resort the sys/cpu.h way for unused cii iterator in !MULTIPROCESSOR case.
1.97	17-Jul-2013	matt	kcpuset_t changes for the pmap and removal of __cpuset_t
1.96	25-Apr-2013	macallan	branches: 1.96.4; 1.96.6; we can read the timebase register as a 64bit chunk when _ARCH_PPC64 is defined, not necessarily LP64
1.95	27-Nov-2012	matt	Make the 85xx get closer to spinning up the secondary CPUs. Don't assume TLB1[0] has the mapping for VA/PA 0. Make sure the TLB1 entries that map physical memory have the M (memory coherent) bit set.
1.94	20-Oct-2012	kiyohara	Support Cache Protocol 'MEI' with MULTIPROCESSOR.
1.93	28-Jul-2012	matt	branches: 1.93.2; Fix -fno-common fallout.
1.92	09-Jul-2012	matt	More cleanup. Use a union (pmap_segtab) and a typedef (pmap_segtab_t). Add more functionality from the mips pmap and try to make it more common to ease the transition for mips in the future.
1.91	10-Apr-2012	matt	Don't use global asm for __clang__
1.90	16-Mar-2012	matt	Add CPU_EXECPROT sysctl so that atf can enable exec permission tests for PPC Booke.
1.89	13-Dec-2011	kiyohara	branches: 1.89.2; Remove white-spaces.
1.88	30-Jun-2011	matt	branches: 1.88.2; 1.88.6; Modify mapiodev to take a third argument indicating whether the space should be prefetchable (true) or not (false).
1.87	29-Jun-2011	matt	Cleanup hatch names. Add cpuset_info.
1.86	21-Jun-2011	matt	Add a common cpu_ast(l, ci) routine. Add a ci_pmap_asid_cur for BOOKE debugging.
1.85	21-Jun-2011	matt	Reap the ci_ev_soft* evcnts since every variant implements __HAVE_FAST_SOFTINTS
1.84	20-Jun-2011	matt	Make struct cpu_info the same size if building MODULAR kernels or compiling a module.
1.83	20-Jun-2011	matt	Make more module friendly (part 1). Don't export frame.h and psl.h to all of the kernel. add lwp_pc and clkf accessor functions. whitespace cleanup.
1.82	17-Jun-2011	matt	struct device * -> device_t
1.81	15-Jun-2011	matt	Move booke_fixup_stubs() to fixup.c and rename it to cpu_fixup_stubs(). This makes it easier for other PPC variants to use it.
1.80	14-Jun-2011	matt	Take the fast softint support in e500_intr.c and make generic so that it can be used to provide fast softint for other interrupt implementations.
1.79	13-Jun-2011	matt	Add __HAVE_CPU_UAREA_ROUTINES support so that uareas will be direct-mapped. (This avoids the nasty tlb recursion problem on ibm4xx as well on mpc85xx).
1.78	12-Jun-2011	matt	Use mfsprg0 instead of mfsprg r,0
1.77	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.76	04-May-2011	macallan	branches: 1.76.2; add access functions for the Instruction Cache Throttling Control register found in 750 and newer CPUs
1.75	16-Feb-2011	matt	Fix CLKF_INTR Add debug evcnt.
1.74	18-Jan-2011	matt	branches: 1.74.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.73	21-Dec-2010	phx	branches: 1.73.2; All ports have to expose 'struct cpu_info' when _KMEMUSER is defined. We will just expose cpu_info.ci_data for the moment, which is needed for vmstat(1) to compile. Doing so with the whole cpu_info structure is problematic, because of imask_t.
1.72	13-Nov-2010	uebayasi	Include sys/device_if.h instead of sys/device.h. machine/cpu.h is one of the lower-most definitions. Relying on the huge sys/device.h is not a good idea.
1.71	20-Oct-2010	phx	Support sysctl machdep.cpu_speed for 7447A and 7448 based Macs. On those machines the CPU's DFS (Dynamic Frequency Switching) feature is used instead of a GPIO to control the speed. Two new functions in powerpc/oea/cpu_subr.c were introduced to support reading and writing of DFS: cpu_get_dfs() and cpu_set_dfs(). Also works for multiple CPUs, but not before interrupts are enabled.
1.70	24-Apr-2010	kiyohara	Support 64-bit imask for powerpc/pic.
1.69	18-Mar-2010	kiyohara	Support PowerPC 405EX/EXr. 1. Add some new source and header files. (MAL(split) and RGMII(new) relations for EMAC) 2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h. 3. intr.c supports MULTIUIC with virtual-irq. likes to oea. support 32-virq/128-hwirq. 4. multiple emac support. 5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx. 6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
1.68	09-Mar-2010	matt	branches: 1.68.2; Add BookE modifications to cpu_info
1.67	24-Oct-2009	rmind	branches: 1.67.2; Provide cpu_lwp_free* stubs in vax and powerpc. Reported by <he>.
1.66	21-Oct-2009	rmind	Remove uarea swap-out functionality: - Addresses the issue described in PR/38828. - Some simplification in threading and sleepq subsystems. - Eliminates pmap_collect() and, as a side note, allows pmap optimisations. - Eliminates XS_CTL_DATA_ONSTACK in scsipi code. - Avoids few scans on LWP list and thus potentially long holds of proc_lock. - Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k. - Removes __SWAP_BROKEN cases. Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on acorn26 (thanks to <bjh21>). Discussed on <tech-kern>, reviewed by <ad>.
1.65	30-Apr-2008	macallan	branches: 1.65.22; add dummy argument to cpu_did_resched() so kern_synch.c is happy again
1.64	08-Apr-2008	garbled	branches: 1.64.2; 1.64.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes: Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
1.63	27-Feb-2008	xtraeme	Remove CTL_MACHDEP_NAMES, it's not used anywhere. Ok by martin@.
1.62	05-Feb-2008	garbled	branches: 1.62.2; 1.62.6; Replace as much of the hardcoded CACHELINESIZE with curcpu()->ci_ci.dcache_line_size as I can. With this change, an ofppc kernel compiled with both PPC_OEA and PPC_OEA64_BRIDGE defined, boots.
1.61	05-Feb-2008	garbled	Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself. Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap. Yank __HAVE_PMAP_PHYSSEG from all the oea code. Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs. Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe. In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V]. With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
1.60	03-Dec-2007	ad	Interrupt handling changes, in discussion since February: - Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
1.59	17-Oct-2007	garbled	branches: 1.59.2; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.58	01-Jun-2007	nisimura	branches: 1.58.8; 1.58.10; 1.58.12; 1.58.14; - add booted_device and booted_kernel sysctl nodes to let userland know about runtime environment.
1.57	18-May-2007	rjs	Fix for yamt-idlelwp merge.
1.56	17-May-2007	yamt	merge yamt-idlelwp branch. asked by core@. some ports still needs work. from doc/BRANCHES: idle lwp, and some changes depending on it. 1. separate context switching and thread scheduling. (cf. gmcgarry_ctxsw) 2. implement idle lwp. 3. clean up related MD/MI interfaces. 4. make scheduler(s) modular.
1.55	04-Mar-2007	christos	branches: 1.55.2; 1.55.4; 1.55.10; Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
1.54	16-Feb-2007	ad	branches: 1.54.2; Remove spllowersoftclock() and CLKF_BASEPRI(), and always dispatch callouts via a soft interrupt. In the near future, softclock will be run from process context.
1.53	09-Feb-2007	ad	Merge newlock2 to head.
1.52	31-Aug-2006	matt	branches: 1.52.2; Add unmapiodev.
1.51	05-Aug-2006	sanjayl	1st cut of Powermac G5 support (uses bridge mode).
1.50	30-Jun-2006	freza	Bring ibm4xx interrupt code up to date: - generic soft interrupts (ie. use powerpc/softintr.c) - interrupt event counters (using the ones from powerpc/cpu.h:cpu_info where appropriate) - cleanup ibm4xx_intr.h, move implementation details to intr.c Convert all affected evbppc platforms. OK by simonb@, some points discussed with matt@
1.49	13-Jun-2006	freza	branches: 1.49.2; Merge multiple definitions of cntlzw() ("count leading zeros") instruction-wrapper to <powerpc/cpu.h>. OK by briggs@
1.48	30-May-2006	freza	Remove duplicate definitions of mfdcr()/mtdcr() in favor of a single one in cpu.h OK Matt Thomas
1.47	16-Feb-2006	perry	branches: 1.47.2; 1.47.8; Change "inline" back to "__inline" in .h files -- C99 is still too new, and some apps compile things in C89 mode. C89 keywords stay. As per core@.
1.46	24-Dec-2005	perry	branches: 1.46.2; 1.46.4; 1.46.6; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.45	11-Dec-2005	christos	merge ktrace-lwp.
1.44	03-Feb-2005	briggs	branches: 1.44.6; Keep track of the CPU's current speed (in kHz) in the cpu info structure, if we can get it. May want to expand this in the future to include min and max speeds for systems where we can adjust the speed.
1.43	19-Jan-2005	matt	branches: 1.43.2; Split the hw-dependent powermanglement into its own function and make Idle call that. Add a ci_idlespin function pointer to cpu_info. Update INIT_CPUINFO to initialize it to a naked 'blr' instruction. In oea/cpu_subr.c, add cpu_idlespin and make ci_idlespin point to it.
1.42	22-Sep-2004	yamt	branches: 1.42.4; move some per-cpu data definitions to MI place so that they can be modified without touching all ports. discussed on tech-kern@.
1.41	06-Jun-2004	kleink	Mark cr0 as clobbered in mfrtc().
1.40	17-Feb-2004	matt	Don't waste space on likely unused sysmon structure. Instead malloc them as needed.
1.39	04-Jan-2004	jdolecek	Rearrange process exit path to avoid need to free resources from different process context ('reaper'). From within the exiting process context: * deactivate pmap and free vmspace while we can still block * introduce MD cpu_lwp_free() - this cleans all MD-specific context (such as FPU state), and is the last potentially blocking operation; all of cpu_wait(), and most of cpu_exit(), is now folded into cpu_lwp_free() * process is now immediatelly marked as zombie and made available for pickup by parent; the remaining last lwp continues the exit as fully detached * MI (rather than MD) code bumps uvmexp.swtch, cpu_exit() is now same for both 'process' and 'lwp' exit uvm_lwp_exit() is modified to never block; the u-area memory is now always just linked to the list of available u-areas. Introduce (blocking) uvm_uarea_drain(), which is called to release the excessive u-area memory; this is called by parent within wait4(), or by pagedaemon on memory shortage. uvm_uarea_free() is now private function within uvm_glue.c. MD process/lwp exit code now always calls lwp_exit2() immediatelly after switching away from the exiting lwp. g/c now unneeded routines and variables, including the reaper kernel thread
1.38	21-Nov-2003	matt	Restore ci_curpm since it re-enables 603 to working state.
1.37	03-Sep-2003	matt	Move CLKF_BASEPRI to machine specific <intr.h> file since it depends on the encoding of the spl for the port.
1.36	18-Aug-2003	matt	Not all PPC ports (e.g. macppc) equate IPL_NONE with 0.
1.35	12-Aug-2003	matt	Nuke ci_curpm and curpm. Nuke pcb_pmreal. Those were use for spill stacks and those no longer exist. for few uses that need CURPM, use CURPCB/PCB_PM
1.34	08-Aug-2003	matt	Nuke ci_spillstk/CI_SPILLSTK. No longer needed.
1.33	04-Aug-2003	matt	Make that OEA based kernels can properly deal with kernel ISI faults. Now that LKMs are supported, it is possible for a LKM page to be "outspilled" resulting in a possible ISI fault. Try to spill the page back in.
1.32	02-Aug-2003	matt	Add symbolic offsets for what's in cpu save locations. Add a PPC64 variant of mftb
1.31	25-Jul-2003	scw	Switch ibm4xx over to using the more flexible powerpc bus_space/bus_dma code.
1.30	13-Mar-2003	matt	branches: 1.30.2; Use __asm & __volatile to make lint(1) happy.
1.29	11-Mar-2003	hannken	Add support for the IBM 403GCX cpu. Enabled with "options PPC_IBM403". - different set of device control registers. - non-standard access to the time base. - 16 byte cache lines. Approved by: Eduardo Horvath <eeh@netbsd.org>
1.28	04-Mar-2003	matt	Add some missing volatiles.
1.27	10-Feb-2003	matt	Only include kernel headers if _KERNEL is defined.
1.26	03-Feb-2003	matt	Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.25	02-Feb-2003	matt	Perform a rototill of the powerpc code. Mandate use of SPRG0 to store a pointer to current cpu's cpu_info structure. Use cpu_info for intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK to std.<platform>. Change faultbuf to a struct instead of an array. On MPC6XX cpus, stop using the vector page for temporary space and use reserved space in cpu_info.
1.24	22-Jan-2003	kleink	Add mfrtcl() and mfrtc(), similar to mftbl() and mftb().
1.23	18-Jan-2003	thorpej	Merge the nathanw_sa branch.
1.22	25-Nov-2002	thorpej	No newlines in string constants.
1.21	26-Sep-2002	matt	In mftb(), make sure we say we are clobbering cr0.
1.20	14-Aug-2002	matt	Prepare for PPC64. Use register_t for mtmsr/mfmsr since the msr on PPC64 is 64bits wide. Define proper types for PPC64 if _LP64 is defined.
1.19	06-Aug-2002	chs	move more inlines to cpu.h: mftb(), mftbl() and mfpvr(). (the mftb() in pmap.c only wanted the lower 32 bits, so that's now mftbl()).
1.18	28-Jul-2002	chs	define CPU_INFO iterators so that the CPU-states sysctl works for MP.
1.17	16-Jul-2002	matt	Add machdep.powerpc sysctl. Change the default value of powersave to -1 (< 0 mean no powersave available). Enable powersave by default for 750/7400/7410 but leave if off for 7450/7455.
1.16	05-Jul-2002	matt	Peform a rototill over the powerpc-based ports. Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT initialization code. Add user Altivec support. Fix calls to OF_call_method in macppc/macppc/machdep.c. Use ci_fpuproc in cpu_info instead of separate fpuproc. Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
1.15	26-Mar-2002	matt	branches: 1.15.2; Use size_t in prototype (so this will be LP64 clean for PPC64 someday). Calculate len separately for icache & dcache in case each has different cacheline widths. Make the code for both loops the same except for the dcbst/icbi. Deal with sizes >=2GB properly (like that'll happen but ...)
1.14	13-Mar-2002	eeh	Add cache_info to cpu_info which provides details about D$ and I$ sizes and line sizes. This is needed for cache flusing, clearing memory, and several other operations. This information is accessible from userland through a new CPU_CACHEINFO sysctl.
1.13	06-Mar-2002	nathanw	Move #include <dev/sysmon/sysmonvar.h> inside #ifdef _KERNEL.
1.12	03-Mar-2002	nathanw	Add sysmon data structures to struct cpu_info.
1.11	05-Dec-2001	chs	fix macppc MULTIPROCESSOR compilation.
1.10	28-Aug-2001	matt	branches: 1.10.6; __syncicache needs to be exports to userspace as well as the kernel.
1.9	26-Aug-2001	matt	Make all powerpc ports use a common Makefile.powerpc (except walnut) Enforce -Wmissing-prototypes -Wstrict-prototypes for all ppc ports. Split out macppc cpu support and make common to mpc6xx ports. Make other mpc6xx ports use it. Add evcnts for mpc6xx traps.
1.8	13-Jun-2001	simonb	branches: 1.8.2; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.7	06-Jun-2001	matt	Introduce a new & faster pmap for the MPC6xx (60x, 7xx, 7xxx) PPC CPUs. Move MPC6xx dependent header files to powerpc/include/mpc6xx/
1.6	05-May-1999	tsubai	branches: 1.6.2; 1.6.16; Add missing CPU_MAXID definition.
1.5	17-Apr-1999	ws	Modify syncicache on PowerPC from an inline to a real function. Support different cache line sizes with the same object code in userland. While here, move the function to implementation name space.
1.4	28-May-1998	sakamoto	Rename NetBSD/powerpc to NetBSD/ofppc. New sys/arch/powerpc with PowerPC-generic stuff.
1.3	05-Nov-1997	thorpej	asm -> __asm__, volatile -> __volatile
1.2	16-Apr-1997	thorpej	branches: 1.2.8; Definitions for machine_vec interface, from Wolfgang Solfrank.
1.1	30-Sep-1996	ws	PowerPC port
1.2.8.1	05-Nov-1997	thorpej	Update from trunk: asm -> __asm__, volatile -> __volatile
1.6.16.1	21-Jun-2001	nathanw	Catch up to -current.
1.6.2.1	21-Jun-1999	thorpej	Sync w/ -current.
1.8.2.6	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.8.2.5	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.8.2.4	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.8.2.3	16-Mar-2002	jdolecek	Catch up with -current.
1.8.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.8.2.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.10.6.13	11-Dec-2002	thorpej	Sync with HEAD.
1.10.6.12	18-Oct-2002	nathanw	Catch up to -current.
1.10.6.11	27-Aug-2002	nathanw	Catch up to -current.
1.10.6.10	06-Aug-2002	nathanw	Catch up with powerpc rototilling.
1.10.6.9	01-Aug-2002	nathanw	LWPify.
1.10.6.8	01-Aug-2002	nathanw	Catch up to -current.
1.10.6.7	24-Jun-2002	nathanw	Curproc->curlwp renaming. Change uses of "curproc->l_proc" back to "curproc", which is more like the original use. Bare uses of "curproc" are now "curlwp". "curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL) so that it is always safe to reference curproc (dereferencing curproc is another story, but that's always been true).
1.10.6.6	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.10.6.5	08-Jan-2002	nathanw	Catch up to -current.
1.10.6.4	08-Dec-2001	thorpej	Add a cpu_proc_fork(), called from uvm_proc_fork(), which takes care of machine-dependent handling a fork() time (this is different from forking the actual context in an LWP world). #define it away on platforms which do not need it. Problem noted by Gregory McGarry.
1.10.6.3	15-Nov-2001	briggs	PROC_PC -> LWP_PC. (thanks, thorpej)
1.10.6.2	05-Nov-2001	briggs	Initial SA support for ppc. Test-booted on sandpoint, macppc, & walnut. mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein <kleink@netbsd.org>.
1.10.6.1	28-Aug-2001	briggs	file cpu.h was added on branch nathanw_sa on 2001-11-05 19:46:16 +0000
1.15.2.3	31-Aug-2002	gehenna	catch up with -current.
1.15.2.2	21-Jul-2002	gehenna	catch up with -current.
1.15.2.1	16-Jul-2002	gehenna	catch up with -current.
1.30.2.6	04-Feb-2005	skrll	Sync with HEAD.
1.30.2.5	24-Jan-2005	skrll	Sync with HEAD.
1.30.2.4	24-Sep-2004	skrll	Sync with HEAD.
1.30.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.30.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.30.2.1	03-Aug-2004	skrll	Sync with HEAD
1.42.4.1	29-Apr-2005	kent	sync with -current
1.43.2.1	12-Feb-2005	yamt	sync with head.
1.44.6.8	17-Mar-2008	yamt	sync with head.
1.44.6.7	11-Feb-2008	yamt	sync with head.
1.44.6.6	07-Dec-2007	yamt	sync with head
1.44.6.5	27-Oct-2007	yamt	sync with head.
1.44.6.4	03-Sep-2007	yamt	sync with head.
1.44.6.3	26-Feb-2007	yamt	sync with head.
1.44.6.2	30-Dec-2006	yamt	sync with head.
1.44.6.1	21-Jun-2006	yamt	sync with head.
1.46.6.2	01-Jun-2006	kardel	Sync with head.
1.46.6.1	22-Apr-2006	simonb	Sync with head.
1.46.4.1	09-Sep-2006	rpaulo	sync with head
1.46.2.1	18-Feb-2006	yamt	sync with head.
1.47.8.1	19-Jun-2006	chap	Sync with head.
1.47.2.3	03-Sep-2006	yamt	sync with head.
1.47.2.2	11-Aug-2006	yamt	sync with head
1.47.2.1	26-Jun-2006	yamt	sync with head.
1.49.2.1	13-Jul-2006	gdamore	Merge from HEAD.
1.52.2.1	28-Jan-2007	ad	powerpc changes.
1.54.2.3	07-Apr-2007	matt	Add cpu_did_resched()
1.54.2.2	03-Apr-2007	matt	Adapt powerpc to yamt-idlelwp. Nuke cpu_setfunc. Don't define _HAVE_BITENDIAN_BITOPS. Misc cleanups.
1.54.2.1	12-Mar-2007	rmind	Sync with HEAD.
1.55.10.5	11-Oct-2007	garbled	Move a bunch of the macppc SMP code out of macppc, and down into the generic OEA code. Add a set of md callbacks into these shared routines, that any oeappc SMP machine needs to provide. This allows for generally shared SMP startup code, but still allows for machine-specific differences in the setup and kicking of the new CPU. Convert macppc to this new layout. Tested by Macallan. Add an initial attempt at SMP to prep. Tested on UP machine only, untested on SMP yet.
1.55.10.4	04-Oct-2007	macallan	add event counters for IPIs received on each CPU
1.55.10.3	02-Aug-2007	macallan	sync with HEAD
1.55.10.2	26-Jun-2007	garbled	Sync with HEAD.
1.55.10.1	22-May-2007	matt	Update to HEAD.
1.55.4.1	11-Jul-2007	mjf	Sync with head.
1.55.2.4	03-Dec-2007	ad	Sync with HEAD.
1.55.2.3	23-Oct-2007	ad	Sync with head.
1.55.2.2	09-Jun-2007	ad	Sync with head.
1.55.2.1	27-May-2007	ad	Sync with head.
1.58.14.1	25-Oct-2007	bouyer	Sync with HEAD.
1.58.12.1	18-Oct-2007	yamt	sync with head.
1.58.10.3	23-Mar-2008	matt	sync with HEAD
1.58.10.2	09-Jan-2008	matt	sync with HEAD
1.58.10.1	06-Nov-2007	matt	sync with HEAD
1.58.8.2	09-Dec-2007	jmcneill	Sync with HEAD.
1.58.8.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.59.2.2	18-Feb-2008	mjf	Sync with HEAD.
1.59.2.1	08-Dec-2007	mjf	Sync with HEAD.
1.62.6.2	02-Jun-2008	mjf	Sync with HEAD.
1.62.6.1	03-Apr-2008	mjf	Sync with HEAD.
1.62.2.1	24-Mar-2008	keiichi	sync with head.
1.64.4.3	11-Aug-2010	yamt	sync with head.
1.64.4.2	11-Mar-2010	yamt	sync with head
1.64.4.1	16-May-2008	yamt	sync with head.
1.64.2.1	18-May-2008	yamt	sync with head.
1.65.22.3	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.65.22.2	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.65.22.1	07-Jan-2011	matt	Add booke support.
1.67.2.2	22-Oct-2010	uebayasi	Sync with HEAD (-D20101022).
1.67.2.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.68.2.4	12-Jun-2011	rmind	sync with head
1.68.2.3	31-May-2011	rmind	sync with head
1.68.2.2	05-Mar-2011	rmind	sync with head
1.68.2.1	30-May-2010	rmind	sync with head
1.73.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.74.2.1	17-Feb-2011	bouyer	Sync with HEAD
1.76.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.88.6.3	29-Apr-2012	mrg	sync to latest -current.
1.88.6.2	05-Apr-2012	mrg	sync to latest -current.
1.88.6.1	18-Feb-2012	mrg	merge to -current.
1.88.2.4	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.88.2.3	16-Jan-2013	yamt	sync with (a bit old) head
1.88.2.2	30-Oct-2012	yamt	sync with head
1.88.2.1	17-Apr-2012	yamt	sync with head
1.89.2.2	17-May-2012	riz	Pull up following revision(s) (requested by matt in ticket #251): sys/arch/powerpc/powerpc/powerpc_machdep.c: revision 1.64 sys/arch/powerpc/include/cpu.h: revision 1.90 Add CPU_EXECPROT sysctl so that atf can enable exec permission tests for PPC Booke.
1.89.2.1	09-May-2012	riz	Pull up following revision(s) (requested by matt in ticket #242): sys/arch/powerpc/include/cpu.h: revision 1.91 Don't use global asm for __clang__
1.93.2.5	03-Dec-2017	jdolecek	update from HEAD
1.93.2.4	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.93.2.3	23-Jun-2013	tls	resync from head
1.93.2.2	25-Feb-2013	tls	resync with head
1.93.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.96.6.1	23-Jul-2013	riastradh	sync with HEAD
1.96.4.2	18-May-2014	rmind	sync with head
1.96.4.1	28-Aug-2013	rmind	sync with head
1.100.6.2	05-Dec-2016	skrll	Sync with HEAD
1.100.6.1	06-Apr-2015	skrll	Sync with HEAD
1.101.2.1	04-Nov-2016	pgoyette	Sync with HEAD
1.102.8.1	26-Feb-2018	snj	Pull up following revision(s) (requested by skrll in ticket #566): sys/arch/arm/include/cpu.h: 1.94 sys/arch/mips/include/cpu.h: 1.122 sys/arch/powerpc/include/cpu.h: 1.103 sys/sys/cpu.h: 1.42 CPU_INFO_FOREACH() must always iterate at least the boot cpu. document this in sys/cpu.h and fix the arm and mips versions to check ncpu is non zero before using it as an iterator max. this should fix the new assert in init_main.c. -- apply the same change for powerpc as mrg did for arm and mips: CPU_INFO_FOREACH() must always iterate at least the boot cpu. document this in sys/cpu.h and fix the arm and mips versions to check ncpu is non zero before using it as an iterator max. this should fix the new assert in init_main.c.
1.103.2.5	06-Sep-2018	pgoyette	Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
1.103.2.4	28-Jul-2018	pgoyette	Sync with HEAD
1.103.2.3	25-Jun-2018	pgoyette	Sync with HEAD
1.103.2.2	21-May-2018	pgoyette	Sync with HEAD
1.103.2.1	30-Mar-2018	pgoyette	Resolve conflicts between branch and HEAD
1.106.2.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.106.2.1	10-Jun-2019	christos	Sync with HEAD
1.115.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.9	06-Jul-2020	rin	Include missing opt_ppcarch.h.
1.8	18-Jan-2011	matt	Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.7	25-Feb-2010	matt	branches: 1.7.2; 1.7.4; Adapt to spr.h breakup.
1.6	05-Feb-2008	garbled	branches: 1.6.10; 1.6.30; 1.6.34; Ifdef out all the MPC601 code with PPC_OEA601. Now only arches that have the possibility of running on an MPC601, are infected with all the extra code and nops that it added. Also, fix compilation that I broke with the pmap code, by adding oeacpufeat to the locores of various ppc arches. Noted by mlelstv.
1.5	17-Oct-2007	garbled	branches: 1.5.2; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.4	16-Feb-2006	perry	branches: 1.4.24; 1.4.32; 1.4.42; 1.4.44; 1.4.46; 1.4.48; Change "inline" back to "__inline" in .h files -- C99 is still too new, and some apps compile things in C89 mode. C89 keywords stay. As per core@.
1.3	24-Dec-2005	perry	branches: 1.3.2; 1.3.4; 1.3.6; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.2	11-Mar-2003	hannken	branches: 1.2.18; Add support for the IBM 403GCX cpu. Enabled with "options PPC_IBM403". - different set of device control registers. - non-standard access to the time base. - 16 byte cache lines. Approved by: Eduardo Horvath <eeh@netbsd.org>
1.1	05-Feb-2003	nakayama	Replace machine/rnd.h with more appropriate name to share it with cycle counter based microtime in kern/kern_microtime.c.
1.2.18.3	11-Feb-2008	yamt	sync with head.
1.2.18.2	27-Oct-2007	yamt	sync with head.
1.2.18.1	21-Jun-2006	yamt	sync with head.
1.3.6.1	22-Apr-2006	simonb	Sync with head.
1.3.4.1	09-Sep-2006	rpaulo	sync with head
1.3.2.1	18-Feb-2006	yamt	sync with head.
1.4.48.1	25-Oct-2007	bouyer	Sync with HEAD.
1.4.46.1	18-Oct-2007	yamt	sync with head.
1.4.44.2	23-Mar-2008	matt	sync with HEAD
1.4.44.1	06-Nov-2007	matt	sync with HEAD
1.4.42.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.4.32.1	16-Oct-2007	macallan	make cpu_frequency() work at least on a few machines Needed for stuff like lockstat.
1.4.24.1	23-Oct-2007	ad	Sync with head.
1.5.2.1	18-Feb-2008	mjf	Sync with HEAD.
1.6.34.1	07-Jan-2011	matt	Add booke support
1.6.30.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.6.10.1	11-Mar-2010	yamt	sync with head
1.7.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.7.2.1	05-Mar-2011	rmind	sync with head
1.2	17-Jul-2013	matt	kcpuset_t changes for the pmap and removal of __cpuset_t
1.1	05-Jun-2011	matt	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; 1.1.20; 1.1.24; 1.1.32; Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.1.32.1	23-Jul-2013	riastradh	sync with HEAD
1.1.24.1	28-Aug-2013	rmind	sync with head
1.1.20.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.1.10.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.1.8.2	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.8.1	05-Jun-2011	matt	file cpuset.h was added on branch matt-nb5-pq3 on 2011-10-14 17:21:26 +0000
1.1.6.2	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.1.6.1	05-Jun-2011	cherry	file cpuset.h was added on branch cherry-xenmp on 2011-06-23 14:19:30 +0000
1.1.4.2	12-Jun-2011	rmind	sync with head
1.1.4.1	05-Jun-2011	rmind	file cpuset.h was added on branch rmind-uvmplock on 2011-06-12 00:24:04 +0000
1.1.2.2	06-Jun-2011	jruoho	Sync with HEAD.
1.1.2.1	05-Jun-2011	jruoho	file cpuset.h was added on branch jruoho-x86intr on 2011-06-06 09:06:27 +0000
1.11	26-Apr-2011	joerg	Remove Darwin, MACH and Mach-O support.
1.10	28-Apr-2008	martin	branches: 1.10.22; 1.10.28; Remove clause 3 and 4 from TNF licenses
1.9	11-Dec-2005	christos	branches: 1.9.74; 1.9.76; 1.9.78; merge ktrace-lwp.
1.8	25-Jun-2005	christos	move ppc commpage stuff here.
1.7	15-Jul-2004	manu	typo
1.6	04-Jul-2004	manu	MacOS X.3 introduces a new sigreturn for PowerPC, with a usercontext versionning argument. For now we only implement the X.2 flavor.
1.5	03-Jul-2004	manu	In MacOS X.3, the kernel maps tw opages of memory in every user process. This areas is called the comm pages. It is used to provide fast access to several data and functions. The comm pages are mapped starting at 0xffff800 (address chosed so that absolute branch can be used, so it can be accessed even when dynamic linking is not ready). NetBSD has the user stack here, so we need to provide a Darwin-specific stack setup routine which sets the top of the stack at 0xbfff0000. This implementation is not complete but it does enough to get MacOS X.3 starting again (static binaries run, dynamic binaries still have an issue). in the comm pages functions, we only implement bcopy, pthread_self and memcpy. TODO: - clean up the powerpc specific code from MD parts - for now we map only one page to avoid a crash, we want two pages. - write all the comm functions.
1.4	11-Nov-2003	manu	Implement mach_thread_get_state. While we are here, try to tag machine dependent functions in header files. also transformed darwin_ppc__state into mach_ppc__state, as this is what they really are (COMPAT_DARWIN is on the top of COMPAT_MACH, not the other way around)
1.3	07-Sep-2003	manu	forgotten commit for KERN_PROCARGS sysctl in COMPAT_DARWIN
1.2	08-Dec-2002	manu	branches: 1.2.2; 1.2.8; A working fork/vfork implementation. Darwin fork differs from our fork by two ways: - the child gets its pid as retval[0] (userland stub will turn it into a 0), retval[1] is 1 and it is 0 in the parent. - in the child, the fork syscall is successful, hence we must skip the next instruction.
1.1	26-Nov-2002	manu	Add signal delivery for the PowerPC. Everything is implemented except siginfo. The stack layout is observed from stack dumps on Darwin, so it should be very accurate.
1.2.8.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.2.8.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.8.2	18-Sep-2004	skrll	Sync with HEAD.
1.2.8.1	03-Aug-2004	skrll	Sync with HEAD
1.2.2.2	11-Dec-2002	thorpej	Sync with HEAD.
1.2.2.1	08-Dec-2002	thorpej	file darwin_machdep.h was added on branch nathanw_sa on 2002-12-11 06:11:41 +0000
1.9.78.1	16-May-2008	yamt	sync with head.
1.9.76.1	18-May-2008	yamt	sync with head.
1.9.74.1	02-Jun-2008	mjf	Sync with HEAD.
1.10.28.1	06-Jun-2011	jruoho	Sync with HEAD.
1.10.22.1	31-May-2011	rmind	sync with head
1.30	11-Mar-2021	simonb	Use ifdef _KERNEL_OPT instead of ifdef _KERNEL before including "opt_ppcarch.h".
1.29	06-Jan-2021	rin	Switch DDB for powerpc/booke into SOFTWARE_SSTEP. SR_SINGLESTEP aka PSL_SE bit in MSR is only available for oea, and HW debug facilities for booke are significantly different from oea.
1.28	06-Jul-2020	rin	branches: 1.28.2; Style and cosmetic changes. No binary changes intended.
1.27	15-Dec-2019	rin	Do not mask out LK bit (bit 31) from M_BCTR, which distinguishes bcctr and bcctrl. Fix build failure for ibm4xx kernels with GCC8. XXX pullup to netbsd-9, -8, and -7
1.26	06-Nov-2017	christos	branches: 1.26.4; 1.26.8; Cleanup and clarify the ELFSIZE mess: We now have 2 variables automatically set in elf_machdep.h: ARCH_ELFSIZE: the size for userland binaries KERN_ELFSIZE: the size for the kernel binaries DB_ELFSIZE has been deleted and KERN_ELFSIZE should have always the same values DB_ELFSIZE used to have. In sys/exec_elf.h, if ELFSIZE is not set, it is set to KERN_ELFSIZE for the kernel and ARCH_ELFSIZE for userland. These defaults should eliminate the need for most manual ELFSIZE setting.
1.25	23-Jan-2015	nonaka	ddb MP support
1.24	14-Jun-2011	matt	branches: 1.24.12; 1.24.30; Update KDB_NUMREGS to match what gdb6 is using for PPC. Patch taken from PR/43196
1.23	26-May-2011	joerg	branches: 1.23.2; Introduce DDB_EXPR_FMT and replace the logic around DB_EXPR_T_IS_QUAD.
1.22	18-Jan-2011	matt	Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.21	28-Jan-2010	phx	branches: 1.21.4; 1.21.6; New machine commands for PPC OEA: bat: prints the BAT registers and translations mmu: prints MMU registers (sdr1, sr0..15)
1.20	14-Mar-2009	dsl	Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.19	14-May-2006	elad	branches: 1.19.66; 1.19.74; 1.19.80; 1.19.88; integrate kauth.
1.18	01-Apr-2006	cherry	closes kern/32359
1.17	29-Apr-2003	scw	branches: 1.17.18; 1.17.32; 1.17.34; 1.17.36; 1.17.38; 1.17.40; Add a BKPT_ADDR() macro which gives MD code a chance to munge a breakpoint address before it's used. Currently a no-op on all but sh5. This is useful on sh5, for example, to mask off the instruction type encoding in the bottom two address bits, and makes it possible to do "db> break $rXX" instead of manually munging the address.
1.16	14-Mar-2003	matt	Make lint happy by not assigning to casted lvalue.
1.15	22-Jan-2003	kleink	MPC601 support bits: * install 601-specific DSI and RUNMODETRC trap handlers * save/restore MQ in trapframe, add MQ hooks to DDB * extend battable to 512 entries to hold the 601's 8M translations * instead of adding I/O to BAT starvation, set up segment registers for Memory-Forced I/O Controller Interface Access * sync after tlbie
1.14	20-Dec-2002	scw	Use Software Single Stepping for now when PPC_IBM4xx is defined. The existing hardware assisted method doesn't work on this cpu. Also correct the "I_B" constant in db_machine.h.
1.13	13-May-2002	matt	Eliminate commons.
1.12	06-Jan-2002	dbj	add support for kgdb over zs
1.11	27-Dec-2001	dbj	fix single stepping and continuing from breakpoints in ddb
1.10	20-Jun-2001	briggs	branches: 1.10.2; 1.10.8; Build for kgdb as well as for ddb (mutually exclusive).
1.9	13-Jun-2001	simonb	Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.8	02-Aug-2000	tsubai	branches: 1.8.2; uvm/uvm_inherit.h was removed.
1.7	26-Jun-2000	mrg	<vm/vm_param.h> -> <uvm/uvm_param.h>
1.6	26-Jun-2000	mrg	remove/move more mach vm header files: <vm/pglist.h> -> <uvm/uvm_pglist.h> <vm/vm_inherit.h> -> <uvm/uvm_inherit.h> <vm/vm_kern.h> -> into <uvm/uvm_extern.h> <vm/vm_object.h> -> nothing <vm/vm_pager.h> -> into <uvm/uvm_pager.h> also includes a bunch of <vm/vm_page.h> include removals (due to redudancy with <vm/vm.h>), and a scattering of other similar headers.
1.5	25-Jun-2000	mrg	<vm/vm_prot.h> becomes <uvm/uvm_prot.h>
1.4	31-Aug-1998	tsubai	branches: 1.4.12; 1.4.22; vm_offset_t --> [pv]addr_t
1.3	31-Aug-1998	tsubai	Change db_expr_t from int to long like other ports.
1.2	23-Feb-1998	mycroft	Fix layout of powerpc_saved_state.
1.1	27-Jan-1998	sakamoto	Import DDB from OpenBSD/powerpc.
1.4.22.1	05-Aug-2000	wiz	Apply patch (approved by jhawk and thorpej): Rename VM_INHERIT_* to MAP_INHERIT_* and move them to sys/sys/mman.h as discussed on tech-kern. Retire sys/vm/vm_inherit.h, update man page for minherit(2). The patch includes approximately the following diffs (approximately since -current already used uvm/uvm_inherit.h): minherit.2: 1.4 -> 1.8 mman.h: 1.26 -> 1.27 powerpc/include/db_machdep.h: 1.7 -> 1.8 pc532/include/db_machdep.h: 1.12 -> 1.13
1.4.12.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.8.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.10.8.6	29-Dec-2002	thorpej	Sync with HEAD.
1.10.8.5	20-Jun-2002	nathanw	Catch up to -current.
1.10.8.4	28-Feb-2002	nathanw	Catch up to -current.
1.10.8.3	11-Jan-2002	nathanw	More catchup.
1.10.8.2	08-Jan-2002	nathanw	Catch up to -current.
1.10.8.1	20-Jun-2001	nathanw	file db_machdep.h was added on branch nathanw_sa on 2002-01-08 00:27:10 +0000
1.10.2.2	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.10.2.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.17.40.1	24-May-2006	tron	Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
1.17.38.1	19-Apr-2006	elad	sync with head - hopefully this will work
1.17.36.1	11-Apr-2006	yamt	sync with head
1.17.34.1	22-Apr-2006	simonb	Sync with head.
1.17.32.1	09-Sep-2006	rpaulo	sync with head
1.17.18.1	21-Jun-2006	yamt	sync with head.
1.19.88.1	07-Jan-2011	matt	Add booke support.
1.19.80.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.19.74.1	28-Apr-2009	skrll	Sync with HEAD.
1.19.66.2	11-Mar-2010	yamt	sync with head
1.19.66.1	04-May-2009	yamt	sync with head.
1.21.6.1	06-Jun-2011	jruoho	Sync with HEAD.
1.21.4.2	31-May-2011	rmind	sync with head
1.21.4.1	05-Mar-2011	rmind	sync with head
1.23.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.24.30.1	06-Apr-2015	skrll	Sync with HEAD
1.24.12.1	03-Dec-2017	jdolecek	update from HEAD
1.26.8.1	25-Feb-2020	martin	Pull up following revision(s) (requested by rin in ticket #727): sys/arch/powerpc/include/db_machdep.h: revision 1.27 Do not mask out LK bit (bit 31) from M_BCTR, which distinguishes bcctr and bcctrl. Fix build failure for ibm4xx kernels with GCC8. XXX pullup to netbsd-9, -8, and -7
1.26.4.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.28.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.4	28-May-1998	sakamoto	Rename NetBSD/powerpc to NetBSD/ofppc. New sys/arch/powerpc with PowerPC-generic stuff.
1.3	02-Mar-1998	drochner	Change MBR partition type for NetBSD to 0xa9, like the i386 port. Provide compatibility via COMPAT_386BSD_MBRPART.
1.2	16-Apr-1997	thorpej	Don't define two partition types for NetBSD - just use the standard 0xa5. (Eww, DOS MBR)
1.1	30-Sep-1996	ws	PowerPC port
1.16	08-Dec-2019	uwe	Fix typo in the definition of #ha() in a comment.
1.15	06-Nov-2017	christos	branches: 1.15.4; handle ppc64
1.14	06-Nov-2017	christos	Cleanup and clarify the ELFSIZE mess: We now have 2 variables automatically set in elf_machdep.h: ARCH_ELFSIZE: the size for userland binaries KERN_ELFSIZE: the size for the kernel binaries DB_ELFSIZE has been deleted and KERN_ELFSIZE should have always the same values DB_ELFSIZE used to have. In sys/exec_elf.h, if ELFSIZE is not set, it is set to KERN_ELFSIZE for the kernel and ARCH_ELFSIZE for userland. These defaults should eliminate the need for most manual ELFSIZE setting.
1.13	10-Aug-2017	joerg	Add IRELATIVE support for ARM, X86 and PowerPC.
1.12	07-Mar-2014	matt	branches: 1.12.6; Don't define ARCH_ELFSIZE if it's already defined.
1.11	06-Mar-2014	matt	Add PowerPC64 DTs
1.10	06-Mar-2014	matt	More comments. rest of powerpc64 relocs
1.9	15-Jan-2011	matt	branches: 1.9.8; 1.9.18; 1.9.22; Add some more reloc types as well as DT_PPC_GOT
1.8	30-May-2009	skrll	branches: 1.8.4; Add TLS relocation definitions.
1.7	25-Nov-2006	freza	branches: 1.7.56; PR toolchain/35105: Don't include reloc.h, instead provide R_PPC_* defines and make R_TYPE() use them. This is more consistent with other ports, too. Suggested by Manuel Bouyer, ok'd by Matt Thomas.
1.6	08-Jul-2006	ross	branches: 1.6.4; 1.6.6; add new split personality for ELF64
1.5	09-Dec-2001	thorpej	branches: 1.5.32; 1.5.46; 1.5.50; 1.5.58; Add support for dumping ELF-cormat core files.
1.4	02-Apr-2000	minoura	branches: 1.4.8; 1.4.12; Move dl* function definitions to libc on ELF. Based on the patch supplied by Takuya Shiozaki <tshiozak@astec.co.jp>. See http://mail-index.netbsd.org/tech-userlevel/2000/02/23/0000.html.
1.3	25-Oct-1999	kleink	Update to match new SVR4-style definition names in <sys/exec_elf.h>.
1.2	24-Nov-1998	tsubai	branches: 1.2.10; 1.2.12; 1.2.14; Add PIC definitions.
1.1	16-Apr-1997	thorpej	Machine-dependent definitions for Elf on NetBSD/powerpc.
1.2.14.1	27-Dec-1999	wrstuden	Pull up to last week's -current.
1.2.12.1	15-Nov-1999	fvdl	Sync with -current
1.2.10.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.4.12.1	08-Jan-2002	nathanw	Catch up to -current.
1.4.8.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.5.58.1	13-Jul-2006	gdamore	Merge from HEAD.
1.5.50.1	11-Aug-2006	yamt	sync with head
1.5.46.1	09-Sep-2006	rpaulo	sync with head
1.5.32.1	30-Dec-2006	yamt	sync with head.
1.6.6.1	10-Dec-2006	yamt	sync with head.
1.6.4.1	12-Jan-2007	ad	Sync with head.
1.7.56.1	20-Jun-2009	yamt	sync with head
1.8.4.1	05-Mar-2011	rmind	sync with head
1.9.22.1	18-May-2014	rmind	sync with head
1.9.18.2	03-Dec-2017	jdolecek	update from HEAD
1.9.18.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.9.8.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.12.6.1	28-Aug-2017	skrll	Sync with HEAD
1.15.4.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.9	17-Mar-2000	mycroft	In the `MY THAT'S GROSS' department... Eliminate the recursive include of machine/endian.h from sys/endian.h.
1.8	16-Mar-2000	mycroft	Foolish consistency. Mainly, always use underscores and sys/endian.h.
1.7	21-Aug-1999	simonb	branches: 1.7.2; Include <sys/endian.h> after defining whether where are little- or big-endian. i386, pc532 and vax still include <machine/byte_swap.h> and define macros for the {n,h}to{h,n}*() functions. mips also defines some endian-independent assembly-code aliases for unaligned memory accesses.
1.6	24-Jan-1999	mycroft	Mark [hn]to[nh][ls]() with __const__, so they are subject to CSE.
1.5	15-Jan-1999	bouyer	Move the bswap functions from libutil to libc (this bups the minor of libc and the major of libutil). For little-endian architectures merge the bnswap() assembly versions with nto* and hton* using symbols aliasing. Use symbol renaming for the bswap function in this case to avoid namespace pollution. Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian machines, common code for inline macros go in machine/byte_swap.h Sync libkern with libc. Adjust #include in kernel sources for machine/bswap.h.
1.4	31-Jul-1998	mycroft	(Always) (practice) (safe) (macro expansion).
1.3	09-Oct-1997	bouyer	branches: 1.3.4; Add byte-swapping functions (bswap16, bswap32, bswap64) to libkern. Only assembly version for i386 bswap16 and bswap32 for now (bswap64 uses bswap32). Contribution of assembly versions of these are welcome. Add byte-swapping of ext2fs metadata for big-endian systems. Tested on i386 and sparc.
1.2	13-Oct-1996	christos	branches: 1.2.10; use in_addr_t and in_port_t
1.1	30-Sep-1996	ws	PowerPC port
1.2.10.1	14-Oct-1997	thorpej	Update marc-pcmcia branch from trunk.
1.3.4.1	08-Aug-1998	eeh	Revert cdevsw mmap routines to return int.
1.7.2.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.1	17-Mar-2000	mycroft	branches: 1.1.6; In the `MY THAT'S GROSS' department... Eliminate the recursive include of machine/endian.h from sys/endian.h.
1.1.6.2	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.1.6.1	17-Mar-2000	bouyer	file endian_machdep.h was added on branch thorpej_scsipi on 2000-11-20 20:31:08 +0000
1.2	08-Oct-1996	cgd	moved to aout_machdep.h (via repository copy)
1.1	30-Sep-1996	ws	PowerPC port
1.8	30-Oct-2024	riastradh	Sprinkle <sys/featuretest.h> where __SOURCE macros are consulted. Otherwise, the feature tests might come out wrong. For example, header files that check for _NETBSD_SOURCE won't get the default when no other __SOURCE macros are defined; header files that check for _POSIX_C_SOURCE might miss _XOPEN_SOURCE, which is supposed to imply a corresponding _POSIX_C_SOURCE. PR lib/58752: various header files test _*_SOURCE macros but don't include sys/featuretest.h
1.7	13-Sep-2022	rin	branches: 1.7.10; fesetexceptflag(): Set FE_ALL_INVALID instead of FE_ALL_EXCEPT for FE_INVALID. Taken from FreeBSD: https://cgit.freebsd.org/src/commit/lib/msun/powerpc/fenv.h?id=e7bd4f846f0c9185aebfd3d116bb78ab137280fa > [POWERPC] msun: fix incorrect flag in fesetexceptflag > Fix incorrect mask being used when FE_INVALID bit is wanted by user. > The problem was noticed thanks to msun fenv tests. > > Reviewed by: jhibbits, luporl > Sponsored by: Eldorado Research Institute (eldorado.org.br) > Differential Revision: https://reviews.freebsd.org/D27201 No regression for full ATF on both real and emulated FPU. XXX Import some tests from FreeBSD's lib/msun/tests.
1.6	30-Oct-2019	christos	do the ignore builtin dance for gcc-8
1.5	19-Apr-2018	christos	branches: 1.5.2; s/static inline/static __inline/g for consistency.
1.4	18-Sep-2017	phx	branches: 1.4.2; 1.4.4; Fixed feholdexcept() by copying the actual contents of FPSCR to the fenv_t instead of a double precision floating point representation of it.
1.3	22-Mar-2017	chs	branches: 1.3.6; provide a common softfloat fenv implemenation and use it for softfloat builds. restore ABI compatibility with previous releases for ieeefp.h on sh3. add namespace.h protection for all the fenv interfaces. use MKSOFTFLOAT on sh3 instead of assuming softfloat. standardize on comparing MKSOFTFLOAT with "no". remove the arm-specific softfloat fenv code (which also had several bugs). fix logic errors in the arm hardfloat feraiseexcept() and feupdateenv().
1.2	27-Feb-2017	chs	update the FE0/FE1 MSR bits as needed when changing the exception mask.
1.1	20-Dec-2015	christos	branches: 1.1.2; 1.1.4; 1.1.6; Add fenv.h for powerpc (from FreeBSD)
1.1.6.1	21-Apr-2017	bouyer	Sync with HEAD
1.1.4.2	26-Apr-2017	pgoyette	Sync with HEAD
1.1.4.1	20-Mar-2017	pgoyette	Sync with HEAD
1.1.2.3	28-Aug-2017	skrll	Sync with HEAD
1.1.2.2	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.1.2.1	20-Dec-2015	skrll	file fenv.h was added on branch nick-nhusb on 2015-12-27 12:09:40 +0000
1.3.6.1	23-Sep-2017	snj	Pull up following revision(s) (requested by phx in ticket #291): sys/arch/powerpc/include/fenv.h: revision 1.4 Fixed feholdexcept() by copying the actual contents of FPSCR to the fenv_t instead of a double precision floating point representation of it.
1.4.4.1	22-Apr-2018	pgoyette	Sync with HEAD
1.4.2.2	03-Dec-2017	jdolecek	update from HEAD
1.4.2.1	18-Sep-2017	jdolecek	file fenv.h was added on branch tls-maxphys on 2017-12-03 11:36:37 +0000
1.5.2.1	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.7.10.1	02-Aug-2025	perseant	Sync with HEAD
1.6	12-May-2003	kleink	Rename <sys/float_ieee.h> to <sys/float_ieee754.h>, following libc's convention for these.
1.5	19-Apr-2003	christos	PR/3012: Greg A. Woods: Write all float.h files [except the vax of course] in terms of float_ieee.h
1.4	13-Jun-2001	simonb	branches: 1.4.8; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.3	18-Feb-1998	mycroft	branches: 1.3.26; Minor changes to make all the float.h files match.
1.2	03-Feb-1998	mycroft	Prototype __flt_rounds() consistently.
1.1	30-Sep-1996	ws	branches: 1.1.14; PowerPC port
1.1.14.1	08-May-1998	mycroft	Sync with trunk, per request of mycroft.
1.3.26.1	21-Jun-2001	nathanw	Catch up to -current.
1.4.8.2	13-Jun-2001	simonb	Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.4.8.1	13-Jun-2001	simonb	file float.h was added on branch nathanw_sa on 2001-06-13 06:01:49 +0000
1.25	15-Jul-2020	rin	Expose fpu_get_fault_code() even if !PPC_HAVE_FPU, and adjust it to systems without FPU.
1.24	06-Jul-2020	rin	Drop unused opt_multiprocessor.h includes.
1.23	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.22	19-Apr-2018	christos	s/static inline/static __inline/g for consistency.
1.21	16-Mar-2017	chs	branches: 1.21.12; allow pcu_save() and pcu_discard() to be called on other threads, ptrace needs to use it that way.
1.20	22-Aug-2013	drochner	branches: 1.20.6; 1.20.10; 1.20.14; -extend the pcu(9) API by a function which saves all context on the current CPU, and use it if a CPU is taken offline -add a bool argument to pcu_discard which tells whether the internal "LWP has used the coprocessor" flag should be set or reset. The flag is reported by pcu_used_p(). If set, future accesses should use the state stored in the PCB. If reset, it should be reset to default. The former case is useful for setmcontext(). With that, it should not be necessary anymore to manage the "FPU used" state by an additional MD variable. approved by matt
1.19	19-May-2011	kiyohara	branches: 1.19.4; 1.19.14; 1.19.18; Remove unnecessary Tab.
1.18	02-May-2011	matt	Move powerpc to use pcu to manage FPU/AltiVec/SPE.
1.17	18-Jan-2011	matt	Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.16	17-Oct-2007	garbled	branches: 1.16.42; 1.16.46; 1.16.48; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.15	05-Aug-2006	sanjayl	branches: 1.15.14; 1.15.22; 1.15.32; 1.15.34; 1.15.36; 1.15.38; 1st cut of Powermac G5 support (uses bridge mode).
1.14	11-Dec-2005	christos	branches: 1.14.4; 1.14.8; merge ktrace-lwp.
1.13	16-Apr-2004	matt	branches: 1.13.12; Add a SAVE/DISCARD flag to save_{fpu,vec}_lwp. Use it appropriately. Nuke struct fpu and use struct fpreg instead (except for the names, they were identical). On MP machines, this will avoid an unneeded IPI to save the register contents that are about to discarded.
1.12	04-Apr-2004	matt	Add int get_fpu_fault_code(void).
1.11	23-Jun-2003	martin	branches: 1.11.2; Make sure to include opt_foo.h if a defflag option FOO is used.
1.10	03-Feb-2003	matt	Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.9	18-Jan-2003	thorpej	Merge the nathanw_sa branch.
1.8	03-Nov-2002	matt	Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.7	28-Jul-2002	chs	restructure the FPU and AltiVEC code so that it works for MP.
1.6	19-May-2002	jdolecek	make usable in LKM context (use #if defined(_KERNEL_OPT))
1.5	05-Dec-2001	chs	branches: 1.5.8; fix macppc MULTIPROCESSOR compilation.
1.4	13-Jun-2001	simonb	branches: 1.4.2; 1.4.8; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.3	04-Feb-2001	briggs	branches: 1.3.2; Build with -Wall -Wetc.
1.2	07-Dec-1999	danw	Fix "FPCSR" to "FPSCR". ("Floating Point Status and Control Register")
1.1	30-Sep-1996	ws	branches: 1.1.28; 1.1.34; PowerPC port
1.1.34.1	27-Dec-1999	wrstuden	Pull up to last week's -current.
1.1.28.2	11-Feb-2001	bouyer	Sync with HEAD.
1.1.28.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.3.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.4.8.7	11-Nov-2002	nathanw	Catch up to -current
1.4.8.6	01-Aug-2002	nathanw	LWPify.
1.4.8.5	01-Aug-2002	nathanw	Catch up to -current.
1.4.8.4	20-Jun-2002	nathanw	Catch up to -current.
1.4.8.3	08-Jan-2002	nathanw	Catch up to -current.
1.4.8.2	05-Nov-2001	briggs	Initial SA support for ppc. Test-booted on sandpoint, macppc, & walnut. mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein <kleink@netbsd.org>.
1.4.8.1	13-Jun-2001	briggs	file fpu.h was added on branch nathanw_sa on 2001-11-05 19:46:16 +0000
1.4.2.3	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.4.2.2	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.4.2.1	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.5.8.2	31-Aug-2002	gehenna	catch up with -current.
1.5.8.1	30-May-2002	gehenna	Catch up with -current.
1.11.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.11.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.11.2.1	03-Aug-2004	skrll	Sync with HEAD
1.13.12.2	27-Oct-2007	yamt	sync with head.
1.13.12.1	30-Dec-2006	yamt	sync with head.
1.14.8.1	11-Aug-2006	yamt	sync with head
1.14.4.1	09-Sep-2006	rpaulo	sync with head
1.15.38.1	25-Oct-2007	bouyer	Sync with HEAD.
1.15.36.1	18-Oct-2007	yamt	sync with head.
1.15.34.1	06-Nov-2007	matt	sync with HEAD
1.15.32.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.15.22.1	11-Oct-2007	garbled	Move a bunch of the macppc SMP code out of macppc, and down into the generic OEA code. Add a set of md callbacks into these shared routines, that any oeappc SMP machine needs to provide. This allows for generally shared SMP startup code, but still allows for machine-specific differences in the setup and kicking of the new CPU. Convert macppc to this new layout. Tested by Macallan. Add an initial attempt at SMP to prep. Tested on UP machine only, untested on SMP yet.
1.15.14.1	23-Oct-2007	ad	Sync with head.
1.16.48.1	06-Jun-2011	jruoho	Sync with HEAD.
1.16.46.1	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.16.42.2	31-May-2011	rmind	sync with head
1.16.42.1	05-Mar-2011	rmind	sync with head
1.19.18.1	28-Aug-2013	rmind	sync with head
1.19.14.2	03-Dec-2017	jdolecek	update from HEAD
1.19.14.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.19.4.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.20.14.1	21-Apr-2017	bouyer	Sync with HEAD
1.20.10.1	20-Mar-2017	pgoyette	Sync with HEAD
1.20.6.1	28-Aug-2017	skrll	Sync with HEAD
1.21.12.1	22-Apr-2018	pgoyette	Sync with HEAD
1.29	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.28	06-Jul-2020	rin	LKM was gone. _KERNEL is always defined for module.
1.27	24-Jan-2016	christos	expose __register32_t for frame.h
1.26	28-Feb-2014	matt	branches: 1.26.6; Add trapframe32 for COMPAT_NETBSD32
1.25	01-Aug-2012	matt	branches: 1.25.2; 1.25.4; Fix a problem where the kernel could randomly reset due to a watchdog event. When an exception happens, the srr0 (exception PC) was being saved in the normal location of the current callframe. This was fine except when the routine was in its prologue after it had saved LR but had not yet updated the stack pointer or when the routine was in its epilogue after it has restored the stack pointer but not yet loaded the LR. In either case this would cause the LR to be corrupted (either running the routine forever or by branching to itself forever). Now we save and restore the contents of that memory location so the corruption can't happen.
1.24	19-Feb-2012	rmind	Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3! Approved by core@.
1.23	20-Jun-2011	matt	branches: 1.23.2; 1.23.6; 1.23.8; Pad out trapframe for OEA so that trapframe has identical sizes for all PPC variants.
1.22	18-Jan-2011	matt	branches: 1.22.4; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.21	27-Nov-2009	rmind	branches: 1.21.4; 1.21.6; - Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr. - Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb(). - Amend assembly in ports where it accesses PCB via struct user. - Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
1.20	16-Oct-2008	wrstuden	branches: 1.20.16; Bring back saframe. Noted by Robert Swindells.
1.19	09-Feb-2007	ad	branches: 1.19.44; 1.19.48; 1.19.54; Merge newlock2 to head.
1.18	11-Dec-2005	christos	branches: 1.18.20; merge ktrace-lwp.
1.17	27-Aug-2003	matt	branches: 1.17.16; Move SFRAMELEN to frame.h and use it in vm_machdep.c. In setfunc, setup callframe linkages correctly. Restore use of ldptr to locore_subr.S [pthreads and gdb no longer crash/hang the system]
1.16	12-Aug-2003	matt	Cleanup/rework cpu_switch*, switch_exit, Idle routine. Remove pcb_psl since it was write-only. When setting up a process, make sure the fake callframes are properly linked together. Only lower SPL when in Idle loop. Raise spl to previous level (which would be IPL_SCHED) when exiting Idle loop. Never lower SPL anyplace else.
1.15	31-Jul-2003	matt	Change switchframe to use register_t (anything that uses stmX/lmX needs to be defined as register_t).
1.14	03-Feb-2003	matt	branches: 1.14.2; Don't use trapframe in sigcontext. Instead define a new structure utrapframe that fixed in size (and the same size as the trapframe in NetBSD 1.5). This preserves binary compatibility for those programs that dealt looked at sigcontexts.
1.13	02-Feb-2003	matt	Perform a rototill of the powerpc code. Mandate use of SPRG0 to store a pointer to current cpu's cpu_info structure. Use cpu_info for intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK to std.<platform>. Change faultbuf to a struct instead of an array. On MPC6XX cpus, stop using the vector page for temporary space and use reserved space in cpu_info.
1.12	22-Jan-2003	kleink	MPC601 support bits: * install 601-specific DSI and RUNMODETRC trap handlers * save/restore MQ in trapframe, add MQ hooks to DDB * extend battable to 512 entries to hold the 601's 8M translations * instead of adding I/O to BAT starvation, set up segment registers for Memory-Forced I/O Controller Interface Access * sync after tlbie
1.11	19-Jan-2003	matt	Use CALLFRAMELEN instead of 16.
1.10	19-Jan-2003	matt	Add trapframe32 (for compat_netbsd32). Add CALLFRAMELEN. (so we can remove many of the hard coded "16" or "15" in the powerpc code).
1.9	18-Jan-2003	thorpej	Merge the nathanw_sa branch.
1.8	03-Nov-2002	matt	Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.7	24-Jul-2002	chs	rename the intr_depth field of struct intrframe to avoid a name conflict in MULTIPROCESSOR builds.
1.6	18-Jul-2002	matt	Make sure that pmap_zero_page and pmap_copy_page don't make calls or reference while relocation is disabled since the stack will be inaccessible. Add support for using AltiVec in pmap_zero_page and pmap_copy_page on AltiVec capable processors.
1.5	05-Jul-2002	matt	Peform a rototill over the powerpc-based ports. Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT initialization code. Add user Altivec support. Fix calls to OF_call_method in macppc/macppc/machdep.c. Use ci_fpuproc in cpu_info instead of separate fpuproc. Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
1.4	21-Apr-2002	kleink	branches: 1.4.2; Convert the spill stack frame to use symbolic offset names; inspired by a conversation with Matt Thomas.
1.3	18-Apr-2002	matt	Use a common genassym.cf for all the PPC_MPC6XX ports. Add a makeoptions to std.foo to indicate the directory to get genassym.cf from. Add an intrframe to <powerpc/frame.h> and make trap_subr.S use symbolic offsets into it.
1.2	10-Jan-1999	tsubai	branches: 1.2.22; 1.2.26; Fix void * arithmetic.
1.1	30-Sep-1996	ws	PowerPC port
1.2.26.6	11-Nov-2002	nathanw	Catch up to -current
1.2.26.5	01-Aug-2002	nathanw	Catch up to -current.
1.2.26.4	03-Jul-2002	nathanw	Whitespace.
1.2.26.3	20-Jun-2002	nathanw	Catch up to -current.
1.2.26.2	13-Nov-2001	briggs	Improve upcall to better work with libpthread.
1.2.26.1	05-Nov-2001	briggs	Initial SA support for ppc. Test-booted on sandpoint, macppc, & walnut. mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein <kleink@netbsd.org>.
1.2.22.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.2.22.1	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.4.2.3	31-Aug-2002	gehenna	catch up with -current.
1.4.2.2	21-Jul-2002	gehenna	catch up with -current.
1.4.2.1	16-Jul-2002	gehenna	catch up with -current.
1.14.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.14.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.14.2.1	03-Aug-2004	skrll	Sync with HEAD
1.17.16.1	26-Feb-2007	yamt	sync with head.
1.18.20.1	01-Feb-2007	ad	Header file cleanup.
1.19.54.1	19-Oct-2008	haad	Sync with HEAD.
1.19.48.2	11-Mar-2010	yamt	sync with head
1.19.48.1	04-May-2009	yamt	sync with head.
1.19.44.1	17-Jan-2009	mjf	Sync with HEAD.
1.20.16.2	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.20.16.1	07-Jan-2011	matt	intrframe is dead. Just use a partially filled trapframe. Add a ktrapframe which include the cf_sp/cf_lr of the callframe in addition to the trapframe. This allows the FRAME_XX+8 to just be FRAME_XX. Cleanup and simplify.
1.21.6.1	06-Jun-2011	jruoho	Sync with HEAD.
1.21.4.1	05-Mar-2011	rmind	sync with head
1.22.4.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.23.8.1	09-Aug-2012	jdc	Pull up revisions: src/sys/arch/powerpc/booke/genassym.cf revision 1.9 src/sys/arch/powerpc/booke/trap_subr.S revision 1.8 src/sys/arch/powerpc/include/frame.h revision 1.25 (requested by matt in ticket #461). Fix a problem where the kernel could randomly reset due to a watchdog event. When an exception happens, the srr0 (exception PC) was being saved in the normal location of the current callframe. This was fine except when the routine was in its prologue after it had saved LR but had not yet updated the stack pointer or when the routine was in its epilogue after it has restored the stack pointer but not yet loaded the LR. In either case this would cause the LR to be corrupted (either running the routine forever or by branching to itself forever). Now we save and restore the contents of that memory location so the corruption can't happen.
1.23.6.1	24-Feb-2012	mrg	sync to -current.
1.23.2.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.23.2.2	30-Oct-2012	yamt	sync with head
1.23.2.1	17-Apr-2012	yamt	sync with head
1.25.4.1	18-May-2014	rmind	sync with head
1.25.2.2	03-Dec-2017	jdolecek	update from HEAD
1.25.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.26.6.1	19-Mar-2016	skrll	Sync with HEAD
1.2	06-Jun-2001	matt	Introduce a new & faster pmap for the MPC6xx (60x, 7xx, 7xxx) PPC CPUs. Move MPC6xx dependent header files to powerpc/include/mpc6xx/
1.1	09-Nov-2000	tsubai	branches: 1.1.2; powerpc HID registers definitions (only HID0 for now).
1.1.2.2	22-Nov-2000	bouyer	Sync with HEAD.
1.1.2.1	09-Nov-2000	bouyer	file hid.h was added on branch thorpej_scsipi on 2000-11-22 16:01:27 +0000
1.2	06-Jun-2001	matt	Introduce a new & faster pmap for the MPC6xx (60x, 7xx, 7xxx) PPC CPUs. Move MPC6xx dependent header files to powerpc/include/mpc6xx/
1.1	18-Dec-1999	thorpej	branches: 1.1.2; 1.1.8; Hardware Implementation Dependent registers for the PowerPC 601.
1.1.8.2	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.1.8.1	18-Dec-1999	bouyer	file hid_601.h was added on branch thorpej_scsipi on 2000-11-20 20:31:09 +0000
1.1.2.1	27-Dec-1999	wrstuden	Pull up to last week's -current.
1.7	23-Jan-2024	rin	powerpc/ieee.h: Protect from multiple includes Fix build failure triggered by import of libm long-double functions.
1.6	22-Oct-2014	joerg	Support copysignl on PowerPC.
1.5	11-Dec-2005	christos	branches: 1.5.122; 1.5.140; merge ktrace-lwp.
1.4	15-Apr-2005	kleink	Push back the descriptions of NaN formats, and descriptions of the distinction between signalling NaNs and quiet NaNs back into the machine-dependent headers; treat the implementation of __nanf in the same spirit. IEEE 754 leaves the distinction between signalling NaNs and quiet NANs to the implementation, and unlike our headers used to suggest they're not identical in the interpretation of the fraction's MSb; in due course, make those of hppa, mips, sh3, and sh5 reflect reality.
1.3	26-Oct-2003	kleink	branches: 1.3.8; 1.3.14; Use <sys/ieee754.h> where applicable.
1.2	07-Aug-2003	agc	Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.1	30-Sep-1996	ws	branches: 1.1.62; PowerPC port
1.1.62.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.1.62.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.1.62.2	18-Sep-2004	skrll	Sync with HEAD.
1.1.62.1	03-Aug-2004	skrll	Sync with HEAD
1.3.14.1	19-Apr-2005	tron	Pull up revision 1.4 (requested by kleink in ticket #163): Push back the descriptions of NaN formats, and descriptions of the distinction between signalling NaNs and quiet NaNs back into the machine-dependent headers; treat the implementation of __nanf in the same spirit. IEEE 754 leaves the distinction between signalling NaNs and quiet NANs to the implementation, and unlike our headers used to suggest they're not identical in the interpretation of the fraction's MSb; in due course, make those of hppa, mips, sh3, and sh5 reflect reality.
1.3.8.1	29-Apr-2005	kent	sync with -current
1.5.140.1	25-May-2015	msaitoh	Pull up following revision(s) (requested by joerg in ticket #790): sys/arch/powerpc/include/math.h: revision 1.5 lib/libm/src/namespace.h: revision 1.13 lib/libm/arch/vax/n_support.S: revision 1.10 lib/libm/src/s_copysignl.c: revision 1.3 lib/libm/src/s_copysignl.c: revision 1.4 lib/libm/src/s_copysignl.c: revision 1.5 sys/arch/powerpc/include/ieee.h: revision 1.6 lib/libm/src/s_copysign.c: revision 1.12 lib/libm/src/s_copysign.c: revision 1.13 - Support copysignl on PowerPC. - Define copysignl on !long double platforms. Be consistent in the use of weak aliases. - copysignl is also needed for PowerPC's double-double format, so special case that. Functional support was added earlier, but not enabled.
1.5.122.1	03-Dec-2017	jdolecek	update from HEAD
1.7	22-Mar-2017	chs	provide a common softfloat fenv implemenation and use it for softfloat builds. restore ABI compatibility with previous releases for ieeefp.h on sh3. add namespace.h protection for all the fenv interfaces. use MKSOFTFLOAT on sh3 instead of assuming softfloat. standardize on comparing MKSOFTFLOAT with "no". remove the arm-specific softfloat fenv code (which also had several bugs). fix logic errors in the arm hardfloat feraiseexcept() and feupdateenv().
1.6	27-Feb-2017	chs	the FP_* exception constants need to be different from the new FE_* constants to preserve the ABI, so shift them as needed when using them.
1.5	25-Dec-2015	christos	branches: 1.5.2; 1.5.4; move fenv inside ifdef
1.4	22-Dec-2015	christos	remove dup definitions from fenv.h
1.3	05-Aug-2008	matt	branches: 1.3.38; 1.3.58; Update <machine/ieeefp.h> to use the C99 FE_* definitions instead of the NetBSD defined ones. Redefine the NetBSD ones in terms of the C99 ones. Step 1 to having <fenv.h>
1.2	07-Jul-1999	danw	branches: 1.2.138; 1.2.142; 1.2.144; 1.2.148; reorder the fp_rnd constants to match the values used by the powerpc fpu
1.1	16-Apr-1997	thorpej	branches: 1.1.18; Definitions for IEEE floating point for NetBSD/powerpc.
1.1.18.1	02-Aug-1999	thorpej	Update from trunk.
1.2.148.1	19-Oct-2008	haad	Sync with HEAD.
1.2.144.1	18-Sep-2008	wrstuden	Sync with wrstuden-revivesa-base-2.
1.2.142.1	04-May-2009	yamt	sync with head.
1.2.138.1	28-Sep-2008	mjf	Sync with HEAD.
1.3.58.2	28-Aug-2017	skrll	Sync with HEAD
1.3.58.1	27-Dec-2015	skrll	Sync with HEAD (as of 26th Dec)
1.3.38.1	03-Dec-2017	jdolecek	update from HEAD
1.5.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.5.2.2	26-Apr-2017	pgoyette	Sync with HEAD
1.5.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.12	30-Aug-2022	rin	Move FTYPE_* definitions from instr.h to fpu_emu.h. They are not defined by architecture, and used only for FPU emulation.
1.11	30-May-2022	rin	Add routines to fix unaligned memory access for userland process. Mainly intended for 403, which cannot handle unaligned memory access at all (not only ones across page boundaries like 601). For more details, see comments in fix_unaligned.c.
1.10	29-May-2022	rin	Fix insn field definitions for MD and MDS formats. No one uses these yet.
1.9	15-Jul-2020	rin	Factor out emulation code for m[ft]msr in user mode from oea, and adjust it for systems without FPU. Now, it can be used from booke and ibm4xx in order to support fenv(3).
1.8	27-Feb-2017	chs	have fpsetmask() change the FE0/FE1 MSR bits to precise mode if any FP exceptions are enabled. fix the kernel emulation of mfmsr and mtmsr to use the correct opcodes for these instructions. ignore PSL_FE (the FP enable bit) in the MSR that a user program tries to set, since it will naturally be set for FP-using processes but we can't let the user process manage that bit.
1.7	01-Aug-2014	matt	branches: 1.7.4; 1.7.8; 1.7.12; Add OPC31_OR
1.6	12-Feb-2011	matt	branches: 1.6.14; 1.6.28; When an OEA kernel is configured for multiple MMU types, use the new powerpc fixup mechanism to bind the kernel to a particular MMU. This avoids an indirect call for every pmap call.
1.5	18-Jan-2011	matt	branches: 1.5.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.4	11-Dec-2005	christos	branches: 1.4.100; 1.4.104; 1.4.106; merge ktrace-lwp.
1.3	27-Oct-2003	simonb	Remove (the now non-compiling) support for 128bit FP emulation, which isn't needed for PowerPC anyway.
1.2	07-Aug-2003	agc	Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.1	13-Jun-2001	simonb	branches: 1.1.2; 1.1.10; 1.1.26; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.26.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.1.26.2	18-Sep-2004	skrll	Sync with HEAD.
1.1.26.1	03-Aug-2004	skrll	Sync with HEAD
1.1.10.2	13-Jun-2001	simonb	Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.10.1	13-Jun-2001	simonb	file instr.h was added on branch nathanw_sa on 2001-06-13 06:01:49 +0000
1.1.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.4.106.1	06-Jun-2011	jruoho	Sync with HEAD.
1.4.104.4	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.4.104.3	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.4.104.2	07-Jan-2011	matt	Move OPC_MFMSR definitions from trap.c Add OPC_LWSYNC for booke.
1.4.104.1	07-Jan-2011	matt	Add fixup definitions.
1.4.100.1	05-Mar-2011	rmind	sync with head
1.5.2.1	17-Feb-2011	bouyer	Sync with HEAD
1.6.28.1	10-Aug-2014	tls	Rebase.
1.6.14.2	03-Dec-2017	jdolecek	update from HEAD
1.6.14.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.7.12.1	21-Apr-2017	bouyer	Sync with HEAD
1.7.8.1	20-Mar-2017	pgoyette	Sync with HEAD
1.7.4.1	28-Aug-2017	skrll	Sync with HEAD
1.5	13-Aug-2014	matt	Include <sys/common_int_const.h> if __INTMAX_C_SUFFIX__ is defined.
1.4	29-May-2010	tnozaki	branches: 1.4.18; fix wrong integer promotion rule(removed U suffix from UINT{8,16}_C). see ISO/IEC 9899:1999 7.18.4.3.
1.3	28-Apr-2008	martin	branches: 1.3.20; 1.3.22; Remove clause 3 and 4 from TNF licenses
1.2	03-Nov-2002	matt	branches: 1.2.108; 1.2.110; 1.2.112; Add LP64 bits (copied from MIPS).
1.1	14-Apr-2001	kleink	branches: 1.1.2; 1.1.4; 1.1.12; Add definitions of C99 integer constant macros.
1.1.12.2	11-Nov-2002	nathanw	Catch up to -current
1.1.12.1	14-Apr-2001	nathanw	file int_const.h was added on branch nathanw_sa on 2002-11-11 22:02:48 +0000
1.1.4.1	21-Jun-2001	nathanw	Catch up to -current.
1.1.2.2	21-Apr-2001	bouyer	Sync with HEAD
1.1.2.1	14-Apr-2001	bouyer	file int_const.h was added on branch thorpej_scsipi on 2001-04-21 17:54:31 +0000
1.2.112.2	11-Aug-2010	yamt	sync with head.
1.2.112.1	16-May-2008	yamt	sync with head.
1.2.110.1	18-May-2008	yamt	sync with head.
1.2.108.1	02-Jun-2008	mjf	Sync with HEAD.
1.3.22.1	30-May-2010	rmind	sync with head
1.3.20.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.4.18.1	03-Dec-2017	jdolecek	update from HEAD
1.7	05-Mar-2018	christos	int64 is long for _LP64
1.6	01-Apr-2015	matt	forgot to commit this when I updated netbsd64 in gcc. Remove LP64 specific change and use the same types when possible for IPL32 and LP64.
1.5	13-Aug-2014	matt	branches: 1.5.2; include <sys/common_int_fmtio.h> if __INTPTR_FMTd__ is defined
1.4	28-Apr-2008	martin	branches: 1.4.44; Remove clause 3 and 4 from TNF licenses
1.3	03-Nov-2002	matt	branches: 1.3.108; 1.3.110; 1.3.112; Add LP64 bits (copied from MIPS).
1.2	26-Apr-2001	kleink	branches: 1.2.2; 1.2.10; Add definitions for C99 fastest minimum-width integer types.
1.1	15-Apr-2001	kleink	branches: 1.1.2; Add definitions of C99 integer format conversion macros. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.1.2.2	21-Apr-2001	bouyer	Sync with HEAD
1.1.2.1	15-Apr-2001	bouyer	file int_fmtio.h was added on branch thorpej_scsipi on 2001-04-21 17:54:31 +0000
1.2.10.2	11-Nov-2002	nathanw	Catch up to -current
1.2.10.1	26-Apr-2001	nathanw	file int_fmtio.h was added on branch nathanw_sa on 2002-11-11 22:02:48 +0000
1.2.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.3.112.1	16-May-2008	yamt	sync with head.
1.3.110.1	18-May-2008	yamt	sync with head.
1.3.108.1	02-Jun-2008	mjf	Sync with HEAD.
1.4.44.1	03-Dec-2017	jdolecek	update from HEAD
1.5.2.1	06-Apr-2015	skrll	Sync with HEAD
1.9	13-Aug-2014	matt	Include <sys/common_init_limits.h> if __SIG_ATOMIC_MAX__ is defined.
1.8	28-Apr-2008	martin	branches: 1.8.44; Remove clause 3 and 4 from TNF licenses
1.7	17-Oct-2007	garbled	branches: 1.7.16; 1.7.18; 1.7.20; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.6	31-Aug-2007	drochner	Fix definitions of UCHAR_MAX/USHRT_MAX and related types. C99 requires that these definitions promote to (signed/unsigned) integer the same way as the types the definition is for. And since unsigned char/short fit into an "int" on all our archs and thus promote to signed int, the definitions must not be unsigned. Fixes PR lib/31306 by Neil Booth.
1.5	11-Dec-2005	christos	branches: 1.5.30; 1.5.38; 1.5.44; 1.5.48; 1.5.50; merge ktrace-lwp.
1.4	08-May-2004	kleink	branches: 1.4.12; Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
1.3	03-Nov-2002	matt	branches: 1.3.6; Add LP64 limits.
1.2	26-Apr-2001	kleink	branches: 1.2.2; 1.2.10; Add definitions for C99 fastest minimum-width integer types.
1.1	15-Apr-2001	kleink	branches: 1.1.2; Add definitions of C99 specified-width integer type limits. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.1.2.2	21-Apr-2001	bouyer	Sync with HEAD
1.1.2.1	15-Apr-2001	bouyer	file int_limits.h was added on branch thorpej_scsipi on 2001-04-21 17:54:31 +0000
1.2.10.2	11-Nov-2002	nathanw	Catch up to -current
1.2.10.1	26-Apr-2001	nathanw	file int_limits.h was added on branch nathanw_sa on 2002-11-11 22:02:49 +0000
1.2.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.3.6.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.3.6.2	18-Sep-2004	skrll	Sync with HEAD.
1.3.6.1	03-Aug-2004	skrll	Sync with HEAD
1.4.12.1	03-Sep-2007	yamt	sync with head.
1.5.50.1	06-Nov-2007	matt	sync with HEAD
1.5.48.1	03-Sep-2007	jmcneill	Sync with HEAD.
1.5.44.1	03-Sep-2007	skrll	Sync with HEAD.
1.5.38.1	03-Oct-2007	garbled	Sync with HEAD
1.5.30.1	09-Oct-2007	ad	Sync with head.
1.7.20.1	16-May-2008	yamt	sync with head.
1.7.18.1	18-May-2008	yamt	sync with head.
1.7.16.1	02-Jun-2008	mjf	Sync with HEAD.
1.8.44.1	03-Dec-2017	jdolecek	update from HEAD
1.6	13-Aug-2014	matt	include <sys/common_int_mwgwtypes.h> if __UINT_FAST64_TYPE__ is defined.
1.5	28-Apr-2008	martin	branches: 1.5.44; Remove clause 3 and 4 from TNF licenses
1.4	24-Dec-2005	perry	branches: 1.4.74; 1.4.76; 1.4.78; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.3	03-Nov-2002	matt	branches: 1.3.22; Add LP64 bits (copied from MIPS).
1.2	26-Apr-2001	kleink	branches: 1.2.2; 1.2.10; Add definitions for C99 fastest minimum-width integer types.
1.1	14-Apr-2001	kleink	branches: 1.1.2; Add definitions of C99 minimum-width and greatest-width integer types. XXX Fastest minimum-width integer types haven't been decided upon yet.
1.1.2.2	21-Apr-2001	bouyer	Sync with HEAD
1.1.2.1	14-Apr-2001	bouyer	file int_mwgwtypes.h was added on branch thorpej_scsipi on 2001-04-21 17:54:31 +0000
1.2.10.2	11-Nov-2002	nathanw	Catch up to -current
1.2.10.1	26-Apr-2001	nathanw	file int_mwgwtypes.h was added on branch nathanw_sa on 2002-11-11 22:02:49 +0000
1.2.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.3.22.1	21-Jun-2006	yamt	sync with head.
1.4.78.1	16-May-2008	yamt	sync with head.
1.4.76.1	18-May-2008	yamt	sync with head.
1.4.74.1	02-Jun-2008	mjf	Sync with HEAD.
1.5.44.1	03-Dec-2017	jdolecek	update from HEAD
1.11	13-Aug-2014	matt	Include <sys/common_int_types.h> if __UINTPTR_TYPE__ is defined.
1.10	24-Dec-2005	perry	branches: 1.10.122; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.9	11-Dec-2005	christos	merge ktrace-lwp.
1.8	25-May-2005	kleink	branches: 1.8.2; Include <sys/cdefs.h> for __signed; related to lib/30072.
1.7	07-Aug-2003	agc	branches: 1.7.6; 1.7.14; Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.6	03-Nov-2002	matt	branches: 1.6.6; Add LP64 bits (copied from MIPS).
1.5	28-Apr-2001	kleink	branches: 1.5.8; * Move definitions of exact-width integer types from <machine/types.h> to <sys/types.h> and <sys/stdint.h>. * Add a new C99 <stdint.h> header, which provides integer types of explicit width, related limits and integer constant macros. * Extend <inttypes.h> to provide <stdint.h> definitions and format macros for printf() and scanf(). * Add C99 strtoimax() and strtoumax() functions. * Use the latter within scanf(). * Add C99 %j, %t and %z printf()/scanf() conversions for intmax_t, pointer-type and size_t arguments.
1.4	12-Apr-2001	kleink	Replace the 'unsigned __COMPILER_INT64__' construct with a new name, __COMPILER_UINT64__, to be supplied - if such a case is made, it shouldn't be assumed that the unsigned type-specifier may be applied to it.
1.3	03-Jan-2001	takemura	branches: 1.3.2; replace 'long long' with int64_t to compile stand alone program with compiler other than GCC.
1.2	27-Jun-2000	kleink	branches: 1.2.2; Resolve some formatting nits; add __intptr_t and __uintptr_t.
1.1	26-Jun-2000	kleink	Add <machine/int_types.h>, which provides namespace-pure definitions of exact-width integer types.
1.2.2.4	21-Apr-2001	bouyer	Sync with HEAD
1.2.2.3	05-Jan-2001	bouyer	Sync with HEAD
1.2.2.2	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.2.2.1	27-Jun-2000	bouyer	file int_types.h was added on branch thorpej_scsipi on 2000-11-20 20:31:09 +0000
1.3.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.5.8.2	11-Nov-2002	nathanw	Catch up to -current
1.5.8.1	28-Apr-2001	nathanw	file int_types.h was added on branch nathanw_sa on 2002-11-11 22:02:50 +0000
1.6.6.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.6.6.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.6.6.2	18-Sep-2004	skrll	Sync with HEAD.
1.6.6.1	03-Aug-2004	skrll	Sync with HEAD
1.7.14.1	28-May-2005	tron	Pull up revision 1.8 (requested by klein in ticket #346): Include <sys/cdefs.h> for __signed; related to lib/30072.
1.7.6.1	29-May-2005	riz	Pull up revision 1.8 (requested by kleink in ticket #1555): Include <sys/cdefs.h> for __signed; related to lib/30072.
1.8.2.1	21-Jun-2006	yamt	sync with head.
1.10.122.1	03-Dec-2017	jdolecek	update from HEAD
1.19	11-Jul-2022	martin	PR 56922: disabel fast softints for powerpc for now.
1.18	02-Mar-2021	rin	Turn imask into static. XXX Other macro etc. in powerpc/intr.h should also be moved into powerpc/pic/intr.c, or protected by __INTR_PRIVATE.
1.17	16-Apr-2020	rin	branches: 1.17.2; Revert previous for now: http://mail-index.netbsd.org/source-changes/2020/04/16/msg116278.html The reasoning turned out to be wrong; __KERNEL_RCSID() in header files does not overwrite RCSID in main source files. The real problem is that it inserts its RCSID into every object files. However, it can be still useful even if heavily duplicated.
1.16	16-Apr-2020	rin	Stop using __KERNEL_RCSID() in header files; it confuses ident(1) by overwriting RCSID in main source files. XXX The first argument of __KERNEL_RCSID() is neglected for ELF. If we wish to have RCSID of header files in kernel binary, we need something like __FBSDID() macro in FreeBSD.
1.15	20-Feb-2020	rin	branches: 1.15.4; Fix !__HAVE_FAST_SOFTINTS build for debugging.
1.14	24-Oct-2019	macallan	branches: 1.14.2; bump NIRQ to 256 since we're going to use vectors above 128
1.13	19-Apr-2018	christos	branches: 1.13.2; 1.13.6; s/static inline/static __inline/g for consistency.
1.12	19-Oct-2016	nonaka	branches: 1.12.14; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
1.11	23-Aug-2013	matt	branches: 1.11.6; 1.11.10; Fix kern_softint.c errors (tested with WALNUT & EV64260)
1.10	14-Jan-2012	phx	branches: 1.10.6; 1.10.10; Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
1.9	20-Jun-2011	matt	branches: 1.9.2; 1.9.6; PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.8	17-Jun-2011	matt	intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
1.7	17-Jun-2011	matt	Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
1.6	16-Jun-2011	macallan	enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
1.5	25-Apr-2010	kiyohara	branches: 1.5.6; Fix forgot to commit. Support 64-bit imask for powerpc/pic.
1.4	29-Apr-2008	martin	branches: 1.4.20; 1.4.22; Convert to new 2 clause license
1.3	03-Dec-2007	ad	branches: 1.3.14; 1.3.16; 1.3.18; Interrupt handling changes, in discussion since February: - Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
1.2	17-Oct-2007	garbled	branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.1	04-May-2007	macallan	branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10; file intr.h was initially added on branch ppcoea-renovation.
1.1.10.1	25-Oct-2007	bouyer	Sync with HEAD.
1.1.8.1	18-Oct-2007	yamt	sync with head.
1.1.6.2	09-Dec-2007	jmcneill	Sync with HEAD.
1.1.6.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.1.2.3	10-May-2007	garbled	More cleanup: 1) Remove lcsplx, strayintr, and foosoft from all the converted ports. None of this stuff is needed anymore. 2) because lcsplx is just "return spllower", just call spllower from locore_subr.S instead. 3) Every port (except macppc) had a pretty similar cpu_configure(), so take the common parts out and make a genppc_cpu_configure() in an attempt to stop using imask[] outside of intr.c
1.1.2.2	08-May-2007	garbled	Make powerpc/intr.h more common than it previously was. Having done that, delete all the duplicate entries from the 4 ports that have converted to shared pic code. Also, commit a minor change to sandpoint that I forgot to commit earlier (delete an unused variable)
1.1.2.1	04-May-2007	macallan	move some common interrupt-related stuff here
1.2.8.3	09-Jan-2008	matt	sync with HEAD
1.2.8.2	06-Nov-2007	matt	sync with HEAD
1.2.8.1	17-Oct-2007	matt	file intr.h was added on branch matt-armv6 on 2007-11-06 23:20:34 +0000
1.2.6.1	08-Dec-2007	mjf	Sync with HEAD.
1.2.4.3	07-Dec-2007	yamt	sync with head
1.2.4.2	27-Oct-2007	yamt	sync with head.
1.2.4.1	17-Oct-2007	yamt	file intr.h was added on branch yamt-lazymbuf on 2007-10-27 11:27:45 +0000
1.2.2.3	03-Dec-2007	ad	Sync with HEAD.
1.2.2.2	23-Oct-2007	ad	Sync with head.
1.2.2.1	17-Oct-2007	ad	file intr.h was added on branch vmlocking on 2007-10-23 20:36:02 +0000
1.3.18.2	11-Aug-2010	yamt	sync with head.
1.3.18.1	16-May-2008	yamt	sync with head.
1.3.16.1	18-May-2008	yamt	sync with head.
1.3.14.1	02-Jun-2008	mjf	Sync with HEAD.
1.4.22.1	30-May-2010	rmind	sync with head
1.4.20.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.5.6.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.9.6.1	18-Feb-2012	mrg	merge to -current.
1.9.2.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.9.2.1	17-Apr-2012	yamt	sync with head
1.10.10.1	28-Aug-2013	rmind	sync with head
1.10.6.2	03-Dec-2017	jdolecek	update from HEAD
1.10.6.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.11.10.1	04-Nov-2016	pgoyette	Sync with HEAD
1.11.6.1	05-Dec-2016	skrll	Sync with HEAD
1.12.14.1	22-Apr-2018	pgoyette	Sync with HEAD
1.13.6.1	25-Feb-2020	martin	Pull up following revision(s) (requested by rin in ticket #729): sys/arch/powerpc/include/intr.h: revision 1.15 Fix !__HAVE_FAST_SOFTINTS build for debugging.
1.13.2.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.13.2.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.14.2.1	29-Feb-2020	ad	Sync with head.
1.15.4.1	20-Apr-2020	bouyer	Sync with HEAD
1.17.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.5	15-Jul-2018	maxv	Retire ipkdb entirely. The option was removed from the config files yesterday. ok kamil christos
1.4	16-Feb-2006	perry	branches: 1.4.158; 1.4.160; Change "inline" back to "__inline" in .h files -- C99 is still too new, and some apps compile things in C89 mode. C89 keywords stay. As per core@.
1.3	24-Dec-2005	perry	branches: 1.3.2; 1.3.4; 1.3.6; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.2	16-Apr-1997	thorpej	Update ipkdb's register handling, from Wolfgang Solfrank.
1.1	16-Oct-1996	ws	Rename recently checked in KGDB to IPKDB to resolve conflicts with older KGDB
1.3.6.1	22-Apr-2006	simonb	Sync with head.
1.3.4.1	09-Sep-2006	rpaulo	sync with head
1.3.2.1	18-Feb-2006	yamt	sync with head.
1.4.160.1	10-Jun-2019	christos	Sync with HEAD
1.4.158.1	28-Jul-2018	pgoyette	Sync with HEAD
1.2	28-May-1998	sakamoto	Rename NetBSD/powerpc to NetBSD/ofppc. New sys/arch/powerpc with PowerPC-generic stuff.
1.1	30-Sep-1996	ws	PowerPC port
1.9	27-Oct-2012	chs	split device_t/softc for all remaining drivers. replace "struct device *" with "device_t". use device_xname(), device_unit(), etc.
1.8	01-Jul-2011	dyoung	branches: 1.8.2; 1.8.12; #include <sys/bus.h> instead of <machine/bus.h>.
1.7	17-Jun-2011	matt	struct device * -> device_t struct cfdata * -> cfdata_t split device/softc (CFATTACH_DECL_NEW) use device_accessors and device_private constify
1.6	20-Aug-2009	dyoung	branches: 1.6.10; Declare genppc_isa_detach_hook().
1.5	19-Aug-2009	dyoung	Define genppc_isa_detach_hook() and isa_dmadestroy().
1.4	28-Apr-2008	martin	Remove clause 3 and 4 from TNF licenses
1.3	17-Oct-2007	garbled	branches: 1.3.16; 1.3.18; 1.3.20; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.2	11-Dec-2005	christos	branches: 1.2.30; 1.2.38; 1.2.48; 1.2.50; 1.2.52; 1.2.54; merge ktrace-lwp.
1.1	19-Oct-2003	matt	branches: 1.1.4; 1.1.18; Add powerpc-specific isa and isadma machdep code. (Merge common code from prep and sandpoint and ...)
1.1.18.1	27-Oct-2007	yamt	sync with head.
1.1.4.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.1.4.3	18-Sep-2004	skrll	Sync with HEAD.
1.1.4.2	03-Aug-2004	skrll	Sync with HEAD
1.1.4.1	19-Oct-2003	skrll	file isa_machdep.h was added on branch ktrace-lwp on 2004-08-03 10:39:29 +0000
1.2.54.1	25-Oct-2007	bouyer	Sync with HEAD.
1.2.52.1	18-Oct-2007	yamt	sync with head.
1.2.50.1	06-Nov-2007	matt	sync with HEAD
1.2.48.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.2.38.1	07-May-2007	garbled	Rewrite how shared isa is done slightly. This will allow the individual ports to override the shared functions if needed. Also, implement isa_intr_alloc, which needed to be done inside pic/intr.c because it needs access to structs which are static to the file.
1.2.30.1	23-Oct-2007	ad	Sync with head.
1.3.20.3	16-Sep-2009	yamt	sync with head
1.3.20.2	19-Aug-2009	yamt	sync with head.
1.3.20.1	16-May-2008	yamt	sync with head.
1.3.18.1	18-May-2008	yamt	sync with head.
1.3.16.1	02-Jun-2008	mjf	Sync with HEAD.
1.6.10.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.8.12.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.8.2.1	30-Oct-2012	yamt	sync with head
1.5	11-Dec-2005	christos	branches: 1.5.104; merge ktrace-lwp.
1.4	17-Feb-2005	briggs	Update to a kcore_hdr_t that is useful for OEA-style CPUs. Adding support for Book-E and other CPUs will require updating this structure appropriately. Contributed by Wasabi Systems, Inc.
1.3	03-Nov-2002	matt	branches: 1.3.6; 1.3.14; 1.3.16; Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.2	31-Aug-1998	tsubai	branches: 1.2.30; vm_offset_t --> [pv]addr_t
1.1	30-Sep-1996	ws	PowerPC port
1.2.30.1	11-Nov-2002	nathanw	Catch up to -current
1.3.16.1	19-Mar-2005	yamt	sync with head. xen and whitespace. xen part is not finished.
1.3.14.1	29-Apr-2005	kent	sync with -current
1.3.6.1	17-Feb-2005	skrll	Sync with HEAD.
1.5.104.1	26-Jul-2011	matt	Include the battable, not just the contents of the bat registers.
1.2	16-Oct-1996	ws	Rename recently checked in KGDB to IPKDB to resolve conflicts with older KGDB
1.1	30-Sep-1996	ws	PowerPC port
1.21	02-Apr-2024	christos	harmonize with the rest of MD limits files.
1.20	21-Jan-2019	dholland	Fix wrong scoping of {U,}LLONG_MAX. More cases, not just amd64. PR 53298 from Roberto E. Vargas Caballero.
1.19	21-Apr-2014	matt	branches: 1.19.26; 1.19.28; Since all our compilers support __DBL_* and __FLT_*, use them to define {DBL,FLT}_{DIG,MIN,MAX}
1.18	11-Apr-2013	christos	branches: 1.18.4; 1.18.8; add missing SSIZE_MIN
1.17	28-Mar-2012	christos	branches: 1.17.2; - Normalize inclusion protection (remove) - Move CHAR_{MIN,MAX} to a common file. - Fix broken comments
1.16	07-Jun-2010	tnozaki	branches: 1.16.8; 1.16.12; 1. MB_LEN_MAX switch MD to MI. 2. unfortunately hppa's MB_LEN_MAX is defined incorrectly 6 instead of 32 so we have to add more setlocale(3) __RENAME func, __setlocale50. 3. move setlocale1.c and setlocale32.c to lib/libc/compat/locale/* prepareing for next libc major crunk. 4. bump libc minor version.
1.15	17-Oct-2007	garbled	branches: 1.15.20; 1.15.40; 1.15.42; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.14	31-Aug-2007	drochner	Fix definitions of UCHAR_MAX/USHRT_MAX and related types. C99 requires that these definitions promote to (signed/unsigned) integer the same way as the types the definition is for. And since unsigned char/short fit into an "int" on all our archs and thus promote to signed int, the definitions must not be unsigned. Fixes PR lib/31306 by Neil Booth.
1.13	11-Dec-2005	christos	branches: 1.13.30; 1.13.38; 1.13.44; 1.13.48; 1.13.50; merge ktrace-lwp.
1.12	07-Aug-2003	agc	branches: 1.12.16; Move UCB-licensed code from 4-clause to 3-clause licence. Patches provided by Joel Baker in PR 22364, verified by myself.
1.11	28-Apr-2003	bjh21	branches: 1.11.2; Add a new feature-test macro, _NETBSD_SOURCE. If this is defined by the application, all NetBSD interfaces are made visible, even if some other feature-test macro (like _POSIX_C_SOURCE) is defined. <sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE, _POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve existing behaviour. This has two major advantages: + Programs that require non-POSIX facilities but define _POSIX_C_SOURCE can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS. + It makes most of the #ifs simpler, in that they're all now ORs of the various macros, rather than having checks for (!defined(_ANSI_SOURCE) \|\| !defined(_POSIX_C_SOURCE) \|\| !defined(_XOPEN_SOURCE)) all over the place. I've tried not to change the semantics of the headers in any case where _NETBSD_SOURCE wasn't defined, but there were some places where the current semantics were clearly mad, and retaining them was harder than correcting them. In particular, I've mostly normalised things so that _ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE, _XOPEN_SOURCE and _NETBSD_SOURCE in that order. Tested by building for vax, encouraged by thorpej, and uncontested in tech-userlevel for a week.
1.10	03-Nov-2002	matt	LP64 changes (copied from mips and changed CHAR_MIN/MAX to 0/0xffU).
1.9	03-Nov-2002	matt	Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.8	04-May-2001	simonb	branches: 1.8.8; Be consistent with limit constants: - use "U" suffix for unsigned constants - use "L" suffix for long constants - use "UL" suffix for unsigned long constants - use hexadecimal instead of decimal Fixes build problems with vi (now that warnings/errors are enabled) on mips, powerpc and arm platforms.
1.7	08-Aug-2000	tshiozak	branches: 1.7.2; Preparation for the future introduction of multibyte locale. - MB_LEN_MAX is increased to 32. - To ensure binary compatibility for old executables under multibyte locale, versioned setlocale is added. - __mb_len_cur definision is added in setlocale.c and enable it in stdlib.h . It is also important for multibyte locale stuffs, but I just forgot.
1.6	07-Mar-2000	kleink	branches: 1.6.2; 1.6.4; Define ISO C99 (unsigned) long long (min, max) symbols.
1.5	16-Nov-1998	mycroft	branches: 1.5.10; Add {LONG,WORD}_BIT and {DBL,FLT}_{DIG,MAX,MIN}.
1.4	06-Aug-1998	kleink	_POSIX_SOURCE -> _POSIX_C_SOURCE
1.3	28-Jul-1998	thorpej	Provide SSIZE_MAX.
1.2	09-Jan-1998	perry	multiple include protect machine/limits.h, fixes pr 4473 (from Mika Nystrom)
1.1	30-Sep-1996	ws	PowerPC port
1.5.10.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.6.4.1	09-Aug-2000	tshiozak	pull up the following changes (approved by thorpej): > cvs rdiff -r1.9 -r1.10 basesrc/include/locale.h > cvs rdiff -r1.45 -r1.46 basesrc/include/stdlib.h > cvs rdiff -r1.16 -r1.17 basesrc/lib/libc/locale/Makefile.inc > cvs rdiff -r1.17 -r1.18 basesrc/lib/libc/locale/setlocale.c > cvs rdiff -r0 -r1.2 basesrc/lib/libc/locale/setlocale_sb.c > cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/alpha/include/limits.h > cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/arm26/include/limits.h > cvs rdiff -r1.7 -r1.8 syssrc/sys/arch/arm32/include/limits.h > cvs rdiff -r1.14 -r1.15 syssrc/sys/arch/i386/include/limits.h > cvs rdiff -r1.12 -r1.13 syssrc/sys/arch/m68k/include/limits.h > cvs rdiff -r1.13 -r1.14 syssrc/sys/arch/mips/include/limits.h > cvs rdiff -r1.10 -r1.11 syssrc/sys/arch/pc532/include/limits.h > cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/powerpc/include/limits.h > cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/sh3/include/limits.h > cvs rdiff -r1.11 -r1.12 syssrc/sys/arch/sparc/include/limits.h > cvs rdiff -r1.7 -r1.8 syssrc/sys/arch/sparc64/include/limits.h > cvs rdiff -r1.9 -r1.10 syssrc/sys/arch/vax/include/limits.h > > Outline: > > Preparation for the future introduction of multibyte locale. > - MB_LEN_MAX is increased to 32. > - To ensure binary compatibility for old executables > under multibyte locale, versioned setlocale is added. > - __mb_len_cur definision is added in setlocale.c > and enable it in stdlib.h . > It is also important for multibyte locale stuffs, > but I just forgot.
1.6.2.1	28-May-2000	minoura	Citrus Project XPG4DL, an implementation of I18N (locale) framework, is imported.
1.7.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.8.8.2	11-Nov-2002	nathanw	Catch up to -current
1.8.8.1	04-May-2001	nathanw	file limits.h was added on branch nathanw_sa on 2002-11-11 22:02:51 +0000
1.11.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.11.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.11.2.1	03-Aug-2004	skrll	Sync with HEAD
1.12.16.1	03-Sep-2007	yamt	sync with head.
1.13.50.1	06-Nov-2007	matt	sync with HEAD
1.13.48.1	03-Sep-2007	jmcneill	Sync with HEAD.
1.13.44.1	03-Sep-2007	skrll	Sync with HEAD.
1.13.38.1	03-Oct-2007	garbled	Sync with HEAD
1.13.30.1	09-Oct-2007	ad	Sync with head.
1.15.42.1	03-Jul-2010	rmind	sync with head
1.15.40.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.15.20.1	11-Aug-2010	yamt	sync with head.
1.16.12.1	05-Apr-2012	mrg	sync to latest -current.
1.16.8.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.16.8.1	17-Apr-2012	yamt	sync with head
1.17.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.17.2.1	23-Jun-2013	tls	resync from head
1.18.8.1	10-Aug-2014	tls	Rebase.
1.18.4.1	18-May-2014	rmind	sync with head
1.19.28.1	10-Jun-2019	christos	Sync with HEAD
1.19.26.1	26-Jan-2019	pgoyette	Sync with HEAD
1.17	12-Feb-2022	riastradh	__cpu_simple_lock(9): Omit needless barriers in init. It is, and always has been, the caller's responsibility to ensure the lock is initialized before it can be used -- otherwise the memory could hold garbage; it is nonsensical to even attempt locking operations on it before initialization. So there's no need to issue explicit barriers here. The barrier seems to have been introduced in sys/arch/alpha/alpha/lock_machdep.c rev. 1.1 (since moved to inline asm in alpha/include/lock.h) and then copied & pasted into several other architectures.
1.16	13-Sep-2021	rin	Fix IBM405 errata 77 workaround for __cpu_simple_lock{,_try}(); adjust labels so that dcbt is executed before stwcx. insn.
1.15	01-Mar-2020	rin	Implement workaround for IBM405 Errata 77 (aka CPU_210), where interrupted stwcx. may errantly write data to memory: https://elinux.org/images/1/1d/Ppc405gp-errata.pdf This is because stwcx. is split into two pieces in the pipeline. We need to (1) insert dcbt before every stwcx. instruction, as well as (2) insert sync before every rfi/rfci instruction. It is unclear which processors are affected, but according to Linux, all 405-based cores up until 405GPR and 405EP are affected: https://github.com/torvalds/linux/blob/master/arch/powerpc/platforms/40x/Kconfig#L140 For kernel, this workaround can be restricted to affected processors. However, for kernel modules and userland, we have to enable it for all 32bit powerpc archs in order to share common binaries as before. Proposed on port-powerpc: http://mail-index.netbsd.org/port-powerpc/2020/02/21/msg003583.html
1.14	29-Nov-2019	riastradh	Nix mb_* on powerpc.
1.13	17-Sep-2017	christos	branches: 1.13.4; 1.13.8; more const.
1.12	28-Apr-2008	martin	branches: 1.12.44; Remove clause 3 and 4 from TNF licenses
1.11	17-Oct-2007	garbled	branches: 1.11.16; 1.11.18; 1.11.20; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.10	10-Sep-2007	skrll	Merge nick-csl-alignment.
1.9	09-Feb-2007	ad	branches: 1.9.6; 1.9.14; 1.9.18; 1.9.22; 1.9.24; Merge newlock2 to head.
1.8	28-Dec-2005	perry	branches: 1.8.20; inline -> __inline
1.7	24-Dec-2005	perry	Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.6	11-Dec-2005	christos	merge ktrace-lwp.
1.5	26-Sep-2003	nathanw	branches: 1.5.16; Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h so that they can be used in a namespace-friendly way.
1.4	08-Jul-2000	tsubai	branches: 1.4.2; 1.4.26; Clear the reservation in __cpu_simple_lock_try even if it failed to lock. (From ws@tools.de)
1.3	06-Jul-2000	tsubai	Implement powerpc spin lock functions.
1.2	02-May-2000	thorpej	Let each platform typedef the new __cpu_simple_lock_t, which should be the most efficient type used for the atomic operations in the simplelock structure, and should also be __volatile.
1.1	29-Apr-2000	thorpej	Require that each each MACHINE/MACHINE_ARCH supply a lock.h. This file contains the values __SIMPLELOCK_LOCKED and __SIMPLELOCK_UNLOCKED, which replace the old SIMPLELOCK_LOCKED and SIMPLELOCK_UNLOCKED. These files are also required to supply inline functions __cpu_simple_lock(), __cpu_simple_lock_try(), and __cpu_simple_unlock() if locking is to be supported on that platform (i.e. if MULTIPROCESSOR is defined in the _KERNEL case). Change these functions to take an int * (&alp->lock_data) rather than the struct simplelock * itself. These changes make it possible for userland to use the locking primitives by including <machine/lock.h>.
1.4.26.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.26.2	18-Sep-2004	skrll	Sync with HEAD.
1.4.26.1	03-Aug-2004	skrll	Sync with HEAD
1.4.2.2	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.4.2.1	08-Jul-2000	bouyer	file lock.h was added on branch thorpej_scsipi on 2000-11-20 20:31:09 +0000
1.5.16.3	27-Oct-2007	yamt	sync with head.
1.5.16.2	26-Feb-2007	yamt	sync with head.
1.5.16.1	21-Jun-2006	yamt	sync with head.
1.8.20.1	28-Jan-2007	ad	powerpc changes.
1.9.24.1	06-Nov-2007	matt	sync with HEAD
1.9.22.1	02-Oct-2007	joerg	Sync with HEAD.
1.9.18.1	15-Aug-2007	skrll	Provide __SIMPLELOCK_{UN,}LOCKED_P and __cpu_simple_lock_{set,clear} for all architectures.
1.9.14.2	03-Oct-2007	garbled	Sync with HEAD
1.9.14.1	11-Sep-2007	macallan	sync with HEAD
1.9.6.1	09-Oct-2007	ad	Sync with head.
1.11.20.1	16-May-2008	yamt	sync with head.
1.11.18.1	18-May-2008	yamt	sync with head.
1.11.16.1	02-Jun-2008	mjf	Sync with HEAD.
1.12.44.1	03-Dec-2017	jdolecek	update from HEAD
1.13.8.1	03-Mar-2020	martin	Pull up following revision(s) (requested by rin in ticket #755): sys/arch/evbppc/conf/std.virtex: revision 1.4 sys/arch/powerpc/powerpc/trap_subr.S: revision 1.81 sys/arch/powerpc/ibm4xx/4xx_trap_subr.S: revision 1.8 sys/arch/evbppc/conf/std.walnut: revision 1.9 common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h: revision 1.7 sys/arch/powerpc/include/asm.h: revision 1.49 common/lib/libc/arch/powerpc/atomic/atomic_cas.S: revision 1.9 sys/arch/powerpc/ibm4xx/trap_subr.S: revision 1.28 sys/arch/powerpc/include/lock.h: revision 1.15 sys/arch/evbppc/conf/std.obs266: revision 1.3 common/lib/libc/arch/powerpc/atomic/atomic_swap.S: revision 1.8 sys/arch/powerpc/powerpc/locore_subr.S: revision 1.61 sys/arch/powerpc/powerpc/lock_stubs.S: revision 1.12 sys/arch/evbppc/conf/std.obs200: revision 1.5 Implement workaround for IBM405 Errata 77 (aka CPU_210), where interrupted stwcx. may errantly write data to memory: https://elinux.org/images/1/1d/Ppc405gp-errata.pdf This is because stwcx. is split into two pieces in the pipeline. We need to (1) insert dcbt before every stwcx. instruction, as well as (2) insert sync before every rfi/rfci instruction. It is unclear which processors are affected, but according to Linux, all 405-based cores up until 405GPR and 405EP are affected: https://github.com/torvalds/linux/blob/master/arch/powerpc/platforms/40x/Kconfig#L140 For kernel, this workaround can be restricted to affected processors. However, for kernel modules and userland, we have to enable it for all 32bit powerpc archs in order to share common binaries as before. Proposed on port-powerpc: http://mail-index.netbsd.org/port-powerpc/2020/02/21/msg003583.html
1.13.4.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.2	04-Nov-2024	christos	Undo previous lwp.h change.
1.1	03-Nov-2024	christos	Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate lwp.h file.
1.1	30-Nov-2024	christos	branches: 1.1.4; Create a new header lwp_private.h to contain _lwp_getprivate_fast, _lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that: 1. we don't need special hacks to hide them 2. we can include <lwp.h> where needed to get the necessary prototypes without redefining them locally.
1.1.4.2	02-Aug-2025	perseant	Sync with HEAD
1.1.4.1	30-Nov-2024	perseant	file lwp_private.h was added on branch perseant-exfatfs on 2025-08-02 05:56:00 +0000
1.6	26-Apr-2011	joerg	Remove Darwin, MACH and Mach-O support.
1.5	28-Apr-2008	martin	branches: 1.5.22; 1.5.28; Remove clause 3 and 4 from TNF licenses
1.4	11-Dec-2005	christos	branches: 1.4.74; 1.4.76; 1.4.78; merge ktrace-lwp.
1.3	25-Jun-2005	christos	the siginfo trap codes are mi.
1.2	03-Dec-2003	manu	branches: 1.2.4; Move machine dependent definitions to machine dependent headers.
1.1	11-Nov-2003	manu	Implement mach_thread_get_state. While we are here, try to tag machine dependent functions in header files. also transformed darwin_ppc__state into mach_ppc__state, as this is what they really are (COMPAT_DARWIN is on the top of COMPAT_MACH, not the other way around)
1.2.4.5	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.2.4.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.4.3	18-Sep-2004	skrll	Sync with HEAD.
1.2.4.2	03-Aug-2004	skrll	Sync with HEAD
1.2.4.1	03-Dec-2003	skrll	file mach_machdep.h was added on branch ktrace-lwp on 2004-08-03 10:39:29 +0000
1.4.78.1	16-May-2008	yamt	sync with head.
1.4.76.1	18-May-2008	yamt	sync with head.
1.4.74.1	02-Jun-2008	mjf	Sync with HEAD.
1.5.28.1	06-Jun-2011	jruoho	Sync with HEAD.
1.5.22.1	31-May-2011	rmind	sync with head
1.3	03-May-2001	soren	PPC machine type tags haven't been used for a while.
1.2	09-Oct-1997	jtc	Fix tipo inherited from old version of TNF copyright template.
1.1	16-Apr-1997	thorpej	branches: 1.1.4; Machine-type tags used to communicate the type of system we're running on to the kernel. The boot program passes a boot args string plus additional information like so: /pci/scsi@3/disk@0,0:1/netbsd -s<NUL><esym><tag> The post-<NUL> values are: <esym> end of the kernel symbol table (32-bits) <tag> machine type tag (32-bits)
1.1.4.1	14-Oct-1997	thorpej	Update marc-pcmcia branch from trunk.
1.3	26-Apr-2011	joerg	Remove Darwin, MACH and Mach-O support.
1.2	28-Apr-2008	martin	branches: 1.2.22; 1.2.28; Remove clause 3 and 4 from TNF licenses
1.1	30-Oct-2002	manu	branches: 1.1.2; 1.1.110; 1.1.112; 1.1.114; Add COMPAT_MACH and EXEC_MACHO support on the PowerPC
1.1.114.1	16-May-2008	yamt	sync with head.
1.1.112.1	18-May-2008	yamt	sync with head.
1.1.110.1	02-Jun-2008	mjf	Sync with HEAD.
1.1.2.2	11-Nov-2002	nathanw	Catch up to -current
1.1.2.1	30-Oct-2002	nathanw	file macho_machdep.h was added on branch nathanw_sa on 2002-11-11 22:02:52 +0000
1.2.28.1	06-Jun-2011	jruoho	Sync with HEAD.
1.2.22.1	31-May-2011	rmind	sync with head
1.5	22-Oct-2014	joerg	Support copysignl on PowerPC.
1.4	19-Feb-2002	simonb	branches: 1.4.166; 1.4.184; Clean up some rampant code duplication wrt ieee number handling: - Add alignment-safe double and float unions. - Use the above for the __infinity and __nan constants on all architectures that use the standard ieee754 representation of those constants. - Add a single copy of various ieee754 math functions (frexp, isinf, isnan, ldexp and modf) that had numerous duplicates among the arch-specific directories. - Use the above functions on all architectures where the generic C versions where used. Architectures that had local assembly routines are untouched (for those functions only).
1.3	05-Feb-2000	kleink	branches: 1.3.6; 1.3.10; 1.3.14; Improve namespace test macros a bit.
1.2	04-Jan-2000	kleink	const -> __const and include <sys/cdefs.h> earlier; fixes PR lib/9052 by Takahiro Kambe.
1.1	23-Dec-1999	kleink	C99: Define a NAN macro in <math.h> which evaulates to a constant expression of a single-precision quiet NaN; only to be defined on platforms that do support this value.
1.3.14.1	28-Feb-2002	nathanw	Catch up to -current.
1.3.10.1	16-Mar-2002	jdolecek	Catch up with -current.
1.3.6.2	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.3.6.1	05-Feb-2000	bouyer	file math.h was added on branch thorpej_scsipi on 2000-11-20 20:31:10 +0000
1.4.184.1	25-May-2015	msaitoh	Pull up following revision(s) (requested by joerg in ticket #790): sys/arch/powerpc/include/math.h: revision 1.5 lib/libm/src/namespace.h: revision 1.13 lib/libm/arch/vax/n_support.S: revision 1.10 lib/libm/src/s_copysignl.c: revision 1.3 lib/libm/src/s_copysignl.c: revision 1.4 lib/libm/src/s_copysignl.c: revision 1.5 sys/arch/powerpc/include/ieee.h: revision 1.6 lib/libm/src/s_copysign.c: revision 1.12 lib/libm/src/s_copysign.c: revision 1.13 - Support copysignl on PowerPC. - Define copysignl on !long double platforms. Be consistent in the use of weak aliases. - copysignl is also needed for PowerPC's double-double format, so special case that. Functional support was added earlier, but not enabled.
1.4.166.1	03-Dec-2017	jdolecek	update from HEAD
1.26	30-Nov-2024	christos	Create a new header lwp_private.h to contain _lwp_getprivate_fast, _lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that: 1. we don't need special hacks to hide them 2. we can include <lwp.h> where needed to get the necessary prototypes without redefining them locally.
1.25	04-Nov-2024	christos	Undo previous lwp.h change.
1.24	03-Nov-2024	christos	Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate lwp.h file.
1.23	18-May-2024	thorpej	branches: 1.23.2; Clean up the <sys/ucontext.h> <-> <machine/mcontext.h> interface up a little: - Define _UC_MD_BIT* constants for the available machine-dependent bits, and use those constants to define the machine-dependent bits as well as the machine-independent bits that have machine-dependent values. - Explicitly generate an error if _UC_TLSBASE, _UC_SETSTACK, or _UC_CLRSTACK are not defined by <machine/mcontext.h>.
1.22	04-Oct-2020	rin	Add missing __{BEGIN,END}_DECLS in order to catch up with sanitizer_linux_libcdep.cc rev 1.17: http://cvsweb.netbsd.org/bsdweb.cgi/src/external/gpl3/gcc/dist/libsanitizer/sanitizer_common/sanitizer_linux_libcdep.cc#rev1.17 Fix build with HAVE_GCC=9.
1.21	22-Jun-2020	rin	Fix previous; hide userland ABI details for kernel as suggested by joerg: http://mail-index.netbsd.org/source-changes-d/2020/06/21/msg012745.html - Revive __lwp_settcb(), and call _lwp_setprivate(2) from it. - Keep l_private opaque pointer for kernel; store raw value of %r2 in it. In the previous commit message, I wrote, http://mail-index.netbsd.org/source-changes/2020/06/21/msg118524.html > - Make sure that, like other ports, l_private represents address of tcb, > not biased one as in %r2. but, it turned out to be wrong. mips stores a biased address, at least. It is userland responsibility to interpret returned values from lwp_getprivate(2).
1.20	21-Jun-2020	rin	Fix inconsistency b/w kernel and userland recognitions of TLS, as well as inconsistency whether it is biased or not in kernel. - Obsolete __lwp_settcb() in order to let kernel know new TLS address via _lwp_setprivate(2). Alternatively, we can call _lwp_setprivate(2) within __lwp_settcb() like mips, but it is just double handling; we adjust %r2 appropriately in _lwp_setprivate(2) via cpu_lwp_setprivate(). - Make sure that, like other ports, l_private represents address of tcb, not biased one as in %r2. This guarantees that the returned values from _lwp_getprivate(2) and __lwp_getprivate_fast() are always same. Also, we can obsolete PTRACE_LWP_GETPRIVATE() macro. Now, *_pl_private tests in tests/lib/libc/sys successfully pass, while no other tests become newly falling.
1.19	21-Jun-2020	rin	Fix SS_ONSTACK, which seems like broken since switched to siginfo. Found by tests/lib/libc/sys/t_sigaltstack, which passes now, while no other tests are not falling newly. XXX Shouldn't we turn _UC_{SET,CLR}STACK into MI?
1.18	15-Feb-2018	kamil	Introduce _UC_MACHINE_FP() as a macro _UC_MACHINE_FP() is a helper macro to extract from mcontext a frame pointer. Don't rely on this interface as a compiler might strip frame pointer or optimize it making this interface unreliable. For hppa assume a small frame context, for larger frames FP might be located in a different register (4 instead of 3). For ia64 there is no strict frame pointer, and registers might rotate. Reuse 79 following: ./gcc/config/ia64/ia64.h:#define HARD_FRAME_POINTER_REGNUM LOC_REG (79) Once ia64 will mature, this should be revisited. A macro can encapsulate a real function for extracting Frame Pointer on more complex CPUs / ABIs. For the remaining CPUs, reuse standard register as defined in appropriate ABI. The direct users of this macro are LLVM and GCC with Sanitizers. Proposed on tech-userlevel@. Sponsored by <The NetBSD Foundation>
1.17	12-Aug-2014	joerg	branches: 1.17.12; Avoid unncessary use of double in the kernel. With this change, a LLVM build kernel fully works on TWRP1025.
1.16	24-Jul-2014	joerg	Let the assembler bail out if the immediate is too large instead of truncating it.
1.15	28-Feb-2014	matt	branches: 1.15.2; Add mcontext32_t
1.14	11-Sep-2012	matt	branches: 1.14.2; 1.14.4; Add support for _UC_TLSBASE. Make sure to preserve backwards compat for programs built before TLS support was added.
1.13	12-Mar-2011	matt	branches: 1.13.4; Add __lwp_gettcb_fast and __lwp_settcb helper inline functions
1.12	25-Feb-2011	joerg	Be nicer to software that insists on -ansi and use __inline.
1.11	24-Feb-2011	joerg	Allow storing and receiving the LWP private pointer via ucontext_t on all platforms except VAX and IA64. Add fast access via register for AMD64, i386 and SH3 ports. Use this fast access in libpthread to replace the stack based pthread_self(). Implement skeleton support for Alpha, HPPA, PowerPC, SPARC and SPARC64, but leave it disabled. Ports that support this feature provide __HAVE____LWP_GETPRIVATE_FAST in machine/types.h and a corresponding __lwp_getprivate_fast in machine/mcontext.h. This material is based upon work partially supported by The NetBSD Foundation under a contract with Joerg Sonnenberger.
1.10	01-Feb-2011	matt	Fix XER comment. Add spe variants for vectors.
1.9	18-Jan-2011	matt	branches: 1.9.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.8	28-Apr-2008	martin	branches: 1.8.22; 1.8.26; 1.8.28; Remove clause 3 and 4 from TNF licenses
1.7	11-Dec-2005	christos	branches: 1.7.74; 1.7.76; 1.7.78; merge ktrace-lwp.
1.6	08-Oct-2003	thorpej	Add some accessor macros for the ucontext: * _UC_MACHINE_PC() - access the program counter * _UC_MACHINE_INTRV() - access the integer return value register * _UC_MACHINE_SET_PC() - set the program counter (this requires special handling on some platforms).
1.5	20-Jan-2003	matt	branches: 1.5.2; __greg_t should be an long, not int. (LP64 friendliness)
1.4	20-Jan-2003	matt	Kill all references to struct __gregs and use the _REG_xx names.
1.3	20-Jan-2003	matt	Add _REG_foo to ppc mcontext and use them instead of constants.
1.2	18-Jan-2003	thorpej	Merge the nathanw_sa branch.
1.1	05-Nov-2001	briggs	branches: 1.1.2; file mcontext.h was initially added on branch nathanw_sa.
1.1.2.4	28-Dec-2001	nathanw	Add a macro, _UC_MACHINE_SP(), to fetch the user stack pointer from a ucontext_t.
1.1.2.3	14-Nov-2001	briggs	Back out last (DUMB!) change.
1.1.2.2	13-Nov-2001	briggs	alias sc_pc for debug pthreads code.
1.1.2.1	05-Nov-2001	briggs	Initial SA support for ppc. Test-booted on sandpoint, macppc, & walnut. mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein <kleink@netbsd.org>.
1.5.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.5.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.5.2.1	03-Aug-2004	skrll	Sync with HEAD
1.7.78.1	16-May-2008	yamt	sync with head.
1.7.76.1	18-May-2008	yamt	sync with head.
1.7.74.1	02-Jun-2008	mjf	Sync with HEAD.
1.8.28.1	06-Jun-2011	jruoho	Sync with HEAD.
1.8.26.1	11-Jan-2011	matt	Add a _UC_POWERPC_SPE bit to indicate the vectors are from SPE.
1.8.22.2	21-Apr-2011	rmind	sync with head
1.8.22.1	05-Mar-2011	rmind	sync with head
1.9.2.2	05-Mar-2011	bouyer	Sync with HEAD
1.9.2.1	08-Feb-2011	bouyer	Sync with HEAD
1.13.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.13.4.1	30-Oct-2012	yamt	sync with head
1.14.4.1	18-May-2014	rmind	sync with head
1.14.2.2	03-Dec-2017	jdolecek	update from HEAD
1.14.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.15.2.1	10-Aug-2014	tls	Rebase.
1.17.12.3	21-Mar-2018	martin	Pull up the following, requested by kamil in ticket #552: external/gpl3/gcc{.old}/dist/libsanitizer/asan/asan_linux.cc 1.4 sys/arch/aarch64/include/mcontext.h 1.2 sys/arch/alpha/include/mcontext.h 1.9 sys/arch/amd64/include/mcontext.h 1.19 sys/arch/arm/include/mcontext.h 1.19 sys/arch/hppa/include/mcontext.h 1.9 sys/arch/i386/include/mcontext.h 1.14 sys/arch/ia64/include/mcontext.h 1.6 sys/arch/m68k/include/mcontext.h 1.10 sys/arch/mips/include/mcontext.h 1.22 sys/arch/or1k/include/mcontext.h 1.2 sys/arch/powerpc/include/mcontext.h 1.18 sys/arch/riscv/include/mcontext.h 1.5 sys/arch/sh3/include/mcontext.h 1.11 sys/arch/sparc/include/mcontext.h 1.14-1.17 sys/arch/sparc64/include/mcontext.h 1.10 sys/arch/vax/include/mcontext.h 1.9 tests/lib/libc/sys/Makefile 1.50 tests/lib/libc/sys/t_ucontext.c 1.2-1.5 sys/arch/hppa/include/mcontext.h 1.10 sys/arch/ia64/include/mcontext.h 1.7 - Introduce _UC_MACHINE_FP(). _UC_MACHINE_FP() is a helper macro to extract from mcontext a frame pointer. - Add new tests in lib/libc/sys/t_ucontext: * ucontext_sp (testing _UC_MACHINE_SP) * ucontext_fp (testing _UC_MACHINE_FP) * ucontext_pc (testing _UC_MACHINE_PC) * ucontext_intrv (testing _UC_MACHINE_INTRV) Add a dummy implementation of _UC_MACHINE_INTRV() for ia64. Implement _UC_MACHINE_INTRV() for hppa. Make the t_ucontext.c test more portable. We now have _UC_MACHINE_FP.
1.17.12.2	26-Feb-2018	snj	revert ticket 552, which broke the build
1.17.12.1	25-Feb-2018	snj	Pull up following revision(s) (requested by kamil in ticket #552): sys/arch/aarch64/include/mcontext.h: 1.2 sys/arch/alpha/include/mcontext.h: 1.9 sys/arch/amd64/include/mcontext.h: 1.19 sys/arch/arm/include/mcontext.h: 1.19 sys/arch/hppa/include/mcontext.h: 1.9 sys/arch/i386/include/mcontext.h: 1.14 sys/arch/ia64/include/mcontext.h: 1.6 sys/arch/m68k/include/mcontext.h: 1.10 sys/arch/mips/include/mcontext.h: 1.22 sys/arch/or1k/include/mcontext.h: 1.2 sys/arch/powerpc/include/mcontext.h: 1.18 sys/arch/riscv/include/mcontext.h: 1.5 sys/arch/sh3/include/mcontext.h: 1.11 sys/arch/sparc/include/mcontext.h: 1.14-1.17 sys/arch/sparc64/include/mcontext.h: 1.10 sys/arch/vax/include/mcontext.h: 1.9 tests/lib/libc/sys/Makefile: 1.50 tests/lib/libc/sys/t_ucontext.c: 1.2 Introduce _UC_MACHINE_FP() as a macro _UC_MACHINE_FP() is a helper macro to extract from mcontext a frame pointer. Don't rely on this interface as a compiler might strip frame pointer or optimize it making this interface unreliable. For hppa assume a small frame context, for larger frames FP might be located in a different register (4 instead of 3). For ia64 there is no strict frame pointer, and registers might rotate. Reuse 79 following: ./gcc/config/ia64/ia64.h:#define HARD_FRAME_POINTER_REGNUM LOC_REG (79) Once ia64 will mature, this should be revisited. A macro can encapsulate a real function for extracting Frame Pointer on more complex CPUs / ABIs. For the remaining CPUs, reuse standard register as defined in appropriate ABI. The direct users of this macro are LLVM and GCC with Sanitizers. Proposed on tech-userlevel@. Sponsored by <The NetBSD Foundation> -- Improve _UC_MACHINE_FP() for SPARC/SPARC64 Introduce a static inline function _uc_machine_fp() that contains improved caluclation of a frame pointer. Algorithm: uptr stk_ptr; # if defined (__arch64__) stk_ptr = (uptr ) (sp + 2047); # else stk_ptr = (uptr ) sp; # endif bp = stk_ptr[15]; Noted by <mrg> -- Make _UC_MACHINE_FP() compile again and fix it so that it does not add the offset twice. -- fix _UC_MACHINE32_FP() -- use 32 bit pointer value so that [15] is the right offset. do this by using __greg32_t, which is only in the sparc64 version, and these are only useful there, so move them. -- Add new tests in lib/libc/sys/t_ucontext New tests: - ucontext_sp - ucontext_fp - ucontext_pc - ucontext_intrv They test respectively: - _UC_MACHINE_SP - _UC_MACHINE_FP - _UC_MACHINE_PC - _UC_MACHINE_INTRV These tests attempt to access and print the values from ucontext, without interpreting the values. This is a follow up of the _UC_MACHINE_FP() introduction. These tests use PRIxREGISTER, and require to be built with -D_KERNTYPES. Sponsored by <The NetBSD Foundation>
1.23.2.1	02-Aug-2025	perseant	Sync with HEAD
1.8	12-Jul-2023	riastradh	machine/mutex.h: Sprinkle sys/types.h, omit machine/lock.h. Turns out machine/lock.h is not needed for __cpu_simple_lock_t, which always comes from sys/types.h. And, really, sys/types.h (or at least sys/stdint.h) is needed for uintN_t and uintptr_t.
1.7	09-Jul-2023	riastradh	machine/mutex.h: Sprinkle includes so this can be used by crash(8). XXX pullup-10
1.6	29-Nov-2019	riastradh	branches: 1.6.26; Nix now-unused definitions of MUTEX_GIVE/MUTEX_RECEIVE.
1.5	29-Nov-2019	riastradh	Nix mb_* on powerpc.
1.4	28-Apr-2008	martin	branches: 1.4.88; Remove clause 3 and 4 from TNF licenses
1.3	21-Nov-2007	yamt	branches: 1.3.14; 1.3.16; 1.3.18; make kmutex_t and krwlock_t smaller by killing lock id. ok'ed by Andrew Doran.
1.2	09-Feb-2007	ad	branches: 1.2.4; 1.2.8; 1.2.24; 1.2.26; 1.2.30; 1.2.32; Merge newlock2 to head.
1.1	30-Jan-2007	ad	branches: 1.1.2; file mutex.h was initially added on branch newlock2.
1.1.2.2	01-Feb-2007	ad	Header file cleanup.
1.1.2.1	30-Jan-2007	ad	Add missing headers.
1.2.32.1	08-Dec-2007	mjf	Sync with HEAD.
1.2.30.1	21-Nov-2007	bouyer	Sync with HEAD
1.2.26.1	09-Jan-2008	matt	sync with HEAD
1.2.24.1	21-Nov-2007	joerg	Sync with HEAD.
1.2.8.1	03-Dec-2007	ad	Sync with HEAD.
1.2.4.3	07-Dec-2007	yamt	sync with head
1.2.4.2	26-Feb-2007	yamt	sync with head.
1.2.4.1	09-Feb-2007	yamt	file mutex.h was added on branch yamt-lazymbuf on 2007-02-26 09:07:53 +0000
1.3.18.1	16-May-2008	yamt	sync with head.
1.3.16.1	18-May-2008	yamt	sync with head.
1.3.14.1	02-Jun-2008	mjf	Sync with HEAD.
1.4.88.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.6.26.1	09-Aug-2023	martin	Pull up following revision(s) (requested by maya in ticket #316): sys/arch/m68k/include/mutex.h: revision 1.13 sys/arch/arm/include/cpu.h: revision 1.125 sys/arch/sun68k/include/intr.h: revision 1.21 sys/arch/arm/include/mutex.h: revision 1.28 sys/sys/rwlock.h: revision 1.18 sys/arch/powerpc/include/mutex.h: revision 1.7 sys/arch/arm/include/mutex.h: revision 1.29 sys/arch/powerpc/include/mutex.h: revision 1.8 sys/uvm/uvm_param.h: revision 1.42 sys/sys/ksem.h: revision 1.16 sys/arch/x86/include/mutex.h: revision 1.10 sys/sys/proc.h: revision 1.372 sys/sys/ksem.h: revision 1.17 sys/arch/ia64/include/mutex.h: revision 1.8 sys/arch/evbarm/include/intr.h: revision 1.29 sys/sys/lua.h: revision 1.9 sys/arch/next68k/include/intr.h: revision 1.23 sys/arch/ia64/include/mutex.h: revision 1.9 sys/arch/hp300/include/intr.h: revision 1.35 sys/arch/hp300/include/intr.h: revision 1.36 sys/arch/sparc/include/cpu.h: revision 1.111 sys/arch/hppa/include/mutex.h: revision 1.16 sys/arch/vax/include/intr.h: revision 1.31 sys/arch/hppa/include/mutex.h: revision 1.17 sys/arch/news68k/include/intr.h: revision 1.28 sys/arch/hppa/include/mutex.h: revision 1.18 sys/arch/hppa/include/intr.h: revision 1.3 sys/arch/hppa/include/mutex.h: revision 1.19 sys/arch/hppa/include/intr.h: revision 1.4 sys/sys/sched.h: revision 1.92 sys/opencrypto/cryptodev.h: revision 1.51 sys/arch/vax/include/mutex.h: revision 1.20 sys/arch/sparc64/include/mutex.h: revision 1.10 sys/arch/ia64/include/sapicvar.h: revision 1.2 sys/arch/riscv/include/mutex.h: revision 1.5 sys/arch/amiga/dev/grfabs_cc.c: revision 1.39 sys/external/bsd/drm2/include/linux/idr.h: revision 1.11 sys/arch/riscv/include/mutex.h: revision 1.6 sys/ddb/files.ddb: revision 1.16 sys/arch/mac68k/include/intr.h: revision 1.32 share/man/man4/ddb.4: revision 1.203 sys/ddb/db_command.c: revision 1.183 sys/arch/mips/include/mutex.h: revision 1.10 sys/ddb/db_command.c: revision 1.184 sys/arch/x68k/include/intr.h: revision 1.22 sys/arch/sparc/include/psl.h: revision 1.51 sys/arch/or1k/include/mutex.h: revision 1.4 sys/arch/mips/include/mutex.h: revision 1.11 sys/arch/arm/xscale/pxa2x0_intr.h: revision 1.16 sys/arch/sparc64/include/cpu.h: revision 1.134 sys/arch/sparc/include/psl.h: revision 1.52 sys/arch/or1k/include/mutex.h: revision 1.5 sys/arch/mvme68k/include/intr.h: revision 1.22 sys/arch/luna68k/include/intr.h: revision 1.16 external/cddl/osnet/sys/sys/kcondvar.h: revision 1.6 sys/arch/sparc/include/mutex.h: revision 1.12 sys/arch/sparc/include/mutex.h: revision 1.13 sys/arch/usermode/include/mutex.h: revision 1.5 sys/arch/usermode/include/mutex.h: revision 1.6 sys/kern/kern_core.c: revision 1.38 usr.sbin/crash/Makefile: revision 1.49 sys/arch/amiga/include/intr.h: revision 1.23 sys/arch/alpha/include/mutex.h: revision 1.12 sys/arch/alpha/include/mutex.h: revision 1.13 sys/arch/evbarm/lubbock/sacc_obio.c: revision 1.16 sys/ddb/ddb.h: revision 1.6 sys/arch/sparc64/include/mutex.h: revision 1.8 sys/arch/sh3/include/mutex.h: revision 1.12 sys/arch/evbarm/lubbock/sacc_obio.c: revision 1.17 sys/ddb/db_syncobj.c: revision 1.1 sys/arch/vax/include/mutex.h: revision 1.18 sys/arch/sparc64/include/psl.h: revision 1.63 sys/arch/sparc64/include/mutex.h: revision 1.9 sys/arch/sh3/include/mutex.h: revision 1.13 sys/arch/evbarm/lubbock/obio.c: revision 1.13 sys/arch/atari/include/intr.h: revision 1.23 sys/ddb/db_syncobj.c: revision 1.2 sys/arch/vax/include/mutex.h: revision 1.19 sys/arch/evbarm/g42xxeb/obio.c: revision 1.14 sys/arch/evbarm/g42xxeb/obio.c: revision 1.15 sys/arch/cesfic/include/intr.h: revision 1.14 sys/ddb/db_syncobj.h: revision 1.1 sys/arch/x86/include/cpu.h: revision 1.134 sys/arch/evbarm/g42xxeb/obio.c: revision 1.16 sys/arch/cesfic/include/intr.h: revision 1.15 sys/arch/arm/xscale/pxa2x0_intr.c: revision 1.26 sys/sys/cpu_data.h: revision 1.54 sys/arch/m68k/include/mutex.h: revision 1.12 sys/arch/ia64/acpi/madt.c: revision 1.6 sys/rwlock.h: Make this more self-contained for bool. machine/mutex.h: Sprinkle includes so this can be used by crash(8). ddb: New `show all tstiles' command. Shows who's waiting for which locks and what the owner is up to. Include psl.h for ipl_cookie_t if __MUTEX_PRIVATE sys: Rip <sys/resourcevar.h> out of <uvm/uvm_param.h>. And thus out of <sys/param.h>, which is exceedingly overused and fragile and delenda est. Should fix (some) issues with the recent inclusion of machine/lock.h in various machine/mutex.h files. arm/mutex.h: Need machine/intr.h, machine/lock.h. For ipl_cookie_t and __cpu_simple_lock_t. evbarm/intr.h: Define ipl_cookie_t before including ARM_INTR_IMPL. Otherwise arm/mutex.h doesn't work, due to a cyclic dependency which should really be fixed. opencrypto/cryptodev.h: Fix includes. - Move sys/condvar.h under #ifdef _KERNEL. - Add some other necessary includes and forward declarations. - Sort. hp300/intr.h: Fix missing includes. linux/idr.h: Need <sys/mutex.h> for kmutex_t. amiga/intr.h: Don't define spl() functions if !_KERNEL. This is used by crash(8) now, and what's important is ipl_cookie_t. cesfic/intr.h: Expose ipl_cookie_t to userland for crash(8). cesfic/intr.h: Expose ipl_cookie_t to userland only with _KMEMUSER. Probably not necessary but let's be a little more cautious about this. atari/intr.h: Expose ipl_cookie_t with _KMEMUSER for crash(8). arm/cpu.h: Need sys/param.h for COHERENCY_UNIT. Nix machine/param.h -- not meant to be used directly, pulled in by sys/param.h. Move the definition of ipl_cookie_t out of the kernel-only sections, some _KMEMUSER applications need it. ddb: Cast pointer to uintptr_t first before db_expr_t. hppa/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). luna68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). mvme68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). news68k/intr.h: Fix includes. Put some definitions under _KERNEL. next68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). sys/ksem.h: Hack around fstat(8) abuse of _KERNEL. sun68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). vax/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). x68k/intr.h: Put functions under _KERNEL so crash(8) can use this. Make ipl_cookie_t visible for _KMEMUSER userland applications. fix editor mishap in previous Explicitly include <sys/mutex.h> for kmutex_t. Replace kmutex_t (which may be undefined here) with struct kmutex , suggested by Taylor. hp300/intr.h: Put most of this under #ifdef _KERNEL. Only ipl_cookie_t really needs to be exposed now, for crash(8). mac68k/intr.h: Expose ipl_cookie_t to _KMEMUSER for crash(8). Make inclusion of sys/intr.h explicit for spl. fix hppa and vax builds. machine/lock.h isn't necessary for __cpu_simple_lock_t, it's in sys/types.h. avoids cpu_data.h vs sched.h include order issues. move the hppa ipl_t typedef with the moved usage of it. machine/mutex.h: Sprinkle sys/types.h, omit machine/lock.h. Turns out machine/lock.h is not needed for __cpu_simple_lock_t, which always comes from sys/types.h. And, really, sys/types.h (or at least sys/stdint.h) is needed for uintN_t and uintptr_t. ddb: Cast pointer to uintptr_t, then to db_expr_t. Avoids warnings about conversion between pointer and integer of different size on some architectures. re-fix hppa builds. this file uses __cpu_simple_lock(), not just the underlying type, so it does need machine/lock.h. Break cycle by using `struct kmutex ' instead of `kmutex_t '. sys/sched.h included sys/mutex.h which includes sys/intr.h which includes machine/intr.h which on cats includes arm/footbridge/footbridge_intr.h which includes arm/cpu.h which includes sys/cpu_data.h which includes sys/sched.h But there was never any real need for sys/mutex.h in sys/sched.h, because it only uses pointers to the opaque struct kmutex. Cycle broken by using `struct kmutex *' instead of pulling in sys/mutex.h for the definition of kmutex_t. Side effect: This revealed that sys/cpu_data.h needed sys/intr.h (which was pulled in accidentally by sys/mutex.h via sys/sched.h) for SOFTINT_COUNT. Also revealed some other machine/cpu.h header files were missing includes of sys/mutex.h for kmutex_t. ia64: Need sys/types.h for u_int, vaddr_t; sys/mutex.h for kmutex_t. explicitly include no longer implicitly included sys/mutex.h. arm/xscale: Use sys/bitops.h fls32 - 1 instead of 31 - __builtin_clz. Sidesteps namespace collision with `#define bits ...' in net/zlib.c. complete the previous - there were two calls to find_first_bit() to fix. arm/xscale: Missed a spot with previous find_first_bit commit. evbarm/g42xxeb: Fix off-by-one in previous. The original find_first_bit(x) was 31 - __builtin_clz((uint32_t)x), which is equivalent to fls32(x) - 1, not to fls32(x). Note that fls32 is 1-based and returns 0 for x=0.
1.8	28-Feb-2014	matt	Make this work.
1.7	20-Jun-2011	matt	branches: 1.7.2; 1.7.12; 1.7.16; <arch/powerpc/... -> <powerpc/...
1.6	10-Dec-2009	matt	branches: 1.6.10; Change u_long to vaddr_t/vsize_t in exec code where appropriate (mostly involves setregs and vmcmds). Should result in no code differences.
1.5	29-May-2008	mrg	remove clause #3 from my license where there are no other copyright holders involved.
1.4	17-Oct-2007	garbled	branches: 1.4.16; 1.4.18; 1.4.20; 1.4.22; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.3	16-Sep-2007	dsl	Define netbsd32_uint64 for 64bit integers with the alignment requirement of the corresponding 32bit architecture. Use it for the 64bit items in netbsd32_statvfs so that the structure doesn't collect 8byte alignment (and 4 bytes of trailing padding). This replaces the 'packed' attribute which wasn't architecture specific and would cause massive overheads accessing every member of sparc64. Should allow the MIPS64 port do DTRT.
1.2	16-Apr-2003	dsl	branches: 1.2.18; 1.2.60; 1.2.68; 1.2.78; 1.2.80; change 'data' arg of fp_ioctl to 'void *' to match file.h
1.1	05-Feb-2003	matt	Needed for compat_netbsd32.
1.2.80.1	06-Nov-2007	matt	sync with HEAD
1.2.78.1	02-Oct-2007	joerg	Sync with HEAD.
1.2.68.1	03-Oct-2007	garbled	Sync with HEAD
1.2.60.1	09-Oct-2007	ad	Sync with head.
1.2.18.1	27-Oct-2007	yamt	sync with head.
1.4.22.1	23-Jun-2008	wrstuden	Sync w/ -current. 34 merge conflicts to follow.
1.4.20.2	11-Mar-2010	yamt	sync with head
1.4.20.1	04-May-2009	yamt	sync with head.
1.4.18.1	04-Jun-2008	yamt	sync with head
1.4.16.1	02-Jun-2008	mjf	Sync with HEAD.
1.6.10.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.7.16.1	18-May-2014	rmind	sync with head
1.7.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.7.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.5	27-Feb-2021	thorpej	Un-do a bunch of misguided code sharing. It's not really shared if it's full of platform-specific #ifdefs: - ofwoea_batinit() is gone; just do what's needed early in macppc / ofppc initppc() functions. - Get a bunch of Mac-specific stuff out of ofwoea_initppc().
1.4	04-Jun-2010	chs	branches: 1.4.72; fix some cosmetics.
1.3	28-Apr-2008	martin	branches: 1.3.20; 1.3.22; Remove clause 3 and 4 from TNF licenses
1.2	17-Oct-2007	garbled	branches: 1.2.2; 1.2.4; 1.2.8; 1.2.22; 1.2.24; 1.2.26; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.1	06-Jun-2007	garbled	branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10; file ofw_bus.h was initially added on branch ppcoea-renovation.
1.1.10.1	25-Oct-2007	bouyer	Sync with HEAD.
1.1.8.1	18-Oct-2007	yamt	sync with head.
1.1.6.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.1.2.2	07-Jun-2007	garbled	Convert macppc to powerpc bus_space. Lots of work here from Matt Thomas, as well as the common ofwoea code from myself. Compile tested only, still probably needs some fine tuning. Also in this commit: Convert macppc to new shared ofwoea routines. Lots of KNF.
1.1.2.1	06-Jun-2007	garbled	Add include files for common oea ofw routines
1.2.26.2	11-Aug-2010	yamt	sync with head.
1.2.26.1	16-May-2008	yamt	sync with head.
1.2.24.1	18-May-2008	yamt	sync with head.
1.2.22.1	02-Jun-2008	mjf	Sync with HEAD.
1.2.8.2	06-Nov-2007	matt	sync with HEAD
1.2.8.1	17-Oct-2007	matt	file ofw_bus.h was added on branch matt-armv6 on 2007-11-06 23:20:36 +0000
1.2.4.2	27-Oct-2007	yamt	sync with head.
1.2.4.1	17-Oct-2007	yamt	file ofw_bus.h was added on branch yamt-lazymbuf on 2007-10-27 11:27:46 +0000
1.2.2.2	23-Oct-2007	ad	Sync with head.
1.2.2.1	17-Oct-2007	ad	file ofw_bus.h was added on branch vmlocking on 2007-10-23 20:36:03 +0000
1.3.22.1	03-Jul-2010	rmind	sync with head
1.3.20.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.4.72.1	03-Apr-2021	thorpej	Sync with HEAD.
1.1	01-Jul-2011	dyoung	Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split.
1.2	27-Feb-2021	thorpej	Un-do a bunch of misguided code sharing. It's not really shared if it's full of platform-specific #ifdefs: - ofwoea_batinit() is gone; just do what's needed early in macppc / ofppc initppc() functions. - Get a bunch of Mac-specific stuff out of ofwoea_initppc().
1.1	01-Jul-2011	dyoung	branches: 1.1.66; Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split.
1.1.66.1	03-Apr-2021	thorpej	Sync with HEAD.
1.4	13-Feb-2022	martin	PR port-macppc/56091: on G5 macs we currently can not easily make early serial console work, so keep the OF based "failsafe" console but note that we would like to switch over. Once zs attaches, use the new device mapping and do a belated init of the zs console globals, and then switch over to real zs based serial console.
1.3	05-Mar-2021	thorpej	Separate probing for the console device and initializing it, so that ofwoea_initppc() can have more control over which of those steps are performed during initialization. Probing happens before setting up the exception vectors, initializing happens after.
1.2	17-Oct-2007	garbled	branches: 1.2.2; 1.2.4; 1.2.8; 1.2.126; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.1	06-Jun-2007	garbled	branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10; file ofw_cons.h was initially added on branch ppcoea-renovation.
1.1.10.1	25-Oct-2007	bouyer	Sync with HEAD.
1.1.8.1	18-Oct-2007	yamt	sync with head.
1.1.6.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.1.2.1	06-Jun-2007	garbled	Add include files for common oea ofw routines
1.2.126.1	03-Apr-2021	thorpej	Sync with HEAD.
1.2.8.2	06-Nov-2007	matt	sync with HEAD
1.2.8.1	17-Oct-2007	matt	file ofw_cons.h was added on branch matt-armv6 on 2007-11-06 23:20:36 +0000
1.2.4.2	27-Oct-2007	yamt	sync with head.
1.2.4.1	17-Oct-2007	yamt	file ofw_cons.h was added on branch yamt-lazymbuf on 2007-10-27 11:27:46 +0000
1.2.2.2	23-Oct-2007	ad	Sync with head.
1.2.2.1	17-Oct-2007	ad	file ofw_cons.h was added on branch vmlocking on 2007-10-23 20:36:04 +0000
1.7	21-Sep-2025	thorpej	Give each PowerPC OFW platform its own device_register(), which calls into the common ofw_device_register(). ofppc's is a simple wrapper. macppc's, on the other hand, takes care of looking up environmental sensor descriptive information in the OFW device tree and adds those properties directly to the sensor device property dictionaries. This single implementation will replace the duplicated code that's scattered across multiple macppc i2c controller drivers.
1.6	24-Nov-2022	macallan	move ofprint() to powerpc/ofw_machdep.c and make it official now that console output uses locks it needs more of the kernel to function, so for now use direct OF calls for earliest debug output
1.5	02-Nov-2022	andvar	fix various typos in comments and messages.
1.4	02-Mar-2021	thorpej	branches: 1.4.4; - Add a boolean "ofwbootcons_suppress" that, when true, suppresses ofwbootcons I/O (i.e. "doesn't call into OFW"). This allows platform code to ensure that early console I/O doesn't occur in certain critical sections. - When printing the translations, put phys next to virt for easier visual comparisons.
1.3	28-Feb-2021	thorpej	Bump OFW_MAX_TRANSLATIONS from 32 -> 48. 32 was already tight (at least on my Macs), and having having translations for the kernel itself present in the firmware's translation table bumped it over the 32-entry limit.
1.2	19-Feb-2021	thorpej	Shuffle around a couple of things that aren't particularly OEA-specific: - Early bootstrap console initialization moves to ofw_machdep.c, and is called a bit earlier, from ofw_bootstrap(). - Decoding the "translations" property from /chosen/mmu is specified in the general OpenFirmware PowerPC bindings, and is not specific to any particular PowerPC flavor. It's now decoded a bit earlier in ofw_bootstrap(). The interpretation of the mode field of a translation is, however, implementation-specific, so that remains in ofwoea_machdep.c.
1.1	18-Feb-2021	thorpej	Add an ofw_bootstrap() function, called during early bootstrap from ofwinit() to perform additional early initialization in C code. Use this to get the memory config while we're still running in the OpenFirmware client environment, rather than waiting until we've started fiddling with the system state.
1.4.4.2	03-Apr-2021	thorpej	Sync with HEAD.
1.4.4.1	02-Mar-2021	thorpej	file ofw_machdep.h was added on branch thorpej-futex on 2021-04-03 22:28:34 +0000
1.8	01-Feb-2012	matt	Use C89 function prototypes.
1.7	14-Mar-2009	dsl	branches: 1.7.12; 1.7.16; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.6	17-Oct-2007	garbled	branches: 1.6.20; 1.6.28; 1.6.34; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.5	16-Feb-2006	perry	branches: 1.5.24; 1.5.32; 1.5.42; 1.5.44; 1.5.46; 1.5.48; Change "inline" back to "__inline" in .h files -- C99 is still too new, and some apps compile things in C89 mode. C89 keywords stay. As per core@.
1.4	24-Dec-2005	perry	branches: 1.4.2; 1.4.4; 1.4.6; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.3	05-Feb-2001	briggs	branches: 1.3.2; 1.3.42; Tsubai has convinced me that openpic_init() should remain machine-dependant as the details might differ between archs, and passing the various options leads to some clutter.
1.2	04-Feb-2001	briggs	Build with -Wall -Wetc.
1.1	02-Feb-2001	briggs	Split OpenPIC support into powerpc so ports only need minimal custom configuration. openpic_init() now takes a single argument that is the base of the OpenPIC register space.
1.3.42.1	27-Oct-2007	yamt	sync with head.
1.3.2.2	11-Feb-2001	bouyer	Sync with HEAD.
1.3.2.1	05-Feb-2001	bouyer	file openpic.h was added on branch thorpej_scsipi on 2001-02-11 19:11:34 +0000
1.4.6.1	22-Apr-2006	simonb	Sync with head.
1.4.4.1	09-Sep-2006	rpaulo	sync with head
1.4.2.1	18-Feb-2006	yamt	sync with head.
1.5.48.1	25-Oct-2007	bouyer	Sync with HEAD.
1.5.46.1	18-Oct-2007	yamt	sync with head.
1.5.44.1	06-Nov-2007	matt	sync with HEAD
1.5.42.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.5.32.1	03-May-2007	garbled	Move the functions down from openpic.c into pic_openpic.c, as there really is no need to have them over there when all the interrupt routines will be using pic_openpic.c Change the openpic setup to set all the irqs except 0 to negative polarity. Set the spurious vector reg to 0xff. Emit a nice printf showing the version of the openpic, and getrid of the maxint thing. Add a global, primary_pic, so machines can elect any registered pic as the primary interrupt controller. Clean up a few nits in pic_prepivr to make it more similar to the openpic one, add a prototype for the setup_prepivr function, etc etc.
1.5.24.1	23-Oct-2007	ad	Sync with head.
1.6.34.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.6.28.1	28-Apr-2009	skrll	Sync with HEAD.
1.6.20.1	04-May-2009	yamt	sync with head.
1.7.16.1	18-Feb-2012	mrg	merge to -current.
1.7.12.1	17-Apr-2012	yamt	sync with head
1.8	17-Jan-2008	garbled	Add support to ofppc for the IBM 7044-270 machine. This is a POWER3-II based machine. Currently the kernel to run on this machine is incompatible with the standard GENERIC kernel, so for now, we have a separate GENERIC_B64. Eventually, I hope to combine the two. Please note, this is a port of 32bit ofppc, not a powerpc64 port. Thanks to Matt Thomas and Kevin Bowling for helping to make this port possible. Summary of changes: Change ofwpci to use the ofmethod config for configuring the PCI bus, rather than indirect configuration. Move the wiring of the interrupt controllers from at the start of the boot, into the configuration of the first PCI bus. Rewrite the map_isa_ioregs() hack to work on a machine without BATs Fix a ton of bugs in the genofw_find_pics routine, and in the map_space code. Split the pic_openpic into openpic_common and pic_openpic. Create a new pic_distopenpic driver, for the distributed openpic found on some newer IBM machines. Fix a bad panic in pmap_extract on 64bit bridge mode
1.7	17-Oct-2007	garbled	branches: 1.7.2; 1.7.8; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.6	11-Dec-2005	christos	branches: 1.6.30; 1.6.38; 1.6.48; 1.6.50; 1.6.52; 1.6.54; merge ktrace-lwp.
1.5	13-Feb-2004	wiz	branches: 1.5.16; Uppercase CPU, plural is CPUs.
1.4	06-Aug-2002	chs	branches: 1.4.6; fix the calculation of the address of the IPI dispatch register.
1.3	30-Aug-2001	briggs	branches: 1.3.6; 1.3.14; defines for OPENPIC_ICR / serial mode.
1.2	05-Feb-2001	briggs	branches: 1.2.2; 1.2.6; Tsubai has convinced me that openpic_init() should remain machine-dependant as the details might differ between archs, and passing the various options leads to some clutter.
1.1	02-Feb-2001	briggs	Split OpenPIC support into powerpc so ports only need minimal custom configuration. openpic_init() now takes a single argument that is the base of the OpenPIC register space.
1.2.6.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.2.6.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.2.2	11-Feb-2001	bouyer	Sync with HEAD.
1.2.2.1	05-Feb-2001	bouyer	file openpicreg.h was added on branch thorpej_scsipi on 2001-02-11 19:11:35 +0000
1.3.14.1	31-Aug-2002	gehenna	catch up with -current.
1.3.6.2	06-Aug-2002	nathanw	Catch up with powerpc rototilling.
1.3.6.1	30-Aug-2001	nathanw	file openpicreg.h was added on branch nathanw_sa on 2002-08-06 22:47:09 +0000
1.4.6.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.6.2	18-Sep-2004	skrll	Sync with HEAD.
1.4.6.1	03-Aug-2004	skrll	Sync with HEAD
1.5.16.2	21-Jan-2008	yamt	sync with head
1.5.16.1	27-Oct-2007	yamt	sync with head.
1.6.54.1	25-Oct-2007	bouyer	Sync with HEAD.
1.6.52.1	18-Oct-2007	yamt	sync with head.
1.6.50.2	23-Mar-2008	matt	sync with HEAD
1.6.50.1	06-Nov-2007	matt	sync with HEAD
1.6.48.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.6.38.1	10-Oct-2007	garbled	Change pic_prepivr around a bit. Handle the default IRQ 7 from the 8259 better, and add a new motivr_get_irq(). The motorola machines require an actual read from the 8259 for PCI irqs, so in that case, we read the 8259, and then read the IVR to ack the irq. Move i8259_get_irq() to i8259_common.c for above. Fix some minor typos in the chip id's for prep residual. Fix ibmnws and prep to properly initialize the prep ivr depending on if the machine is motorola, or IBM based. Tested on a 7043 and an MTX604
1.6.30.1	23-Oct-2007	ad	Sync with head.
1.7.8.1	19-Jan-2008	bouyer	Sync with HEAD
1.7.2.1	18-Feb-2008	mjf	Sync with HEAD.
1.34	31-May-2021	simonb	Include "opt_param.h" (ifdef _KERNEL_OPT) everywhere that MSGBUFSIZE is referenced since some sources include <machine/param.h>.
1.33	06-Jul-2020	rin	branches: 1.33.6; Style and cosmetic changes. No binary changes intended.
1.32	21-Feb-2020	rin	Reduce UPAGES from 2 to 1 for ibm4xx, which was originally 1 and bumped to 2 in rev 1.29: http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/powerpc/include/param.h#rev1.29 Since page size is 16KB on ibm4xx, USPACE is still 16KB, which is the same size as on other powerpc processors. This avoids kernel crash described in PR kern/54994. Also, even if the PR is resolved, fork(2) easily fails with ENOMEM if UPAGES is 2, which requires physically contiguous pages for u-area. No bad side effect is observed as far as I can see. XXX Even with this commit, kern/54994 still critically affects other archs with __HAVE_CPU_UAREA_ROUTINES, i.e., alpha, mips, powerpc/{oea,booke}, and riscv.
1.31	07-Jan-2019	jdolecek	branches: 1.31.6; move DEV_BSIZE, DEV_BSHIFT out of MD param.h, they are same on all ports also move BLKDEV_IOSIZE, MAXPHYS, but allow override since some ports have different value (powerpc uses NBPG for BLKDEV_IOSIZE, sun2/sun3 have lower MAXPHYS)
1.30	14-Jan-2017	christos	branches: 1.30.14; 1.30.16; belatedly fix constants for ppc64 (this does not define __arch64__ like sparc does?)
1.29	29-Jan-2013	kiyohara	branches: 1.29.14; 1.29.18; More stack for ibm4xx slow machines.
1.28	23-Sep-2012	mrg	increase powerpc NKMEMPAGES_MAX_DEFAULT to 256MB. remove the macppc overrides that are now the same as the powerpc default.
1.27	30-Jan-2012	matt	branches: 1.27.2; 1.27.4; 1.27.6; PowerPC wants 16-byte aligned stacks (for AltiVec).
1.26	24-Jan-2012	christos	Use and define ALIGN() ALIGN_POINTER() and STACK_ALIGN() consistently, and avoid definining them in 10 different places if not needed.
1.25	20-Jan-2012	joerg	Change CMSG_SPACE and CMSG_LEN to provide Integer Constant Expressions again. This was changed in sys/socket.h r1.51 to work around fallout from the IPv6 aux data migration. It broke the historic ABI on some platforms. This commit restores compatibility for netbsd32 code on such platforms and provides a template for future changes to the CMSG_* alignment. Revert PCC/Clang workarounds in postfix and tmux.
1.24	20-Jun-2011	matt	branches: 1.24.2; 1.24.6; Cleanup powerpc param.h. If compiling a MODULE, ignore port-specific stuff. Only include <machine/cpu.h> in <powerpc/param.h> at the end.
1.23	05-Mar-2011	matt	branches: 1.23.2; If _KERNEL is not defined, force MACHINE to be "powerpc". Userland should be using uname/sysctl to get this value.
1.22	22-Mar-2010	mrg	branches: 1.22.2; default powerpc64 mbufs to 512 bytes, like other 64 bit platforms. from dennis.c.ferguson@gmail.com in PR#43028.
1.21	08-Feb-2010	joerg	branches: 1.21.2; Remove separate mb_map. The nmbclusters is computed at boot time based on the amount of physical memory and limited by NMBCLUSTERS if present. Architectures without direct mapping also limit it based on the kmem_map size, which is used as backing store. On i386 and ARM, the maximum KVA used for mbuf clusters is limited to 64MB by default. The old default limits and limits based on GATEWAY have been removed. key_registered_sb_max is hard-wired to a value derived from 2048 clusters.
1.20	28-Aug-2006	yamt	branches: 1.20.60; 1.20.80; - remove unused bdbtofsb. - move the following macros from MD headers to sys/param.h. ctod dtoc ctob btoc dbtob btodb
1.19	11-Dec-2005	christos	branches: 1.19.4; 1.19.8; merge ktrace-lwp.
1.18	09-Dec-2004	matt	branches: 1.18.10; Make MSIZE and MCLSHIFT overrideable in <machine/param.h>
1.17	04-Mar-2003	matt	branches: 1.17.2; Re-arrange things in evbppc & powerpc to support OEA-based eval boards in evbppc. OEA-based board(s) to be added later.
1.16	03-Feb-2003	matt	More cleanup for OLDPMAP.
1.15	19-Jan-2003	matt	ALIGN should use u_long, not u_int
1.14	06-Sep-2002	matt	Allow MAXPHYS to be overriden. Increase the default MSGBUFSIZE to 2 pages.
1.13	09-Mar-2002	chs	switch all mpc6xx powerpc ports to NEWPMAP by default. the old pmap is still available with the OLDPMAP option.
1.12	10-Jun-2001	tsubai	branches: 1.12.2; 1.12.8; Make the new pmap optional. Use the old (stable!) pmap by default.
1.11	10-Jun-2001	briggs	Up the default # of NMBCLUSTERS to 2048 (GATEWAY) & 1024 (non-GATEWAY) from 512/256.
1.10	06-Jun-2001	matt	Introduce a new & faster pmap for the MPC6xx (60x, 7xx, 7xxx) PPC CPUs. Move MPC6xx dependent header files to powerpc/include/mpc6xx/
1.9	30-May-2001	mrg	use _KERNEL_OPT
1.8	30-Jun-2000	itojun	branches: 1.8.2; raise MSIZE from 128 to 256. - for sizeof(void *) == 8 arch, this is mandatory. MHLEN is too small already (less than 80) and there are chances for unwanted packet loss due to m_pullup restriction. - for other cases, the change should avoid allocating clusters in most cases (even when you have IPv4 IPsec tunnel, or IPv6 with moderate amount of extension header) portmasters: if your arch chokes with the change (high memory usage or whatever), please backout the change for your arch.
1.7	11-Feb-2000	thorpej	branches: 1.7.4; Update for the NKMEMPAGES changes.
1.6	04-Dec-1999	ragge	CL* discarding.
1.5	16-Aug-1998	wrstuden	branches: 1.5.12; 1.5.18; As ovbcopy & bcopy are now done in terms of mem* routines, it makes no sense to "#define ovbcopy bcopy".
1.4	28-May-1998	sakamoto	Rename NetBSD/powerpc to NetBSD/ofppc. New sys/arch/powerpc with PowerPC-generic stuff.
1.3	29-Apr-1998	thorpej	Pull in opt_gateway.h as appropriate.
1.2	24-Feb-1997	fvdl	Define ALIGNED_POINTER
1.1	30-Sep-1996	ws	branches: 1.1.6; PowerPC port
1.1.6.1	12-Mar-1997	is	Merge in changes from Trunk
1.5.18.2	27-Dec-1999	wrstuden	Pull up to last week's -current.
1.5.18.1	21-Dec-1999	wrstuden	Initial commit of recent changes to make DEV_BSIZE go away. Runs on i386, needs work on other arch's. Main kernel routines should be fine, but a number of the stand programs need help. cd, fd, ccd, wd, and sd have been updated. sd has been tested with non-512 byte block devices. vnd, raidframe, and lfs need work. Non 2**n block support is automatic for LKM's and conditional for kernels on "options NON_PO2_BLOCKS".
1.5.12.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.7.4.1	23-Jul-2000	itojun	pullup from main trunc (approved by releng-1-5) raise MSIZE from 128 to 256. - for sizeof(void *) == 8 arch, this is mandatory. MHLEN is too small already (less than 80) and there are chances for unwanted packet loss due to m_pullup restriction. - for other cases, the change should avoid allocating clusters in most cases (even when you have IPv4 IPsec tunnel, or IPv6 with moderate amount of extension header) portmasters: if your arch chokes with the change (high memory usage or whatever), please backout the change for your arch. 1.1 -> 1.2 syssrc/sys/arch/amigappc/include/param.h 1.13 -> 1.14 syssrc/sys/arch/arc/include/param.h 1.1 -> 1.2 syssrc/sys/arch/arm26/include/param.h 1.17 -> 1.18 syssrc/sys/arch/arm32/include/param.h 1.6 -> 1.7 syssrc/sys/arch/bebox/include/param.h 1.4 -> 1.5 syssrc/sys/arch/cobalt/include/param.h 1.4 -> 1.5 syssrc/sys/arch/evbsh3/include/param.h 1.2 -> 1.3 syssrc/sys/arch/hpcmips/include/param.h 1.40 -> 1.41 syssrc/sys/arch/i386/include/param.h 1.7 -> 1.8 syssrc/sys/arch/m68k/include/param.h 1.9 -> 1.10 syssrc/sys/arch/macppc/include/param.h 1.4 -> 1.5 syssrc/sys/arch/mmeye/include/param.h 1.6 -> 1.7 syssrc/sys/arch/newsmips/include/param.h 1.7 -> 1.8 syssrc/sys/arch/ofppc/include/param.h 1.23 -> 1.24 syssrc/sys/arch/pc532/include/param.h 1.32 -> 1.33 syssrc/sys/arch/pmax/include/param.h 1.7 -> 1.8 syssrc/sys/arch/powerpc/include/param.h 1.1 -> 1.2 syssrc/sys/arch/prep/include/param.h 1.1 -> 1.2 syssrc/sys/arch/sgimips/include/param.h 1.3 -> 1.4 syssrc/sys/arch/sh3/include/param.h 1.44 -> 1.45 syssrc/sys/arch/sparc/include/param.h 1.21 -> 1.22 syssrc/sys/arch/sparc64/include/param.h 1.43 -> 1.44 syssrc/sys/arch/vax/include/param.h
1.8.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.12.8.3	17-Sep-2002	nathanw	Catch up to -current.
1.12.8.2	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.12.8.1	10-Jun-2001	nathanw	file param.h was added on branch nathanw_sa on 2002-04-01 07:42:04 +0000
1.12.2.2	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.12.2.1	16-Mar-2002	jdolecek	Catch up with -current.
1.17.2.1	18-Dec-2004	skrll	Sync with HEAD.
1.18.10.1	30-Dec-2006	yamt	sync with head.
1.19.8.1	03-Sep-2006	yamt	sync with head.
1.19.4.1	09-Sep-2006	rpaulo	sync with head
1.20.80.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.20.60.2	11-Aug-2010	yamt	sync with head.
1.20.60.1	11-Mar-2010	yamt	sync with head
1.21.2.2	06-Mar-2011	rmind	sync with head (and fix few botches with this)
1.21.2.1	30-May-2010	rmind	sync with head
1.22.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.23.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.24.6.1	18-Feb-2012	mrg	merge to -current.
1.24.2.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.24.2.2	30-Oct-2012	yamt	sync with head
1.24.2.1	17-Apr-2012	yamt	sync with head
1.27.6.3	03-Dec-2017	jdolecek	update from HEAD
1.27.6.2	25-Feb-2013	tls	resync with head
1.27.6.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.27.4.1	01-Nov-2012	matt	sync with netbsd-6-0-RELEASE.
1.27.2.1	01-Oct-2012	riz	Pull up following revision(s) (requested by mrg in ticket #575): sys/arch/powerpc/include/param.h: revision 1.28 sys/arch/macppc/include/param.h: revision 1.20 increase powerpc NKMEMPAGES_MAX_DEFAULT to 256MB. remove the macppc overrides that are now the same as the powerpc default.
1.29.18.1	20-Mar-2017	pgoyette	Sync with HEAD
1.29.14.1	05-Feb-2017	skrll	Sync with HEAD
1.30.16.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.30.16.1	10-Jun-2019	christos	Sync with HEAD
1.30.14.1	18-Jan-2019	pgoyette	Synch with HEAD
1.31.6.1	29-Feb-2020	ad	Sync with head.
1.33.6.1	17-Jun-2021	thorpej	Sync w/ HEAD.
1.23	27-Oct-2021	christos	Need frame.h
1.22	18-Jan-2011	matt	Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.21	24-Dec-2005	perry	branches: 1.21.100; 1.21.104; 1.21.106; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.20	11-Dec-2005	christos	merge ktrace-lwp.
1.19	22-Feb-2005	matt	branches: 1.19.4; Don't clear PCB_FPU/PCB_ALTIVEC when releasing the FPU/AltiVec unit. Add new flags to indicate whether the PCB currently owns the FPU/AltiVec unit.
1.18	16-Apr-2004	matt	branches: 1.18.4; 1.18.6; Add a SAVE/DISCARD flag to save_{fpu,vec}_lwp. Use it appropriately. Nuke struct fpu and use struct fpreg instead (except for the names, they were identical). On MP machines, this will avoid an unneeded IPI to save the register contents that are about to discarded.
1.17	04-Apr-2004	matt	The FP exception mode bits from the MSR will be stored in pcb_flags. From there, they will copied to MSR as needed (when FP is enabled). They will be cleared from the MSR when the lwp loses the FPU. Hence they need to be stored someplace else.
1.16	12-Aug-2003	matt	Cleanup/rework cpu_switch*, switch_exit, Idle routine. Remove pcb_psl since it was write-only. When setting up a process, make sure the fake callframes are properly linked together. Only lower SPL when in Idle loop. Raise spl to previous level (which would be IPL_SCHED) when exiting Idle loop. Never lower SPL anyplace else.
1.15	12-Aug-2003	matt	Nuke ci_curpm and curpm. Nuke pcb_pmreal. Those were use for spill stacks and those no longer exist. for few uses that need CURPM, use CURPCB/PCB_PM
1.14	05-Mar-2003	matt	branches: 1.14.2; Make AltiVec registers available via ptrace/procfs. Simplify AltiVec processing. Add a "common" procfs_machdep.c for PowerPC platforms. Even though it is supposed to be port specific, most (if not all) PowerPC ports can just use the common one.
1.13	02-Feb-2003	matt	Perform a rototill of the powerpc code. Mandate use of SPRG0 to store a pointer to current cpu's cpu_info structure. Use cpu_info for intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK to std.<platform>. Change faultbuf to a struct instead of an array. On MPC6XX cpus, stop using the vector page for temporary space and use reserved space in cpu_info.
1.12	19-Jan-2003	matt	Cast to register_t instead of int to be nicer for LP64. Simplify copyin/copyout/copyinstr/copyoutstr. Fix bug where the user virtual address was not updated so that if the user's buffer crossed a segment boundary, the wrong data could be copied. Localize USER_SR to the ILP32 version of setusr/unsetusr.
1.11	03-Nov-2002	matt	Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.10	28-Jul-2002	chs	rearrange the PCB structure a bit so it's easier to look at in ddb.
1.9	05-Jul-2002	matt	Peform a rototill over the powerpc-based ports. Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT initialization code. Add user Altivec support. Fix calls to OF_call_method in macppc/macppc/machdep.c. Use ci_fpuproc in cpu_info instead of separate fpuproc. Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
1.8	30-Apr-2001	martin	branches: 1.8.2; 1.8.8; 1.8.16; Avoid nesting structure declarations, where the nested structur is used at the global level later. Besides stylistic matters, this actually breaks C++ programs (indirectly) using this header.
1.7	22-Mar-2001	tsubai	Merge my MP tree. At this point, Daystar dual 604 card (i.e. Power Macintosh 9500/180MP and 9600/200MP) runs at least into single-user mode, possibly multi-user mode (not stable yet).
1.6	25-Nov-2000	matt	branches: 1.6.2; Preliminary AltiVec support.
1.5	06-Jul-2000	tsubai	Make it compile with "options MULTIPROCESSOR".
1.4	04-Jun-2000	tsubai	branches: 1.4.2; Add fpreg area in struct md_coredump.
1.3	07-Dec-1999	danw	branches: 1.3.2; Fix "FPCSR" to "FPSCR". ("Floating Point Status and Control Register")
1.2	22-Nov-1998	ws	branches: 1.2.10; 1.2.16; The last fix in trap.c missed R2. And correct the size of the fault buffer while being here.
1.1	30-Sep-1996	ws	PowerPC port
1.2.16.1	27-Dec-1999	wrstuden	Pull up to last week's -current.
1.2.10.3	27-Mar-2001	bouyer	Sync with HEAD.
1.2.10.2	08-Dec-2000	bouyer	Sync with HEAD.
1.2.10.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.3.2.1	22-Jun-2000	minoura	Sync w/ netbsd-1-5-base.
1.4.2.1	01-May-2001	he	Pull up revision 1.8 (via patch, requested by martin): Avoid nesting structure declarations, to be friendly to C++ code.
1.6.2.2	21-Jun-2001	nathanw	Catch up to -current.
1.6.2.1	09-Apr-2001	nathanw	Catch up with -current.
1.8.16.2	31-Aug-2002	gehenna	catch up with -current.
1.8.16.1	16-Jul-2002	gehenna	catch up with -current.
1.8.8.4	11-Nov-2002	nathanw	Catch up to -current
1.8.8.3	01-Aug-2002	nathanw	Catch up to -current.
1.8.8.2	05-Nov-2001	briggs	Initial SA support for ppc. Test-booted on sandpoint, macppc, & walnut. mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein <kleink@netbsd.org>.
1.8.8.1	30-Apr-2001	briggs	file pcb.h was added on branch nathanw_sa on 2001-11-05 19:46:17 +0000
1.8.2.1	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.14.2.4	04-Mar-2005	skrll	Sync with HEAD. Hi Perry!
1.14.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.14.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.14.2.1	03-Aug-2004	skrll	Sync with HEAD
1.18.6.1	19-Mar-2005	yamt	sync with head. xen and whitespace. xen part is not finished.
1.18.4.1	29-Apr-2005	kent	sync with -current
1.19.4.1	21-Jun-2006	yamt	sync with head.
1.21.106.1	06-Jun-2011	jruoho	Sync with HEAD.
1.21.104.2	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.21.104.1	07-Jan-2011	matt	Extend faultbuf to include msr. Add a holder for usprg0
1.21.100.1	05-Mar-2011	rmind	sync with head
1.15	19-Apr-2018	christos	s/static inline/static __inline/g for consistency.
1.14	19-Oct-2016	nonaka	branches: 1.14.14; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
1.13	29-Mar-2014	christos	branches: 1.13.6; 1.13.10; make pci_intr_string and eisa_intr_string take a buffer and a length instead of relying in local static storage.
1.12	17-Aug-2011	matt	branches: 1.12.2; 1.12.12; 1.12.16; First pass of the new PCI MSI/MSI ABI definitions. (return EOPNOTSUPP for now).
1.11	22-Jun-2011	matt	Add support pci_intr_setattr. Export non-inline version of pci api for modules (_MODULE is defined). Fix definition of pc_conf_hook and pc_conf_interrupt. Switch to using inlines instead of macros. Switch ibm4xx to use <powerpc/pci_machdep.h>
1.10	04-Apr-2011	dyoung	Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9), pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match predicate passed to pciide_compat_intr_establish() should ever modify their pci_attach_args argument, so make their pci_attach_args arguments const and deal with the fallout throughout the kernel. For the most part, these changes add a 'const' where there was no 'const' before, however, some drivers and MD code used to modify pci_attach_args. Now those drivers either copy their pci_attach_args and modify the copy, or refrain from modifying pci_attach_args: Xen: according to Manuel Bouyer, writing to pci_attach_args in pci_intr_map() was a leftover from Xen 2. Probably a bug. I stopped writing it. I have not tested this change. siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args. Probably a bug. I use a temporary variable. I have not tested this change. slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args. Probably a bug. Use a local pci_attach_args. I have not tested this change. viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the caller's pci_attach_args. Probably a bug. Make a local copy of the caller's pci_attach_args and modify the copy. I have not tested this change. While I'm here, make pci_mapreg_submap() static. With these changes in place, I have tested the compilation of these kernels: alpha GENERIC amd64 GENERIC XEN3_DOM0 arc GENERIC atari HADES MILAN-PCIIDE bebox GENERIC cats GENERIC cobalt GENERIC evbarm-eb NSLU2 evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200 KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425 evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3 evbmips64-el XLSATX evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266 OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT hp700 GENERIC i386 ALL XEN3_DOM0 XEN3_DOMU ibmnws GENERIC macppc GENERIC mvmeppc GENERIC netwinder GENERIC ofppc GENERIC prep GENERIC sandpoint GENERIC sgimips GENERIC32_IP2x sparc GENERIC_SUN4U KRUPS sparc64 GENERIC As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels with or without my patches in place: ### evbmips-el GDIUM nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop ### evbarm-el MPCSA_GENERIC src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc' ### ia64 GENERIC /tmp/genassym.28085/assym.c: In function 'f111': /tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb' /tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type ### sgimips GENERIC32_IP3x crmfb.o: In function `crmfb_attach': crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid' crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid' crmfb.c:(.text+0x234c): undefined reference to `edid_parse' crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse' crmfb.c:(.text+0x2354): undefined reference to `edid_print' crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
1.9	13-Dec-2010	matt	branches: 1.9.2; Change definition of pc_bus_maxdevs to get a void * instead a pci_chipset_tag_t to match its use in pci_bus_maxdevs. This makes it the same as pci_conf_read and pci_conf_write. Change all struct device * to device_t. [Obviously nothing ever used the first argument to pc_bus_maxdevs since it could have never worked because it wasn't being passed a pci_chipset_tag_t.]
1.8	28-Apr-2008	martin	branches: 1.8.22; 1.8.26; Remove clause 3 and 4 from TNF licenses
1.7	17-Jan-2008	garbled	branches: 1.7.6; 1.7.8; 1.7.10; Add support to ofppc for the IBM 7044-270 machine. This is a POWER3-II based machine. Currently the kernel to run on this machine is incompatible with the standard GENERIC kernel, so for now, we have a separate GENERIC_B64. Eventually, I hope to combine the two. Please note, this is a port of 32bit ofppc, not a powerpc64 port. Thanks to Matt Thomas and Kevin Bowling for helping to make this port possible. Summary of changes: Change ofwpci to use the ofmethod config for configuring the PCI bus, rather than indirect configuration. Move the wiring of the interrupt controllers from at the start of the boot, into the configuration of the first PCI bus. Rewrite the map_isa_ioregs() hack to work on a machine without BATs Fix a ton of bugs in the genofw_find_pics routine, and in the map_space code. Split the pic_openpic into openpic_common and pic_openpic. Create a new pic_distopenpic driver, for the distributed openpic found on some newer IBM machines. Fix a bad panic in pmap_extract on 64bit bridge mode
1.6	26-Dec-2007	mrg	move extern struct powerpc_bus_dma_tag pci_bus_dma_tag; where everyone can see it. fixes ofppc builds.
1.5	25-Dec-2007	macallan	get rid of macppc's private pci_bus_dma_tag
1.4	26-Oct-2007	garbled	branches: 1.4.2; 1.4.4; 1.4.6; 1.4.8; 1.4.12; Add code to properly detect the interrupt mapping on the PegasosII, and any other OFW machine that fails our first two methods.
1.3	25-Oct-2007	garbled	Add a bunch of fixes and minor rewrites to ofppc to bring it closer to working properly. This is still a work in progress, and all work so far has been based on the PegasosII machne. 1) Rewrite how the ISA memory and IO space maps are found. More work will still need to be done in this area. 2) Add a new OFW method of pci configuration. So far I can only get this to work on the primary PCI bus on the Pegasos. Unsure if this is a pegasos bug or a code bug. 3) Add the rtas device to ofppc, and add an "rtas_reboot" function to rtas to allow me to reboot the PegasosII. The rtas driver works, and is a great start but needs to be changed slightly to allow easier access to the functions from outside the driver. 4) Fix a number of bugs that existed in the shared PCI code for ofw that probably weren't tickled by macppc. There is much much more left to do here, this is all still a work in progress, but this commit will allow other people to play around with the code if they want to.
1.2	17-Oct-2007	garbled	branches: 1.2.2; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.1	01-May-2007	garbled	branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10; file pci_machdep.h was initially added on branch ppcoea-renovation.
1.1.10.2	13-Nov-2007	bouyer	Sync with HEAD
1.1.10.1	25-Oct-2007	bouyer	Sync with HEAD.
1.1.8.1	18-Oct-2007	yamt	sync with head.
1.1.6.2	28-Oct-2007	joerg	Sync with HEAD.
1.1.6.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.1.2.6	21-Jun-2007	garbled	Adapt for addition of pci_machdep_ofw.c
1.1.2.5	09-May-2007	garbled	Convert pmppc to generic pci. Also fix the prototype for pci_conf_interrupt while I'm here.
1.1.2.4	08-May-2007	rjs	Move declarations to header.
1.1.2.3	06-May-2007	macallan	switch macppc over to generic PCI code from arch/powerpc/pci
1.1.2.2	01-May-2007	garbled	Add a generic pci_intr_map() function (looks like macppc and ibmnws use this)
1.1.2.1	01-May-2007	garbled	Add the generic pci_machdep.h header file, which allows a port to use the generic pci functions.
1.2.2.4	03-Dec-2007	ad	Sync with HEAD.
1.2.2.3	03-Dec-2007	ad	Sync with HEAD.
1.2.2.2	23-Oct-2007	ad	Sync with head.
1.2.2.1	17-Oct-2007	ad	file pci_machdep.h was added on branch vmlocking on 2007-10-23 20:36:04 +0000
1.4.12.2	19-Jan-2008	bouyer	Sync with HEAD
1.4.12.1	02-Jan-2008	bouyer	Sync with HEAD
1.4.8.1	26-Dec-2007	ad	Sync with head.
1.4.6.4	23-Mar-2008	matt	sync with HEAD
1.4.6.3	09-Jan-2008	matt	sync with HEAD
1.4.6.2	06-Nov-2007	matt	sync with HEAD
1.4.6.1	26-Oct-2007	matt	file pci_machdep.h was added on branch matt-armv6 on 2007-11-06 23:20:37 +0000
1.4.4.1	18-Feb-2008	mjf	Sync with HEAD.
1.4.2.3	21-Jan-2008	yamt	sync with head
1.4.2.2	27-Oct-2007	yamt	sync with head.
1.4.2.1	26-Oct-2007	yamt	file pci_machdep.h was added on branch yamt-lazymbuf on 2007-10-27 11:27:48 +0000
1.7.10.1	16-May-2008	yamt	sync with head.
1.7.8.1	18-May-2008	yamt	sync with head.
1.7.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.8.26.1	07-Jan-2011	matt	Change bus_maxdevs to be passed pc->pc_conf_v instead pc (e.g. like the rest of the conf calls).
1.8.22.2	21-Apr-2011	rmind	sync with head
1.8.22.1	05-Mar-2011	rmind	sync with head
1.9.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.12.16.1	18-May-2014	rmind	sync with head
1.12.12.2	03-Dec-2017	jdolecek	update from HEAD
1.12.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.12.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.13.10.1	04-Nov-2016	pgoyette	Sync with HEAD
1.13.6.1	05-Dec-2016	skrll	Sync with HEAD
1.14.14.1	22-Apr-2018	pgoyette	Sync with HEAD
1.10	16-Feb-2022	riastradh	powerpc: Sprinkle "memory" clobbers on eieio and nearby asm blocks. Otherwise the compiler may reorder these around loads and stores, which mostly defeats the purpose. `asm volatile' just ensures the instruction isn't _deleted_; it may still move around.
1.9	06-Jul-2020	rin	Include missing opt_ppcarch.h.
1.8	20-Feb-2020	rin	eieio is implemented as sync on 40x. Therefore, "sync; eieio" and "eieio; sync" can be replaced by a single sync.
1.7	30-Jan-2012	matt	branches: 1.7.48; 1.7.52; 1.7.54; Switch to using ANSI prototypes.
1.6	14-Mar-2009	dsl	branches: 1.6.12; 1.6.16; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.5	16-Feb-2006	perry	branches: 1.5.72; 1.5.80; 1.5.86; Change "inline" back to "__inline" in .h files -- C99 is still too new, and some apps compile things in C89 mode. C89 keywords stay. As per core@.
1.4	24-Dec-2005	perry	branches: 1.4.2; 1.4.4; 1.4.6; __asm__ -> __asm __const__ -> const __inline__ -> inline __volatile__ -> volatile
1.3	24-Dec-2005	perry	Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.2	27-May-2001	matt	branches: 1.2.8; 1.2.40; Change _MACHINE_PIO_H to _POWERPC_PIO_H
1.1	05-Feb-2001	briggs	branches: 1.1.2; 1.1.4; Share a single pio.h instead of having 4 nearly-identical copies.
1.1.4.1	21-Jun-2001	nathanw	Catch up to -current.
1.1.2.2	11-Feb-2001	bouyer	Sync with HEAD.
1.1.2.1	05-Feb-2001	bouyer	file pio.h was added on branch thorpej_scsipi on 2001-02-11 19:11:35 +0000
1.2.40.1	21-Jun-2006	yamt	sync with head.
1.2.8.2	27-May-2001	matt	Change _MACHINE_PIO_H to _POWERPC_PIO_H
1.2.8.1	27-May-2001	matt	file pio.h was added on branch nathanw_sa on 2001-05-27 20:59:16 +0000
1.4.6.1	22-Apr-2006	simonb	Sync with head.
1.4.4.1	09-Sep-2006	rpaulo	sync with head
1.4.2.1	18-Feb-2006	yamt	sync with head.
1.5.86.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.5.80.1	28-Apr-2009	skrll	Sync with HEAD.
1.5.72.1	04-May-2009	yamt	sync with head.
1.6.16.1	18-Feb-2012	mrg	merge to -current.
1.6.12.1	17-Apr-2012	yamt	sync with head
1.7.54.1	29-Feb-2020	ad	Sync with head.
1.7.52.1	25-Feb-2020	martin	Pull up following revision(s) (requested by rin in ticket #730): sys/arch/powerpc/conf/files.powerpc: revision 1.93 sys/arch/powerpc/include/pio.h: revision 1.8 sys/arch/powerpc/pic/intr.c: revision 1.27 sys/arch/powerpc/powerpc/bus_dma.c: revision 1.50 sys/arch/powerpc/powerpc/pio_subr.S: revision 1.17 Add PPC_IBM440 flag as 440 is significantly different from 40x processors. (It may be more easily supported by booke than by ibm4xx.) - eieio is implemented as sync on 40x. Therefore, "sync; eieio" and "eieio; sync" can be replaced by a single sync.
1.7.48.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.43	15-Dec-2023	rin	powerpc: Make sure direct-mapped buffer fits within correct range For OEA and OEA64_BRIDGE, only first 3GiB memory is direct-mapped. Part of PR kern/57621
1.42	07-May-2022	rin	branches: 1.42.4; Try to fix PV tracking support. * For oea (with real PV tracking support): Define __HAVE_PMAP_PV_TRACK. Otherwise, pmap_pv_init() is not called by uvm_init(). * For booke and ibm4xx (without PV tracking support): For MODULAR kernel and modules, define __HAVE_PMAP_PV_TRACK together with PMAP_PV_TRACK_ONLY_STUBS, so that modules can be shared with oea. Note that PMAP_PV_TRACK_ONLY_STUBS can be used even for oea, as a compile-time option to strip real PV tracking support.
1.41	16-Feb-2022	riastradh	powerpc: Implement pv-tracking for unmanaged pages. Needed for drm.
1.40	06-Jul-2020	rin	Fix comments. No binary changes.
1.39	27-Jun-2020	rin	Fix MODULAR support for ibm4xx by providing __nothing as VM_MDPAGE_INIT().
1.38	20-Jun-2011	matt	Readd powerpc/include/vmparam.h to the set lists Export it to powerpc/include.h Protect pmap.h and vmparam.h from getting an #error when included from userland. Export safe definitions of VM_MAXUSER_ADDRESS, VM_MIN_ADDRESS, VM_MAX_ADDRESS when _RUMPKERNEL is defined.
1.37	20-Jun-2011	matt	PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.36	20-Jun-2011	matt	Add #error for unknown PPC variant Now that oea calls cpu_fixup_stubs, we don't need pmap_fixup_stubs.
1.35	09-Mar-2010	matt	branches: 1.35.8; Include BookE version of pmap.h
1.34	09-Dec-2008	pooka	branches: 1.34.4; Make pmap_kernel() a MI macro for struct pmap *kernel_pmap_ptr, which is now the "API" provided by the pmap module. pmap_kernel() remains as the syntactic sugar. Bonus cosmetics round: move all the pmap_t pointer typedefs into uvm_pmap.h. Thanks to Greg Oster for providing cpu muscle for doing test builds.
1.33	05-Aug-2006	sanjayl	branches: 1.33.58; 1.33.62; 1.33.68; 1.33.70; 1.33.82; 1st cut of Powermac G5 support (uses bridge mode).
1.32	05-Feb-2003	matt	branches: 1.32.18; 1.32.32; 1.32.36; Don't define pmap_t if _LOCORE is defined.
1.31	04-Feb-2003	matt	LKM's need a pmap_t typedef but there's no PPC_xxx to defined which pmap.h to include. So just declare the pmap_t and don't do anything else.
1.30	03-Feb-2003	matt	Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.29	03-Feb-2003	matt	More cleanup for OLDPMAP.
1.28	03-Nov-2002	matt	Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.27	22-Sep-2002	chs	it really helps to get the stub right before cutting + pasting it 27 times. alas, I did not. doh.
1.26	22-Sep-2002	chs	add pmap_remove_all() hook (empty on most platforms so far).
1.25	23-Sep-2001	chs	branches: 1.25.4; implement pmap_wired_count().
1.24	10-Sep-2001	chris	Update pmap_update to now take the updated pmap as an argument. This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment. Currently this is a no-op on most platforms, so they should see no difference. Reviewed by Jason.
1.23	10-Jun-2001	tsubai	branches: 1.23.2; 1.23.4; Make the new pmap optional. Use the old (stable!) pmap by default.
1.22	06-Jun-2001	matt	Introduce a new & faster pmap for the MPC6xx (60x, 7xx, 7xxx) PPC CPUs. Move MPC6xx dependent header files to powerpc/include/mpc6xx/
1.21	22-Apr-2001	thorpej	Undo a misguided previous change to the pmap_update() API.
1.20	22-Apr-2001	thorpej	Give pmap_update() an argument (a pmap_t) so that it knows which pmap it should be updating.
1.19	21-Apr-2001	thorpej	#define away pmap_update() in <machine/pmap.h> so that no function call overhead is incurred as we start sprinkling pmap_update() calls throughout the source tree (no pmaps currently defer operations, but we are adding the infrastructure to allow them to do so).
1.18	04-Feb-2001	briggs	branches: 1.18.2; Build with -Wall -Wetc.
1.17	30-Mar-2000	jdolecek	Prototype vtophys() before defining it. Needed for compilation with -Wstrict prototypes on macppc. Problem noted by Hans-Christian Becker <hcb@phc.chalmers.se> in private mail.
1.16	12-Sep-1999	chs	branches: 1.16.2; eliminate the PMAP_NEW option by making it required for all ports. ports which previously had no support for PMAP_NEW now implement the pmap_k* interfaces as wrappers around the non-k versions.
1.15	11-Jul-1999	tsubai	Adapt pmap_extract() change.
1.14	08-Jul-1999	thorpej	Change the pmap_extract() interface to: boolean_t pmap_extract(pmap_t, vaddr_t, paddr_t *); This makes it possible for the pmap to map physical address 0.
1.13	17-Jun-1999	thorpej	pmap_change_wiring() -> pmap_unwire().
1.12	16-Apr-1999	thorpej	Use the same hack as pmap_zero_page() and pmap_copy_page() to provide direct-mapped pool pages.
1.11	05-Mar-1999	tsubai	branches: 1.11.4; Add RSS accounting.
1.10	26-Feb-1999	tsubai	Implement pmap_procwr(). (Not tested. gdb doesn't work on powerpc yet.)
1.9	01-Sep-1998	tsubai	Add some prototypes.
1.8	31-Aug-1998	tsubai	vm_offset_t --> [pv]addr_t
1.7	25-Jul-1998	tsubai	Make vtophys() return non-zero even if the addr < end.
1.6	27-Jan-1998	sakamoto	Import DDB from OpenBSD/powerpc.
1.5	06-Jan-1998	thorpej	Don't need __VM_PMAP_HACK anymore.
1.4	03-Jan-1998	thorpej	Now that all ports have pmap_activate(), and it has an identical interface, prototype it in <vm/pmap.h>
1.3	02-Jan-1998	thorpej	Implement pmap_activate().
1.2	16-May-1997	gwr	Add #define __VM_PMAP_HACK as a temporary measure.
1.1	30-Sep-1996	ws	PowerPC port
1.11.4.2	02-Aug-1999	thorpej	Update from trunk.
1.11.4.1	21-Jun-1999	thorpej	Sync w/ -current.
1.16.2.3	23-Apr-2001	bouyer	Sync with HEAD.
1.16.2.2	11-Feb-2001	bouyer	Sync with HEAD.
1.16.2.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.18.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.23.4.1	01-Oct-2001	fvdl	Catch up with -current.
1.23.2.3	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.23.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.23.2.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.25.4.3	11-Nov-2002	nathanw	Catch up to -current
1.25.4.2	18-Oct-2002	nathanw	Catch up to -current.
1.25.4.1	23-Sep-2001	nathanw	file pmap.h was added on branch nathanw_sa on 2002-10-18 02:39:31 +0000
1.32.36.1	11-Aug-2006	yamt	sync with head
1.32.32.1	09-Sep-2006	rpaulo	sync with head
1.32.18.1	30-Dec-2006	yamt	sync with head.
1.33.82.1	07-Jan-2011	matt	Add booke support.
1.33.70.1	19-Jan-2009	skrll	Sync with HEAD.
1.33.68.1	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.33.62.2	11-Mar-2010	yamt	sync with head
1.33.62.1	04-May-2009	yamt	sync with head.
1.33.58.1	17-Jan-2009	mjf	Sync with HEAD.
1.34.4.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.35.8.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.42.4.1	29-Dec-2023	martin	Additionally pull up following revision(s) (requested by rin in ticket #400): sys/arch/powerpc/include/oea/pmap.h: revision 1.39 sys/arch/powerpc/include/pmap.h: revision 1.43 sys/arch/powerpc/oea/pmap_kernel.c: revision 1.14 sys/arch/powerpc/oea/pmap.c: revision 1.117 sys/arch/powerpc/oea/pmap.c: revision 1.118 sys/arch/powerpc/oea/pmap.c: revision 1.119 sys/arch/powerpc/include/vmparam.h: revision 1.27 sys/arch/powerpc/powerpc/trap.c: revision 1.165 sys/arch/powerpc/oea/pmap.c: revision 1.120 sys/arch/powerpc/oea/pmap.c: revision 1.121 sys/arch/powerpc/powerpc/vm_machdep.c: revision 1.106 sys/arch/powerpc/powerpc/bus_dma.c: revision 1.56 powerpc/oea: trap: pmap_{pte,ste}_spill() even in the interrupt context Page table for oea is something like L2 TLB on memory; kernel and processes share its entries, and process entries can be spilled out. As done for MMU based on software-managed TLB, we need to restore such entries even in the interrupt context. Note that pmap_pte_spill() require no resouce to restore entries. Still-not-implemented pmap_ste_spill() for OEA64 should also. Part of PR kern/57621 powerpc/oea: pmap: Drop unused argument for pmap_pvo_reclaim(), NFC Part of PR kern/57621 powerpc/oea: pmap: Rework pmap_pte_spill() It was broken in many ways... Now, it gets working stable both for OEA and OEA64_BRIDGE, as far as I can see. Part of PR kern/57621 powerpc/oea: pmap: Fix mostly-pointless overhead of pmap_pvo_pool (1) Drop __aligned(32) from struct pvo_entry; otherwise, sizeof(struct pvo_entry) is round-up'ed to a multiple of 32. (2) Do not set sizeof(struct pvo_entry) to `align` argument for pool_init(9); it must be power of 2. (3) Align pvo_entry to 32-byte boundary only if reasonably possible, i.e., OEA without DIAGNOSTIC (--> POOL_REDZONE) for now. Part of PR kern/57621 powerpc/oea: pmap_create: Use PR_ZERO and drop memset(9), NFC Part of PR kern/57621 powerpc: oea: For OEA64_BRIDGE, 1:1 map up to 3GiB memory As done for OEA. Note that kva over 3GiB is reserved. Provide PMAP_MAP_POOLPAGE for OEA64_BRIDGE at the same time, by which direct-mapped memory is utilized in order to work around starvation of 512MiB kernel virtual space. PR kern/57621 powerpc: Make sure direct-mapped buffer fits within correct range For OEA and OEA64_BRIDGE, only first 3GiB memory is direct-mapped. Part of PR kern/57621
1.2	12-Jul-2018	maxv	Remove the kernel PMC code. Sent yesterday on tech-kern@. This change: * Removes "options PERFCTRS", the associated includes, and the associated ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is good. * Removes the PMC code of ARM XSCALE. * Removes all the pmc.h files. They were all empty, except for ARM XSCALE. * Reorders the x86 PMC code not to rely on the legacy pmc.h file. The definitions are put in sysarch.h. * Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control and sys_pmc_get_info syscalls. They are marked as OBSOL in kern, netbsd32 and rump. * Removes the pmc_evid_t and pmc_ctr_t types. * Removes all the associated man pages. The sets are marked as obsolete.
1.1	07-Aug-2002	briggs	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.202; 1.1.204; Implement pmc(9) -- An interface to hardware performance monitoring counters. These counters do not exist on all CPUs, but where they do exist, can be used for counting events such as dcache misses that would otherwise be difficult or impossible to instrument by code inspection or hardware simulation. pmc(9) is meant to be a general interface. Initially, the Intel XScale counters are the only ones supported.
1.1.204.1	10-Jun-2019	christos	Sync with HEAD
1.1.202.1	28-Jul-2018	pgoyette	Sync with HEAD
1.1.6.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.1.6.1	07-Aug-2002	jdolecek	file pmc.h was added on branch kqueue on 2002-09-06 08:39:15 +0000
1.1.4.2	31-Aug-2002	gehenna	catch up with -current.
1.1.4.1	07-Aug-2002	gehenna	file pmc.h was added on branch gehenna-devsw on 2002-08-31 13:45:46 +0000
1.1.2.2	13-Aug-2002	nathanw	Catch up to -current.
1.1.2.1	07-Aug-2002	nathanw	file pmc.h was added on branch nathanw_sa on 2002-08-13 02:18:45 +0000
1.3	28-May-1998	sakamoto	Rename NetBSD/powerpc to NetBSD/ofppc. New sys/arch/powerpc with PowerPC-generic stuff.
1.2	31-Jan-1997	thorpej	Declare booted_device and booted_partition as "extern".
1.1	30-Sep-1996	ws	branches: 1.1.2; PowerPC port
1.1.2.1	14-Jan-1997	thorpej	Snapshot of work-in-progress, committed to private branch. These changes implement machine-independent root device and file system selection. Notable features: - All ports behave in a consistent manner regarding root device selection. - No more "options GENERIC"; all kernels have the ability to boot with RB_ASKNAME to select root device and file system type. - Root file system type can be wildcarded; a machine-independent function will try all possible file systems for the selected root device until one succeeds. - If the root file system fails to mount, the operator will be given the chance to select a new root device and file system type, rather than having the machine simply panic. - nfs_mountroot() no longer panics if any part of the NFS mount process fails; it now returns an error, giving the operator a chance to recover. - New, more consistent, config(8) grammar. The constructs: config netbsd swap generic config netbsd root on nfs have been replaced with: config netbsd root on ? type ? config netbsd root on ? type nfs Additionally, the operator may select or wildcard root file system type in the kernel configuration file: config netbsd root on cd0a type cd9660 config(8) now requires that a "root" specification be made. "root" may be wired down or wildcarded. "swap" and "dump" specifications are optional, and follow previous semantics. - config(8) has a new "file-system" keyword, used to configure file systems into the kernel. Eventually, this will be used to generate the default vfssw[]. - "options NFSCLIENT" is obsolete, and is replaced by "file-system NFS". "options NFSSERVER" still exists, since NFS server support is independent of the NFS file system client. - sys/arch/<foo>/<foo>/swapgeneric.c is no longer used, and will be removed; all information is now generated by config(8). As of this commit, all ports except arm32 have been updated to use the new setroot(). Only SPARC, i386, and Alpha ports have been tested at this time. Port masters should test these changes on their ports, and report any problems back to me. More changes are on their way, including RB_ASKNAME support in nfs_mountroot() (to prompt for server address and path) and, potentially, the ability to select rarp/bootparam or bootp in nfs_mountroot().
1.4	27-Feb-2021	thorpej	Don't put #ifdefs in prep_initppc(). Instead, let callers specify the additional BAT-mapped regions they care about.
1.3	28-Apr-2008	martin	branches: 1.3.100; Remove clause 3 and 4 from TNF licenses
1.2	17-Oct-2007	garbled	branches: 1.2.2; 1.2.4; 1.2.8; 1.2.22; 1.2.24; 1.2.26; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.1	09-May-2007	garbled	branches: 1.1.2; 1.1.6; 1.1.8; 1.1.10; file prep_bus.h was initially added on branch ppcoea-renovation.
1.1.10.1	25-Oct-2007	bouyer	Sync with HEAD.
1.1.8.1	18-Oct-2007	yamt	sync with head.
1.1.6.1	26-Oct-2007	joerg	Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
1.1.2.1	09-May-2007	garbled	Add a prep_bus.h and prep_machdep.c. These files contain a number of common routines that all machines with a PReP memory map should have in common. Note that the machine does not need to be a fully PReP compliant machine to use these functions, just use the memory map.
1.2.26.1	16-May-2008	yamt	sync with head.
1.2.24.1	18-May-2008	yamt	sync with head.
1.2.22.1	02-Jun-2008	mjf	Sync with HEAD.
1.2.8.2	06-Nov-2007	matt	sync with HEAD
1.2.8.1	17-Oct-2007	matt	file prep_bus.h was added on branch matt-armv6 on 2007-11-06 23:20:38 +0000
1.2.4.2	27-Oct-2007	yamt	sync with head.
1.2.4.1	17-Oct-2007	yamt	file prep_bus.h was added on branch yamt-lazymbuf on 2007-10-27 11:27:48 +0000
1.2.2.2	23-Oct-2007	ad	Sync with head.
1.2.2.1	17-Oct-2007	ad	file prep_bus.h was added on branch vmlocking on 2007-10-23 20:36:05 +0000
1.3.100.1	03-Apr-2021	thorpej	Sync with HEAD.
1.1	01-Jul-2011	dyoung	Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split.
1.2	27-Feb-2021	thorpej	Don't put #ifdefs in prep_initppc(). Instead, let callers specify the additional BAT-mapped regions they care about.
1.1	01-Jul-2011	dyoung	branches: 1.1.66; Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split.
1.1.66.1	03-Apr-2021	thorpej	Sync with HEAD.
1.15	07-Mar-2021	rin	For _LP64, disable members of struct mdproc just for compatible with booke and ibm4xx, even if MODULAR or _MODULE is defined. Fix build failure for evbppc64 due to CTASSERT in COND_SET_STRUCT, which restricts sizeof(struct mdproc) < 31 for unknown reason...
1.14	06-Mar-2021	rin	For booke and ibm4xx, switch to software-based single-stepping for PT_STEP ptrace(2) command from broken hardware-based implementation. As described in proposal on port-powerpc@, http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html hardware debug facilities of booke and 4xx use critical interrupts, that are difficult to handle for this purpose; they are not automatically masked when entering kernel mode via system call trap or hardware interrupt. See my proposal above for more details. Now, hardware debug facilities are exclusively usable by kernel itself. They are much more functional than PSL_SE MSR bit of oea, and should be useful to, e.g., support byte-granular watchpoint for DDB in the future.
1.13	23-Aug-2013	matt	branches: 1.13.42; Get rid of MDLWP_USED{FPU,VEC}
1.12	05-Jun-2011	matt	branches: 1.12.2; 1.12.12; 1.12.16; Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.11	02-May-2011	matt	branches: 1.11.2; Move powerpc to use pcu to manage FPU/AltiVec/SPE.
1.10	18-Jan-2011	matt	Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.9	14-Jan-2011	rmind	branches: 1.9.2; Retire struct user, remove sys/user.h inclusions. Note sys/user.h header as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros. Various #include fixes and review by matt@.
1.8	21-Nov-2009	rmind	branches: 1.8.4; Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
1.7	16-Nov-2007	skrll	branches: 1.7.18; 1.7.40; s/proc/lwp/ in comment
1.6	11-Dec-2005	christos	branches: 1.6.30; 1.6.48; 1.6.50; 1.6.54; 1.6.56; merge ktrace-lwp.
1.5	10-Jul-2005	christos	No point in declaring syscall_intern and syscall in a zillion places.
1.4	18-Jan-2003	thorpej	branches: 1.4.2; 1.4.18; Merge the nathanw_sa branch.
1.3	05-Jul-2002	matt	Peform a rototill over the powerpc-based ports. Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT initialization code. Add user Altivec support. Fix calls to OF_call_method in macppc/macppc/machdep.c. Use ci_fpuproc in cpu_info instead of separate fpuproc. Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
1.2	16-Apr-1997	thorpej	branches: 1.2.36; 1.2.40; 1.2.48; s/dummy/md_proc/
1.1	30-Sep-1996	ws	PowerPC port
1.2.48.1	16-Jul-2002	gehenna	catch up with -current.
1.2.40.2	01-Aug-2002	nathanw	Catch up to -current.
1.2.40.1	05-Nov-2001	briggs	Initial SA support for ppc. Test-booted on sandpoint, macppc, & walnut. mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein <kleink@netbsd.org>.
1.2.36.1	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.4.18.2	07-Dec-2007	yamt	sync with head
1.4.18.1	21-Jun-2006	yamt	sync with head.
1.4.2.1	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.6.56.1	19-Nov-2007	mjf	Sync with HEAD.
1.6.54.1	18-Nov-2007	bouyer	Sync with HEAD
1.6.50.1	09-Jan-2008	matt	sync with HEAD
1.6.48.1	21-Nov-2007	joerg	Sync with HEAD.
1.6.30.1	03-Dec-2007	ad	Sync with HEAD.
1.7.40.1	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.7.18.1	11-Mar-2010	yamt	sync with head
1.8.4.3	12-Jun-2011	rmind	sync with head
1.8.4.2	31-May-2011	rmind	sync with head
1.8.4.1	05-Mar-2011	rmind	sync with head
1.9.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.11.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.12.16.1	28-Aug-2013	rmind	sync with head
1.12.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.12.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.13.42.1	03-Apr-2021	thorpej	Sync with HEAD.
1.10	02-Nov-2021	ryo	fix profiling kernel build
1.9	12-Sep-2013	joerg	Pass PICFLAGS down to cc-as-as and use __PIC__ to decide if it is small vs big PIC mode. Retire -DPIC and -DBIGPIC.
1.8	29-Apr-2011	matt	branches: 1.8.4; 1.8.14; 1.8.18; Use the wrtee inlines for booke.
1.7	07-Jul-2006	ross	branches: 1.7.84; 1.7.88; 1.7.90; Add _LP64 version of _mcount for ppc64
1.6	07-Feb-2002	briggs	branches: 1.6.32; 1.6.46; 1.6.50; 1.6.58; Update from thorpej: * Define type and size of _mcount stub to make PIC code happy. * Rename mcount to __mcount to get it out of the user namespace.
1.5	18-Apr-2000	tsubai	branches: 1.5.8; 1.5.12; Make kernel profiling work.
1.4	05-Mar-1999	tsubai	branches: 1.4.8; First-cut of profiling support. XXX userland only, for now.
1.3	16-Apr-1997	thorpej	Yow, "what happened"? Anyhow, correct apparerent CVS botch, and fix RCS ID.
1.2	16-Apr-1997	thorpej	Minimal profiling definitions - profiling doens't yet work.
1.1	30-Sep-1996	ws	PowerPC port
1.4.8.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.5.12.1	28-Feb-2002	nathanw	Catch up to -current.
1.5.8.1	16-Mar-2002	jdolecek	Catch up with -current.
1.6.58.1	13-Jul-2006	gdamore	Merge from HEAD.
1.6.50.1	11-Aug-2006	yamt	sync with head
1.6.46.1	09-Sep-2006	rpaulo	sync with head
1.6.32.1	30-Dec-2006	yamt	sync with head.
1.7.90.1	06-Jun-2011	jruoho	Sync with HEAD.
1.7.88.1	18-Feb-2011	matt	For BookE, PSL_DR/PSL_IR will never be set so we need our own MCOUNT_ENTER MCOUNT_EXIT. And if we need to do that, might as well use wrtee to the work (which will emit the right wrtee/wrteei instructions).
1.7.84.1	31-May-2011	rmind	sync with head
1.8.18.1	18-May-2014	rmind	sync with head
1.8.14.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.8.4.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.23	08-Feb-2024	andvar	fix misplaced or missing "e" in words with "ment" ending (argument, implement, increment, decrement, alignment), in comments, documentation, log messages.
1.22	06-Mar-2021	rin	For booke and ibm4xx, switch to software-based single-stepping for PT_STEP ptrace(2) command from broken hardware-based implementation. As described in proposal on port-powerpc@, http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html hardware debug facilities of booke and 4xx use critical interrupts, that are difficult to handle for this purpose; they are not automatically masked when entering kernel mode via system call trap or hardware interrupt. See my proposal above for more details. Now, hardware debug facilities are exclusively usable by kernel itself. They are much more functional than PSL_SE MSR bit of oea, and should be useful to, e.g., support byte-granular watchpoint for DDB in the future.
1.21	06-Jul-2020	rin	branches: 1.21.2; Style and cosmetic changes. No binary changes intended.
1.20	06-Jul-2015	matt	Remove PSL_SPV from BOOKE PSL_USERMOD
1.19	28-Feb-2014	matt	branches: 1.19.4; 1.19.6; support PPC_OEA64
1.18	20-Jun-2011	matt	branches: 1.18.2; 1.18.8; 1.18.12; 1.18.16; Fixup PSL handling to be tolerant of modules. Move evbppc psl changes into powerpc psl.h
1.17	02-May-2011	matt	branches: 1.17.2; Move powerpc to use pcu to manage FPU/AltiVec/SPE.
1.16	18-Jan-2011	matt	Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.15	09-Mar-2010	matt	branches: 1.15.2; 1.15.4; Add BookE variation of MSR.
1.14	05-Aug-2006	sanjayl	branches: 1.14.62; 1.14.82; 1.14.86; 1st cut of Powermac G5 support (uses bridge mode).
1.13	11-Dec-2005	christos	branches: 1.13.4; 1.13.8; merge ktrace-lwp.
1.12	26-Jun-2004	kleink	branches: 1.12.12; On OEA, turn PSL_USER* into runtime values appropriate for the CPU model we're executing on; besides dealing with the bits not implemented in the 601's MSR it also removes the silent failure behaviour when passing PSL_VEC set on a CPU not implementing it. Also, fix those masks for the 4xx again.
1.11	26-Jun-2004	kleink	Repair a sentence.
1.10	15-Apr-2004	matt	Revamp how user MSR/SRR1 are dealt with. Add a PSL_USEROK_P(psl) macro which valids the bits (replaces the use of PSL_USERSTATIC). Add a PSL_USERSRR1 mask which is used to mask out status bits in the upper half of SRR1. Make sure PSL_VEC is set appropriately in userret(). PSL_VEC is in the same region as SSR1 status bits so it's not preserved on exceptions. Thus we need to make to set it. When returning a MSR/SRR1 to userland, always clear the status bits. Add emulation of the mfpvr, mtmsr, and mfmsr instructions.
1.9	04-Apr-2004	matt	Be a lot more explicit about the MSR bits a user process can change.
1.8	31-Jul-2003	matt	add PSL_TGPR (for MPC603)
1.7	14-Feb-2003	matt	branches: 1.7.2; Add PSL_PM
1.6	03-Nov-2002	matt	Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.5	19-Nov-2000	matt	branches: 1.5.8; Add AltiVec VEC bit.
1.4	13-Feb-2000	tsubai	Fix typo in comment.
1.3	18-Dec-1999	thorpej	Comment the MSR bits, and note which ones are not present on the PowerPC 601.
1.2	16-Apr-1997	thorpej	branches: 1.2.22; 1.2.28; Garbage collect stuff now hidden my machine_vec.
1.1	30-Sep-1996	ws	PowerPC port
1.2.28.1	27-Dec-1999	wrstuden	Pull up to last week's -current.
1.2.22.2	22-Nov-2000	bouyer	Sync with HEAD.
1.2.22.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.5.8.1	11-Nov-2002	nathanw	Catch up to -current
1.7.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.7.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.7.2.1	03-Aug-2004	skrll	Sync with HEAD
1.12.12.1	30-Dec-2006	yamt	sync with head.
1.13.8.1	11-Aug-2006	yamt	sync with head
1.13.4.1	09-Sep-2006	rpaulo	sync with head
1.14.86.2	11-Jan-2011	matt	PSL_SPV is actually same value of PSL_VEC (must be a coincidence).
1.14.86.1	07-Jan-2011	matt	Add booke support.
1.14.82.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.14.62.1	11-Mar-2010	yamt	sync with head
1.15.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.15.2.2	31-May-2011	rmind	sync with head
1.15.2.1	05-Mar-2011	rmind	sync with head
1.17.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.18.16.1	18-May-2014	rmind	sync with head
1.18.12.2	03-Dec-2017	jdolecek	update from HEAD
1.18.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.18.8.4	18-May-2016	martin	Pull up following revision(s) (requested by matt in ticket #1310): sys/arch/powerpc/include/userret.h: revision 1.29-1.30 sys/arch/powerpc/include/psl.h: revision 1.20 sys/arch/powerpc/oea/oea_machdep.c: revision 1.72 (via patch) Add a check to make sure that if PSL_FP is set, we own the FPU. Don't clear PSL_FP/PSL_VEC Remove PSL_SPV from BOOKE PSL_USERMOD Don't preserve PSL_FP/PSL_VEC in cpu_setmcontext.
1.18.8.3	19-Nov-2015	bouyer	Revert ticket 1310 (second try): > sys/arch/powerpc/include/psl.h 1.20 > sys/arch/powerpc/include/userret.h 1.29, 1.30 > sys/arch/powerpc/oea/altivec.c 1.30 > sys/arch/powerpc/oea/oea_machdep.c 1.72 > sys/arch/powerpc/powerpc/fpu.c 1.36 > > powerpc PCU fixes because it breaks the build: http://releng.netbsd.org/builds/netbsd-6/201511152000Z/
1.18.8.2	16-Nov-2015	bouyer	Revert ticket 1310: > sys/arch/powerpc/include/psl.h 1.20 > sys/arch/powerpc/include/userret.h 1.29, 1.30 > sys/arch/powerpc/oea/altivec.c 1.30 > sys/arch/powerpc/oea/oea_machdep.c 1.72 > sys/arch/powerpc/powerpc/fpu.c 1.36 > > powerpc PCU fixes because it breaks the build: http://releng.netbsd.org/builds/netbsd-6/201511152000Z/
1.18.8.1	15-Nov-2015	bouyer	Pull up following revision(s) (requested by matt in ticket #1310): sys/arch/powerpc/include/userret.h: revision 1.30 sys/arch/powerpc/powerpc/fpu.c: revision 1.36 sys/arch/powerpc/include/psl.h: revision 1.20 sys/arch/powerpc/include/userret.h: revision 1.29 sys/arch/powerpc/oea/oea_machdep.c: revision 1.72 sys/arch/powerpc/oea/altivec.c: revision 1.30 Add a check to make sure that if PSL_FP is set, we own the FPU. Don't clear PSL_FP/PSL_VEC Don't reload if just re-enabling Don't reload the FPU register if this is just a re-enable. Remove PSL_SPV from BOOKE PSL_USERMOD Don't preserve PSL_FP/PSL_VEC in cpu_setmcontext.
1.18.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.19.6.1	22-Sep-2015	skrll	Sync with HEAD
1.19.4.1	17-Jul-2015	snj	Pull up following revision(s) (requested by matt in ticket #868): sys/arch/powerpc/include/psl.h: revision 1.20 sys/arch/powerpc/include/userret.h: revisions 1.29, 1.30 sys/arch/powerpc/oea/altivec.c: revision 1.30 sys/arch/powerpc/oea/oea_machdep.c: revision 1.72 sys/arch/powerpc/powerpc/fpu.c: revision 1.36 Add a check to make sure that if PSL_FP is set, we own the FPU. -- Don't clear PSL_FP/PSL_VEC -- Don't reload if just re-enabling -- Don't reload the FPU register if this is just a re-enable. -- Remove PSL_SPV from BOOKE PSL_USERMOD -- Don't preserve PSL_FP/PSL_VEC in cpu_setmcontext.
1.21.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.9	05-Aug-2006	sanjayl	1st cut of Powermac G5 support (uses bridge mode).
1.8	11-Dec-2005	christos	branches: 1.8.4; 1.8.8; merge ktrace-lwp.
1.7	16-Jan-2005	chs	branches: 1.7.8; implement pmap_wired_count(). fix some places we would forget to splx(). move the parts of pte.h that were used into pmap.c (since they were really pmap-internal details) and delete ibm4xx/pte.h. other misc cleanup.
1.6	03-Feb-2003	matt	branches: 1.6.2; 1.6.10; Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.5	09-Dec-2002	scw	Changes/additions to support evbppc.
1.4	12-Jun-2001	tsubai	branches: 1.4.8; Include powerpc/mpc6xx/{bat.h,pte.h} if PPC_MPC6XX is defined.
1.3	06-Jun-2001	matt	Introduce a new & faster pmap for the MPC6xx (60x, 7xx, 7xxx) PPC CPUs. Move MPC6xx dependent header files to powerpc/include/mpc6xx/
1.2	31-Aug-1998	tsubai	branches: 1.2.24; vm_offset_t --> [pv]addr_t
1.1	30-Sep-1996	ws	PowerPC port
1.2.24.1	21-Jun-2001	nathanw	Catch up to -current.
1.4.8.2	11-Dec-2002	thorpej	Sync with HEAD.
1.4.8.1	12-Jun-2001	thorpej	file pte.h was added on branch nathanw_sa on 2002-12-11 06:11:41 +0000
1.6.10.1	29-Apr-2005	kent	sync with -current
1.6.2.1	17-Jan-2005	skrll	Sync with HEAD.
1.7.8.1	30-Dec-2006	yamt	sync with head.
1.8.8.1	11-Aug-2006	yamt	sync with head
1.8.4.1	09-Sep-2006	rpaulo	sync with head
1.19	06-Mar-2021	rin	For booke and ibm4xx, switch to software-based single-stepping for PT_STEP ptrace(2) command from broken hardware-based implementation. As described in proposal on port-powerpc@, http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html hardware debug facilities of booke and 4xx use critical interrupts, that are difficult to handle for this purpose; they are not automatically masked when entering kernel mode via system call trap or hardware interrupt. See my proposal above for more details. Now, hardware debug facilities are exclusively usable by kernel itself. They are much more functional than PSL_SE MSR bit of oea, and should be useful to, e.g., support byte-granular watchpoint for DDB in the future.
1.18	15-Oct-2020	mgorny	branches: 1.18.2; Fix the machine-dependent ptrace requests to respect LWP number Fix the machine-dependent ptrace register-related requests (e.g. PT_GETXMMREGS, PT_GETXSTATE on x86) to correctly respect the LWP number passed as the data argument. Before this change, these requests did not operate on the requested LWP of a multithreaded program. This change required moving ptrace_update_lwp() out of unit scope, and changing ptrace_machdep_dorequest() function to take a pointer to pointer as the second argument, consistently with ptrace_regs(). I am planning to extend the ATF ptrace() register tests in the future to check for regressions in multithreaded programs, as time permits. Reviewed by kamil.
1.17	21-Jun-2020	rin	Fix inconsistency b/w kernel and userland recognitions of TLS, as well as inconsistency whether it is biased or not in kernel. - Obsolete __lwp_settcb() in order to let kernel know new TLS address via _lwp_setprivate(2). Alternatively, we can call _lwp_setprivate(2) within __lwp_settcb() like mips, but it is just double handling; we adjust %r2 appropriately in _lwp_setprivate(2) via cpu_lwp_setprivate(). - Make sure that, like other ports, l_private represents address of tcb, not biased one as in %r2. This guarantees that the returned values from _lwp_getprivate(2) and __lwp_getprivate_fast() are always same. Also, we can obsolete PTRACE_LWP_GETPRIVATE() macro. Now, *_pl_private tests in tests/lib/libc/sys successfully pass, while no other tests become newly falling.
1.16	24-Dec-2019	kamil	Introduce PT_LWPSTATUS + PT_LWPNEXT, obsolete PT_LWPINFO PT_LWPINFO is a legacy ptrace(2) operation that was originally intended to retrieve the thread (LWP) information inside a traced process. It has a number of flaws and is confused with PT_LWPINFO from FreeBSD. PT_LWPSTATUS and PT_LWPNEXT address the problems (shortly by: rename, removal of pl_event) and introduces new features: signal context (pl_sigpend, pl_sigmask), LWP name (pl_name), LWP TLS base address (pl_private). The private pointer was so far missing information for a debugger. PT_LWPSTATUS@nnn is now shipped with core(5) files and contain LWP specific information, so far missed in the core(5) files. PT_LWPSTATUS retrieves LWP information for the prompted thread. PT_LWPNEXT retrieves LWP information for the next thread, borrowing the semantics from NetBSD specific PT_LWPINFO. PT_LWPINFO is namespaced with __LEGACY_PT_LWPINFO and still available for the foreseeable future, without plans of removing it. Add ATF tests for PT_LWPSTATUS + PT_LWPNEXT. Keep ATF tests for PT_LWPINFO. Switch GDB to new API. Proposed on tech-kern@.
1.15	29-Nov-2019	martin	Add illegal asm and breakpoint
1.14	18-Jun-2019	kamil	Introduce PTRACE_REG_FP() a helper macro to retrieve the frame pointer The macro is dummy for ia64 (the FP register is unknown and can change freely) and sparc/sparc64 (not stored in struct reg).
1.13	08-Apr-2017	kamil	branches: 1.13.14; Add new ptrace(2) API: PT_SETSTEP & PT_CLEARSTEP These operations allow to mark thread as a single-stepping one. This allows to i.a.: - single step and emit a signal (PT_SETSTEP & PT_CONTINUE) - single step and trace syscall entry and exit (PT_SETSTEP & PT_SYSCALL) The former is useful for debuggers like GDB or LLDB. The latter can be used to singlestep a usermode kernel. These examples don't limit use-cases of this interface. Define PT_*STEP only for platforms defining PT_STEP. Add new ATF tests setstep[1234]. These ptrace(2) operations first appeared in FreeBSD. Sponsored by <The NetBSD Foundation>
1.12	15-Sep-2015	christos	branches: 1.12.2; 1.12.4; Provide access to pc/sp/syscall-return registers like we have for mcontext
1.11	18-Jan-2011	matt	branches: 1.11.16; 1.11.34; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.10	04-Mar-2007	christos	branches: 1.10.66; 1.10.70; 1.10.72; Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
1.9	11-Dec-2005	christos	branches: 1.9.26; merge ktrace-lwp.
1.8	06-May-2004	matt	branches: 1.8.12; Add PT_MACHDEP_STRINGS so that kdump(1) can print out the PowerPC-specific ptrace requests.
1.7	29-Jun-2003	fvdl	branches: 1.7.2; 1.7.4; Back out the lwp/ktrace changes. They contained a lot of colateral damage, and need to be examined and discussed more.
1.6	29-Jun-2003	darrenr	'struct proc ' -> 'struct lwp ' as required to get GENERIC for macppc built
1.5	05-Mar-2003	matt	Make AltiVec registers available via ptrace/procfs. Simplify AltiVec processing. Add a "common" procfs_machdep.c for PowerPC platforms. Even though it is supposed to be port specific, most (if not all) PowerPC ports can just use the common one.
1.4	04-Jun-2000	tsubai	Add PT_GETFPREGS and PT_SETFPREGS support.
1.3	03-May-1999	tsubai	branches: 1.3.2; 1.3.10; PT_{STEP,GETREGS,SETREGS} support.
1.2	05-Jan-1998	perry	branches: 1.2.10; RCSID Police.
1.1	01-Oct-1996	ws	Add some files that CVS missed somehow These are empty for now, but are needed by MI code
1.2.10.1	21-Jun-1999	thorpej	Sync w/ -current.
1.3.10.1	22-Jun-2000	minoura	Sync w/ netbsd-1-5-base.
1.3.2.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.7.4.1	10-May-2004	tron	Pull up revision 1.8 (requested by matt in ticket #278): Add PT_MACHDEP_STRINGS so that kdump(1) can print out the PowerPC-specific ptrace requests.
1.7.2.4	18-Nov-2004	skrll	Adapt to branch. macppc release builds.
1.7.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.7.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.7.2.1	03-Aug-2004	skrll	Sync with HEAD
1.8.12.2	03-Sep-2007	yamt	sync with head.
1.8.12.1	21-Jun-2006	yamt	sync with head.
1.9.26.1	12-Mar-2007	rmind	Sync with HEAD.
1.10.72.1	06-Jun-2011	jruoho	Sync with HEAD.
1.10.70.1	11-Jan-2011	matt	Anything that applies to Altivec also applies SPE since to the common powerpc code they share identical hooks.
1.10.66.1	05-Mar-2011	rmind	sync with head
1.11.34.2	28-Aug-2017	skrll	Sync with HEAD
1.11.34.1	22-Sep-2015	skrll	Sync with HEAD
1.11.16.1	03-Dec-2017	jdolecek	update from HEAD
1.12.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.12.2.1	26-Apr-2017	pgoyette	Sync with HEAD
1.13.14.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.13.14.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.18.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.14	13-Aug-2021	andvar	fix typos in words "pointer" and s/fram /frame/
1.13	12-Aug-2021	andvar	fix typos in "environment" word.
1.12	24-Jan-2016	christos	use __register_t
1.11	12-Aug-2014	joerg	branches: 1.11.2; Avoid unncessary use of double in the kernel. With this change, a LLVM build kernel fully works on TWRP1025.
1.10	18-Jan-2011	matt	branches: 1.10.16; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.9	08-Feb-2003	matt	branches: 1.9.130; 1.9.134; 1.9.136; Add comments to describe PowerPC64 ABI register usage.
1.8	05-Jul-2002	matt	Peform a rototill over the powerpc-based ports. Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT initialization code. Add user Altivec support. Fix calls to OF_call_method in macppc/macppc/machdep.c. Use ci_fpuproc in cpu_info instead of separate fpuproc. Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
1.7	18-Apr-2002	matt	branches: 1.7.2; Use a common genassym.cf for all the PPC_MPC6XX ports. Add a makeoptions to std.foo to indicate the directory to get genassym.cf from. Add an intrframe to <powerpc/frame.h> and make trap_subr.S use symbolic offsets into it.
1.6	04-Mar-2002	kleink	VRSAVE is SPR 256, not 238.
1.5	23-Nov-2000	matt	branches: 1.5.4; 1.5.8; Add comments and AltiVec reg state.
1.4	04-Jun-2000	tsubai	Add PT_GETFPREGS and PT_SETFPREGS support.
1.3	03-May-1999	tsubai	branches: 1.3.2; 1.3.10; PT_{STEP,GETREGS,SETREGS} support.
1.2	05-Jan-1998	perry	branches: 1.2.10; RCSID Police.
1.1	01-Oct-1996	ws	Add some files that CVS missed somehow These are empty for now, but are needed by MI code
1.2.10.1	21-Jun-1999	thorpej	Sync w/ -current.
1.3.10.1	22-Jun-2000	minoura	Sync w/ netbsd-1-5-base.
1.3.2.2	08-Dec-2000	bouyer	Sync with HEAD.
1.3.2.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.5.8.3	01-Aug-2002	nathanw	Catch up to -current.
1.5.8.2	20-Jun-2002	nathanw	Catch up to -current.
1.5.8.1	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.5.4.3	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.5.4.2	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.5.4.1	16-Mar-2002	jdolecek	Catch up with -current.
1.7.2.1	16-Jul-2002	gehenna	catch up with -current.
1.9.136.1	06-Jun-2011	jruoho	Sync with HEAD.
1.9.134.1	07-Jan-2011	matt	u_int32_t -> uint32_t
1.9.130.1	05-Mar-2011	rmind	sync with head
1.10.16.1	03-Dec-2017	jdolecek	update from HEAD
1.11.2.1	19-Mar-2016	skrll	Sync with HEAD
1.2	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.1	30-Sep-1996	ws	PowerPC port
1.4	05-Feb-2003	nakayama	Replace machine/rnd.h with more appropriate name to share it with cycle counter based microtime in kern/kern_microtime.c.
1.3	23-Jan-2003	kleink	Correct inverted logic in comment.
1.2	26-Mar-2002	kleink	On the 601, construct the CPU counter value from the RTC[UL] registers.
1.1	11-Jun-2000	tsubai	branches: 1.1.4; 1.1.6; 1.1.10; 1.1.14; Add cpu_counter().
1.1.14.1	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.1.10.1	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.1.6.2	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.1.6.1	11-Jun-2000	bouyer	file rnd.h was added on branch thorpej_scsipi on 2000-11-20 20:31:12 +0000
1.1.4.2	22-Jun-2000	minoura	Sync w/ netbsd-1-5-base.
1.1.4.1	11-Jun-2000	minoura	file rnd.h was added on branch minoura-xpg4dl on 2000-06-22 17:02:40 +0000
1.5	05-Jul-2013	joerg	Fix header guard.
1.4	28-Apr-2008	martin	branches: 1.4.34; 1.4.44; 1.4.50; Remove clause 3 and 4 from TNF licenses
1.3	08-Apr-2008	garbled	branches: 1.3.2; 1.3.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes: Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
1.2	28-Dec-2007	garbled	branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; 1.2.14; Add one more convenience function to rtas, rtas_has_func, and add a global int machine_has_rtas that can be used to decide if a machine has rtas functionality or not. Take a crack at power off support for the pegasos, which doesn't work right, probably due to a firmware bug.
1.1	28-Dec-2007	garbled	Rewrite the rtas_call command, to allow ports to call rtas directly from outside rtas.c, by simply issuing the right token. This makes using the rtas functionality much simpler.
1.2.14.1	02-Jun-2008	mjf	Sync with HEAD.
1.2.8.2	18-Feb-2008	mjf	Sync with HEAD.
1.2.8.1	28-Dec-2007	mjf	file rtas.h was added on branch mjf-devfs on 2008-02-18 21:04:58 +0000
1.2.6.2	21-Jan-2008	yamt	sync with head
1.2.6.1	28-Dec-2007	yamt	file rtas.h was added on branch yamt-lazymbuf on 2008-01-21 09:38:22 +0000
1.2.4.2	09-Jan-2008	matt	sync with HEAD
1.2.4.1	28-Dec-2007	matt	file rtas.h was added on branch matt-armv6 on 2008-01-09 01:47:49 +0000
1.2.2.2	02-Jan-2008	bouyer	Sync with HEAD
1.2.2.1	28-Dec-2007	bouyer	file rtas.h was added on branch bouyer-xeni386 on 2008-01-02 21:49:07 +0000
1.3.4.1	16-May-2008	yamt	sync with head.
1.3.2.1	18-May-2008	yamt	sync with head.
1.4.50.1	28-Aug-2013	rmind	sync with head
1.4.44.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.4.34.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.5	29-Nov-2019	riastradh	Largely eliminate the MD rwlock.h header file. This was full of definitions that have been obsolete for over a decade. The file still remains for __HAVE_RW_STUBS but that's all. Used only internally in kern_rwlock.c now, not by <sys/rwlock.h>.
1.4	28-Apr-2008	martin	branches: 1.4.88; Remove clause 3 and 4 from TNF licenses
1.3	21-Nov-2007	yamt	branches: 1.3.14; 1.3.16; 1.3.18; make kmutex_t and krwlock_t smaller by killing lock id. ok'ed by Andrew Doran.
1.2	09-Feb-2007	ad	branches: 1.2.4; 1.2.8; 1.2.24; 1.2.26; 1.2.30; 1.2.32; Merge newlock2 to head.
1.1	30-Jan-2007	ad	branches: 1.1.2; file rwlock.h was initially added on branch newlock2.
1.1.2.1	30-Jan-2007	ad	Add missing headers.
1.2.32.1	08-Dec-2007	mjf	Sync with HEAD.
1.2.30.1	21-Nov-2007	bouyer	Sync with HEAD
1.2.26.1	09-Jan-2008	matt	sync with HEAD
1.2.24.1	21-Nov-2007	joerg	Sync with HEAD.
1.2.8.1	03-Dec-2007	ad	Sync with HEAD.
1.2.4.3	07-Dec-2007	yamt	sync with head
1.2.4.2	26-Feb-2007	yamt	sync with head.
1.2.4.1	09-Feb-2007	yamt	file rwlock.h was added on branch yamt-lazymbuf on 2007-02-26 09:07:53 +0000
1.3.18.1	16-May-2008	yamt	sync with head.
1.3.16.1	18-May-2008	yamt	sync with head.
1.3.14.1	02-Jun-2008	mjf	Sync with HEAD.
1.4.88.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.3	16-Sep-1998	thorpej	Back out previous; I'm punting PowerPC to tsubai or sakamoto.
1.2	16-Sep-1998	thorpej	Need 103 longs for jmp_buf now (128-bit signal mask, at the front of the jump buffer).
1.1	30-Sep-1996	ws	PowerPC port
1.26	29-Oct-2021	thorpej	Define __HAVE_STRUCT_SIGCONTEXT regardless of its current visibility.
1.25	27-Oct-2021	christos	There is no sigcontext in ppc64
1.24	27-Oct-2021	thorpej	Make sigcontext13 visible only to _KERNEL. Make sigcontext visible only to _LIBC and _KERNEL.
1.23	26-Oct-2021	christos	Merge all MD __sigaction14_sigtramp.c copies into one: - sparc and sparc64 were not using version 0 sigcontext when there were no arguments in the signal version. This was probably a bug. - vax is using +1 the version numbers of the other archs. - Only hppa was defining __LIBC12_SOURCE__ so it was getting a working sigcontext before. all the other ports that supported sigcontext had the compat code disabled. [pointed out by thorpej, thanks!] If we want to remove sigcontext support from userland at least now there is less work to do so.
1.22	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.21	29-Nov-2017	christos	need sigtypes.h for sigset_t, since <sys/siginfo.h> includes this directly.
1.20	19-Nov-2008	cegger	branches: 1.20.26; remove duplicate prototype which now conflicts with the prototype in <sys/signalvar.h>
1.19	19-Nov-2008	ad	Make the emulations, exec formats, coredump, NFS, and the NFS server into modules. By and large this commit: - shuffles header files and ifdefs - splits code out where necessary to be modular - adds module glue for each of the components - adds/replaces hooks for things that can be installed at runtime
1.18	11-Dec-2005	christos	branches: 1.18.74; 1.18.78; 1.18.84; 1.18.86; merge ktrace-lwp.
1.17	26-Mar-2004	drochner	nothing cares about __HAVE_SIGINFO anymore, so nuke it
1.16	27-Sep-2003	matt	Define SIGTRAMP_VALID properly.
1.15	26-Sep-2003	matt	Add a machine-dependent SIGTRAMP_VALID macro which is used to test whether a trampoline version is valid or not.
1.14	25-Sep-2003	matt	Deal with the constification of ksiginfo_t and sigset_t in signalling.
1.13	25-Sep-2003	matt	Add siginfo support for PowerPC.
1.12	28-Apr-2003	bjh21	branches: 1.12.2; Add a new feature-test macro, _NETBSD_SOURCE. If this is defined by the application, all NetBSD interfaces are made visible, even if some other feature-test macro (like _POSIX_C_SOURCE) is defined. <sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE, _POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve existing behaviour. This has two major advantages: + Programs that require non-POSIX facilities but define _POSIX_C_SOURCE can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS. + It makes most of the #ifs simpler, in that they're all now ORs of the various macros, rather than having checks for (!defined(_ANSI_SOURCE) \|\| !defined(_POSIX_C_SOURCE) \|\| !defined(_XOPEN_SOURCE)) all over the place. I've tried not to change the semantics of the headers in any case where _NETBSD_SOURCE wasn't defined, but there were some places where the current semantics were clearly mad, and retaining them was harder than correcting them. In particular, I've mostly normalised things so that _ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE, _XOPEN_SOURCE and _NETBSD_SOURCE in that order. Tested by building for vax, encouraged by thorpej, and uncontested in tech-userlevel for a week.
1.11	02-Mar-2003	matt	Restore MQ to trapframe from mcontext since it's in both.
1.10	03-Feb-2003	matt	Don't use trapframe in sigcontext. Instead define a new structure utrapframe that fixed in size (and the same size as the trapframe in NetBSD 1.5). This preserves binary compatibility for those programs that dealt looked at sigcontexts.
1.9	20-Jan-2003	matt	Add _REG_foo to ppc mcontext and use them instead of constants.
1.8	19-Jan-2003	matt	Make this reflect reality.
1.7	18-Jan-2003	thorpej	Merge the nathanw_sa branch.
1.6	03-Nov-2002	matt	Change _MACHINE_foo_H_ to _POWERPC_foo_H_
1.5	04-Jul-2002	thorpej	Eliminate two unused sigframe members.
1.4	14-Sep-1998	thorpej	branches: 1.4.26; 1.4.30; 1.4.38; sigset13_t -> int.
1.3	13-Sep-1998	thorpej	Make signal delivery work again.
1.2	25-May-1998	kleink	If any of _ANSI_SOURCE, _POSIX_C_SOURCE or _XOPEN_SOURCE are defined, don't provide any identifiers other than sig_atomic_t.
1.1	30-Sep-1996	ws	PowerPC port
1.4.38.1	16-Jul-2002	gehenna	catch up with -current.
1.4.30.3	16-Jan-2003	thorpej	* Include <sys/sigtypes.h> rather than <sys/signal.h> in <sys/ucontext.h>. * Define _UCONTEXT_TO_SIGCONTEXT() and _SIGCONTEXT_TO_UCONTEXT() macros for converting a ucontext -> sigcontext and back again. These macros in turn use machine-dependent macros _MCONTEXT_TO_SIGCONTEXT() and _SIGCONTEXT_TO_MCONTEXT() provided by <machine/signal.h>. The conversion process is not 100% accurate, but should be close enough. Also note that the mcontext conversion may not be enough for all platforms (m68k is a good example of this). These macros should be used only if you really know what you're doing.
1.4.30.2	11-Nov-2002	nathanw	Catch up to -current
1.4.30.1	01-Aug-2002	nathanw	Catch up to -current.
1.4.26.1	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.12.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.12.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.12.2.1	03-Aug-2004	skrll	Sync with HEAD
1.18.86.1	19-Jan-2009	skrll	Sync with HEAD.
1.18.84.1	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.18.78.1	04-May-2009	yamt	sync with head.
1.18.74.1	17-Jan-2009	mjf	Sync with HEAD.
1.20.26.1	03-Dec-2017	jdolecek	update from HEAD
1.1	23-Jul-2014	alnsn	branches: 1.1.2; 1.1.6; Rename sljitarch.h to sljit_machdep.h.
1.1.6.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.1.6.1	23-Jul-2014	tls	file sljit_machdep.h was added on branch tls-maxphys on 2014-08-20 00:03:19 +0000
1.1.2.2	10-Aug-2014	tls	Rebase.
1.1.2.1	23-Jul-2014	tls	file sljit_machdep.h was added on branch tls-earlyentropy on 2014-08-10 06:54:05 +0000
1.4	23-Jul-2014	alnsn	Rename sljitarch.h to sljit_machdep.h.
1.3	22-Jul-2014	alnsn	Cast to __syncicache() argument types.
1.2	25-Nov-2013	alnsn	branches: 1.2.2; 1.2.4; 1.2.6; Use __syncicache() in sljit on powerpc.
1.1	17-Nov-2013	alnsn	Enable sljit and bpfjit on powerpc.
1.2.6.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.2.6.1	25-Nov-2013	yamt	file sljitarch.h was added on branch yamt-pagecache on 2014-05-22 11:40:04 +0000
1.2.4.2	18-May-2014	rmind	sync with head
1.2.4.1	25-Nov-2013	rmind	file sljitarch.h was added on branch rmind-smpnet on 2014-05-18 17:45:22 +0000
1.2.2.1	10-Aug-2014	tls	Rebase.
1.3	24-Aug-2013	matt	struct cpu_info;
1.2	23-Aug-2013	matt	Fix kern_softint.c errors (tested with WALNUT & EV64260)
1.1	14-Jun-2011	matt	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.16; 1.1.20; Take the fast softint support in e500_intr.c and make generic so that it can be used to provide fast softint for other interrupt implementations.
1.1.20.1	28-Aug-2013	rmind	sync with head
1.1.16.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.1.6.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.1.4.2	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.4.1	14-Jun-2011	matt	file softint.h was added on branch matt-nb5-pq3 on 2011-10-14 17:21:26 +0000
1.1.2.2	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.1.2.1	14-Jun-2011	cherry	file softint.h was added on branch cherry-xenmp on 2011-06-23 14:19:31 +0000
1.4	03-Dec-2007	ad	Interrupt handling changes, in discussion since February: - Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
1.3	11-Dec-2005	christos	branches: 1.3.30; 1.3.48; 1.3.50; 1.3.56; merge ktrace-lwp.
1.2	25-Mar-2004	matt	branches: 1.2.4; 1.2.18; Move data structures to softintr.c. Remove an unneeded if. Fix a typo.
1.1	24-Mar-2004	matt	Generic soft interrupt support for PowerPC ports.
1.2.18.1	07-Dec-2007	yamt	sync with head
1.2.4.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.4.3	18-Sep-2004	skrll	Sync with HEAD.
1.2.4.2	03-Aug-2004	skrll	Sync with HEAD
1.2.4.1	25-Mar-2004	skrll	file softintr.h was added on branch ktrace-lwp on 2004-08-03 10:39:29 +0000
1.3.56.1	08-Dec-2007	mjf	Sync with HEAD.
1.3.50.1	23-Mar-2008	matt	sync with HEAD
1.3.48.1	09-Dec-2007	jmcneill	Sync with HEAD.
1.3.30.1	03-Dec-2007	ad	Sync with HEAD.
1.56	07-May-2022	rin	Remove SPR_CCR0 from <powerpc/spr.h>; we already have it in <powerpc/ibm4xx/spr.h>, together with other 4xx-specific SPRs. Thanks uwe@ for pointing out.
1.55	07-May-2022	rin	Instead of hard-coding SPR# for CCR0, define SPR_CCR0 in <powerpc/spr.h> and use it. Idea from uwe@, thanks! (and sorry for delayed response!)
1.54	02-Nov-2021	ryo	fix build with COPTS=-O0
1.53	06-Jul-2020	rin	Include missing opt_ppcarch.h.
1.52	19-Apr-2018	christos	s/static inline/static __inline/g for consistency.
1.51	22-Mar-2018	macallan	first step towards G5 SMP: - only save/restore BATs on CPUs that have them - treat HID0 as 64bit on 64bit CPUs
1.50	21-Jan-2018	mrg	branches: 1.50.2; fix some logic errors in the previous and fix non-kernel builds.
1.49	21-Jan-2018	mrg	fix ofppc/pegasosII (and maybe others). don't assume PPC_OEA64_BRIDGE means we have a 64 bit cpu (code for 64 bit in bridge and normal 32 bit can co-exist due to fixups the early boot code does has, and ofppc builds GENERIC this way): - fix mtmsr()/mfmsr() to use the right method based upon the actually cpu booted on. - fix cpu_setup() to have 32 bit and 64 bit hid0 variables and operate on the right one based upon the current cpu. restore a minor optimisation of not writing hid0 if it didn't change. in set_timebase() check if OF_finddevice("/cpus/@0") failed and returned -1 before using it for OF_getprop().
1.48	20-Jan-2018	simonb	Add a copyright (approx 16.5 years later).
1.47	07-Jul-2017	macallan	fix tpyo
1.46	07-Jul-2017	macallan	add mfspr/mtspr methods suitable for 64bit SPRs on ppc970 in bridge mode
1.45	25-Feb-2010	matt	branches: 1.45.20; 1.45.38; Split <powerpc/spr.h> into a common <powerpc/spr.h> and <powerpc/XXX/spr.h> where XXX is ibm4xx or oea.
1.44	23-Feb-2008	matt	branches: 1.44.4; 1.44.24; 1.44.28; Add some 440 definitions
1.43	31-Dec-2007	garbled	branches: 1.43.2; 1.43.6; Add a bunch of PVR values for a variety of processors. Taken from various manuals, and linux.
1.42	17-Oct-2007	garbled	branches: 1.42.2; 1.42.8; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.41	25-Jun-2007	aymeric	branches: 1.41.10; Recognize the Freescale G2 cores: initialize cache line size, and doze mode While there, fix the way the major version of a PowerPC processor is computed
1.40	05-Aug-2006	sanjayl	branches: 1.40.14; 1.40.16; 1.40.22; 1st cut of Powermac G5 support (uses bridge mode).
1.39	06-Jul-2006	scw	Fix the entries for SPR_DC_ADR and SPR_DC_DAT.
1.38	24-Dec-2005	perry	branches: 1.38.4; 1.38.8; 1.38.16; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.37	15-Nov-2005	matt	Add MPC5200 SVR definition
1.36	21-Jan-2005	matt	branches: 1.36.8; 1.36.14; Add MPC7448 and change MPC745x_P macro to deal with it.
1.35	20-Jan-2005	matt	Add MPC7447A (0x8003)
1.34	06-Dec-2004	briggs	branches: 1.34.4; Minor (old) patch from me to correct CPU ID of 604e vs. 604ev. Tested by Tim Kelly. Also patched from Tim to - Delay longer for second CPU spinup. - Only attempt to print CPU speed and cache configuration on certain CPU types.
1.33	20-Sep-2004	scw	MPC8xx DC_CST is SPR 0x238, not 0x230. Reported by Jared Momose in private email.
1.32	09-Oct-2003	matt	Add support for MPC74[45]7
1.31	23-Sep-2003	shige	Add IBM405GPr PVR.
1.30	17-Aug-2003	chs	add some 745x-specific MSSCR0 bits.
1.29	04-Apr-2003	matt	branches: 1.29.2; MMCRx register definitions should not be prefixed by SPR_
1.28	04-Apr-2003	matt	Add two missing L2CLK speeds.
1.27	14-Mar-2003	matt	Condition ({ ... }) by __GNUC__. Remove redundant SPR_IBAT0U definiton.
1.26	26-Feb-2003	jklos	Added configuration entries for L3CR_CONFIG for L3 caches on 745x accelerators. Thanks to Monroe Williams.
1.25	14-Aug-2002	matt	Add a bunch of mpc8xx SPR definitions.
1.24	11-Aug-2002	simonb	Add some IBM 4xx CPU PVR values; sort PVRs numerically. White space nits.
1.23	10-Aug-2002	matt	Add IBM Power3 CPUID.
1.22	08-Aug-2002	matt	Add SPR_ASR from OEA-64. Change mfspr to use register_t.
1.21	06-Aug-2002	chs	add the MSSCR0 register and some more L2CR fields.
1.20	01-Jul-2002	matt	Add VRSAVE.
1.19	20-Jun-2002	matt	Add IBM750FX (0x7000)
1.18	19-Jun-2002	briggs	Include the Processor ID for the MPC8245.
1.17	03-Apr-2002	matt	branches: 1.17.2; 1.17.4; Add some MPC745x L3CR cache definitions.
1.16	03-Mar-2002	matt	Add MPC7455
1.15	03-Mar-2002	nathanw	Add bit definitions for the MMCR's, and event numbers for the events that are common to the G3 and G4.
1.14	03-Mar-2002	nathanw	Correct the SPR numbers of PMC3 and PMC4. SIA wasn't retconned, but the SPR number was wrong. Re-add it, and add USIA.
1.13	03-Mar-2002	nathanw	Delete the retconned SIAR SPR.
1.12	03-Mar-2002	nathanw	Add MPC7xx/7xxx performance monitor control registers (MMCR0-2, UMMCR0-2).
1.11	03-Mar-2002	nathanw	Add bit definitions for the MPC750 thermal management registers.
1.10	05-Feb-2002	kleink	Add MPC601 MQ and RTCU/RTCL SPRs.
1.9	02-Dec-2001	thorpej	Add PVR processor type fields for IBM 405GP and IBM 405L.
1.8	29-Oct-2001	simonb	branches: 1.8.2; Include bit definitions for the Debug Status Register; from Artem Belevich at Riverstone Networks.
1.7	16-Sep-2001	wiz	branches: 1.7.2; Spell 'occurred' with two 'r's.
1.6	30-Aug-2001	matt	branches: 1.6.2; Add new 7450 SPRs
1.5	26-Aug-2001	matt	Make all powerpc ports use a common Makefile.powerpc (except walnut) Enforce -Wmissing-prototypes -Wstrict-prototypes for all ppc ports. Split out macppc cpu support and make common to mpc6xx ports. Make other mpc6xx ports use it. Add evcnts for mpc6xx traps.
1.4	23-Jun-2001	matt	branches: 1.4.2; Use __asm __volatile. Use _POWERPC_SPR_H_ Add PTE_RO/PTE_RW for old pmap.
1.3	22-Jun-2001	matt	DMISS/DCMP/HASH1/HASH2/IMISS/ICMP/RPA are also valid on the MPC6XX (specially the 603 and maybe the 601)
1.2	19-Jun-2001	simonb	branches: 1.2.2; Move the DSISR SPR bit definitions from <powerpc/mpc6xx/pte.h> to <powerpc/spr.h>. Remove unused ISI/SRR1 bit definitions.
1.1	13-Jun-2001	simonb	Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.2.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.4.2.6	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.4.2.5	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.4.2.4	16-Mar-2002	jdolecek	Catch up with -current.
1.4.2.3	11-Feb-2002	jdolecek	Sync w/ -current.
1.4.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.4.2.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.6.2.1	01-Oct-2001	fvdl	Catch up with -current.
1.7.2.1	12-Nov-2001	thorpej	Sync the thorpej-mips-cache branch with -current.
1.8.2.9	27-Aug-2002	nathanw	Catch up to -current.
1.8.2.8	13-Aug-2002	nathanw	Catch up to -current.
1.8.2.7	06-Aug-2002	nathanw	Catch up with powerpc rototilling.
1.8.2.6	01-Aug-2002	nathanw	Catch up to -current.
1.8.2.5	17-Apr-2002	nathanw	Catch up to -current.
1.8.2.4	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.8.2.3	28-Feb-2002	nathanw	Catch up to -current.
1.8.2.2	08-Jan-2002	nathanw	Catch up to -current.
1.8.2.1	29-Oct-2001	nathanw	file spr.h was added on branch nathanw_sa on 2002-01-08 00:27:10 +0000
1.17.4.2	21-Jun-2002	lukem	Pull up revision 1.19 (requested by matt in ticket #332): Add IBM750FX (0x7000)
1.17.4.1	20-Jun-2002	lukem	Pull up revision 1.18 (requested by briggs in ticket #324): Include the Processor ID for the MPC8245.
1.17.2.2	31-Aug-2002	gehenna	catch up with -current.
1.17.2.1	16-Jul-2002	gehenna	catch up with -current.
1.29.2.7	11-Dec-2005	christos	Sync with head.
1.29.2.6	24-Jan-2005	skrll	Sync with HEAD.
1.29.2.5	18-Dec-2004	skrll	Sync with HEAD.
1.29.2.4	24-Sep-2004	skrll	Sync with HEAD.
1.29.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.29.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.29.2.1	03-Aug-2004	skrll	Sync with HEAD
1.34.4.1	29-Apr-2005	kent	sync with -current
1.36.14.1	22-Nov-2005	yamt	sync with head.
1.36.8.5	27-Feb-2008	yamt	sync with head.
1.36.8.4	21-Jan-2008	yamt	sync with head
1.36.8.3	03-Sep-2007	yamt	sync with head.
1.36.8.2	30-Dec-2006	yamt	sync with head.
1.36.8.1	21-Jun-2006	yamt	sync with head.
1.38.16.1	13-Jul-2006	gdamore	Merge from HEAD.
1.38.8.1	11-Aug-2006	yamt	sync with head
1.38.4.1	09-Sep-2006	rpaulo	sync with head
1.40.22.2	02-Aug-2007	macallan	sync with HEAD
1.40.22.1	26-Jun-2007	garbled	Sync with HEAD.
1.40.16.1	11-Jul-2007	mjf	Sync with head.
1.40.14.1	15-Jul-2007	ad	Sync with head.
1.41.10.3	23-Mar-2008	matt	sync with HEAD
1.41.10.2	09-Jan-2008	matt	sync with HEAD
1.41.10.1	06-Nov-2007	matt	sync with HEAD
1.42.8.1	02-Jan-2008	bouyer	Sync with HEAD
1.42.2.1	18-Feb-2008	mjf	Sync with HEAD.
1.43.6.1	03-Apr-2008	mjf	Sync with HEAD.
1.43.2.1	24-Mar-2008	keiichi	sync with head.
1.44.28.1	07-Jan-2011	matt	Split spr.h into generic PPC <powerpc/spr.h> and chip-specific <powerpc/XXX/spr.h> (XXX=oea, ibm4xx, booke)
1.44.24.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.44.4.1	11-Mar-2010	yamt	sync with head
1.45.38.1	28-Aug-2017	skrll	Sync with HEAD
1.45.20.1	03-Dec-2017	jdolecek	update from HEAD
1.50.2.2	22-Apr-2018	pgoyette	Sync with HEAD
1.50.2.1	30-Mar-2018	pgoyette	Resolve conflicts between branch and HEAD
1.18	17-Jul-2011	joerg	Retire varargs.h support. Move machine/stdarg.h logic into MI sys/stdarg.h and expect compiler to provide proper builtins, defaulting to the GCC interface. lint still has a special fallback. Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and derive va_list as required by standards.
1.17	01-Jul-2011	mrg	add GCC 4.5 support
1.16	21-Jun-2008	gmcgarry	Add stdargs support for pcc.
1.15	11-Dec-2005	christos	branches: 1.15.74; 1.15.78; 1.15.80; 1.15.82; merge ktrace-lwp.
1.14	24-Sep-2003	matt	Define va_list as __builtin_va_list for GCC 3.x. Change stdarg macros appropriately. (this is committed from a system run a kernel and userland built with these changes).
1.13	28-Apr-2003	bjh21	branches: 1.13.2; Add a new feature-test macro, _NETBSD_SOURCE. If this is defined by the application, all NetBSD interfaces are made visible, even if some other feature-test macro (like _POSIX_C_SOURCE) is defined. <sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE, _POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve existing behaviour. This has two major advantages: + Programs that require non-POSIX facilities but define _POSIX_C_SOURCE can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS. + It makes most of the #ifs simpler, in that they're all now ORs of the various macros, rather than having checks for (!defined(_ANSI_SOURCE) \|\| !defined(_POSIX_C_SOURCE) \|\| !defined(_XOPEN_SOURCE)) all over the place. I've tried not to change the semantics of the headers in any case where _NETBSD_SOURCE wasn't defined, but there were some places where the current semantics were clearly mad, and retaining them was harder than correcting them. In particular, I've mostly normalised things so that _ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE, _XOPEN_SOURCE and _NETBSD_SOURCE in that order. Tested by building for vax, encouraged by thorpej, and uncontested in tech-userlevel for a week.
1.12	18-Jan-2003	matt	Add LP64 support.
1.11	04-Dec-2002	thorpej	Revert my previous GCC 3.3-related changes; GCC 3.3 has been fixed to handle our stdarg/varargs ABI for PowerPC.
1.10	25-Oct-2002	thorpej	Make these work with GCC 3.x.
1.9	01-Jun-2002	tsubai	Add gcc 3.x version.
1.8	31-May-2001	tsubai	branches: 1.8.2; 1.8.8; 1.8.16; One more gcc-2.95 issue.
1.7	30-May-2001	tsubai	Add gcc-2.95 version.
1.6	16-May-2001	simonb	If _SOFT_FLOAT is defined, pull floating point va_args from the GPR area and not the FPR area (by having the double argument type test always fail). Fixes problems using <stdarg.h> with -msoft-float.
1.5	27-Feb-2000	tsubai	branches: 1.5.6; Rewrite stdarg/varargs.
1.4	03-Feb-2000	kleink	Add a C99-style va_copy macro.
1.3	02-Dec-1998	tsubai	branches: 1.3.10; Adapt to gcc change (calling sequence).
1.2	16-Apr-1997	thorpej	Use new va-ppc.h
1.1	30-Sep-1996	ws	PowerPC port
1.3.10.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.5.6.1	21-Jun-2001	nathanw	Catch up to -current.
1.8.16.1	15-Jul-2002	gehenna	catch up with -current.
1.8.8.4	11-Dec-2002	thorpej	Sync with HEAD.
1.8.8.3	11-Nov-2002	nathanw	Catch up to -current
1.8.8.2	20-Jun-2002	nathanw	Catch up to -current.
1.8.8.1	31-May-2001	nathanw	file stdarg.h was added on branch nathanw_sa on 2002-06-20 03:40:32 +0000
1.8.2.1	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.13.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.13.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.13.2.1	03-Aug-2004	skrll	Sync with HEAD
1.15.82.1	27-Jun-2008	simonb	Sync with head.
1.15.80.1	23-Jun-2008	wrstuden	Sync w/ -current. 34 merge conflicts to follow.
1.15.78.1	04-May-2009	yamt	sync with head.
1.15.74.1	29-Jun-2008	mjf	Sync with HEAD.
1.14	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.13	03-Mar-2014	macallan	support ppc601 from scole_mail, ok matt@
1.12	18-Jul-2012	matt	branches: 1.12.2; 1.12.4; Define the MPC8XX traps
1.11	24-May-2008	phx	branches: 1.11.32; Make oea_init() support systems with high-vector configurations (i.e exception vectors at 0xfff00000), and trap_subr.S allows the kernel to be in a memory region which is not reachable by absolute branch instructions (ba and bla). High-vector support can be enabled by option PPC_HIGH_VEC, and long-branches to the kernel are enabled by the option DISTANT_KERNEL.
1.10	05-Aug-2006	sanjayl	branches: 1.10.58; 1.10.60; 1.10.62; 1.10.64; 1st cut of Powermac G5 support (uses bridge mode).
1.9	26-Apr-2003	wiz	branches: 1.9.18; 1.9.32; 1.9.36; Management, not managment. Mostly from jmc@openbsd.
1.8	19-May-2002	augustss	Handle the "aligment" fault generated by DCBZ when the cache is off. That way you can run the processor with caches off.
1.7	22-Feb-2002	kleink	branches: 1.7.8; Handle the 601's Run Mode/Trace Exception as well.
1.6	13-Jun-2001	simonb	branches: 1.6.2; 1.6.8; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.5	20-Nov-2000	tsubai	branches: 1.5.2; Thermal Management Interrupt is available on 750, too.
1.4	19-Nov-2000	matt	Add G4 specific exceptions (include AltiVec).
1.3	25-May-2000	is	Prepare for AmigaPPC.
1.2	19-Jan-2000	danw	Fill in the alignment trap handler a bit: now it can fix unaligned floating point loads and stores (to work around a gcc bug), but will still cause a bus error on other sorts of unaligned accesses.
1.1	30-Sep-1996	ws	branches: 1.1.22; 1.1.28; PowerPC port
1.1.28.2	22-Nov-2000	bouyer	Sync with HEAD.
1.1.28.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.1.22.1	20-Jan-2000	he	Pull up revision 1.2 (requested by danw): Add (the beginnings of) an unaligned access handler for the powerpc, to get around the fact that gcc currently generates bad floating point copies sometimes, which breaks various things,
1.5.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.6.8.3	20-Jun-2002	nathanw	Catch up to -current.
1.6.8.2	28-Feb-2002	nathanw	Catch up to -current.
1.6.8.1	13-Jun-2001	nathanw	file trap.h was added on branch nathanw_sa on 2002-02-28 04:11:26 +0000
1.6.2.2	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.6.2.1	16-Mar-2002	jdolecek	Catch up with -current.
1.7.8.1	30-May-2002	gehenna	Catch up with -current.
1.9.36.1	11-Aug-2006	yamt	sync with head
1.9.32.1	09-Sep-2006	rpaulo	sync with head
1.9.18.1	30-Dec-2006	yamt	sync with head.
1.10.64.1	23-Jun-2008	wrstuden	Sync w/ -current. 34 merge conflicts to follow.
1.10.62.1	04-May-2009	yamt	sync with head.
1.10.60.1	04-Jun-2008	yamt	sync with head
1.10.58.1	02-Jun-2008	mjf	Sync with HEAD.
1.11.32.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.11.32.1	30-Oct-2012	yamt	sync with head
1.12.4.1	18-May-2014	rmind	sync with head
1.12.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.66	01-Apr-2021	simonb	Whitespace: #define<tab>
1.65	23-Jan-2021	christos	branches: 1.65.2; Document via __HAVE_BUS_SPACE_8 platforms that implement bus_space_*_8
1.64	22-Jun-2020	rin	branches: 1.64.2; Fix previous; hide userland ABI details for kernel as suggested by joerg: http://mail-index.netbsd.org/source-changes-d/2020/06/21/msg012745.html - Revive __lwp_settcb(), and call _lwp_setprivate(2) from it. - Keep l_private opaque pointer for kernel; store raw value of %r2 in it. In the previous commit message, I wrote, http://mail-index.netbsd.org/source-changes/2020/06/21/msg118524.html > - Make sure that, like other ports, l_private represents address of tcb, > not biased one as in %r2. but, it turned out to be wrong. mips stores a biased address, at least. It is userland responsibility to interpret returned values from lwp_getprivate(2).
1.63	21-Jun-2020	rin	Fix inconsistency b/w kernel and userland recognitions of TLS, as well as inconsistency whether it is biased or not in kernel. - Obsolete __lwp_settcb() in order to let kernel know new TLS address via _lwp_setprivate(2). Alternatively, we can call _lwp_setprivate(2) within __lwp_settcb() like mips, but it is just double handling; we adjust %r2 appropriately in _lwp_setprivate(2) via cpu_lwp_setprivate(). - Make sure that, like other ports, l_private represents address of tcb, not biased one as in %r2. This guarantees that the returned values from _lwp_getprivate(2) and __lwp_getprivate_fast() are always same. Also, we can obsolete PTRACE_LWP_GETPRIVATE() macro. Now, *_pl_private tests in tests/lib/libc/sys successfully pass, while no other tests become newly falling.
1.62	16-Apr-2020	rin	Discard __HAVE_UNLOCKED_PMAP for 4xx; 4xx is uniprocessor architecture, and everything gets more than 10 times slower by __HAVE_UNLOCKED_PMAP. Note that we support three supervisor-level architectures for powerpc: oea, booke, and 4xx. We have three different implementations of pmap as a result. Whereas oea and booke support multiprocessor, 4xx does not.
1.61	22-Mar-2020	ad	branches: 1.61.2; Temporarily mark hppa, mips, powerpc and riscv with __HAVE_UNLOCKED_PMAP, for the benefit of UVM. These need some pmap changes to support concurrent faults on the same object. I have changes to do just that, but they're a work in progress.
1.60	06-Dec-2019	mrg	revert this change from early this year. it appears the changes macallan@ commited to fix FIRMWORKSBUGS issues in openfirmware() have fixed the hangs seen on PegasosII. hooray! --- Log Message: workaround a problem with the pegasos firmware interface: attempting to use /dev/openfirm on this machine hangs hard. this isn't a new problem, and i've been meaning to try to figure it out for years, but it's become a problem since the xf86-video-radeon driver gained code to look for the macppc model using this interface. this is why xorg-server 1.18 and 1.20 hang recently on the pegasosII. this change is fairly ugly but i couldn't think of a less ugly method to avoid /dev/openfirm working just on this one platform. introduce new __OPENFIRMIO_OPEN_CHECK_BROKEN macro and associated __openfirmio_open_check_broken(), and use them in the new openfirmopen() to fail opens. include proplib.h in macppc and ofppc autoconf.h since they use it. ---
1.59	07-Apr-2019	thorpej	Detangle some of the PowerPC CPU configuration spaghetti.
1.58	06-Apr-2019	thorpej	Overhaul the API used to fetch and store individual memory cells in userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(), subyte(), suword(), etc.) are retired and replaced with new ufetch(9) and ustore(9) APIs that can return proper error codes, etc. and are implemented consistently across all platforms. The interrupt-safe variants are no longer supported (and several of the existing attempts at fuswintr(), etc. were buggy and not actually interrupt-safe). Also augmement the ucas(9) API, making it consistently available on all plaforms, supporting uniprocessor and multiprocessor systems, even those that do not have CAS or LL/SC primitives. Welcome to NetBSD 8.99.37.
1.57	08-Jan-2019	mrg	workaround a problem with the pegasos firmware interface: attempting to use /dev/openfirm on this machine hangs hard. this isn't a new problem, and i've been meaning to try to figure it out for years, but it's become a problem since the xf86-video-radeon driver gained code to look for the macppc model using this interface. this is why xorg-server 1.18 and 1.20 hang recently on the pegasosII. this change is fairly ugly but i couldn't think of a less ugly method to avoid /dev/openfirm working just on this one platform. introduce new __OPENFIRMIO_OPEN_CHECK_BROKEN macro and associated __openfirmio_open_check_broken(), and use them in the new openfirmopen() to fail opens. include proplib.h in macppc and ofppc autoconf.h since they use it.
1.56	27-Jan-2017	christos	branches: 1.56.12; 1.56.14; remove __HAVE_COMPAT_NETBSD32
1.55	26-Jan-2017	christos	provide __HAVE_COMPAT_NETBSD32 and fix multiple include protection consistently.
1.54	24-Jan-2016	christos	branches: 1.54.2; 1.54.4; expose __register32_t for frame.h
1.53	23-Jan-2016	christos	expose the kernel types for standalone code.
1.52	23-Jan-2016	christos	Hide {p,v}{addr,size}_t and register_t (and a couple more types that are machine-specific) from userland unless _KERNEL/_KMEMUSER and a new _KERNTYPES variables is defined. The _KERNTYPES should be fixed for many subsystems that should not be using it (rump)...
1.51	27-Aug-2015	pooka	Fix PTHREAD_FOO_INITIALIZER for C++ by not using volatile in the relevant pthread types in C++ builds, attempt 2. The problem with attempt 1 was making assumptions of what the MD __cpu_simple_lock_t (declared volatile) looks like. To get a same type except non-volatile, we change the MD type to __cpu_simple_lock_nv_t and typedef __cpu_simple_lock_t as a volatile __cpu_simple_lock_nv_t. IMO, __cpu_simple_lock_t should not be volatile at all, but changing it now is too risky. Fixes at least Rumprun w/ gcc 5.1/5.2. Furthermore, the mpd application (and possibly others) will no longer require NetBSD-specific patches. Tested: build.sh for i386, Rumprun for x86_64 w/ gcc 5.2. Based on the patch from Christos in lib/49989.
1.50	14-Dec-2014	chs	fix powerpc TLS problems by removing the hacks for PPC EABI. the kernel no longer treats R2 specially and its use as the TLS register is now handled entirely in userland.
1.49	18-Mar-2014	riastradh	branches: 1.49.4; 1.49.6; Merge riastradh-drm2 to HEAD.
1.48	17-Jul-2013	matt	kcpuset_t changes for the pmap and removal of __cpuset_t
1.47	26-May-2012	matt	branches: 1.47.2; 1.47.4; 1.47.10; Add __HAVE_RAS support. Do it in userret.
1.46	17-Jul-2011	dyoung	branches: 1.46.2; 1.46.6; 1.46.8; Enable new-style <sys/bus.h> on several PowerPC ports supporting PCI buses. Make non-inline implementations of bus_space(9) and bus_dma(9) routines and move them to appropriate .c files. This may leave amigappc in a bad state, sorry. Fortunately, it will be easy to repair by imitating the bus.h -> bus_{defs,funcs}.h split in some other PowerPC port.
1.45	23-Jun-2011	matt	Switch to using the common <common/pmap/tlb/tlb.h>
1.44	14-Jun-2011	matt	Add mm_md_kernacc and now kmem tools work again.
1.43	13-Jun-2011	matt	Add __HAVE_CPU_UAREA_ROUTINES support so that uareas will be direct-mapped. (This avoids the nasty tlb recursion problem on ibm4xx as well on mpc85xx).
1.42	12-Jun-2011	matt	need mm_md_direct_mapped_phys support.
1.41	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.40	02-May-2011	matt	branches: 1.40.2; Move powerpc to use pcu to manage FPU/AltiVec/SPE.
1.39	07-Apr-2011	matt	Get rid of cpu_lwp_setprivate since it's not needed on powerpc.
1.38	12-Mar-2011	matt	Add TLS defines.
1.37	24-Feb-2011	joerg	Allow storing and receiving the LWP private pointer via ucontext_t on all platforms except VAX and IA64. Add fast access via register for AMD64, i386 and SH3 ports. Use this fast access in libpthread to replace the stack based pthread_self(). Implement skeleton support for Alpha, HPPA, PowerPC, SPARC and SPARC64, but leave it disabled. Ports that support this feature provide __HAVE____LWP_GETPRIVATE_FAST in machine/types.h and a corresponding __lwp_getprivate_fast in machine/mcontext.h. This material is based upon work partially supported by The NetBSD Foundation under a contract with Joerg Sonnenberger.
1.36	22-Dec-2010	matt	branches: 1.36.2; 1.36.4; Add a define __HAVE_CPU_DATA_FIRST which means that cpu_data is the first member in struct cpu_info.
1.35	07-Jul-2010	chs	implement cpu_lwp_setprivate() on several platforms.
1.34	11-Dec-2009	matt	branches: 1.34.2; 1.34.4; Add PRIx{P,V}{ADDR,SIZE}, PRIu{P,V}SIZE, and PRIxREGISTER{,32,64} for all (except where they will be added via merge). These should be used to print {p,v}{addr,size}_t and register*_t as appropriate.
1.33	31-Jan-2008	matt	branches: 1.33.10; 1.33.32; Add register{32,64}_t
1.32	20-Jan-2008	joerg	Now that __HAVE_TIMECOUNTER and __HAVE_GENERIC_TODR are invariants, remove the conditionals and the code associated with the undef case.
1.31	08-Jan-2008	joerg	Finish conversion of ppc and evbppc to timecounter. Tested by simonb@ on WALNUT.
1.30	29-Nov-2007	ad	branches: 1.30.6; __HAVE_ATOMIC64_OPS if 64-bit
1.29	17-Oct-2007	garbled	branches: 1.29.2; Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
1.28	17-May-2007	yamt	branches: 1.28.8; 1.28.10; merge yamt-idlelwp branch. asked by core@. some ports still needs work. from doc/BRANCHES: idle lwp, and some changes depending on it. 1. separate context switching and thread scheduling. (cf. gmcgarry_ctxsw) 2. implement idle lwp. 3. clean up related MD/MI interfaces. 4. make scheduler(s) modular.
1.27	05-Aug-2006	sanjayl	branches: 1.27.10; 1.27.14; 1.27.16; 1.27.22; 1st cut of Powermac G5 support (uses bridge mode).
1.26	24-Dec-2005	perry	branches: 1.26.4; 1.26.8; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.25	11-Dec-2005	christos	merge ktrace-lwp.
1.24	26-Sep-2003	nathanw	branches: 1.24.16; Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h so that they can be used in a namespace-friendly way.
1.23	25-Sep-2003	matt	Add siginfo support for PowerPC.
1.22	21-Jul-2003	hannken	Typo: __HAVE_BITENDIAN_BITOPS -> __HAVE_BIGENDIAN_BITOPS
1.21	18-Jul-2003	matt	Elimindate MD setrunqueue/remrunqueue (which were out-of-date compared to the canonical versions in kern_synch.c). Define __HAVE_BIGENDIAN_BITOPS so the canonical versions will be used but will store priorities in the desired (MSB) order for PowerPC (which allows the use of the cntlzw (count leading zeroes, word) instruction in locore_subr.S to find the proper priority).
1.20	28-Apr-2003	bjh21	branches: 1.20.2; Add a new feature-test macro, _NETBSD_SOURCE. If this is defined by the application, all NetBSD interfaces are made visible, even if some other feature-test macro (like _POSIX_C_SOURCE) is defined. <sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE, _POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve existing behaviour. This has two major advantages: + Programs that require non-POSIX facilities but define _POSIX_C_SOURCE can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS. + It makes most of the #ifs simpler, in that they're all now ORs of the various macros, rather than having checks for (!defined(_ANSI_SOURCE) \|\| !defined(_POSIX_C_SOURCE) \|\| !defined(_XOPEN_SOURCE)) all over the place. I've tried not to change the semantics of the headers in any case where _NETBSD_SOURCE wasn't defined, but there were some places where the current semantics were clearly mad, and retaining them was harder than correcting them. In particular, I've mostly normalised things so that _ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE, _XOPEN_SOURCE and _NETBSD_SOURCE in that order. Tested by building for vax, encouraged by thorpej, and uncontested in tech-userlevel for a week.
1.19	18-Jan-2003	matt	Make register_t. Change the printfs in trap.c to match.
1.18	16-Jan-2003	matt	A small LP64 fix.
1.17	22-Sep-2002	simonb	Use "#define\t" instead of "#define ".
1.16	22-Sep-2002	gmcgarry	Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives.
1.15	14-Aug-2002	matt	Prepare for PPC64. Use register_t for mtmsr/mfmsr since the msr on PPC64 is 64bits wide. Define proper types for PPC64 if _LP64 is defined.
1.14	05-Jul-2002	matt	Peform a rototill over the powerpc-based ports. Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT initialization code. Add user Altivec support. Fix calls to OF_call_method in macppc/macppc/machdep.c. Use ci_fpuproc in cpu_info instead of separate fpuproc. Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
1.13	28-Feb-2002	simonb	branches: 1.13.8; Use "#define<tab>".
1.12	28-Apr-2001	kleink	branches: 1.12.2; 1.12.8; * Move definitions of exact-width integer types from <machine/types.h> to <sys/types.h> and <sys/stdint.h>. * Add a new C99 <stdint.h> header, which provides integer types of explicit width, related limits and integer constant macros. * Extend <inttypes.h> to provide <stdint.h> definitions and format macros for printf() and scanf(). * Add C99 strtoimax() and strtoumax() functions. * Use the latter within scanf(). * Add C99 %j, %t and %z printf()/scanf() conversions for intmax_t, pointer-type and size_t arguments.
1.11	04-Mar-2001	matt	branches: 1.11.2; Nuke vm_offset_t, vm_size_t from powerpc.
1.10	03-Jan-2001	takemura	replace 'long long' with int64_t to compile stand alone program with compiler other than GCC.
1.9	11-Jun-2000	tsubai	Add cpu_counter().
1.8	13-Aug-1998	eeh	branches: 1.8.12; 1.8.20; Merge paddr_t changes into the main branch.
1.7	14-Jun-1998	kleink	branches: 1.7.2; GC the unused `physadr' type, which was not able to hold a complete physical address on 2 architectures anyhow. Also, move the definition of the `label_t' type inside _KERNEL protection, since it is specific to the in-kernel setjmp()/longjmp() implementations.
1.6	23-Feb-1998	mycroft	Clean up, add physadr.
1.5	27-Jan-1998	sakamoto	Import DDB from OpenBSD/powerpc.
1.4	05-Nov-1997	thorpej	Mark uses of long long with /* LONGLONG */ for lint. From Chris Demetriou <cgd@pa.dec.com>.
1.3	16-Apr-1997	thorpej	branches: 1.3.8; Nuke __BROKEN_INDIRECT_CONFIG
1.2	05-Dec-1996	cgd	First step inn removing config_scan() and the hacks that gave devices on indirect-config busses a (permanent) softc that they could share between 'match' and 'attach' routines: Define __BROKEN_INDIRECT_CONFIG so that old autoconfiguration interfaces are used, until drivers are converted to use the new interfaces (actually, converted back to use the _older_ interfaces) which prohibit indirect configuration devices from receiving a softc in their match routine that they can share with their attach routine.
1.1	30-Sep-1996	ws	PowerPC port
1.3.8.1	05-Nov-1997	thorpej	Update from trunk: Mark usese of long long with /* LONGLONG */ for lint.
1.7.2.2	12-Aug-1998	eeh	Protect XOPEN and POSIX code from vm_offset_t, paddr_t, vaddr_t, vm_size_t, psize_t, and vsize_t.
1.7.2.1	30-Jul-1998	eeh	Split vm_offset_t and vm_size_t into paddr_t, psize_t, vaddr_t, and vsize_t.
1.8.20.1	22-Jun-2000	minoura	Sync w/ netbsd-1-5-base.
1.8.12.3	12-Mar-2001	bouyer	Sync with HEAD.
1.8.12.2	05-Jan-2001	bouyer	Sync with HEAD
1.8.12.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.11.2.1	21-Jun-2001	nathanw	Catch up to -current.
1.12.8.6	17-Jan-2003	thorpej	Sync with HEAD.
1.12.8.5	18-Oct-2002	nathanw	Catch up to -current.
1.12.8.4	27-Aug-2002	nathanw	Catch up to -current.
1.12.8.3	01-Aug-2002	nathanw	Catch up to -current.
1.12.8.2	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.12.8.1	28-Apr-2001	nathanw	file types.h was added on branch nathanw_sa on 2002-04-01 07:42:05 +0000
1.12.2.3	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.12.2.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.12.2.1	16-Mar-2002	jdolecek	Catch up with -current.
1.13.8.2	31-Aug-2002	gehenna	catch up with -current.
1.13.8.1	16-Jul-2002	gehenna	catch up with -current.
1.20.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.20.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.20.2.1	03-Aug-2004	skrll	Sync with HEAD
1.24.16.5	04-Feb-2008	yamt	sync with head.
1.24.16.4	07-Dec-2007	yamt	sync with head
1.24.16.3	03-Sep-2007	yamt	sync with head.
1.24.16.2	30-Dec-2006	yamt	sync with head.
1.24.16.1	21-Jun-2006	yamt	sync with head.
1.26.8.1	11-Aug-2006	yamt	sync with head
1.26.4.1	09-Sep-2006	rpaulo	sync with head
1.27.22.2	02-Aug-2007	macallan	sync with HEAD
1.27.22.1	22-May-2007	matt	Update to HEAD.
1.27.16.1	11-Jul-2007	mjf	Sync with head.
1.27.14.3	03-Dec-2007	ad	Sync with HEAD.
1.27.14.2	03-Dec-2007	ad	Sync with HEAD.
1.27.14.1	27-May-2007	ad	Sync with head.
1.27.10.1	03-Apr-2007	matt	Adapt powerpc to yamt-idlelwp. Nuke cpu_setfunc. Don't define _HAVE_BITENDIAN_BITOPS. Misc cleanups.
1.28.10.3	23-Mar-2008	matt	sync with HEAD
1.28.10.2	09-Jan-2008	matt	sync with HEAD
1.28.10.1	06-Nov-2007	matt	sync with HEAD
1.28.8.1	03-Dec-2007	joerg	Sync with HEAD.
1.29.2.2	18-Feb-2008	mjf	Sync with HEAD.
1.29.2.1	08-Dec-2007	mjf	Sync with HEAD.
1.30.6.2	23-Jan-2008	bouyer	Sync with HEAD.
1.30.6.1	08-Jan-2008	bouyer	Sync with HEAD
1.33.32.2	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.33.32.1	07-Jan-2011	matt	Add PRIx{P,V}{ADDR,SIZE} and PRIxREGISTER
1.33.10.2	11-Aug-2010	yamt	sync with head.
1.33.10.1	11-Mar-2010	yamt	sync with head
1.34.4.4	12-Jun-2011	rmind	sync with head
1.34.4.3	31-May-2011	rmind	sync with head
1.34.4.2	21-Apr-2011	rmind	sync with head
1.34.4.1	05-Mar-2011	rmind	sync with head
1.34.2.1	17-Aug-2010	uebayasi	Sync with HEAD.
1.36.4.1	05-Mar-2011	bouyer	Sync with HEAD
1.36.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.40.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.46.8.1	13-Jun-2012	riz	Pull up following revision(s) (requested by matt in ticket #340): sys/arch/powerpc/include/types.h: revision 1.47 sys/arch/powerpc/include/userret.h: revision 1.24 Add __HAVE_RAS support. Do it in userret.
1.46.6.1	02-Jun-2012	mrg	sync to latest -current.
1.46.2.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.46.2.1	30-Oct-2012	yamt	sync with head
1.47.10.1	23-Jul-2013	riastradh	sync with HEAD
1.47.4.1	28-Aug-2013	rmind	sync with head
1.47.2.2	03-Dec-2017	jdolecek	update from HEAD
1.47.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.49.6.4	05-Feb-2017	skrll	Sync with HEAD
1.49.6.3	19-Mar-2016	skrll	Sync with HEAD
1.49.6.2	22-Sep-2015	skrll	Sync with HEAD
1.49.6.1	06-Apr-2015	skrll	Sync with HEAD
1.49.4.1	31-Dec-2014	snj	Pull up following revision(s) (requested by chs in ticket #364): lib/libc/tls/tls.c: revision 1.8 libexec/ld.elf_so/tls.c: revision 1.10 sys/arch/powerpc/include/types.h: revision 1.50 sys/arch/powerpc/powerpc/sig_machdep.c: revision 1.44 fix powerpc TLS problems by removing the hacks for PPC EABI. the kernel no longer treats R2 specially and its use as the TLS register is now handled entirely in userland.
1.54.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.54.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.56.14.3	21-Apr-2020	martin	Sync with HEAD
1.56.14.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.56.14.1	10-Jun-2019	christos	Sync with HEAD
1.56.12.1	18-Jan-2019	pgoyette	Synch with HEAD
1.61.2.1	20-Apr-2020	bouyer	Sync with HEAD
1.64.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.65.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.31	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.30	06-Jul-2015	matt	Don't clear PSL_FP/PSL_VEC
1.29	06-Jul-2015	matt	Add a check to make sure that if PSL_FP is set, we own the FPU.
1.28	10-Mar-2014	matt	branches: 1.28.4; 1.28.6; same typo
1.27	10-Mar-2014	matt	Typo
1.26	09-Mar-2014	matt	Make sure to clear PSL_SE before going to usermode on BOOKE Revert back to testing PSL_SE in the trapframe and not mdlwp md_flags
1.25	09-Mar-2014	matt	Don't test for PSL_SE in tf_srr1 since will be cleared on the next exception. Keep a copy of it in l_md.md_flags which will be preserved.
1.24	26-May-2012	matt	branches: 1.24.2; 1.24.4; Add __HAVE_RAS support. Do it in userret.
1.23	17-May-2012	matt	Add an KASSERT to check that PSL_PR is always set.
1.22	27-Sep-2011	jym	branches: 1.22.2; 1.22.6; 1.22.8; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments. Fix call sites to reflect the new definition. Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
1.21	20-Jun-2011	matt	Explicitly include <powerpc/psl.h>
1.20	02-May-2011	matt	branches: 1.20.2; Move powerpc to use pcu to manage FPU/AltiVec/SPE.
1.19	19-Feb-2011	matt	Compare ci_veclwp against &lwp0, not NULL.
1.18	17-Feb-2011	matt	add begging of single step support. Since BookE doesn't support PSL_SE, if userret find PSL_SE set in SRR1, it will call booke_sstep to setup the debug registers.
1.17	18-Jan-2011	matt	branches: 1.17.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.16	21-Nov-2009	rmind	branches: 1.16.4; 1.16.6; Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
1.15	06-Nov-2007	simonb	branches: 1.15.18; 1.15.40; Fix unused variable warning for the non-FPU/altivec case.
1.14	05-Nov-2007	ad	branches: 1.14.2; Don't set l_usrpri / spc_curpriority here. mi_userret() does it.
1.13	16-Feb-2006	perry	branches: 1.13.24; 1.13.42; 1.13.44; 1.13.48; Change "inline" back to "__inline" in .h files -- C99 is still too new, and some apps compile things in C89 mode. C89 keywords stay. As per core@.
1.12	24-Dec-2005	perry	branches: 1.12.2; 1.12.4; 1.12.6; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.11	11-Dec-2005	christos	merge ktrace-lwp.
1.10	16-Apr-2004	hannken	branches: 1.10.12; Make it compile when PPC_HAVE_FPU is not defined.
1.9	15-Apr-2004	matt	Revamp how user MSR/SRR1 are dealt with. Add a PSL_USEROK_P(psl) macro which valids the bits (replaces the use of PSL_USERSTATIC). Add a PSL_USERSRR1 mask which is used to mask out status bits in the upper half of SRR1. Make sure PSL_VEC is set appropriately in userret(). PSL_VEC is in the same region as SSR1 status bits so it's not preserved on exceptions. Thus we need to make to set it. When returning a MSR/SRR1 to userland, always clear the status bits. Add emulation of the mfpvr, mtmsr, and mfmsr instructions.
1.8	06-Apr-2004	matt	When seeing if the FP or VEC unit has been stolen by another process, check PSL_{FP\|VEC} instead of PCB_{FP\|VEC}. The former will only be set if the process owned the {FP,VEC} unit when it trapped into the kernel. The latter would be set if the lwp ever used the {FP,VEC} unit.
1.7	04-Apr-2004	matt	When returning back to user mode, if the lwp has lost the FPU, not only clear PSL_FP bit (to force a FPU Unavailable exception) but clear PSL_FE0 and PSL_FE1 so that the FP execption mode is changes to ignore. This will prevent spurious FP exceptions being made when the running lwp doesn't own the FPU.
1.6	13-Feb-2004	wiz	Uppercase CPU, plural is CPUs.
1.5	31-Oct-2003	cl	Reduce code duplication by adding mi_userret() in sys/userret.h containing signal posting, kernel-exit handling and sa_upcall processing. XXX the pc532, sparc, sparc64 and vax ports should have their XXX userret() code rearranged to use this.
1.4	18-Jan-2003	thorpej	branches: 1.4.2; Merge the nathanw_sa branch.
1.3	08-Aug-2002	chs	branches: 1.3.2; 1.3.4; it's PPC_HAVE_FPU, not PPC_HAS_FPU. also, include the headers that turn on FPU and AltiVec features in case no one else does.
1.2	06-Aug-2002	chs	branches: 1.2.2; actually we shouldn't hold kernel_lock while calling postsig().
1.1	02-Aug-2002	chs	use a completely separate trap handler for syscall traps. this reduces syscall overhead by 10% to 20% depending on cpu type.
1.2.2.6	26-Sep-2002	nathanw	Change "if (l->l_flag & L_SA_UPCALL)" to "while (l->l_flag & L_SA_UPCALL)" in userret() functions or equivalent, to permit delivery of multiple upcalls in a single kernel entry. XXX It's getting crowded in here. Collapsing posting signals, upcalls, and XXX kernel-exit handling into one mechanism would be nice.
1.2.2.5	09-Aug-2002	nathanw	Pull up PPC_HAVE_FPU fix.
1.2.2.4	06-Aug-2002	nathanw	A little more LWP.
1.2.2.3	06-Aug-2002	nathanw	Finish LWPifying.
1.2.2.2	06-Aug-2002	nathanw	Catch up with powerpc rototilling.
1.2.2.1	06-Aug-2002	nathanw	file userret.h was added on branch nathanw_sa on 2002-08-06 22:47:10 +0000
1.3.4.2	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.3.4.1	08-Aug-2002	jdolecek	file userret.h was added on branch kqueue on 2002-09-06 08:39:18 +0000
1.3.2.2	31-Aug-2002	gehenna	catch up with -current.
1.3.2.1	08-Aug-2002	gehenna	file userret.h was added on branch gehenna-devsw on 2002-08-31 13:45:46 +0000
1.4.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.4.2.1	03-Aug-2004	skrll	Sync with HEAD
1.10.12.2	15-Nov-2007	yamt	sync with head.
1.10.12.1	21-Jun-2006	yamt	sync with head.
1.12.6.1	22-Apr-2006	simonb	Sync with head.
1.12.4.1	09-Sep-2006	rpaulo	sync with head
1.12.2.1	18-Feb-2006	yamt	sync with head.
1.13.48.1	13-Nov-2007	bouyer	Sync with HEAD
1.13.44.1	06-Nov-2007	matt	sync with HEAD
1.13.42.1	06-Nov-2007	joerg	Sync with HEAD.
1.13.24.2	03-Dec-2007	ad	Sync with HEAD.
1.13.24.1	03-Dec-2007	ad	Sync with HEAD.
1.14.2.1	19-Nov-2007	mjf	Sync with HEAD.
1.15.40.2	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.15.40.1	07-Jan-2011	matt	Deal with the trapframe changes.
1.15.18.1	11-Mar-2010	yamt	sync with head
1.16.6.1	06-Jun-2011	jruoho	Sync with HEAD.
1.16.4.2	31-May-2011	rmind	sync with head
1.16.4.1	05-Mar-2011	rmind	sync with head
1.17.2.1	05-Mar-2011	bouyer	Sync with HEAD
1.20.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.22.8.5	18-May-2016	martin	Pull up following revision(s) (requested by matt in ticket #1310): sys/arch/powerpc/include/userret.h: revision 1.29-1.30 sys/arch/powerpc/include/psl.h: revision 1.20 sys/arch/powerpc/oea/oea_machdep.c: revision 1.72 (via patch) Add a check to make sure that if PSL_FP is set, we own the FPU. Don't clear PSL_FP/PSL_VEC Remove PSL_SPV from BOOKE PSL_USERMOD Don't preserve PSL_FP/PSL_VEC in cpu_setmcontext.
1.22.8.4	19-Nov-2015	bouyer	Revert ticket 1310 (second try): > sys/arch/powerpc/include/psl.h 1.20 > sys/arch/powerpc/include/userret.h 1.29, 1.30 > sys/arch/powerpc/oea/altivec.c 1.30 > sys/arch/powerpc/oea/oea_machdep.c 1.72 > sys/arch/powerpc/powerpc/fpu.c 1.36 > > powerpc PCU fixes because it breaks the build: http://releng.netbsd.org/builds/netbsd-6/201511152000Z/
1.22.8.3	16-Nov-2015	bouyer	Revert ticket 1310: > sys/arch/powerpc/include/psl.h 1.20 > sys/arch/powerpc/include/userret.h 1.29, 1.30 > sys/arch/powerpc/oea/altivec.c 1.30 > sys/arch/powerpc/oea/oea_machdep.c 1.72 > sys/arch/powerpc/powerpc/fpu.c 1.36 > > powerpc PCU fixes because it breaks the build: http://releng.netbsd.org/builds/netbsd-6/201511152000Z/
1.22.8.2	15-Nov-2015	bouyer	Pull up following revision(s) (requested by matt in ticket #1310): sys/arch/powerpc/include/userret.h: revision 1.30 sys/arch/powerpc/powerpc/fpu.c: revision 1.36 sys/arch/powerpc/include/psl.h: revision 1.20 sys/arch/powerpc/include/userret.h: revision 1.29 sys/arch/powerpc/oea/oea_machdep.c: revision 1.72 sys/arch/powerpc/oea/altivec.c: revision 1.30 Add a check to make sure that if PSL_FP is set, we own the FPU. Don't clear PSL_FP/PSL_VEC Don't reload if just re-enabling Don't reload the FPU register if this is just a re-enable. Remove PSL_SPV from BOOKE PSL_USERMOD Don't preserve PSL_FP/PSL_VEC in cpu_setmcontext.
1.22.8.1	13-Jun-2012	riz	Pull up following revision(s) (requested by matt in ticket #340): sys/arch/powerpc/include/types.h: revision 1.47 sys/arch/powerpc/include/userret.h: revision 1.24 Add __HAVE_RAS support. Do it in userret.
1.22.6.1	02-Jun-2012	mrg	sync to latest -current.
1.22.2.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.22.2.2	30-Oct-2012	yamt	sync with head
1.22.2.1	23-May-2012	yamt	sync with head.
1.24.4.1	18-May-2014	rmind	sync with head
1.24.2.2	03-Dec-2017	jdolecek	update from HEAD
1.24.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.28.6.1	22-Sep-2015	skrll	Sync with HEAD
1.28.4.1	17-Jul-2015	snj	Pull up following revision(s) (requested by matt in ticket #868): sys/arch/powerpc/include/psl.h: revision 1.20 sys/arch/powerpc/include/userret.h: revisions 1.29, 1.30 sys/arch/powerpc/oea/altivec.c: revision 1.30 sys/arch/powerpc/oea/oea_machdep.c: revision 1.72 sys/arch/powerpc/powerpc/fpu.c: revision 1.36 Add a check to make sure that if PSL_FP is set, we own the FPU. -- Don't clear PSL_FP/PSL_VEC -- Don't reload if just re-enabling -- Don't reload the FPU register if this is just a re-enable. -- Remove PSL_SPV from BOOKE PSL_USERMOD -- Don't preserve PSL_FP/PSL_VEC in cpu_setmcontext.
1.7	27-Feb-2000	tsubai	Rewrite stdarg/varargs.
1.6	09-Feb-2000	tsubai	Change va_arg definition when __lint__ is defined.
1.5	03-Feb-2000	kleink	Add a C99-style va_copy macro.
1.4	02-Dec-1998	tsubai	branches: 1.4.10; Adapt to gcc change (calling sequence).
1.3	05-Jan-1998	perry	RCSID Police.
1.2	16-Apr-1997	thorpej	Update to varargs/stdarg implementation; conform to the SVR4 calling convention.
1.1	30-Sep-1996	ws	PowerPC port
1.4.10.1	20-Nov-2000	bouyer	Remove files that are no longer on the trunck
1.10	17-Jul-2011	joerg	Retire varargs.h support. Move machine/stdarg.h logic into MI sys/stdarg.h and expect compiler to provide proper builtins, defaulting to the GCC interface. lint still has a special fallback. Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and derive va_list as required by standards.
1.9	04-Dec-2002	thorpej	Revert my previous GCC 3.3-related changes; GCC 3.3 has been fixed to handle our stdarg/varargs ABI for PowerPC.
1.8	25-Oct-2002	thorpej	Make these work with GCC 3.x.
1.7	01-Jun-2002	tsubai	Add gcc 3.x version.
1.6	30-May-2001	tsubai	branches: 1.6.2; 1.6.8; 1.6.16; Add gcc-2.95 version.
1.5	27-Feb-2000	tsubai	branches: 1.5.6; Rewrite stdarg/varargs.
1.4	03-Feb-2000	kleink	Add a C99-style va_copy macro.
1.3	02-Dec-1998	tsubai	branches: 1.3.10; Adapt to gcc change (calling sequence).
1.2	16-Apr-1997	thorpej	Use new va-ppc.h
1.1	30-Sep-1996	ws	PowerPC port
1.3.10.1	20-Nov-2000	bouyer	Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code.
1.5.6.1	21-Jun-2001	nathanw	Catch up to -current.
1.6.16.1	15-Jul-2002	gehenna	catch up with -current.
1.6.8.4	11-Dec-2002	thorpej	Sync with HEAD.
1.6.8.3	11-Nov-2002	nathanw	Catch up to -current
1.6.8.2	20-Jun-2002	nathanw	Catch up to -current.
1.6.8.1	30-May-2001	nathanw	file varargs.h was added on branch nathanw_sa on 2002-06-20 03:40:32 +0000
1.6.2.1	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.27	15-Dec-2023	rin	powerpc: oea: For OEA64_BRIDGE, 1:1 map up to 3GiB memory As done for OEA. Note that kva over 3GiB is reserved. Provide PMAP_MAP_POOLPAGE for OEA64_BRIDGE at the same time, by which direct-mapped memory is utilized in order to work around starvation of 512MiB kernel virtual space. PR kern/57621
1.26	11-May-2022	andvar	branches: 1.26.4; s/varible/variable/
1.25	06-Jan-2021	rin	Drop unused headers. No functional changes intended.
1.24	06-Jul-2020	rin	branches: 1.24.2; Correct #ifdef; _MODULE not _MODULAR here. Now __HAVE_PMAP_PHYSSEG is defined correctly for modules, which was missing accidentally.
1.23	27-Jun-2020	rin	Restrict {MIN,MAX}_PAGE_SIZE for MODULAR \|\| _MODULE, which makes non-MODULAR kernel a little bit efficient. They are also exposed to userland for jemalloc.
1.22	29-Mar-2019	christos	Go back to not always defining PAGE_{SIZE,SHIFT,MASK}
1.21	27-Mar-2019	christos	Provide the (max) defaults for page size for userland.
1.20	23-Jun-2017	joerg	branches: 1.20.6; Recommit exec_subr.c revision 1.79: Always include a 1MB guard area beyond the end of stack. While ASLR will normally create a guard area as well, this provides a deterministic area for all binaries. Mitigates the rest of CVE-2017-1000374 and CVE-2017-1000375 from Qualys. Additionally, change VM_DEFAULT_ADDRESS_TOPDOWN to include user_stack_guard_size in the size reservation.
1.19	18-Oct-2014	snj	branches: 1.19.2; 1.19.12; src is too big these days to tolerate superfluous apostrophes. It's "its", people!
1.18	25-Jan-2014	christos	delete VM_DEFAULT_ADDRESS; some of those should be GC'ed because they match the default definition.
1.17	23-Feb-2012	matt	branches: 1.17.2; 1.17.4; Export MIN_PAGE_SIZE and MAX_PAGE_SIZE for modular kernels.
1.16	20-Jun-2011	matt	branches: 1.16.2; 1.16.4; 1.16.8; 1.16.10; Readd powerpc/include/vmparam.h to the set lists Export it to powerpc/include.h Protect pmap.h and vmparam.h from getting an #error when included from userland. Export safe definitions of VM_MAXUSER_ADDRESS, VM_MIN_ADDRESS, VM_MAX_ADDRESS when _RUMPKERNEL is defined.
1.15	20-Jun-2011	matt	PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.14	20-Jun-2011	matt	Don't export USER_SR if _MODULE is defined. Add a common <powerpc/vmparam.h> like we have for <powerpc/pmap.h>
1.13	16-Feb-2000	tsubai	Unused. (PR 9424)
1.12	11-Feb-2000	thorpej	Update for the NKMEMPAGES changes.
1.11	04-Dec-1999	ragge	CL* discarding.
1.10	02-May-1999	kleink	branches: 1.10.2; 1.10.8; Garbage-collect VM_MBUF_SIZE leftover.
1.9	23-Mar-1999	thorpej	branches: 1.9.4; VM_MBUF_SIZE is in terms of MCLBYTES, not CLBYTES.
1.8	16-Jan-1999	chuck	MNN is no longer optional, remove old code
1.7	31-Aug-1998	tsubai	vm_offset_t --> [pv]addr_t
1.6	08-Jul-1998	thorpej	Define one page free list, and put all pages on it.
1.5	05-Jun-1998	sakamoto	Merge in MACHINE_NEW_NONCONTIG support and some fix from Tsubai-San. UVM support.
1.4	18-Feb-1998	mycroft	Fix typo.
1.3	12-Jun-1997	mrg	bring mrg-vm-swap2 onto mainilne.
1.2	16-Apr-1997	thorpej	branches: 1.2.2; Always define MACHINE_NONCONTIG.
1.1	30-Sep-1996	ws	branches: 1.1.4; PowerPC port
1.1.4.1	12-Feb-1997	mrg	initial work for dynamic swap additions.
1.2.2.1	04-May-1997	mrg	re-merge mrg-vm-swap into -current, and call it mrg-vm-swap2.
1.9.4.2	06-Aug-1999	chs	take an initial guess at UBC parameters.
1.9.4.1	21-Jun-1999	thorpej	Sync w/ -current.
1.10.8.1	27-Dec-1999	wrstuden	Pull up to last week's -current.
1.10.2.1	20-Nov-2000	bouyer	Remove files that are no longer on the trunck
1.16.10.1	17-May-2012	riz	Pull up following revision(s) (requested by matt in ticket #255): sys/arch/powerpc/include/vmparam.h: revision 1.17 Export MIN_PAGE_SIZE and MAX_PAGE_SIZE for modular kernels.
1.16.8.1	24-Feb-2012	mrg	sync to -current.
1.16.4.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.16.4.1	17-Apr-2012	yamt	sync with head
1.16.2.2	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.16.2.1	20-Jun-2011	cherry	file vmparam.h was added on branch cherry-xenmp on 2011-06-23 14:19:31 +0000
1.17.4.1	18-May-2014	rmind	sync with head
1.17.2.2	03-Dec-2017	jdolecek	update from HEAD
1.17.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.19.12.1	31-Aug-2017	bouyer	Pull up following revision(s) (requested by joerg in ticket #234): sys/arch/amd64/include/vmparam.h: revision 1.43 sys/kern/exec_subr.c: revision 1.79 lib/libpthread/pthread_int.h: revision 1.94 sys/arch/mips/include/vmparam.h: revision 1.58 sys/arch/mips/include/vmparam.h: revision 1.59 lib/libpthread/TODO: revision 1.19 sys/arch/powerpc/include/vmparam.h: revision 1.20 sys/arch/riscv/include/vmparam.h: revision 1.2 sys/arch/riscv/include/vmparam.h: revision 1.3 sys/arch/i386/include/vmparam.h: revision 1.85 tests/lib/libpthread/t_join.c: revision 1.9 sys/uvm/uvm_meter.c: revision 1.66 sys/uvm/uvm_param.h: revision 1.36 sys/kern/exec_subr.c: revision 1.80 sys/uvm/uvm_param.h: revision 1.37 sys/kern/exec_subr.c: revision 1.81 sys/kern/exec_subr.c: revision 1.82 lib/libpthread/pthread_attr_getguardsize.3: revision 1.4 lib/libpthread/pthread.c: revision 1.148 lib/libpthread/pthread_attr.c: revision 1.17 sys/arch/amd64/include/vmparam.h: revision 1.42 Always include a 1MB guard area beyond the end of stack. While ASLR will normally create a guard area as well, this provides a deterministic area for all binaries. Mitigates the rest of CVE-2017-1000374 and CVE-2017-1000375 from Qualys. Revert for the moment, creates problems on i386. Recommit exec_subr.c revision 1.79: Always include a 1MB guard area beyond the end of stack. While ASLR will normally create a guard area as well, this provides a deterministic area for all binaries. Mitigates the rest of CVE-2017-1000374 and CVE-2017-1000375 from Qualys. Additionally, change VM_DEFAULT_ADDRESS_TOPDOWN to include user_stack_guard_size in the size reservation. Update VM_DEFAULT_ADDRESS32_TOPDOWN to include guard area. Export the guard size of the main thread via vm.guard_size. Add a complementary writable sysctl for the initial guard size of threads created via pthread_create. Let the existing attribut accessors do the right thing. Raise the default guard size for threads to 64KB.
1.19.2.1	28-Aug-2017	skrll	Sync with HEAD
1.20.6.1	10-Jun-2019	christos	Sync with HEAD
1.24.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.26.4.1	29-Dec-2023	martin	Additionally pull up following revision(s) (requested by rin in ticket #400): sys/arch/powerpc/include/oea/pmap.h: revision 1.39 sys/arch/powerpc/include/pmap.h: revision 1.43 sys/arch/powerpc/oea/pmap_kernel.c: revision 1.14 sys/arch/powerpc/oea/pmap.c: revision 1.117 sys/arch/powerpc/oea/pmap.c: revision 1.118 sys/arch/powerpc/oea/pmap.c: revision 1.119 sys/arch/powerpc/include/vmparam.h: revision 1.27 sys/arch/powerpc/powerpc/trap.c: revision 1.165 sys/arch/powerpc/oea/pmap.c: revision 1.120 sys/arch/powerpc/oea/pmap.c: revision 1.121 sys/arch/powerpc/powerpc/vm_machdep.c: revision 1.106 sys/arch/powerpc/powerpc/bus_dma.c: revision 1.56 powerpc/oea: trap: pmap_{pte,ste}_spill() even in the interrupt context Page table for oea is something like L2 TLB on memory; kernel and processes share its entries, and process entries can be spilled out. As done for MMU based on software-managed TLB, we need to restore such entries even in the interrupt context. Note that pmap_pte_spill() require no resouce to restore entries. Still-not-implemented pmap_ste_spill() for OEA64 should also. Part of PR kern/57621 powerpc/oea: pmap: Drop unused argument for pmap_pvo_reclaim(), NFC Part of PR kern/57621 powerpc/oea: pmap: Rework pmap_pte_spill() It was broken in many ways... Now, it gets working stable both for OEA and OEA64_BRIDGE, as far as I can see. Part of PR kern/57621 powerpc/oea: pmap: Fix mostly-pointless overhead of pmap_pvo_pool (1) Drop __aligned(32) from struct pvo_entry; otherwise, sizeof(struct pvo_entry) is round-up'ed to a multiple of 32. (2) Do not set sizeof(struct pvo_entry) to `align` argument for pool_init(9); it must be power of 2. (3) Align pvo_entry to 32-byte boundary only if reasonably possible, i.e., OEA without DIAGNOSTIC (--> POOL_REDZONE) for now. Part of PR kern/57621 powerpc/oea: pmap_create: Use PR_ZERO and drop memset(9), NFC Part of PR kern/57621 powerpc: oea: For OEA64_BRIDGE, 1:1 map up to 3GiB memory As done for OEA. Note that kva over 3GiB is reserved. Provide PMAP_MAP_POOLPAGE for OEA64_BRIDGE at the same time, by which direct-mapped memory is utilized in order to work around starvation of 512MiB kernel virtual space. PR kern/57621 powerpc: Make sure direct-mapped buffer fits within correct range For OEA and OEA64_BRIDGE, only first 3GiB memory is direct-mapped. Part of PR kern/57621
1.3	28-Apr-2008	martin	Remove clause 3 and 4 from TNF licenses
1.2	11-Dec-2005	christos	branches: 1.2.74; 1.2.76; 1.2.78; merge ktrace-lwp.
1.1	08-May-2004	kleink	branches: 1.1.2; Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
1.1.2.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.1.2.3	18-Sep-2004	skrll	Sync with HEAD.
1.1.2.2	03-Aug-2004	skrll	Sync with HEAD
1.1.2.1	08-May-2004	skrll	file wchar_limits.h was added on branch ktrace-lwp on 2004-08-03 10:39:29 +0000
1.2.78.1	16-May-2008	yamt	sync with head.
1.2.76.1	18-May-2008	yamt	sync with head.
1.2.74.1	02-Jun-2008	mjf	Sync with HEAD.
1.1	09-Mar-2010	matt	branches: 1.1.2; 1.1.6; 1.1.8; Add initial versions of these for BookE.
1.1.8.4	07-Jan-2011	matt	Fix cut & paste error.
1.1.8.3	07-Jan-2011	matt	Add usr/include/powerpc/booke and usr/include/powerpc/booke/spr.h
1.1.8.2	07-Jan-2011	matt	Descend into the booke include diretory
1.1.8.1	09-Mar-2010	matt	file Makefile was added on branch matt-nb5-pq3 on 2011-01-07 02:11:36 +0000
1.1.6.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.6.1	09-Mar-2010	uebayasi	file Makefile was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.1.2.2	11-Mar-2010	yamt	sync with head
1.1.2.1	09-Mar-2010	yamt	file Makefile was added on branch yamt-nfs-mp on 2010-03-11 15:02:50 +0000
1.2	01-Apr-2010	matt	Change booke_intr.h to intr.h since <powerpc/booke/intr.h> will be unique enough.
1.1	09-Mar-2010	matt	branches: 1.1.2; 1.1.4; Add initial versions of these for BookE.
1.1.4.1	30-May-2010	rmind	sync with head
1.1.2.3	11-Aug-2010	yamt	sync with head.
1.1.2.2	11-Mar-2010	yamt	sync with head
1.1.2.1	09-Mar-2010	yamt	file booke_intr.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:50 +0000
1.21	06-Jul-2020	rin	Include missing opt_multiprocessor.h.
1.20	07-Apr-2019	thorpej	Detangle some of the PowerPC CPU configuration spaghetti.
1.19	19-Apr-2018	christos	branches: 1.19.2; s/static inline/static __inline/g for consistency.
1.18	16-Jun-2015	matt	branches: 1.18.16; This needs to define PRIxPTE too.
1.17	02-Oct-2012	christos	branches: 1.17.14; move common tlb stuff to uvm
1.16	01-Aug-2012	matt	branches: 1.16.2; Add a machine splhist command to give (a incomplete) spl history. (only the most recent are going to be accurate). splraise(6) from 0 at 549214603 splraise(7) from 6 at 549214643 (+40) splx(6) from 7 at 549214691 (+48) splx(0) from 6 at 549214730 (+39)
1.15	01-Aug-2012	matt	Export dump_trapframe.
1.14	29-Jul-2012	matt	Add command line processing from uboot bootm $loadaddr [opts] [device] where opts is -[advqs] and device is the boot device. cpu_rootconf will now wait a bit for devices to appear until the boot device appears.
1.13	27-Jul-2012	matt	Fix -fno-common fallout.
1.12	30-Jun-2011	matt	branches: 1.12.2; Modify mapiodev to take a third argument indicating whether the space should be prefetchable (true) or not (false).
1.11	29-Jun-2011	matt	Declare cpu_hatch_data
1.10	23-Jun-2011	matt	Switch to using the common <common/pmap/tlb/tlb.h>
1.9	20-Jun-2011	matt	Explicitly include <powerpc/psl.h>
1.8	15-Jun-2011	matt	Move booke_fixup_stubs() to fixup.c and rename it to cpu_fixup_stubs(). This makes it easier for other PPC variants to use it.
1.7	14-Jun-2011	matt	Take the fast softint support in e500_intr.c and make generic so that it can be used to provide fast softint for other interrupt implementations.
1.6	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.5	17-Feb-2011	matt	branches: 1.5.2; 1.5.4; add begging of single step support. Since BookE doesn't support PSL_SE, if userret find PSL_SE set in SRR1, it will call booke_sstep to setup the debug registers.
1.4	16-Feb-2011	matt	Add little endian bus_space_tags. Note highest memory in cpu_softc.
1.3	08-Feb-2011	matt	Allow code to allow inclusive/exclusive locators for subdevices. (uses on mpc85xx to match on SVRs or not match on SVRs).
1.2	18-Jan-2011	matt	branches: 1.2.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	07-Jan-2011	matt	branches: 1.1.2; 1.1.4; file cpuvar.h was initially added on branch matt-nb5-pq3.
1.1.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.2.4	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.2.3	02-Aug-2011	matt	Pull in changes from -current to get ehci at cpunode working.
1.1.2.2	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.1.2.1	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.2.2.3	05-Mar-2011	bouyer	Sync with HEAD
1.2.2.2	17-Feb-2011	bouyer	Sync with HEAD
1.2.2.1	08-Feb-2011	bouyer	Sync with HEAD
1.5.4.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.5.2.3	12-Jun-2011	rmind	sync with head
1.5.2.2	05-Mar-2011	rmind	sync with head
1.5.2.1	17-Feb-2011	rmind	file cpuvar.h was added on branch rmind-uvmplock on 2011-03-05 20:51:37 +0000
1.12.2.1	30-Oct-2012	yamt	sync with head
1.16.2.2	03-Dec-2017	jdolecek	update from HEAD
1.16.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.17.14.1	22-Sep-2015	skrll	Sync with HEAD
1.18.16.1	22-Apr-2018	pgoyette	Sync with HEAD
1.19.2.1	10-Jun-2019	christos	Sync with HEAD
1.17	24-May-2022	andvar	fix various typos in comment, documentation and log messages.
1.16	27-Dec-2014	nonaka	Added SPI register definitions.
1.15	27-Dec-2014	nonaka	Preliminary support for P1023.
1.14	26-Jul-2012	matt	branches: 1.14.2; 1.14.16; Add ESDHC DCR definitions
1.13	18-Jul-2012	matt	Add P1025 support to the PCI truth tables. P1025 only has two PCIe ports, not 3.
1.12	17-Jul-2012	matt	The ETSEC on the P1025 has been moved/split so the MDIO stayed in the same place but each ETSEC has been split into two virtual halves (G0 and G1) and each one has a new different base address. For some reason, tsec1 connects to phy 2 and tsec2 connects to phy 1. Adjust config file to match
1.11	15-Jul-2012	matt	Add support for the Freescale TWR-P1025 evaluation board and the P1025/P1016 QorIQ processors. XXX tsec isn't working yet on the TWR-P1025.
1.10	02-Aug-2011	matt	branches: 1.10.2; Add some more DDR register definitions
1.9	30-Jun-2011	matt	Add LSOR register
1.8	09-Jun-2011	matt	Correct definitions of USB_SNOOP registers. Add USB_CONTROL register.
1.7	28-May-2011	matt	branches: 1.7.2; Add Boot Page PTR Register definitions.
1.6	02-May-2011	matt	Add LBC FCM defintions (for NAND).
1.5	16-Mar-2011	matt	Fix various nits related to P2020 support.
1.4	16-Feb-2011	matt	branches: 1.4.2; Add USB_SNOOP1/2 related definitions
1.3	08-Feb-2011	matt	Add some P2020 / MPC856x definitions.
1.2	18-Jan-2011	matt	branches: 1.2.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	07-Jan-2011	matt	branches: 1.1.2; 1.1.4; file e500reg.h was initially added on branch matt-nb5-pq3.
1.1.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.2.3	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.2.2	02-Aug-2011	matt	Pull in changes from -current to get ehci at cpunode working.
1.1.2.1	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.2.2.2	17-Feb-2011	bouyer	Sync with HEAD
1.2.2.1	08-Feb-2011	bouyer	Sync with HEAD
1.4.2.5	12-Jun-2011	rmind	sync with head
1.4.2.4	31-May-2011	rmind	sync with head
1.4.2.3	21-Apr-2011	rmind	sync with head
1.4.2.2	05-Mar-2011	rmind	sync with head
1.4.2.1	16-Feb-2011	rmind	file e500reg.h was added on branch rmind-uvmplock on 2011-03-05 20:51:37 +0000
1.7.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.10.2.1	30-Oct-2012	yamt	sync with head
1.14.16.1	06-Apr-2015	skrll	Sync with HEAD
1.14.2.1	03-Dec-2017	jdolecek	update from HEAD
1.9	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.8	06-Jul-2020	rin	e500_cpunode_submatch() should be declared regardless of _KERNEL_OPT.
1.7	27-Nov-2012	matt	Make the 85xx get closer to spinning up the secondary CPUs. Don't assume TLB1[0] has the mapping for VA/PA 0. Make sure the TLB1 entries that map physical memory have the M (memory coherent) bit set.
1.6	27-Jul-2012	matt	branches: 1.6.2; Fix -fno-common fallout.
1.5	29-Mar-2012	matt	Add e500_tlb_minimize prototype.
1.4	29-Jun-2011	matt	branches: 1.4.2; 1.4.6; 1.4.8; Add some e500 MP prototypes.
1.3	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.2	18-Jan-2011	matt	branches: 1.2.4; 1.2.6; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	07-Jan-2011	matt	branches: 1.1.2; 1.1.4; file e500var.h was initially added on branch matt-nb5-pq3.
1.1.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.2.2	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.2.1	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.2.6.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.2.4.3	12-Jun-2011	rmind	sync with head
1.2.4.2	05-Mar-2011	rmind	sync with head
1.2.4.1	18-Jan-2011	rmind	file e500var.h was added on branch rmind-uvmplock on 2011-03-05 20:51:37 +0000
1.4.8.1	09-May-2012	riz	Pull up following revision(s) (requested by matt in ticket #241): sys/arch/powerpc/conf/kern-mb.ldscript: revision 1.1 sys/arch/powerpc/include/booke/pmap.h: revision 1.9 sys/arch/powerpc/booke/e500_tlb.c: revision 1.8 sys/arch/powerpc/conf/files.powerpc: revision 1.83 sys/arch/powerpc/booke/booke_pmap.c: revision 1.13 sys/arch/powerpc/include/booke/e500var.h: revision 1.5 sys/arch/evbppc/mpc85xx/machdep.c: revision 1.23 Add ldscript which aligns .data to a 1MB boundary. (used for testing) Add PMAP_MINIMALTLB defflag Add vsize_t to pmap_md_{un,}map_poolpage. Add pmap_kvptefill prototype. Slightly change pmap_bootstrap prototype. Add e500_tlb_minimize prototype. Add support PMAP_MINIMALTLB option. This changes the default use of TLB1 entries to map all of physical memory to using two TLB1 entries, one for mapping text and one for data. The rest of memory is mapped using the page table which is updated as needed. This is used to trap memory corruption issues. Add support for PMAP_MINIMALTLB.
1.4.6.1	05-Apr-2012	mrg	sync to latest -current.
1.4.2.3	16-Jan-2013	yamt	sync with (a bit old) head
1.4.2.2	30-Oct-2012	yamt	sync with head
1.4.2.1	17-Apr-2012	yamt	sync with head
1.6.2.1	25-Feb-2013	tls	resync with head
1.12	05-Nov-2024	andvar	s/UCP/UDP/ in comments.
1.11	26-Feb-2024	andvar	branches: 1.11.2; s/Transmi /Transmit / in comments.
1.10	11-May-2022	andvar	fix various typos in comments.
1.9	19-Sep-2021	andvar	fix various typos in comments, messages and documentation.
1.8	26-Feb-2015	nonaka	Added some register definitions for multi-queue.
1.7	26-Feb-2015	nonaka	fix offset value of RBASEn.
1.6	17-Feb-2015	nonaka	Added Interrupt coalescing support.
1.5	17-Jul-2012	matt	branches: 1.5.2; 1.5.16; The ETSEC on the P1025 has been moved/split so the MDIO stayed in the same place but each ETSEC has been split into two virtual halves (G0 and G1) and each one has a new different base address. For some reason, tsec1 connects to phy 2 and tsec2 connects to phy 1. Adjust config file to match
1.4	07-May-2012	matt	Preserve some MACCFG2 bits
1.3	09-Jun-2011	matt	branches: 1.3.2; 1.3.6; 1.3.8; Fix ATTR register definitions
1.2	18-Jan-2011	matt	branches: 1.2.4; 1.2.6; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	07-Jan-2011	matt	branches: 1.1.2; 1.1.4; file etsecreg.h was initially added on branch matt-nb5-pq3.
1.1.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.2.1	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.2.6.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.2.4.3	12-Jun-2011	rmind	sync with head
1.2.4.2	05-Mar-2011	rmind	sync with head
1.2.4.1	18-Jan-2011	rmind	file etsecreg.h was added on branch rmind-uvmplock on 2011-03-05 20:51:37 +0000
1.3.8.1	17-May-2012	riz	Pull up following revision(s) (requested by matt in ticket #245): sys/arch/powerpc/booke/dev/pq3etsec.c: revision 1.13 sys/arch/powerpc/include/booke/etsecreg.h: revision 1.4 sys/arch/powerpc/booke/dev/pq3etsec.c: revision 1.11 sys/arch/powerpc/booke/dev/pq3etsec.c: revision 1.12 Read maccfg1/maccfg2/ecntrl so we can preserve bits we don't change (like GMII mode). Don't use the current value of maccfg2. Preserve some MACCFG2 bits
1.3.6.1	02-Jun-2012	mrg	sync to latest -current.
1.3.2.2	30-Oct-2012	yamt	sync with head
1.3.2.1	23-May-2012	yamt	sync with head.
1.5.16.1	06-Apr-2015	skrll	Sync with HEAD
1.5.2.1	03-Dec-2017	jdolecek	update from HEAD
1.11.2.1	02-Aug-2025	perseant	Sync with HEAD
1.13	12-Sep-2022	rin	PR port-powerpc/56922 __HAVE_FAST_SOFTINTS is broken for powerpc. Disable it temporarily also for booke.
1.12	23-Nov-2019	ad	cpu_need_resched(): - Remove all code that should be MI, leaving the bare minimum under arch/. - Make the required actions very explicit. - Pass in LWP pointer for convenience. - When a trap is required on another CPU, have the IPI set it locally. - Expunge cpu_did_resched().
1.11	19-Apr-2018	christos	branches: 1.11.2; s/static inline/static __inline/g for consistency.
1.10	19-Oct-2016	nonaka	branches: 1.10.14; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
1.9	23-Jan-2015	nonaka	branches: 1.9.2; ddb MP support
1.8	19-May-2014	rmind	branches: 1.8.4; Implement MI IPI interface with cross-call support.
1.7	29-Mar-2014	christos	branches: 1.7.2; make pci_intr_string and eisa_intr_string take a buffer and a length instead of relying in local static storage.
1.6	21-Jun-2011	matt	branches: 1.6.2; 1.6.12; 1.6.16; forward declare cpu_info and trapframe.
1.5	15-Jun-2011	matt	Add IST_PULSE and intr_typename (converts IST_* to a name).
1.4	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.3	08-Feb-2011	matt	branches: 1.3.2; Add IPI/cpu_send_ipi to intrsw.
1.2	18-Jan-2011	matt	branches: 1.2.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	01-Apr-2010	matt	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; Change booke_intr.h to intr.h since <powerpc/booke/intr.h> will be unique enough.
1.1.10.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.8.3	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.8.2	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.1.8.1	01-Apr-2010	matt	file intr.h was added on branch matt-nb5-pq3 on 2011-01-07 01:26:20 +0000
1.1.6.2	11-Aug-2010	yamt	sync with head.
1.1.6.1	01-Apr-2010	yamt	file intr.h was added on branch yamt-nfs-mp on 2010-08-11 22:52:34 +0000
1.1.4.4	12-Jun-2011	rmind	sync with head
1.1.4.3	05-Mar-2011	rmind	sync with head
1.1.4.2	30-May-2010	rmind	sync with head
1.1.4.1	01-Apr-2010	rmind	file intr.h was added on branch rmind-uvmplock on 2010-05-30 05:17:03 +0000
1.1.2.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.2.1	01-Apr-2010	uebayasi	file intr.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.2.2.1	08-Feb-2011	bouyer	Sync with HEAD
1.3.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.6.16.1	18-May-2014	rmind	sync with head
1.6.12.2	03-Dec-2017	jdolecek	update from HEAD
1.6.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.6.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.7.2.1	10-Aug-2014	tls	Rebase.
1.8.4.2	05-Dec-2016	skrll	Sync with HEAD
1.8.4.1	06-Apr-2015	skrll	Sync with HEAD
1.9.2.1	04-Nov-2016	pgoyette	Sync with HEAD
1.10.14.1	22-Apr-2018	pgoyette	Sync with HEAD
1.11.2.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.2	30-Jun-2011	matt	branches: 1.2.2; Add prototypes for lbc_* routines.
1.1	28-May-2011	matt	branches: 1.1.2; 1.1.6; Move obio softc definitions to a header so it can use by children of obio.
1.1.6.2	06-Jun-2011	jruoho	Sync with HEAD.
1.1.6.1	28-May-2011	jruoho	file obiovar.h was added on branch jruoho-x86intr on 2011-06-06 09:06:28 +0000
1.1.2.2	31-May-2011	rmind	sync with head
1.1.2.1	28-May-2011	rmind	file obiovar.h was added on branch rmind-uvmplock on 2011-05-31 03:04:14 +0000
1.2.2.2	26-Jul-2011	matt	Back port improvements from -HEAD.
1.2.2.1	30-Jun-2011	matt	file obiovar.h was added on branch matt-nb5-pq3 on 2011-07-26 03:35:25 +0000
1.7	27-Dec-2014	nonaka	Preliminary support for P1023.
1.6	15-Jul-2012	matt	branches: 1.6.2; 1.6.16; Add support for the Freescale TWR-P1025 evaluation board and the P1025/P1016 QorIQ processors. XXX tsec isn't working yet on the TWR-P1025.
1.5	02-Aug-2011	matt	branches: 1.5.2; MPC8544 don't any onchip irqs of 20/21
1.4	27-May-2011	matt	Fix P20x0_ONCHIPBITMAP to reflect latest P2020RM.
1.3	08-Feb-2011	matt	Add MPC8555/41, MPC8568/67, and P2020 variations.
1.2	18-Jan-2011	matt	branches: 1.2.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	01-Apr-2010	matt	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; OpenPIC register defintions used by e500 booke.
1.1.10.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.8.3	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.8.2	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.1.8.1	01-Apr-2010	matt	file openpicreg.h was added on branch matt-nb5-pq3 on 2011-01-07 01:26:20 +0000
1.1.6.2	11-Aug-2010	yamt	sync with head.
1.1.6.1	01-Apr-2010	yamt	file openpicreg.h was added on branch yamt-nfs-mp on 2010-08-11 22:52:34 +0000
1.1.4.4	31-May-2011	rmind	sync with head
1.1.4.3	05-Mar-2011	rmind	sync with head
1.1.4.2	30-May-2010	rmind	sync with head
1.1.4.1	01-Apr-2010	rmind	file openpicreg.h was added on branch rmind-uvmplock on 2010-05-30 05:17:03 +0000
1.1.2.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.2.1	01-Apr-2010	uebayasi	file openpicreg.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.2.2.1	08-Feb-2011	bouyer	Sync with HEAD
1.5.2.1	30-Oct-2012	yamt	sync with head
1.6.16.1	06-Apr-2015	skrll	Sync with HEAD
1.6.2.1	03-Dec-2017	jdolecek	update from HEAD
1.25	28-Sep-2023	skrll	#define<space> -> #define<tab> for consistency
1.24	20-Dec-2020	skrll	Support __HAVE_PMAP_PV_TRACK in sys/uvm/pmap based pmaps (aka common pmap)
1.23	07-Aug-2020	skrll	branches: 1.23.2; Provide a pmap_segtab_deactivate for symmetry with pmap_segtab_activate and use it in pmap_deactivate Call pmap_md_xtab_{,de}activate from pmap_segtab_{,de}activate to be used for PMAP_HWPAGEWALKER and any caches ops that might be required. Provide empty (for now) pmap_md_xtab_{,de}activate functions on the platforms that use sys/uvm/pmap
1.22	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.21	08-Apr-2020	skrll	Simplify #ifdefs
1.20	12-Mar-2020	thorpej	If we're going to consult the MULTIPROCESSOR option, we should pull in "opt_multiprocessor.h".
1.19	11-Mar-2020	thorpej	With DEBUG defined, it's possible to execute a TLB-vs-segmap consistency check from a (soft) interrupt handler. But if a platform does not otherwise require the pmap_tlb_miss_lock, then where will be a brief window of inconsistency that, while harmless, will still fire an assertion in the consistency check. Fix this with the following changes: 1- Refactor the pmap_tlb_miss_lock into MI code and rename it from pmap_tlb_miss_lock_{enter,exit}() to pmap_tlb_miss_lock_{enter,exit}(). MD code can still define the "md" hooks as necessary, and if so, will override the common implementation. 2- Provde a pmap_bootstrap_common() function to perform common pmap bootstrap operations, namely initializing the pmap_tlb_miss_lock if it's needed. If MD code overrides the implementation, it's responsible for initializing its own lock. 3- Call pmap_bootstrap_common() from the mips, powerpc booke, and riscv pmap_bootstrap() routines. (This required adding one for riscv.) 4- Switch powerpc booke to the common pmap_tlb_miss_lock. 5- Enable pmap_tlb_miss_lock if DEBUG is defined, even if it's not otherwise required. PR port-mips/55062 (Failed assertion in pmap_md_tlb_check_entry())
1.18	19-Apr-2018	christos	branches: 1.18.2; s/static inline/static __inline/g for consistency.
1.17	24-Dec-2016	cherry	branches: 1.17.14; Tell mpc85xx about uvm_hotplug(9) Should fix the evbppc build breakage.
1.16	11-Jul-2016	matt	branches: 1.16.2; Adapt to common pmap changes.
1.15	26-Jan-2015	nonaka	Avoid race condition between PTE update and TLB miss walk.
1.14	03-Apr-2014	matt	branches: 1.14.6; Add PMAP_TLB_FLUSH_ASID_ON_RESET define
1.13	18-Mar-2014	riastradh	Merge riastradh-drm2 to HEAD.
1.12	17-Jul-2013	matt	kcpuset_t changes for the pmap and removal of __cpuset_t
1.11	02-Oct-2012	christos	branches: 1.11.2; 1.11.8; move common tlb stuff to uvm
1.10	09-Jul-2012	matt	branches: 1.10.2; Use pmap_segtab_t
1.9	29-Mar-2012	matt	Add vsize_t to pmap_md_{un,}map_poolpage. Add pmap_kvptefill prototype. Slightly change pmap_bootstrap prototype.
1.8	30-Jun-2011	matt	branches: 1.8.2; 1.8.6; 1.8.8; Modify mapiodev to take a third argument indicating whether the space should be prefetchable (true) or not (false).
1.7	23-Jun-2011	matt	Move some MD parts back to the booke pmap.c. Cleanup initialization a bit.
1.6	20-Jun-2011	matt	PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.5	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.4	17-Feb-2011	matt	branches: 1.4.2; 1.4.4; Use _PMAP_PRIVATE to control the inclusion of <powerpc/booke/cpuvar.h>. This prevents most of the MI files from depending on it.
1.3	08-Feb-2011	matt	BookE needs PMAP_NEEDS_PROCWR (for ptrace breakpoints)
1.2	18-Jan-2011	matt	branches: 1.2.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	07-Jan-2011	matt	branches: 1.1.2; 1.1.4; file pmap.h was initially added on branch matt-nb5-pq3.
1.1.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.2.2	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.2.1	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.2.2.2	05-Mar-2011	bouyer	Sync with HEAD
1.2.2.1	08-Feb-2011	bouyer	Sync with HEAD
1.4.4.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.4.2.3	12-Jun-2011	rmind	sync with head
1.4.2.2	05-Mar-2011	rmind	sync with head
1.4.2.1	17-Feb-2011	rmind	file pmap.h was added on branch rmind-uvmplock on 2011-03-05 20:51:37 +0000
1.8.8.1	09-May-2012	riz	Pull up following revision(s) (requested by matt in ticket #241): sys/arch/powerpc/conf/kern-mb.ldscript: revision 1.1 sys/arch/powerpc/include/booke/pmap.h: revision 1.9 sys/arch/powerpc/booke/e500_tlb.c: revision 1.8 sys/arch/powerpc/conf/files.powerpc: revision 1.83 sys/arch/powerpc/booke/booke_pmap.c: revision 1.13 sys/arch/powerpc/include/booke/e500var.h: revision 1.5 sys/arch/evbppc/mpc85xx/machdep.c: revision 1.23 Add ldscript which aligns .data to a 1MB boundary. (used for testing) Add PMAP_MINIMALTLB defflag Add vsize_t to pmap_md_{un,}map_poolpage. Add pmap_kvptefill prototype. Slightly change pmap_bootstrap prototype. Add e500_tlb_minimize prototype. Add support PMAP_MINIMALTLB option. This changes the default use of TLB1 entries to map all of physical memory to using two TLB1 entries, one for mapping text and one for data. The rest of memory is mapped using the page table which is updated as needed. This is used to trap memory corruption issues. Add support for PMAP_MINIMALTLB.
1.8.6.1	05-Apr-2012	mrg	sync to latest -current.
1.8.2.3	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.8.2.2	30-Oct-2012	yamt	sync with head
1.8.2.1	17-Apr-2012	yamt	sync with head
1.10.2.3	03-Dec-2017	jdolecek	update from HEAD
1.10.2.2	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.10.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.11.8.1	23-Jul-2013	riastradh	sync with HEAD
1.11.2.2	18-May-2014	rmind	sync with head
1.11.2.1	28-Aug-2013	rmind	sync with head
1.14.6.3	05-Feb-2017	skrll	Sync with HEAD
1.14.6.2	05-Oct-2016	skrll	Sync with HEAD
1.14.6.1	06-Apr-2015	skrll	Sync with HEAD
1.16.2.1	07-Jan-2017	pgoyette	Sync with HEAD. (Note that most of these changes are simply $NetBSD$ tag issues.)
1.17.14.1	22-Apr-2018	pgoyette	Sync with HEAD
1.18.2.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.18.2.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.23.2.1	03-Jan-2021	thorpej	Sync w/ HEAD.
1.11	22-Aug-2020	skrll	Remove pte_zero_p and simply check against 0.
1.10	19-Apr-2018	christos	s/static inline/static __inline/g for consistency.
1.9	24-Jun-2017	skrll	branches: 1.9.4; Provide a pte_set
1.8	11-Jul-2016	matt	Adapt to common pmap changes.
1.7	11-Jun-2015	matt	Add PRIxPTE and pte_value(pt_entry_t) for printing the value of a PTE. Add pte_zero_p(pt_entry_t) to check that a PTE has been zeroed.
1.6	30-Jun-2011	matt	branches: 1.6.12; 1.6.30; Modify mapiodev to take a third argument indicating whether the space should be prefetchable (true) or not (false).
1.5	23-Jun-2011	matt	Redo how the pte_wire inlines work. Now pmap.c makes no assuming about what type pt_entry_t. It can now be a scalar or a union/struct.
1.4	23-Jun-2011	matt	Switch to using the common <common/pmap/tlb/tlb.h>
1.3	20-Jun-2011	matt	PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.2	18-Jan-2011	matt	branches: 1.2.4; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	09-Mar-2010	matt	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; Add initial versions of these for BookE.
1.1.10.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.8.3	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.8.2	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.1.8.1	09-Mar-2010	matt	file pte.h was added on branch matt-nb5-pq3 on 2011-01-07 01:26:20 +0000
1.1.6.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.6.1	09-Mar-2010	uebayasi	file pte.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.1.4.1	05-Mar-2011	rmind	sync with head
1.1.2.2	11-Mar-2010	yamt	sync with head
1.1.2.1	09-Mar-2010	yamt	file pte.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:50 +0000
1.2.4.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.6.30.3	28-Aug-2017	skrll	Sync with HEAD
1.6.30.2	05-Oct-2016	skrll	Sync with HEAD
1.6.30.1	22-Sep-2015	skrll	Sync with HEAD
1.6.12.1	03-Dec-2017	jdolecek	update from HEAD
1.9.4.1	22-Apr-2018	pgoyette	Sync with HEAD
1.15	05-Dec-2021	msaitoh	s/seach/search/
1.14	03-Aug-2021	andvar	Fix various typos in comments. Also add missing NetBSD RCS Id in some of these files.
1.13	27-Dec-2014	nonaka	Added MMUv2 define.
1.12	20-Dec-2014	nonaka	Added P1023/P1017.
1.11	01-Aug-2012	matt	branches: 1.11.2; 1.11.16; Fix some copy&paste bugs.
1.10	18-Jul-2012	matt	Add some more PVRs and SVRs
1.9	15-Jul-2012	matt	Add support for the Freescale TWR-P1025 evaluation board and the P1025/P1016 QorIQ processors. XXX tsec isn't working yet on the TWR-P1025.
1.8	09-Jul-2012	matt	Add some e500mc/e5500 machines.
1.7	05-Jun-2011	matt	branches: 1.7.2; Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.6	29-Apr-2011	matt	branches: 1.6.2; Add some P10xx SVRs
1.5	16-Feb-2011	matt	Add MPC8533 SVR. Fix DBCR0 IAC bits
1.4	08-Feb-2011	matt	Add more MPC85xx SVRs. Fix/add debug register definitions.
1.3	18-Jan-2011	matt	branches: 1.3.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.2	01-Apr-2010	matt	branches: 1.2.2; 1.2.4; 1.2.6; Fix some TCR definitions.
1.1	09-Mar-2010	matt	branches: 1.1.2; 1.1.4; Add initial versions of these for BookE.
1.1.4.4	12-Jun-2011	rmind	sync with head
1.1.4.3	31-May-2011	rmind	sync with head
1.1.4.2	05-Mar-2011	rmind	sync with head
1.1.4.1	30-May-2010	rmind	sync with head
1.1.2.3	11-Aug-2010	yamt	sync with head.
1.1.2.2	11-Mar-2010	yamt	sync with head
1.1.2.1	09-Mar-2010	yamt	file spr.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:50 +0000
1.2.6.1	06-Jun-2011	jruoho	Sync with HEAD.
1.2.4.3	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.2.4.2	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.2.4.1	01-Apr-2010	matt	file spr.h was added on branch matt-nb5-pq3 on 2011-01-07 01:26:20 +0000
1.2.2.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.2.2.1	01-Apr-2010	uebayasi	file spr.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.3.2.2	17-Feb-2011	bouyer	Sync with HEAD
1.3.2.1	08-Feb-2011	bouyer	Sync with HEAD
1.6.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.7.2.1	30-Oct-2012	yamt	sync with head
1.11.16.1	06-Apr-2015	skrll	Sync with HEAD
1.11.2.1	03-Dec-2017	jdolecek	update from HEAD
1.2	18-Jan-2011	matt	Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	09-Mar-2010	matt	branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; Add initial versions of these for BookE.
1.1.10.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.8.2	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.1.8.1	09-Mar-2010	matt	file trap.h was added on branch matt-nb5-pq3 on 2011-01-07 01:26:20 +0000
1.1.6.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.6.1	09-Mar-2010	uebayasi	file trap.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.1.4.1	05-Mar-2011	rmind	sync with head
1.1.2.2	11-Mar-2010	yamt	sync with head
1.1.2.1	09-Mar-2010	yamt	file trap.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:50 +0000
1.10	11-Sep-2021	andvar	Add missing double p and d for stopped and overriden accordingly. Fix few more typos along the way, mainly in copy-pasted comments.
1.9	17-Apr-2021	rin	Sync MAXfoo params with oea: MAXTSIZ: 512MB -> 128MB MAXDSIZ: 3.25GB -> 1GB There should be no particular reasons for having different values.
1.8	17-Apr-2021	rin	PR port-powerpc/56107 Decrease MAXSSIZ from ~256MB to 32MB (same as oea). This fixes tests in /usr/tests/usr.bin/make, that run with "ulimit -v 200000", fail with "Cannot map anonymous memory". Although I'm not fully convinced whether this limit is reasonable or not, old MAXSSIZ of ~256MB is too much anyway.
1.7	02-Oct-2012	christos	branches: 1.7.52; move common tlb stuff to uvm
1.6	09-Jul-2012	matt	branches: 1.6.2; Allow the use of the full 4GB address space.
1.5	20-Jun-2011	matt	branches: 1.5.2; PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.4	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.3	18-Jan-2011	matt	branches: 1.3.4; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.2	06-Nov-2010	uebayasi	branches: 1.2.2; 1.2.4; Remove incomplete, never worked dynamic run-time memory registration (uvm_page_physload(9)). This functionality will be re-added later.
1.1	09-Mar-2010	matt	branches: 1.1.2; 1.1.4; 1.1.6; Add initial versions of these for BookE.
1.1.6.3	27-May-2010	uebayasi	VM_PHYSSEG_NOADD is no more.
1.1.6.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.6.1	09-Mar-2010	uebayasi	file vmparam.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.1.4.2	12-Jun-2011	rmind	sync with head
1.1.4.1	05-Mar-2011	rmind	sync with head
1.1.2.2	11-Mar-2010	yamt	sync with head
1.1.2.1	09-Mar-2010	yamt	file vmparam.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:50 +0000
1.2.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.2.2.3	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.2.2.2	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.2.2.1	06-Nov-2010	matt	file vmparam.h was added on branch matt-nb5-pq3 on 2011-01-07 01:26:20 +0000
1.3.4.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.5.2.1	30-Oct-2012	yamt	sync with head
1.6.2.1	20-Nov-2012	tls	Resync to 2012-11-19 00:00:00 UTC
1.7.52.1	17-Apr-2021	thorpej	Sync with HEAD.
1.6	25-Feb-2010	matt	Split <powerpc/spr.h> into a common <powerpc/spr.h> and <powerpc/XXX/spr.h> where XXX is ibm4xx or oea.
1.5	11-Dec-2005	christos	branches: 1.5.78; 1.5.98; 1.5.102; merge ktrace-lwp.
1.4	19-Jan-2005	chs	ibm4xx/pte.h is no more.
1.3	26-Nov-2002	lukem	branches: 1.3.6; 1.3.14; Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.
1.2	10-Apr-2002	briggs	Install cpu.h. Noted in PR port-powerpc/16285 from smi@sm.sony.co.jp.
1.1	13-Jun-2001	simonb	branches: 1.1.2; 1.1.8; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.8.3	11-Dec-2002	thorpej	Sync with HEAD.
1.1.8.2	17-Apr-2002	nathanw	Catch up to -current.
1.1.8.1	13-Jun-2001	nathanw	file Makefile was added on branch nathanw_sa on 2002-04-17 00:04:12 +0000
1.1.2.1	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.3.14.1	29-Apr-2005	kent	sync with -current
1.3.6.1	24-Jan-2005	skrll	Sync with HEAD.
1.5.102.1	07-Jan-2011	matt	Add spr.h
1.5.98.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.5.78.1	11-Mar-2010	yamt	sync with head
1.1	18-Mar-2010	kiyohara	branches: 1.1.2; 1.1.4; 1.1.6; Support PowerPC 405EX/EXr. 1. Add some new source and header files. (MAL(split) and RGMII(new) relations for EMAC) 2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h. 3. intr.c supports MULTIUIC with virtual-irq. likes to oea. support 32-virq/128-hwirq. 4. multiple emac support. 5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx. 6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
1.1.6.2	11-Aug-2010	yamt	sync with head.
1.1.6.1	18-Mar-2010	yamt	file amcc405ex.h was added on branch yamt-nfs-mp on 2010-08-11 22:52:34 +0000
1.1.4.2	30-May-2010	rmind	sync with head
1.1.4.1	18-Mar-2010	rmind	file amcc405ex.h was added on branch rmind-uvmplock on 2010-05-30 05:17:03 +0000
1.1.2.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.2.1	18-Mar-2010	uebayasi	file amcc405ex.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.4	25-Jul-2003	scw	Switch ibm4xx over to using the more flexible powerpc bus_space/bus_dma code.
1.3	15-Jun-2003	fvdl	branches: 1.3.2; Handle 64bit DMA addresses on PCI for platforms that can (currently only enabled on amd64). Add a dmat64 field to various PCI attach structures, and pass it down where needed. Implement a simple new function called pci_dma64_available(pa) to test if 64bit DMA addresses may be used. This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>, and there is more than 4G of memory.
1.2	11-Mar-2003	hannken	Add support for the IBM 403GCX cpu. Enabled with "options PPC_IBM403". - different set of device control registers. - non-standard access to the time base. - 16 byte cache lines. Approved by: Eduardo Horvath <eeh@netbsd.org>
1.1	09-Dec-2002	scw	branches: 1.1.2; Changes/additions to support evbppc.
1.1.2.2	11-Dec-2002	thorpej	Sync with HEAD.
1.1.2.1	09-Dec-2002	thorpej	file bus.h was added on branch nathanw_sa on 2002-12-11 06:11:42 +0000
1.3.2.1	03-Aug-2004	skrll	Sync with HEAD
1.27	02-Nov-2021	ryo	fix build with COPTS=-O0
1.26	31-May-2021	simonb	Include "opt_param.h" (ifdef _KERNEL_OPT) everywhere that MSGBUFSIZE is referenced since some sources include <machine/param.h>.
1.25	30-Mar-2021	rin	branches: 1.25.2; Convert walnut to use powerpc/ibm4xx/openbios. No functional changes.
1.24	30-Mar-2021	rin	G/C bootpath.
1.23	29-Mar-2021	rin	Set com(4) frequency in ibm4xx_device_register() in order to dedup codes.
1.22	19-Apr-2018	christos	branches: 1.22.14; 1.22.16; s/static inline/static __inline/g for consistency.
1.21	27-Jul-2012	matt	branches: 1.21.38; Fix some -fno-common fallout
1.20	20-Jun-2011	matt	branches: 1.20.2; Change IBM4xx to use the common powerpc PIC framework. Consolidate most ibm4xx initppc function into ibm4xx_init and Make all IBM4xx use it. Change explora to use initppc instead of bootstrap.
1.19	20-Jun-2011	matt	Explicitly include <powerpc/psl.h>
1.18	18-Jun-2011	matt	Move PVR definitions to <powerpc/ibm4xx/spr.h> No need to include <powerpc/cpu.h> in <powerpc/ib4xx/cpu.h>
1.17	17-Jun-2011	matt	struct device * -> device_t struct cfdata * -> cfdata_t split device/softc (CFATTACH_DECL_NEW) use device_accessors and device_private constify
1.16	18-Jan-2011	matt	branches: 1.16.4; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.15	18-Mar-2010	kiyohara	branches: 1.15.2; Support PowerPC 405EX/EXr. 1. Add some new source and header files. (MAL(split) and RGMII(new) relations for EMAC) 2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h. 3. intr.c supports MULTIUIC with virtual-irq. likes to oea. support 32-virq/128-hwirq. 4. multiple emac support. 5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx. 6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
1.14	14-Mar-2009	dsl	branches: 1.14.2; 1.14.4; Remove all the __P() from sys (excluding sys/dist) Diff checked with grep and MK1 eyeball. i386 and amd64 GENERIC and sys still build.
1.13	31-Aug-2006	freza	branches: 1.13.60; 1.13.68; 1.13.74; 1.13.82; * add PVR values for Xilinx 405 cores * don't try to decode vendor-specific PVR, print raw value instead. * panic() if we see cache wasn't probed, we'd crash later anyway. * rework the way PVR gets translated to core name. * while there, normalize printf format ("%s: ...", device_xname(self), ...). OK by matt@
1.12	05-May-2006	thorpej	Remove the devprop API and switch everthing over to the new proplib. Add a new device_properties() accessor for device_t that returns the device's property dictionary.
1.11	11-Dec-2005	christos	branches: 1.11.4; 1.11.6; 1.11.8; 1.11.10; 1.11.12; merge ktrace-lwp.
1.10	21-Jan-2005	shige	branches: 1.10.8; Add consinit() and md_consinit funcptr to ibm4xx/machdep.c. Rename consinit() to obs405_consinit() at evbppc/obs405/consinit.c. Set md_consinit to obs405_consinit() at initppc(). Consinit fuction calls a function stored at md_consinit pointer.
1.9	18-Jan-2005	shige	Arrange some machine-dependent code. - ibm40x_machdep.c: ibm40x specific . ibm40x_memsize_init . mem_regions . other functions are moved to machdep.c or ibm4xx_machdep.c. - ibm4xx_machdep.c: ibm4xx specific . ibm4xx_init (moved from ibm40x_machdep.c) . ibm4xx_install_extint (moved from ibm40x_machdep.c) . ibm4xx_cpu_startup (moved from ibm40x_machdep.c:ibm4xx_startup) . ibm4xx_dumpsys
1.8	17-Jan-2005	shige	Remove openbios dependent code from ibm4xx/ibm40x dependent module.
1.7	13-Jan-2005	shige	branches: 1.7.2; Add externs: - md_device_register (func ptr) - ibm4xx_device_register (func)
1.6	23-Sep-2003	shige	branches: 1.6.6; Add IBM40x specific machdep functions.
1.5	13-Jun-2003	msaitoh	branches: 1.5.2; Add support IBM 405GPr
1.4	11-Aug-2002	simonb	Define the 4xx PVR values in one place only.
1.3	13-May-2002	matt	branches: 1.3.2; 1.3.6; Remove redundant declarations.
1.2	15-Mar-2002	eeh	branches: 1.2.4; Use properties to pass around board-specific information rather than a structure.
1.1	13-Mar-2002	eeh	Add this file.
1.2.4.4	13-Aug-2002	nathanw	Catch up to -current.
1.2.4.3	20-Jun-2002	nathanw	Catch up to -current.
1.2.4.2	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.2.4.1	15-Mar-2002	nathanw	file cpu.h was added on branch nathanw_sa on 2002-04-01 07:42:05 +0000
1.3.6.3	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.3.6.2	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.3.6.1	13-May-2002	jdolecek	file cpu.h was added on branch kqueue on 2002-06-23 17:39:43 +0000
1.3.2.1	31-Aug-2002	gehenna	catch up with -current.
1.5.2.5	24-Jan-2005	skrll	Sync with HEAD.
1.5.2.4	17-Jan-2005	skrll	Sync with HEAD.
1.5.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.5.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.5.2.1	03-Aug-2004	skrll	Sync with HEAD
1.6.6.1	15-Sep-2005	riz	Pull up following revision(s) (requested by shige in ticket #5820): distrib/evbppc/md-kernel/Makefile 1.3 via patch etc/etc.evbppc/Makefile.inc 1.3 via patch sys/arch/evbppc/conf/files.obs405 1.5-1.8 via patch sys/arch/evbppc/conf/OPENBLOCKS266 1.22,1.25 via patch sys/arch/evbppc/include/obs266.h 1.1 (new) sys/arch/evbppc/include/obs405.h 1.1-1.5 (new) sys/arch/evbppc/include/rbus_machdep.h 1.1 (new) sys/arch/evbppc/obs405/consinit.c 1.2-1.4 sys/arch/evbppc/obs405/dev/x1226.c deleted sys/arch/evbppc/obs405/dev/x1226reg.h deleted sys/arch/evbppc/obs405/machdep.c deleted sys/arch/evbppc/obs405/obs266_autoconf.c 1.1 (new) sys/arch/evbppc/obs405/obs266_machdep.c 1.1 (new, plus patch) sys/arch/evbppc/obs405/obs405_autoconf.c 1.1 (new, plus patch) sys/arch/evbppc/obs405/obs405_machdep.c 1.1 (new) sys/arch/evbppc/obs405/rbus_machdep.c 1.1 (new) sys/arch/powerpc/conf/files.ibm4xx 1.6-1.7 sys/arch/powerpc/ibm4xx/board_prop.c 1.1 (new) sys/arch/powerpc/ibm4xx/dev/com_opb.c 1.12 sys/arch/powerpc/ibm4xx/dev/comopbvar.h 1.1 (new) sys/arch/powerpc/ibm4xx/ibm40x_machdep.c 1.3-1.4 sys/arch/powerpc/ibm4xx/ibm4xx_autoconf.c 1.1-1.2 (new) sys/arch/powerpc/ibm4xx/ibm4xx_machdep.c 1.1-1.3 (new) sys/arch/powerpc/ibm4xx/ibm4xxgpx_autoconf.c 1.2-1.3 sys/arch/powerpc/ibm4xx/openbios/openbios.c 1.1 (new) sys/arch/powerpc/include/ibm4xx/cpu.h 1.7-1.10 sys/arch/powerpc/include/ibm4xx/openbios.h 1.1 (new) Update OpenBlockS266 support to more modern, stable sources.
1.7.2.1	29-Apr-2005	kent	sync with -current
1.10.8.2	30-Dec-2006	yamt	sync with head.
1.10.8.1	21-Jun-2006	yamt	sync with head.
1.11.12.1	24-May-2006	tron	Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
1.11.10.1	11-May-2006	elad	sync with head
1.11.8.2	03-Sep-2006	yamt	sync with head.
1.11.8.1	24-May-2006	yamt	sync with head.
1.11.6.1	01-Jun-2006	kardel	Sync with head.
1.11.4.1	09-Sep-2006	rpaulo	sync with head
1.13.82.1	17-Jan-2011	matt	Add SPE (signal processing engine) support for mpc85xx/booke. Think of it as AltiVec-lite (really lite). Genercize AltiVec support so that it could the same interface could support SPE as well. Rework the FPU support along the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
1.13.74.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.13.68.1	28-Apr-2009	skrll	Sync with HEAD.
1.13.60.2	11-Aug-2010	yamt	sync with head.
1.13.60.1	04-May-2009	yamt	sync with head.
1.14.4.2	05-Mar-2011	rmind	sync with head
1.14.4.1	30-May-2010	rmind	sync with head
1.14.2.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.15.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.16.4.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.20.2.1	30-Oct-2012	yamt	sync with head
1.21.38.1	22-Apr-2018	pgoyette	Sync with HEAD
1.22.16.1	03-Apr-2021	thorpej	Sync with HEAD.
1.22.14.1	03-Apr-2021	thorpej	Sync with HEAD.
1.25.2.1	17-Jun-2021	thorpej	Sync w/ HEAD.
1.3	13-Mar-2002	eeh	Delete this file. It's only relevent to 405gp.
1.2	29-Aug-2001	simonb	branches: 1.2.6; Gah, fix a number of channel status/select bitfields.
1.1	13-Jun-2001	simonb	branches: 1.1.2; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.2.2	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.1.2.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.6.2	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.2.6.1	29-Aug-2001	nathanw	file dcr.h was added on branch nathanw_sa on 2002-04-01 07:42:05 +0000
1.4	28-Apr-2008	martin	Remove clause 3 and 4 from TNF licenses
1.3	30-May-2006	freza	branches: 1.3.60; 1.3.62; 1.3.64; Remove duplicate definitions of mfdcr()/mtdcr() in favor of a single one in cpu.h OK Matt Thomas
1.2	24-Dec-2005	perry	branches: 1.2.4; 1.2.6; 1.2.8; 1.2.14; bare asm -> __asm
1.1	11-Mar-2003	hannken	branches: 1.1.18; Add support for the IBM 403GCX cpu. Enabled with "options PPC_IBM403". - different set of device control registers. - non-standard access to the time base. - 16 byte cache lines. Approved by: Eduardo Horvath <eeh@netbsd.org>
1.1.18.1	21-Jun-2006	yamt	sync with head.
1.2.14.1	19-Jun-2006	chap	Sync with head.
1.2.8.1	26-Jun-2006	yamt	sync with head.
1.2.6.1	01-Jun-2006	kardel	Sync with head.
1.2.4.1	09-Sep-2006	rpaulo	sync with head
1.3.64.1	16-May-2008	yamt	sync with head.
1.3.62.1	18-May-2008	yamt	sync with head.
1.3.60.1	02-Jun-2008	mjf	Sync with HEAD.
1.6	18-Mar-2010	kiyohara	Support PowerPC 405EX/EXr. 1. Add some new source and header files. (MAL(split) and RGMII(new) relations for EMAC) 2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h. 3. intr.c supports MULTIUIC with virtual-irq. likes to oea. support 32-virq/128-hwirq. 4. multiple emac support. 5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx. 6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
1.5	30-May-2006	freza	branches: 1.5.64; 1.5.78; 1.5.84; 1.5.86; Remove duplicate definitions of mfdcr()/mtdcr() in favor of a single one in cpu.h OK Matt Thomas
1.4	24-Dec-2005	perry	branches: 1.4.4; 1.4.6; 1.4.8; 1.4.14; bare asm -> __asm
1.3	11-Dec-2005	christos	merge ktrace-lwp.
1.2	27-Jul-2003	simonb	branches: 1.2.16; Whitespace alignment nits.
1.1	13-Mar-2002	eeh	branches: 1.1.4; 1.1.10; 1.1.16; 405gp-specific DCRs.
1.1.16.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.1.16.2	18-Sep-2004	skrll	Sync with HEAD.
1.1.16.1	03-Aug-2004	skrll	Sync with HEAD
1.1.10.2	23-Jun-2002	jdolecek	catch up with -current on kqueue branch
1.1.10.1	13-Mar-2002	jdolecek	file dcr405gp.h was added on branch kqueue on 2002-06-23 17:39:44 +0000
1.1.4.2	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.1.4.1	13-Mar-2002	nathanw	file dcr405gp.h was added on branch nathanw_sa on 2002-04-01 07:42:05 +0000
1.2.16.1	21-Jun-2006	yamt	sync with head.
1.4.14.1	19-Jun-2006	chap	Sync with head.
1.4.8.1	26-Jun-2006	yamt	sync with head.
1.4.6.1	01-Jun-2006	kardel	Sync with head.
1.4.4.1	09-Sep-2006	rpaulo	sync with head
1.5.86.1	30-May-2010	rmind	sync with head
1.5.84.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.5.78.1	24-Oct-2010	jym	Sync with HEAD
1.5.64.1	11-Aug-2010	yamt	sync with head.
1.6	18-Mar-2010	kiyohara	Support PowerPC 405EX/EXr. 1. Add some new source and header files. (MAL(split) and RGMII(new) relations for EMAC) 2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h. 3. intr.c supports MULTIUIC with virtual-irq. likes to oea. support 32-virq/128-hwirq. 4. multiple emac support. 5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx. 6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
1.5	30-May-2006	freza	branches: 1.5.64; 1.5.78; 1.5.84; 1.5.86; Remove duplicate definitions of mfdcr()/mtdcr() in favor of a single one in cpu.h OK Matt Thomas
1.4	24-Dec-2005	perry	branches: 1.4.4; 1.4.6; 1.4.8; 1.4.14; bare asm -> __asm
1.3	11-Dec-2005	christos	merge ktrace-lwp.
1.2	17-Dec-2004	shige	branches: 1.2.2; 1.2.12; Substitute PPC405_ with PPC_IBM405_.
1.1	01-Dec-2004	shige	Add header file for IBM405XX(AMCC405XX) Device Control Registers.
1.2.12.1	21-Jun-2006	yamt	sync with head.
1.2.2.2	18-Dec-2004	skrll	Sync with HEAD.
1.2.2.1	17-Dec-2004	skrll	file dcr405xx.h was added on branch ktrace-lwp on 2004-12-18 09:31:26 +0000
1.4.14.1	19-Jun-2006	chap	Sync with head.
1.4.8.1	26-Jun-2006	yamt	sync with head.
1.4.6.1	01-Jun-2006	kardel	Sync with head.
1.4.4.1	09-Sep-2006	rpaulo	sync with head
1.5.86.1	30-May-2010	rmind	sync with head
1.5.84.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.5.78.1	24-Oct-2010	jym	Sync with HEAD
1.5.64.1	11-Aug-2010	yamt	sync with head.
1.4	02-Apr-2021	rin	Add bit-field definitions for DCR_SDRAM0_B[0-3]CR registers.
1.3	21-Nov-2013	kiyohara	branches: 1.3.42; 1.3.44; Support Synopsys DesigneWave OTG on PowerPC 405EX.
1.2	06-Nov-2010	uebayasi	branches: 1.2.8; 1.2.18; 1.2.22; More registers to support IBM405GPr "External Bus".
1.1	18-Mar-2010	kiyohara	branches: 1.1.2; 1.1.4; 1.1.6; Support PowerPC 405EX/EXr. 1. Add some new source and header files. (MAL(split) and RGMII(new) relations for EMAC) 2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h. 3. intr.c supports MULTIUIC with virtual-irq. likes to oea. support 32-virq/128-hwirq. 4. multiple emac support. 5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx. 6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
1.1.6.2	11-Aug-2010	yamt	sync with head.
1.1.6.1	18-Mar-2010	yamt	file dcr4xx.h was added on branch yamt-nfs-mp on 2010-08-11 22:52:34 +0000
1.1.4.3	05-Mar-2011	rmind	sync with head
1.1.4.2	30-May-2010	rmind	sync with head
1.1.4.1	18-Mar-2010	rmind	file dcr4xx.h was added on branch rmind-uvmplock on 2010-05-30 05:17:03 +0000
1.1.2.3	11-Aug-2010	uebayasi	Implement 405GPr's "External Bus" as exb(4).
1.1.2.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.2.1	18-Mar-2010	uebayasi	file dcr4xx.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.2.22.1	18-May-2014	rmind	sync with head
1.2.18.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.2.8.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.3.44.1	03-Apr-2021	thorpej	Sync with HEAD.
1.3.42.1	03-Apr-2021	thorpej	Sync with HEAD.
1.11	18-Mar-2010	kiyohara	Support PowerPC 405EX/EXr. 1. Add some new source and header files. (MAL(split) and RGMII(new) relations for EMAC) 2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h. 3. intr.c supports MULTIUIC with virtual-irq. likes to oea. support 32-virq/128-hwirq. 4. multiple emac support. 5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx. 6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
1.10	11-Dec-2005	christos	branches: 1.10.78; 1.10.98; 1.10.100; merge ktrace-lwp.
1.9	23-Sep-2003	shige	Add some PCI definitions listed in evbppc/include/walnut.h.
1.8	13-Aug-2002	simonb	branches: 1.8.6; Use "ibm4xx" instead of "galaxy"; galaxy was an early code name for the 405GP.
1.7	13-Aug-2002	simonb	Split out device register definitions to their own files as the are common across many of the 4xx parts. Leaves ibm405gp.h with device address information specific to the 405GP CPU. Now allows opb.c to support multiple 4xx CPU types.
1.6	11-Aug-2002	simonb	Define the 4xx PVR values in one place only.
1.5	21-Oct-2001	simonb	branches: 1.5.4; 1.5.12; Fix typo, noted by Artem Belevich.
1.4	14-Aug-2001	simonb	Fix typo, noted by UCHIYAMA Yasushi in private mail.
1.3	25-Jun-2001	simonb	branches: 1.3.2; Fix typo in emac0 base address.
1.2	24-Jun-2001	simonb	Move 405GP registers, addresses and other info to ibm405gp.h. Leave only board-specific addresses and other info in walnut.h.
1.1	13-Jun-2001	simonb	Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.3.2.3	06-Sep-2002	jdolecek	sync kqueue branch with HEAD
1.3.2.2	10-Jan-2002	thorpej	Sync kqueue branch with -current.
1.3.2.1	25-Aug-2001	thorpej	Merge Aug 24 -current into the kqueue branch.
1.5.12.1	31-Aug-2002	gehenna	catch up with -current.
1.5.4.3	27-Aug-2002	nathanw	Catch up to -current.
1.5.4.2	13-Aug-2002	nathanw	Catch up to -current.
1.5.4.1	21-Oct-2001	nathanw	file ibm405gp.h was added on branch nathanw_sa on 2002-08-13 02:18:46 +0000
1.8.6.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.8.6.2	18-Sep-2004	skrll	Sync with HEAD.
1.8.6.1	03-Aug-2004	skrll	Sync with HEAD
1.10.100.1	30-May-2010	rmind	sync with head
1.10.98.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.10.78.1	11-Aug-2010	yamt	sync with head.
1.21	20-Jun-2011	matt	Change IBM4xx to use the common powerpc PIC framework. Consolidate most ibm4xx initppc function into ibm4xx_init and Make all IBM4xx use it. Change explora to use initppc instead of bootstrap.
1.20	12-May-2011	kiyohara	branches: 1.20.2; Fix spl0(). Our IPL_NONE is not 0.
1.19	18-Jan-2011	matt	Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.18	24-Apr-2010	kiyohara	branches: 1.18.2; Support 64-bit imask for powerpc/pic.
1.17	18-Mar-2010	kiyohara	Support PowerPC 405EX/EXr. 1. Add some new source and header files. (MAL(split) and RGMII(new) relations for EMAC) 2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h. 3. intr.c supports MULTIUIC with virtual-irq. likes to oea. support 32-virq/128-hwirq. 4. multiple emac support. 5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx. 6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
1.16	28-Apr-2008	martin	branches: 1.16.20; 1.16.22; 1.16.26; Remove clause 3 and 4 from TNF licenses
1.15	03-Dec-2007	ad	branches: 1.15.14; 1.15.16; 1.15.18; Interrupt handling changes, in discussion since February: - Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
1.14	21-Dec-2006	yamt	branches: 1.14.6; 1.14.22; 1.14.24; 1.14.30; merge yamt-splraiseipl branch. - finish implementing splraiseipl (and makeiplcookie). http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html - complete workqueue(9) and fix its ipl problem, which is reported to cause audio skipping. - fix netbt (at least compilation problems) for some ports. - fix PR/33218.
1.13	27-Sep-2006	freza	Make sure we mask statclock timer on ibm4xx systems. This avoids pthread "related" panics like: panic: remrunqueue: bit 18 not set Stopped in pid 479.3 (exsprite) at netbsd:cpu_Debugger+0x10: lwz r 0, r1, 0x14 db> bt 0x869abe00: at panic+0x1b4 0x869abe50: at remrunqueue+0x80 0x869abe60: at mi_switch+0x114 0x869abea0: at sa_unblock_userret+0x4e8 0x869abee0: at syscall_plain+0x224 0x869abf40: user SC trap #93 by 0x41949810: srr1=0xc030 r1=0x445fff40 cr=0x40000002 xer=0 ctr=0x41aae208 esr=0 pid=0x36 While there, cleanup IPL_ definitions somewhat and fix interrupt mask calculation per spl(9). OK by matt@
1.12	30-Jun-2006	freza	branches: 1.12.4; 1.12.6; Bring ibm4xx interrupt code up to date: - generic soft interrupts (ie. use powerpc/softintr.c) - interrupt event counters (using the ones from powerpc/cpu.h:cpu_info where appropriate) - cleanup ibm4xx_intr.h, move implementation details to intr.c Convert all affected evbppc platforms. OK by simonb@, some points discussed with matt@
1.11	31-Dec-2005	hannken	branches: 1.11.2; 1.11.6; 1.11.14; Fix a typo introduced in revision 1.8: - #define splraiseipl(x) splraise(x) + #define splraiseipl(x) splraise(imask[x]) Approved by: YAMAMOTO Takashi <yamt@netbsd.org>
1.10	24-Dec-2005	perry	branches: 1.10.2; __asm__ -> __asm __const__ -> const __inline__ -> inline __volatile__ -> volatile
1.9	24-Dec-2005	perry	Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.8	27-Nov-2005	yamt	implement splraiseipl() for the following ports. evbppc, evbmips, evbsh3, hp700, mac68k, vax, x68k.
1.7	04-Sep-2005	kiyohara	branches: 1.7.6; Support the 'PCMCIA adapter BOX' for OpenBlockS266.
1.6	26-Nov-2003	simonb	branches: 1.6.14; 1.6.16; Fix some white space nits.
1.5	26-Nov-2003	simonb	Remove the prototype for the non-existent intr_md_register() function.
1.4	03-Sep-2003	matt	Move CLKF_BASEPRI to machine specific <intr.h> file since it depends on the encoding of the spl for the port.
1.3	05-Aug-2003	simonb	Note that the used interrupt bits are 405GP specific. Fix a tyop.
1.2	16-Jun-2003	thorpej	branches: 1.2.2; Rename IPL_IMP -> IPL_VM.
1.1	04-Mar-2003	matt	Re-arrange things in evbppc & powerpc to support OEA-based eval boards in evbppc. OEA-based board(s) to be added later.
1.2.2.5	11-Dec-2005	christos	Sync with head.
1.2.2.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.2.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.2.2.1	03-Aug-2004	skrll	Sync with HEAD
1.6.16.3	07-Dec-2007	yamt	sync with head
1.6.16.2	30-Dec-2006	yamt	sync with head.
1.6.16.1	21-Jun-2006	yamt	sync with head.
1.6.14.1	14-Sep-2005	tron	Apply patch (requested by shige in ticket #763): Synchronize OpenBlockS266 port with NetBSD-current for enhanced stability.
1.7.6.1	29-Nov-2005	yamt	sync with head.
1.10.2.1	15-Jan-2006	yamt	sync with head.
1.11.14.1	13-Jul-2006	gdamore	Merge from HEAD.
1.11.6.1	11-Aug-2006	yamt	sync with head
1.11.2.1	09-Sep-2006	rpaulo	sync with head
1.12.6.2	22-Oct-2006	yamt	sync with head
1.12.6.1	20-Sep-2006	yamt	implement new api for evbppc.
1.12.4.2	12-Jan-2007	ad	Sync with head.
1.12.4.1	18-Nov-2006	ad	Sync with head.
1.14.30.1	08-Dec-2007	mjf	Sync with HEAD.
1.14.24.1	09-Jan-2008	matt	sync with HEAD
1.14.22.1	09-Dec-2007	jmcneill	Sync with HEAD.
1.14.6.1	03-Dec-2007	ad	Sync with HEAD.
1.15.18.2	11-Aug-2010	yamt	sync with head.
1.15.18.1	16-May-2008	yamt	sync with head.
1.15.16.1	18-May-2008	yamt	sync with head.
1.15.14.1	02-Jun-2008	mjf	Sync with HEAD.
1.16.26.1	07-Jan-2011	matt	Remove CLKF_BASEPRI (it's obsolete).
1.16.22.3	31-May-2011	rmind	sync with head
1.16.22.2	05-Mar-2011	rmind	sync with head
1.16.22.1	30-May-2010	rmind	sync with head
1.16.20.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.18.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.20.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.1	13-Jun-2001	simonb	branches: 1.1.8; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.8.2	13-Jun-2001	simonb	Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.8.1	13-Jun-2001	simonb	file mal405gp.h was added on branch nathanw_sa on 2001-06-13 06:01:50 +0000
1.3	30-Mar-2021	rin	Remove unused "startkernel" argument for openbios_board_init().
1.2	11-Dec-2005	christos	branches: 1.2.178; 1.2.180; merge ktrace-lwp.
1.1	17-Jan-2005	shige	branches: 1.1.2; 1.1.10; 1.1.14; Add openbios-board related modules. - openbios.c getting board data memory image from openbios. setting all board data to board properties database. - board_prop.c initialize board properties database. (set/get board properties [macros in ibm4xx/cpu.h])
1.1.14.2	15-Sep-2005	riz	Pull up following revision(s) (requested by shige in ticket #5820): distrib/evbppc/md-kernel/Makefile 1.3 via patch etc/etc.evbppc/Makefile.inc 1.3 via patch sys/arch/evbppc/conf/files.obs405 1.5-1.8 via patch sys/arch/evbppc/conf/OPENBLOCKS266 1.22,1.25 via patch sys/arch/evbppc/include/obs266.h 1.1 (new) sys/arch/evbppc/include/obs405.h 1.1-1.5 (new) sys/arch/evbppc/include/rbus_machdep.h 1.1 (new) sys/arch/evbppc/obs405/consinit.c 1.2-1.4 sys/arch/evbppc/obs405/dev/x1226.c deleted sys/arch/evbppc/obs405/dev/x1226reg.h deleted sys/arch/evbppc/obs405/machdep.c deleted sys/arch/evbppc/obs405/obs266_autoconf.c 1.1 (new) sys/arch/evbppc/obs405/obs266_machdep.c 1.1 (new, plus patch) sys/arch/evbppc/obs405/obs405_autoconf.c 1.1 (new, plus patch) sys/arch/evbppc/obs405/obs405_machdep.c 1.1 (new) sys/arch/evbppc/obs405/rbus_machdep.c 1.1 (new) sys/arch/powerpc/conf/files.ibm4xx 1.6-1.7 sys/arch/powerpc/ibm4xx/board_prop.c 1.1 (new) sys/arch/powerpc/ibm4xx/dev/com_opb.c 1.12 sys/arch/powerpc/ibm4xx/dev/comopbvar.h 1.1 (new) sys/arch/powerpc/ibm4xx/ibm40x_machdep.c 1.3-1.4 sys/arch/powerpc/ibm4xx/ibm4xx_autoconf.c 1.1-1.2 (new) sys/arch/powerpc/ibm4xx/ibm4xx_machdep.c 1.1-1.3 (new) sys/arch/powerpc/ibm4xx/ibm4xxgpx_autoconf.c 1.2-1.3 sys/arch/powerpc/ibm4xx/openbios/openbios.c 1.1 (new) sys/arch/powerpc/include/ibm4xx/cpu.h 1.7-1.10 sys/arch/powerpc/include/ibm4xx/openbios.h 1.1 (new) Update OpenBlockS266 support to more modern, stable sources.
1.1.14.1	17-Jan-2005	riz	file openbios.h was added on branch netbsd-2 on 2005-09-15 14:28:44 +0000
1.1.10.2	29-Apr-2005	kent	sync with -current
1.1.10.1	17-Jan-2005	kent	file openbios.h was added on branch kent-audio2 on 2005-04-29 11:28:20 +0000
1.1.2.2	24-Jan-2005	skrll	Sync with HEAD.
1.1.2.1	17-Jan-2005	skrll	file openbios.h was added on branch ktrace-lwp on 2005-01-24 08:34:27 +0000
1.2.180.1	03-Apr-2021	thorpej	Sync with HEAD.
1.2.178.1	03-Apr-2021	thorpej	Sync with HEAD.
1.7	22-Jun-2011	matt	Add support pci_intr_setattr. Export non-inline version of pci api for modules (_MODULE is defined). Fix definition of pc_conf_hook and pc_conf_interrupt. Switch to using inlines instead of macros. Switch ibm4xx to use <powerpc/pci_machdep.h>
1.6	17-Jun-2011	matt	struct device * -> device_t struct cfdata * -> cfdata_t split device/softc (CFATTACH_DECL_NEW) use device_accessors and device_private constify
1.5	04-Apr-2011	dyoung	branches: 1.5.2; Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9), pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match predicate passed to pciide_compat_intr_establish() should ever modify their pci_attach_args argument, so make their pci_attach_args arguments const and deal with the fallout throughout the kernel. For the most part, these changes add a 'const' where there was no 'const' before, however, some drivers and MD code used to modify pci_attach_args. Now those drivers either copy their pci_attach_args and modify the copy, or refrain from modifying pci_attach_args: Xen: according to Manuel Bouyer, writing to pci_attach_args in pci_intr_map() was a leftover from Xen 2. Probably a bug. I stopped writing it. I have not tested this change. siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args. Probably a bug. I use a temporary variable. I have not tested this change. slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args. Probably a bug. Use a local pci_attach_args. I have not tested this change. viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the caller's pci_attach_args. Probably a bug. Make a local copy of the caller's pci_attach_args and modify the copy. I have not tested this change. While I'm here, make pci_mapreg_submap() static. With these changes in place, I have tested the compilation of these kernels: alpha GENERIC amd64 GENERIC XEN3_DOM0 arc GENERIC atari HADES MILAN-PCIIDE bebox GENERIC cats GENERIC cobalt GENERIC evbarm-eb NSLU2 evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200 KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425 evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3 evbmips64-el XLSATX evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266 OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT hp700 GENERIC i386 ALL XEN3_DOM0 XEN3_DOMU ibmnws GENERIC macppc GENERIC mvmeppc GENERIC netwinder GENERIC ofppc GENERIC prep GENERIC sandpoint GENERIC sgimips GENERIC32_IP2x sparc GENERIC_SUN4U KRUPS sparc64 GENERIC As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels with or without my patches in place: ### evbmips-el GDIUM nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop ### evbarm-el MPCSA_GENERIC src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc' ### ia64 GENERIC /tmp/genassym.28085/assym.c: In function 'f111': /tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb' /tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type ### sgimips GENERIC32_IP3x crmfb.o: In function `crmfb_attach': crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid' crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid' crmfb.c:(.text+0x234c): undefined reference to `edid_parse' crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse' crmfb.c:(.text+0x2354): undefined reference to `edid_print' crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
1.4	11-Dec-2005	christos	branches: 1.4.100; 1.4.106; merge ktrace-lwp.
1.3	04-Sep-2005	kiyohara	Support the 'PCMCIA adapter BOX' for OpenBlockS266.
1.2	02-Aug-2004	tacha	branches: 1.2.10; 1.2.12; remove obsolete "pci_enumerate_bus" definition.
1.1	04-Mar-2003	matt	branches: 1.1.2; Re-arrange things in evbppc & powerpc to support OEA-based eval boards in evbppc. OEA-based board(s) to be added later.
1.1.2.4	10-Nov-2005	skrll	Sync with HEAD. Here we go again...
1.1.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.1.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.1.2.1	03-Aug-2004	skrll	Sync with HEAD
1.2.12.1	21-Jun-2006	yamt	sync with head.
1.2.10.1	14-Sep-2005	tron	Apply patch (requested by shige in ticket #763): Synchronize OpenBlockS266 port with NetBSD-current for enhanced stability.
1.4.106.1	06-Jun-2011	jruoho	Sync with HEAD.
1.4.100.1	21-Apr-2011	rmind	sync with head
1.5.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.22	28-Sep-2023	skrll	Trailing whitespace.
1.21	14-Mar-2020	ad	pmap_remove_all(): Return a boolean value to indicate the behaviour. If true, all mappings have been removed, the pmap is totally cleared out, and UVM can then avoid doing the work to call pmap_remove() for each map entry. If false, either nothing has been done, or some helpful arch-specific voodoo has taken place.
1.20	05-Mar-2020	rin	Retire tlbpid_t (u_short): - PID (ctx, ASID) is 8-bit length, not half word. - For struct pmap, no need to use integer types smaller than word as pm_ctx because of alignment. - For ppc4xx_tlb_enter(), we need word-length storage for pid (and msr). XXX Better to rewrite pmap module with more suggestive integer types rather than char, int, long, and so on.
1.19	17-Jul-2019	skrll	branches: 1.19.2; Spell endianness correctly in comments
1.18	19-Apr-2018	christos	branches: 1.18.2; s/static inline/static __inline/g for consistency.
1.17	30-Jun-2011	matt	branches: 1.17.52; Modify mapiodev to take a third argument indicating whether the space should be prefetchable (true) or not (false).
1.16	20-Jun-2011	matt	PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.15	18-Jan-2011	matt	branches: 1.15.4; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.14	09-Dec-2008	pooka	branches: 1.14.6; 1.14.8; Make pmap_kernel() a MI macro for struct pmap *kernel_pmap_ptr, which is now the "API" provided by the pmap module. pmap_kernel() remains as the syntactic sugar. Bonus cosmetics round: move all the pmap_t pointer typedefs into uvm_pmap.h. Thanks to Greg Oster for providing cpu muscle for doing test builds.
1.13	21-Feb-2007	thorpej	branches: 1.13.42; 1.13.46; 1.13.52; 1.13.54; 1.13.66; Replace the Mach-derived boolean_t type with the C99 bool type. A future commit will replace use of TRUE and FALSE with true and false.
1.12	24-Dec-2005	perry	branches: 1.12.26; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.11	11-Dec-2005	christos	merge ktrace-lwp.
1.10	16-Jan-2005	chs	branches: 1.10.8; implement pmap_wired_count(). fix some places we would forget to splx(). move the parts of pte.h that were used into pmap.c (since they were really pmap-internal details) and delete ibm4xx/pte.h. other misc cleanup.
1.9	31-Aug-2004	simonb	branches: 1.9.4; Remove the unused MKTTE macro.
1.8	17-Aug-2003	chs	remove an unused proto.
1.7	25-Jul-2003	scw	Switch ibm4xx over to using the more flexible powerpc bus_space/bus_dma code.
1.6	02-Apr-2003	thorpej	branches: 1.6.2; Use PAGE_SIZE rather than NBPG.
1.5	22-Sep-2002	chs	it really helps to get the stub right before cutting + pasting it 27 times. alas, I did not. doh.
1.4	22-Sep-2002	chs	add pmap_remove_all() hook (empty on most platforms so far).
1.3	13-Mar-2002	eeh	pmap improvements: Remove the cache flush routines that have been moved to cpu.c Make sure we clear out the unused PA bits in the TTE which causes breakage on some MMU models.
1.2	11-Sep-2001	eeh	branches: 1.2.4; Implement pmap_growkernel().
1.1	13-Jun-2001	simonb	branches: 1.1.2; 1.1.4; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.4.1	01-Oct-2001	fvdl	Catch up with -current.
1.1.2.3	10-Oct-2002	jdolecek	sync kqueue with -current; this includes merge of gehenna-devsw branch, merge of i386 MP branch, and part of autoconf rototil work
1.1.2.2	16-Mar-2002	jdolecek	Catch up with -current.
1.1.2.1	13-Sep-2001	thorpej	Update the kqueue branch to HEAD.
1.2.4.3	18-Oct-2002	nathanw	Catch up to -current.
1.2.4.2	01-Apr-2002	nathanw	Catch up to -current. (CVS: It's not just a program. It's an adventure!)
1.2.4.1	11-Sep-2001	nathanw	file pmap.h was added on branch nathanw_sa on 2002-04-01 07:42:05 +0000
1.6.2.5	17-Jan-2005	skrll	Sync with HEAD.
1.6.2.4	21-Sep-2004	skrll	Fix the sync with head I botched.
1.6.2.3	18-Sep-2004	skrll	Sync with HEAD.
1.6.2.2	03-Sep-2004	skrll	Sync with HEAD
1.6.2.1	03-Aug-2004	skrll	Sync with HEAD
1.9.4.1	29-Apr-2005	kent	sync with -current
1.10.8.2	26-Feb-2007	yamt	sync with head.
1.10.8.1	21-Jun-2006	yamt	sync with head.
1.12.26.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.13.66.1	07-Jan-2011	matt	PMAP_NC -> PMAP_NOCACHE.
1.13.54.1	19-Jan-2009	skrll	Sync with HEAD.
1.13.52.1	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.13.46.1	04-May-2009	yamt	sync with head.
1.13.42.1	17-Jan-2009	mjf	Sync with HEAD.
1.14.8.1	06-Jun-2011	jruoho	Sync with HEAD.
1.14.6.1	05-Mar-2011	rmind	sync with head
1.15.4.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.17.52.1	22-Apr-2018	pgoyette	Sync with HEAD
1.18.2.2	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.18.2.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.19.2.1	09-Mar-2020	martin	Pull up following revision(s) (requested by rin in ticket #773): sys/arch/powerpc/ibm4xx/pmap.c: revision 1.81 sys/arch/powerpc/ibm4xx/pmap.c: revision 1.82 sys/arch/powerpc/ibm4xx/pmap.c: revision 1.83 sys/arch/powerpc/ibm4xx/pmap.c: revision 1.84 sys/arch/powerpc/ibm4xx/pmap.c: revision 1.85 sys/arch/powerpc/include/ibm4xx/tlb.h: revision 1.6 sys/arch/powerpc/include/ibm4xx/pmap.h: revision 1.20 Misc non-critical fixes. - __asm --> __asm volatile for sure - turn DEBUG code in __asm into DIAGNOSTIC code in C - style ppc4xx_tlb_enter(): invalidate entry after clearing MSR for sure. pmap_procwr(): use dcbst instead of dcbf as a tiny optimization. Retire tlbpid_t (u_short): - PID (ctx, ASID) is 8-bit length, not half word. - For struct pmap, no need to use integer types smaller than word as pm_ctx because of alignment. - For ppc4xx_tlb_enter(), we need word-length storage for pid (and msr). XXX Better to rewrite pmap module with more suggestive integer types rather than char, int, long, and so on. Fix pmap_procwr(). While we need to turn off IMMU, DMMU should be kept on. Otherwise, dcbst (and also icbi probably, though not documented clearly both for 405 and 403) should not work correctly.
1.2	16-Jan-2005	chs	implement pmap_wired_count(). fix some places we would forget to splx(). move the parts of pte.h that were used into pmap.c (since they were really pmap-internal details) and delete ibm4xx/pte.h. other misc cleanup.
1.1	13-Jun-2001	simonb	branches: 1.1.8; 1.1.24; 1.1.32; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.32.1	29-Apr-2005	kent	sync with -current
1.1.24.1	17-Jan-2005	skrll	Sync with HEAD.
1.1.8.2	13-Jun-2001	simonb	Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.8.1	13-Jun-2001	simonb	file pte.h was added on branch nathanw_sa on 2001-06-13 06:01:50 +0000
1.5	12-Sep-2022	rin	Make ibm4xx kernels compiled by clang. As clang cannot correctly assemble m[ft]pid: - for asm sources, use m[ft]spr from/to SPR_PID - for C sources, use M[FT]PID macros (see include/ibm4xx/spr.h) This is ugly... No binary changes for GCC-compiled kernels.
1.4	05-Mar-2021	rin	Add 403 family processors other than 403GCX.
1.3	18-Jun-2011	matt	branches: 1.3.66; Move PVR definitions to <powerpc/ibm4xx/spr.h> No need to include <powerpc/cpu.h> in <powerpc/ib4xx/cpu.h>
1.2	18-Mar-2010	kiyohara	branches: 1.2.2; 1.2.4; 1.2.10; Support PowerPC 405EX/EXr. 1. Add some new source and header files. (MAL(split) and RGMII(new) relations for EMAC) 2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h. 3. intr.c supports MULTIUIC with virtual-irq. likes to oea. support 32-virq/128-hwirq. 4. multiple emac support. 5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx. 6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
1.1	25-Feb-2010	matt	branches: 1.1.2; 1.1.4; Split <powerpc/spr.h> into a common <powerpc/spr.h> and <powerpc/XXX/spr.h> where XXX is ibm4xx or oea.
1.1.4.1	30-May-2010	rmind	sync with head
1.1.2.3	11-Aug-2010	yamt	sync with head.
1.1.2.2	11-Mar-2010	yamt	sync with head
1.1.2.1	25-Feb-2010	yamt	file spr.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:50 +0000
1.2.10.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.2.4.2	07-Jan-2011	matt	Split spr.h into generic PPC <powerpc/spr.h> and chip-specific <powerpc/XXX/spr.h> (XXX=oea, ibm4xx, booke)
1.2.4.1	18-Mar-2010	matt	file spr.h was added on branch matt-nb5-pq3 on 2011-01-07 01:34:23 +0000
1.2.2.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.2.2.1	18-Mar-2010	uebayasi	file spr.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.3.66.1	03-Apr-2021	thorpej	Sync with HEAD.
1.7	30-Mar-2021	rin	G/C misleading <evbppc/tlb.h>. Use <powerpc/ibm4xx/tlb.h> directly.
1.6	05-Mar-2020	rin	branches: 1.6.4; 1.6.6; Retire tlbpid_t (u_short): - PID (ctx, ASID) is 8-bit length, not half word. - For struct pmap, no need to use integer types smaller than word as pm_ctx because of alignment. - For ppc4xx_tlb_enter(), we need word-length storage for pid (and msr). XXX Better to rewrite pmap module with more suggestive integer types rather than char, int, long, and so on.
1.5	19-Apr-2018	christos	branches: 1.5.2; 1.5.6; s/static inline/static __inline/g for consistency.
1.4	16-Oct-2006	kiyohara	branches: 1.4.142; * convert ibm4xx-based evbppc from reserved-TLB entry allocation to recently introduced ppc4xx_tlb_reserve() API.
1.3	31-Aug-2006	freza	branches: 1.3.2; 1.3.4; * ppc4xx_tlb_reserve(): allocate "reserved" TLB entries dynamically * ppc4xx_tlb_mapiodev(): resolve pa to va from reserved TLB entries OK by matt@ XXX we'll keep TLB_NRESERVED defined until we fix explora to use new API
1.2	12-Jul-2006	simonb	Remove unused ppc4xx_tlb_unpin() function.
1.1	13-Jun-2001	simonb	branches: 1.1.8; 1.1.40; 1.1.54; 1.1.58; 1.1.66; Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.66.1	13-Jul-2006	gdamore	Merge from HEAD.
1.1.58.2	03-Sep-2006	yamt	sync with head.
1.1.58.1	11-Aug-2006	yamt	sync with head
1.1.54.1	09-Sep-2006	rpaulo	sync with head
1.1.40.1	30-Dec-2006	yamt	sync with head.
1.1.8.2	13-Jun-2001	simonb	Add a port to IBM's PPC405GP Reference Board (the "walnut") by Eduardo Horvath and Simon Burge of Wasabi Systems. IBM 4xx series CPU features: - New pmap and revised trap handler. - Support on-chip timers, PCI controller, UARTs - Framework for on-chip ethernet and watchdog timer. General PowerPC features: - Add in-kernel PPC floating point emulation - New in{,4}_cksum that is between 1.5 and 5 times faster than the old version depending on CPU type. General changes: - Kernel support for generic dbsym-style symbols.
1.1.8.1	13-Jun-2001	simonb	file tlb.h was added on branch nathanw_sa on 2001-06-13 06:01:51 +0000
1.3.4.1	22-Oct-2006	yamt	sync with head
1.3.2.1	18-Nov-2006	ad	Sync with head.
1.4.142.1	22-Apr-2018	pgoyette	Sync with HEAD
1.5.6.1	09-Mar-2020	martin	Pull up following revision(s) (requested by rin in ticket #773): sys/arch/powerpc/ibm4xx/pmap.c: revision 1.81 sys/arch/powerpc/ibm4xx/pmap.c: revision 1.82 sys/arch/powerpc/ibm4xx/pmap.c: revision 1.83 sys/arch/powerpc/ibm4xx/pmap.c: revision 1.84 sys/arch/powerpc/ibm4xx/pmap.c: revision 1.85 sys/arch/powerpc/include/ibm4xx/tlb.h: revision 1.6 sys/arch/powerpc/include/ibm4xx/pmap.h: revision 1.20 Misc non-critical fixes. - __asm --> __asm volatile for sure - turn DEBUG code in __asm into DIAGNOSTIC code in C - style ppc4xx_tlb_enter(): invalidate entry after clearing MSR for sure. pmap_procwr(): use dcbst instead of dcbf as a tiny optimization. Retire tlbpid_t (u_short): - PID (ctx, ASID) is 8-bit length, not half word. - For struct pmap, no need to use integer types smaller than word as pm_ctx because of alignment. - For ppc4xx_tlb_enter(), we need word-length storage for pid (and msr). XXX Better to rewrite pmap module with more suggestive integer types rather than char, int, long, and so on. Fix pmap_procwr(). While we need to turn off IMMU, DMMU should be kept on. Otherwise, dcbst (and also icbi probably, though not documented clearly both for 405 and 403) should not work correctly.
1.5.2.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.6.6.1	03-Apr-2021	thorpej	Sync with HEAD.
1.6.4.1	03-Apr-2021	thorpej	Sync with HEAD.
1.12	27-Mar-2019	christos	fix protection
1.11	13-Feb-2017	skrll	branches: 1.11.14; G/C VM_MAX_KERNEL_BUF
1.10	23-Feb-2015	joerg	branches: 1.10.2; 1.10.4; Use default PAGER_MAP_DEFAULT_SIZE for ARM and PowerPC, exception acorn26. This bumps the KVA reservation from 4MB to 16MB and avoids long hangs on my Cubietruck under IO. acorn26 is kept as it does have a ridiculous low 32MB KVA limit.
1.9	20-Jun-2011	matt	branches: 1.9.12; 1.9.30; PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.8	06-Nov-2010	uebayasi	branches: 1.8.6; Merge from uebayasi-xip:
1.60.2.5	14-Aug-2010	uebayasi	Teach TLB miss handler (pmap_tlbmiss()) to map "Expansion ROM" area as PA == VA. Now we don't need to reserve a TLB entry for it.
1.7	06-Nov-2010	uebayasi	Remove incomplete, never worked dynamic run-time memory registration (uvm_page_physload(9)). This functionality will be re-added later.
1.6	06-Mar-2009	joerg	branches: 1.6.2; 1.6.4; Remove SHMMAXPGS from all kernel configs. Dynamically compute the initial limit as 1/4 of the physical memory. Ensure the limit is at least 1024 pages, the old default on most platforms.
1.5	25-Oct-2007	yamt	branches: 1.5.20; 1.5.28; 1.5.34; defparam PAGER_MAP_SIZE.
1.4	02-Apr-2003	thorpej	branches: 1.4.18; 1.4.60; 1.4.78; 1.4.80; 1.4.84; Use PAGE_SIZE rather than NBPG.
1.3	01-Apr-2003	thorpej	Make PAGE_SIZE, PAGE_SHIFT, and PAGE_MASK compile-time constants for PowerPC processors.
1.2	04-Mar-2003	matt	Re-arrange things in evbppc & powerpc to support OEA-based eval boards in evbppc. OEA-based board(s) to be added later.
1.1	03-Feb-2003	matt	Move ibm4xx vmparam.h to powerpc/include/ibm4xx directory. Add a stub vmparam.h to choose the right vmparam. This is needed so evbppc can host both ibm4xx and oea based eval boards.
1.4.84.1	13-Nov-2007	bouyer	Sync with HEAD
1.4.80.1	06-Nov-2007	matt	sync with HEAD
1.4.78.1	28-Oct-2007	joerg	Sync with HEAD.
1.4.60.1	03-Dec-2007	ad	Sync with HEAD.
1.4.18.1	27-Oct-2007	yamt	sync with head.
1.5.34.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.5.28.1	28-Apr-2009	skrll	Sync with HEAD.
1.5.20.1	04-May-2009	yamt	sync with head.
1.6.4.1	05-Mar-2011	rmind	sync with head
1.6.2.3	14-Aug-2010	uebayasi	Teach TLB miss handler (pmap_tlbmiss()) to map "Expansion ROM" area as PA == VA. Now we don't need to reserve a TLB entry for it.
1.6.2.2	11-Aug-2010	uebayasi	Hook pmap_physseg_{init,fini} on powerpc/ibm4xx.
1.6.2.1	26-Apr-2010	uebayasi	Remove the unfinished code to add a memory segment after uvm_page_init(). It doesn't even compile. (In the future, we should allocate struct vm_page [] on the added memory segment for NUMA's sake.)
1.8.6.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.9.30.2	28-Aug-2017	skrll	Sync with HEAD
1.9.30.1	06-Apr-2015	skrll	Sync with HEAD
1.9.12.1	03-Dec-2017	jdolecek	update from HEAD
1.10.4.1	21-Apr-2017	bouyer	Sync with HEAD
1.10.2.1	20-Mar-2017	pgoyette	Sync with HEAD
1.11.14.1	10-Jun-2019	christos	Sync with HEAD
1.1	17-Jul-2012	matt	branches: 1.1.4; MPC8xx SPR defintions
1.1.4.2	30-Oct-2012	yamt	sync with head
1.1.4.1	17-Jul-2012	yamt	file spr.h was added on branch yamt-pagecache on 2012-10-30 17:20:12 +0000
1.2	25-Feb-2010	matt	Split <powerpc/spr.h> into a common <powerpc/spr.h> and <powerpc/XXX/spr.h> where XXX is ibm4xx or oea.
1.1	03-Feb-2003	matt	branches: 1.1.108; 1.1.128; 1.1.132; Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.1.132.1	07-Jan-2011	matt	Add spr.h
1.1.128.1	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.108.1	11-Mar-2010	yamt	sync with head
1.20	06-Jul-2020	rin	Include missing opt_ppcarch.h.
1.19	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.18	06-Jul-2014	mrg	make sure struct bat is aligned to 8 bytes as we shift them 3 bits. fixes PReP lossage as reported on port-powerpc and port-prep. thanks to makoto@ki.nu and kiyohara@netbsd.
1.17	15-Feb-2012	macallan	branches: 1.17.6; 1.17.20; make BATs >256MB work, now macppc works again on 745x CPUs as well ok riz
1.16	15-Feb-2012	matt	When making BATU, use (BAT_XBL\|BAT_BL) for the extended bat lengths.
1.15	01-Feb-2012	matt	Enable XBSEN and HIGHBAT for OEA 7455 and related CPUs. The BAT entries now have a resolution of 8MB. (Adjacent entries are merged up to a total of 2GB per entry).
1.14	20-Jun-2011	matt	branches: 1.14.2; 1.14.6; Include <powerpc/psl.h>
1.13	21-Jul-2009	nisimura	branches: 1.13.10; protect C constructs from assembler source inclusion.
1.12	28-Apr-2008	martin	branches: 1.12.22; Remove clause 3 and 4 from TNF licenses
1.11	23-Feb-2008	matt	branches: 1.11.2; 1.11.4; Add BAT_VA2IDX to abstract out the va to index calculation.
1.10	23-Feb-2008	matt	Add BAT_WIMG and some XBL aware BAT_BL_{512,1G,2G,4G} macros.
1.9	05-Feb-2008	garbled	branches: 1.9.2; 1.9.6; Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself. Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap. Yank __HAVE_PMAP_PHYSSEG from all the oea code. Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs. Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe. In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V]. With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
1.8	05-Aug-2006	sanjayl	branches: 1.8.34; 1.8.40; 1st cut of Powermac G5 support (uses bridge mode).
1.7	11-Dec-2005	christos	branches: 1.7.4; 1.7.8; merge ktrace-lwp.
1.6	21-Jan-2005	matt	branches: 1.6.8; Add extended BAT block size definitions.
1.5	14-Mar-2003	matt	branches: 1.5.2; 1.5.10; Add _LOCORE protection.
1.4	06-Feb-2003	matt	Add oea_iobat_remove(paddr_t).
1.3	05-Feb-2003	matt	Make _LP64 friendly.
1.2	05-Feb-2003	matt	Make things a bit more LP64 friendly.
1.1	03-Feb-2003	matt	Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.5.10.1	29-Apr-2005	kent	sync with -current
1.5.2.1	24-Jan-2005	skrll	Sync with HEAD.
1.6.8.3	27-Feb-2008	yamt	sync with head.
1.6.8.2	11-Feb-2008	yamt	sync with head.
1.6.8.1	30-Dec-2006	yamt	sync with head.
1.7.8.1	11-Aug-2006	yamt	sync with head
1.7.4.1	09-Sep-2006	rpaulo	sync with head
1.8.40.1	18-Feb-2008	mjf	Sync with HEAD.
1.8.34.1	23-Mar-2008	matt	sync with HEAD
1.9.6.2	02-Jun-2008	mjf	Sync with HEAD.
1.9.6.1	03-Apr-2008	mjf	Sync with HEAD.
1.9.2.1	24-Mar-2008	keiichi	sync with head.
1.11.4.2	19-Aug-2009	yamt	sync with head.
1.11.4.1	16-May-2008	yamt	sync with head.
1.11.2.1	18-May-2008	yamt	sync with head.
1.12.22.1	26-Jan-2011	matt	Change battable to have a granularity of 8MB.
1.13.10.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.14.6.1	18-Feb-2012	mrg	merge to -current.
1.14.2.1	17-Apr-2012	yamt	sync with head
1.17.20.1	10-Aug-2014	tls	Rebase.
1.17.6.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.6	26-Feb-2021	thorpej	Split cpu_model_init() into cpu_features_probe() and cpu_features_enable() so that early bootstrap can do those two steps independently, if needed. Continue to provide a cpu_model_init() wrapper for now.
1.5	22-Mar-2018	macallan	branches: 1.5.14; provide a wrapper for mapiodev() - if we have BATs just use the paddr, if we don't then actually map it
1.4	28-Apr-2008	martin	branches: 1.4.86; Remove clause 3 and 4 from TNF licenses
1.3	23-Feb-2008	matt	branches: 1.3.2; 1.3.4; 1.3.6; Add a XBSEN flag for large BATs
1.2	14-Feb-2008	matt	branches: 1.2.2; 1.2.4; 1.2.8; Add multiple inclusion protection. add oeacpufeat.
1.1	05-Feb-2008	garbled	branches: 1.1.2; Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself. Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap. Yank __HAVE_PMAP_PHYSSEG from all the oea code. Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs. Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe. In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V]. With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
1.1.2.3	27-Feb-2008	yamt	sync with head.
1.1.2.2	11-Feb-2008	yamt	sync with head.
1.1.2.1	05-Feb-2008	yamt	file cpufeat.h was added on branch yamt-lazymbuf on 2008-02-11 14:59:28 +0000
1.2.8.2	02-Jun-2008	mjf	Sync with HEAD.
1.2.8.1	03-Apr-2008	mjf	Sync with HEAD.
1.2.4.1	24-Mar-2008	keiichi	sync with head.
1.2.2.2	18-Feb-2008	mjf	Sync with HEAD.
1.2.2.1	14-Feb-2008	mjf	file cpufeat.h was added on branch mjf-devfs on 2008-02-18 21:04:58 +0000
1.3.6.1	16-May-2008	yamt	sync with head.
1.3.4.1	18-May-2008	yamt	sync with head.
1.3.2.2	23-Mar-2008	matt	sync with HEAD
1.3.2.1	23-Feb-2008	matt	file cpufeat.h was added on branch matt-armv6 on 2008-03-23 02:04:17 +0000
1.4.86.1	30-Mar-2018	pgoyette	Resolve conflicts between branch and HEAD
1.5.14.1	03-Apr-2021	thorpej	Sync with HEAD.
1.15	10-Mar-2024	rillig	powerpc/hid: fix snprintb format for HID0_970_BITMASK_U
1.14	20-Jan-2024	jmcneill	fix comments: HID0 ICFI/DCFI are "flash invalidate", not "flush invalidate"
1.13	06-Jul-2020	rin	branches: 1.13.20; Include missing opt_ppcarch.h.
1.12	16-Feb-2018	macallan	add a few pp970-specific bits
1.11	07-Jul-2017	macallan	add bits & masks for ppc970 HID0
1.10	22-Sep-2013	matt	branches: 1.10.6; Define HID1_{SYNCBE,ABE} for the 7450
1.9	25-May-2008	phx	branches: 1.9.32; 1.9.42; 1.9.48; Better call it HID0_BTCD, as in prep, mvmeppc and rs6000 locore.
1.8	25-May-2008	phx	Added HID0[BTAC] bit for the 604.
1.7	11-Dec-2005	christos	branches: 1.7.74; 1.7.76; 1.7.78; 1.7.80; merge ktrace-lwp.
1.6	21-Jan-2005	matt	Add some HID1 definitions and HID0_XBSEN for 7455+ processors.
1.5	21-Jan-2005	matt	Correct BHTCLR/XAEN definitions.
1.4	11-Jan-2005	chs	branches: 1.4.2; enable powersave mode on 7450 and family. also, the HID0_DOZE bit in this context doesn't mean "doze", it's actually "enable extra BATs". add an alias for this bit and use it as appropriate.
1.3	13-Feb-2004	wiz	Uppercase CPU, plural is CPUs.
1.2	29-Mar-2003	matt	branches: 1.2.2; Add 7450 LRSTK and FOLD bits.
1.1	03-Feb-2003	matt	Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.2.2.5	24-Jan-2005	skrll	Sync with HEAD.
1.2.2.4	17-Jan-2005	skrll	Sync with HEAD.
1.2.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.2.2.1	03-Aug-2004	skrll	Sync with HEAD
1.4.2.1	29-Apr-2005	kent	sync with -current
1.7.80.1	23-Jun-2008	wrstuden	Sync w/ -current. 34 merge conflicts to follow.
1.7.78.1	04-May-2009	yamt	sync with head.
1.7.76.1	04-Jun-2008	yamt	sync with head
1.7.74.1	02-Jun-2008	mjf	Sync with HEAD.
1.9.48.1	18-May-2014	rmind	sync with head
1.9.42.2	03-Dec-2017	jdolecek	update from HEAD
1.9.42.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.9.32.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.10.6.1	28-Aug-2017	skrll	Sync with HEAD
1.13.20.1	03-Feb-2024	martin	Pull up following revision(s) (requested by jmcneill in ticket #561): etc/etc.evbppc/Makefile.inc: revision 1.15 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.1 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.2 sys/arch/evbppc/wii/dev/bwdsp.c: revision 1.1 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.3 sys/arch/evbppc/wii/dev/bwdsp.c: revision 1.2 distrib/utils/embedded/files/evbppc_wii_icon.png: revision 1.1 usr.sbin/sysinst/arch/evbppc/md.h: revision 1.4 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.4 sys/arch/evbppc/wii/dev/viio.h: revision 1.1 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.5 sys/arch/evbppc/wii/dev/mainbus.h: revision 1.1 distrib/utils/embedded/conf/wii.conf: revision 1.1 distrib/utils/embedded/conf/wii.conf: revision 1.2 distrib/utils/embedded/conf/wii.conf: revision 1.3 sys/dev/sdmmc/sdhcvar.h: revision 1.34 sys/dev/sdmmc/sdhc.c: revision 1.118 sys/arch/evbppc/wii/dev/resetbtn.c: revision 1.1 distrib/utils/embedded/conf/evbppc.conf: revision 1.1 sys/dev/wsfb/genfb.c: revision 1.91 sys/arch/evbppc/wii/dev/resetbtn.c: revision 1.2 sys/dev/wscons/wsconsio.h: revision 1.127 sys/arch/powerpc/oea/oea_machdep.c: revision 1.85 sys/arch/evbppc/wii/dev/hollywood.h: revision 1.1 sys/arch/evbppc/conf/std.wii: revision 1.1 sys/arch/evbppc/wii/dev/hollywood.h: revision 1.2 sys/arch/evbppc/wii/dev/hollywood.c: revision 1.1 sys/arch/evbppc/conf/std.wii: revision 1.2 sys/arch/evbppc/wii/dev/hollywood.c: revision 1.2 sys/arch/evbppc/conf/std.wii: revision 1.3 sys/arch/powerpc/oea/cpu_subr.c: revision 1.109 sys/arch/evbppc/wii/wii_mmuinit.S: revision 1.1 sys/dev/usb/usb.h: revision 1.124 sys/arch/evbppc/wii/machdep.c: revision 1.1 sys/arch/evbppc/wii/dev/rtcsram.c: revision 1.1 sys/arch/powerpc/include/oea/hid.h: revision 1.14 sys/arch/evbppc/wii/mainbus.c: revision 1.1 sys/arch/evbppc/wii/machdep.c: revision 1.2 sys/arch/evbppc/wii/dev/ehci_hollywood.c: revision 1.1 sys/arch/evbppc/wii/mainbus.c: revision 1.2 sys/arch/evbppc/wii/machdep.c: revision 1.3 sys/arch/evbppc/wii/dev/ehci_hollywood.c: revision 1.2 sys/arch/evbppc/wii/mainbus.c: revision 1.3 sys/arch/evbppc/wii/machdep.c: revision 1.4 sys/arch/evbppc/wii/dev/hwgpio.c: revision 1.1 sys/arch/evbppc/wii/dev/sdhc_hollywood.c: revision 1.1 sys/arch/evbppc/wii/dev/sdhc_hollywood.c: revision 1.2 sys/arch/evbppc/wii/wii_locore.S: revision 1.1 sys/arch/evbppc/conf/files.wii: revision 1.1 sys/arch/evbppc/wii/wii_locore.S: revision 1.2 sys/arch/evbppc/include/wii.h: revision 1.1 sys/arch/evbppc/conf/files.wii: revision 1.2 sys/arch/evbppc/wii/dev/exi.c: revision 1.1 sys/arch/evbppc/include/wii.h: revision 1.2 sys/arch/evbppc/conf/files.wii: revision 1.3 sys/arch/powerpc/powerpc/clock.c: revision 1.18 sys/arch/evbppc/include/wii.h: revision 1.3 sys/arch/evbppc/conf/files.wii: revision 1.4 sys/arch/evbppc/include/wii.h: revision 1.4 sys/arch/evbppc/wii/dev/exi.h: revision 1.1 sys/arch/evbppc/wii/dev/avenc.c: revision 1.1 sys/arch/evbppc/include/wii.h: revision 1.5 sys/arch/evbppc/include/wii.h: revision 1.6 sys/arch/evbppc/include/wii.h: revision 1.7 sys/arch/evbppc/wii/dev/avenc.h: revision 1.1 distrib/utils/embedded/mkimage: revision 1.79 sys/arch/evbppc/conf/WII: revision 1.1 sys/arch/evbppc/conf/INSTALL_WII: revision 1.1 distrib/utils/embedded/files/evbppc_wii_meta.xml: revision 1.1 sys/arch/evbppc/wii/dev/vireg.h: revision 1.1 sys/arch/evbppc/conf/WII: revision 1.2 distrib/utils/embedded/files/evbppc_wii_meta.xml: revision 1.2 sys/arch/evbppc/wii/dev/vireg.h: revision 1.2 sys/arch/evbppc/conf/WII: revision 1.3 sys/arch/evbppc/conf/WII: revision 1.4 usr.sbin/sysinst/arch/evbppc/md.c: revision 1.11 sys/arch/evbppc/wii/dev/ohci_hollywood.c: revision 1.1 sys/dev/usb/ehcivar.h: revision 1.52 sys/arch/evbppc/wii/pic_pi.c: revision 1.1 sys/arch/evbppc/wii/dev/ohci_hollywood.c: revision 1.2 etc/etc.evbppc/ttys: revision 1.8 sys/arch/evbppc/wii/dev/bwai.c: revision 1.1 sys/arch/evbppc/wii/dev/bwai.c: revision 1.2 sys/arch/evbppc/wii/dev/bwai.c: revision 1.3 sys/arch/evbppc/wii/autoconf.c: revision 1.1 sys/arch/evbppc/conf/Makefile.wii.inc: revision 1.1 sys/arch/evbppc/wii/dev/bwai.h: revision 1.1 sys/arch/evbppc/wii/autoconf.c: revision 1.2 sys/arch/evbppc/conf/Makefile.wii.inc: revision 1.2 powerpc: oea: Fix prefetchable mappings Prefetchable mappings need PMAP_NOCACHE to get write-combine semantics. powerpc: oea: Decode IBM750CL L2 cache information. sdmmc: add support for optional delay after register write wscons: Add HOLLYWOOD display and YUY2 pixel format types wsfb: add support for optional "devcmap" property A hardware driver can supply a pointer to a 16x 32-bit array to override the default rasops device colour map in the "devcmap" property. ehci: add EHCIF_32BIT_ACCESS flag to force 32-bit MMIO fix comments: HID0 ICFI/DCFI are "flash invalidate", not "flush invalidate" powerpc: fix delay for large (> ~5sec) values When calculating the target timebase, promote '1000' on the RHS to ULL to force 64-bit calculation, otherwise 'n * 1000' will overflow. usb: increase USB_PORT_RESET_RECOVERY from 10ms to 20ms I changed this from 250ms to 10ms back in 2021 based on a similar FreeBSD change, but it seems to be a bit too aggressive for some platforms. evbppc: Add initial support for the Nintendo Wii wii: support RB_POWERDOWN build fix: use dd with count=1 for compat with NetBSD dd(1) wii: Add NTSC 480p support. In addition to this, add VIIO_{GET,SET}REGS ioctl support to allow for poking at video interface registers from userland. This is helpful for debugging display issues. wii: Add 128x48 icon to SD card image wii: Fix a comment wii: Add drivers for Broadway DSP and Audio interface. 0: [] audio0 @ bwdsp0: Broadway DSP playback: 16, 2ch, 48000Hz record: unavailable (P-) slinear_be 16/16, 2ch, { 48000 } wii: Add screenblank support. wii: Use screen dimming register for screen blanking. wii: Add GPIO, I2C, and basic A/V encoder driver. wii: Use A/V encoder volume controls instead of using a software filter. wii: Simply DSP driver - no interrupt handler required. wii: provide device names to intr_establish wii$ intrctl list interrupt id CPU0 device name(s) pi irq 14 64769 hollywood0 hollywood irq 36 5872* ehci0 hollywood irq 39 58907* sdhc0 hollywood irq 40 4* sdhc1 hollywood irq 49 0* resetbtn0 pi irq 5 0* bwai0 wii: Add support for passing boot options to the kernel. wii: Add External interface bus and RTC support wii: Remove objcopy after kernel build. HBC will do the right thing. Add wsvt25 entries (off by default) for ttyE0-ttyE3. Add support for "PAL" (576i) mode on Wii.
1.2	28-Apr-2008	martin	Remove clause 3 and 4 from TNF licenses
1.1	03-Feb-2003	matt	branches: 1.1.104; 1.1.106; 1.1.108; Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.1.108.1	16-May-2008	yamt	sync with head.
1.1.106.1	18-May-2008	yamt	sync with head.
1.1.104.1	02-Jun-2008	mjf	Sync with HEAD.
1.39	15-Dec-2023	rin	powerpc: oea: For OEA64_BRIDGE, 1:1 map up to 3GiB memory As done for OEA. Note that kva over 3GiB is reserved. Provide PMAP_MAP_POOLPAGE for OEA64_BRIDGE at the same time, by which direct-mapped memory is utilized in order to work around starvation of 512MiB kernel virtual space. PR kern/57621
1.38	28-Sep-2023	skrll	Trailing whitespace.
1.37	07-May-2022	rin	branches: 1.37.4; Try to fix PV tracking support. * For oea (with real PV tracking support): Define __HAVE_PMAP_PV_TRACK. Otherwise, pmap_pv_init() is not called by uvm_init(). * For booke and ibm4xx (without PV tracking support): For MODULAR kernel and modules, define __HAVE_PMAP_PV_TRACK together with PMAP_PV_TRACK_ONLY_STUBS, so that modules can be shared with oea. Note that PMAP_PV_TRACK_ONLY_STUBS can be used even for oea, as a compile-time option to strip real PV tracking support.
1.36	16-Feb-2022	riastradh	powerpc: Implement pv-tracking for unmanaged pages. Needed for drm.
1.35	12-Mar-2021	thorpej	Re-factor the code in pmap_extract() that checks the 601 I/O segment table and the BAT tables into separate functions that can be called from outside of the pmap module.
1.34	02-Mar-2021	thorpej	Complete the pmap symbol renaming shenanigans for pmap_bootstrap[12]().
1.33	01-Mar-2021	thorpej	Split pmap_bootstrap() into 2 functions: - pmap_bootstrap1(), which sets up the low-level pmap data structures. - pmap_bootstrap2(), which actually programs the MMU hardware based on pmap_bootstrap1()'s work. pmap_bootstrap() is still provided as a wrapper around the two, but this provides flexibility to platforms that might need to do additional work between these two phases.
1.32	06-Jul-2020	rin	branches: 1.32.2; Include missing opt_modular.h so that struct vm_page_md is compatible to that for booke.
1.31	06-Jul-2020	rin	LKM was gone.
1.30	14-Mar-2020	ad	pmap_remove_all(): Return a boolean value to indicate the behaviour. If true, all mappings have been removed, the pmap is totally cleared out, and UVM can then avoid doing the work to call pmap_remove() for each map entry. If false, either nothing has been done, or some helpful arch-specific voodoo has taken place.
1.29	19-Apr-2018	christos	branches: 1.29.2; s/static inline/static __inline/g for consistency.
1.28	28-Feb-2014	matt	branches: 1.28.28; Add pmap_ste_spill
1.27	28-Jul-2012	matt	branches: 1.27.2; 1.27.4; Fix -fno-common fallout.
1.26	27-Sep-2011	jym	branches: 1.26.2; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments. Fix call sites to reflect the new definition. Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
1.25	30-Jun-2011	matt	Modify mapiodev to take a third argument indicating whether the space should be prefetchable (true) or not (false).
1.24	20-Jun-2011	matt	PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.23	20-Jun-2011	matt	Add #error for unknown PPC variant Now that oea calls cpu_fixup_stubs, we don't need pmap_fixup_stubs.
1.22	15-Feb-2011	macallan	branches: 1.22.2; implement pmap_mmap_flags() and teach PowerPC's bus_space_mmap() to actually use BUS_SPACE_MAP_PREFETCHABLE which, now that /dev/pci* knows how to use it, helps improve X performance
1.21	12-Feb-2011	matt	When an OEA kernel is configured for multiple MMU types, use the new powerpc fixup mechanism to bind the kernel to a particular MMU. This avoids an indirect call for every pmap call.
1.20	18-Jan-2011	matt	branches: 1.20.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.19	14-Nov-2010	uebayasi	branches: 1.19.2; Move struct vm_page_md definition from vmparam.h to pmap.h, because it's used only by pmap. vmparam.h has definitions for wider audience. All GENERIC kernels build tested, except ia64. powerpc/include/booke/vmparam.h has one too, but it has no pmap.h, so it's left as is.
1.18	07-Nov-2009	cegger	branches: 1.18.4; Add a flags argument to pmap_kenter_pa(9). Patch showed on tech-kern@ http://mail-index.netbsd.org/tech-kern/2009/11/04/msg006434.html No objections.
1.17	21-Oct-2009	rmind	Remove uarea swap-out functionality: - Addresses the issue described in PR/38828. - Some simplification in threading and sleepq subsystems. - Eliminates pmap_collect() and, as a side note, allows pmap optimisations. - Eliminates XS_CTL_DATA_ONSTACK in scsipi code. - Avoids few scans on LWP list and thus potentially long holds of proc_lock. - Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k. - Removes __SWAP_BROKEN cases. Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on acorn26 (thanks to <bjh21>). Discussed on <tech-kern>, reviewed by <ad>.
1.16	21-Apr-2009	cegger	change pmap flags argument from int to u_int. discussed with christos@ on source-changes-d@
1.15	28-Dec-2008	he	branches: 1.15.2; Wrap #include "opt_ppcarch.h" in #ifdef _KERNEL_OPT, to allow lib/librump to build for evbppc.
1.14	09-Dec-2008	pooka	Make pmap_kernel() a MI macro for struct pmap *kernel_pmap_ptr, which is now the "API" provided by the pmap module. pmap_kernel() remains as the syntactic sugar. Bonus cosmetics round: move all the pmap_t pointer typedefs into uvm_pmap.h. Thanks to Greg Oster for providing cpu muscle for doing test builds.
1.13	07-Feb-2008	matt	branches: 1.13.6; 1.13.10; 1.13.16; 1.13.18; 1.13.30; Cleanup/simplify #if/#endif
1.12	05-Feb-2008	garbled	Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself. Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap. Yank __HAVE_PMAP_PHYSSEG from all the oea code. Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs. Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe. In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V]. With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
1.11	09-Jan-2008	garbled	When compiling in bridge mode, add a prototype for pmap_setup_segment0_map()
1.10	21-Feb-2007	thorpej	branches: 1.10.22; 1.10.28; 1.10.34; Replace the Mach-derived boolean_t type with the C99 bool type. A future commit will replace use of TRUE and FALSE with true and false.
1.9	05-Aug-2006	sanjayl	branches: 1.9.10; 1st cut of Powermac G5 support (uses bridge mode).
1.8	24-Dec-2005	perry	branches: 1.8.4; 1.8.8; Remove leading __ from __(const\|inline\|signed\|volatile) -- it is obsolete.
1.7	11-Dec-2005	christos	merge ktrace-lwp.
1.6	21-Nov-2003	matt	branches: 1.6.16; More PPC64 changes. (latent for now).
1.5	24-Aug-2003	chs	add support for non-executable mappings (where the hardware allows this) and make the stack and heap non-executable by default. the changes fall into two basic catagories: - pmap and trap-handler changes. these are all MD: = alpha: we already track per-page execute permission with the (software) PG_EXEC bit, so just have the trap handler pay attention to it. = i386: use a new GDT segment for %cs for processes that have no executable mappings above a certain threshold (currently the bottom of the stack). track per-page execute permission with the last unused PTE bit. = powerpc/ibm4xx: just use the hardware exec bit. = powerpc/oea: we already track per-page exec bits, but the hardware only implements non-exec mappings at the segment level. so track the number of executable mappings in each segment and turn on the no-exec segment bit iff the count is 0. adjust the trap handler to deal. = sparc (sun4m): fix our use of the hardware protection bits. fix the trap handler to recognize text faults. = sparc64: split the existing unified TSB into data and instruction TSBs, and only load TTEs into the appropriate TSB(s) for the permissions. fix the trap handler to check for execute permission. = not yet implemented: amd64, hppa, sh5 - changes in all the emulations that put a signal trampoline on the stack. instead, we now put the trampoline into a uvm_aobj and map that into the process separately. originally from openbsd, adapted for netbsd by me.
1.4	09-Apr-2003	matt	branches: 1.4.2; Add POOL_VTOPHYS. Change vtophys to return -1 if pmap_extract fails. (callers of vtophys should always supply a valid VA so that pmap_extract should never fail).
1.3	15-Mar-2003	matt	Make lint happy.
1.2	05-Feb-2003	matt	Make things a bit more LP64 friendly.
1.1	03-Feb-2003	matt	Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.4.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.4.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.4.2.1	03-Aug-2004	skrll	Sync with HEAD
1.6.16.5	11-Feb-2008	yamt	sync with head.
1.6.16.4	21-Jan-2008	yamt	sync with head
1.6.16.3	26-Feb-2007	yamt	sync with head.
1.6.16.2	30-Dec-2006	yamt	sync with head.
1.6.16.1	21-Jun-2006	yamt	sync with head.
1.8.8.1	11-Aug-2006	yamt	sync with head
1.8.4.1	09-Sep-2006	rpaulo	sync with head
1.9.10.1	27-Feb-2007	yamt	- sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
1.10.34.1	10-Jan-2008	bouyer	Sync with HEAD
1.10.28.1	18-Feb-2008	mjf	Sync with HEAD.
1.10.22.1	23-Mar-2008	matt	sync with HEAD
1.13.30.1	07-Jan-2011	matt	PMAP_NC -> PMAP_NOCACHE.
1.13.18.2	28-Apr-2009	skrll	Sync with HEAD.
1.13.18.1	19-Jan-2009	skrll	Sync with HEAD.
1.13.16.1	13-Dec-2008	haad	Update haad-dm branch to haad-dm-base2.
1.13.10.2	11-Mar-2010	yamt	sync with head
1.13.10.1	04-May-2009	yamt	sync with head.
1.13.6.1	17-Jan-2009	mjf	Sync with HEAD.
1.15.2.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.18.4.1	05-Mar-2011	rmind	sync with head
1.19.2.1	06-Jun-2011	jruoho	Sync with HEAD.
1.20.2.1	17-Feb-2011	bouyer	Sync with HEAD
1.22.2.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.26.2.2	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.26.2.1	30-Oct-2012	yamt	sync with head
1.27.4.1	18-May-2014	rmind	sync with head
1.27.2.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.28.28.1	22-Apr-2018	pgoyette	Sync with HEAD
1.29.2.1	08-Apr-2020	martin	Merge changes from current as of 20200406
1.32.2.1	03-Apr-2021	thorpej	Sync with HEAD.
1.37.4.1	29-Dec-2023	martin	Additionally pull up following revision(s) (requested by rin in ticket #400): sys/arch/powerpc/include/oea/pmap.h: revision 1.39 sys/arch/powerpc/include/pmap.h: revision 1.43 sys/arch/powerpc/oea/pmap_kernel.c: revision 1.14 sys/arch/powerpc/oea/pmap.c: revision 1.117 sys/arch/powerpc/oea/pmap.c: revision 1.118 sys/arch/powerpc/oea/pmap.c: revision 1.119 sys/arch/powerpc/include/vmparam.h: revision 1.27 sys/arch/powerpc/powerpc/trap.c: revision 1.165 sys/arch/powerpc/oea/pmap.c: revision 1.120 sys/arch/powerpc/oea/pmap.c: revision 1.121 sys/arch/powerpc/powerpc/vm_machdep.c: revision 1.106 sys/arch/powerpc/powerpc/bus_dma.c: revision 1.56 powerpc/oea: trap: pmap_{pte,ste}_spill() even in the interrupt context Page table for oea is something like L2 TLB on memory; kernel and processes share its entries, and process entries can be spilled out. As done for MMU based on software-managed TLB, we need to restore such entries even in the interrupt context. Note that pmap_pte_spill() require no resouce to restore entries. Still-not-implemented pmap_ste_spill() for OEA64 should also. Part of PR kern/57621 powerpc/oea: pmap: Drop unused argument for pmap_pvo_reclaim(), NFC Part of PR kern/57621 powerpc/oea: pmap: Rework pmap_pte_spill() It was broken in many ways... Now, it gets working stable both for OEA and OEA64_BRIDGE, as far as I can see. Part of PR kern/57621 powerpc/oea: pmap: Fix mostly-pointless overhead of pmap_pvo_pool (1) Drop __aligned(32) from struct pvo_entry; otherwise, sizeof(struct pvo_entry) is round-up'ed to a multiple of 32. (2) Do not set sizeof(struct pvo_entry) to `align` argument for pool_init(9); it must be power of 2. (3) Align pvo_entry to 32-byte boundary only if reasonably possible, i.e., OEA without DIAGNOSTIC (--> POOL_REDZONE) for now. Part of PR kern/57621 powerpc/oea: pmap_create: Use PR_ZERO and drop memset(9), NFC Part of PR kern/57621 powerpc: oea: For OEA64_BRIDGE, 1:1 map up to 3GiB memory As done for OEA. Note that kva over 3GiB is reserved. Provide PMAP_MAP_POOLPAGE for OEA64_BRIDGE at the same time, by which direct-mapped memory is utilized in order to work around starvation of 512MiB kernel virtual space. PR kern/57621 powerpc: Make sure direct-mapped buffer fits within correct range For OEA and OEA64_BRIDGE, only first 3GiB memory is direct-mapped. Part of PR kern/57621
1.10	06-Jul-2020	rin	Fix comments. No binary changes.
1.9	05-Feb-2008	garbled	Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself. Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap. Yank __HAVE_PMAP_PHYSSEG from all the oea code. Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs. Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe. In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V]. With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
1.8	05-Aug-2006	sanjayl	branches: 1.8.34; 1.8.40; 1st cut of Powermac G5 support (uses bridge mode).
1.7	27-Dec-2005	ross	branches: 1.7.4; 1.7.8; Fix typo inside PPC_OEA64
1.6	11-Dec-2005	christos	merge ktrace-lwp.
1.5	21-Nov-2003	matt	branches: 1.5.16; More PPC64 changes. (latent for now).
1.4	21-Nov-2003	matt	Add PowerPC64 definitions
1.3	24-Aug-2003	chs	add support for non-executable mappings (where the hardware allows this) and make the stack and heap non-executable by default. the changes fall into two basic catagories: - pmap and trap-handler changes. these are all MD: = alpha: we already track per-page execute permission with the (software) PG_EXEC bit, so just have the trap handler pay attention to it. = i386: use a new GDT segment for %cs for processes that have no executable mappings above a certain threshold (currently the bottom of the stack). track per-page execute permission with the last unused PTE bit. = powerpc/ibm4xx: just use the hardware exec bit. = powerpc/oea: we already track per-page exec bits, but the hardware only implements non-exec mappings at the segment level. so track the number of executable mappings in each segment and turn on the no-exec segment bit iff the count is 0. adjust the trap handler to deal. = sparc (sun4m): fix our use of the hardware protection bits. fix the trap handler to recognize text faults. = sparc64: split the existing unified TSB into data and instruction TSBs, and only load TTEs into the appropriate TSB(s) for the permissions. fix the trap handler to check for execute permission. = not yet implemented: amd64, hppa, sh5 - changes in all the emulations that put a signal trampoline on the stack. instead, we now put the trampoline into a uvm_aobj and map that into the process separately. originally from openbsd, adapted for netbsd by me.
1.2	05-Feb-2003	matt	branches: 1.2.2; Make things a bit more LP64 friendly.
1.1	03-Feb-2003	matt	Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.2.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.2.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.2.2.1	03-Aug-2004	skrll	Sync with HEAD
1.5.16.3	11-Feb-2008	yamt	sync with head.
1.5.16.2	30-Dec-2006	yamt	sync with head.
1.5.16.1	21-Jun-2006	yamt	sync with head.
1.7.8.1	11-Aug-2006	yamt	sync with head
1.7.4.1	09-Sep-2006	rpaulo	sync with head
1.8.40.1	18-Feb-2008	mjf	Sync with HEAD.
1.8.34.1	23-Mar-2008	matt	sync with HEAD
1.7	06-Jul-2020	rin	Include missing opt_ppcarch.h.
1.6	01-Jun-2018	macallan	add functions to access SCOM registers on 970 CPUs
1.5	04-May-2018	macallan	add Hardware Interrupt Offset Register found on 970
1.4	16-Feb-2018	macallan	branches: 1.4.2; add a few pp970-specific bits
1.3	07-Jul-2015	macallan	add instruction cache throttling SPR found on 750
1.2	01-Feb-2012	matt	branches: 1.2.6; 1.2.24; Enable XBSEN and HIGHBAT for OEA 7455 and related CPUs. The BAT entries now have a resolution of 8MB. (Adjacent entries are merged up to a total of 2GB per entry).
1.1	25-Feb-2010	matt	branches: 1.1.2; 1.1.6; 1.1.8; 1.1.16; 1.1.20; Split <powerpc/spr.h> into a common <powerpc/spr.h> and <powerpc/XXX/spr.h> where XXX is ibm4xx or oea.
1.1.20.1	18-Feb-2012	mrg	merge to -current.
1.1.16.1	17-Apr-2012	yamt	sync with head
1.1.8.3	28-Jan-2011	matt	Add SPR_DBAT7L ...
1.1.8.2	07-Jan-2011	matt	Split spr.h into generic PPC <powerpc/spr.h> and chip-specific <powerpc/XXX/spr.h> (XXX=oea, ibm4xx, booke)
1.1.8.1	25-Feb-2010	matt	file spr.h was added on branch matt-nb5-pq3 on 2011-01-07 01:34:24 +0000
1.1.6.2	30-Apr-2010	uebayasi	Sync with HEAD.
1.1.6.1	25-Feb-2010	uebayasi	file spr.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
1.1.2.2	11-Mar-2010	yamt	sync with head
1.1.2.1	25-Feb-2010	yamt	file spr.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:51 +0000
1.2.24.1	22-Sep-2015	skrll	Sync with HEAD
1.2.6.1	03-Dec-2017	jdolecek	update from HEAD
1.4.2.2	25-Jun-2018	pgoyette	Sync with HEAD
1.4.2.1	21-May-2018	pgoyette	Sync with HEAD
1.6	27-Feb-2021	thorpej	Rather than putting it on the caller, just let oea_iobat_add() decide whether to call mpc601_ioseg_add().
1.5	28-Apr-2008	martin	branches: 1.5.100; Remove clause 3 and 4 from TNF licenses
1.4	09-Apr-2007	garbled	branches: 1.4.34; 1.4.36; 1.4.38; Make the SR601_VALID_P check less draconic wrt valid io segregs. There are perfectly valid iosegregs for which the old test would fail.
1.3	11-Dec-2005	christos	branches: 1.3.26; 1.3.30; 1.3.32; merge ktrace-lwp.
1.2	06-Jun-2004	kleink	branches: 1.2.12; Add some BAT-style predicate macros.
1.1	03-Feb-2003	matt	branches: 1.1.2; 1.1.6; Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.1.6.1	07-Aug-2005	riz	Pull up revision 1.2 (requested by briggs in ticket #1238): Add some BAT-style predicate macros.
1.1.2.3	21-Sep-2004	skrll	Fix the sync with head I botched.
1.1.2.2	18-Sep-2004	skrll	Sync with HEAD.
1.1.2.1	03-Aug-2004	skrll	Sync with HEAD
1.2.12.1	03-Sep-2007	yamt	sync with head.
1.3.32.1	11-Jul-2007	mjf	Sync with head.
1.3.30.1	10-Apr-2007	ad	Sync with head.
1.3.26.1	15-Apr-2007	yamt	sync with head.
1.4.38.1	16-May-2008	yamt	sync with head.
1.4.36.1	18-May-2008	yamt	sync with head.
1.4.34.1	02-Jun-2008	mjf	Sync with HEAD.
1.5.100.1	03-Apr-2021	thorpej	Sync with HEAD.
1.23	03-Feb-2022	macallan	bump MAXTSIZ now clang runs again
1.22	11-Sep-2021	andvar	Add missing double p and d for stopped and overriden accordingly. Fix few more typos along the way, mainly in copy-pasted comments.
1.21	17-Apr-2021	rin	Adjust TABs. No functional changes.
1.20	17-Aug-2017	sevan	branches: 1.20.18; Raise the maximum text size value to 128MB, this allows binaries such as clang which currently has a text area of around 96MB to execute successfully on macppc. ok macallan
1.19	13-Feb-2017	skrll	branches: 1.19.6; G/C VM_MAX_KERNEL_BUF
1.18	28-Feb-2014	matt	branches: 1.18.6; 1.18.10; 1.18.14; Make this 64-bit aware.
1.17	20-Jun-2011	matt	branches: 1.17.2; 1.17.12; 1.17.16; PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
1.16	14-Nov-2010	uebayasi	branches: 1.16.6; Move struct vm_page_md definition from vmparam.h to pmap.h, because it's used only by pmap. vmparam.h has definitions for wider audience. All GENERIC kernels build tested, except ia64. powerpc/include/booke/vmparam.h has one too, but it has no pmap.h, so it's left as is.
1.15	06-Nov-2010	uebayasi	Remove incomplete, never worked dynamic run-time memory registration (uvm_page_physload(9)). This functionality will be re-added later.
1.14	06-Mar-2009	joerg	branches: 1.14.2; 1.14.4; Remove SHMMAXPGS from all kernel configs. Dynamically compute the initial limit as 1/4 of the physical memory. Ensure the limit is at least 1024 pages, the old default on most platforms.
1.13	28-Apr-2008	martin	branches: 1.13.8; 1.13.14; Remove clause 3 and 4 from TNF licenses
1.12	05-Feb-2008	garbled	branches: 1.12.6; 1.12.8; 1.12.10; Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself. Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap. Yank __HAVE_PMAP_PHYSSEG from all the oea code. Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs. Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe. In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V]. With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
1.11	19-Jan-2008	aymeric	bump the default data size to 256MB (i.e. double it) because compiling gcc during a standard native system build doesn't pass with 128MB.
1.10	21-Sep-2006	matt	branches: 1.10.28; 1.10.34; 1.10.42; Define a PHYSMAP_VSID for mapping pa==va.
1.9	05-Aug-2006	sanjayl	branches: 1.9.4; 1.9.6; 1st cut of Powermac G5 support (uses bridge mode).
1.8	10-Jan-2005	matt	branches: 1.8.10; 1.8.22; 1.8.26; Now that countless UVM bugs have been fixed, enable "topdown" memory allocation by default.
1.7	21-Nov-2003	matt	More PPC64 changes. (latent for now).
1.6	01-Apr-2003	thorpej	branches: 1.6.2; Make PAGE_SIZE, PAGE_SHIFT, and PAGE_MASK compile-time constants for PowerPC processors.
1.5	23-Feb-2003	atatat	#include opt_uvm.h in machine/vmparam.h (for those ports offering the topdown option) so that including it directly before including uvm/uvm_param.h (or uvm/uvm_extern.h which includes uvm/uvm_param.h) and attempting to use topdown won't result in a compiler error. Problem noted in private email.
1.4	21-Feb-2003	matt	Add TOPDOWN VM support.
1.3	06-Feb-2003	matt	Allow KERNEL_SR/KERNEL2_SR to be overriden (I run a kernel with the mapped space at 0x8000000-0x9fffffff).
1.2	05-Feb-2003	matt	Make LP64 friendly.
1.1	03-Feb-2003	matt	Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
1.6.2.2	17-Jan-2005	skrll	Sync with HEAD.
1.6.2.1	03-Aug-2004	skrll	Sync with HEAD
1.8.26.1	11-Aug-2006	yamt	sync with head
1.8.22.1	09-Sep-2006	rpaulo	sync with head
1.8.10.3	11-Feb-2008	yamt	sync with head.
1.8.10.2	21-Jan-2008	yamt	sync with head
1.8.10.1	30-Dec-2006	yamt	sync with head.
1.9.6.1	22-Oct-2006	yamt	sync with head
1.9.4.1	18-Nov-2006	ad	Sync with head.
1.10.42.1	20-Jan-2008	bouyer	Sync with HEAD
1.10.34.1	18-Feb-2008	mjf	Sync with HEAD.
1.10.28.1	23-Mar-2008	matt	sync with HEAD
1.12.10.2	04-May-2009	yamt	sync with head.
1.12.10.1	16-May-2008	yamt	sync with head.
1.12.8.1	18-May-2008	yamt	sync with head.
1.12.6.1	02-Jun-2008	mjf	Sync with HEAD.
1.13.14.1	13-May-2009	jym	Sync with HEAD. Commit is split, to avoid a "too many arguments" protocol error.
1.13.8.1	28-Apr-2009	skrll	Sync with HEAD.
1.14.4.1	05-Mar-2011	rmind	sync with head
1.14.2.3	16-Nov-2010	uebayasi	Sync with HEAD.
1.14.2.2	26-Apr-2010	uebayasi	Remove the unfinished code to add a memory segment after uvm_page_init(). It doesn't even compile. (In the future, we should allocate struct vm_page [] on the added memory segment for NUMA's sake.)
1.14.2.1	23-Feb-2010	uebayasi	Convert all VM_MDPAGE_INIT()'s to take struct vm_page_md * and paddr_t.
1.16.6.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.17.16.1	18-May-2014	rmind	sync with head
1.17.12.2	03-Dec-2017	jdolecek	update from HEAD
1.17.12.1	20-Aug-2014	tls	Rebase to HEAD as of a few days ago.
1.17.2.1	22-May-2014	yamt	sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
1.18.14.1	21-Apr-2017	bouyer	Sync with HEAD
1.18.10.1	20-Mar-2017	pgoyette	Sync with HEAD
1.18.6.1	28-Aug-2017	skrll	Sync with HEAD
1.19.6.1	31-Aug-2017	martin	Pull up following revision(s) (requested by sevan in ticket #241): sys/arch/powerpc/include/oea/vmparam.h: revision 1.20 Raise the maximum text size value to 128MB, this allows binaries such as clang which currently has a text area of around 96MB to execute successfully on macppc. ok macallan
1.20.18.1	17-Apr-2021	thorpej	Sync with HEAD.

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