Cross Reference: /src/sys/arch/powerpc/include/booke/e500var.h

History log of /src/sys/arch/powerpc/include/booke/e500var.h
Revision	Date	Author	Comments
1.9	06-Jul-2020	rin	Style and cosmetic changes. No binary changes intended.
1.8	06-Jul-2020	rin	e500_cpunode_submatch() should be declared regardless of _KERNEL_OPT.
1.7	27-Nov-2012	matt	Make the 85xx get closer to spinning up the secondary CPUs. Don't assume TLB1[0] has the mapping for VA/PA 0. Make sure the TLB1 entries that map physical memory have the M (memory coherent) bit set.
1.6	27-Jul-2012	matt	branches: 1.6.2; Fix -fno-common fallout.
1.5	29-Mar-2012	matt	Add e500_tlb_minimize prototype.
1.4	29-Jun-2011	matt	branches: 1.4.2; 1.4.6; 1.4.8; Add some e500 MP prototypes.
1.3	05-Jun-2011	matt	Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
1.2	18-Jan-2011	matt	branches: 1.2.4; 1.2.6; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
1.1	07-Jan-2011	matt	branches: 1.1.2; 1.1.4; file e500var.h was initially added on branch matt-nb5-pq3.
1.1.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.2.2	14-Oct-2011	matt	Sync with current pulling P2020 and other newer processor support.
1.1.2.1	07-Jan-2011	matt	Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
1.2.6.1	23-Jun-2011	cherry	Catchup with rmind-uvmplock merge.
1.2.4.3	12-Jun-2011	rmind	sync with head
1.2.4.2	05-Mar-2011	rmind	sync with head
1.2.4.1	18-Jan-2011	rmind	file e500var.h was added on branch rmind-uvmplock on 2011-03-05 20:51:37 +0000
1.4.8.1	09-May-2012	riz	Pull up following revision(s) (requested by matt in ticket #241): sys/arch/powerpc/conf/kern-mb.ldscript: revision 1.1 sys/arch/powerpc/include/booke/pmap.h: revision 1.9 sys/arch/powerpc/booke/e500_tlb.c: revision 1.8 sys/arch/powerpc/conf/files.powerpc: revision 1.83 sys/arch/powerpc/booke/booke_pmap.c: revision 1.13 sys/arch/powerpc/include/booke/e500var.h: revision 1.5 sys/arch/evbppc/mpc85xx/machdep.c: revision 1.23 Add ldscript which aligns .data to a 1MB boundary. (used for testing) Add PMAP_MINIMALTLB defflag Add vsize_t to pmap_md_{un,}map_poolpage. Add pmap_kvptefill prototype. Slightly change pmap_bootstrap prototype. Add e500_tlb_minimize prototype. Add support PMAP_MINIMALTLB option. This changes the default use of TLB1 entries to map all of physical memory to using two TLB1 entries, one for mapping text and one for data. The rest of memory is mapped using the page table which is updated as needed. This is used to trap memory corruption issues. Add support for PMAP_MINIMALTLB.
1.4.6.1	05-Apr-2012	mrg	sync to latest -current.
1.4.2.3	16-Jan-2013	yamt	sync with (a bit old) head
1.4.2.2	30-Oct-2012	yamt	sync with head
1.4.2.1	17-Apr-2012	yamt	sync with head
1.6.2.1	25-Feb-2013	tls	resync with head

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